[llvm-commits] CVS: llvm/include/llvm/Value.h
Changes in directory llvm/include/llvm: Value.h updated: 1.80 -> 1.81 --- Log message: Make ValueSymbolTable (temporarily) a friend of Value so it can mod the Name of Value instances. --- Diffs of the changes: (+2 -1) Value.h |3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/include/llvm/Value.h diff -u llvm/include/llvm/Value.h:1.80 llvm/include/llvm/Value.h:1.81 --- llvm/include/llvm/Value.h:1.80 Fri Dec 16 18:18:06 2005 +++ llvm/include/llvm/Value.h Tue Jan 10 03:45:57 2006 @@ -51,7 +51,8 @@ PATypeHolder Ty; Use *UseList; - friend class SymbolTable;// Allow SymbolTable to directly poke Name. + friend class ValueSymbolTable; // Allow ValueSymbolTable to directly mod Name. + friend class SymbolTable; // Allow SymbolTable to directly poke Name. std::string Name; void operator=(const Value &); // Do not implement ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/TypeSymbolTable.cpp ValueSymbolTable.cpp
Changes in directory llvm/lib/VMCore:
TypeSymbolTable.cpp added (r1.1)
ValueSymbolTable.cpp added (r1.1)
---
Log message:
For PR411: http://llvm.cs.uiuc.edu/PR411 :
First step in refactoring the SymbolTable is to split it into two classes,
one for a symbol table of types and one for a symbol table of Values.
---
Diffs of the changes: (+360 -0)
TypeSymbolTable.cpp | 193 +++
ValueSymbolTable.cpp | 167
2 files changed, 360 insertions(+)
Index: llvm/lib/VMCore/TypeSymbolTable.cpp
diff -c /dev/null llvm/lib/VMCore/TypeSymbolTable.cpp:1.1
*** /dev/null Tue Jan 10 03:51:58 2006
--- llvm/lib/VMCore/TypeSymbolTable.cpp Tue Jan 10 03:51:48 2006
***
*** 0
--- 1,193
+ //===-- TypeSymbolTable.cpp - Implement the TypeSymbolTable class
-===//
+ //
+ // The LLVM Compiler Infrastructure
+ //
+ // This file was developed by the LLVM research group and revised by Reid
+ // Spencer. It is distributed under the University of Illinois Open Source
+ // License. See LICENSE.TXT for details.
+ //
+
//===--===//
+ //
+ // This file implements the TypeSymbolTable class for the VMCore library.
+ //
+
//===--===//
+
+ #include "llvm/TypeSymbolTable.h"
+ #include "llvm/DerivedTypes.h"
+ #include "llvm/ADT/StringExtras.h"
+ #include
+
+ using namespace llvm;
+
+ #define DEBUG_SYMBOL_TABLE 0
+ #define DEBUG_ABSTYPE 0
+
+ TypeSymbolTable::~TypeSymbolTable() {
+ // Drop all abstract type references in the type plane...
+ for (iterator TI = tmap.begin(), TE = tmap.end(); TI != TE; ++TI) {
+ if (TI->second->isAbstract()) // If abstract, drop the reference...
+ cast(TI->second)->removeAbstractTypeUser(this);
+ }
+ }
+
+ std::string TypeSymbolTable::getUniqueName(const std::string &BaseName) const
{
+ std::string TryName = BaseName;
+ const_iterator End = tmap.end();
+
+ // See if the name exists
+ while (tmap.find(TryName) != End)// Loop until we find a free
+ TryName = BaseName + utostr(++LastUnique); // name in the symbol table
+ return TryName;
+ }
+
+ // lookup a type by name - returns null on failure
+ Type* TypeSymbolTable::lookup(const std::string& Name) const {
+ const_iterator TI = tmap.find(Name);
+ if (TI != tmap.end())
+ return const_cast(TI->second);
+ return 0;
+ }
+
+ // Erase a specific type from the symbol table
+ bool TypeSymbolTable::erase(Type *N) {
+ for (iterator TI = tmap.begin(), TE = tmap.end(); TI != TE; ++TI) {
+ if (TI->second == N) {
+ this->erase(TI);
+ return true;
+ }
+ }
+ return false;
+ }
+
+ // remove - Remove a type from the symbol table...
+ Type* TypeSymbolTable::erase(iterator Entry) {
+ assert(Entry != tmap.end() && "Invalid entry to remove!");
+
+ const Type* Result = Entry->second;
+
+ #if DEBUG_SYMBOL_TABLE
+ dump();
+ std::cerr << " Removing Value: " << Result->getName() << "\n";
+ #endif
+
+ tmap.erase(Entry);
+
+ // If we are removing an abstract type, remove the symbol table from it's
use
+ // list...
+ if (Result->isAbstract()) {
+ #if DEBUG_ABSTYPE
+ std::cerr << "Removing abstract type from symtab" <<
Result->getDescription()<<"\n";
+ #endif
+ cast(Result)->removeAbstractTypeUser(this);
+ }
+
+ return const_cast(Result);
+ }
+
+
+ // insert - Insert a type into the symbol table with the specified name...
+ void TypeSymbolTable::insert(const std::string& Name, const Type* T) {
+ assert(T && "Can't insert null type into symbol table!");
+
+ // Check to see if there is a naming conflict. If so, rename this type!
+ std::string UniqueName = Name;
+ if (lookup(Name))
+ UniqueName = getUniqueName(Name);
+
+ #if DEBUG_SYMBOL_TABLE
+ dump();
+ std::cerr << " Inserting type: " << UniqueName << ": "
+ << T->getDescription() << "\n";
+ #endif
+
+ // Insert the tmap entry
+ tmap.insert(make_pair(UniqueName, T));
+
+ // If we are adding an abstract type, add the symbol table to it's use list.
+ if (T->isAbstract()) {
+ cast(T)->addAbstractTypeUser(this);
+ #if DEBUG_ABSTYPE
+ std::cerr << "Added abstract type to ST: " << T->getDescription() << "\n";
+ #endif
+ }
+ }
+
+ // Strip the symbol table of its names.
+ bool TypeSymbolTable::strip() {
+ bool RemovedSymbol = false;
+ for (iterator TI = tmap.begin(); TI != tmap.end(); ) {
+ erase(TI++);
+ RemovedSymbol = true;
+ }
+
+ return RemovedSymbol;
+ }
+
+ /// rename - Given a value with a non-empty name, remove its existing entry
+ /// from the symbol table and insert a new one for Name. This is equivalent
to
+ /// doing "remove(V), V->Name = Name, insert(V)", but is faster, and will not
+ /// temporarily remove the symbol table plane if V is the last value in the
+
[llvm-commits] CVS: llvm/include/llvm/TypeSymbolTable.h ValueSymbolTable.h
Changes in directory llvm/include/llvm:
TypeSymbolTable.h added (r1.1)
ValueSymbolTable.h added (r1.1)
---
Log message:
For PR411: http://llvm.cs.uiuc.edu/PR411 :
First step in refactoring the SymbolTable is to split it into two classes,
one for a symbol table of types and one for a symbol table of Values.
---
Diffs of the changes: (+290 -0)
TypeSymbolTable.h | 152 +
ValueSymbolTable.h | 138
2 files changed, 290 insertions(+)
Index: llvm/include/llvm/TypeSymbolTable.h
diff -c /dev/null llvm/include/llvm/TypeSymbolTable.h:1.1
*** /dev/null Tue Jan 10 03:51:58 2006
--- llvm/include/llvm/TypeSymbolTable.h Tue Jan 10 03:51:48 2006
***
*** 0
--- 1,152
+ //===-- llvm/TypeSymbolTable.h - Implement a Type Symtab *- C++
-*-===//
+ //
+ // The LLVM Compiler Infrastructure
+ //
+ // This file was developed by Reid Spencer based on the original SymbolTable
+ // implemented by the LLVM Research Group and re-written by Reid Spencer.
+ // It is distributed under the University of Illinois Open Source License.
+ // See LICENSE.TXT for details.
+ //
+
//===--===//
+ //
+ // This file implements the name/type symbol table for LLVM.
+ //
+
//===--===//
+
+ #ifndef LLVM_TYPE_SYMBOL_TABLE_H
+ #define LLVM_TYPE_SYMBOL_TABLE_H
+
+ #include "llvm/Type.h"
+ #include
+
+ namespace llvm {
+
+ /// This class provides a symbol table of name/type pairs with operations to
+ /// support constructing, searching and iterating over the symbol table. The
+ /// class derives from AbstractTypeUser so that the contents of the symbol
+ /// table can be updated when abstract types become concrete.
+ class TypeSymbolTable : public AbstractTypeUser {
+
+ /// @name Types
+ /// @{
+ public:
+
+ /// @brief A mapping of names to types.
+ typedef std::map TypeMap;
+
+ /// @brief An iterator over the TypeMap.
+ typedef TypeMap::iterator iterator;
+
+ /// @brief A const_iterator over the TypeMap.
+ typedef TypeMap::const_iterator const_iterator;
+
+ /// @}
+ /// @name Constructors
+ /// @{
+ public:
+
+ TypeSymbolTable() {}
+ ~TypeSymbolTable();
+
+ /// @}
+ /// @name Accessors
+ /// @{
+ public:
+
+ /// Generates a unique name for a type based on the \p BaseName by
+ /// incrementing an integer and appending it to the name, if necessary
+ /// @returns the unique name
+ /// @brief Get a unique name for a type
+ std::string getUniqueName(const std::string &BaseName) const;
+
+ /// This method finds the type with the given \p name in the type map
+ /// and returns it.
+ /// @returns null if the name is not found, otherwise the Type
+ /// associated with the \p name.
+ /// @brief Lookup a type by name.
+ Type* lookup(const std::string& name) const;
+
+ /// @returns true iff the symbol table is empty.
+ /// @brief Determine if the symbol table is empty
+ inline bool empty() const { return tmap.empty(); }
+
+ /// @returns the size of the symbol table
+ /// @brief The number of name/type pairs is returned.
+ inline unsigned size() const { return unsigned(tmap.size()); }
+
+ /// This function can be used from the debugger to display the
+ /// content of the symbol table while debugging.
+ /// @brief Print out symbol table on stderr
+ void dump() const;
+
+ /// @}
+ /// @name Iteration
+ /// @{
+ public:
+ /// Get an iterator to the start of the symbol table
+ inline iterator begin() { return tmap.begin(); }
+
+ /// @brief Get a const_iterator to the start of the symbol table
+ inline const_iterator begin() const { return tmap.begin(); }
+
+ /// Get an iterator to the end of the symbol talbe.
+ inline iterator end() { return tmap.end(); }
+
+ /// Get a const_iterator to the end of the symbol table.
+ inline const_iterator end() const { return tmap.end(); }
+
+ /// @}
+ /// @name Mutators
+ /// @{
+ public:
+
+ /// This method will strip the symbol table of its names
+ /// @brief Strip the symbol table.
+ bool strip();
+
+ /// Inserts a type into the symbol table with the specified name. There can
be
+ /// a many-to-one mapping between names and types. This method allows a type
+ /// with an existing entry in the symbol table to get a new name.
+ /// @brief Insert a type under a new name.
+ void insert(const std::string &Name, const Type *Typ);
+
+ /// Remove a type at the specified position in the symbol table.
+ /// @returns the removed Type.
+ /// @returns the Type that was erased from the symbol table.
+ Type* erase(iterator TI);
+
+ /// Remove a specific Type from the symbol table. This isn't fast, linear
+ /// search, O(n), algorithm.
+ /// @returns true if the erase was successful (TI was found)
+ bool erase(Type* TI);
+
[llvm-commits] CVS: llvm/lib/Bytecode/Reader/Reader.cpp
Changes in directory llvm/lib/Bytecode/Reader:
Reader.cpp updated: 1.175 -> 1.176
---
Log message:
Added bytecode support for the extractelement operation.
---
Diffs of the changes: (+13 -0)
Reader.cpp | 13 +
1 files changed, 13 insertions(+)
Index: llvm/lib/Bytecode/Reader/Reader.cpp
diff -u llvm/lib/Bytecode/Reader/Reader.cpp:1.175
llvm/lib/Bytecode/Reader/Reader.cpp:1.176
--- llvm/lib/Bytecode/Reader/Reader.cpp:1.175 Sat Nov 12 12:31:54 2005
+++ llvm/lib/Bytecode/Reader/Reader.cpp Tue Jan 10 13:04:39 2006
@@ -717,6 +717,13 @@
Result = new VAArgInst(foo, getSanitizedType(Oprnds[1]));
break;
}
+ case Instruction::ExtractElement: {
+if (Oprnds.size() != 2)
+ throw std::string("Invalid extractelement instruction!");
+Result = new ExtractElementInst(getValue(iType, Oprnds[0]),
+getValue(Type::UIntTyID, Oprnds[1]));
+break;
+ }
case Instruction::Cast:
Result = new CastInst(getValue(iType, Oprnds[0]),
getSanitizedType(Oprnds[1]));
@@ -1439,6 +1446,12 @@
error("Select instruction must have three arguments.");
Constant* Result = ConstantExpr::getSelect(ArgVec[0], ArgVec[1],
ArgVec[2]);
+ if (Handler) Handler->handleConstantExpression(Opcode, ArgVec, Result);
+ return Result;
+} else if (Opcode == Instruction::ExtractElement) {
+ if (ArgVec.size() != 2)
+error("ExtractElement instruction must have two arguments.");
+ Constant* Result = ConstantExpr::getExtractElement(ArgVec[0], ArgVec[1]);
if (Handler) Handler->handleConstantExpression(Opcode, ArgVec, Result);
return Result;
} else {// All other 2-operand expressions
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[llvm-commits] CVS: llvm/lib/Transforms/Utils/Local.cpp
Changes in directory llvm/lib/Transforms/Utils: Local.cpp updated: 1.46 -> 1.47 --- Log message: Added support for the extractelement operation. --- Diffs of the changes: (+2 -0) Local.cpp |2 ++ 1 files changed, 2 insertions(+) Index: llvm/lib/Transforms/Utils/Local.cpp diff -u llvm/lib/Transforms/Utils/Local.cpp:1.46 llvm/lib/Transforms/Utils/Local.cpp:1.47 --- llvm/lib/Transforms/Utils/Local.cpp:1.46Thu Oct 27 11:34:00 2005 +++ llvm/lib/Transforms/Utils/Local.cpp Tue Jan 10 13:05:15 2006 @@ -102,6 +102,8 @@ if (Constant *Op2 = dyn_cast(I->getOperand(2))) return ConstantExpr::getSelect(Op0, Op1, Op2); return 0; + case Instruction::ExtractElement: +return ConstantExpr::getExtractElement(Op0, Op1); case Instruction::GetElementPtr: std::vector IdxList; IdxList.reserve(I->getNumOperands()-1); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrInfo.td
Changes in directory llvm/lib/Target/Alpha: AlphaInstrInfo.td updated: 1.99 -> 1.100 --- Log message: Int immediate loading fix --- Diffs of the changes: (+1 -1) AlphaInstrInfo.td |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.99 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.100 --- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.99Mon Jan 9 13:49:58 2006 +++ llvm/lib/Target/Alpha/AlphaInstrInfo.td Tue Jan 10 13:12:47 2006 @@ -828,7 +828,7 @@ (ZAPNOTi (LDA (SExt16 immSExt16int:$imm), R31), 15)>; def : Pat<(i64 immConst2PartInt:$imm), (ZAPNOTi (LDA (LL16 (SExt16 immConst2PartInt:$imm)), -(LDAH (LH16 (SExt16 immConst2PartInt:$imm)), R31)), 15)>; +(LDAH (LH16 (SExt32 immConst2PartInt:$imm)), R31)), 15)>; //TODO: I want to just define these like this! ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.120 -> 1.121
---
Log message:
Added selection DAG support for the extractelement operation.
---
Diffs of the changes: (+1 -0)
SelectionDAGISel.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.120
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.121
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.120Wed Jan 4
16:28:25 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Jan 10 13:04:57 2006
@@ -388,6 +388,7 @@
void visitUnreachable(UnreachableInst &I) { /* noop */ }
// These all get lowered before this pass.
+ void visitExtractElement(ExtractElementInst &I) { assert(0 && "TODO"); }
void visitSwitch(SwitchInst &I) { assert(0 && "TODO"); }
void visitInvoke(InvokeInst &I) { assert(0 && "TODO"); }
void visitUnwind(UnwindInst &I) { assert(0 && "TODO"); }
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LowerPacked.cpp SCCP.cpp
Changes in directory llvm/lib/Transforms/Scalar:
LowerPacked.cpp updated: 1.6 -> 1.7
SCCP.cpp updated: 1.125 -> 1.126
---
Log message:
Added lower packed support for the extractelement operation.
---
Diffs of the changes: (+43 -0)
LowerPacked.cpp | 31 +++
SCCP.cpp| 12
2 files changed, 43 insertions(+)
Index: llvm/lib/Transforms/Scalar/LowerPacked.cpp
diff -u llvm/lib/Transforms/Scalar/LowerPacked.cpp:1.6
llvm/lib/Transforms/Scalar/LowerPacked.cpp:1.7
--- llvm/lib/Transforms/Scalar/LowerPacked.cpp:1.6 Mon Dec 26 07:48:44 2005
+++ llvm/lib/Transforms/Scalar/LowerPacked.cpp Tue Jan 10 13:05:05 2006
@@ -59,6 +59,10 @@
/// @param SELI the select operator to convert
void visitSelectInst(SelectInst& SELI);
+ /// @brief Lowers packed extractelement instructions.
+ /// @param EI the extractelement operator to convert
+ void visitExtractElementInst(ExtractElementInst& EI);
+
/// This function asserts if the instruction is a PackedType but
/// is handled by another function.
///
@@ -330,6 +334,33 @@
Changed = true;
instrsToRemove.push_back(&SELI);
}
+}
+
+void LowerPacked::visitExtractElementInst(ExtractElementInst& EI)
+{
+ std::vector& op0Vals = getValues(EI.getOperand(0));
+ const PackedType *PTy = cast(EI.getOperand(0)->getType());
+ Value *op1 = EI.getOperand(1);
+
+ if (ConstantUInt *C = dyn_cast(op1)) {
+EI.replaceAllUsesWith(op0Vals[C->getValue()]);
+ } else {
+AllocaInst *alloca = new AllocaInst(PTy->getElementType(),
+ ConstantUInt::get(Type::UIntTy,
PTy->getNumElements()),
+ EI.getName() + ".alloca",
&(EI.getParent()->getParent()->getEntryBlock().front()));
+for (unsigned i = 0; i < PTy->getNumElements(); ++i) {
+ GetElementPtrInst *GEP = new GetElementPtrInst(alloca,
ConstantUInt::get(Type::UIntTy, i),
+"store.ge", &EI);
+ new StoreInst(op0Vals[i], GEP, &EI);
+}
+GetElementPtrInst *GEP = new GetElementPtrInst(alloca, op1,
+ EI.getName() + ".ge", &EI);
+LoadInst *load = new LoadInst(GEP, EI.getName() + ".load", &EI);
+EI.replaceAllUsesWith(load);
+ }
+
+ Changed = true;
+ instrsToRemove.push_back(&EI);
}
bool LowerPacked::runOnFunction(Function& F)
Index: llvm/lib/Transforms/Scalar/SCCP.cpp
diff -u llvm/lib/Transforms/Scalar/SCCP.cpp:1.125
llvm/lib/Transforms/Scalar/SCCP.cpp:1.126
--- llvm/lib/Transforms/Scalar/SCCP.cpp:1.125 Mon Sep 26 00:28:52 2005
+++ llvm/lib/Transforms/Scalar/SCCP.cpp Tue Jan 10 13:05:05 2006
@@ -322,6 +322,7 @@
void visitSelectInst(SelectInst &I);
void visitBinaryOperator(Instruction &I);
void visitShiftInst(ShiftInst &I) { visitBinaryOperator(I); }
+ void visitExtractElementInst(ExtractElementInst &I);
// Instructions that cannot be folded away...
void visitStoreInst (Instruction &I);
@@ -726,6 +727,17 @@
markConstant(IV, &I, ConstantExpr::get(I.getOpcode(),
V1State.getConstant(),
V2State.getConstant()));
}
+}
+
+void SCCPSolver::visitExtractElementInst(ExtractElementInst &I) {
+ LatticeVal &ValState = getValueState(I.getOperand(0));
+ LatticeVal &IdxState = getValueState(I.getOperand(1));
+
+ if (ValState.isOverdefined() || IdxState.isOverdefined())
+markOverdefined(&I);
+ else if(ValState.isConstant() && IdxState.isConstant())
+markConstant(&I, ConstantExpr::getExtractElement(ValState.getConstant(),
+ IdxState.getConstant()));
}
// Handle getelementptr instructions... if all operands are constants then we
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[llvm-commits] CVS: llvm/include/llvm/Support/InstVisitor.h
Changes in directory llvm/include/llvm/Support:
InstVisitor.h updated: 1.36 -> 1.37
---
Log message:
Added an instruction and constant expression for the extractelement
operation.
---
Diffs of the changes: (+1 -0)
InstVisitor.h |1 +
1 files changed, 1 insertion(+)
Index: llvm/include/llvm/Support/InstVisitor.h
diff -u llvm/include/llvm/Support/InstVisitor.h:1.36
llvm/include/llvm/Support/InstVisitor.h:1.37
--- llvm/include/llvm/Support/InstVisitor.h:1.36Sat Jun 18 13:31:30 2005
+++ llvm/include/llvm/Support/InstVisitor.h Tue Jan 10 13:04:13 2006
@@ -175,6 +175,7 @@
RetTy visitCallInst(CallInst &I) { DELEGATE(Instruction); }
RetTy visitShiftInst(ShiftInst &I) { DELEGATE(Instruction); }
RetTy visitVAArgInst(VAArgInst &I) { DELEGATE(Instruction); }
+ RetTy visitExtractElementInst(ExtractElementInst &I) {
DELEGATE(Instruction); }
// Next level propagators... if the user does not overload a specific
// instruction type, they can overload one of these to get the whole class
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[llvm-commits] CVS: llvm/include/llvm/Constants.h Instruction.def Instructions.h
Changes in directory llvm/include/llvm:
Constants.h updated: 1.75 -> 1.76
Instruction.def updated: 1.16 -> 1.17
Instructions.h updated: 1.29 -> 1.30
---
Log message:
Added an instruction and constant expression for the extractelement
operation.
---
Diffs of the changes: (+54 -1)
Constants.h |6 ++
Instruction.def |3 ++-
Instructions.h | 46 ++
3 files changed, 54 insertions(+), 1 deletion(-)
Index: llvm/include/llvm/Constants.h
diff -u llvm/include/llvm/Constants.h:1.75 llvm/include/llvm/Constants.h:1.76
--- llvm/include/llvm/Constants.h:1.75 Tue Oct 4 13:12:13 2005
+++ llvm/include/llvm/Constants.h Tue Jan 10 13:03:58 2006
@@ -521,6 +521,8 @@
Constant *C1, Constant *C2, Constant *C3);
static Constant *getGetElementPtrTy(const Type *Ty, Constant *C,
const std::vector &IdxList);
+ static Constant *getExtractElementTy(const Type *Ty, Constant *Val,
+ Constant *Idx);
public:
// Static methods to construct a ConstantExpr of different kinds. Note that
@@ -587,6 +589,10 @@
const std::vector &IdxList);
static Constant *getGetElementPtr(Constant *C,
const std::vector &IdxList);
+
+ /// Extractelement form.
+ ///
+ static Constant *getExtractElement(Constant *Val, Constant *Idx);
/// isNullValue - Return true if this is the value that would be returned by
/// getNullValue.
Index: llvm/include/llvm/Instruction.def
diff -u llvm/include/llvm/Instruction.def:1.16
llvm/include/llvm/Instruction.def:1.17
--- llvm/include/llvm/Instruction.def:1.16 Fri Jun 24 13:17:33 2005
+++ llvm/include/llvm/Instruction.def Tue Jan 10 13:03:58 2006
@@ -135,7 +135,8 @@
HANDLE_OTHER_INST(35, UserOp1, Instruction) // May be used internally in a
pass
HANDLE_OTHER_INST(36, UserOp2, Instruction)
HANDLE_OTHER_INST(37, VAArg , VAArgInst ) // vaarg instruction
- LAST_OTHER_INST(37)
+HANDLE_OTHER_INST(38, ExtractElement, ExtractElementInst) // extract packed
element
+ LAST_OTHER_INST(38)
#undef FIRST_TERM_INST
#undef HANDLE_TERM_INST
Index: llvm/include/llvm/Instructions.h
diff -u llvm/include/llvm/Instructions.h:1.29
llvm/include/llvm/Instructions.h:1.30
--- llvm/include/llvm/Instructions.h:1.29 Sat Nov 5 15:58:30 2005
+++ llvm/include/llvm/Instructions.hTue Jan 10 13:03:58 2006
@@ -718,6 +718,52 @@
};
//===--===//
+//ExtractElementInst Class
+//===--===//
+
+/// ExtractElementInst - This instruction extracts a single (scalar)
+/// element from a PackedType value
+///
+class ExtractElementInst : public Instruction {
+ Use Ops[2];
+ ExtractElementInst(const ExtractElementInst &EI) :
+Instruction(EI.getType(), ExtractElement, Ops, 2) {
+Ops[0].init(EI.Ops[0], this);
+Ops[1].init(EI.Ops[1], this);
+ }
+
+public:
+ ExtractElementInst(Value *Val, Value *Index,
+ const std::string &Name = "", Instruction *InsertBefore = 0);
+ ExtractElementInst(Value *Val, Value *Index,
+ const std::string &Name, BasicBlock *InsertAtEnd);
+
+ virtual ExtractElementInst *clone() const;
+
+ virtual bool mayWriteToMemory() const { return false; }
+
+ /// Transparently provide more efficient getOperand methods.
+ Value *getOperand(unsigned i) const {
+assert(i < 2 && "getOperand() out of range!");
+return Ops[i];
+ }
+ void setOperand(unsigned i, Value *Val) {
+assert(i < 2 && "setOperand() out of range!");
+Ops[i] = Val;
+ }
+ unsigned getNumOperands() const { return 2; }
+
+ // Methods for support type inquiry through isa, cast, and dyn_cast:
+ static inline bool classof(const ExtractElementInst *) { return true; }
+ static inline bool classof(const Instruction *I) {
+return I->getOpcode() == Instruction::ExtractElement;
+ }
+ static inline bool classof(const Value *V) {
+return isa(V) && classof(cast(V));
+ }
+};
+
+//===--===//
// PHINode Class
//===--===//
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[llvm-commits] CVS: llvm/lib/VMCore/Constants.cpp Instruction.cpp Instructions.cpp Verifier.cpp
Changes in directory llvm/lib/VMCore:
Constants.cpp updated: 1.142 -> 1.143
Instruction.cpp updated: 1.48 -> 1.49
Instructions.cpp updated: 1.29 -> 1.30
Verifier.cpp updated: 1.136 -> 1.137
---
Log message:
Added support for the extractelement operation.
---
Diffs of the changes: (+73 -0)
Constants.cpp| 38 ++
Instruction.cpp |1 +
Instructions.cpp | 21 +
Verifier.cpp | 13 +
4 files changed, 73 insertions(+)
Index: llvm/lib/VMCore/Constants.cpp
diff -u llvm/lib/VMCore/Constants.cpp:1.142 llvm/lib/VMCore/Constants.cpp:1.143
--- llvm/lib/VMCore/Constants.cpp:1.142 Tue Jan 3 19:01:04 2006
+++ llvm/lib/VMCore/Constants.cpp Tue Jan 10 13:05:24 2006
@@ -347,6 +347,19 @@
}
};
+/// ExtractElementConstantExpr - This class is private to Constants.cpp, and
is used
+/// behind the scenes to implement extractelement constant exprs.
+class ExtractElementConstantExpr : public ConstantExpr {
+ Use Ops[2];
+public:
+ ExtractElementConstantExpr(Constant *C1, Constant *C2)
+: ConstantExpr(cast(C1->getType())->getElementType(),
+ Instruction::ExtractElement, Ops, 2) {
+Ops[0].init(C1, this);
+Ops[1].init(C2, this);
+ }
+};
+
/// GetElementPtrConstantExpr - This class is private to Constants.cpp, and is
/// used behind the scenes to implement getelementpr constant exprs.
struct GetElementPtrConstantExpr : public ConstantExpr {
@@ -1141,6 +1154,8 @@
return new BinaryConstantExpr(V.first, V.second[0], V.second[1]);
if (V.first == Instruction::Select)
return new SelectConstantExpr(V.second[0], V.second[1], V.second[2]);
+ if (V.first == Instruction::ExtractElement)
+return new ExtractElementConstantExpr(V.second[0], V.second[1]);
assert(V.first == Instruction::GetElementPtr && "Invalid ConstantExpr!");
@@ -1386,7 +1401,24 @@
return getGetElementPtrTy(PointerType::get(Ty), C, IdxList);
}
+Constant *ConstantExpr::getExtractElementTy(const Type *ReqTy, Constant *Val,
+Constant *Idx) {
+ // Look up the constant in the table first to ensure uniqueness
+ std::vector ArgVec(1, Val);
+ ArgVec.push_back(Idx);
+ const ExprMapKeyType &Key =
std::make_pair(Instruction::ExtractElement,ArgVec);
+ return ExprConstants.getOrCreate(ReqTy, Key);
+}
+Constant *ConstantExpr::getExtractElement(Constant *Val, Constant *Idx) {
+ assert(isa(Val->getType()) &&
+ "Tried to create extractelement operation on non-packed type!");
+ assert(Idx->getType() == Type::UIntTy &&
+ "Index must be uint type!");
+ return
getExtractElementTy(cast(Val->getType())->getElementType(),
+ Val, Idx);
+}
+
// destroyConstant - Remove the constant from the constant table...
//
void ConstantExpr::destroyConstant() {
@@ -1581,6 +1613,12 @@
if (C2 == From) C2 = To;
if (C3 == From) C3 = To;
Replacement = ConstantExpr::getSelect(C1, C2, C3);
+ } else if (getOpcode() == Instruction::ExtractElement) {
+Constant *C1 = getOperand(0);
+Constant *C2 = getOperand(1);
+if (C1 == From) C1 = To;
+if (C2 == From) C2 = To;
+Replacement = ConstantExpr::getExtractElement(C1, C2);
} else if (getNumOperands() == 2) {
Constant *C1 = getOperand(0);
Constant *C2 = getOperand(1);
Index: llvm/lib/VMCore/Instruction.cpp
diff -u llvm/lib/VMCore/Instruction.cpp:1.48
llvm/lib/VMCore/Instruction.cpp:1.49
--- llvm/lib/VMCore/Instruction.cpp:1.48Mon Aug 8 00:21:50 2005
+++ llvm/lib/VMCore/Instruction.cpp Tue Jan 10 13:05:24 2006
@@ -120,6 +120,7 @@
case Shl: return "shl";
case Shr: return "shr";
case VAArg: return "va_arg";
+ case ExtractElement: return "extractelement";
default: return " ";
}
Index: llvm/lib/VMCore/Instructions.cpp
diff -u llvm/lib/VMCore/Instructions.cpp:1.29
llvm/lib/VMCore/Instructions.cpp:1.30
--- llvm/lib/VMCore/Instructions.cpp:1.29 Wed Dec 21 12:22:19 2005
+++ llvm/lib/VMCore/Instructions.cppTue Jan 10 13:05:24 2006
@@ -796,6 +796,26 @@
}
//===--===//
+// ExtractElementInst Implementation
+//===--===//
+
+ExtractElementInst::ExtractElementInst(Value *Val, Value *Index,
+ const std::string &Name, Instruction *InsertBef)
+ : Instruction(cast(Val->getType())->getElementType(),
+ExtractElement, Ops, 2, Name, InsertBef) {
+ Ops[0].init(Val, this);
+ Ops[1].init(Index, this);
+}
+
+ExtractElementInst::ExtractElementInst(Value *Val, Value *Index,
+ const std::string &Name, BasicBlock *InsertAE)
+ : Instruction(cast(Val->getType())->getElementType(),
+ExtractElement, Ops, 2, Name, InsertAE) {
+ Ops[0].init(Val, this);
+ Ops[1].init(Index
[llvm-commits] CVS: llvm/utils/TableGen/FileParser.cpp
Changes in directory llvm/utils/TableGen:
FileParser.cpp updated: 1.9 -> 1.10
---
Log message:
Added support for the extractelement operation.
---
Diffs of the changes: (+81 -81)
FileParser.cpp | 162 -
1 files changed, 81 insertions(+), 81 deletions(-)
Index: llvm/utils/TableGen/FileParser.cpp
diff -u llvm/utils/TableGen/FileParser.cpp:1.9
llvm/utils/TableGen/FileParser.cpp:1.10
--- llvm/utils/TableGen/FileParser.cpp:1.9 Fri Sep 30 01:09:50 2005
+++ llvm/utils/TableGen/FileParser.cpp Tue Jan 10 13:05:34 2006
@@ -1,5 +1,5 @@
-/* A Bison parser, made from /Users/sabre/llvm/utils/TableGen/FileParser.y
+/* A Bison parser, made from
/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y
by GNU Bison version 1.28 */
#define YYBISON 1 /* Identify Bison output. */
@@ -32,7 +32,7 @@
#defineSTRVAL 275
#defineCODEFRAGMENT276
-#line 14 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 14 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
#include "Record.h"
#include "llvm/ADT/StringExtras.h"
@@ -207,7 +207,7 @@
using namespace llvm;
-#line 189 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 189 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
typedef union {
std::string*StrVal;
int IntVal;
@@ -1005,7 +1005,7 @@
switch (yyn) {
case 1:
-#line 223 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 223 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
{
yyval.Rec = Records.getClass(*yyvsp[0].StrVal);
if (yyval.Rec == 0) {
@@ -1016,97 +1016,97 @@
;
break;}
case 2:
-#line 234 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 234 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
{ // string type
yyval.Ty = new StringRecTy();
;
break;}
case 3:
-#line 236 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 236 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
{ // bit type
yyval.Ty = new BitRecTy();
;
break;}
case 4:
-#line 238 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 238 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
{ // bits type
yyval.Ty = new BitsRecTy(yyvsp[-1].IntVal);
;
break;}
case 5:
-#line 240 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 240 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
{ // int type
yyval.Ty = new IntRecTy();
;
break;}
case 6:
-#line 242 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 242 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
{ // list type
yyval.Ty = new ListRecTy(yyvsp[-1].Ty);
;
break;}
case 7:
-#line 244 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 244 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
{ // code type
yyval.Ty = new CodeRecTy();
;
break;}
case 8:
-#line 246 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 246 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
{ // dag type
yyval.Ty = new DagRecTy();
;
break;}
case 9:
-#line 248 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 248 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
{ // Record Type
yyval.Ty = new RecordRecTy(yyvsp[0].Rec);
;
break;}
case 10:
-#line 252 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 252 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
{ yyval.IntVal = 0; ;
break;}
case 11:
-#line 252 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 252 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
{ yyval.IntVal = 1; ;
break;}
case 12:
-#line 254 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 254 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
{ yyval.Initializer = 0; ;
break;}
case 13:
-#line 254 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 254 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
{ yyval.Initializer = yyvsp[0].Initializer; ;
break;}
case 14:
-#line 256 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 256 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
{
yyval.Initializer = new IntInit(yyvsp[0].IntVal);
;
break;}
case 15:
-#line 258 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 258 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
{
yyval.Initializer = new StringInit(*yyvsp[0].StrVal);
delete yyvsp[0].StrVal;
;
break;}
case 16:
-#line 261 "/Users/sabre/llvm/utils/TableGen/FileParser.y"
+#line 261 "/Users/bocchino/vllvm-checkin/src/utils/TableGen/FileParser.y"
{
yyval.Ini
[llvm-commits] CVS: llvm/docs/LangRef.html
Changes in directory llvm/docs: LangRef.html updated: 1.120 -> 1.121 --- Log message: Expanded the documentation for constant expressions to cover select and extractelement. --- Diffs of the changes: (+11 -1) LangRef.html | 12 +++- 1 files changed, 11 insertions(+), 1 deletion(-) Index: llvm/docs/LangRef.html diff -u llvm/docs/LangRef.html:1.120 llvm/docs/LangRef.html:1.121 --- llvm/docs/LangRef.html:1.120Thu Jan 5 11:37:02 2006 +++ llvm/docs/LangRef.html Tue Jan 10 13:31:34 2006 @@ -1086,6 +1086,16 @@ instruction, the index list may have zero or more indexes, which are required to make sense for the type of "CSTPTR". + select ( COND, VAL1, VAL2 ) + + Perform the select operation on + constants. + + extractelement ( VAL, IDX ) + + Perform the extractelement + operation on constants. + OPCODE ( LHS, RHS ) Perform the specified operation of the LHS and RHS constants. OPCODE may @@ -3473,7 +3483,7 @@ mailto:[EMAIL PROTECTED]">Chris Lattner http://llvm.cs.uiuc.edu";>The LLVM Compiler Infrastructure - Last modified: $Date: 2006/01/05 17:37:02 $ + Last modified: $Date: 2006/01/10 19:31:34 $ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp
Changes in directory llvm/lib/Target/IA64:
IA64ISelLowering.cpp updated: 1.14 -> 1.15
---
Log message:
silence a bogus warning
---
Diffs of the changes: (+1 -1)
IA64ISelLowering.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.14
llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.15
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.14 Mon Jan 9 23:26:01 2006
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp Tue Jan 10 13:45:18 2006
@@ -300,7 +300,7 @@
{
SDOperand Val = Args[i].first;
MVT::ValueType ObjectVT = Val.getValueType();
- SDOperand ValToStore(0, 0), ValToConvert;
+ SDOperand ValToStore(0, 0), ValToConvert(0, 0);
unsigned ObjSize=8;
switch (ObjectVT) {
default: assert(0 && "unexpected argument type!");
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.257 -> 1.258
---
Log message:
silence a warning
---
Diffs of the changes: (+2 -1)
LegalizeDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.257
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.258
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.257 Mon Jan 9 17:21:49 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Jan 10 13:43:26 2006
@@ -1975,13 +1975,14 @@
case TargetLowering::Custom: {
SDOperand Tmp = TLI.LowerOperation(Result, DAG);
if (Tmp.Val) {
-SDOperand Tmp2, RetVal;
+SDOperand Tmp2, RetVal(0,0);
for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i) {
Tmp2 = LegalizeOp(Tmp.getValue(i));
AddLegalizedOperand(SDOperand(Node, i), Tmp2);
if (i == Op.ResNo)
RetVal = Tmp;
}
+assert(RetVal.Val && "Illegal result number");
return RetVal;
}
// FALLTHROUGH if the target thinks it is legal.
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[llvm-commits] CVS: llvm/test/Feature/instructions.ll
Changes in directory llvm/test/Feature:
instructions.ll added (r1.1)
---
Log message:
new testcase for extractelement instruction
---
Diffs of the changes: (+8 -0)
instructions.ll |8
1 files changed, 8 insertions(+)
Index: llvm/test/Feature/instructions.ll
diff -c /dev/null llvm/test/Feature/instructions.ll:1.1
*** /dev/null Tue Jan 10 14:00:30 2006
--- llvm/test/Feature/instructions.ll Tue Jan 10 14:00:20 2006
***
*** 0
--- 1,8
+ ; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+ ; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+ ; RUN: diff %t1.ll %t2.ll
+
+ uint %test_extractelement(<4 x uint> %V) {
+ %R = extractelement <4 x uint> %V, uint 1
+ ret uint %R
+ }
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[llvm-commits] CVS: llvm/lib/VMCore/ConstantFolding.cpp ConstantFolding.h Constants.cpp
Changes in directory llvm/lib/VMCore:
ConstantFolding.cpp updated: 1.81 -> 1.82
ConstantFolding.h updated: 1.45 -> 1.46
Constants.cpp updated: 1.143 -> 1.144
---
Log message:
Added constant folding support for the extractelement operation.
---
Diffs of the changes: (+14 -0)
ConstantFolding.cpp | 10 ++
ConstantFolding.h |2 ++
Constants.cpp |2 ++
3 files changed, 14 insertions(+)
Index: llvm/lib/VMCore/ConstantFolding.cpp
diff -u llvm/lib/VMCore/ConstantFolding.cpp:1.81
llvm/lib/VMCore/ConstantFolding.cpp:1.82
--- llvm/lib/VMCore/ConstantFolding.cpp:1.81Thu Jan 5 01:49:30 2006
+++ llvm/lib/VMCore/ConstantFolding.cpp Tue Jan 10 14:03:46 2006
@@ -724,6 +724,16 @@
return 0;
}
+Constant *llvm::ConstantFoldExtractElementInstruction(const Constant *Val,
+ const Constant *Idx) {
+ if (const ConstantPacked *CVal = dyn_cast(Val)) {
+if (const ConstantUInt *CIdx = dyn_cast(Idx)) {
+ return const_cast(CVal->getOperand(CIdx->getValue()));
+}
+ }
+ return 0;
+}
+
/// isZeroSizedType - This type is zero sized if its an array or structure of
/// zero sized types. The only leaf zero sized type is an empty structure.
static bool isMaybeZeroSizedType(const Type *Ty) {
Index: llvm/lib/VMCore/ConstantFolding.h
diff -u llvm/lib/VMCore/ConstantFolding.h:1.45
llvm/lib/VMCore/ConstantFolding.h:1.46
--- llvm/lib/VMCore/ConstantFolding.h:1.45 Thu Apr 21 18:46:51 2005
+++ llvm/lib/VMCore/ConstantFolding.h Tue Jan 10 14:03:46 2006
@@ -31,6 +31,8 @@
Constant *ConstantFoldSelectInstruction(const Constant *Cond,
const Constant *V1,
const Constant *V2);
+ Constant *ConstantFoldExtractElementInstruction(const Constant *Val,
+ const Constant *Idx);
Constant *ConstantFoldBinaryInstruction(unsigned Opcode, const Constant *V1,
const Constant *V2);
Constant *ConstantFoldGetElementPtr(const Constant *C,
Index: llvm/lib/VMCore/Constants.cpp
diff -u llvm/lib/VMCore/Constants.cpp:1.143 llvm/lib/VMCore/Constants.cpp:1.144
--- llvm/lib/VMCore/Constants.cpp:1.143 Tue Jan 10 13:05:24 2006
+++ llvm/lib/VMCore/Constants.cpp Tue Jan 10 14:03:46 2006
@@ -1403,6 +1403,8 @@
Constant *ConstantExpr::getExtractElementTy(const Type *ReqTy, Constant *Val,
Constant *Idx) {
+ if (Constant *FC = ConstantFoldExtractElementInstruction(Val, Idx))
+return FC; // Fold a few common cases...
// Look up the constant in the table first to ensure uniqueness
std::vector ArgVec(1, Val);
ArgVec.push_back(Idx);
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[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp X86ISelLowering.cpp X86InstrInfo.td
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.25 -> 1.26
X86ISelLowering.cpp updated: 1.25 -> 1.26
X86InstrInfo.td updated: 1.192 -> 1.193
---
Log message:
FP_TO_INT*_IN_MEM and x87 FP Select support.
---
Diffs of the changes: (+131 -21)
X86ISelDAGToDAG.cpp | 58
X86ISelLowering.cpp | 53 +--
X86InstrInfo.td | 41 +++-
3 files changed, 131 insertions(+), 21 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.25
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.26
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.25Mon Jan 9 17:10:28 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Tue Jan 10 14:26:56 2006
@@ -18,6 +18,7 @@
#include "llvm/GlobalValue.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Debug.h"
@@ -550,6 +551,63 @@
return CodeGenMap[N] = CurDAG->getTargetNode(Opc, VT, Result);
break;
}
+
+case X86ISD::FP_TO_INT16_IN_MEM:
+case X86ISD::FP_TO_INT32_IN_MEM:
+case X86ISD::FP_TO_INT64_IN_MEM: {
+ assert(N.getOperand(1).getValueType() == MVT::f64);
+
+ // Change the floating point control register to use "round towards zero"
+ // mode when truncating to an integer value.
+ MachineFunction &MF = CurDAG->getMachineFunction();
+ int CWFI = MF.getFrameInfo()->CreateStackObject(2, 2);
+ SDOperand CWSlot = CurDAG->getFrameIndex(CWFI, MVT::i32);
+ SDOperand Base, Scale, Index, Disp;
+ (void)SelectAddr(CWSlot, Base, Scale, Index, Disp);
+ SDOperand Chain = N.getOperand(0);
+
+ // Save the control word.
+ Chain = CurDAG->getTargetNode(X86::FNSTCW16m, MVT::Other,
+Base, Scale, Index, Disp, Chain);
+
+ // Load the old value of the high byte of the control word.
+ SDOperand OldCW =
+CurDAG->getTargetNode(X86::MOV16rm, MVT::i16, MVT::Other,
+ Base, Scale, Index, Disp, Chain);
+ Chain = OldCW.getValue(1);
+
+ // Set the high part to be round to zero...
+ Chain = CurDAG->getTargetNode(X86::MOV16mi, MVT::Other,
+Base, Scale, Index, Disp,
+CurDAG->getConstant(0xC7F, MVT::i16),
+Chain);
+
+ // Reload the modified control word now...
+ Chain = CurDAG->getTargetNode(X86::FLDCW16m, MVT::Other,
+Base, Scale, Index, Disp, Chain);
+
+ // Restore the memory image of control word to original value
+ Chain = CurDAG->getTargetNode(X86::MOV16mr, MVT::Other,
+Base, Scale, Index, Disp, OldCW, Chain);
+
+ switch (Opcode) {
+ case X86ISD::FP_TO_INT16_IN_MEM: Opc = X86::FpIST16m; break;
+ case X86ISD::FP_TO_INT32_IN_MEM: Opc = X86::FpIST32m; break;
+ case X86ISD::FP_TO_INT64_IN_MEM: Opc = X86::FpIST64m; break;
+ }
+
+ SDOperand N1 = Select(N.getOperand(1));
+ SDOperand Base2, Scale2, Index2, Disp2;
+ (void)SelectAddr(N.getOperand(2), Base2, Scale2, Index2, Disp2);
+ Chain = CurDAG->getTargetNode(Opc, MVT::Other,
+Base2, Scale2, Index2, Disp2, N1, Chain);
+
+ // Reload the modified control word now...
+ CodeGenMap[N] =
+Chain = CurDAG->getTargetNode(X86::FLDCW16m, MVT::Other,
+ Base, Scale, Index, Disp, Chain);
+ return Chain;
+}
}
return SelectCode(N);
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.25
llvm/lib/Target/X86/X86ISelLowering.cpp:1.26
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.25Mon Jan 9 16:29:54 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Tue Jan 10 14:26:56 2006
@@ -1192,6 +1192,26 @@
return X86CC;
}
+/// SupportedByFPCMOV - is there a floating point cmov for the specific
+/// X86 condition code.
+/// Current x86 isa includes the following FP cmov instructions:
+/// fcmovb, fcomvbe, fcomve, fcmovu, fcmovae, fcmova, fcmovne, fcmovnu.
+static bool SupportedByFPCMOV(unsigned X86CC) {
+ switch (X86CC) {
+ default:
+return false;
+ case X86ISD::COND_B:
+ case X86ISD::COND_BE:
+ case X86ISD::COND_E:
+ case X86ISD::COND_P:
+ case X86ISD::COND_A:
+ case X86ISD::COND_AE:
+ case X86ISD::COND_NE:
+ case X86ISD::COND_NP:
+return true;
+ }
+}
+
/// LowerOperation - Provide custom lowering hooks for some operations.
///
SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
@@ -1444,21 +1464,32 @@
}
}
case ISD::SELECT: {
-SDOperand Cond =
[llvm-commits] CVS: llvm/lib/Target/X86/X86FloatingPoint.cpp X86InstrInfo.td
Changes in directory llvm/lib/Target/X86:
X86FloatingPoint.cpp updated: 1.45 -> 1.46
X86InstrInfo.td updated: 1.193 -> 1.194
---
Log message:
* fp to sint patterns.
* fiadd, fisub, etc.
---
Diffs of the changes: (+119 -56)
X86FloatingPoint.cpp | 92 ---
X86InstrInfo.td | 83 +-
2 files changed, 119 insertions(+), 56 deletions(-)
Index: llvm/lib/Target/X86/X86FloatingPoint.cpp
diff -u llvm/lib/Target/X86/X86FloatingPoint.cpp:1.45
llvm/lib/Target/X86/X86FloatingPoint.cpp:1.46
--- llvm/lib/Target/X86/X86FloatingPoint.cpp:1.45 Wed Dec 21 01:47:04 2005
+++ llvm/lib/Target/X86/X86FloatingPoint.cppTue Jan 10 16:22:02 2006
@@ -320,46 +320,58 @@
// concrete X86 instruction which uses the register stack.
//
static const TableEntry OpcodeTable[] = {
- { X86::FpABS, X86::FABS },
- { X86::FpADD32m , X86::FADD32m },
- { X86::FpADD64m , X86::FADD64m },
- { X86::FpCHS, X86::FCHS },
- { X86::FpCMOVA , X86::FCMOVA },
- { X86::FpCMOVAE , X86::FCMOVAE },
- { X86::FpCMOVB , X86::FCMOVB },
- { X86::FpCMOVBE , X86::FCMOVBE },
- { X86::FpCMOVE , X86::FCMOVE },
- { X86::FpCMOVNE , X86::FCMOVNE },
- { X86::FpCMOVNP , X86::FCMOVNP },
- { X86::FpCMOVP , X86::FCMOVP },
- { X86::FpCOS, X86::FCOS },
- { X86::FpDIV32m , X86::FDIV32m },
- { X86::FpDIV64m , X86::FDIV64m },
- { X86::FpDIVR32m, X86::FDIVR32m },
- { X86::FpDIVR64m, X86::FDIVR64m },
- { X86::FpILD16m , X86::FILD16m },
- { X86::FpILD32m , X86::FILD32m },
- { X86::FpILD64m , X86::FILD64m },
- { X86::FpIST16m , X86::FIST16m },
- { X86::FpIST32m , X86::FIST32m },
- { X86::FpIST64m , X86::FISTP64m },
- { X86::FpLD0, X86::FLD0 },
- { X86::FpLD1, X86::FLD1 },
- { X86::FpLD32m , X86::FLD32m },
- { X86::FpLD64m , X86::FLD64m },
- { X86::FpMUL32m , X86::FMUL32m },
- { X86::FpMUL64m , X86::FMUL64m },
- { X86::FpSIN, X86::FSIN },
- { X86::FpSQRT , X86::FSQRT},
- { X86::FpST32m , X86::FST32m },
- { X86::FpST64m , X86::FST64m },
- { X86::FpSUB32m , X86::FSUB32m },
- { X86::FpSUB64m , X86::FSUB64m },
- { X86::FpSUBR32m, X86::FSUBR32m },
- { X86::FpSUBR64m, X86::FSUBR64m },
- { X86::FpTST, X86::FTST },
- { X86::FpUCOMIr , X86::FUCOMIr },
- { X86::FpUCOMr , X86::FUCOMr },
+ { X86::FpABS , X86::FABS },
+ { X86::FpADD32m , X86::FADD32m },
+ { X86::FpADD64m , X86::FADD64m },
+ { X86::FpCHS , X86::FCHS },
+ { X86::FpCMOVA , X86::FCMOVA },
+ { X86::FpCMOVAE , X86::FCMOVAE },
+ { X86::FpCMOVB , X86::FCMOVB },
+ { X86::FpCMOVBE , X86::FCMOVBE },
+ { X86::FpCMOVE , X86::FCMOVE },
+ { X86::FpCMOVNE , X86::FCMOVNE },
+ { X86::FpCMOVNP , X86::FCMOVNP },
+ { X86::FpCMOVP , X86::FCMOVP },
+ { X86::FpCOS , X86::FCOS },
+ { X86::FpDIV32m , X86::FDIV32m },
+ { X86::FpDIV64m , X86::FDIV64m },
+ { X86::FpDIVR32m , X86::FDIVR32m },
+ { X86::FpDIVR64m , X86::FDIVR64m },
+ { X86::FpIADD16m , X86::FIADD16m },
+ { X86::FpIADD32m , X86::FIADD32m },
+ { X86::FpIDIV16m , X86::FIDIV16m },
+ { X86::FpIDIV32m , X86::FIDIV32m },
+ { X86::FpIDIVR16m, X86::FIDIVR16m},
+ { X86::FpIDIVR32m, X86::FIDIVR32m},
+ { X86::FpILD16m , X86::FILD16m },
+ { X86::FpILD32m , X86::FILD32m },
+ { X86::FpILD64m , X86::FILD64m },
+ { X86::FpIMUL16m , X86::FIMUL16m },
+ { X86::FpIMUL32m , X86::FIMUL32m },
+ { X86::FpIST16m , X86::FIST16m },
+ { X86::FpIST32m , X86::FIST32m },
+ { X86::FpIST64m , X86::FISTP64m },
+ { X86::FpISUB16m , X86::FISUB16m },
+ { X86::FpISUB32m , X86::FISUB32m },
+ { X86::FpISUBR16m, X86::FISUBR16m},
+ { X86::FpISUBR32m, X86::FISUBR32m},
+ { X86::FpLD0 , X86::FLD0 },
+ { X86::FpLD1 , X86::FLD1 },
+ { X86::FpLD32m , X86::FLD32m },
+ { X86::FpLD64m , X86::FLD64m },
+ { X86::FpMUL32m , X86::FMUL32m },
+ { X86::FpMUL64m , X86::FMUL64m },
+ { X86::FpSIN , X86::FSIN },
+ { X86::FpSQRT, X86::FSQRT},
+ { X86::FpST32m , X86::FST32m },
+ { X86::FpST64m , X86::FST64m },
+ { X86::FpSUB32m , X86::FSUB32m },
+ { X86::FpSUB64m , X86::FSUB64m },
+ { X86::FpSUBR32m , X86::FSUBR32m },
+ { X86::FpSUBR64m , X86::FSUBR64m },
+ { X86::FpTST , X86::FTST },
+ { X86::FpUCOMIr , X86::FUCOMIr },
+ { X86::FpUCOMr , X86::FUCOMr },
};
static unsigned getConcreteOpcode(unsigned Opcode) {
Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.193
llvm/lib/Target/X86/X86InstrInfo.td:1.194
--- llvm/lib/Target/X86/X86InstrInfo.td:1.193 Tue Jan 10 14:26:56 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td Tue Jan 10 16:22:02 2006
@@ -50,6 +50,7 @@
SDTCisPtrTy<1>, SDTCisVT<2,
OtherVT>]>;
def SDTX86Fst : SDTypeProfile<0, 3, [SDTCisFP<0>,
SDTCisPtrTy<1>, SDTCisVT<2,
OtherVT>]>;
+
[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86ISelLowering.h X86InstrInfo.td
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.26 -> 1.27
X86ISelLowering.h updated: 1.12 -> 1.13
X86InstrInfo.td updated: 1.194 -> 1.195
---
Log message:
SSE cmov support.
---
Diffs of the changes: (+121 -17)
X86ISelLowering.cpp | 109
X86ISelLowering.h |3 +
X86InstrInfo.td | 26 +++-
3 files changed, 121 insertions(+), 17 deletions(-)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.26
llvm/lib/Target/X86/X86ISelLowering.cpp:1.27
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.26Tue Jan 10 14:26:56 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Tue Jan 10 18:33:36 2006
@@ -17,8 +17,9 @@
#include "X86TargetMachine.h"
#include "llvm/CallingConv.h"
#include "llvm/Function.h"
-#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/TargetOptions.h"
@@ -1140,14 +1141,34 @@
return std::make_pair(Result, Chain);
}
-//===--===//
-// X86 Custom Lowering Hooks
-//===--===//
+/// getCondBrOpcodeForX86CC - Returns the X86 conditional branch opcode
+/// which corresponds to the condition code.
+static unsigned getCondBrOpcodeForX86CC(unsigned X86CC) {
+ switch (X86CC) {
+ default: assert(0 && "Unknown X86 conditional code!");
+ case X86ISD::COND_A: return X86::JA;
+ case X86ISD::COND_AE: return X86::JAE;
+ case X86ISD::COND_B: return X86::JB;
+ case X86ISD::COND_BE: return X86::JBE;
+ case X86ISD::COND_E: return X86::JE;
+ case X86ISD::COND_G: return X86::JG;
+ case X86ISD::COND_GE: return X86::JGE;
+ case X86ISD::COND_L: return X86::JL;
+ case X86ISD::COND_LE: return X86::JLE;
+ case X86ISD::COND_NE: return X86::JNE;
+ case X86ISD::COND_NO: return X86::JNO;
+ case X86ISD::COND_NP: return X86::JNP;
+ case X86ISD::COND_NS: return X86::JNS;
+ case X86ISD::COND_O: return X86::JO;
+ case X86ISD::COND_P: return X86::JP;
+ case X86ISD::COND_S: return X86::JS;
+ }
+}
-/// SetCCToX86CondCode - do a one to one translation of a ISD::CondCode to
-/// X86 specific CondCode. It returns a X86ISD::COND_INVALID if it cannot
+/// getX86CC - do a one to one translation of a ISD::CondCode to the X86
+/// specific condition code. It returns a X86ISD::COND_INVALID if it cannot
/// do a direct translation.
-static unsigned CCToX86CondCode(SDOperand CC, bool isFP) {
+static unsigned getX86CC(SDOperand CC, bool isFP) {
ISD::CondCode SetCCOpcode = cast(CC)->get();
unsigned X86CC = X86ISD::COND_INVALID;
if (!isFP) {
@@ -1192,11 +1213,10 @@
return X86CC;
}
-/// SupportedByFPCMOV - is there a floating point cmov for the specific
-/// X86 condition code.
-/// Current x86 isa includes the following FP cmov instructions:
+/// hasFPCMov - is there a floating point cmov for the specific X86 condition
+/// code. Current x86 isa includes the following FP cmov instructions:
/// fcmovb, fcomvbe, fcomve, fcmovu, fcmovae, fcmova, fcmovne, fcmovnu.
-static bool SupportedByFPCMOV(unsigned X86CC) {
+static bool hasFPCMov(unsigned X86CC) {
switch (X86CC) {
default:
return false;
@@ -1212,6 +1232,64 @@
}
}
+MachineBasicBlock *
+X86TargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI,
+ MachineBasicBlock *BB) {
+ assert((MI->getOpcode() == X86::CMOV_FR32 ||
+ MI->getOpcode() == X86::CMOV_FR64) &&
+ "Unexpected instr type to insert");
+
+ // To "insert" a SELECT_CC instruction, we actually have to insert the
diamond
+ // control-flow pattern. The incoming instruction knows the destination vreg
+ // to set, the condition code register to branch on, the true/false values to
+ // select between, and a branch opcode to use.
+ const BasicBlock *LLVM_BB = BB->getBasicBlock();
+ ilist::iterator It = BB;
+ ++It;
+
+ // thisMBB:
+ // ...
+ // TrueVal = ...
+ // cmpTY ccX, r1, r2
+ // bCC copy1MBB
+ // fallthrough --> copy0MBB
+ MachineBasicBlock *thisMBB = BB;
+ MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB);
+ MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB);
+ unsigned Opc = getCondBrOpcodeForX86CC(MI->getOperand(3).getImmedValue());
+ BuildMI(BB, Opc, 1).addMBB(sinkMBB);
+ MachineFunction *F = BB->getParent();
+ F->getBasicBlockList().insert(It, copy0MBB);
+ F->getBasicBlockList().insert(It, sinkMBB);
+ // Update machine-CFG edges
+ BB->addSuccessor(copy0MBB);
+ BB->addSuccessor(sinkMBB);
+
+ // copy0MBB:
+ // %FalseValue = ...
+ // # fallthrough to sinkMBB
+ BB = copy0MBB;
+
+ // Update machine-CFG edges
+ BB->ad
[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.26 -> 1.27
---
Log message:
Fit into 80 cols
---
Diffs of the changes: (+2 -1)
X86ISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.26
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.27
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.26Tue Jan 10 14:26:56 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Tue Jan 10 18:46:55 2006
@@ -315,7 +315,8 @@
/// SelectLEAAddr - it calls SelectAddr and determines if the maximal
addressing
/// mode it matches can be cost effectively emitted as an LEA instruction.
/// For X86, it always is unless it's just a (Reg + const).
-bool X86DAGToDAGISel::SelectLEAAddr(SDOperand N, SDOperand &Base, SDOperand
&Scale,
+bool X86DAGToDAGISel::SelectLEAAddr(SDOperand N, SDOperand &Base,
+SDOperand &Scale,
SDOperand &Index, SDOperand &Disp) {
X86ISelAddressMode AM;
if (!MatchAddress(N, AM)) {
___
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[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp X86ISelPattern.cpp
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.27 -> 1.28
X86ISelPattern.cpp updated: 1.191 -> 1.192
---
Log message:
implement FP_REG_KILL insertion for the dag-dag instruction selector
---
Diffs of the changes: (+59 -1)
X86ISelDAGToDAG.cpp | 59
X86ISelPattern.cpp |1
2 files changed, 59 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.27
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.28
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.27Tue Jan 10 18:46:55 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Tue Jan 10 19:15:34 2006
@@ -13,12 +13,17 @@
//===--===//
#include "X86.h"
+#include "X86RegisterInfo.h"
#include "X86Subtarget.h"
#include "X86ISelLowering.h"
#include "llvm/GlobalValue.h"
+#include "llvm/Instructions.h"
+#include "llvm/Support/CFG.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Debug.h"
@@ -139,6 +144,7 @@
/// when it has created a SelectionDAG for us to codegen.
void X86DAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
DEBUG(BB->dump());
+ MachineFunction::iterator FirstMBB = BB;
// Codegen the basic block.
DAG.setRoot(Select(DAG.getRoot()));
@@ -147,6 +153,59 @@
// Emit machine code to BB.
ScheduleAndEmitDAG(DAG);
+
+ // If we are emitting FP stack code, scan the basic block to determine if
this
+ // block defines any FP values. If so, put an FP_REG_KILL instruction before
+ // the terminator of the block.
+ if (X86Vector < SSE2) {
+// Note that FP stack instructions *are* used in SSE code when returning
+// values, but these are not live out of the basic block, so we don't need
+// an FP_REG_KILL in this case either.
+bool ContainsFPCode = false;
+
+// Scan all of the machine instructions in these MBBs, checking for FP
+// stores.
+MachineFunction::iterator MBBI = FirstMBB;
+do {
+ for (MachineBasicBlock::iterator I = MBBI->begin(), E = MBBI->end();
+ !ContainsFPCode && I != E; ++I) {
+for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) {
+ if (I->getOperand(op).isRegister() && I->getOperand(op).isDef() &&
+ MRegisterInfo::isVirtualRegister(I->getOperand(op).getReg()) &&
+ RegMap->getRegClass(I->getOperand(0).getReg()) ==
+X86::RFPRegisterClass) {
+ContainsFPCode = true;
+break;
+ }
+}
+ }
+} while (!ContainsFPCode && &*(MBBI++) != BB);
+
+// Check PHI nodes in successor blocks. These PHI's will be lowered to
have
+// a copy of the input value in this block.
+if (!ContainsFPCode) {
+ // Final check, check LLVM BB's that are successors to the LLVM BB
+ // corresponding to BB for FP PHI nodes.
+ const BasicBlock *LLVMBB = BB->getBasicBlock();
+ const PHINode *PN;
+ for (succ_const_iterator SI = succ_begin(LLVMBB), E = succ_end(LLVMBB);
+ !ContainsFPCode && SI != E; ++SI) {
+for (BasicBlock::const_iterator II = SI->begin();
+ (PN = dyn_cast(II)); ++II) {
+ if (PN->getType()->isFloatingPoint()) {
+ContainsFPCode = true;
+break;
+ }
+}
+ }
+}
+
+// Finally, if we found any FP code, emit the FP_REG_KILL instruction.
+if (ContainsFPCode) {
+ BuildMI(*BB, BB->getFirstTerminator(), X86::FP_REG_KILL, 0);
+ ++NumFPKill;
+}
+ }
}
/// FIXME: copied from X86ISelPattern.cpp
Index: llvm/lib/Target/X86/X86ISelPattern.cpp
diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.191
llvm/lib/Target/X86/X86ISelPattern.cpp:1.192
--- llvm/lib/Target/X86/X86ISelPattern.cpp:1.191Fri Jan 6 11:55:49 2006
+++ llvm/lib/Target/X86/X86ISelPattern.cpp Tue Jan 10 19:15:34 2006
@@ -226,7 +226,6 @@
break;
}
-
// Insert FP_REG_KILL instructions into basic blocks that need them. This
// only occurs due to the floating point stackifier not being aggressive
// enough to handle arbitrary global stackification.
___
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[llvm-commits] CVS: llvm/lib/Target/IA64/IA64InstrInfo.td
Changes in directory llvm/lib/Target/IA64: IA64InstrInfo.td updated: 1.35 -> 1.36 --- Log message: add support for selecting bools FIXME: this is commented out because it makes tblgen go a bit fruity --- Diffs of the changes: (+5 -1) IA64InstrInfo.td |6 +- 1 files changed, 5 insertions(+), 1 deletion(-) Index: llvm/lib/Target/IA64/IA64InstrInfo.td diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.35 llvm/lib/Target/IA64/IA64InstrInfo.td:1.36 --- llvm/lib/Target/IA64/IA64InstrInfo.td:1.35 Mon Dec 26 03:11:45 2005 +++ llvm/lib/Target/IA64/IA64InstrInfo.td Tue Jan 10 19:21:12 2006 @@ -424,11 +424,15 @@ "($qp) mov $dst = $src;;">; } -// TODO: select bools def SELECTINT : Pat<(select PR:$which, GR:$src1, GR:$src2), (CMOV (MOV GR:$src2), GR:$src1, PR:$which)>; // note order! def SELECTFP : Pat<(select PR:$which, FP:$src1, FP:$src2), (CFMOV (FMOV FP:$src2), FP:$src1, PR:$which)>; // note order! +// TODO: can do this faster, w/o using any integer regs (see pattern isel) +// FIXME: this makes tblgen cough and splutter: +// Assertion && "Unknown node in result pattern!"' +//def SELECTBOOL : Pat<(select PR:$which, PR:$src1, PR:$src2), // note order! +// (trunc (CMOV (MOV (zext PR:$src2)), (zext PR:$src1), PR:$which))>; // load constants of various sizes // FIXME: prettyprint -ve constants def : Pat<(i64 immSExt14:$imm), (ADDS r0, immSExt14:$imm)>; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.128 -> 1.129
---
Log message:
Emit an error instead of an assertion if trying to do bogus things in result
patterns.
---
Diffs of the changes: (+2 -2)
DAGISelEmitter.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.128
llvm/utils/TableGen/DAGISelEmitter.cpp:1.129
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.128Mon Jan 9 12:27:06 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp Tue Jan 10 19:33:49 2006
@@ -2281,8 +2281,8 @@
return std::make_pair(1, ResNo);
} else {
N->dump();
- assert(0 && "Unknown node in result pattern!");
- return std::make_pair(1, ~0U);
+ std::cerr << "\n";
+ throw std::string("Unknown node in result pattern!");
}
}
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[llvm-commits] CVS: llvm/lib/Target/IA64/IA64InstrInfo.td
Changes in directory llvm/lib/Target/IA64: IA64InstrInfo.td updated: 1.36 -> 1.37 --- Log message: this just might work --- Diffs of the changes: (+4 -4) IA64InstrInfo.td |8 1 files changed, 4 insertions(+), 4 deletions(-) Index: llvm/lib/Target/IA64/IA64InstrInfo.td diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.36 llvm/lib/Target/IA64/IA64InstrInfo.td:1.37 --- llvm/lib/Target/IA64/IA64InstrInfo.td:1.36 Tue Jan 10 19:21:12 2006 +++ llvm/lib/Target/IA64/IA64InstrInfo.td Tue Jan 10 19:38:07 2006 @@ -429,10 +429,10 @@ def SELECTFP : Pat<(select PR:$which, FP:$src1, FP:$src2), (CFMOV (FMOV FP:$src2), FP:$src1, PR:$which)>; // note order! // TODO: can do this faster, w/o using any integer regs (see pattern isel) -// FIXME: this makes tblgen cough and splutter: -// Assertion && "Unknown node in result pattern!"' -//def SELECTBOOL : Pat<(select PR:$which, PR:$src1, PR:$src2), // note order! -// (trunc (CMOV (MOV (zext PR:$src2)), (zext PR:$src1), PR:$which))>; +def SELECTBOOL : Pat<(select PR:$which, PR:$src1, PR:$src2), // note order! + (CMPNE (CMOV +(MOV (TPCADDIMM22 (ADDS r0, 0), 1, PR:$src2)), +(TPCADDIMM22 (ADDS r0, 0), 1, PR:$src1), PR:$which), r0)>; // load constants of various sizes // FIXME: prettyprint -ve constants def : Pat<(i64 immSExt14:$imm), (ADDS r0, immSExt14:$imm)>; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrInfo.td
Changes in directory llvm/lib/Target/Alpha: AlphaInstrInfo.td updated: 1.100 -> 1.101 --- Log message: this pattern was bogus --- Diffs of the changes: (+1 -2) AlphaInstrInfo.td |3 +-- 1 files changed, 1 insertion(+), 2 deletions(-) Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.100 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.101 --- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.100 Tue Jan 10 13:12:47 2006 +++ llvm/lib/Target/Alpha/AlphaInstrInfo.td Tue Jan 10 21:33:06 2006 @@ -716,7 +716,7 @@ [(brcond (setgt GPRC:$RA, 0), bb:$DISP)]>; def BLBC : BFormDG<0x38, "blbc $RA,$DISP", []>; //TODO: Low bit clear def BLBS : BFormDG<0x3C, "blbs $RA,$DISP", - [(brcond (seteq GPRC:$RA, 1), bb:$DISP)]>; + [(brcond (and GPRC:$RA, 1), bb:$DISP)]>; def BLE : BFormDG<0x3B, "ble $RA,$DISP", [(brcond (setle GPRC:$RA, 0), bb:$DISP)]>; def BLT : BFormDG<0x3A, "blt $RA,$DISP", @@ -739,7 +739,6 @@ [(brcond (setne F8RC:$RA, immFPZ), bb:$DISP)]>; } -def : Pat<(brcond (and GPRC:$RA, 1), bb:$DISP), (BLBS GPRC:$RA, bb:$DISP)>; def : Pat<(brcond GPRC:$RA, bb:$DISP), (BNE GPRC:$RA, bb:$DISP)>; def : Pat<(brcond (setne GPRC:$RA, GPRC:$RB), bb:$DISP), (BEQ (CMPEQ GPRC:$RA, GPRC:$RB), bb:$DISP)>; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.17 -> 1.18
---
Log message:
cleanup GETFD
---
Diffs of the changes: (+3 -4)
IA64ISelDAGToDAG.cpp |7 +++
1 files changed, 3 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.17
llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.18
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.17 Sun Dec 25 08:09:08 2005
+++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp Tue Jan 10 21:50:40 2006
@@ -411,10 +411,9 @@
case IA64ISD::GETFD: {
SDOperand Input = Select(N->getOperand(0));
-SDOperand Result = CurDAG->getTargetNode(IA64::GETFD, MVT::i64, MVT::Flag,
Input);
-CodeGenMap[Op.getValue(0)] = Result;
-CodeGenMap[Op.getValue(1)] = Result.getValue(1);
-return Result.getValue(Op.ResNo);
+SDOperand Result = CurDAG->getTargetNode(IA64::GETFD, MVT::i64, Input);
+CodeGenMap[Op] = Result;
+return Result;
}
case ISD::CALL:
___
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[llvm-commits] CVS: llvm/include/llvm/Analysis/LoopInfo.h
Changes in directory llvm/include/llvm/Analysis:
LoopInfo.h updated: 1.50 -> 1.51
---
Log message:
Switch loopinfo to using ETForest instead of DominatorSet to compute
itself.Patch by Daniel Berlin!
---
Diffs of the changes: (+3 -5)
LoopInfo.h |8 +++-
1 files changed, 3 insertions(+), 5 deletions(-)
Index: llvm/include/llvm/Analysis/LoopInfo.h
diff -u llvm/include/llvm/Analysis/LoopInfo.h:1.50
llvm/include/llvm/Analysis/LoopInfo.h:1.51
--- llvm/include/llvm/Analysis/LoopInfo.h:1.50 Mon Sep 12 12:03:16 2005
+++ llvm/include/llvm/Analysis/LoopInfo.h Tue Jan 10 23:08:57 2006
@@ -35,7 +35,7 @@
namespace llvm {
-struct DominatorSet;
+struct ETForest;
class LoopInfo;
class PHINode;
class Instruction;
@@ -267,8 +267,6 @@
virtual void releaseMemory();
void print(std::ostream &O, const Module* = 0) const;
- /// getAnalysisUsage - Requires dominator sets
- ///
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
/// removeLoop - This removes the specified top-level loop from this loop
info
@@ -299,8 +297,8 @@
static void stub(); // Noop
private:
- void Calculate(const DominatorSet &DS);
- Loop *ConsiderForLoop(BasicBlock *BB, const DominatorSet &DS);
+ void Calculate(const ETForest &EF);
+ Loop *ConsiderForLoop(BasicBlock *BB, const ETForest &EF);
void MoveSiblingLoopInto(Loop *NewChild, Loop *NewParent);
void InsertLoopInto(Loop *L, Loop *Parent);
};
___
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/GCSE.cpp LoopStrengthReduce.cpp
Changes in directory llvm/lib/Transforms/Scalar:
GCSE.cpp updated: 1.46 -> 1.47
LoopStrengthReduce.cpp updated: 1.71 -> 1.72
---
Log message:
Switch these to using ETForest instead of DominatorSet to compute itself.
Patch written by Daniel Berlin!
---
Diffs of the changes: (+11 -10)
GCSE.cpp |6 +++---
LoopStrengthReduce.cpp | 15 ---
2 files changed, 11 insertions(+), 10 deletions(-)
Index: llvm/lib/Transforms/Scalar/GCSE.cpp
diff -u llvm/lib/Transforms/Scalar/GCSE.cpp:1.46
llvm/lib/Transforms/Scalar/GCSE.cpp:1.47
--- llvm/lib/Transforms/Scalar/GCSE.cpp:1.46Thu Apr 21 18:45:12 2005
+++ llvm/lib/Transforms/Scalar/GCSE.cpp Tue Jan 10 23:10:20 2006
@@ -45,7 +45,7 @@
// This transformation requires dominator and immediate dominator info
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
- AU.addRequired();
+ AU.addRequired();
AU.addRequired();
AU.addRequired();
}
@@ -64,7 +64,7 @@
bool Changed = false;
// Get pointers to the analysis results that we will be using...
- DominatorSet &DS = getAnalysis();
+ ETForest &EF = getAnalysis();
ValueNumbering &VN = getAnalysis();
DominatorTree &DT = getAnalysis();
@@ -141,7 +141,7 @@
if (OtherI->getParent() == BB)
Dominates = BlockInsts.count(OtherI);
else
- Dominates = DS.dominates(OtherI->getParent(), BB);
+ Dominates = EF.dominates(OtherI->getParent(), BB);
if (Dominates) {
// Okay, we found an instruction with the same value as this one
Index: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
diff -u llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.71
llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.72
--- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.71 Mon Dec 5
12:23:57 2005
+++ llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp Tue Jan 10 23:10:20 2006
@@ -77,7 +77,7 @@
class LoopStrengthReduce : public FunctionPass {
LoopInfo *LI;
-DominatorSet *DS;
+ETForest *EF;
ScalarEvolution *SE;
const TargetData *TD;
const Type *UIntPtrTy;
@@ -111,7 +111,7 @@
virtual bool runOnFunction(Function &) {
LI = &getAnalysis();
- DS = &getAnalysis();
+ EF = &getAnalysis();
SE = &getAnalysis();
TD = &getAnalysis();
UIntPtrTy = TD->getIntPtrType();
@@ -129,13 +129,14 @@
AU.addPreservedID(LoopSimplifyID);
AU.addPreserved();
AU.addPreserved();
+ AU.addPreserved();
AU.addPreserved();
AU.addPreserved();
AU.addPreserved();
AU.addRequiredID(LoopSimplifyID);
AU.addRequired();
- AU.addRequired();
+ AU.addRequired();
AU.addRequired();
AU.addRequired();
}
@@ -324,7 +325,7 @@
/// the loop, resulting in reg-reg copies (if we use the pre-inc value when we
/// should use the post-inc value).
static bool IVUseShouldUsePostIncValue(Instruction *User, Instruction *IV,
- Loop *L, DominatorSet *DS, Pass *P) {
+ Loop *L, ETForest *EF, Pass *P) {
// If the user is in the loop, use the preinc value.
if (L->contains(User->getParent())) return false;
@@ -332,7 +333,7 @@
// Ok, the user is outside of the loop. If it is dominated by the latch
// block, use the post-inc value.
- if (DS->dominates(LatchBlock, User->getParent()))
+ if (EF->dominates(LatchBlock, User->getParent()))
return true;
// There is one case we have to be careful of: PHI nodes. These little guys
@@ -349,7 +350,7 @@
for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
if (PN->getIncomingValue(i) == IV) {
++NumUses;
- if (!DS->dominates(LatchBlock, PN->getIncomingBlock(i)))
+ if (!EF->dominates(LatchBlock, PN->getIncomingBlock(i)))
return false;
}
@@ -415,7 +416,7 @@
// Okay, we found a user that we cannot reduce. Analyze the instruction
// and decide what to do with it. If we are a use inside of the loop,
use
// the value before incrementation, otherwise use it after
incrementation.
- if (IVUseShouldUsePostIncValue(User, I, L, DS, this)) {
+ if (IVUseShouldUsePostIncValue(User, I, L, EF, this)) {
// The value used will be incremented by the stride more than we are
// expecting, so subtract this off.
SCEVHandle NewStart = SCEV::getMinusSCEV(Start, Stride);
___
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[llvm-commits] CVS: llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
Changes in directory llvm/lib/Transforms/Utils:
BreakCriticalEdges.cpp updated: 1.28 -> 1.29
---
Log message:
Preserve and update ETForest. Patch by Daniel Berlin
---
Diffs of the changes: (+5 -0)
BreakCriticalEdges.cpp |5 +
1 files changed, 5 insertions(+)
Index: llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
diff -u llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp:1.28
llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp:1.29
--- llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp:1.28 Fri Aug 12
20:38:43 2005
+++ llvm/lib/Transforms/Utils/BreakCriticalEdges.cppTue Jan 10 23:11:13 2006
@@ -34,6 +34,7 @@
virtual bool runOnFunction(Function &F);
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ AU.addPreserved();
AU.addPreserved();
AU.addPreserved();
AU.addPreserved();
@@ -153,6 +154,10 @@
ID->addNewBlock(NewBB, TIBB);
}
+ // Update the forest?
+ if (ETForest *EF = P->getAnalysisToUpdate())
+EF->addNewBlock(NewBB, TIBB);
+
// Should we update DominatorTree information?
if (DominatorTree *DT = P->getAnalysisToUpdate()) {
DominatorTree::Node *TINode = DT->getNode(TIBB);
___
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[llvm-commits] CVS: llvm/lib/Analysis/LoopInfo.cpp
Changes in directory llvm/lib/Analysis:
LoopInfo.cpp updated: 1.65 -> 1.66
---
Log message:
Switch loopinfo to using ETForest instead of DominatorSet to compute itself.
Patch by Daniel Berlin!
---
Diffs of the changes: (+9 -9)
LoopInfo.cpp | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
Index: llvm/lib/Analysis/LoopInfo.cpp
diff -u llvm/lib/Analysis/LoopInfo.cpp:1.65 llvm/lib/Analysis/LoopInfo.cpp:1.66
--- llvm/lib/Analysis/LoopInfo.cpp:1.65 Mon Sep 12 12:03:55 2005
+++ llvm/lib/Analysis/LoopInfo.cpp Tue Jan 10 23:08:29 2006
@@ -90,7 +90,7 @@
bool LoopInfo::runOnFunction(Function &) {
releaseMemory();
- Calculate(getAnalysis());// Update
+ Calculate(getAnalysis());// Update
return false;
}
@@ -104,18 +104,18 @@
}
-void LoopInfo::Calculate(const DominatorSet &DS) {
- BasicBlock *RootNode = DS.getRoot();
+void LoopInfo::Calculate(const ETForest &EF) {
+ BasicBlock *RootNode = EF.getRoot();
for (df_iterator NI = df_begin(RootNode),
NE = df_end(RootNode); NI != NE; ++NI)
-if (Loop *L = ConsiderForLoop(*NI, DS))
+if (Loop *L = ConsiderForLoop(*NI, EF))
TopLevelLoops.push_back(L);
}
void LoopInfo::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
- AU.addRequired();
+ AU.addRequired();
}
void LoopInfo::print(std::ostream &OS, const Module* ) const {
@@ -135,7 +135,7 @@
return isNotAlreadyContainedIn(SubLoop->getParentLoop(), ParentLoop);
}
-Loop *LoopInfo::ConsiderForLoop(BasicBlock *BB, const DominatorSet &DS) {
+Loop *LoopInfo::ConsiderForLoop(BasicBlock *BB, const ETForest &EF) {
if (BBMap.find(BB) != BBMap.end()) return 0; // Haven't processed this
node?
std::vector TodoStack;
@@ -143,7 +143,7 @@
// Scan the predecessors of BB, checking to see if BB dominates any of
// them. This identifies backedges which target this node...
for (pred_iterator I = pred_begin(BB), E = pred_end(BB); I != E; ++I)
-if (DS.dominates(BB, *I)) // If BB dominates it's predecessor...
+if (EF.dominates(BB, *I)) // If BB dominates it's predecessor...
TodoStack.push_back(*I);
if (TodoStack.empty()) return 0; // No backedges to this block...
@@ -159,7 +159,7 @@
TodoStack.pop_back();
if (!L->contains(X) && // As of yet unprocessed??
-DS.dominates(EntryBlock, X)) { // X is reachable from entry block?
+EF.dominates(EntryBlock, X)) { // X is reachable from entry block?
// Check to see if this block already belongs to a loop. If this occurs
// then we have a case where a loop that is supposed to be a child of the
// current loop was processed before the current loop. When this occurs,
@@ -191,7 +191,7 @@
// If there are any loops nested within this loop, create them now!
for (std::vector::iterator I = L->Blocks.begin(),
E = L->Blocks.end(); I != E; ++I)
-if (Loop *NewLoop = ConsiderForLoop(*I, DS)) {
+if (Loop *NewLoop = ConsiderForLoop(*I, EF)) {
L->SubLoops.push_back(NewLoop);
NewLoop->ParentLoop = L;
}
___
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp
Changes in directory llvm/lib/Transforms/Scalar:
CorrelatedExprs.cpp updated: 1.29 -> 1.30
---
Log message:
Switch this to using ETForest instead of DominatorSet to compute itself.
Patch written by Daniel Berlin!
---
Diffs of the changes: (+16 -16)
CorrelatedExprs.cpp | 32
1 files changed, 16 insertions(+), 16 deletions(-)
Index: llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp
diff -u llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp:1.29
llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp:1.30
--- llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp:1.29 Thu Apr 21 18:45:12 2005
+++ llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp Tue Jan 10 23:09:40 2006
@@ -217,14 +217,14 @@
class CEE : public FunctionPass {
std::map RankMap;
std::map RegionInfoMap;
-DominatorSet *DS;
+ETForest *EF;
DominatorTree *DT;
public:
virtual bool runOnFunction(Function &F);
// We don't modify the program, so we preserve all analyses
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
- AU.addRequired();
+ AU.addRequired();
AU.addRequired();
AU.addRequiredID(BreakCriticalEdgesID);
};
@@ -297,7 +297,7 @@
// Traverse the dominator tree, computing information for each node in the
// tree. Note that our traversal will not even touch unreachable basic
// blocks.
- DS = &getAnalysis();
+ EF = &getAnalysis();
DT = &getAnalysis();
std::set VisitedBlocks;
@@ -426,7 +426,7 @@
// Check to see if we dominate the block. If so, this block will get the
// condition turned to a constant anyway.
//
- //if (DS->dominates(RI.getEntryBlock(), BB))
+ //if (EF->dominates(RI.getEntryBlock(), BB))
// return 0;
BasicBlock *BB = TI->getParent();
@@ -540,7 +540,7 @@
// insert dead phi nodes, but it is more trouble to see if they are used than
// to just blindly insert them.
//
- if (DS->dominates(OldSucc, Dest)) {
+ if (EF->dominates(OldSucc, Dest)) {
// RegionExitBlocks - Find all of the blocks that are not dominated by
Dest,
// but have predecessors that are. Additionally, prune down the set to
only
// include blocks that are dominated by OldSucc as well.
@@ -620,7 +620,7 @@
// Since we invalidated the CFG, recalculate the dominator set so that it is
// useful for later processing!
// FIXME: This is much worse than it really should be!
- //DS->recalculate();
+ //EF->recalculate();
DEBUG(std::cerr << "After forwarding: " << *BB->getParent());
}
@@ -641,7 +641,7 @@
for (Value::use_iterator I = Orig->use_begin(), E = Orig->use_end();
I != E; ++I)
if (Instruction *User = dyn_cast(*I))
- if (DS->dominates(RegionDominator, User->getParent()))
+ if (EF->dominates(RegionDominator, User->getParent()))
InstsToChange.push_back(User);
else if (PHINode *PN = dyn_cast(User)) {
PHIsToChange.push_back(PN);
@@ -654,7 +654,7 @@
PHINode *PN = PHIsToChange[i];
for (unsigned j = 0, e = PN->getNumIncomingValues(); j != e; ++j)
if (PN->getIncomingValue(j) == Orig &&
- DS->dominates(RegionDominator, PN->getIncomingBlock(j)))
+ EF->dominates(RegionDominator, PN->getIncomingBlock(j)))
PN->setIncomingValue(j, New);
}
@@ -668,7 +668,7 @@
// values that correspond to basic blocks in the region.
for (unsigned j = 0, e = PN->getNumIncomingValues(); j != e; ++j)
if (PN->getIncomingValue(j) == Orig &&
-DS->dominates(RegionDominator, PN->getIncomingBlock(j)))
+EF->dominates(RegionDominator, PN->getIncomingBlock(j)))
PN->setIncomingValue(j, New);
} else {
@@ -678,14 +678,14 @@
static void CalcRegionExitBlocks(BasicBlock *Header, BasicBlock *BB,
std::set &Visited,
- DominatorSet &DS,
+ ETForest &EF,
std::vector &RegionExitBlocks) {
if (Visited.count(BB)) return;
Visited.insert(BB);
- if (DS.dominates(Header, BB)) { // Block in the region, recursively traverse
+ if (EF.dominates(Header, BB)) { // Block in the region, recursively traverse
for (succ_iterator I = succ_begin(BB), E = succ_end(BB); I != E; ++I)
- CalcRegionExitBlocks(Header, *I, Visited, DS, RegionExitBlocks);
+ CalcRegionExitBlocks(Header, *I, Visited, EF, RegionExitBlocks);
} else {
// Header does not dominate this block, but we have a predecessor that does
// dominate us. Add ourself to the list.
@@ -702,11 +702,11 @@
std::set Visited; // Don't infinite loop
// Recursively calculate blocks we are interested in...
- CalcRegionExitBlocks(BB, BB, Visited, *DS, RegionExitBlocks);
+ CalcRegionExitBlocks(BB, BB, Visited, *EF, RegionExitBlocks);
// Filter out blocks that are not dominated by OldSucc...
for (unsigned i = 0; i != RegionExitBlocks.size(); ) {
-if (DS->dominates(
[llvm-commits] CVS: llvm/include/llvm/TypeSymbolTable.h
Changes in directory llvm/include/llvm: TypeSymbolTable.h updated: 1.1 -> 1.2 --- Log message: Simple is good, CVS log is for history, not the silly credits block --- Diffs of the changes: (+2 -4) TypeSymbolTable.h |6 ++ 1 files changed, 2 insertions(+), 4 deletions(-) Index: llvm/include/llvm/TypeSymbolTable.h diff -u llvm/include/llvm/TypeSymbolTable.h:1.1 llvm/include/llvm/TypeSymbolTable.h:1.2 --- llvm/include/llvm/TypeSymbolTable.h:1.1 Tue Jan 10 03:51:48 2006 +++ llvm/include/llvm/TypeSymbolTable.h Tue Jan 10 23:38:15 2006 @@ -2,10 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file was developed by Reid Spencer based on the original SymbolTable -// implemented by the LLVM Research Group and re-written by Reid Spencer. -// It is distributed under the University of Illinois Open Source License. -// See LICENSE.TXT for details. +// This file was developed by Reid Spencer. It is distributed under the +// University of Illinois Open Source License. See LICENSE.TXT for details. // //===--===// // ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/TypeSymbolTable.cpp
Changes in directory llvm/lib/VMCore: TypeSymbolTable.cpp updated: 1.1 -> 1.2 --- Log message: Simple is good --- Diffs of the changes: (+2 -3) TypeSymbolTable.cpp |5 ++--- 1 files changed, 2 insertions(+), 3 deletions(-) Index: llvm/lib/VMCore/TypeSymbolTable.cpp diff -u llvm/lib/VMCore/TypeSymbolTable.cpp:1.1 llvm/lib/VMCore/TypeSymbolTable.cpp:1.2 --- llvm/lib/VMCore/TypeSymbolTable.cpp:1.1 Tue Jan 10 03:51:48 2006 +++ llvm/lib/VMCore/TypeSymbolTable.cpp Tue Jan 10 23:38:55 2006 @@ -2,9 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file was developed by the LLVM research group and revised by Reid -// Spencer. It is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file was developed by Reid Spencer. It is distributed under the +// University of Illinois Open Source License. See LICENSE.TXT for details. // //===--===// // ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/ValueSymbolTable.cpp
Changes in directory llvm/lib/VMCore: ValueSymbolTable.cpp updated: 1.1 -> 1.2 --- Log message: Simple is good. CVS is for revision control, not file headers --- Diffs of the changes: (+2 -3) ValueSymbolTable.cpp |5 ++--- 1 files changed, 2 insertions(+), 3 deletions(-) Index: llvm/lib/VMCore/ValueSymbolTable.cpp diff -u llvm/lib/VMCore/ValueSymbolTable.cpp:1.1 llvm/lib/VMCore/ValueSymbolTable.cpp:1.2 --- llvm/lib/VMCore/ValueSymbolTable.cpp:1.1Tue Jan 10 03:51:48 2006 +++ llvm/lib/VMCore/ValueSymbolTable.cppTue Jan 10 23:39:45 2006 @@ -2,9 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file was developed by the LLVM research group and revised by Reid -// Spencer. It is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// This file was developed by the LLVM research group. It is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. // //===--===// // ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp X86ISelLowering.cpp X86ISelPattern.cpp X86InstrInfo.td
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.28 -> 1.29
X86ISelLowering.cpp updated: 1.27 -> 1.28
X86ISelPattern.cpp updated: 1.192 -> 1.193
X86InstrInfo.td updated: 1.195 -> 1.196
---
Log message:
* Add special entry code main() (to set x87 to 64-bit precision).
* Allow a register node as SelectAddr() base.
* ExternalSymbol -> TargetExternalSymbol as direct function callee.
* Use X86::ESP register rather than CopyFromReg(X86::ESP) as stack ptr for
call parmater passing.
---
Diffs of the changes: (+53 -21)
X86ISelDAGToDAG.cpp | 56 +++-
X86ISelLowering.cpp |5 ++--
X86ISelPattern.cpp |9 +---
X86InstrInfo.td |4 +--
4 files changed, 53 insertions(+), 21 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.28
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.29
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.28Tue Jan 10 19:15:34 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Jan 11 00:09:51 2006
@@ -13,6 +13,7 @@
//===--===//
#include "X86.h"
+#include "X86InstrBuilder.h"
#include "X86RegisterInfo.h"
#include "X86Subtarget.h"
#include "X86ISelLowering.h"
@@ -95,6 +96,8 @@
/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
+virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF);
+
// Include the pieces autogenerated from the target description.
#include "X86GenDAGISel.inc"
@@ -208,7 +211,29 @@
}
}
-/// FIXME: copied from X86ISelPattern.cpp
+/// EmitSpecialCodeForMain - Emit any code that needs to be executed only in
+/// the main function.
+static void EmitSpecialCodeForMain(MachineBasicBlock *BB,
+ MachineFrameInfo *MFI) {
+ // Switch the FPU to 64-bit precision mode for better compatibility and
speed.
+ int CWFrameIdx = MFI->CreateStackObject(2, 2);
+ addFrameReference(BuildMI(BB, X86::FNSTCW16m, 4), CWFrameIdx);
+
+ // Set the high part to be 64-bit precision.
+ addFrameReference(BuildMI(BB, X86::MOV8mi, 5),
+CWFrameIdx, 1).addImm(2);
+
+ // Reload the modified control word now.
+ addFrameReference(BuildMI(BB, X86::FLDCW16m, 4), CWFrameIdx);
+}
+
+void X86DAGToDAGISel::EmitFunctionEntryCode(Function &Fn, MachineFunction &MF)
{
+ // If this is main, emit special code for main.
+ MachineBasicBlock *BB = MF.begin();
+ if (Fn.hasExternalLinkage() && Fn.getName() == "main")
+EmitSpecialCodeForMain(BB, MF.getFrameInfo());
+}
+
/// MatchAddress - Add the specified node to the specified addressing mode,
/// returning true if it cannot be done. This just pattern matches for the
/// addressing mode
@@ -338,22 +363,25 @@
bool X86DAGToDAGISel::SelectAddr(SDOperand N, SDOperand &Base, SDOperand
&Scale,
SDOperand &Index, SDOperand &Disp) {
X86ISelAddressMode AM;
- if (!MatchAddress(N, AM)) {
-if (AM.BaseType == X86ISelAddressMode::RegBase) {
- if (AM.Base.Reg.Val)
+ if (MatchAddress(N, AM))
+return false;
+
+ if (AM.BaseType == X86ISelAddressMode::RegBase) {
+if (AM.Base.Reg.Val) {
+ if (AM.Base.Reg.getOpcode() != ISD::Register)
AM.Base.Reg = Select(AM.Base.Reg);
- else
-AM.Base.Reg = CurDAG->getRegister(0, MVT::i32);
+} else {
+ AM.Base.Reg = CurDAG->getRegister(0, MVT::i32);
}
-if (AM.IndexReg.Val)
- AM.IndexReg = Select(AM.IndexReg);
-else
- AM.IndexReg = CurDAG->getRegister(0, MVT::i32);
-
-getAddressOperands(AM, Base, Scale, Index, Disp);
-return true;
}
- return false;
+
+ if (AM.IndexReg.Val)
+AM.IndexReg = Select(AM.IndexReg);
+ else
+AM.IndexReg = CurDAG->getRegister(0, MVT::i32);
+
+ getAddressOperands(AM, Base, Scale, Index, Disp);
+ return true;
}
bool X86DAGToDAGISel::TryFoldLoad(SDOperand N, SDOperand &Base,
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.27
llvm/lib/Target/X86/X86ISelLowering.cpp:1.28
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.27Tue Jan 10 18:33:36 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Wed Jan 11 00:09:51 2006
@@ -220,6 +220,8 @@
// turn it into a TargetGlobalAddress node so that legalize doesn't hack it.
if (GlobalAddressSDNode *G = dyn_cast(Callee))
Callee = DAG.getTargetGlobalAddress(G->getGlobal(), getPointerTy());
+ else if (ExternalSymbolSDNode *S = dyn_cast(Callee))
+Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy());
if (CallingConv == CallingConv::Fast && EnableFastCC)
return LowerFastCCCallTo(Chain, RetTy, isTailCall, Callee, Args, DAG);
@@ -412,8 +414,7 @@
// Arguments go on the stack in reverse order, as specified by the ABI.
unsigned ArgOffset = 0;
-
[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
Changes in directory llvm/lib/Target/SparcV8: SparcV8InstrInfo.td updated: 1.98 -> 1.99 --- Log message: Write this pattern in canonical form, allowing more patterns to match. This implements Regression/CodeGen/SparcV8/xnor.ll --- Diffs of the changes: (+1 -1) SparcV8InstrInfo.td |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.98 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.99 --- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.98Mon Jan 9 12:28:21 2006 +++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td Wed Jan 11 01:14:01 2006 @@ -335,7 +335,7 @@ def XNORrr : F3_1<2, 0b000111, (ops IntRegs:$dst, IntRegs:$b, IntRegs:$c), "xnor $b, $c, $dst", - [(set IntRegs:$dst, (xor IntRegs:$b, (not IntRegs:$c)))]>; + [(set IntRegs:$dst, (not (xor IntRegs:$b, IntRegs:$c)))]>; def XNORri : F3_2<2, 0b000111, (ops IntRegs:$dst, IntRegs:$b, i32imm:$c), "xnor $b, $c, $dst", []>; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
Changes in directory llvm/lib/Target/SparcV8: SparcV8InstrInfo.td updated: 1.99 -> 1.100 --- Log message: Unbreak ret void :-/ --- Diffs of the changes: (+1 -0) SparcV8InstrInfo.td |1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.99 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.100 --- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.99Wed Jan 11 01:14:01 2006 +++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td Wed Jan 11 01:15:43 2006 @@ -730,6 +730,7 @@ def : Pat<(call externalsym:$dst), (CALL externalsym:$dst)>; +def : Pat<(ret), (RETL)>; // Map integer extload's to zextloads. def : Pat<(i32 (extload ADDRrr:$src, i1)), (LDUBrr ADDRrr:$src)>; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/Regression/CodeGen/SparcV8/xnor.ll
Changes in directory llvm/test/Regression/CodeGen/SparcV8:
xnor.ll added (r1.1)
---
Log message:
catch all forms of xnor
---
Diffs of the changes: (+14 -0)
xnor.ll | 14 ++
1 files changed, 14 insertions(+)
Index: llvm/test/Regression/CodeGen/SparcV8/xnor.ll
diff -c /dev/null llvm/test/Regression/CodeGen/SparcV8/xnor.ll:1.1
*** /dev/null Wed Jan 11 01:13:32 2006
--- llvm/test/Regression/CodeGen/SparcV8/xnor.llWed Jan 11 01:13:22 2006
***
*** 0
--- 1,14
+ ; RUN: llvm-as < %s | llc -march=sparcv8 -disable-v8-dag-isel=false &&
+ ; RUN: llvm-as < %s | llc -march=sparcv8 -disable-v8-dag-isel=false | grep
xnor | wc -l | grep 2
+
+ int %test1(int %X, int %Y) {
+ %A = xor int %X, %Y
+ %B = xor int %A, -1
+ ret int %B
+ }
+
+ int %test2(int %X, int %Y) {
+ %A = xor int %X, -1
+ %B = xor int %A, %Y
+ ret int %B
+ }
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[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp SparcV8InstrInfo.td
Changes in directory llvm/lib/Target/SparcV8:
SparcV8ISelDAGToDAG.cpp updated: 1.42 -> 1.43
SparcV8InstrInfo.td updated: 1.100 -> 1.101
---
Log message:
Use Evan's outflag stuff to implement V8cmpicc. This allows us to write a
pattern for SUBCCrr, and makes it trivial to add support for SUBCCri,
eliminating
an instruction in the common "setcc X, imm" case.
---
Diffs of the changes: (+27 -16)
SparcV8ISelDAGToDAG.cpp | 32 +---
SparcV8InstrInfo.td | 11 ++-
2 files changed, 27 insertions(+), 16 deletions(-)
Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.42
llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.43
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.42Wed Jan 11
01:27:40 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Wed Jan 11 01:49:38 2006
@@ -635,10 +635,22 @@
// Get the condition flag.
if (LHS.getValueType() == MVT::i32) {
- SDOperand Cond = DAG.getNode(V8ISD::CMPICC, MVT::Flag, LHS, RHS);
+ std::vector VTs;
+ VTs.push_back(MVT::i32);
+ VTs.push_back(MVT::Flag);
+ std::vector Ops;
+ Ops.push_back(LHS);
+ Ops.push_back(RHS);
+ SDOperand Cond = DAG.getNode(V8ISD::CMPICC, VTs, Ops);
return DAG.getNode(V8ISD::BRICC, MVT::Other, Chain, Dest, CC, Cond);
} else {
- SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, MVT::Flag, LHS, RHS);
+ std::vector VTs;
+ VTs.push_back(MVT::i32);
+ VTs.push_back(MVT::Flag);
+ std::vector Ops;
+ Ops.push_back(LHS);
+ Ops.push_back(RHS);
+ SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, VTs, Ops);
return DAG.getNode(V8ISD::BRFCC, MVT::Other, Chain, Dest, CC, Cond);
}
}
@@ -651,7 +663,13 @@
unsigned Opc;
Opc = LHS.getValueType() == MVT::i32 ? V8ISD::CMPICC : V8ISD::CMPFCC;
-SDOperand CompareFlag = DAG.getNode(Opc, MVT::Flag, LHS, RHS);
+std::vector VTs;
+VTs.push_back(LHS.getValueType());
+VTs.push_back(MVT::Flag);
+std::vector Ops;
+Ops.push_back(LHS);
+Ops.push_back(RHS);
+SDOperand CompareFlag = DAG.getNode(Opc, VTs, Ops).getValue(1);
Opc = LHS.getValueType() == MVT::i32 ?
V8ISD::SELECT_ICC : V8ISD::SELECT_FCC;
@@ -883,14 +901,6 @@
CurDAG->getTargetFrameIndex(FI, MVT::i32),
CurDAG->getTargetConstant(0, MVT::i32));
}
- case V8ISD::CMPICC: {
-// FIXME: Handle compare with immediate.
-SDOperand LHS = Select(N->getOperand(0));
-SDOperand RHS = Select(N->getOperand(1));
-SDOperand Result = CurDAG->getTargetNode(V8::SUBCCrr, MVT::i32, MVT::Flag,
- LHS, RHS);
-return CodeGenMap[Op] = Result.getValue(1);
- }
case ISD::ADD_PARTS: {
SDOperand LHSL = Select(N->getOperand(0));
SDOperand LHSH = Select(N->getOperand(1));
Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.100
llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.101
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.100 Wed Jan 11 01:15:43 2006
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td Wed Jan 11 01:49:38 2006
@@ -59,8 +59,6 @@
def brtarget : Operand;
def calltarget : Operand;
-def SDTV8cmpicc :
-SDTypeProfile<1, 2, [SDTCisVT<0, FlagVT>, SDTCisInt<1>, SDTCisSameAs<1, 2>]>;
def SDTV8cmpfcc :
SDTypeProfile<1, 2, [SDTCisVT<0, FlagVT>, SDTCisFP<1>, SDTCisSameAs<1, 2>]>;
def SDTV8brcc :
@@ -74,7 +72,8 @@
def SDTV8ITOF :
SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVT<1, f32>]>;
-def V8cmpicc : SDNode<"V8ISD::CMPICC", SDTV8cmpicc>;
+def V8cmpicc : SDNode<"V8ISD::CMPICC", SDTIntBinOp,
+ [SDNPCommutative, SDNPOutFlag]>;
def V8cmpfcc : SDNode<"V8ISD::CMPFCC", SDTV8cmpfcc>;
def V8bricc : SDNode<"V8ISD::BRICC", SDTV8brcc, [SDNPHasChain]>;
def V8brfcc : SDNode<"V8ISD::BRFCC", SDTV8brcc, [SDNPHasChain]>;
@@ -405,10 +404,12 @@
"subx $b, $c, $dst", []>;
def SUBCCrr : F3_1<2, 0b010100,
(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
- "subcc $b, $c, $dst", []>;
+ "subcc $b, $c, $dst",
+ [(set IntRegs:$dst, (V8cmpicc IntRegs:$b, IntRegs:$c))]>;
def SUBCCri : F3_2<2, 0b010100,
(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
- "subcc $b, $c, $dst", []>;
+ "subcc $b, $c, $dst",
+ [(set IntRegs:$dst, (V8cmpicc IntRegs:$b, simm13:$c))]>;
def SUBXCCrr: F3_1<2, 0b011100,
(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
"subxcc $b, $c, $dst", []>;
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[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/SparcV8:
SparcV8ISelDAGToDAG.cpp updated: 1.41 -> 1.42
---
Log message:
Fix a bug in i32->f64 conversion lowering
---
Diffs of the changes: (+2 -2)
SparcV8ISelDAGToDAG.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.41
llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.42
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.41Fri Jan 6
11:56:17 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Wed Jan 11 01:27:40 2006
@@ -622,9 +622,9 @@
return DAG.getNode(ISD::BIT_CONVERT, MVT::i32, Op);
case ISD::SINT_TO_FP: {
assert(Op.getOperand(0).getValueType() == MVT::i32);
-Op = DAG.getNode(ISD::BIT_CONVERT, MVT::f32, Op.getOperand(0));
+SDOperand Tmp = DAG.getNode(ISD::BIT_CONVERT, MVT::f32, Op.getOperand(0));
// Convert the int value to FP in an FP register.
-return DAG.getNode(V8ISD::ITOF, Op.getValueType(), Op);
+return DAG.getNode(V8ISD::ITOF, Op.getValueType(), Tmp);
}
case ISD::BR_CC: {
SDOperand Chain = Op.getOperand(0);
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