[llvm-commits] CVS: llvm/tools/gccld/gccld.cpp
Changes in directory llvm/tools/gccld:
gccld.cpp updated: 1.103 -> 1.104
---
Log message:
Allow users to specify -Wl,-native* multiple times if they please
---
Diffs of the changes: (+2 -2)
gccld.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/tools/gccld/gccld.cpp
diff -u llvm/tools/gccld/gccld.cpp:1.103 llvm/tools/gccld/gccld.cpp:1.104
--- llvm/tools/gccld/gccld.cpp:1.103Tue Aug 2 17:07:38 2005
+++ llvm/tools/gccld/gccld.cpp Thu Nov 17 10:08:04 2005
@@ -78,10 +78,10 @@
cl::aliasopt(LinkAsLibrary));
cl::opt
- Native("native",
+ Native("native", cl::ZeroOrMore,
cl::desc("Generate a native binary instead of a shell script"));
cl::opt
- NativeCBE("native-cbe",
+ NativeCBE("native-cbe", cl::ZeroOrMore,
cl::desc("Generate a native binary with the C backend and GCC"));
cl::opt
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[llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.75 -> 1.76
---
Log message:
Validate that the input to 'Pat' patterns is sane.
---
Diffs of the changes: (+8 -0)
DAGISelEmitter.cpp |8
1 files changed, 8 insertions(+)
Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.75
llvm/utils/TableGen/DAGISelEmitter.cpp:1.76
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.75 Thu Nov 17 01:39:45 2005
+++ llvm/utils/TableGen/DAGISelEmitter.cpp Thu Nov 17 11:43:52 2005
@@ -1212,6 +1212,14 @@
// never do anything with this pattern: report it to the user.
if (!Pattern->InferAllTypes())
Pattern->error("Could not infer all types in pattern!");
+
+// Validate that the input pattern is correct.
+{
+ std::map InstInputs;
+ std::map InstResults;
+ FindPatternInputsAndOutputs(Pattern, Pattern->getOnlyTree(),
+ InstInputs, InstResults);
+}
ListInit *LI = Patterns[i]->getValueAsListInit("ResultInstrs");
if (LI->getSize() == 0) continue; // no pattern.
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.41 -> 1.42
---
Log message:
Use the right accessor to create this node
---
Diffs of the changes: (+1 -1)
PPCISelLowering.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.41
llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.42
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.41Thu Nov 17 01:30:41 2005
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Thu Nov 17 11:51:38 2005
@@ -343,7 +343,7 @@
if (PICEnabled) {
// With PIC, the first instruction is actually "GR+hi(&G)".
Hi = DAG.getNode(ISD::ADD, MVT::i32,
- DAG.getTargetNode(PPCISD::GlobalBaseReg, MVT::i32), Hi);
+ DAG.getNode(PPCISD::GlobalBaseReg, MVT::i32), Hi);
}
SDOperand Lo = DAG.getNode(PPCISD::Lo, MVT::i32, GA, Zero);
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrInfo.td
Changes in directory llvm/lib/Target/PowerPC: PPCInstrInfo.td updated: 1.141 -> 1.142 --- Log message: Generate LA and ADDIS when possible. --- Diffs of the changes: (+6 -4) PPCInstrInfo.td | 10 ++ 1 files changed, 6 insertions(+), 4 deletions(-) Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.141 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.142 --- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.141 Thu Nov 17 01:30:41 2005 +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td Thu Nov 17 11:52:01 2005 @@ -256,7 +256,8 @@ [(set GPRC:$rD, (add GPRC:$rA, imm16Shifted:$imm))]>; def LA : DForm_2<14, (ops GPRC:$rD, GPRC:$rA, symbolLo:$sym), "la $rD, $sym($rA)", IntGeneral, - []>; + [(set GPRC:$rD, (add GPRC:$rA, + (PPClo tglobaladdr:$sym, 0)))]>; def MULLI : DForm_2< 7, (ops GPRC:$rD, GPRC:$rA, s16imm:$imm), "mulli $rD, $rA, $imm", IntMulLI, [(set GPRC:$rD, (mul GPRC:$rA, immSExt16:$imm))]>; @@ -786,9 +787,10 @@ (RLDICL G8RC:$in, (SRL64 imm:$imm), imm:$imm)>; // Hi and Lo for Darwin Global Addresses. -def : Pat<(PPChi tglobaladdr:$in, (i32 0)), (LIS node:$in)>; -def : Pat<(PPClo tglobaladdr:$in, (i32 0)), (LI node:$in)>; - +def : Pat<(PPChi tglobaladdr:$in, (i32 0)), (LIS tglobaladdr:$in)>; +def : Pat<(PPClo tglobaladdr:$in, (i32 0)), (LI tglobaladdr:$in)>; +def : Pat<(add GPRC:$in, (PPChi tglobaladdr:$g, 0)), + (ADDIS GPRC:$in, tglobaladdr:$g)>; // Same as above, but using a temporary. FIXME: implement temporaries :) /* ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.128 -> 1.129
---
Log message:
Teach the selector to fold lo(g) into load instruction immediate fields
---
Diffs of the changes: (+8 -0)
PPCISelDAGToDAG.cpp |8
1 files changed, 8 insertions(+)
Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.128
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.129
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.128 Thu Nov 17 01:30:41 2005
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Thu Nov 17 12:02:16 2005
@@ -413,6 +413,14 @@
Op2 = Select(Addr.getOperand(0));
}
return false;
+} else if (Addr.getOperand(1).getOpcode() == PPCISD::Lo) {
+ // Match LOAD (ADD (X, Lo(G))).
+
assert(!cast(Addr.getOperand(1).getOperand(1))->getValue()
+ && "Cannot handle constant offsets yet!");
+ Op1 = Addr.getOperand(1).getOperand(0); // The global address.
+ assert(Op1.getOpcode() == ISD::TargetGlobalAddress);
+ Op2 = Select(Addr.getOperand(0));
+ return false; // [&g+r]
} else {
Op1 = Select(Addr.getOperand(0));
Op2 = Select(Addr.getOperand(1));
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp PPCISelLowering.cpp README.txt
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.129 -> 1.130
PPCISelLowering.cpp updated: 1.42 -> 1.43
README.txt updated: 1.38 -> 1.39
---
Log message:
Enable global address legalization, fixing a todo and allowing the removal
of some code. This exposes the implicit load from the stubs to the DAG,
allowing
them to be optimized by the dag combiner. It also moves darwin specific stuff
out of the isel into the legalizer, and allows more to be moved to the .td file.
---
Diffs of the changes: (+2 -49)
PPCISelDAGToDAG.cpp | 31 +--
PPCISelLowering.cpp |2 +-
README.txt | 18 --
3 files changed, 2 insertions(+), 49 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.129
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.130
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.129 Thu Nov 17 12:02:16 2005
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Thu Nov 17 12:26:56 2005
@@ -428,20 +428,7 @@
}
}
- // Now check if we're dealing with a global, and whether or not we should
emit
- // an optimized load or store for statics.
- if (GlobalAddressSDNode *GN = dyn_cast(Addr)) {
-GlobalValue *GV = GN->getGlobal();
-if (!GV->hasWeakLinkage() && !GV->isExternal()) {
- Op1 = CurDAG->getTargetGlobalAddress(GV, MVT::i32);
- if (PICEnabled)
-Op2 = CurDAG->getTargetNode(PPC::ADDIS, MVT::i32, getGlobalBaseReg(),
-Op1);
- else
-Op2 = CurDAG->getTargetNode(PPC::LIS, MVT::i32, Op1);
- return false;
-}
- } else if (FrameIndexSDNode *FI = dyn_cast(Addr)) {
+ if (FrameIndexSDNode *FI = dyn_cast(Addr)) {
Op1 = getI32Imm(0);
Op2 = CurDAG->getTargetFrameIndex(FI->getIndex(), MVT::i32);
return false;
@@ -907,22 +894,6 @@
}
return CurDAG->getTargetNode(PPC::LA, MVT::i32, Tmp, CPI);
}
-#if 1
- case ISD::GlobalAddress: {
-GlobalValue *GV = cast(N)->getGlobal();
-SDOperand Tmp;
-SDOperand GA = CurDAG->getTargetGlobalAddress(GV, MVT::i32);
-if (PICEnabled)
- Tmp = CurDAG->getTargetNode(PPC::ADDIS, MVT::i32, getGlobalBaseReg(),
GA);
-else
- Tmp = CurDAG->getTargetNode(PPC::LIS, MVT::i32, GA);
-
-if (GV->hasWeakLinkage() || GV->isExternal())
- return CurDAG->getTargetNode(PPC::LWZ, MVT::i32, GA, Tmp);
-else
- return CurDAG->getTargetNode(PPC::LA, MVT::i32, Tmp, GA);
- }
-#endif
case ISD::FADD: {
MVT::ValueType Ty = N->getValueType(0);
if (!NoExcessFPPrecision) { // Match FMA ops
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.42
llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.43
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.42Thu Nov 17 11:51:38 2005
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Thu Nov 17 12:26:56 2005
@@ -93,7 +93,7 @@
// We want to legalize GlobalAddress into the appropriate instructions to
// materialize the address.
- //setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
+ setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
if (TM.getSubtarget().is64Bit()) {
// They also have instructions for converting between i64 and fp.
Index: llvm/lib/Target/PowerPC/README.txt
diff -u llvm/lib/Target/PowerPC/README.txt:1.38
llvm/lib/Target/PowerPC/README.txt:1.39
--- llvm/lib/Target/PowerPC/README.txt:1.38 Sat Nov 5 02:57:56 2005
+++ llvm/lib/Target/PowerPC/README.txt Thu Nov 17 12:26:56 2005
@@ -31,24 +31,6 @@
* Support 'update' load/store instructions. These are cracked on the G5, but
are still a codesize win.
-* Add a custom legalizer for the GlobalAddress node, to move the funky darwin
- stub stuff from the instruction selector to the legalizer (exposing low-level
- operations to the dag for optzn. For example, we want to codegen this:
-
-int A = 0;
-void B() { A++; }
- as:
-lis r9,ha16(_A)
-lwz r2,lo16(_A)(r9)
-addi r2,r2,1
-stw r2,lo16(_A)(r9)
- not:
-lis r2, ha16(_A)
-lwz r2, lo16(_A)(r2)
-addi r2, r2, 1
-lis r3, ha16(_A)
-stw r2, lo16(_A)(r3)
-
* should hint to the branch select pass that it doesn't need to print the
second unconditional branch, so we don't end up with things like:
b .LBBl42__2E_expand_function_8_674 ; loopentry.24
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.43 -> 1.44
---
Log message:
Fix a bug that resistor on IRC hit where we tried to create token factor
nodes of load results, not of their chain results.
---
Diffs of the changes: (+2 -2)
PPCISelLowering.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.43
llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.44
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.43Thu Nov 17 12:26:56 2005
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Thu Nov 17 12:30:17 2005
@@ -670,7 +670,7 @@
if (GPR_remaining > 0) {
SDOperand Load = DAG.getLoad(MVT::i32, Store, PtrOff,
DAG.getSrcValue(NULL));
- MemOps.push_back(Load);
+ MemOps.push_back(Load.getValue(1));
args_to_use.push_back(Load);
--GPR_remaining;
}
@@ -679,7 +679,7 @@
PtrOff = DAG.getNode(ISD::ADD, MVT::i32, PtrOff, ConstFour);
SDOperand Load = DAG.getLoad(MVT::i32, Store, PtrOff,
DAG.getSrcValue(NULL));
- MemOps.push_back(Load);
+ MemOps.push_back(Load.getValue(1));
args_to_use.push_back(Load);
--GPR_remaining;
}
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC.h PPCISelLowering.cpp PPCSubtarget.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPC.h updated: 1.23 -> 1.24
PPCISelLowering.cpp updated: 1.44 -> 1.45
PPCSubtarget.cpp updated: 1.15 -> 1.16
---
Log message:
add an option to generate completely non-pic code, corresponding to what
gcc -static produces on PPC. This is used for building kexts and other things.
With this, materializing the address of a global looks like:
lis r2, ha16(L_H$non_lazy_ptr)
la r3, lo16(L_H$non_lazy_ptr)(r2)
we're still emitting stubs for functions, which is wrong. That is next.
---
Diffs of the changes: (+17 -2)
PPC.h |1 +
PPCISelLowering.cpp | 12 ++--
PPCSubtarget.cpp|6 ++
3 files changed, 17 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/PowerPC/PPC.h
diff -u llvm/lib/Target/PowerPC/PPC.h:1.23 llvm/lib/Target/PowerPC/PPC.h:1.24
--- llvm/lib/Target/PowerPC/PPC.h:1.23 Mon Oct 17 19:28:58 2005
+++ llvm/lib/Target/PowerPC/PPC.h Thu Nov 17 12:55:48 2005
@@ -33,6 +33,7 @@
FunctionPass *createAIXAsmPrinter(std::ostream &OS, TargetMachine &TM);
extern bool PICEnabled;
+extern bool PPCGenerateStaticCode;
extern PPCTargetEnum PPCTarget;
} // end namespace llvm;
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.44
llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.45
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.44Thu Nov 17 12:30:17 2005
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Thu Nov 17 12:55:48 2005
@@ -333,12 +333,20 @@
return DAG.getNode(ISD::BUILD_PAIR, MVT::i64, OutLo, OutHi);
}
case ISD::GlobalAddress: {
-// Only lower GlobalAddress on Darwin.
-if (!getTargetMachine().getSubtarget().isDarwin()) break;
GlobalValue *GV = cast(Op)->getGlobal();
SDOperand GA = DAG.getTargetGlobalAddress(GV, MVT::i32);
SDOperand Zero = DAG.getConstant(0, MVT::i32);
+
+if (PPCGenerateStaticCode) {
+ // Generate non-pic code that has direct accesses to globals. To do this
+ // the address of the global is just (hi(&g)+lo(&g)).
+ SDOperand Hi = DAG.getNode(PPCISD::Hi, MVT::i32, GA, Zero);
+ SDOperand Lo = DAG.getNode(PPCISD::Lo, MVT::i32, GA, Zero);
+ return DAG.getNode(ISD::ADD, MVT::i32, Hi, Lo);
+}
+// Only lower GlobalAddress on Darwin.
+if (!getTargetMachine().getSubtarget().isDarwin()) break;
SDOperand Hi = DAG.getNode(PPCISD::Hi, MVT::i32, GA, Zero);
if (PICEnabled) {
// With PIC, the first instruction is actually "GR+hi(&G)".
Index: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
diff -u llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.15
llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.16
--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp:1.15 Tue Nov 1 14:07:00 2005
+++ llvm/lib/Target/PowerPC/PPCSubtarget.cppThu Nov 17 12:55:48 2005
@@ -19,6 +19,7 @@
using namespace llvm;
PPCTargetEnum llvm::PPCTarget = TargetDefault;
+bool llvm::PPCGenerateStaticCode = false;
namespace llvm {
cl::opt
@@ -29,6 +30,11 @@
" Enable Darwin codegen"),
clEnumValEnd),
cl::location(PPCTarget), cl::init(TargetDefault));
+
+ cl::opt
+ PPCStaticCode("ppc-static",
+cl::desc("PowerPC: generate completely non-pic code"),
+cl::location(PPCGenerateStaticCode));
}
#if defined(__APPLE__)
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp PPCInstrInfo.td
Changes in directory llvm/lib/Target/PowerPC:
PPCAsmPrinter.cpp updated: 1.110 -> 1.111
PPCInstrInfo.td updated: 1.142 -> 1.143
---
Log message:
disentangle call operands from branch operands a bit
---
Diffs of the changes: (+9 -3)
PPCAsmPrinter.cpp |7 +--
PPCInstrInfo.td |5 -
2 files changed, 9 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.110
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.111
--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.110 Tue Nov 15 18:48:01 2005
+++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Thu Nov 17 13:16:08 2005
@@ -148,10 +148,13 @@
if (MI->getOperand(OpNo).isImmediate()) {
O << "$+" << MI->getOperand(OpNo).getImmedValue();
} else {
-printOp(MI->getOperand(OpNo),
-TM.getInstrInfo()->isCall(MI->getOpcode()));
+printOp(MI->getOperand(OpNo));
}
}
+void printCallOperand(const MachineInstr *MI, unsigned OpNo,
+ MVT::ValueType VT) {
+ printOp(MI->getOperand(OpNo), true);
+}
void printAbsAddrOperand(const MachineInstr *MI, unsigned OpNo,
MVT::ValueType VT) {
O << (int)MI->getOperand(OpNo).getImmedValue()*4;
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.142
llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.143
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.142 Thu Nov 17 11:52:01 2005
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td Thu Nov 17 13:16:08 2005
@@ -131,6 +131,9 @@
def target : Operand {
let PrintMethod = "printBranchOperand";
}
+def calltarget : Operand {
+ let PrintMethod = "printCallOperand";
+}
def aaddr : Operand {
let PrintMethod = "printAbsAddrOperand";
}
@@ -220,7 +223,7 @@
LR,CTR,
CR0,CR1,CR5,CR6,CR7] in {
// Convenient aliases for call instructions
- def BL : IForm<18, 0, 1, (ops target:$func, variable_ops), "bl $func", BrB>;
+ def BL : IForm<18, 0, 1, (ops calltarget:$func, variable_ops), "bl $func",
BrB>;
def BLA : IForm<18, 1, 1, (ops aaddr:$func, variable_ops), "bla $func", BrB>;
def BCTRL : XLForm_2_ext<19, 528, 20, 0, 1, (ops variable_ops), "bctrl",
BrB>;
}
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCAsmPrinter.cpp updated: 1.111 -> 1.112
---
Log message:
refactor call operand handling to eliminate special cases from printOp.
---
Diffs of the changes: (+17 -19)
PPCAsmPrinter.cpp | 36 +---
1 files changed, 17 insertions(+), 19 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.111
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.112
--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.111 Thu Nov 17 13:16:08 2005
+++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Thu Nov 17 13:25:59 2005
@@ -103,7 +103,7 @@
bool printInstruction(const MachineInstr *MI);
void printMachineInstruction(const MachineInstr *MI);
-void printOp(const MachineOperand &MO, bool IsCallOp = false);
+void printOp(const MachineOperand &MO);
void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType
VT){
const MachineOperand &MO = MI->getOperand(OpNo);
@@ -153,7 +153,21 @@
}
void printCallOperand(const MachineInstr *MI, unsigned OpNo,
MVT::ValueType VT) {
- printOp(MI->getOperand(OpNo), true);
+ const MachineOperand &MO = MI->getOperand(OpNo);
+ if (MO.getType() == MachineOperand::MO_ExternalSymbol) {
+std::string Name(GlobalPrefix); Name += MO.getSymbolName();
+FnStubs.insert(Name);
+O << "L" << Name << "$stub";
+ } else if (MO.getType() == MachineOperand::MO_GlobalAddress &&
+ isa(MO.getGlobal()) &&
+ cast(MO.getGlobal())->isExternal()) {
+// Dynamically-resolved functions need a stub for the function.
+std::string Name = Mang->getValueName(MO.getGlobal());
+FnStubs.insert(Name);
+O << "L" << Name << "$stub";
+ } else {
+printOp(MI->getOperand(OpNo));
+ }
}
void printAbsAddrOperand(const MachineInstr *MI, unsigned OpNo,
MVT::ValueType VT) {
@@ -273,7 +287,7 @@
// Include the auto-generated portion of the assembly writer
#include "PPCGenAsmWriter.inc"
-void PPCAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
+void PPCAsmPrinter::printOp(const MachineOperand &MO) {
const MRegisterInfo &RI = *TM.getRegisterInfo();
int new_symbol;
@@ -312,12 +326,6 @@
return;
case MachineOperand::MO_ExternalSymbol:
-if (IsCallOp) {
- std::string Name(GlobalPrefix); Name += MO.getSymbolName();
- FnStubs.insert(Name);
- O << "L" << Name << "$stub";
- return;
-}
O << GlobalPrefix << MO.getSymbolName();
return;
@@ -325,16 +333,6 @@
GlobalValue *GV = MO.getGlobal();
std::string Name = Mang->getValueName(GV);
-// Dynamically-resolved functions need a stub for the function. Be
-// wary however not to output $stub for external functions whose addresses
-// are taken. Those should be emitted as $non_lazy_ptr below.
-Function *F = dyn_cast(GV);
-if (F && IsCallOp && F->isExternal()) {
- FnStubs.insert(Name);
- O << "L" << Name << "$stub";
- return;
-}
-
// External or weakly linked global variables need non-lazily-resolved
stubs
if ((GV->isExternal() || GV->hasWeakLinkage() ||
GV->hasLinkOnceLinkage())){
if (GV->hasLinkOnceLinkage())
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
Changes in directory llvm/lib/Transforms/Scalar:
IndVarSimplify.cpp updated: 1.80 -> 1.81
---
Log message:
This was checking the wrong GEP expression. Fixing this fixes a gccas crash
compiling mysql reported by Ted Kremenek.
---
Diffs of the changes: (+1 -1)
IndVarSimplify.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
diff -u llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.80
llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.81
--- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.80 Tue Aug 9 20:12:06 2005
+++ llvm/lib/Transforms/Scalar/IndVarSimplify.cpp Thu Nov 17 13:35:42 2005
@@ -162,7 +162,7 @@
if (CE->getOperand(NumOps-1)->isNullValue()) {
// Check to make sure the last index really is an array index.
gep_type_iterator GTI = gep_type_begin(GEPI);
-for (unsigned i = 1, e = GEPI->getNumOperands()-1;
+for (unsigned i = 1, e = CE->getNumOperands()-1;
i != e; ++i, ++GTI)
/*empty*/;
if (isa(*GTI)) {
___
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCAsmPrinter.cpp updated: 1.112 -> 1.113
---
Log message:
only use dyld stubs if not in ppc-static mode. This completes support for
non-static codegen.
---
Diffs of the changes: (+21 -15)
PPCAsmPrinter.cpp | 36 +---
1 files changed, 21 insertions(+), 15 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.112
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.113
--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.112 Thu Nov 17 13:25:59 2005
+++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Thu Nov 17 13:40:30 2005
@@ -154,20 +154,24 @@
void printCallOperand(const MachineInstr *MI, unsigned OpNo,
MVT::ValueType VT) {
const MachineOperand &MO = MI->getOperand(OpNo);
- if (MO.getType() == MachineOperand::MO_ExternalSymbol) {
-std::string Name(GlobalPrefix); Name += MO.getSymbolName();
-FnStubs.insert(Name);
-O << "L" << Name << "$stub";
- } else if (MO.getType() == MachineOperand::MO_GlobalAddress &&
- isa(MO.getGlobal()) &&
- cast(MO.getGlobal())->isExternal()) {
-// Dynamically-resolved functions need a stub for the function.
-std::string Name = Mang->getValueName(MO.getGlobal());
-FnStubs.insert(Name);
-O << "L" << Name << "$stub";
- } else {
-printOp(MI->getOperand(OpNo));
+ if (!PPCGenerateStaticCode) {
+if (MO.getType() == MachineOperand::MO_ExternalSymbol) {
+ std::string Name(GlobalPrefix); Name += MO.getSymbolName();
+ FnStubs.insert(Name);
+ O << "L" << Name << "$stub";
+ return;
+} else if (MO.getType() == MachineOperand::MO_GlobalAddress &&
+ isa(MO.getGlobal()) &&
+ cast(MO.getGlobal())->isExternal()) {
+ // Dynamically-resolved functions need a stub for the function.
+ std::string Name = Mang->getValueName(MO.getGlobal());
+ FnStubs.insert(Name);
+ O << "L" << Name << "$stub";
+ return;
+}
}
+
+ printOp(MI->getOperand(OpNo));
}
void printAbsAddrOperand(const MachineInstr *MI, unsigned OpNo,
MVT::ValueType VT) {
@@ -334,7 +338,9 @@
std::string Name = Mang->getValueName(GV);
// External or weakly linked global variables need non-lazily-resolved
stubs
-if ((GV->isExternal() || GV->hasWeakLinkage() ||
GV->hasLinkOnceLinkage())){
+if (!PPCGenerateStaticCode &&
+((GV->isExternal() || GV->hasWeakLinkage() ||
+ GV->hasLinkOnceLinkage( {
if (GV->hasLinkOnceLinkage())
LinkOnceStubs.insert(Name);
else
@@ -343,7 +349,7 @@
return;
}
-O << Mang->getValueName(GV);
+O << Name;
return;
}
___
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[llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h
Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.27 -> 1.28 --- Log message: Teach the type lowering code about turning packed types into vector types. Next step: generating vector dag nodes, and legalizing them into scalar code. --- Diffs of the changes: (+1 -0) TargetLowering.h |1 + 1 files changed, 1 insertion(+) Index: llvm/include/llvm/Target/TargetLowering.h diff -u llvm/include/llvm/Target/TargetLowering.h:1.27 llvm/include/llvm/Target/TargetLowering.h:1.28 --- llvm/include/llvm/Target/TargetLowering.h:1.27 Thu Oct 20 19:02:42 2005 +++ llvm/include/llvm/Target/TargetLowering.h Thu Nov 17 15:44:42 2005 @@ -189,6 +189,7 @@ case Type::FloatTyID: return MVT::f32; case Type::DoubleTyID: return MVT::f64; case Type::PointerTyID: return PointerTy; +case Type::PackedTyID: return MVT::Vector; } } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/ValueTypes.h
Changes in directory llvm/include/llvm/CodeGen: ValueTypes.h updated: 1.12 -> 1.13 --- Log message: Teach the type lowering code about turning packed types into vector types. Next step: generating vector dag nodes, and legalizing them into scalar code. --- Diffs of the changes: (+9 -5) ValueTypes.h | 14 +- 1 files changed, 9 insertions(+), 5 deletions(-) Index: llvm/include/llvm/CodeGen/ValueTypes.h diff -u llvm/include/llvm/CodeGen/ValueTypes.h:1.12 llvm/include/llvm/CodeGen/ValueTypes.h:1.13 --- llvm/include/llvm/CodeGen/ValueTypes.h:1.12 Thu Aug 25 12:06:34 2005 +++ llvm/include/llvm/CodeGen/ValueTypes.h Thu Nov 17 15:44:42 2005 @@ -36,13 +36,17 @@ i64= 5, // This is a 64 bit integer value i128 = 6, // This is a 128 bit integer value -f32 = 7, // This is a 32 bit floating point value -f64 = 8, // This is a 64 bit floating point value -f80 = 9, // This is a 80 bit floating point value -f128= 10, // This is a 128 bit floating point value +f32= 7, // This is a 32 bit floating point value +f64= 8, // This is a 64 bit floating point value +f80= 9, // This is a 80 bit floating point value +f128 = 10, // This is a 128 bit floating point value Flag = 11, // This is a condition code or machine flag. -isVoid = 12, // This has no value +isVoid = 12, // This has no value + +Vector = 13, // This is an abstract vector type, which will +// be refined into a target vector type, or +// scalarized. LAST_VALUETYPE, // This always remains at the end of the list. }; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/pubs/2005-11-SAFECodeTR.html 2005-11-SAFECodeTR.pdf 2003-04-29-DataStructureAnalysisTR.html
Changes in directory llvm-www/pubs: 2005-11-SAFECodeTR.html added (r1.1) 2005-11-SAFECodeTR.pdf added (r1.1) 2003-04-29-DataStructureAnalysisTR.html updated: 1.7 -> 1.8 --- Log message: Added safecode tech report --- Diffs of the changes: (+73 -9) 2003-04-29-DataStructureAnalysisTR.html | 12 + 2005-11-SAFECodeTR.html | 70 2005-11-SAFECodeTR.pdf |0 3 files changed, 73 insertions(+), 9 deletions(-) Index: llvm-www/pubs/2005-11-SAFECodeTR.html diff -c /dev/null llvm-www/pubs/2005-11-SAFECodeTR.html:1.1 *** /dev/null Thu Nov 17 15:46:40 2005 --- llvm-www/pubs/2005-11-SAFECodeTR.html Thu Nov 17 15:46:30 2005 *** *** 0 --- 1,70 + + + + + + Enforcing Alias Analysis for Weakly Typed Languages + + + + + Enforcing Alias Analysis for Weakly Typed Languages + + + Dinakar Dhurjati, Sumant Kowshik, and Vikram Adve + + + + Abstract: + + + + Static analysis of programs in weakly typed languages such as C and C++ is + generally not sound because of possible memory errors due to dangling + pointer references, uninitialized pointers, and array bounds overflow. + Optimizing compilers can produce unpredictable results when such errors + occur, but this is quite undesirable for many tools that aim to analyze + security and reliability properties with guarantees of soundness. We + describe a relatively simple compilation strategy for standard C programs + that guarantees sound semantics for an aggressive interprocedural pointer + analysis (or simpler ones), a call graph, and type information for a + subset of memory. These provide the foundation for sophisticated static + analyses to be applied to such programs with a guarantee of soundness. Our + work builds on a previously published transformation called Automatic Pool + Allocation to ensure that hard-to-detect memory errors (dangling pointer + references and certain array bounds errors) cannot invalidate the call + graph, points-to information or type information. The key insights behind + our approach is that pool allocation can be used to create a run-time + partitioning of memory that matches the compile-time memory partitioning + in a points-to graph, and efficient checks can be used to isolate the + run-time partitions. Furthermore, we show that the sound analysis + information enables static checking techniques that reliably eliminate + many run-time checks. We formalize our approach as a new type system with + the necessary run-time checks in operational semantics and prove the + correctness of our approach for a subset of C. Our approach requires no + source code changes, allows memory to be managed explicitly, and does not + use meta-data on pointers or individual tag bits for memory. Using several + benchmarks and system codes, we show experimentally that the run-time + overheads are low (less than 10% in nearly all cases and 30% in the worst + case we have seen). We also show the effectiveness of reliable static + analyses for eliminating run-time checks. + + + + + Published: + + "Enforcing Alias Analysis for Weakly Typed Languages" + By Dinakar Dhurjati, Sumant Kowshik, and Vikram Adve. + Technical Report #UIUCDCS-R-2005-2657, Computer Science Dept., Univ. of + Illinois, Nov. 2005 + + + Download: + + Enforcing Alias Analysis for + Weakly Typed Languages (PDF) + + + + Index: llvm-www/pubs/2005-11-SAFECodeTR.pdf Index: llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html diff -u llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html:1.7 llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html:1.8 --- llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html:1.7 Sat Apr 17 15:13:02 2004 +++ llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html Thu Nov 17 15:46:30 2005 @@ -35,19 +35,13 @@ "Data Structure Analysis: An Efficient Context-Sensitive Heap Analysis", Chris Lattner & Vikram Adve - Technical Report #UIUCDCS-R-2003-2340, Computer Science Dept., Univ. of - Illinois, Apr. 2003. - - -Update: - - This document was updated on 15 November 2003 to reflect improvements to the - algorithm, and to be more clear and precise. + Technical Report #UIUCDCS-R-2005-2657, Computer Science Dept., Univ. of + Illinois, Nov. 2005. Download: - Data Structure Analysis: + Data Structure Analysis: An Efficient Context-Sensitive Heap Analysis (PS) Data Structure Analysis: An Efficient Context-Sensitive Heap Analysis (PDF) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/safecode/index.html
Changes in directory llvm-www/safecode: index.html updated: 1.10 -> 1.11 --- Log message: Added safecode tech report --- Diffs of the changes: (+4 -1) index.html |5 - 1 files changed, 4 insertions(+), 1 deletion(-) Index: llvm-www/safecode/index.html diff -u llvm-www/safecode/index.html:1.10 llvm-www/safecode/index.html:1.11 --- llvm-www/safecode/index.html:1.10 Tue May 3 18:43:30 2005 +++ llvm-www/safecode/index.htmlThu Nov 17 15:50:58 2005 @@ -39,7 +39,10 @@ Publications - "http://llvm.cs.uiuc.edu/pubs/2005-02-TECS-SAFECode.html";>Memory Safety Without + "http://llvm.cs.uiuc.edu/pubs/2005-11-SAFECodeTR.html";> Enforcing Alias Analysis for Weakly Typed Languages " + + Dinakar dhurjati, Sumant Kowshik, and Vikram Adve. UIUC TechReport + "http://llvm.cs.uiuc.edu/pubs/2005-02-TECHREPORT-SAFECode.html";>Memory Safety Without Garbage Collection for Embedded Applications" Dinakar Dhurjati, Sumant Kowshik, Vikram Adve and Chris Lattner. http://www.acm.org/tecs/";> ACM Transactions in ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/safecode/index.html
Changes in directory llvm-www/safecode: index.html updated: 1.11 -> 1.12 --- Log message: *** empty log message *** --- Diffs of the changes: (+1 -0) index.html |1 + 1 files changed, 1 insertion(+) Index: llvm-www/safecode/index.html diff -u llvm-www/safecode/index.html:1.11 llvm-www/safecode/index.html:1.12 --- llvm-www/safecode/index.html:1.11 Thu Nov 17 15:50:58 2005 +++ llvm-www/safecode/index.htmlThu Nov 17 15:53:31 2005 @@ -39,6 +39,7 @@ Publications + Tech Report of PLDI submission "http://llvm.cs.uiuc.edu/pubs/2005-11-SAFECodeTR.html";> Enforcing Alias Analysis for Weakly Typed Languages " Dinakar dhurjati, Sumant Kowshik, and Vikram Adve. UIUC TechReport ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/safecode/index.html
Changes in directory llvm-www/safecode: index.html updated: 1.12 -> 1.13 --- Log message: *** empty log message *** --- Diffs of the changes: (+2 -2) index.html |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm-www/safecode/index.html diff -u llvm-www/safecode/index.html:1.12 llvm-www/safecode/index.html:1.13 --- llvm-www/safecode/index.html:1.12 Thu Nov 17 15:53:31 2005 +++ llvm-www/safecode/index.htmlThu Nov 17 15:55:49 2005 @@ -39,8 +39,8 @@ Publications - Tech Report of PLDI submission - "http://llvm.cs.uiuc.edu/pubs/2005-11-SAFECodeTR.html";> Enforcing Alias Analysis for Weakly Typed Languages " + Tech Report of PLDI submission +"http://llvm.cs.uiuc.edu/pubs/2005-11-SAFECodeTR.html";> Enforcing Alias Analysis for Weakly Typed Languages " Dinakar dhurjati, Sumant Kowshik, and Vikram Adve. UIUC TechReport "http://llvm.cs.uiuc.edu/pubs/2005-02-TECHREPORT-SAFECode.html";>Memory Safety Without ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/safecode/index.html
Changes in directory llvm-www/safecode: index.html updated: 1.13 -> 1.14 --- Log message: *** empty log message *** --- Diffs of the changes: (+1 -1) index.html |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-www/safecode/index.html diff -u llvm-www/safecode/index.html:1.13 llvm-www/safecode/index.html:1.14 --- llvm-www/safecode/index.html:1.13 Thu Nov 17 15:55:49 2005 +++ llvm-www/safecode/index.htmlThu Nov 17 15:56:06 2005 @@ -39,7 +39,7 @@ Publications - Tech Report of PLDI submission + Tech Report of PLDI submission "http://llvm.cs.uiuc.edu/pubs/2005-11-SAFECodeTR.html";> Enforcing Alias Analysis for Weakly Typed Languages " Dinakar dhurjati, Sumant Kowshik, and Vikram Adve. UIUC TechReport ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/safecode/index.html
Changes in directory llvm-www/safecode: index.html updated: 1.14 -> 1.15 --- Log message: *** empty log message *** --- Diffs of the changes: (+1 -2) index.html |3 +-- 1 files changed, 1 insertion(+), 2 deletions(-) Index: llvm-www/safecode/index.html diff -u llvm-www/safecode/index.html:1.14 llvm-www/safecode/index.html:1.15 --- llvm-www/safecode/index.html:1.14 Thu Nov 17 15:56:06 2005 +++ llvm-www/safecode/index.htmlThu Nov 17 15:56:52 2005 @@ -39,8 +39,7 @@ Publications - Tech Report of PLDI submission -"http://llvm.cs.uiuc.edu/pubs/2005-11-SAFECodeTR.html";> Enforcing Alias Analysis for Weakly Typed Languages " + Tech Report of PLDI submission "http://llvm.cs.uiuc.edu/pubs/2005-11-SAFECodeTR.html";> Enforcing Alias Analysis for Weakly Typed Languages " Dinakar dhurjati, Sumant Kowshik, and Vikram Adve. UIUC TechReport "http://llvm.cs.uiuc.edu/pubs/2005-02-TECHREPORT-SAFECode.html";>Memory Safety Without ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/safecode/index.html
Changes in directory llvm-www/safecode: index.html updated: 1.15 -> 1.16 --- Log message: *** empty log message *** --- Diffs of the changes: (+3 -1) index.html |4 +++- 1 files changed, 3 insertions(+), 1 deletion(-) Index: llvm-www/safecode/index.html diff -u llvm-www/safecode/index.html:1.15 llvm-www/safecode/index.html:1.16 --- llvm-www/safecode/index.html:1.15 Thu Nov 17 15:56:52 2005 +++ llvm-www/safecode/index.htmlThu Nov 17 15:58:35 2005 @@ -41,7 +41,9 @@ Tech Report of PLDI submission "http://llvm.cs.uiuc.edu/pubs/2005-11-SAFECodeTR.html";> Enforcing Alias Analysis for Weakly Typed Languages " - Dinakar dhurjati, Sumant Kowshik, and Vikram Adve. UIUC TechReport + Dinakar dhurjati, Sumant Kowshik, and Vikram Adve. Technical Report + #UIUCDCS-R-2005-2657, Computer Science Dept., University of + Illinois, Nov 2005 "http://llvm.cs.uiuc.edu/pubs/2005-02-TECHREPORT-SAFECode.html";>Memory Safety Without Garbage Collection for Embedded Applications" Dinakar Dhurjati, Sumant Kowshik, Vikram Adve and Chris Lattner. http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/safecode/index.html
Changes in directory llvm-www/safecode: index.html updated: 1.16 -> 1.17 --- Log message: *** empty log message *** --- Diffs of the changes: (+6 -1) index.html |7 ++- 1 files changed, 6 insertions(+), 1 deletion(-) Index: llvm-www/safecode/index.html diff -u llvm-www/safecode/index.html:1.16 llvm-www/safecode/index.html:1.17 --- llvm-www/safecode/index.html:1.16 Thu Nov 17 15:58:35 2005 +++ llvm-www/safecode/index.htmlThu Nov 17 16:00:25 2005 @@ -20,6 +20,11 @@ enforcement of safety, using aggressive compiler techniques developed in this project. + +"http://llvm.cs.uiuc.edu/pubs/2005-11-SAFECodeTR.html";> +Enforcing Alias Analysis for Weakly Typed Languages : Technical Report +of PLDI Submission" + Project Members Faculty @@ -39,7 +44,7 @@ Publications - Tech Report of PLDI submission "http://llvm.cs.uiuc.edu/pubs/2005-11-SAFECodeTR.html";> Enforcing Alias Analysis for Weakly Typed Languages " +"http://llvm.cs.uiuc.edu/pubs/2005-11-SAFECodeTR.html";> Enforcing Alias Analysis for Weakly Typed Languages " Dinakar dhurjati, Sumant Kowshik, and Vikram Adve. Technical Report #UIUCDCS-R-2005-2657, Computer Science Dept., University of ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/safecode/index.html
Changes in directory llvm-www/safecode: index.html updated: 1.17 -> 1.18 --- Log message: *** empty log message *** --- Diffs of the changes: (+2 -2) index.html |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm-www/safecode/index.html diff -u llvm-www/safecode/index.html:1.17 llvm-www/safecode/index.html:1.18 --- llvm-www/safecode/index.html:1.17 Thu Nov 17 16:00:25 2005 +++ llvm-www/safecode/index.htmlThu Nov 17 16:01:51 2005 @@ -21,9 +21,9 @@ project. -"http://llvm.cs.uiuc.edu/pubs/2005-11-SAFECodeTR.html";> +http://llvm.cs.uiuc.edu/pubs/2005-11-SAFECodeTR.html";> Enforcing Alias Analysis for Weakly Typed Languages : Technical Report -of PLDI Submission" +of PLDI Submission Project Members ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/safecode/index.html
Changes in directory llvm-www/safecode: index.html updated: 1.18 -> 1.19 --- Log message: *** empty log message *** --- Diffs of the changes: (+2 -2) index.html |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm-www/safecode/index.html diff -u llvm-www/safecode/index.html:1.18 llvm-www/safecode/index.html:1.19 --- llvm-www/safecode/index.html:1.18 Thu Nov 17 16:01:51 2005 +++ llvm-www/safecode/index.htmlThu Nov 17 16:06:11 2005 @@ -66,9 +66,9 @@ Sumant Kowshik, Dinakar Dhurjati, Vikram Adve. CASES 2002. -Implementation +
[llvm-commits] CVS: llvm-www/safecode/index.html
Changes in directory llvm-www/safecode: index.html updated: 1.19 -> 1.20 --- Log message: *** empty log message *** --- Diffs of the changes: (+0 -4) index.html |4 1 files changed, 4 deletions(-) Index: llvm-www/safecode/index.html diff -u llvm-www/safecode/index.html:1.19 llvm-www/safecode/index.html:1.20 --- llvm-www/safecode/index.html:1.19 Thu Nov 17 16:06:11 2005 +++ llvm-www/safecode/index.htmlThu Nov 17 16:06:55 2005 @@ -66,10 +66,6 @@ Sumant Kowshik, Dinakar Dhurjati, Vikram Adve. CASES 2002. -
[llvm-commits] CVS: llvm-www/safecode/index.html
Changes in directory llvm-www/safecode: index.html updated: 1.20 -> 1.21 --- Log message: *** empty log message *** --- Diffs of the changes: (+1 -1) index.html |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-www/safecode/index.html diff -u llvm-www/safecode/index.html:1.20 llvm-www/safecode/index.html:1.21 --- llvm-www/safecode/index.html:1.20 Thu Nov 17 16:06:55 2005 +++ llvm-www/safecode/index.htmlThu Nov 17 16:07:29 2005 @@ -88,7 +88,7 @@ http://validator.w3.org/check/referer";>http://www.w3.org/Icons/valid-html401"; alt="Valid HTML 4.01!" /> - mailto:[EMAIL PROTECTED]">Dinakar Dhurjati + mailto:[EMAIL PROTECTED]">Dinakar Dhurjati ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/safecode/index.html
Changes in directory llvm-www/safecode: index.html updated: 1.21 -> 1.22 --- Log message: *** empty log message *** --- Diffs of the changes: (+3 -2) index.html |5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) Index: llvm-www/safecode/index.html diff -u llvm-www/safecode/index.html:1.21 llvm-www/safecode/index.html:1.22 --- llvm-www/safecode/index.html:1.21 Thu Nov 17 16:07:29 2005 +++ llvm-www/safecode/index.htmlThu Nov 17 16:09:16 2005 @@ -22,8 +22,9 @@ http://llvm.cs.uiuc.edu/pubs/2005-11-SAFECodeTR.html";> -Enforcing Alias Analysis for Weakly Typed Languages : Technical Report -of PLDI Submission +Accompanying Technical Report +of our PLDI Submission Enforcing Alias Analysis for Weakly Typed Languages. + Project Members ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/safecode/index.html
Changes in directory llvm-www/safecode: index.html updated: 1.22 -> 1.23 --- Log message: *** empty log message *** --- Diffs of the changes: (+3 -3) index.html |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm-www/safecode/index.html diff -u llvm-www/safecode/index.html:1.22 llvm-www/safecode/index.html:1.23 --- llvm-www/safecode/index.html:1.22 Thu Nov 17 16:09:16 2005 +++ llvm-www/safecode/index.htmlThu Nov 17 16:10:14 2005 @@ -21,10 +21,10 @@ project. -http://llvm.cs.uiuc.edu/pubs/2005-11-SAFECodeTR.html";> +http://llvm.cs.uiuc.edu/pubs/2005-11-SAFECodeTR.html";> Accompanying Technical Report -of our PLDI Submission Enforcing Alias Analysis for Weakly Typed Languages. - +of our PLDI Submission: Enforcing Alias Analysis for Weakly Typed Languages. + Project Members ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/pubs/2005-11-SAFECodeTR.pdf
Changes in directory llvm-www/pubs: 2005-11-SAFECodeTR.pdf updated: 1.1 -> 1.2 --- Log message: Updated the tech report --- Diffs of the changes: (+0 -0) 2005-11-SAFECodeTR.pdf |0 1 files changed Index: llvm-www/pubs/2005-11-SAFECodeTR.pdf ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/pubs/2005-11-SAFECodeTR.pdf
Changes in directory llvm-www/pubs: 2005-11-SAFECodeTR.pdf updated: 1.2 -> 1.3 --- Log message: Fixed some inconsistencies in safecode tech report --- Diffs of the changes: (+0 -0) 2005-11-SAFECodeTR.pdf |0 1 files changed Index: llvm-www/pubs/2005-11-SAFECodeTR.pdf ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/pubs/2005-11-SAFECodeTR.pdf
Changes in directory llvm-www/pubs: 2005-11-SAFECodeTR.pdf updated: 1.3 -> 1.4 --- Log message: --- Diffs of the changes: (+0 -0) 2005-11-SAFECodeTR.pdf |0 1 files changed Index: llvm-www/pubs/2005-11-SAFECodeTR.pdf ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/pubs/index.html
Changes in directory llvm-www/pubs: index.html updated: 1.32 -> 1.33 --- Log message: *** empty log message *** --- Diffs of the changes: (+5 -1) index.html |6 +- 1 files changed, 5 insertions(+), 1 deletion(-) Index: llvm-www/pubs/index.html diff -u llvm-www/pubs/index.html:1.32 llvm-www/pubs/index.html:1.33 --- llvm-www/pubs/index.html:1.32 Mon Oct 24 10:16:23 2005 +++ llvm-www/pubs/index.htmlThu Nov 17 18:42:34 2005 @@ -33,7 +33,11 @@ Publications using LLVM - +"Enforcing Alias Analysis for +Weakly Typed Languages" Dinakar Dhurjati, Sumant Kowshik, and Vikram +Adve Technical Report #UIUCDCS-R-2005-2657, Computer Science Dept., Univ. of +Illinois, Nov. 2005. + "Revisiting Graph Coloring Register Allocation: A Study of the Chaitin-Briggs and Callahan-Koblenz Algorithms" ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/Target.td
Changes in directory llvm/lib/Target: Target.td updated: 1.56 -> 1.57 --- Log message: Also add the new vector value type here, for completeness. --- Diffs of the changes: (+1 -0) Target.td |1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/Target.td diff -u llvm/lib/Target/Target.td:1.56 llvm/lib/Target/Target.td:1.57 --- llvm/lib/Target/Target.td:1.56 Wed Oct 26 12:28:23 2005 +++ llvm/lib/Target/Target.td Thu Nov 17 18:53:32 2005 @@ -38,6 +38,7 @@ def f128 : ValueType<128, 10>; // 128-bit floating point value def FlagVT : ValueType<0 , 11>; // Condition code or machine flag def isVoid : ValueType<0 , 12>; // Produces no value +def Vector : ValueType<0 , 13>; // Abstract vector type //===--===// // Register file description - These classes are used to fill in the target ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html
Changes in directory llvm-www/pubs: 2003-04-29-DataStructureAnalysisTR.html updated: 1.8 -> 1.9 --- Log message: undoing the previous checkin --- Diffs of the changes: (+1 -1) 2003-04-29-DataStructureAnalysisTR.html |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html diff -u llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html:1.8 llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html:1.9 --- llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html:1.8 Thu Nov 17 15:46:30 2005 +++ llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html Thu Nov 17 18:55:26 2005 @@ -35,7 +35,7 @@ "Data Structure Analysis: An Efficient Context-Sensitive Heap Analysis", Chris Lattner & Vikram Adve - Technical Report #UIUCDCS-R-2005-2657, Computer Science Dept., Univ. of + Technical Report #UIUCDCS-R-2003-2340, Computer Science Dept., Univ. of Illinois, Nov. 2005. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html
Changes in directory llvm-www/pubs: 2003-04-29-DataStructureAnalysisTR.html updated: 1.9 -> 1.10 --- Log message: This time the undo is correct. --- Diffs of the changes: (+8 -2) 2003-04-29-DataStructureAnalysisTR.html | 10 -- 1 files changed, 8 insertions(+), 2 deletions(-) Index: llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html diff -u llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html:1.9 llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html:1.10 --- llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html:1.9 Thu Nov 17 18:55:26 2005 +++ llvm-www/pubs/2003-04-29-DataStructureAnalysisTR.html Thu Nov 17 19:01:06 2005 @@ -36,12 +36,18 @@ "Data Structure Analysis: An Efficient Context-Sensitive Heap Analysis", Chris Lattner & Vikram Adve Technical Report #UIUCDCS-R-2003-2340, Computer Science Dept., Univ. of - Illinois, Nov. 2005. + Illinois, Apr. 2003. + + +Update: + +This document was updated on 15 November 2003 to reflect improvements to the +algorithm, and to be more clear and precise. Download: - Data Structure Analysis: + Data Structure Analysis: An Efficient Context-Sensitive Heap Analysis (PS) Data Structure Analysis: An Efficient Context-Sensitive Heap Analysis (PDF) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.td
Changes in directory llvm/lib/Target/X86:
X86InstrInfo.td updated: 1.137 -> 1.138
---
Log message:
add more patterns, patch by Evan Cheng.
---
Diffs of the changes: (+156 -108)
X86InstrInfo.td | 264 +---
1 files changed, 156 insertions(+), 108 deletions(-)
Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.137
llvm/lib/Target/X86/X86InstrInfo.td:1.138
--- llvm/lib/Target/X86/X86InstrInfo.td:1.137 Wed Nov 16 20:01:55 2005
+++ llvm/lib/Target/X86/X86InstrInfo.td Thu Nov 17 19:04:42 2005
@@ -32,6 +32,12 @@
def f64mem : X86MemOperand;
def f80mem : X86MemOperand;
+// A couple of more descriptive operand definitions.
+// 16-bits but only 8 bits are significant.
+def i16i8imm : Operand;
+// 32-bits but only 8 bits are significant.
+def i32i8imm : Operand;
+
// PCRelative calls need special operand formatting.
let PrintMethod = "printCallOperand" in
def calltarget : Operand;
@@ -127,12 +133,23 @@
//===--===//
+// Pattern fragments...
+//
+def immSExt8 : PatLeaf<(imm), [{
+ // immSExt8 predicate - True if the immediate fits in a 8-bit sign extended
+ // field.
+ return (int)N->getValue() == (signed char)N->getValue();
+}]>;
+
+//===--===//
// Instruction templates...
class I o, Format f, dag ops, string asm>
: X86Inst;
-class Ii8 o, Format f, dag ops, string asm>
- : X86Inst;
+class Ii8 o, Format f, dag ops, string asm, list pattern>
+ : X86Inst {
+ let Pattern = pattern;
+}
class Ii16 o, Format f, dag ops, string asm, list pattern>
: X86Inst {
let Pattern = pattern;
@@ -324,14 +341,16 @@
def MOV32rr : I<0x89, MRMDestReg, (ops R32:$dst, R32:$src),
"mov{l} {$src, $dst|$dst, $src}">;
def MOV8ri : Ii8 <0xB0, AddRegFrm, (ops R8 :$dst, i8imm :$src),
- "mov{b} {$src, $dst|$dst, $src}">;
+ "mov{b} {$src, $dst|$dst, $src}",
+ [(set R8:$dst, imm:$src)]>;
def MOV16ri : Ii16<0xB8, AddRegFrm, (ops R16:$dst, i16imm:$src),
- "mov{w} {$src, $dst|$dst, $src}", [(set R16:$dst,
imm:$src)]>,
- OpSize;
+ "mov{w} {$src, $dst|$dst, $src}",
+ [(set R16:$dst, imm:$src)]>, OpSize;
def MOV32ri : Ii32<0xB8, AddRegFrm, (ops R32:$dst, i32imm:$src),
- "mov{l} {$src, $dst|$dst, $src}", [(set R32:$dst,
imm:$src)]>;
+ "mov{l} {$src, $dst|$dst, $src}",
+ [(set R32:$dst, imm:$src)]>;
def MOV8mi : Ii8 <0xC6, MRM0m, (ops i8mem :$dst, i8imm :$src),
- "mov{b} {$src, $dst|$dst, $src}">;
+ "mov{b} {$src, $dst|$dst, $src}", []>;
def MOV16mi : Ii16<0xC7, MRM0m, (ops i16mem:$dst, i16imm:$src),
"mov{w} {$src, $dst|$dst, $src}", []>, OpSize;
def MOV32mi : Ii32<0xC7, MRM0m, (ops i32mem:$dst, i32imm:$src),
@@ -676,7 +695,8 @@
def AND8ri : Ii8<0x80, MRM4r,
(ops R8 :$dst, R8 :$src1, i8imm :$src2),
- "and{b} {$src2, $dst|$dst, $src2}">;
+ "and{b} {$src2, $dst|$dst, $src2}",
+ [(set R8:$dst, (and R8:$src1, imm:$src2))]>;
def AND16ri : Ii16<0x81, MRM4r,
(ops R16:$dst, R16:$src1, i16imm:$src2),
"and{w} {$src2, $dst|$dst, $src2}",
@@ -686,11 +706,13 @@
"and{l} {$src2, $dst|$dst, $src2}",
[(set R32:$dst, (and R32:$src1, imm:$src2))]>;
def AND16ri8 : Ii8<0x83, MRM4r,
- (ops R16:$dst, R16:$src1, i8imm:$src2),
- "and{w} {$src2, $dst|$dst, $src2}" >, OpSize;
+ (ops R16:$dst, R16:$src1, i16i8imm:$src2),
+ "and{w} {$src2, $dst|$dst, $src2}",
+ [(set R16:$dst, (and R16:$src1, immSExt8:$src2))]>, OpSize;
def AND32ri8 : Ii8<0x83, MRM4r,
- (ops R32:$dst, R32:$src1, i8imm:$src2),
- "and{l} {$src2, $dst|$dst, $src2}">;
+ (ops R32:$dst, R32:$src1, i32i8imm:$src2),
+ "and{l} {$src2, $dst|$dst, $src2}",
+ [(set R32:$dst, (and R32:$src1, immSExt8:$src2))]>;
let isTwoAddress = 0 in {
def AND8mr : I<0x20, MRMDestMem,
@@ -704,7 +726,7 @@
"and{l} {$src, $dst|$dst, $src}">;
def AND8mi : Ii8<0x80, MRM4m,
(ops i8mem :$dst, i8imm :$src),
- "and{b} {$src, $dst|$dst, $src}">;
+ "and{b} {$src, $dst|$dst, $src}", []>;
def AND16mi : Ii16<0x81, MRM4m,
(ops i16mem:$dst, i16imm:$src),
"and{w} {$src, $dst|$dst, $src}", []>, OpSize;
@@ -713,10 +735,10 @@
"and{l} {$src, $dst|$dst, $src}", []>;
def AND16mi8 : Ii8<0x83, MRM4m,
(ops i16me
[llvm-commits] CVS: llvm/include/llvm/Analysis/Dominators.h
Changes in directory llvm/include/llvm/Analysis:
Dominators.h updated: 1.49 -> 1.50
---
Log message:
Fix the dominates method to return true if the two nodes are the same. Add
a new properlyDominates method to do what the old one did.
---
Diffs of the changes: (+12 -4)
Dominators.h | 16
1 files changed, 12 insertions(+), 4 deletions(-)
Index: llvm/include/llvm/Analysis/Dominators.h
diff -u llvm/include/llvm/Analysis/Dominators.h:1.49
llvm/include/llvm/Analysis/Dominators.h:1.50
--- llvm/include/llvm/Analysis/Dominators.h:1.49Thu Apr 21 15:16:31 2005
+++ llvm/include/llvm/Analysis/Dominators.h Fri Nov 18 01:27:33 2005
@@ -306,16 +306,24 @@
inline Node *getIDom() const { return IDom; }
inline const std::vector &getChildren() const { return Children; }
-/// dominates - Returns true iff this dominates N. Note that this is not a
-/// constant time operation!
+/// properlyDominates - Returns true iff this dominates N and this != N.
+/// Note that this is not a constant time operation!
///
-inline bool dominates(const Node *N) const {
+bool properlyDominates(const Node *N) const {
const Node *IDom;
while ((IDom = N->getIDom()) != 0 && IDom != this)
- N = IDom; // Walk up the tree
+N = IDom; // Walk up the tree
return IDom != 0;
}
+/// dominates - Returns true iff this dominates N. Note that this is not a
+/// constant time operation!
+///
+inline bool dominates(const Node *N) const {
+ if (N == this) return true; // A node trivially dominates itself.
+ return properlyDominates(N);
+}
+
private:
inline Node(BasicBlock *BB, Node *iDom) : TheBB(BB), IDom(iDom) {}
inline Node *addChild(Node *C) { Children.push_back(C); return C; }
___
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[llvm-commits] CVS: llvm/lib/Analysis/PostDominators.cpp
Changes in directory llvm/lib/Analysis:
PostDominators.cpp updated: 1.52 -> 1.53
---
Log message:
post-dom-frontiers requires proper post-dominance
---
Diffs of the changes: (+1 -1)
PostDominators.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Analysis/PostDominators.cpp
diff -u llvm/lib/Analysis/PostDominators.cpp:1.52
llvm/lib/Analysis/PostDominators.cpp:1.53
--- llvm/lib/Analysis/PostDominators.cpp:1.52 Thu Apr 21 22:54:55 2005
+++ llvm/lib/Analysis/PostDominators.cppFri Nov 18 01:28:26 2005
@@ -239,7 +239,7 @@
DomSetType::const_iterator CDFI = ChildDF.begin(), CDFE = ChildDF.end();
for (; CDFI != CDFE; ++CDFI) {
- if (!Node->dominates(DT[*CDFI]))
+ if (!Node->properlyDominates(DT[*CDFI]))
S.insert(*CDFI);
}
}
___
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[llvm-commits] CVS: llvm/lib/VMCore/Dominators.cpp
Changes in directory llvm/lib/VMCore:
Dominators.cpp updated: 1.63 -> 1.64
---
Log message:
This requires proper dominance
---
Diffs of the changes: (+1 -1)
Dominators.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/VMCore/Dominators.cpp
diff -u llvm/lib/VMCore/Dominators.cpp:1.63 llvm/lib/VMCore/Dominators.cpp:1.64
--- llvm/lib/VMCore/Dominators.cpp:1.63 Mon Apr 25 15:50:33 2005
+++ llvm/lib/VMCore/Dominators.cpp Fri Nov 18 01:27:53 2005
@@ -452,7 +452,7 @@
DomSetType::const_iterator CDFI = ChildDF.begin(), CDFE = ChildDF.end();
for (; CDFI != CDFE; ++CDFI) {
- if (!Node->dominates(DT[*CDFI]))
+ if (!Node->properlyDominates(DT[*CDFI]))
S.insert(*CDFI);
}
}
___
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[llvm-commits] CVS: llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
Changes in directory llvm/lib/Transforms/Utils:
PromoteMemoryToRegister.cpp updated: 1.80 -> 1.81
---
Log message:
This needs proper dominance
---
Diffs of the changes: (+14 -5)
PromoteMemoryToRegister.cpp | 19 ++-
1 files changed, 14 insertions(+), 5 deletions(-)
Index: llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
diff -u llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp:1.80
llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp:1.81
--- llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp:1.80 Thu Aug 4
19:57:45 2005
+++ llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp Fri Nov 18
01:29:44 2005
@@ -96,12 +96,18 @@
void run();
-/// dominates - Return true if I1 dominates I2 using the DominatorTree.
+/// properlyDominates - Return true if I1 properly dominates I2.
///
-bool dominates(Instruction *I1, Instruction *I2) const {
+bool properlyDominates(Instruction *I1, Instruction *I2) const {
if (InvokeInst *II = dyn_cast(I1))
I1 = II->getNormalDest()->begin();
- return DT[I1->getParent()]->dominates(DT[I2->getParent()]);
+ return DT[I1->getParent()]->properlyDominates(DT[I2->getParent()]);
+}
+
+/// dominates - Return true if BB1 dominates BB2 using the DominatorTree.
+///
+bool dominates(BasicBlock *BB1, BasicBlock *BB2) const {
+ return DT[BB1]->dominates(DT[BB2]);
}
private:
@@ -168,7 +174,8 @@
// Remember the basic blocks which define new values for the alloca
DefiningBlocks.push_back(SI->getParent());
AllocaPointerVal = SI->getOperand(0);
- } else if (LoadInst *LI = dyn_cast(User)) {
+ } else {
+LoadInst *LI = cast(User);
// Otherwise it must be a load instruction, keep track of variable
reads
UsingBlocks.push_back(LI->getParent());
AllocaPointerVal = LI;
@@ -194,6 +201,7 @@
continue;
}
+
if (AST)
PointerAllocaValues[AllocaNum] = AllocaPointerVal;
@@ -348,7 +356,8 @@
for (unsigned i = 0, e = PNs.size(); i != e; ++i)
if (PNs[i]) {
if (Value *V = PNs[i]->hasConstantValue(true)) {
- if (!isa(V) || dominates(cast(V), PNs[i]))
{
+ if (!isa(V) ||
+ properlyDominates(cast(V), PNs[i])) {
if (AST && isa(PNs[i]->getType()))
AST->deleteValue(PNs[i]);
PNs[i]->replaceAllUsesWith(V);
___
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[llvm-commits] CVS: llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
Changes in directory llvm/lib/Transforms/Utils:
PromoteMemoryToRegister.cpp updated: 1.81 -> 1.82
---
Log message:
Implement a refinement to the mem2reg algorithm for cases where an alloca
has a single def. In this case, look for uses that are dominated by the def
and attempt to rewrite them to directly use the stored value.
This speeds up mem2reg on these values and reduces the number of phi nodes
inserted. This should address PR665: http://llvm.cs.uiuc.edu/PR665 .
---
Diffs of the changes: (+55 -0)
PromoteMemoryToRegister.cpp | 55
1 files changed, 55 insertions(+)
Index: llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
diff -u llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp:1.81
llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp:1.82
--- llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp:1.81 Fri Nov 18
01:29:44 2005
+++ llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp Fri Nov 18
01:31:42 2005
@@ -161,6 +161,7 @@
std::vector DefiningBlocks;
std::vector UsingBlocks;
+StoreInst *OnlyStore = 0;
BasicBlock *OnlyBlock = 0;
bool OnlyUsedInOneBlock = true;
@@ -174,6 +175,7 @@
// Remember the basic blocks which define new values for the alloca
DefiningBlocks.push_back(SI->getParent());
AllocaPointerVal = SI->getOperand(0);
+OnlyStore = SI;
} else {
LoadInst *LI = cast(User);
// Otherwise it must be a load instruction, keep track of variable
reads
@@ -201,6 +203,59 @@
continue;
}
+// If there is only a single store to this value, replace any loads of
+// it that are directly dominated by the definition with the value stored.
+if (DefiningBlocks.size() == 1) {
+ // Be aware of loads before the store.
+ std::set ProcessedBlocks;
+ for (unsigned i = 0, e = UsingBlocks.size(); i != e; ++i)
+// If the store dominates the block and if we haven't processed it yet,
+// do so now.
+if (dominates(OnlyStore->getParent(), UsingBlocks[i]))
+ if (ProcessedBlocks.insert(UsingBlocks[i]).second) {
+BasicBlock *UseBlock = UsingBlocks[i];
+
+// If the use and store are in the same block, do a quick scan to
+// verify that there are no uses before the store.
+if (UseBlock == OnlyStore->getParent()) {
+ BasicBlock::iterator I = UseBlock->begin();
+ for (; &*I != OnlyStore; ++I) { // scan block for store.
+if (isa(I) && I->getOperand(0) == AI)
+ break;
+ }
+ if (&*I != OnlyStore) break; // Do not handle this case.
+}
+
+// Otherwise, if this is a different block or if all uses happen
+// after the store, do a simple linear scan to replace loads with
+// the stored value.
+for (BasicBlock::iterator I = UseBlock->begin(),E =
UseBlock->end();
+ I != E; ) {
+ if (LoadInst *LI = dyn_cast(I++)) {
+if (LI->getOperand(0) == AI) {
+ LI->replaceAllUsesWith(OnlyStore->getOperand(0));
+ if (AST && isa(LI->getType()))
+AST->deleteValue(LI);
+ LI->eraseFromParent();
+}
+ }
+}
+
+// Finally, remove this block from the UsingBlock set.
+UsingBlocks[i] = UsingBlocks.back();
+--i; --e;
+ }
+
+ // Finally, after the scan, check to see if the store is all that is
left.
+ if (UsingBlocks.empty()) {
+// The alloca has been processed, move on.
+Allocas[AllocaNum] = Allocas.back();
+Allocas.pop_back();
+--AllocaNum;
+continue;
+ }
+}
+
if (AST)
PointerAllocaValues[AllocaNum] = AllocaPointerVal;
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.100 -> 1.101
---
Log message:
Split out the shift code from visitBinary.
---
Diffs of the changes: (+14 -7)
SelectionDAGISel.cpp | 21 ++---
1 files changed, 14 insertions(+), 7 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.100
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.101
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.100Wed Nov 16
01:22:30 2005
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Fri Nov 18 01:42:56 2005
@@ -347,7 +347,8 @@
void visitUnwind(UnwindInst &I) { assert(0 && "TODO"); }
//
- void visitBinary(User &I, unsigned Opcode, bool isShift = false);
+ void visitBinary(User &I, unsigned Opcode);
+ void visitShift(User &I, unsigned Opcode);
void visitAdd(User &I) {
visitBinary(I, I.getType()->isFloatingPoint() ? ISD::FADD : ISD::ADD);
}
@@ -380,9 +381,9 @@
void visitAnd(User &I) { visitBinary(I, ISD::AND); }
void visitOr (User &I) { visitBinary(I, ISD::OR); }
void visitXor(User &I) { visitBinary(I, ISD::XOR); }
- void visitShl(User &I) { visitBinary(I, ISD::SHL, true); }
- void visitShr(User &I) {
-visitBinary(I, I.getType()->isUnsigned() ? ISD::SRL : ISD::SRA, true);
+ void visitShl(User &I) { visitShift(I, ISD::SHL); }
+ void visitShr(User &I) {
+visitShift(I, I.getType()->isUnsigned() ? ISD::SRL : ISD::SRA);
}
void visitSetCC(User &I, ISD::CondCode SignedOpc, ISD::CondCode UnsignedOpc);
@@ -520,13 +521,19 @@
}
}
-void SelectionDAGLowering::visitBinary(User &I, unsigned Opcode, bool isShift)
{
+void SelectionDAGLowering::visitBinary(User &I, unsigned Opcode) {
SDOperand Op1 = getValue(I.getOperand(0));
SDOperand Op2 = getValue(I.getOperand(1));
- if (isShift)
-Op2 = DAG.getNode(ISD::ANY_EXTEND, TLI.getShiftAmountTy(), Op2);
+ setValue(&I, DAG.getNode(Opcode, Op1.getValueType(), Op1, Op2));
+}
+void SelectionDAGLowering::visitShift(User &I, unsigned Opcode) {
+ SDOperand Op1 = getValue(I.getOperand(0));
+ SDOperand Op2 = getValue(I.getOperand(1));
+
+ Op2 = DAG.getNode(ISD::ANY_EXTEND, TLI.getShiftAmountTy(), Op2);
+
setValue(&I, DAG.getNode(Opcode, Op1.getValueType(), Op1, Op2));
}
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