[Lldb-commits] [lldb] r284706 - Fix ARM/AArch64 Step-Over watchpoint issue remove provision for duplicate watchpoints

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Thu Oct 20 04:07:26 2016
New Revision: 284706

URL: http://llvm.org/viewvc/llvm-project?rev=284706&view=rev
Log:
Fix ARM/AArch64 Step-Over watchpoint issue remove provision for duplicate 
watchpoints

This patch fixes ARM/AArch64 watchpoint bug which was taking inferior out of 
control while stepping over watchpoints.
Also adds a test case that tests above problem.

Differential revision: https://reviews.llvm.org/D25057


Added:

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/multi_watchpoint_slots/

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/multi_watchpoint_slots/Makefile

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/multi_watchpoint_slots/TestWatchpointMultipleSlots.py

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/multi_watchpoint_slots/main.c
Modified:
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp

Added: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/multi_watchpoint_slots/Makefile
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/multi_watchpoint_slots/Makefile?rev=284706&view=auto
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/multi_watchpoint_slots/Makefile
 (added)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/multi_watchpoint_slots/Makefile
 Thu Oct 20 04:07:26 2016
@@ -0,0 +1,5 @@
+LEVEL = ../../../make
+
+C_SOURCES := main.c
+
+include $(LEVEL)/Makefile.rules

Added: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/multi_watchpoint_slots/TestWatchpointMultipleSlots.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/multi_watchpoint_slots/TestWatchpointMultipleSlots.py?rev=284706&view=auto
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/multi_watchpoint_slots/TestWatchpointMultipleSlots.py
 (added)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/multi_watchpoint_slots/TestWatchpointMultipleSlots.py
 Thu Oct 20 04:07:26 2016
@@ -0,0 +1,97 @@
+"""
+Test watchpoint slots we should not be able to install multiple watchpoints
+within same word boundary. We should be able to install individual watchpoints
+on any of the bytes, half-word, or word. This is only for ARM/AArch64 targets.
+"""
+
+from __future__ import print_function
+
+import os
+import time
+import lldb
+from lldbsuite.test.decorators import *
+from lldbsuite.test.lldbtest import *
+from lldbsuite.test import lldbutil
+
+
+class WatchpointSlotsTestCase(TestBase):
+NO_DEBUG_INFO_TESTCASE = True
+
+mydir = TestBase.compute_mydir(__file__)
+
+def setUp(self):
+# Call super's setUp().
+TestBase.setUp(self)
+
+# Source filename.
+self.source = 'main.c'
+
+# Output filename.
+self.exe_name = 'a.out'
+self.d = {'C_SOURCES': self.source, 'EXE': self.exe_name}
+
+# Watchpoints not supported
+@expectedFailureAndroid(archs=['arm', 'aarch64'])
+# This is a arm and aarch64 specific test case. No other architectures 
tested.
+@skipIf(archs=no_match(['arm', 'aarch64']))
+def test_multiple_watchpoints_on_same_word(self):
+
+self.build(dictionary=self.d)
+self.setTearDownCleanup(dictionary=self.d)
+
+exe = os.path.join(os.getcwd(), self.exe_name)
+self.runCmd("file " + exe, CURRENT_EXECUTABLE_SET)
+
+# Detect line number after which we are going to increment arrayName.
+loc_line = line_number('main.c', '// About to write byteArray')
+
+# Set a breakpoint on the line detected above.
+lldbutil.run_break_set_by_file_and_line(
+self, "main.c", loc_line, num_expected_locations=1, loc_exact=True)
+
+# Run the program.
+self.runCmd("run", RUN_SUCCEEDED)
+
+# The stop reason of the thread should be breakpoint.
+self.expect("thread list", STOPPED_DUE_TO_BREAKPOINT,
+ substrs=['stopped', 'stop reason = breakpoint'])
+
+# Delete breakpoint we just hit.
+self.expect("breakpoint delete 1", substrs=['1 breakpoints deleted'])
+
+# Set a watchpoint at byteArray[0]
+self.expect("watchpoint set variable byteArray[0]", WATCHPOINT_CREATED,
+substrs=['Watchpoint created','size = 1'])
+
+# Use the '-v' option to do verbose listing of the watchpoint.
+# The hit count should be 0 initially.
+self.expect("watchpoint list -v 1", substrs=['hit_count = 0'])
+
+# Try setting a watchpoint at byteArray[1]
+self.ex

[Lldb-commits] [lldb] r286574 - Mark xfail TestNamespaceDefinitions for arm/aarch64 targets

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Fri Nov 11 04:00:53 2016
New Revision: 286574

URL: http://llvm.org/viewvc/llvm-project?rev=286574&view=rev
Log:
Mark xfail TestNamespaceDefinitions for arm/aarch64 targets

Fails with all versions of arm/aarch64 gcc available on ubuntu 16.04/14.04.

Passes with Linaro GCC version >= 4.8 but fails with >= 5.0. But There are 
other regressions when we use Linaro GCC.



Modified:

lldb/trunk/packages/Python/lldbsuite/test/lang/cpp/namespace_definitions/TestNamespaceDefinitions.py

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/lang/cpp/namespace_definitions/TestNamespaceDefinitions.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/lang/cpp/namespace_definitions/TestNamespaceDefinitions.py?rev=286574&r1=286573&r2=286574&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/lang/cpp/namespace_definitions/TestNamespaceDefinitions.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/lang/cpp/namespace_definitions/TestNamespaceDefinitions.py
 Fri Nov 11 04:00:53 2016
@@ -20,6 +20,9 @@ class NamespaceDefinitionsTestCase(TestB
 compiler_version=[
 "<",
 "4.9"])
+@expectedFailureAll(
+bugnumber="llvm.org/pr28948",
+oslist=['linux'], compiler="gcc", archs=['arm','aarch64'])
 @expectedFailureAll(oslist=["windows"])
 def test_expr(self):
 self.build()


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[Lldb-commits] [lldb] r287542 - Fix remote-linux regression due to stringRef changes

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Mon Nov 21 09:18:58 2016
New Revision: 287542

URL: http://llvm.org/viewvc/llvm-project?rev=287542&view=rev
Log:
Fix remote-linux regression due to stringRef changes

This is to fix a regression in remote-linux lldb-server connections.

We were wrongly passing a copy of uri and expecting a stringRef back.


Modified:
lldb/trunk/tools/lldb-server/Acceptor.cpp

Modified: lldb/trunk/tools/lldb-server/Acceptor.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/tools/lldb-server/Acceptor.cpp?rev=287542&r1=287541&r2=287542&view=diff
==
--- lldb/trunk/tools/lldb-server/Acceptor.cpp (original)
+++ lldb/trunk/tools/lldb-server/Acceptor.cpp Mon Nov 21 09:18:58 2016
@@ -90,7 +90,7 @@ std::unique_ptr Acceptor::Crea
   int port;
   StringRef scheme, host, path;
   // Try to match socket name as URL - e.g., tcp://localhost:
-  if (UriParser::Parse(name.str(), scheme, host, port, path)) {
+  if (UriParser::Parse(name, scheme, host, port, path)) {
 if (!FindProtocolByScheme(scheme.str().c_str(), socket_protocol))
   error.SetErrorStringWithFormat("Unknown protocol scheme \"%s\"",
  scheme.str().c_str());


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Re: [Lldb-commits] [lldb] r287597 - Add the new Args / entry-access API.

[Omair Javaid via lldb-commits]

Linux buildbot also failing with similar errors.

On 22 November 2016 at 09:26, Ed Maste via lldb-commits
 wrote:
> On 21 November 2016 at 18:18, Zachary Turner via lldb-commits
>  wrote:
>> Author: zturner
>> Date: Mon Nov 21 17:18:07 2016
>> New Revision: 287597
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=287597&view=rev
>> Log:
>> Add the new Args / entry-access API.
>
> FreeBSD buildbot is now failing with:
> http://lab.llvm.org:8011/builders/lldb-amd64-ninja-freebsd11/builds/1462
>
> [2160/2918] Building CXX object
> tools/lldb/source/Symbol/CMakeFiles/lldbSymbol.dir/Function.cpp.o
> FAILED: tools/lldb/source/Symbol/CMakeFiles/lldbSymbol.dir/Function.cpp.o
> /usr/bin/CC   -DGTEST_HAS_RTTI=0 -DHAVE_ROUND
> -DLLDB_USE_BUILTIN_DEMANGLER -D__STDC_CONSTANT_MACROS
> -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS
> -Itools/lldb/source/Symbol
> -I/usr/home/buildbot/scratch/scratch/llvm/tools/lldb/source/Symbol
> -I/usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include
> -Itools/lldb/include -Iinclude
> -I/usr/home/buildbot/scratch/scratch/llvm/include -I/usr/local/include
> -I/usr/local/include/python2.7
> -I/usr/home/buildbot/scratch/scratch/llvm/tools/clang/include
> -Itools/lldb/../clang/include
> -I/usr/home/buildbot/scratch/scratch/llvm/tools/lldb/source/.
> -I/usr/home/buildbot/scratch/scratch/llvm/tools/lldb/source/Plugins/Process/FreeBSD
> -I/usr/home/buildbot/scratch/scratch/llvm/tools/lldb/source/Plugins/Process/POSIX
> -fPIC -fvisibility-inlines-hidden -Wall -W -Wno-unused-parameter
> -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -pedantic
> -Wno-long-long -Wcovered-switch-default -Wnon-virtual-dtor
> -Wdelete-non-virtual-dtor -Werror=date-time -std=c++11
> -fcolor-diagnostics -ffunction-sections -fdata-sections
> -Wno-deprecated-declarations -Wno-unknown-pragmas -Wno-strict-aliasing
> -Wno-deprecated-register -Wno-vla-extension -fPIC -fPIC -O3 -DNDEBUG
>  -fno-exceptions -fno-rtti -MMD -MT
> tools/lldb/source/Symbol/CMakeFiles/lldbSymbol.dir/Function.cpp.o -MF
> tools/lldb/source/Symbol/CMakeFiles/lldbSymbol.dir/Function.cpp.o.d -o
> tools/lldb/source/Symbol/CMakeFiles/lldbSymbol.dir/Function.cpp.o -c
> /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/source/Symbol/Function.cpp
> In file included from
> /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/source/Symbol/Function.cpp:20:
> In file included from
> /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/Target/Language.h:25:
> In file included from
> /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/DataFormatters/FormatClasses.h:22:
> In file included from
> /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/DataFormatters/TypeFormat.h:27:
> In file included from
> /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/Core/ValueObject.h:34:
> In file included from
> /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/Target/Process.h:43:
> In file included from
> /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/Interpreter/Options.h:20:
> /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/Interpreter/Args.h:155:3:
> error: 'auto' return without trailing return type; deduced return
> types are a C++14 extension
>   auto begin() const { return m_entries.begin(); }
>   ^
> /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/Interpreter/Args.h:156:3:
> error: 'auto' return without trailing return type; deduced return
> types are a C++14 extension
>   auto end() const { return m_entries.end(); }
>   ^
> /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/Interpreter/Args.h:155:31:
> error: no viable conversion from 'const_iterator' (aka
> '__wrap_iter') to 'int'
>   auto begin() const { return m_entries.begin(); }
>   ^
> /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/Interpreter/Args.h:156:29:
> error: no viable conversion from 'const_iterator' (aka
> '__wrap_iter') to 'int'
>   auto end() const { return m_entries.end(); }
> ^~~
> 4 errors generated.
> ___
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[Lldb-commits] [lldb] r287631 - Fix build failure on Linux and BSD by reverting r287597

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Tue Nov 22 03:47:00 2016
New Revision: 287631

URL: http://llvm.org/viewvc/llvm-project?rev=287631&view=rev
Log:
Fix build failure on Linux and BSD by reverting r287597

Linux and BSD builds failing after this changes from rev 287597.


Modified:
lldb/trunk/include/lldb/Interpreter/Args.h
lldb/trunk/source/Breakpoint/BreakpointIDList.cpp
lldb/trunk/source/Commands/CommandObjectCommands.cpp
lldb/trunk/source/Commands/CommandObjectFrame.cpp
lldb/trunk/source/Commands/CommandObjectProcess.cpp
lldb/trunk/source/Commands/CommandObjectSettings.cpp
lldb/trunk/source/Interpreter/CommandInterpreter.cpp
lldb/trunk/source/Interpreter/OptionValueDictionary.cpp

Modified: lldb/trunk/include/lldb/Interpreter/Args.h
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Interpreter/Args.h?rev=287631&r1=287630&r2=287631&view=diff
==
--- lldb/trunk/include/lldb/Interpreter/Args.h (original)
+++ lldb/trunk/include/lldb/Interpreter/Args.h Tue Nov 22 03:47:00 2016
@@ -150,13 +150,8 @@ public:
   const char *GetArgumentAtIndex(size_t idx) const;
 
   llvm::ArrayRef entries() const { return m_entries; }
-  char GetArgumentQuoteCharAtIndex(size_t idx) const;
-
-  auto begin() const { return m_entries.begin(); }
-  auto end() const { return m_entries.end(); }
 
-  size_t size() const { return GetArgumentCount(); }
-  const ArgEntry &operator[](size_t n) const { return m_entries[n]; }
+  char GetArgumentQuoteCharAtIndex(size_t idx) const;
 
   //--
   /// Gets the argument vector.

Modified: lldb/trunk/source/Breakpoint/BreakpointIDList.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Breakpoint/BreakpointIDList.cpp?rev=287631&r1=287630&r2=287631&view=diff
==
--- lldb/trunk/source/Breakpoint/BreakpointIDList.cpp (original)
+++ lldb/trunk/source/Breakpoint/BreakpointIDList.cpp Tue Nov 22 03:47:00 2016
@@ -122,12 +122,13 @@ void BreakpointIDList::FindAndReplaceIDR
   llvm::StringRef range_from;
   llvm::StringRef range_to;
   llvm::StringRef current_arg;
+  const size_t num_old_args = old_args.GetArgumentCount();
   std::set names_found;
 
-  for (size_t i = 0; i < old_args.size(); ++i) {
+  for (size_t i = 0; i < num_old_args; ++i) {
 bool is_range = false;
 
-current_arg = old_args[i].ref;
+current_arg = old_args.GetArgumentAtIndex(i);
 if (!allow_locations && current_arg.contains('.')) {
   result.AppendErrorWithFormat(
   "Breakpoint locations not allowed, saw location: %s.",
@@ -151,17 +152,19 @@ void BreakpointIDList::FindAndReplaceIDR
 return;
   } else
 names_found.insert(current_arg);
-} else if ((i + 2 < old_args.size()) &&
-   BreakpointID::IsRangeIdentifier(old_args[i + 1].ref) &&
+} else if ((i + 2 < num_old_args) &&
+   BreakpointID::IsRangeIdentifier(
+   old_args.GetArgumentAtIndex(i + 1)) &&
BreakpointID::IsValidIDExpression(current_arg) &&
-   BreakpointID::IsValidIDExpression(old_args[i + 2].ref)) {
+   BreakpointID::IsValidIDExpression(
+   old_args.GetArgumentAtIndex(i + 2))) {
   range_from = current_arg;
-  range_to = old_args[i + 2].ref;
+  range_to = old_args.GetArgumentAtIndex(i + 2);
   is_range = true;
   i = i + 2;
 } else {
   // See if user has specified id.*
-  llvm::StringRef tmp_str = old_args[i].ref;
+  llvm::StringRef tmp_str = old_args.GetArgumentAtIndex(i);
   size_t pos = tmp_str.find('.');
   if (pos != llvm::StringRef::npos) {
 llvm::StringRef bp_id_str = tmp_str.substr(0, pos);

Modified: lldb/trunk/source/Commands/CommandObjectCommands.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Commands/CommandObjectCommands.cpp?rev=287631&r1=287630&r2=287631&view=diff
==
--- lldb/trunk/source/Commands/CommandObjectCommands.cpp (original)
+++ lldb/trunk/source/Commands/CommandObjectCommands.cpp Tue Nov 22 03:47:00 
2016
@@ -1476,12 +1476,12 @@ public:
int match_start_point, int max_return_elements,
bool &word_complete,
StringList &matches) override {
-llvm::StringRef completion_str = input[cursor_index].ref;
-completion_str = completion_str.take_front(cursor_char_position);
+std::string completion_str(input.GetArgumentAtIndex(cursor_index));
+completion_str.erase(cursor_char_position);
 
 CommandCompletions::InvokeCommonCompletionCallbacks(
 GetCommandInterpreter(), CommandCompletions::eDiskFileCompletion,
-completion_str, match_start_point, max_return_elements, nullptr,
+completion_

Re: [Lldb-commits] [lldb] r287597 - Add the new Args / entry-access API.

[Omair Javaid via lldb-commits]

Proposed change didnt fix the build errors so I have reverted changes
from rev 287597

On 22 November 2016 at 14:18, Zachary Turner  wrote:
> Ack, I caught this and fixed it, but it looks like I didn't dcommit the fix.
> I have no access until morning but if someone else does, you can either
> revert or change return type to vector::const_iterator
>
> On Tue, Nov 22, 2016 at 12:45 AM Omair Javaid 
> wrote:
>>
>> Linux buildbot also failing with similar errors.
>>
>> On 22 November 2016 at 09:26, Ed Maste via lldb-commits
>>  wrote:
>> > On 21 November 2016 at 18:18, Zachary Turner via lldb-commits
>> >  wrote:
>> >> Author: zturner
>> >> Date: Mon Nov 21 17:18:07 2016
>> >> New Revision: 287597
>> >>
>> >> URL: http://llvm.org/viewvc/llvm-project?rev=287597&view=rev
>> >> Log:
>> >> Add the new Args / entry-access API.
>> >
>> > FreeBSD buildbot is now failing with:
>> > http://lab.llvm.org:8011/builders/lldb-amd64-ninja-freebsd11/builds/1462
>> >
>> > [2160/2918] Building CXX object
>> > tools/lldb/source/Symbol/CMakeFiles/lldbSymbol.dir/Function.cpp.o
>> > FAILED:
>> > tools/lldb/source/Symbol/CMakeFiles/lldbSymbol.dir/Function.cpp.o
>> > /usr/bin/CC   -DGTEST_HAS_RTTI=0 -DHAVE_ROUND
>> > -DLLDB_USE_BUILTIN_DEMANGLER -D__STDC_CONSTANT_MACROS
>> > -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS
>> > -Itools/lldb/source/Symbol
>> > -I/usr/home/buildbot/scratch/scratch/llvm/tools/lldb/source/Symbol
>> > -I/usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include
>> > -Itools/lldb/include -Iinclude
>> > -I/usr/home/buildbot/scratch/scratch/llvm/include -I/usr/local/include
>> > -I/usr/local/include/python2.7
>> > -I/usr/home/buildbot/scratch/scratch/llvm/tools/clang/include
>> > -Itools/lldb/../clang/include
>> > -I/usr/home/buildbot/scratch/scratch/llvm/tools/lldb/source/.
>> >
>> > -I/usr/home/buildbot/scratch/scratch/llvm/tools/lldb/source/Plugins/Process/FreeBSD
>> >
>> > -I/usr/home/buildbot/scratch/scratch/llvm/tools/lldb/source/Plugins/Process/POSIX
>> > -fPIC -fvisibility-inlines-hidden -Wall -W -Wno-unused-parameter
>> > -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -pedantic
>> > -Wno-long-long -Wcovered-switch-default -Wnon-virtual-dtor
>> > -Wdelete-non-virtual-dtor -Werror=date-time -std=c++11
>> > -fcolor-diagnostics -ffunction-sections -fdata-sections
>> > -Wno-deprecated-declarations -Wno-unknown-pragmas -Wno-strict-aliasing
>> > -Wno-deprecated-register -Wno-vla-extension -fPIC -fPIC -O3 -DNDEBUG
>> >  -fno-exceptions -fno-rtti -MMD -MT
>> > tools/lldb/source/Symbol/CMakeFiles/lldbSymbol.dir/Function.cpp.o -MF
>> > tools/lldb/source/Symbol/CMakeFiles/lldbSymbol.dir/Function.cpp.o.d -o
>> > tools/lldb/source/Symbol/CMakeFiles/lldbSymbol.dir/Function.cpp.o -c
>> >
>> > /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/source/Symbol/Function.cpp
>> > In file included from
>> >
>> > /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/source/Symbol/Function.cpp:20:
>> > In file included from
>> >
>> > /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/Target/Language.h:25:
>> > In file included from
>> >
>> > /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/DataFormatters/FormatClasses.h:22:
>> > In file included from
>> >
>> > /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/DataFormatters/TypeFormat.h:27:
>> > In file included from
>> >
>> > /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/Core/ValueObject.h:34:
>> > In file included from
>> >
>> > /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/Target/Process.h:43:
>> > In file included from
>> >
>> > /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/Interpreter/Options.h:20:
>> >
>> > /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/Interpreter/Args.h:155:3:
>> > error: 'auto' return without trailing return type; deduced return
>> > types are a C++14 extension
>> >   auto begin() const { return m_entries.begin(); }
>> >   ^
>> >
>> > /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/Interpreter/Args.h:156:3:
>> > error: 'auto' return without trailing return type; deduced return
>> > types are a C++14 extension
>> >   auto end() const { return m_entries.end(); }
>> >   ^
>> >
>> > /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/Interpreter/Args.h:155:31:
>> > error: no viable conversion from 'const_iterator' (aka
>> > '__wrap_iter') to 'int'
>> >   auto begin() const { return m_entries.begin(); }
>> >   ^
>> >
>> > /usr/home/buildbot/scratch/scratch/llvm/tools/lldb/include/lldb/Interpreter/Args.h:156:29:
>> > error: no viable conversion from 'const_iterator' (aka
>> > '__wrap_iter') to 'int'
>> >   auto end() const { return m_entries.end(); }
>> > ^~~
>> > 4 errors generated.
>> > ___
>> > lldb-commits mailing list
>> > lldb-commits@lists.llvm.org
>> > http://lists.llvm.org/cgi-

[Lldb-commits] [lldb] r290821 - XFail TestNoreturnUnwind for arm targets

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Mon Jan  2 12:40:20 2017
New Revision: 290821

URL: http://llvm.org/viewvc/llvm-project?rev=290821&view=rev
Log:
XFail TestNoreturnUnwind for arm targets

TestNoreturnUnwind fails on arm/aarch32 linux targets.

Bug is already described for x86_64 android targets in llvm.org/pr31192.


Modified:

lldb/trunk/packages/Python/lldbsuite/test/functionalities/unwind/noreturn/TestNoreturnUnwind.py

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/unwind/noreturn/TestNoreturnUnwind.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/unwind/noreturn/TestNoreturnUnwind.py?rev=290821&r1=290820&r2=290821&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/unwind/noreturn/TestNoreturnUnwind.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/unwind/noreturn/TestNoreturnUnwind.py
 Mon Jan  2 12:40:20 2017
@@ -18,6 +18,7 @@ class NoreturnUnwind(TestBase):
 
 @skipIfWindows  # clang-cl does not support gcc style attributes.
 @expectedFailureAndroid(bugnumber="llvm.org/pr31192", archs=["x86_64"])
+@expectedFailureAll(bugnumber="llvm.org/pr31192", oslist=['linux'], 
compiler="gcc", archs=['arm'])
 def test(self):
 """Test that we can backtrace correctly with 'noreturn' functions on 
the stack"""
 self.build()


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[Lldb-commits] [lldb] r291889 - Fix log typo in ABISysV_arm64.cpp

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Fri Jan 13 03:06:58 2017
New Revision: 291889

URL: http://llvm.org/viewvc/llvm-project?rev=291889&view=rev
Log:
Fix log typo in ABISysV_arm64.cpp

This commit fixes a typo in ABISysV_arm64.cpp.
Log was reporting a call to ABISysV_x86_64::PrepareTrivialCall.



Modified:
lldb/trunk/source/Plugins/ABI/SysV-arm64/ABISysV_arm64.cpp

Modified: lldb/trunk/source/Plugins/ABI/SysV-arm64/ABISysV_arm64.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/ABI/SysV-arm64/ABISysV_arm64.cpp?rev=291889&r1=291888&r2=291889&view=diff
==
--- lldb/trunk/source/Plugins/ABI/SysV-arm64/ABISysV_arm64.cpp (original)
+++ lldb/trunk/source/Plugins/ABI/SysV-arm64/ABISysV_arm64.cpp Fri Jan 13 
03:06:58 2017
@@ -1697,7 +1697,7 @@ bool ABISysV_arm64::PrepareTrivialCall(T
 
   if (log) {
 StreamString s;
-s.Printf("ABISysV_x86_64::PrepareTrivialCall (tid = 0x%" PRIx64
+s.Printf("ABISysV_arm64::PrepareTrivialCall (tid = 0x%" PRIx64
  ", sp = 0x%" PRIx64 ", func_addr = 0x%" PRIx64
  ", return_addr = 0x%" PRIx64,
  thread.GetID(), (uint64_t)sp, (uint64_t)func_addr,


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[Lldb-commits] [lldb] r291949 - Fix TestRegisterVariables for linux arm/arm64 gcc ver > 5

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Fri Jan 13 13:28:42 2017
New Revision: 291949

URL: http://llvm.org/viewvc/llvm-project?rev=291949&view=rev
Log:
Fix TestRegisterVariables for linux arm/arm64 gcc ver > 5

We are going to turn off buffer overflow introduced by gcc by turning off
FORTIFY_SOURCE.

Differential revision: https://reviews.llvm.org/D28666



Modified:
lldb/trunk/packages/Python/lldbsuite/test/lang/c/register_variables/Makefile

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/lang/c/register_variables/Makefile
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/lang/c/register_variables/Makefile?rev=291949&r1=291948&r2=291949&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/lang/c/register_variables/Makefile 
(original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/lang/c/register_variables/Makefile 
Fri Jan 13 13:28:42 2017
@@ -2,6 +2,6 @@ LEVEL = ../../../make
 
 C_SOURCES := test.c
 
-CFLAGS_EXTRAS += -O1
+CFLAGS_EXTRAS += -O1 -D_FORTIFY_SOURCE=0
 
 include $(LEVEL)/Makefile.rules


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[Lldb-commits] [lldb] r296119 - Hardware breakpoints for Linux on Arm/AArch64 targets

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Fri Feb 24 07:27:31 2017
New Revision: 296119

URL: http://llvm.org/viewvc/llvm-project?rev=296119&view=rev
Log:
Hardware breakpoints for Linux on Arm/AArch64 targets

Please look at below differential link for upstream discussion.

Differential revision: https://reviews.llvm.org/D29669


Added:

lldb/trunk/packages/Python/lldbsuite/test/functionalities/breakpoint/hardware_breakpoints/

lldb/trunk/packages/Python/lldbsuite/test/functionalities/breakpoint/hardware_breakpoints/hardware_breakpoint_on_multiple_threads/

lldb/trunk/packages/Python/lldbsuite/test/functionalities/breakpoint/hardware_breakpoints/hardware_breakpoint_on_multiple_threads/Makefile

lldb/trunk/packages/Python/lldbsuite/test/functionalities/breakpoint/hardware_breakpoints/hardware_breakpoint_on_multiple_threads/TestHWBreakMultiThread.py

lldb/trunk/packages/Python/lldbsuite/test/functionalities/breakpoint/hardware_breakpoints/hardware_breakpoint_on_multiple_threads/main.cpp
Modified:
lldb/trunk/include/lldb/Host/common/NativeBreakpointList.h
lldb/trunk/include/lldb/Host/common/NativeProcessProtocol.h
lldb/trunk/include/lldb/Host/common/NativeRegisterContext.h
lldb/trunk/include/lldb/Host/common/NativeThreadProtocol.h

lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/TestLldbGdbServer.py

lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
lldb/trunk/source/Host/common/NativeProcessProtocol.cpp
lldb/trunk/source/Host/common/NativeRegisterContext.cpp
lldb/trunk/source/Plugins/Process/Linux/NativeProcessLinux.cpp
lldb/trunk/source/Plugins/Process/Linux/NativeProcessLinux.h
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
lldb/trunk/source/Plugins/Process/Linux/NativeThreadLinux.cpp
lldb/trunk/source/Plugins/Process/Linux/NativeThreadLinux.h

lldb/trunk/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp

Modified: lldb/trunk/include/lldb/Host/common/NativeBreakpointList.h
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Host/common/NativeBreakpointList.h?rev=296119&r1=296118&r2=296119&view=diff
==
--- lldb/trunk/include/lldb/Host/common/NativeBreakpointList.h (original)
+++ lldb/trunk/include/lldb/Host/common/NativeBreakpointList.h Fri Feb 24 
07:27:31 2017
@@ -19,6 +19,14 @@
 #include 
 
 namespace lldb_private {
+
+struct HardwareBreakpoint {
+  lldb::addr_t m_addr;
+  size_t m_size;
+};
+
+using HardwareBreakpointMap = std::map;
+
 class NativeBreakpointList {
 public:
   typedef std::functionhttp://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Host/common/NativeProcessProtocol.h?rev=296119&r1=296118&r2=296119&view=diff
==
--- lldb/trunk/include/lldb/Host/common/NativeProcessProtocol.h (original)
+++ lldb/trunk/include/lldb/Host/common/NativeProcessProtocol.h Fri Feb 24 
07:27:31 2017
@@ -107,18 +107,28 @@ public:
   virtual Error SetBreakpoint(lldb::addr_t addr, uint32_t size,
   bool hardware) = 0;
 
-  virtual Error RemoveBreakpoint(lldb::addr_t addr);
+  virtual Error RemoveBreakpoint(lldb::addr_t addr, bool hardware = false);
 
   virtual Error EnableBreakpoint(lldb::addr_t addr);
 
   virtual Error DisableBreakpoint(lldb::addr_t addr);
 
   //--
+  // Hardware Breakpoint functions
+  //--
+  virtual const HardwareBreakpointMap &GetHardwareBreakpointMap() const;
+
+  virtual Error SetHardwareBreakpoint(lldb::addr_t addr, size_t size);
+
+  virtual Error RemoveHardwareBreakpoint(lldb::addr_t addr);
+
+  //--
   // Watchpoint functions
   //--
   virtual const NativeWatchpointList::WatchpointMap &GetWatchpointMap() const;
 
-  virtual uint32_t GetMaxWatchpoints() const;
+  virtual llvm::Optional>
+  GetHardwareDebugSupportInfo() const;
 
   virtual Error SetWatchpoint(lldb::addr_t addr, size_t size,
   uint32_t watch_flags, bool hardware);
@@ -313,6 +323,7 @@ protected:
   std::vector m_delegates;
   NativeBreakpointList m_breakpoint_list;
   NativeWatchpointList m_watchpoint_list;
+  HardwareBreakpointMap m_hw_breakpoints_map;
   int m_terminal_fd;
   uint32_t m_stop_id;
 

Modified: lldb/trunk/include/lldb/Host/common/NativeRegisterContext.h
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Host/common/Nativ

[Lldb-commits] [lldb] r250700 - Fix for random watchpoint testsuite failures on AArch64 targets.

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Mon Oct 19 09:54:33 2015
New Revision: 250700

URL: http://llvm.org/viewvc/llvm-project?rev=250700&view=rev
Log:
Fix for random watchpoint testsuite failures on AArch64 targets.
This patch corrects the number of bytes of debug register resources which are 
written while installing or removing a breakpoint using ptrace interface on 
arm64 targets.

Differential revision: http://reviews.llvm.org/D12522


Modified:
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp

Modified: 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp?rev=250700&r1=250699&r2=250700&view=diff
==
--- 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp 
(original)
+++ 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp 
Mon Oct 19 09:54:33 2015
@@ -807,11 +807,12 @@ NativeRegisterContextLinux_arm64::WriteH
 
 memset (&dreg_state, 0, sizeof (dreg_state));
 ioVec.iov_base = &dreg_state;
-ioVec.iov_len = sizeof (dreg_state);
 
 if (hwbType == eDREGTypeWATCH)
 {
 hwbType = NT_ARM_HW_WATCH;
+ioVec.iov_len = sizeof (dreg_state.dbg_info) + sizeof (dreg_state.pad)
++ (sizeof (dreg_state.dbg_regs [0]) * m_max_hwp_supported);
 
 for (uint32_t i = 0; i < m_max_hwp_supported; i++)
 {
@@ -822,6 +823,8 @@ NativeRegisterContextLinux_arm64::WriteH
 else
 {
 hwbType = NT_ARM_HW_BREAK;
+ioVec.iov_len = sizeof (dreg_state.dbg_info) + sizeof (dreg_state.pad)
++ (sizeof (dreg_state.dbg_regs [0]) * m_max_hbp_supported);
 
 for (uint32_t i = 0; i < m_max_hbp_supported; i++)
 {


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[Lldb-commits] [lldb] r251269 - Corrects return values and typos in Arm watchpoint code

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Sun Oct 25 18:18:35 2015
New Revision: 251269

URL: http://llvm.org/viewvc/llvm-project?rev=251269&view=rev
Log:
Corrects return values and typos in Arm watchpoint code

This is just a trivial patch that corrects a couple of return value account to 
function's return type.
Also corrects typo in hardware breakpoint handler.


Modified:
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp

Modified: 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp?rev=251269&r1=251268&r2=251269&view=diff
==
--- lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp 
(original)
+++ lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp 
Sun Oct 25 18:18:35 2015
@@ -440,7 +440,7 @@ NativeRegisterContextLinux_arm::SetHardw
  if (bp_index == LLDB_INVALID_INDEX32)
  return LLDB_INVALID_INDEX32;
 
-// Add new or update existing watchpoint
+// Add new or update existing breakpoint
 if ((m_hbr_regs[bp_index].control & 1) == 0)
 {
 m_hbr_regs[bp_index].address = addr;
@@ -473,7 +473,7 @@ NativeRegisterContextLinux_arm::ClearHar
 error = ReadHardwareDebugInfo ();
 
 if (error.Fail())
-return LLDB_INVALID_INDEX32;
+return false;
 
 if (hw_idx >= m_max_hbp_supported)
 return false;
@@ -494,7 +494,7 @@ NativeRegisterContextLinux_arm::ClearHar
 WriteHardwareDebugRegs(eDREGTypeBREAK, hw_idx);
 
 if (error.Fail())
-return LLDB_INVALID_INDEX32;
+return false;
 
 return true;
 }
@@ -636,7 +636,7 @@ NativeRegisterContextLinux_arm::ClearHar
 error = ReadHardwareDebugInfo ();
 
 if (error.Fail())
-return LLDB_INVALID_INDEX32;
+return false;
 
 if (wp_index >= m_max_hwp_supported)
 return false;


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[Lldb-commits] [lldb] r251386 - Fix for Arm watchpoint cache corruption in case of ptrace failure

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Tue Oct 27 00:56:56 2015
New Revision: 251386

URL: http://llvm.org/viewvc/llvm-project?rev=251386&view=rev
Log:
Fix for Arm watchpoint cache corruption in case of ptrace failure

Differential revision: http://reviews.llvm.org/D14051


Modified:
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp

Modified: 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp?rev=251386&r1=251385&r2=251386&view=diff
==
--- lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp 
(original)
+++ lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp 
Tue Oct 27 00:56:56 2015
@@ -451,7 +451,13 @@ NativeRegisterContextLinux_arm::SetHardw
 error = WriteHardwareDebugRegs(eDREGTypeBREAK, bp_index);
 
 if (error.Fail())
+{
+m_hbr_regs[bp_index].address = 0;
+m_hbr_regs[bp_index].control &= ~1;
+m_hbr_regs[bp_index].refcount = 0;
+
 return LLDB_INVALID_INDEX32;
+}
 }
 else
 m_hbr_regs[bp_index].refcount++;
@@ -486,6 +492,11 @@ NativeRegisterContextLinux_arm::ClearHar
 }
 else if (m_hbr_regs[hw_idx].refcount == 1)
 {
+// Create a backup we can revert to in case of failure.
+lldb::addr_t tempAddr = m_hbr_regs[hw_idx].address;
+uint32_t tempControl = m_hbr_regs[hw_idx].control;
+uint32_t tempRefCount = m_hbr_regs[hw_idx].refcount;
+
 m_hbr_regs[hw_idx].control &= ~1;
 m_hbr_regs[hw_idx].address = 0;
 m_hbr_regs[hw_idx].refcount = 0;
@@ -494,7 +505,13 @@ NativeRegisterContextLinux_arm::ClearHar
 WriteHardwareDebugRegs(eDREGTypeBREAK, hw_idx);
 
 if (error.Fail())
+{
+m_hbr_regs[hw_idx].control = tempControl;
+m_hbr_regs[hw_idx].address = tempAddr;
+m_hbr_regs[hw_idx].refcount = tempRefCount;
+
 return false;
+}
 
 return true;
 }
@@ -614,7 +631,13 @@ NativeRegisterContextLinux_arm::SetHardw
 error = WriteHardwareDebugRegs(eDREGTypeWATCH, wp_index);
 
 if (error.Fail())
+{
+m_hwp_regs[wp_index].address = 0;
+m_hwp_regs[wp_index].control &= ~1;
+m_hwp_regs[wp_index].refcount = 0;
+
 return LLDB_INVALID_INDEX32;
+}
 }
 else
 m_hwp_regs[wp_index].refcount++;
@@ -649,6 +672,11 @@ NativeRegisterContextLinux_arm::ClearHar
 }
 else if (m_hwp_regs[wp_index].refcount == 1)
 {
+// Create a backup we can revert to in case of failure.
+lldb::addr_t tempAddr = m_hwp_regs[wp_index].address;
+uint32_t tempControl = m_hwp_regs[wp_index].control;
+uint32_t tempRefCount = m_hwp_regs[wp_index].refcount;
+
 // Update watchpoint in local cache
 m_hwp_regs[wp_index].control &= ~1;
 m_hwp_regs[wp_index].address = 0;
@@ -658,7 +686,13 @@ NativeRegisterContextLinux_arm::ClearHar
 error = WriteHardwareDebugRegs(eDREGTypeWATCH, wp_index);
 
 if (error.Fail())
+{
+m_hwp_regs[wp_index].control = tempControl;
+m_hwp_regs[wp_index].address = tempAddr;
+m_hwp_regs[wp_index].refcount = tempRefCount;
+
 return false;
+}
 
 return true;
 }
@@ -682,10 +716,18 @@ NativeRegisterContextLinux_arm::ClearAll
 if (error.Fail())
 return error;
 
+lldb::addr_t tempAddr = 0;
+uint32_t tempControl = 0, tempRefCount = 0;
+
 for (uint32_t i = 0; i < m_max_hwp_supported; i++)
 {
 if (m_hwp_regs[i].control & 0x01)
 {
+// Create a backup we can revert to in case of failure.
+tempAddr = m_hwp_regs[i].address;
+tempControl = m_hwp_regs[i].control;
+tempRefCount = m_hwp_regs[i].refcount;
+
 // Clear watchpoints in local cache
 m_hwp_regs[i].control &= ~1;
 m_hwp_regs[i].address = 0;
@@ -695,7 +737,13 @@ NativeRegisterContextLinux_arm::ClearAll
 error = WriteHardwareDebugRegs(eDREGTypeWATCH, i);
 
 if (error.Fail())
+{
+m_hwp_regs[i].control = tempControl;
+m_hwp_regs[i].address = tempAddr;
+m_hwp_regs[i].refcount = tempRefCount;
+
 return error;
+}
 }
 }
 


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[Lldb-commits] [lldb] r252298 - Fix for AArch64 watchpoint cache corruption in case of ptrace failure

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Fri Nov  6 06:56:34 2015
New Revision: 252298

URL: http://llvm.org/viewvc/llvm-project?rev=252298&view=rev
Log:
Fix for AArch64 watchpoint cache corruption in case of ptrace failure

Same fix has been submitted for Arm.

Review can be found here:

Differential revision: http://reviews.llvm.org/D14051


Modified:
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp

Modified: 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp?rev=252298&r1=252297&r2=252298&view=diff
==
--- 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp 
(original)
+++ 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp 
Fri Nov  6 06:56:34 2015
@@ -435,7 +435,7 @@ NativeRegisterContextLinux_arm64::SetHar
  if (bp_index == LLDB_INVALID_INDEX32)
 return LLDB_INVALID_INDEX32;
 
-// Add new or update existing watchpoint
+// Add new or update existing breakpoint
 if ((m_hbr_regs[bp_index].control & 1) == 0)
 {
 m_hbr_regs[bp_index].address = addr;
@@ -446,7 +446,13 @@ NativeRegisterContextLinux_arm64::SetHar
 error = WriteHardwareDebugRegs(eDREGTypeBREAK);
 
 if (error.Fail())
+{
+m_hbr_regs[bp_index].address = 0;
+m_hbr_regs[bp_index].control &= ~1;
+m_hbr_regs[bp_index].refcount = 0;
+
 return LLDB_INVALID_INDEX32;
+}
 }
 else
 m_hbr_regs[bp_index].refcount++;
@@ -481,6 +487,11 @@ NativeRegisterContextLinux_arm64::ClearH
 }
 else if (m_hbr_regs[hw_idx].refcount == 1)
 {
+// Create a backup we can revert to in case of failure.
+lldb::addr_t tempAddr = m_hbr_regs[hw_idx].address;
+uint32_t tempControl = m_hbr_regs[hw_idx].control;
+uint32_t tempRefCount = m_hbr_regs[hw_idx].refcount;
+
 m_hbr_regs[hw_idx].control &= ~1;
 m_hbr_regs[hw_idx].address = 0;
 m_hbr_regs[hw_idx].refcount = 0;
@@ -489,7 +500,13 @@ NativeRegisterContextLinux_arm64::ClearH
 WriteHardwareDebugRegs(eDREGTypeBREAK);
 
 if (error.Fail())
+{
+m_hbr_regs[hw_idx].control = tempControl;
+m_hbr_regs[hw_idx].address = tempAddr;
+m_hbr_regs[hw_idx].refcount = tempRefCount;
+
 return false;
+}
 
 return true;
 }
@@ -595,7 +612,13 @@ NativeRegisterContextLinux_arm64::SetHar
 error = WriteHardwareDebugRegs(eDREGTypeWATCH);
 
 if (error.Fail())
+{
+m_hwp_regs[wp_index].address = 0;
+m_hwp_regs[wp_index].control &= ~1;
+m_hwp_regs[wp_index].refcount = 0;
+
 return LLDB_INVALID_INDEX32;
+}
 }
 else
 m_hwp_regs[wp_index].refcount++;
@@ -630,6 +653,11 @@ NativeRegisterContextLinux_arm64::ClearH
 }
 else if (m_hwp_regs[wp_index].refcount == 1)
 {
+// Create a backup we can revert to in case of failure.
+lldb::addr_t tempAddr = m_hwp_regs[wp_index].address;
+uint32_t tempControl = m_hwp_regs[wp_index].control;
+uint32_t tempRefCount = m_hwp_regs[wp_index].refcount;
+
 // Update watchpoint in local cache
 m_hwp_regs[wp_index].control &= ~1;
 m_hwp_regs[wp_index].address = 0;
@@ -639,7 +667,13 @@ NativeRegisterContextLinux_arm64::ClearH
 error = WriteHardwareDebugRegs(eDREGTypeWATCH);
 
 if (error.Fail())
+{
+m_hwp_regs[wp_index].control = tempControl;
+m_hwp_regs[wp_index].address = tempAddr;
+m_hwp_regs[wp_index].refcount = tempRefCount;
+
 return false;
+}
 
 return true;
 }
@@ -663,10 +697,18 @@ NativeRegisterContextLinux_arm64::ClearA
 if (error.Fail())
 return error;
 
+lldb::addr_t tempAddr = 0;
+uint32_t tempControl = 0, tempRefCount = 0;
+
 for (uint32_t i = 0; i < m_max_hwp_supported; i++)
 {
 if (m_hwp_regs[i].control & 0x01)
 {
+// Create a backup we can revert to in case of failure.
+tempAddr = m_hwp_regs[i].address;
+tempControl = m_hwp_regs[i].control;
+tempRefCount = m_hwp_regs[i].refcount;
+
 // Clear watchpoints in local cache
 m_hwp_regs[i].control &= ~1;
 m_hwp_regs[i].address = 0;
@@ -676,7 +718,13 @@ NativeRegisterContextLinux_arm64::ClearA
 error = WriteHardwareDebugRegs(eDREGTypeWATCH);
 
 if (error.Fail())
+{
+m_hwp_regs[i].control = tempControl;
+m_hwp_regs[i].address = tempAddr;
+m_hwp_regs[i].refcount = tempRefCount;
+
 return error;
+}
 }
 }
 


___

Re: [Lldb-commits] [PATCH] D14816: Use thumb instruction set for ldb-server on android arm

[Omair Javaid via lldb-commits]

-mthumb will force T32 instruction set while -marm will force A32.

Best is not to use any of these flags to let the compiler decide best
possible instruction set combination.

On 19 November 2015 at 20:38, Oleksiy Vyalov via lldb-commits
 wrote:
> ovyalov accepted this revision.
> ovyalov added a comment.
>
> LGTM
>
>
> http://reviews.llvm.org/D14816
>
>
>
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[Lldb-commits] [lldb] r253973 - Disable forcing -marm (A32 instruction set) while running testsuite on arm targets.

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Tue Nov 24 04:35:03 2015
New Revision: 253973

URL: http://llvm.org/viewvc/llvm-project?rev=253973&view=rev
Log:
Disable forcing -marm (A32 instruction set) while running testsuite on arm 
targets.

Differential revision: http://reviews.llvm.org/D14823


Modified:
lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules

Modified: lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules?rev=253973&r1=253972&r2=253973&view=diff
==
--- lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules (original)
+++ lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules Tue Nov 24 
04:35:03 2015
@@ -164,6 +164,10 @@ else
override ARCH :=
override ARCHFLAG :=
endif
+   ifeq "$(ARCH)" "arm"
+   override ARCH :=
+   override ARCHFLAG :=
+   endif
 
ifeq "$(SPLIT_DEBUG_SYMBOLS)" "YES"
DSYM = $(EXE).debug


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[Lldb-commits] [lldb] r269164 - Corrected aarch64 register no in TestBreakpointConditions.py

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Wed May 11 04:29:14 2016
New Revision: 269164

URL: http://llvm.org/viewvc/llvm-project?rev=269164&view=rev
Log:
Corrected aarch64 register no in TestBreakpointConditions.py

Test uses x1 in breakpoint expression while objdump shows that x1 is never used 
in the code and may have random values.
Using x0 make sure that we are using a registe that will have a positive value 
and breakpoint expression will evaluate true atleast once.


Modified:

lldb/trunk/packages/Python/lldbsuite/test/functionalities/breakpoint/breakpoint_conditions/TestBreakpointConditions.py

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/breakpoint/breakpoint_conditions/TestBreakpointConditions.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/breakpoint/breakpoint_conditions/TestBreakpointConditions.py?rev=269164&r1=269163&r2=269164&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/breakpoint/breakpoint_conditions/TestBreakpointConditions.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/breakpoint/breakpoint_conditions/TestBreakpointConditions.py
 Wed May 11 04:29:14 2016
@@ -108,7 +108,7 @@ class BreakpointConditionsTestCase(TestB
 if arch in ['x86_64', 'i386']:
 self.runCmd("breakpoint modify -c ($eax&&i)")
 elif arch in ['aarch64']:
-self.runCmd("breakpoint modify -c ($x1&&i)")
+self.runCmd("breakpoint modify -c ($x0&&i)")
 elif arch in ['arm']:
 self.runCmd("breakpoint modify -c ($r0&&i)")
 elif re.match("mips",arch):


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[Lldb-commits] [lldb] r269187 - Xfail failing watchpoint tests on aarch64-linux

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Wed May 11 08:57:20 2016
New Revision: 269187

URL: http://llvm.org/viewvc/llvm-project?rev=269187&view=rev
Log:
Xfail failing watchpoint tests on aarch64-linux

Some watchpoint tests fail on aarch64-linux as it lacks support for intalling 
watchpoints which are not alligned at 8bytes boundary.

Marking them as xfail for now. 


Modified:

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_commands/command/TestWatchpointCommandLLDB.py

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_commands/command/TestWatchpointCommandPython.py

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_commands/condition/TestWatchpointConditionCmd.py

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_events/TestWatchpointEvents.py

lldb/trunk/packages/Python/lldbsuite/test/python_api/watchpoint/condition/TestWatchpointConditionAPI.py

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_commands/command/TestWatchpointCommandLLDB.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_commands/command/TestWatchpointCommandLLDB.py?rev=269187&r1=269186&r2=269187&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_commands/command/TestWatchpointCommandLLDB.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_commands/command/TestWatchpointCommandLLDB.py
 Wed May 11 08:57:20 2016
@@ -30,6 +30,7 @@ class WatchpointLLDBCommandTestCase(Test
 self.d = {'CXX_SOURCES': self.source, 'EXE': self.exe_name}
 
 @expectedFailureAndroid(archs=['arm', 'aarch64']) # Watchpoints not 
supported
+@expectedFailureAll(oslist=["linux"], archs=["aarch64"], 
bugnumber="llvm.org/pr27710")
 @expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr24446: 
WINDOWS XFAIL TRIAGE - Watchpoints not supported on Windows")
 def test_watchpoint_command(self):
 """Test 'watchpoint command'."""
@@ -84,6 +85,7 @@ class WatchpointLLDBCommandTestCase(Test
 substrs = ['(int32_t)', 'cookie = 777'])
 
 @expectedFailureAndroid(archs=['arm', 'aarch64']) # Watchpoints not 
supported
+@expectedFailureAll(oslist=["linux"], archs=["aarch64"], 
bugnumber="llvm.org/pr27710")
 @expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr24446: 
WINDOWS XFAIL TRIAGE - Watchpoints not supported on Windows")
 def test_watchpoint_command_can_disable_a_watchpoint(self):
 """Test that 'watchpoint command' action can disable a watchpoint 
after it is triggered."""

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_commands/command/TestWatchpointCommandPython.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_commands/command/TestWatchpointCommandPython.py?rev=269187&r1=269186&r2=269187&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_commands/command/TestWatchpointCommandPython.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_commands/command/TestWatchpointCommandPython.py
 Wed May 11 08:57:20 2016
@@ -32,6 +32,7 @@ class WatchpointPythonCommandTestCase(Te
 @skipIfFreeBSD # timing out on buildbot
 @expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr24446: 
WINDOWS XFAIL TRIAGE - Watchpoints not supported on Windows")
 @expectedFailureAndroid(archs=['arm', 'aarch64']) # Watchpoints not 
supported
+@expectedFailureAll(oslist=["linux"], archs=["aarch64"], 
bugnumber="llvm.org/pr27710")
 def test_watchpoint_command(self):
 """Test 'watchpoint command'."""
 self.build(dictionary=self.d)

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_commands/condition/TestWatchpointConditionCmd.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_commands/condition/TestWatchpointConditionCmd.py?rev=269187&r1=269186&r2=269187&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_commands/condition/TestWatchpointConditionCmd.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_commands/condition/TestWatchpointConditionCmd.py
 Wed May 11 08:57:20 2016
@@ -30,6 +30,7 @@ class WatchpointConditionCmdTestCase(Tes
 self.d = {'CXX_SOURCES': self.source, 'EXE': self.exe_name}
 
 @expectedFailureAn

[Lldb-commits] [lldb] r269647 - Xfail TestCrashDuringStep and TestCreateDuringInstructionStep on arm-linux

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Mon May 16 06:21:49 2016
New Revision: 269647

URL: http://llvm.org/viewvc/llvm-project?rev=269647&view=rev
Log:
Xfail TestCrashDuringStep and TestCreateDuringInstructionStep on arm-linux

Both of above tests fail on arm and bugs have been reported on android already.
Adding arm-linux decorator because android decorator doesnt xfail these test 
when run on linux. 


Modified:

lldb/trunk/packages/Python/lldbsuite/test/functionalities/thread/crash_during_step/TestCrashDuringStep.py

lldb/trunk/packages/Python/lldbsuite/test/linux/thread/create_during_instruction_step/TestCreateDuringInstructionStep.py

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/thread/crash_during_step/TestCrashDuringStep.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/thread/crash_during_step/TestCrashDuringStep.py?rev=269647&r1=269646&r2=269647&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/thread/crash_during_step/TestCrashDuringStep.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/thread/crash_during_step/TestCrashDuringStep.py
 Mon May 16 06:21:49 2016
@@ -22,6 +22,7 @@ class CreateDuringStepTestCase(TestBase)
 
 @expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr24778")
 @expectedFailureAndroid("llvm.org/pr24497", archs=['arm', 'aarch64'])
+@expectedFailureAll(oslist=["linux"], archs=["arm"], 
bugnumber="llvm.org/pr24497")
 @expectedFailureAll(triple = re.compile('^mips'))# IO error due to 
breakpoint at invalid address
 def test_step_inst_with(self):
 """Test thread creation during step-inst handling."""

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/linux/thread/create_during_instruction_step/TestCreateDuringInstructionStep.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/linux/thread/create_during_instruction_step/TestCreateDuringInstructionStep.py?rev=269647&r1=269646&r2=269647&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/linux/thread/create_during_instruction_step/TestCreateDuringInstructionStep.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/linux/thread/create_during_instruction_step/TestCreateDuringInstructionStep.py
 Mon May 16 06:21:49 2016
@@ -23,6 +23,7 @@ class CreateDuringInstructionStepTestCas
 
 @skipUnlessPlatform(['linux'])
 @expectedFailureAndroid('llvm.org/pr24737', archs=['arm'])
+@expectedFailureAll(oslist=["linux"], archs=["arm"], 
bugnumber="llvm.org/pr24737")
 def test_step_inst(self):
 self.build(dictionary=self.getBuildFlags())
 exe = os.path.join(os.getcwd(), "a.out")


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[Lldb-commits] [lldb] r269860 - xfail TestWatchLocation.py for arm-linux targets

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Tue May 17 18:01:56 2016
New Revision: 269860

URL: http://llvm.org/viewvc/llvm-project?rev=269860&view=rev
Log:
xfail TestWatchLocation.py for arm-linux targets

TestWatchLocation.py fails on arm-linux target due to unicode error in lldb 
testsuite.
This is a known issue and same test fails on OS X with similar reason.
I have reported a bug and marked this test as xfail for arm-linux targets.


Modified:

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/hello_watchlocation/TestWatchLocation.py

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/hello_watchlocation/TestWatchLocation.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/hello_watchlocation/TestWatchLocation.py?rev=269860&r1=269859&r2=269860&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/hello_watchlocation/TestWatchLocation.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/hello_watchlocation/TestWatchLocation.py
 Tue May 17 18:01:56 2016
@@ -34,6 +34,7 @@ class HelloWatchLocationTestCase(TestBas
 @expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr24446: 
WINDOWS XFAIL TRIAGE - Watchpoints not supported on Windows")
 @expectedFailureAll(triple = re.compile('^mips')) # Most of the MIPS 
boards provide only one H/W watchpoints, and S/W watchpoints are not supported 
yet
 @expectedFailureAll(archs=['s390x']) # SystemZ also currently supports 
only one H/W watchpoint
+@expectedFailureAll(oslist=["linux"], archs=["arm"], 
bugnumber="llvm.org/pr27795")
 @skipIfDarwin
 def test_hello_watchlocation(self):
 """Test watching a location with '-s size' option."""


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[Lldb-commits] [lldb] r269980 - xfail TestTopLevelExprs for arm and aarch64 linux

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Wed May 18 15:45:12 2016
New Revision: 269980

URL: http://llvm.org/viewvc/llvm-project?rev=269980&view=rev
Log:
xfail TestTopLevelExprs for arm and aarch64 linux

TestTopLevelExprs fails on arm and aarch64 linux similar to behaviour on 
android.
A bug exists here: llvm.org/pr27787. 

This patch marks xfail on arm and aarch64.


Modified:

lldb/trunk/packages/Python/lldbsuite/test/expression_command/top-level/TestTopLevelExprs.py

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/expression_command/top-level/TestTopLevelExprs.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/expression_command/top-level/TestTopLevelExprs.py?rev=269980&r1=269979&r2=269980&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/expression_command/top-level/TestTopLevelExprs.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/expression_command/top-level/TestTopLevelExprs.py
 Wed May 18 15:45:12 2016
@@ -51,6 +51,7 @@ class TopLevelExpressionsTestCase(TestBa
 
 @add_test_categories(['pyapi'])
 @expectedFailureAndroid(api_levels=[21, 22], bugnumber="llvm.org/pr27787")
+@expectedFailureAll(oslist=["linux"], archs=["arm", "aarch64"], 
bugnumber="llvm.org/pr27787")
 def test_top_level_expressions(self):
 self.build_and_run()
 


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[Lldb-commits] [lldb] r270745 - Mark some arm-linux specific xfails marking bug entries

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Wed May 25 13:48:39 2016
New Revision: 270745

URL: http://llvm.org/viewvc/llvm-project?rev=270745&view=rev
Log:
Mark some arm-linux specific xfails marking bug entries

TestCallUserAnonTypedef.py and TestIRInterpreter.py fail to limitation of JIT 
expressions in handling hard float ABI targets.
TestBSDArchives.py fails due to python unicode error.
TestBuiltinTrap.py fails due to wrong line information generated by some gcc 
versions.


Modified:

lldb/trunk/packages/Python/lldbsuite/test/expression_command/anonymous-struct/TestCallUserAnonTypedef.py

lldb/trunk/packages/Python/lldbsuite/test/expression_command/ir-interpreter/TestIRInterpreter.py

lldb/trunk/packages/Python/lldbsuite/test/functionalities/archives/TestBSDArchives.py

lldb/trunk/packages/Python/lldbsuite/test/linux/builtin_trap/TestBuiltinTrap.py

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/expression_command/anonymous-struct/TestCallUserAnonTypedef.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/expression_command/anonymous-struct/TestCallUserAnonTypedef.py?rev=270745&r1=270744&r2=270745&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/expression_command/anonymous-struct/TestCallUserAnonTypedef.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/expression_command/anonymous-struct/TestCallUserAnonTypedef.py
 Wed May 25 13:48:39 2016
@@ -24,6 +24,7 @@ class TestExprLookupAnonStructTypedef(Te
 self.line = line_number('main.cpp', '// lldb testsuite break')
 
 @expectedFailureAll(oslist=["windows"])
+@expectedFailureAll(oslist=['linux'], archs=['arm'], 
bugnumber="llvm.org/pr27868")
 def test(self):
 """Test typedeffed untagged struct arguments for function call 
expressions"""
 self.build()

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/expression_command/ir-interpreter/TestIRInterpreter.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/expression_command/ir-interpreter/TestIRInterpreter.py?rev=270745&r1=270744&r2=270745&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/expression_command/ir-interpreter/TestIRInterpreter.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/expression_command/ir-interpreter/TestIRInterpreter.py
 Wed May 25 13:48:39 2016
@@ -38,7 +38,8 @@ class IRInterpreterTestCase(TestBase):
 self.runCmd("run", RUN_SUCCEEDED)
 
 @add_test_categories(['pyapi'])
-@expectedFailureAll(oslist=['windows'], bugnumber="21765")  # getpid() is 
POSIX, among other problems, see bug
+@expectedFailureAll(oslist=['windows'], 
bugnumber="http://llvm.org/pr21765";)  # getpid() is POSIX, among other 
problems, see bug
+@expectedFailureAll(oslist=['linux'], archs=['arm'], 
bugnumber="llvm.org/pr27868")
 def test_ir_interpreter(self):
 self.build_and_run()
 

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/archives/TestBSDArchives.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/archives/TestBSDArchives.py?rev=270745&r1=270744&r2=270745&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/archives/TestBSDArchives.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/archives/TestBSDArchives.py
 Wed May 25 13:48:39 2016
@@ -21,6 +21,7 @@ class BSDArchivesTestCase(TestBase):
 self.line = line_number('a.c', '// Set file and line breakpoint inside 
a().')
 
 @expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr24527.  
Makefile.rules doesn't know how to build static libs on Windows")
+@expectedFailureAll(oslist=["linux"], archs=["arm"], 
bugnumber="llvm.org/pr27795")
 def test(self):
 """Break inside a() and b() defined within libfoo.a."""
 self.build()

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/linux/builtin_trap/TestBuiltinTrap.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/linux/builtin_trap/TestBuiltinTrap.py?rev=270745&r1=270744&r2=270745&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/linux/builtin_trap/TestBuiltinTrap.py 
(original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/linux/builtin_trap/TestBuiltinTrap.py 
Wed May 25 13:48:39 2016
@@ -25,6 +25,7 @@ class BuiltinTrapTestCase(TestBase):
 
 @expectedFailureAll("llvm.org/pr15936", compiler="gcc", 
compiler_version=["<=","4.6"])
 @expectedFailureAll(archs="arm", compiler="gcc", triple=".*-android") # 
gcc generates incorrect linetable
+@expectedFailureAll(oslist=['linux'], archs=['arm'])
 @skipIfWindows
 

[Lldb-commits] [lldb] r270780 - Mark some aarch64-linux specific xfails marking bug entries

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Wed May 25 17:30:05 2016
New Revision: 270780

URL: http://llvm.org/viewvc/llvm-project?rev=270780&view=rev
Log:
Mark some aarch64-linux specific xfails marking bug entries

TestBSDArchives.py and TestWatchLocation.py fail due to unicode error and bug 
has already been reported for arm and macOSx.

TestConstVariables.py fails because lldb cant figure out frame variable type 
when used in expr.


Modified:

lldb/trunk/packages/Python/lldbsuite/test/functionalities/archives/TestBSDArchives.py

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/hello_watchlocation/TestWatchLocation.py

lldb/trunk/packages/Python/lldbsuite/test/lang/c/const_variables/TestConstVariables.py

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/archives/TestBSDArchives.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/archives/TestBSDArchives.py?rev=270780&r1=270779&r2=270780&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/archives/TestBSDArchives.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/archives/TestBSDArchives.py
 Wed May 25 17:30:05 2016
@@ -21,7 +21,7 @@ class BSDArchivesTestCase(TestBase):
 self.line = line_number('a.c', '// Set file and line breakpoint inside 
a().')
 
 @expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr24527.  
Makefile.rules doesn't know how to build static libs on Windows")
-@expectedFailureAll(oslist=["linux"], archs=["arm"], 
bugnumber="llvm.org/pr27795")
+@expectedFailureAll(oslist=["linux"], archs=["arm", "aarch64"], 
bugnumber="llvm.org/pr27795")
 def test(self):
 """Break inside a() and b() defined within libfoo.a."""
 self.build()

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/hello_watchlocation/TestWatchLocation.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/hello_watchlocation/TestWatchLocation.py?rev=270780&r1=270779&r2=270780&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/hello_watchlocation/TestWatchLocation.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/hello_watchlocation/TestWatchLocation.py
 Wed May 25 17:30:05 2016
@@ -34,7 +34,7 @@ class HelloWatchLocationTestCase(TestBas
 @expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr24446: 
WINDOWS XFAIL TRIAGE - Watchpoints not supported on Windows")
 @expectedFailureAll(triple = re.compile('^mips')) # Most of the MIPS 
boards provide only one H/W watchpoints, and S/W watchpoints are not supported 
yet
 @expectedFailureAll(archs=['s390x']) # SystemZ also currently supports 
only one H/W watchpoint
-@expectedFailureAll(oslist=["linux"], archs=["arm"], 
bugnumber="llvm.org/pr27795")
+@expectedFailureAll(oslist=["linux"], archs=["arm", "aarch64"], 
bugnumber="llvm.org/pr27795")
 @skipIfDarwin
 def test_hello_watchlocation(self):
 """Test watching a location with '-s size' option."""

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/lang/c/const_variables/TestConstVariables.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/lang/c/const_variables/TestConstVariables.py?rev=270780&r1=270779&r2=270780&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/lang/c/const_variables/TestConstVariables.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/lang/c/const_variables/TestConstVariables.py
 Wed May 25 17:30:05 2016
@@ -25,6 +25,7 @@ class ConstVariableTestCase(TestBase):
 compiler="clang", compiler_version=[">=", "3.8"])
 @expectedFailureAll(oslist=["freebsd", "linux"], compiler="icc")
 @expectedFailureAll(archs=['mips', 'mipsel', 'mips64', 'mips64el'])
+@expectedFailureAll(oslist=["linux"], archs=['arm', 'aarch64'], 
bugnumber="llvm.org/pr27883")
 @expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr24489: Name 
lookup not working correctly on Windows")
 def test_and_run_command(self):
 """Test interpreted and JITted expressions on constant values."""


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Re: [Lldb-commits] [lldb] r270745 - Mark some arm-linux specific xfails marking bug entries

[Omair Javaid via lldb-commits]

On 26 May 2016 at 18:07, Pavel Labath  wrote:
> Omair,
>
> please be careful about using arm xfails. You are using too wide
> annotations and disabling tests even on configurations where they are
> known to pass.
>
>
> On 25 May 2016 at 19:48, Omair Javaid via lldb-commits
>  wrote:
>> Modified: 
>> lldb/trunk/packages/Python/lldbsuite/test/expression_command/anonymous-struct/TestCallUserAnonTypedef.py
>> URL: 
>> http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/expression_command/anonymous-struct/TestCallUserAnonTypedef.py?rev=270745&r1=270744&r2=270745&view=diff
>> ==
>> --- 
>> lldb/trunk/packages/Python/lldbsuite/test/expression_command/anonymous-struct/TestCallUserAnonTypedef.py
>>  (original)
>> +++ 
>> lldb/trunk/packages/Python/lldbsuite/test/expression_command/anonymous-struct/TestCallUserAnonTypedef.py
>>  Wed May 25 13:48:39 2016
>> @@ -24,6 +24,7 @@ class TestExprLookupAnonStructTypedef(Te
>>  self.line = line_number('main.cpp', '// lldb testsuite break')
>>
>>  @expectedFailureAll(oslist=["windows"])
>> +@expectedFailureAll(oslist=['linux'], archs=['arm'], 
>> bugnumber="llvm.org/pr27868")
>
> These tests pass on soft float targets (e.g. android), so we should
> not disable it there. I think we should figure out a way to make it
> possible to disambiguate these. Right now it is possible to match
> based on the triple of the target using a regular expression, but
> maybe we could make that a bit easier. How about introducing a
> "environment" variable, so that you could specify 'environment =
> "eabihf"' or something like that?

I have these tests failing on arm-linux-gnueabi (armel) and
arm-linux-gnueabihf targets.

I think putting in ABI as an environment variable is the right idea. I
will see how I can separate out tests ABI based failures.

>
>> --- 
>> lldb/trunk/packages/Python/lldbsuite/test/functionalities/archives/TestBSDArchives.py
>>  (original)
>> +++ 
>> lldb/trunk/packages/Python/lldbsuite/test/functionalities/archives/TestBSDArchives.py
>>  Wed May 25 13:48:39 2016
>> @@ -21,6 +21,7 @@ class BSDArchivesTestCase(TestBase):
>>  self.line = line_number('a.c', '// Set file and line breakpoint 
>> inside a().')
>>
>>  @expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr24527.  
>> Makefile.rules doesn't know how to build static libs on Windows")
>> +@expectedFailureAll(oslist=["linux"], archs=["arm"], 
>> bugnumber="llvm.org/pr27795")
>
> This test was passing in all configurations we are testing. The fact
> that you are getting a unicode error here tells me that the problem is
> probably specific to your setup (different locale or something). I
> don't think we should be disabling tests on all arm builds because of
> that. The problem is probably not that hard to fix, and it would be
> extremely valuable to weed out system dependencies like this in order
> to get more reproducible test results. Can you look into this ASAP?

There exists a discussion regarding this unicode error.
http://reviews.llvm.org/D16736

I seem to be getting this on all kind of hardware i have right now.

>
>> Modified: 
>> lldb/trunk/packages/Python/lldbsuite/test/linux/builtin_trap/TestBuiltinTrap.py
>> URL: 
>> http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/linux/builtin_trap/TestBuiltinTrap.py?rev=270745&r1=270744&r2=270745&view=diff
>> ==
>> --- 
>> lldb/trunk/packages/Python/lldbsuite/test/linux/builtin_trap/TestBuiltinTrap.py
>>  (original)
>> +++ 
>> lldb/trunk/packages/Python/lldbsuite/test/linux/builtin_trap/TestBuiltinTrap.py
>>  Wed May 25 13:48:39 2016
>> @@ -25,6 +25,7 @@ class BuiltinTrapTestCase(TestBase):
>>
>>  @expectedFailureAll("llvm.org/pr15936", compiler="gcc", 
>> compiler_version=["<=","4.6"])
>>  @expectedFailureAll(archs="arm", compiler="gcc", triple=".*-android") # 
>> gcc generates incorrect linetable
>> +@expectedFailureAll(oslist=['linux'], archs=['arm'])
>>  @skipIfWindows
>>  def test_with_run_command(self):
>>  """Test that LLDB handles a function with __builtin_trap 
>> correctly."""
>>
>
> You're saying that the problem is due to gcc linetables. Then please
> specify compiler="gcc" here (if you know an approximate version range,
> even better).

I will correct this.

>
> cheers,
> pl
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[Lldb-commits] [lldb] r272916 - Allow installing watchpoints at less than 8-byte alligned addresses for AArch64 targets

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Thu Jun 16 11:41:22 2016
New Revision: 272916

URL: http://llvm.org/viewvc/llvm-project?rev=272916&view=rev
Log:
Allow installing watchpoints at less than 8-byte alligned addresses for AArch64 
targets

This patch allows LLDB for AArch64 to watch all bytes, words or double words 
individually on non 8-byte alligned addresses.

This patch also adds tests to verify this functionality.

Differential revision: http://reviews.llvm.org/D21280


Added:

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/Makefile

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/TestWatchpointSizes.py

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/main.c
Modified:
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
lldb/trunk/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp

Added: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/Makefile
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/Makefile?rev=272916&view=auto
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/Makefile
 (added)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/Makefile
 Thu Jun 16 11:41:22 2016
@@ -0,0 +1,5 @@
+LEVEL = ../../../make
+
+C_SOURCES := main.c
+
+include $(LEVEL)/Makefile.rules

Added: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/TestWatchpointSizes.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/TestWatchpointSizes.py?rev=272916&view=auto
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/TestWatchpointSizes.py
 (added)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/TestWatchpointSizes.py
 Thu Jun 16 11:41:22 2016
@@ -0,0 +1,117 @@
+"""
+Test watchpoint size cases (1-byte, 2-byte, 4-byte).
+Make sure we can watch all bytes, words or double words individually
+when they are packed in a 8-byte region.
+
+"""
+
+from __future__ import print_function
+
+import os, time
+import lldb
+from lldbsuite.test.decorators import *
+from lldbsuite.test.lldbtest import *
+from lldbsuite.test import lldbutil
+
+class WatchpointSizeTestCase(TestBase):
+NO_DEBUG_INFO_TESTCASE = True
+
+mydir = TestBase.compute_mydir(__file__)
+
+def setUp(self):
+# Call super's setUp().
+TestBase.setUp(self)
+
+# Source filename.
+self.source = 'main.c'
+
+# Output filename.
+self.exe_name = 'a.out'
+self.d = {'C_SOURCES': self.source, 'EXE': self.exe_name}
+
+@expectedFailureAndroid(archs=['arm', 'aarch64']) # Watchpoints not 
supported
+@expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr24446: 
WINDOWS XFAIL TRIAGE - Watchpoints not supported on Windows")
+@expectedFailureAll(archs=['s390x']) # Read-write watchpoints not 
supported on SystemZ
+def test_byte_size_watchpoints_with_byte_selection(self):
+"""Test to selectively watch different bytes in a 8-byte array."""
+self.run_watchpoint_size_test('byteArray', 8, '1')
+
+@expectedFailureAndroid(archs=['arm', 'aarch64']) # Watchpoints not 
supported
+@expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr24446: 
WINDOWS XFAIL TRIAGE - Watchpoints not supported on Windows")
+@expectedFailureAll(archs=['s390x']) # Read-write watchpoints not 
supported on SystemZ
+def test_two_byte_watchpoints_with_word_selection(self):
+"""Test to selectively watch different words in an 8-byte word 
array."""
+self.run_watchpoint_size_test('wordArray', 4, '2')
+
+@expectedFailureAndroid(archs=['arm', 'aarch64']) # Watchpoints not 
supported
+@expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr24446: 
WINDOWS XFAIL TRIAGE - Watchpoints not supported on Windows")
+@expectedFailureAll(archs=['s390x']) # Read-write watchpoints not 
supported on SystemZ
+def test_four_byte_watchpoints_with_dword_selection(self):
+"""Test to selectively watch two double words in an 8-byte dword 
array."""
+self.run_watchpoint_size_test('dwordArray', 2, '4')
+
+def run_watchpoint_size_test(self, arrayName, array_size, watchsize):
+self.build(dictionary=self.d)
+self.setTearDownCleanup(dictionary=self.d)
+
+exe = os.path.join(os.getcwd(), self.exe_name)
+s

[Lldb-commits] [lldb] r273863 - Allow unaligned byte/word selection watchpoints for arm- linux/android targets.

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Mon Jun 27 06:18:23 2016
New Revision: 273863

URL: http://llvm.org/viewvc/llvm-project?rev=273863&view=rev
Log:
Allow unaligned byte/word selection watchpoints for arm- linux/android targets.

Differential revision: http://reviews.llvm.org/D21516


Modified:
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h
lldb/trunk/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp

Modified: 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp?rev=273863&r1=273862&r2=273863&view=diff
==
--- lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp 
(original)
+++ lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp 
Mon Jun 27 06:18:23 2016
@@ -614,6 +614,7 @@ NativeRegisterContextLinux_arm::SetHardw
 return LLDB_INVALID_INDEX32;

 uint32_t control_value = 0, wp_index = 0, addr_word_offset = 0, byte_mask 
= 0;
+lldb::addr_t real_addr = addr;
 
 // Check if we are setting watchpoint other than read/write/access
 // Also update watchpoint flag to match Arm write-read bit configuration.
@@ -637,7 +638,24 @@ NativeRegisterContextLinux_arm::SetHardw
 if (size == 0 || size > 4)
 return LLDB_INVALID_INDEX32;
 
-// We can only watch up to four bytes that follow a 4 byte aligned address
+// Check 4-byte alignment for hardware watchpoint target address.
+// Below is a hack to recalculate address and size in order to
+// make sure we can watch non 4-byte alligned addresses as well.
+if (addr & 0x03)
+{
+uint8_t watch_mask = (addr & 0x03) + size;
+
+if (watch_mask > 0x04)
+return LLDB_INVALID_INDEX32;
+else if (watch_mask <= 0x02)
+size = 2;
+else if (watch_mask <= 0x04)
+size = 4;
+
+addr = addr & (~0x03);
+}
+
+   // We can only watch up to four bytes that follow a 4 byte aligned 
address
 // per watchpoint register pair, so make sure we can properly encode this.
 addr_word_offset = addr % 4;
 byte_mask = ((1u << size) - 1u) << addr_word_offset;
@@ -682,6 +700,7 @@ NativeRegisterContextLinux_arm::SetHardw
 if ((m_hwp_regs[wp_index].control & 1) == 0)
 {
 // Update watchpoint in local cache
+m_hwp_regs[wp_index].real_addr = real_addr;
 m_hwp_regs[wp_index].address = addr;
 m_hwp_regs[wp_index].control = control_value;
 m_hwp_regs[wp_index].refcount = 1;
@@ -864,6 +883,7 @@ NativeRegisterContextLinux_arm::GetWatch
 if (m_hwp_regs[wp_index].refcount >= 1 && WatchpointIsEnabled(wp_index)
 && trap_addr >= watch_addr && trap_addr < watch_addr + watch_size)
 {
+m_hwp_regs[wp_index].hit_addr = trap_addr;
 return Error();
 }
 }
@@ -884,7 +904,24 @@ NativeRegisterContextLinux_arm::GetWatch
 return LLDB_INVALID_ADDRESS;
 
 if (WatchpointIsEnabled(wp_index))
-return m_hwp_regs[wp_index].address;
+return m_hwp_regs[wp_index].real_addr;
+else
+return LLDB_INVALID_ADDRESS;
+}
+
+lldb::addr_t
+NativeRegisterContextLinux_arm::GetWatchpointHitAddress (uint32_t wp_index)
+{
+Log *log(lldb_private::GetLogIfAllCategoriesSet (LIBLLDB_LOG_WATCHPOINTS));
+
+if (log)
+log->Printf ("NativeRegisterContextLinux_arm::%s()", __FUNCTION__);
+
+if (wp_index >= m_max_hwp_supported)
+return LLDB_INVALID_ADDRESS;
+
+if (WatchpointIsEnabled(wp_index))
+return m_hwp_regs[wp_index].hit_addr;
 else
 return LLDB_INVALID_ADDRESS;
 }

Modified: 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h?rev=273863&r1=273862&r2=273863&view=diff
==
--- lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h 
(original)
+++ lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h 
Mon Jun 27 06:18:23 2016
@@ -74,6 +74,9 @@ namespace process_linux {
 GetWatchpointHitIndex(uint32_t &wp_index, lldb::addr_t trap_addr) 
override;
 
 lldb::addr_t
+GetWatchpointHitAddress (uint32_t wp_index) override;
+
+lldb::addr_t
 GetWatchpointAddress (uint32_t wp_index) override;
 
 uint32_t
@@ -162,6 +165,8 @@ namespace process_linux {
 struct DREG
 {
 lldb::addr_t address;  // Breakpoint/watchpoint address value.
+lldb::addr_t hit_addr; // Address at which last watchpoint trigger 
exception occurred.
+ll

[Lldb-commits] [lldb] r273869 - Improve watchpoint error reporting specially for arm/aarch64 targets

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Mon Jun 27 07:35:41 2016
New Revision: 273869

URL: http://llvm.org/viewvc/llvm-project?rev=273869&view=rev
Log:
Improve watchpoint error reporting specially for arm/aarch64 targets

Differential revision: http://reviews.llvm.org/D21164


Modified:
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
lldb/trunk/source/Target/Target.cpp

Modified: 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp?rev=273869&r1=273868&r2=273869&view=diff
==
--- lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp 
(original)
+++ lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp 
Mon Jun 27 07:35:41 2016
@@ -592,7 +592,7 @@ NativeRegisterContextLinux_arm::NumSuppo
 error = ReadHardwareDebugInfo ();
 
 if (error.Fail())
-return LLDB_INVALID_INDEX32;
+return 0;
 
 return m_max_hwp_supported;
 }

Modified: 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp?rev=273869&r1=273868&r2=273869&view=diff
==
--- 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp 
(original)
+++ 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp 
Mon Jun 27 07:35:41 2016
@@ -544,7 +544,7 @@ NativeRegisterContextLinux_arm64::NumSup
 error = ReadHardwareDebugInfo ();
 
 if (error.Fail())
-return LLDB_INVALID_INDEX32;
+return 0;
 
 return m_max_hwp_supported;
 }

Modified: lldb/trunk/source/Target/Target.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Target/Target.cpp?rev=273869&r1=273868&r2=273869&view=diff
==
--- lldb/trunk/source/Target/Target.cpp (original)
+++ lldb/trunk/source/Target/Target.cpp Mon Jun 27 07:35:41 2016
@@ -709,14 +709,13 @@ CheckIfWatchpointsExhausted(Target *targ
 {
 uint32_t num_supported_hardware_watchpoints;
 Error rc = 
target->GetProcessSP()->GetWatchpointSupportInfo(num_supported_hardware_watchpoints);
-if (rc.Success())
+if (num_supported_hardware_watchpoints == 0)
 {
-uint32_t num_current_watchpoints = 
target->GetWatchpointList().GetSize();
-if (num_current_watchpoints >= num_supported_hardware_watchpoints)
-error.SetErrorStringWithFormat("number of supported hardware 
watchpoints (%u) has been reached",
-   num_supported_hardware_watchpoints);
+error.SetErrorStringWithFormat ("Target supports (%u) hardware 
watchpoint slots.\n",
+num_supported_hardware_watchpoints);
+return false;
 }
-return false;
+return true;
 }
 
 // See also Watchpoint::SetWatchpointType(uint32_t type) and
@@ -750,6 +749,9 @@ Target::CreateWatchpoint(lldb::addr_t ad
 error.SetErrorStringWithFormat ("invalid watchpoint type: %d", kind);
 }
 
+if (!CheckIfWatchpointsExhausted (this, error))
+return wp_sp;
+
 // Currently we only support one watchpoint per address, with total number
 // of watchpoints limited by the hardware which the inferior is running on.
 
@@ -798,11 +800,9 @@ Target::CreateWatchpoint(lldb::addr_t ad
 // Remove the said watchpoint from the list maintained by the target 
instance.
 m_watchpoint_list.Remove (wp_sp->GetID(), true);
 // See if we could provide more helpful error message.
-if (!CheckIfWatchpointsExhausted(this, error))
-{
-if (!OptionGroupWatchpoint::IsWatchSizeSupported(size))
-error.SetErrorStringWithFormat("watch size of %" PRIu64 " is 
not supported", (uint64_t)size);
-}
+if (!OptionGroupWatchpoint::IsWatchSizeSupported(size))
+error.SetErrorStringWithFormat("watch size of %" PRIu64 " is not 
supported", (uint64_t)size);
+
 wp_sp.reset();
 }
 else


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[Lldb-commits] [lldb] r274215 - Correct watchpoint size test failure on certain devices

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Thu Jun 30 02:09:46 2016
New Revision: 274215

URL: http://llvm.org/viewvc/llvm-project?rev=274215&view=rev
Log:
Correct watchpoint size test failure on certain devices

I overlooked the possibility of certain targets translating increment statement 
into a read and write.
In this case we replace increment statement with an assignment.



Modified:

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/main.c

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/main.c
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/main.c?rev=274215&r1=274214&r2=274215&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/main.c
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/main.c
 Thu Jun 30 02:09:46 2016
@@ -27,7 +27,7 @@ int main(int argc, char** argv) {
 {
 printf("About to write byteArray[%d] ...\n", i); // About to write 
byteArray
 pad0++;
-byteArray[i]++;
+byteArray[i] = 7;
 pad1++;
 localByte = byteArray[i]; // Here onwards we should'nt be stopped in 
loop
 byteArray[i]++;
@@ -41,7 +41,7 @@ int main(int argc, char** argv) {
 {
 printf("About to write wordArray[%d] ...\n", i); // About to write 
wordArray
 pad0++;
-wordArray[i]++;
+wordArray[i] = 7;
 pad1++;
 localWord = wordArray[i]; // Here onwards we should'nt be stopped in 
loop
 wordArray[i]++;
@@ -55,7 +55,7 @@ int main(int argc, char** argv) {
 {
 printf("About to write dwordArray[%d] ...\n", i); // About to write 
dwordArray
 pad0++;
-dwordArray[i]++;
+dwordArray[i] = 7;
 pad1++;
 localDword = dwordArray[i]; // Here onwards we shouldn't be stopped in 
loop
 dwordArray[i]++;


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[Lldb-commits] [lldb] r276814 - Fix LLDBConfig.cmake to enable python enabled build for all 64 bit lldb targets

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Tue Jul 26 16:43:02 2016
New Revision: 276814

URL: http://llvm.org/viewvc/llvm-project?rev=276814&view=rev
Log:
Fix LLDBConfig.cmake to enable python enabled build for all 64 bit lldb targets

Differential revision: https://reviews.llvm.org/D22771


Modified:
lldb/trunk/cmake/modules/LLDBConfig.cmake

Modified: lldb/trunk/cmake/modules/LLDBConfig.cmake
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/cmake/modules/LLDBConfig.cmake?rev=276814&r1=276813&r2=276814&view=diff
==
--- lldb/trunk/cmake/modules/LLDBConfig.cmake (original)
+++ lldb/trunk/cmake/modules/LLDBConfig.cmake Tue Jul 26 16:43:02 2016
@@ -167,12 +167,6 @@ function(find_python_libs_windows)
 endfunction(find_python_libs_windows)
 
 if (NOT LLDB_DISABLE_PYTHON)
-  if(UNIX)
-# This is necessary for crosscompile on Ubuntu 14.04 64bit. Need a proper 
fix.
-if(CMAKE_SIZEOF_VOID_P EQUAL 8)
-  set(CMAKE_LIBRARY_ARCHITECTURE "x86_64-linux-gnu")
-endif()
-  endif()
 
   if ("${CMAKE_SYSTEM_NAME}" STREQUAL "Windows")
 find_python_libs_windows()


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[Lldb-commits] [lldb] r277429 - Correct makefile.rules to use toolchain specific AR and OBJCOPY

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Tue Aug  2 02:56:11 2016
New Revision: 277429

URL: http://llvm.org/viewvc/llvm-project?rev=277429&view=rev
Log:
Correct makefile.rules to use toolchain specific AR and OBJCOPY

Differential revision: https://reviews.llvm.org/D20386


Modified:
lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules

Modified: lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules?rev=277429&r1=277428&r2=277429&view=diff
==
--- lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules (original)
+++ lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules Tue Aug  2 
02:56:11 2016
@@ -265,8 +265,6 @@ cxx_linker_notdir = $(if $(findstring cl
 $(subst cc,c++,$(1))
 cxx_linker = $(if $(findstring /,$(1)),$(join $(dir $(1)), $(call 
cxx_linker_notdir,$(notdir $(1,$(call cxx_linker_notdir,$(1)))
 
-OBJCOPY := $(CROSS_COMPILE)objcopy
-
 #--
 # Windows specific options
 #--
@@ -287,24 +285,25 @@ endif
 #--
 # Android specific options
 #--
-ifeq "$(OS)" "Android"
-ifdef PIE
-LDFLAGS += -pie
-endif
-replace_with = $(if $(findstring clang,$(1)), \
-$(subst clang,$(2),$(1)), \
-$(if $(findstring gcc,$(1)), \
- $(subst gcc,$(2),$(1)), \
- $(subst cc,$(2),$(1
-ifeq "$(notdir $(CC))" "$(CC)"
-replace_cc_with = $(call replace_with,$(CC),$(1))
-else
-replace_cc_with = $(join $(dir $(CC)),$(call replace_with,$(notdir 
$(CC)),$(1)))
-endif
-OBJCOPY = $(call replace_cc_with,objcopy)
-AR = $(call replace_cc_with,ar)
+
+ifdef PIE
+LDFLAGS += -pie
 endif
 
+replace_with = $(if $(findstring clang,$(1)), \
+$(subst clang,$(2),$(1)), \
+$(if $(findstring gcc,$(1)), \
+ $(subst gcc,$(2),$(1)), \
+ $(subst cc,$(2),$(1
+ifeq "$(notdir $(CC))" "$(CC)"
+replace_cc_with = $(call replace_with,$(CC),$(1))
+else
+replace_cc_with = $(join $(dir $(CC)),$(call replace_with,$(notdir 
$(CC)),$(1)))
+endif
+
+OBJCOPY = $(call replace_cc_with,objcopy)
+AR = $(call replace_cc_with,ar)
+
 #--
 # C++ standard library options
 #--


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[Lldb-commits] [lldb] r277453 - Revert rL277429: Correct makefile.rules to use toolchain specific AR and OBJCOPY

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Tue Aug  2 08:17:49 2016
New Revision: 277453

URL: http://llvm.org/viewvc/llvm-project?rev=277453&view=rev
Log:
Revert rL277429: Correct makefile.rules to use toolchain specific AR and OBJCOPY

This commit is causing problems on gcc-* compiler with version number sufix.

Requires a new solution will post a follow up patch.

Differential revision: https://reviews.llvm.org/D20386


Modified:
lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules

Modified: lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules?rev=277453&r1=277452&r2=277453&view=diff
==
--- lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules (original)
+++ lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules Tue Aug  2 
08:17:49 2016
@@ -265,6 +265,8 @@ cxx_linker_notdir = $(if $(findstring cl
 $(subst cc,c++,$(1))
 cxx_linker = $(if $(findstring /,$(1)),$(join $(dir $(1)), $(call 
cxx_linker_notdir,$(notdir $(1,$(call cxx_linker_notdir,$(1)))
 
+OBJCOPY := $(CROSS_COMPILE)objcopy
+
 #--
 # Windows specific options
 #--
@@ -285,25 +287,24 @@ endif
 #--
 # Android specific options
 #--
-
-ifdef PIE
-LDFLAGS += -pie
+ifeq "$(OS)" "Android"
+ifdef PIE
+LDFLAGS += -pie
+endif
+replace_with = $(if $(findstring clang,$(1)), \
+$(subst clang,$(2),$(1)), \
+$(if $(findstring gcc,$(1)), \
+ $(subst gcc,$(2),$(1)), \
+ $(subst cc,$(2),$(1
+ifeq "$(notdir $(CC))" "$(CC)"
+replace_cc_with = $(call replace_with,$(CC),$(1))
+else
+replace_cc_with = $(join $(dir $(CC)),$(call replace_with,$(notdir 
$(CC)),$(1)))
+endif
+OBJCOPY = $(call replace_cc_with,objcopy)
+AR = $(call replace_cc_with,ar)
 endif
 
-replace_with = $(if $(findstring clang,$(1)), \
-$(subst clang,$(2),$(1)), \
-$(if $(findstring gcc,$(1)), \
- $(subst gcc,$(2),$(1)), \
- $(subst cc,$(2),$(1
-ifeq "$(notdir $(CC))" "$(CC)"
-replace_cc_with = $(call replace_with,$(CC),$(1))
-else
-replace_cc_with = $(join $(dir $(CC)),$(call replace_with,$(notdir 
$(CC)),$(1)))
-endif
-
-OBJCOPY = $(call replace_cc_with,objcopy)
-AR = $(call replace_cc_with,ar)
-
 #--
 # C++ standard library options
 #--


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[Lldb-commits] [lldb] r278326 - Make sure LldbGdbServerTestCase is built in arm mode to avoid failures due thumb instructions

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Thu Aug 11 05:35:05 2016
New Revision: 278326

URL: http://llvm.org/viewvc/llvm-project?rev=278326&view=rev
Log:
Make sure LldbGdbServerTestCase is built in arm mode to avoid failures due 
thumb instructions

Differential revision: https://reviews.llvm.org/D23395



Modified:
lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/Makefile

lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/TestLldbGdbServer.py

Modified: lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/Makefile
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/Makefile?rev=278326&r1=278325&r2=278326&view=diff
==
--- lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/Makefile 
(original)
+++ lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/Makefile Thu 
Aug 11 05:35:05 2016
@@ -1,6 +1,6 @@
 LEVEL = ../../make
 
-CFLAGS_EXTRAS += -D__STDC_LIMIT_MACROS -D__STDC_FORMAT_MACROS
+override CFLAGS_EXTRAS += -D__STDC_LIMIT_MACROS -D__STDC_FORMAT_MACROS
 ENABLE_THREADS := YES
 CXX_SOURCES := main.cpp
 MAKE_DSYM :=NO

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/TestLldbGdbServer.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/TestLldbGdbServer.py?rev=278326&r1=278325&r2=278326&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/TestLldbGdbServer.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/TestLldbGdbServer.py
 Thu Aug 11 05:35:05 2016
@@ -1233,7 +1233,11 @@ class LldbGdbServerTestCase(gdbremote_te
 @debugserver_test
 def test_software_breakpoint_set_and_remove_work_debugserver(self):
 self.init_debugserver_test()
-self.build()
+if self.getArchitecture() == "arm":
+# TODO: Handle case when setting breakpoint in thumb code
+self.build(dictionary={'CFLAGS_EXTRAS': '-marm'})
+else:
+self.build()
 self.set_inferior_startup_launch()
 self.software_breakpoint_set_and_remove_work()
 
@@ -1241,7 +1245,11 @@ class LldbGdbServerTestCase(gdbremote_te
 @expectedFlakeyLinux("llvm.org/pr25652")
 def test_software_breakpoint_set_and_remove_work_llgs(self):
 self.init_llgs_test()
-self.build()
+if self.getArchitecture() == "arm":
+# TODO: Handle case when setting breakpoint in thumb code
+self.build(dictionary={'CFLAGS_EXTRAS': '-marm'})
+else:
+self.build()
 self.set_inferior_startup_launch()
 self.software_breakpoint_set_and_remove_work()
 


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[Lldb-commits] [lldb] r278947 - Correct makefile.rules to use arm/aarch64 target specific AR and OBJCOPY

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Wed Aug 17 11:45:34 2016
New Revision: 278947

URL: http://llvm.org/viewvc/llvm-project?rev=278947&view=rev
Log:
Correct makefile.rules to use arm/aarch64 target specific AR and OBJCOPY

Differential revision: https://reviews.llvm.org/D20386


Modified:
lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules

Modified: lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules?rev=278947&r1=278946&r2=278947&view=diff
==
--- lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules (original)
+++ lldb/trunk/packages/Python/lldbsuite/test/make/Makefile.rules Wed Aug 17 
11:45:34 2016
@@ -265,7 +265,33 @@ cxx_linker_notdir = $(if $(findstring cl
 $(subst cc,c++,$(1))
 cxx_linker = $(if $(findstring /,$(1)),$(join $(dir $(1)), $(call 
cxx_linker_notdir,$(notdir $(1,$(call cxx_linker_notdir,$(1)))
 
-OBJCOPY := $(CROSS_COMPILE)objcopy
+ifneq "$(OS)" "Darwin"
+CLANG_OR_GCC := $(strip $(if $(findstring clang,$(CC)), \
+ $(findstring clang,$(CC)), \
+ $(if $(findstring gcc,$(CC)), \
+  $(findstring gcc,$(CC)), \
+  cc)))
+
+CC_LASTWORD := $(strip $(lastword $(subst -, ,$(CC
+
+replace_with = $(strip $(if $(findstring $(3),$(CC_LASTWORD)), \
+   $(subst $(3),$(1),$(2)), \
+   $(subst $(3),$(1),$(subst -$(CC_LASTWORD),,$(2)
+
+ifeq "$(notdir $(CC))" "$(CC)"
+replace_cc_with = $(call replace_with,$(1),$(CC),$(CLANG_OR_GCC))
+else
+replace_cc_with = $(join $(dir $(CC)),$(call 
replace_with,$(1),$(notdir $(CC)),$(CLANG_OR_GCC)))
+endif
+
+OBJCOPY ?= $(call replace_cc_with,objcopy)
+ARCHIVER ?= $(call replace_cc_with,ar)
+override AR = $(ARCHIVER)
+endif
+
+ifdef PIE
+LDFLAGS += -pie
+endif
 
 #--
 # Windows specific options
@@ -285,27 +311,6 @@ ifeq "$(OS)" "Windows_NT"
 endif
 
 #--
-# Android specific options
-#--
-ifeq "$(OS)" "Android"
-ifdef PIE
-LDFLAGS += -pie
-endif
-replace_with = $(if $(findstring clang,$(1)), \
-$(subst clang,$(2),$(1)), \
-$(if $(findstring gcc,$(1)), \
- $(subst gcc,$(2),$(1)), \
- $(subst cc,$(2),$(1
-ifeq "$(notdir $(CC))" "$(CC)"
-replace_cc_with = $(call replace_with,$(CC),$(1))
-else
-replace_cc_with = $(join $(dir $(CC)),$(call replace_with,$(notdir 
$(CC)),$(1)))
-endif
-OBJCOPY = $(call replace_cc_with,objcopy)
-AR = $(call replace_cc_with,ar)
-endif
-
-#--
 # C++ standard library options
 #--
 ifeq (1,$(USE_LIBSTDCPP))


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[Lldb-commits] [lldb] r255499 - Add failure paths to a few JSONNumber members

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Mon Dec 14 08:52:07 2015
New Revision: 255499

URL: http://llvm.org/viewvc/llvm-project?rev=255499&view=rev
Log:
Add failure paths to a few JSONNumber members

Differential revision: http://reviews.llvm.org/D15355


Modified:
lldb/trunk/include/lldb/Utility/JSON.h
lldb/trunk/source/Utility/JSON.cpp

Modified: lldb/trunk/include/lldb/Utility/JSON.h
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Utility/JSON.h?rev=255499&r1=255498&r2=255499&view=diff
==
--- lldb/trunk/include/lldb/Utility/JSON.h (original)
+++ lldb/trunk/include/lldb/Utility/JSON.h Mon Dec 14 08:52:07 2015
@@ -145,7 +145,7 @@ namespace lldb_private {
 uint64_t
 GetAsUnsigned() const;
 
-uint64_t
+int64_t
 GetAsSigned() const;
 
 double

Modified: lldb/trunk/source/Utility/JSON.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Utility/JSON.cpp?rev=255499&r1=255498&r2=255499&view=diff
==
--- lldb/trunk/source/Utility/JSON.cpp (original)
+++ lldb/trunk/source/Utility/JSON.cpp Mon Dec 14 08:52:07 2015
@@ -12,6 +12,7 @@
 #include 
 #include "lldb/Core/StreamString.h"
 #include "lldb/Host/StringConvert.h"
+#include "llvm/Support/ErrorHandling.h"
 
 using namespace lldb_private;
 
@@ -72,9 +73,10 @@ JSONNumber::GetAsUnsigned() const
 case DataType::Double:
 return (uint64_t)m_data.m_double;
 }
+llvm_unreachable("Unhandled data type");
 }
 
-uint64_t
+int64_t
 JSONNumber::GetAsSigned() const
 {
 switch (m_data_type)
@@ -86,6 +88,7 @@ JSONNumber::GetAsSigned() const
 case DataType::Double:
 return (int64_t)m_data.m_double;
 }
+llvm_unreachable("Unhandled data type");
 }
 
 double
@@ -100,6 +103,7 @@ JSONNumber::GetAsDouble() const
 case DataType::Double:
 return m_data.m_double;
 }
+llvm_unreachable("Unhandled data type");
 }
 
 void


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[Lldb-commits] [lldb] r255547 - Correction in TestFrames.py test for arm targets in thumb mode

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Mon Dec 14 15:41:18 2015
New Revision: 255547

URL: http://llvm.org/viewvc/llvm-project?rev=255547&view=rev
Log:
Correction in TestFrames.py test for arm targets in thumb mode

Differential revision: http://reviews.llvm.org/D15061


Modified:
lldb/trunk/packages/Python/lldbsuite/test/python_api/frame/TestFrames.py

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/python_api/frame/TestFrames.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/python_api/frame/TestFrames.py?rev=255547&r1=255546&r2=255547&view=diff
==
--- lldb/trunk/packages/Python/lldbsuite/test/python_api/frame/TestFrames.py 
(original)
+++ lldb/trunk/packages/Python/lldbsuite/test/python_api/frame/TestFrames.py 
Mon Dec 14 15:41:18 2015
@@ -80,9 +80,12 @@ class FrameAPITestCase(TestBase):
 gpr_reg_set = lldbutil.get_GPRs(frame)
 pc_value = gpr_reg_set.GetChildMemberWithName("pc")
 self.assertTrue (pc_value, "We should have a valid PC.")
-pc_value_str = pc_value.GetValue()
-self.assertTrue (pc_value_str, "We should have a valid PC 
string.")
-self.assertTrue (int(pc_value_str, 0) == frame.GetPC(), "PC 
gotten as a value should equal frame's GetPC")
+pc_value_int = int(pc_value.GetValue(), 0)
+# Make sure on arm targets we dont mismatch PC value on the 
basis of thumb bit.
+# Frame PC will not have thumb bit set in case of a thumb 
instruction as PC.
+if self.getArchitecture() in ['arm']:
+pc_value_int &= ~1
+self.assertTrue (pc_value_int == frame.GetPC(), "PC gotten as 
a value should equal frame's GetPC")
 sp_value = gpr_reg_set.GetChildMemberWithName("sp")
 self.assertTrue (sp_value, "We should have a valid Stack 
Pointer.")
 self.assertTrue (int(sp_value.GetValue(), 0) == frame.GetSP(), 
"SP gotten as a value should equal frame's GetSP")


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[Lldb-commits] [lldb] r256847 - Fix for undefined behavior while updating PC value on arm-linux

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Tue Jan  5 10:56:13 2016
New Revision: 256847

URL: http://llvm.org/viewvc/llvm-project?rev=256847&view=rev
Log:
Fix for undefined behavior while updating PC value on arm-linux

Differential revision: http://reviews.llvm.org/D15877


Modified:
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp

Modified: 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp?rev=256847&r1=256846&r2=256847&view=diff
==
--- lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp 
(original)
+++ lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp 
Tue Jan  5 10:56:13 2016
@@ -973,7 +973,24 @@ NativeRegisterContextLinux_arm::DoWriteR
 if (error.Fail())
 return error;
 
-m_gpr_arm[offset / sizeof(uint32_t)] = value.GetAsUInt32();
+uint32_t reg_value = value.GetAsUInt32();
+// As precaution for an undefined behavior encountered while setting PC we
+// will clear thumb bit of new PC if we are already in thumb mode; that is
+// CPSR thumb mode bit is set.
+if (offset / sizeof(uint32_t) == gpr_pc_arm)
+{
+// Check if we are already in thumb mode and
+// thumb bit of current PC is read out to be zero and
+// thumb bit of next PC is read out to be one.
+if ((m_gpr_arm[gpr_cpsr_arm] &  0x20) &&
+!(m_gpr_arm[gpr_pc_arm] &  0x01) &&
+(value.GetAsUInt32() & 0x01))
+{
+reg_value &= (~1ull);
+}
+}
+
+m_gpr_arm[offset / sizeof(uint32_t)] = reg_value;
 return DoWriteGPR(m_gpr_arm, sizeof(m_gpr_arm));
 }
 


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Re: [Lldb-commits] [PATCH] D15533: Make the aarch64 lldb-server capable of debugging arm32 applications

[Omair Javaid via lldb-commits]

LGTM.

I think we should submit this patch as tberghammer explained.

On 8 January 2016 at 19:24, Tamas Berghammer  wrote:
> tberghammer added a comment.
>
> @omjavaid: What is your opinion about submitting this patch in its current 
> form with knowing that setting watchpoints from a 64bit lldb-server into 
> 32bit inferior will fail?
>
> I think this patch is a step in the good direction to make a 64bit 
> lldb-server capable of debugging a 32bit inferior. Considering how few 
> arm/aarch64 (android) devices are supporting watchpoints I don't think we 
> should block on that issue.
>
>
> http://reviews.llvm.org/D15533
>
>
>
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[Lldb-commits] [lldb] r257405 - Xfail some Arm-Linux specific failures

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Mon Jan 11 16:52:18 2016
New Revision: 257405

URL: http://llvm.org/viewvc/llvm-project?rev=257405&view=rev
Log:
Xfail some Arm-Linux specific failures

Updated expectedFailureLinux decorator to reflect architecture

Marked some triaged failures as xfails on arm with updated expectedFailureLinux 
decorator

Differential revision: http://reviews.llvm.org/D15893


Modified:

lldb/trunk/packages/Python/lldbsuite/test/functionalities/inferior-assert/TestInferiorAssert.py

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/step_over_watchpoint/TestStepOverWatchpoint.py

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_set_command/TestWatchLocationWithWatchSet.py
lldb/trunk/packages/Python/lldbsuite/test/lldbtest.py

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/inferior-assert/TestInferiorAssert.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/inferior-assert/TestInferiorAssert.py?rev=257405&r1=257404&r2=257405&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/inferior-assert/TestInferiorAssert.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/inferior-assert/TestInferiorAssert.py
 Mon Jan 11 16:52:18 2016
@@ -16,6 +16,7 @@ class AssertingInferiorTestCase(TestBase
 
 @expectedFailureWindows("llvm.org/pr21793: need to implement support for 
detecting assertion / abort on Windows")
 @expectedFailurei386("llvm.org/pr25338")
+@expectedFailureLinux("llvm.org/pr25338", archs=['arm', 'i386'])
 def test_inferior_asserting(self):
 """Test that lldb reliably catches the inferior asserting (command)."""
 self.build()
@@ -30,6 +31,7 @@ class AssertingInferiorTestCase(TestBase
 
 @expectedFailureWindows("llvm.org/pr21793: need to implement support for 
detecting assertion / abort on Windows")
 @expectedFailurei386("llvm.org/pr25338")
+@expectedFailureLinux("llvm.org/pr25338", archs=['arm', 'i386'])
 def test_inferior_asserting_disassemble(self):
 """Test that lldb reliably disassembles frames after asserting 
(command)."""
 self.build()
@@ -44,6 +46,7 @@ class AssertingInferiorTestCase(TestBase
 
 @expectedFailureWindows("llvm.org/pr21793: need to implement support for 
detecting assertion / abort on Windows")
 @expectedFailurei386("llvm.org/pr25338")
+@expectedFailureLinux("llvm.org/pr25338", archs=['arm', 'i386'])
 def test_inferior_asserting_expr(self):
 """Test that the lldb expression interpreter can read from the 
inferior after asserting (command)."""
 self.build()
@@ -51,6 +54,7 @@ class AssertingInferiorTestCase(TestBase
 
 @expectedFailureWindows("llvm.org/pr21793: need to implement support for 
detecting assertion / abort on Windows")
 @expectedFailurei386("llvm.org/pr25338")
+@expectedFailureLinux("llvm.org/pr25338", archs=['arm', 'i386'])
 def test_inferior_asserting_step(self):
 """Test that lldb functions correctly after stepping through a call to 
assert()."""
 self.build()

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/step_over_watchpoint/TestStepOverWatchpoint.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/step_over_watchpoint/TestStepOverWatchpoint.py?rev=257405&r1=257404&r2=257405&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/step_over_watchpoint/TestStepOverWatchpoint.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/step_over_watchpoint/TestStepOverWatchpoint.py
 Mon Jan 11 16:52:18 2016
@@ -17,6 +17,7 @@ class TestStepOverWatchpoint(TestBase):
 return ['basic_process']
 
 @expectedFailureAndroid(archs=['arm', 'aarch64']) # Watchpoints not 
supported
+@expectedFailureLinux(bugnumber="llvm.org/pr26031", archs=['arm'])
 @expectedFailureWindows("llvm.org/pr24446")
 def test(self):
 """Test stepping over watchpoints."""

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_set_command/TestWatchLocationWithWatchSet.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_set_command/TestWatchLocationWithWatchSet.py?rev=257405&r1=257404&r2=257405&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_set_command/TestWatchLocationWithWatchSet.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_set_command/TestWatchLocationWithWatchSet.py
 Mon

[Lldb-commits] [lldb] r258315 - Mark arm/aarch64 specific xfails with expectedFailureLinux decorator

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Wed Jan 20 09:01:54 2016
New Revision: 258315

URL: http://llvm.org/viewvc/llvm-project?rev=258315&view=rev
Log:
Mark arm/aarch64 specific xfails with expectedFailureLinux decorator

This patch marks some known failures and puts on expectedFailureLinux decorator 
to have testsuite xfail them.

Affected tests are: 

test/functionalities/watchpoint/step_over_watchpoint.py
test/functionalities/watchpoint/watchpoint_set_command/TestWatchLocationWithWatchSet.py
test/tools/lldb-server/TestGdbRemoteSingleStep.py
test/tools/lldb-server/TestGdbRemote_vCont.py


Modified:

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/step_over_watchpoint/TestStepOverWatchpoint.py

lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_set_command/TestWatchLocationWithWatchSet.py

lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/TestGdbRemoteSingleStep.py

lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/TestGdbRemote_vCont.py

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/step_over_watchpoint/TestStepOverWatchpoint.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/step_over_watchpoint/TestStepOverWatchpoint.py?rev=258315&r1=258314&r2=258315&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/step_over_watchpoint/TestStepOverWatchpoint.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/step_over_watchpoint/TestStepOverWatchpoint.py
 Wed Jan 20 09:01:54 2016
@@ -17,7 +17,7 @@ class TestStepOverWatchpoint(TestBase):
 return ['basic_process']
 
 @expectedFailureAndroid(archs=['arm', 'aarch64']) # Watchpoints not 
supported
-@expectedFailureLinux(bugnumber="llvm.org/pr26031", archs=['arm'])
+@expectedFailureLinux(bugnumber="llvm.org/pr26031", archs=['aarch64', 
'arm'])
 @expectedFailureWindows("llvm.org/pr24446")
 def test(self):
 """Test stepping over watchpoints."""

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_set_command/TestWatchLocationWithWatchSet.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_set_command/TestWatchLocationWithWatchSet.py?rev=258315&r1=258314&r2=258315&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_set_command/TestWatchLocationWithWatchSet.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_set_command/TestWatchLocationWithWatchSet.py
 Wed Jan 20 09:01:54 2016
@@ -27,7 +27,7 @@ class WatchLocationUsingWatchpointSetTes
 # Build dictionary to have unique executable names for each test 
method.
 
 @expectedFailureAndroid(archs=['arm', 'aarch64']) # Watchpoints not 
supported
-@expectedFailureLinux(bugnumber="llvm.org/pr26031", archs=['arm'])
+@expectedFailureLinux(bugnumber="llvm.org/pr26031", archs=['aarch64', 
'arm'])
 @expectedFailureWindows("llvm.org/pr24446") # WINDOWS XFAIL TRIAGE - 
Watchpoints not supported on Windows
 def test_watchlocation_using_watchpoint_set(self):
 """Test watching a location with 'watchpoint set expression -w write 
-s size' option."""

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/TestGdbRemoteSingleStep.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/TestGdbRemoteSingleStep.py?rev=258315&r1=258314&r2=258315&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/TestGdbRemoteSingleStep.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/TestGdbRemoteSingleStep.py
 Wed Jan 20 09:01:54 2016
@@ -17,7 +17,8 @@ class TestGdbRemoteSingleStep(gdbremote_
 self.single_step_only_steps_one_instruction(use_Hc_packet=True, 
step_instruction="s")
 
 @llgs_test
-@expectedFailureAndroid(bugnumber="llvm.com/pr24739", archs=["arm", 
"aarch64"])
+@expectedFailureAndroid(bugnumber="llvm.org/pr24739", archs=["arm", 
"aarch64"])
+@expectedFailureLinux(bugnumber="llvm.org/pr24739", archs=["arm", 
"aarch64"])
 def test_single_step_only_steps_one_instruction_with_s_llgs(self):
 self.init_llgs_test()
 self.build()

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/TestGdbRemote_vCont.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/tools/lldb-server/TestGdbRemote_vCont.py?rev=258315&r1=258314&r2=258315&view=diff
==
--

[Lldb-commits] [lldb] r258930 - Decorarte TestInferiorAssert xfails on AArch64 Linux

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Wed Jan 27 07:57:33 2016
New Revision: 258930

URL: http://llvm.org/viewvc/llvm-project?rev=258930&view=rev
Log:
Decorarte TestInferiorAssert xfails on AArch64 Linux

This patch decorates some of TestInferiorAssert test cases with 
expectedFailureLinux on AArch64.


Modified:

lldb/trunk/packages/Python/lldbsuite/test/functionalities/inferior-assert/TestInferiorAssert.py

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/inferior-assert/TestInferiorAssert.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/inferior-assert/TestInferiorAssert.py?rev=258930&r1=258929&r2=258930&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/inferior-assert/TestInferiorAssert.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/inferior-assert/TestInferiorAssert.py
 Wed Jan 27 07:57:33 2016
@@ -29,7 +29,7 @@ class AssertingInferiorTestCase(TestBase
 self.inferior_asserting_registers()
 
 @expectedFailureWindows("llvm.org/pr21793: need to implement support for 
detecting assertion / abort on Windows")
-@expectedFailureLinux("llvm.org/pr25338", archs=['arm'])
+@expectedFailureLinux("llvm.org/pr25338", archs=['aarch64', 'arm'])
 def test_inferior_asserting_disassemble(self):
 """Test that lldb reliably disassembles frames after asserting 
(command)."""
 self.build()
@@ -43,14 +43,14 @@ class AssertingInferiorTestCase(TestBase
 self.inferior_asserting_python()
 
 @expectedFailureWindows("llvm.org/pr21793: need to implement support for 
detecting assertion / abort on Windows")
-@expectedFailureLinux("llvm.org/pr25338", archs=['arm'])
+@expectedFailureLinux("llvm.org/pr25338", archs=['aarch64', 'arm'])
 def test_inferior_asserting_expr(self):
 """Test that the lldb expression interpreter can read from the 
inferior after asserting (command)."""
 self.build()
 self.inferior_asserting_expr()
 
 @expectedFailureWindows("llvm.org/pr21793: need to implement support for 
detecting assertion / abort on Windows")
-@expectedFailureLinux("llvm.org/pr25338", archs=['arm'])
+@expectedFailureLinux("llvm.org/pr25338", archs=['aarch64', 'arm'])
 def test_inferior_asserting_step(self):
 """Test that lldb functions correctly after stepping through a call to 
assert()."""
 self.build()


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[Lldb-commits] [lldb] r259885 - Add support to detect arm hard float ABI based binaries for ABISysV_arm

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Fri Feb  5 08:37:53 2016
New Revision: 259885

URL: http://llvm.org/viewvc/llvm-project?rev=259885&view=rev
Log:
Add support to detect arm hard float ABI based binaries for ABISysV_arm

This patch adds logic to detect if underlying binary is using arm hard float 
abi and use that information while handling return values in ABISysV_arm.

Differential revision: http://reviews.llvm.org/D16627


Modified:
lldb/trunk/include/lldb/Core/ArchSpec.h
lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp
lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.h
lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp

Modified: lldb/trunk/include/lldb/Core/ArchSpec.h
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Core/ArchSpec.h?rev=259885&r1=259884&r2=259885&view=diff
==
--- lldb/trunk/include/lldb/Core/ArchSpec.h (original)
+++ lldb/trunk/include/lldb/Core/ArchSpec.h Fri Feb  5 08:37:53 2016
@@ -72,6 +72,13 @@ public:
 eMIPSABI_mask   = 0x000ff000
 };
 
+// ARM specific e_flags
+enum ARMeflags
+{
+eARM_abi_soft_float = 0x0200,
+eARM_abi_hard_float = 0x0400
+};
+
 enum Core
 {
 eCore_arm_generic,

Modified: lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp?rev=259885&r1=259884&r2=259885&view=diff
==
--- lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp (original)
+++ lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp Fri Feb  5 08:37:53 
2016
@@ -414,6 +414,20 @@ GetReturnValuePassedInMemory(Thread &thr
 return true;
 }
 
+bool
+ABISysV_arm::IsArmHardFloat (Thread &thread) const
+{
+ProcessSP process_sp (thread.GetProcess());
+if (process_sp)
+{
+const ArchSpec &arch (process_sp->GetTarget().GetArchitecture());
+
+return (arch.GetFlags() & ArchSpec::eARM_abi_hard_float) != 0;
+}
+
+return false;
+}
+
 ValueObjectSP
 ABISysV_arm::GetReturnValueObjectImpl (Thread &thread,
lldb_private::CompilerType 
&compiler_type) const
@@ -516,19 +530,42 @@ ABISysV_arm::GetReturnValueObjectImpl (T
 case 64:
 {
 static_assert(sizeof(double) == sizeof(uint64_t), "");
-const RegisterInfo *r1_reg_info = 
reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2);
-uint64_t raw_value;
-raw_value = reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 
0) & UINT32_MAX;
-raw_value |= 
((uint64_t)(reg_ctx->ReadRegisterAsUnsigned(r1_reg_info, 0) & UINT32_MAX)) << 
32;
-value.GetScalar() = *reinterpret_cast(&raw_value);
+
+if (IsArmHardFloat(thread))
+{
+RegisterValue reg_value;
+const RegisterInfo *d0_reg_info = 
reg_ctx->GetRegisterInfoByName("d0", 0);
+reg_ctx->ReadRegister(d0_reg_info, reg_value);
+value.GetScalar() = reg_value.GetAsDouble();
+}
+else
+{
+uint64_t raw_value;
+const RegisterInfo *r1_reg_info = 
reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2);
+raw_value = 
reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX;
+raw_value |= 
((uint64_t)(reg_ctx->ReadRegisterAsUnsigned(r1_reg_info, 0) & UINT32_MAX)) << 
32;
+value.GetScalar() = 
*reinterpret_cast(&raw_value);
+}
 break;
 }
 case 16: // Half precision returned after a conversion to 
single precision
 case 32:
 {
 static_assert(sizeof(float) == sizeof(uint32_t), "");
-uint32_t raw_value = 
reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX;
-value.GetScalar() = *reinterpret_cast(&raw_value);
+
+if (IsArmHardFloat(thread))
+{
+RegisterValue reg_value;
+const RegisterInfo *s0_reg_info = 
reg_ctx->GetRegisterInfoByName("s0", 0);
+reg_ctx->ReadRegister(s0_reg_info, reg_value);
+value.GetScalar() = reg_value.GetAsFloat();
+}
+else
+{
+uint32_t raw_value;
+raw_value = 
reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX;
+value.GetScalar() = 
*reinterpret_cast(&raw_value);
+

[Lldb-commits] [lldb] r260512 - Handle floating-point type homogeneous aggregate return values in ABISysV_arm

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Thu Feb 11 05:41:22 2016
New Revision: 260512

URL: http://llvm.org/viewvc/llvm-project?rev=260512&view=rev
Log:
Handle floating-point type homogeneous aggregate return values in ABISysV_arm

For details refer to review link given below.

Differential revision: http://reviews.llvm.org/D16975



Modified:
lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp

Modified: lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp?rev=260512&r1=260511&r2=260512&view=diff
==
--- lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp (original)
+++ lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp Thu Feb 11 05:41:22 
2016
@@ -579,6 +579,82 @@ ABISysV_arm::GetReturnValueObjectImpl (T
 else if (compiler_type.IsAggregateType())
 {
 size_t byte_size = compiler_type.GetByteSize(&thread);
+if (IsArmHardFloat(thread))
+{
+CompilerType base_type;
+const uint32_t homogeneous_count = 
compiler_type.IsHomogeneousAggregate (&base_type);
+
+if (homogeneous_count > 0 && homogeneous_count <= 4)
+{
+if (base_type.IsFloatingPointType(float_count, is_complex))
+{
+if (float_count == 1 && !is_complex)
+{
+ProcessSP process_sp (thread.GetProcess());
+ByteOrder byte_order = process_sp->GetByteOrder();
+
+DataBufferSP data_sp (new DataBufferHeap(byte_size, 
0));
+const size_t base_byte_size = 
base_type.GetByteSize(nullptr);
+uint32_t data_offset = 0;
+
+for (uint32_t reg_index = 0; reg_index < 
homogeneous_count; reg_index++)
+{
+uint32_t regnum = 0;
+
+if (base_byte_size == 4)
+regnum = dwarf_s0 + reg_index;
+else if (base_byte_size == 8)
+regnum = dwarf_d0 + reg_index;
+else
+break;
+
+const RegisterInfo *reg_info = 
reg_ctx->GetRegisterInfo (eRegisterKindDWARF, regnum);
+if (reg_info == NULL)
+break;
+
+RegisterValue reg_value;
+if (!reg_ctx->ReadRegister(reg_info, reg_value))
+break;
+
+// Make sure we have enough room in "data_sp"
+if ((data_offset + base_byte_size) <= 
data_sp->GetByteSize())
+{
+Error error;
+const size_t bytes_copied = 
reg_value.GetAsMemoryData (reg_info,
+   
data_sp->GetBytes() + data_offset,
+   
base_byte_size,
+   
byte_order,
+   
error);
+if (bytes_copied != base_byte_size)
+break;
+
+data_offset += bytes_copied;
+}
+}
+
+if (data_offset == byte_size)
+{
+DataExtractor data;
+data.SetByteOrder(byte_order);
+
data.SetAddressByteSize(process_sp->GetAddressByteSize());
+data.SetData(data_sp);
+
+return ValueObjectConstResult::Create (&thread, 
compiler_type, ConstString(""), data);
+}
+else
+{   // Some error occurred while getting values from 
registers
+return return_valobj_sp;
+}
+
+}
+else
+{   // TODO: Add code to handle complex and vector types.
+return return_valobj_sp;
+}
+}
+}
+}
+
 if (byte_size <= 4)
 {
 RegisterValue r0_reg_value;


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[Lldb-commits] [lldb] r261734 - Fix test for homogeneity in case of aggregate consisting of containerized vector types

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Wed Feb 24 06:17:43 2016
New Revision: 261734

URL: http://llvm.org/viewvc/llvm-project?rev=261734&view=rev
Log:
Fix test for homogeneity in case of aggregate consisting of containerized 
vector types

Details can be found here:

Differential revision: http://reviews.llvm.org/D17501


Modified:
lldb/trunk/source/Symbol/ClangASTContext.cpp

Modified: lldb/trunk/source/Symbol/ClangASTContext.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Symbol/ClangASTContext.cpp?rev=261734&r1=261733&r2=261734&view=diff
==
--- lldb/trunk/source/Symbol/ClangASTContext.cpp (original)
+++ lldb/trunk/source/Symbol/ClangASTContext.cpp Wed Feb 24 06:17:43 2016
@@ -3100,9 +3100,11 @@ ClangASTContext::IsHomogeneousAggregate
 bool is_hva = false;
 bool is_hfa = false;
 clang::QualType base_qual_type;
+uint64_t base_bitwidth = 0;
 for (field_pos = record_decl->field_begin(); field_pos 
!= field_end; ++field_pos)
 {
 clang::QualType field_qual_type = 
field_pos->getType();
+uint64_t field_bitwidth = 
getASTContext()->getTypeSize (qual_type);
 if (field_qual_type->isFloatingType())
 {
 if (field_qual_type->isComplexType())
@@ -3123,22 +3125,21 @@ ClangASTContext::IsHomogeneousAggregate
 }
 else if (field_qual_type->isVectorType() || 
field_qual_type->isExtVectorType())
 {
-const clang::VectorType *array = 
field_qual_type.getTypePtr()->getAs();
-if (array && array->getNumElements() <= 4)
+if (num_fields == 0)
 {
-if (num_fields == 0)
-base_qual_type = 
array->getElementType();
-else
-{
-if (is_hfa)
-return 0;
-is_hva = true;
-if (field_qual_type.getTypePtr() != 
base_qual_type.getTypePtr())
-return 0;
-}
+base_qual_type = field_qual_type;
+base_bitwidth = field_bitwidth;
 }
 else
-return 0;
+{
+if (is_hfa)
+return 0;
+is_hva = true;
+if (base_bitwidth != field_bitwidth)
+return 0;
+if (field_qual_type.getTypePtr() != 
base_qual_type.getTypePtr())
+return 0;
+}
 }
 else
 return 0;


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[Lldb-commits] [lldb] r262218 - Add/Improve complex, vector, aggregate types handling for SysV ARM (hard/soft) ABI.

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Mon Feb 29 07:39:20 2016
New Revision: 262218

URL: http://llvm.org/viewvc/llvm-project?rev=262218&view=rev
Log:
Add/Improve complex, vector, aggregate types handling for SysV ARM (hard/soft) 
ABI.

For details see:

Differential revision: http://reviews.llvm.org/D17708


Modified:

lldb/trunk/packages/Python/lldbsuite/test/functionalities/return-value/TestReturnValue.py
lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp

Modified: 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/return-value/TestReturnValue.py
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/return-value/TestReturnValue.py?rev=262218&r1=262217&r2=262218&view=diff
==
--- 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/return-value/TestReturnValue.py
 (original)
+++ 
lldb/trunk/packages/Python/lldbsuite/test/functionalities/return-value/TestReturnValue.py
 Mon Feb 29 07:39:20 2016
@@ -151,11 +151,11 @@ class ReturnValueTestCase(TestBase):
 #self.return_and_test_struct_value ("return_one_int_one_double_packed")
 self.return_and_test_struct_value ("return_one_int_one_long")
 
+self.return_and_test_struct_value ("return_vector_size_float32_8")
+self.return_and_test_struct_value ("return_vector_size_float32_16")
+self.return_and_test_struct_value ("return_vector_size_float32_32")
 # icc and gcc don't support this extension.
 if self.getCompiler().endswith('clang'):
-self.return_and_test_struct_value ("return_vector_size_float32_8")
-self.return_and_test_struct_value ("return_vector_size_float32_16")
-self.return_and_test_struct_value ("return_vector_size_float32_32")
 self.return_and_test_struct_value 
("return_ext_vector_size_float32_2")
 self.return_and_test_struct_value 
("return_ext_vector_size_float32_4")
 self.return_and_test_struct_value 
("return_ext_vector_size_float32_8")

Modified: lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp?rev=262218&r1=262217&r2=262218&view=diff
==
--- lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp (original)
+++ lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp Mon Feb 29 07:39:20 
2016
@@ -452,12 +452,16 @@ ABISysV_arm::GetReturnValueObjectImpl (T
 bool is_signed;
 bool is_complex;
 uint32_t float_count;
+bool is_vfp_candidate = false;
+uint8_t vfp_count = 0;
+uint8_t vfp_byte_size = 0;
 
 // Get the pointer to the first stack argument so we have a place to start 
 // when reading data
 
 const RegisterInfo *r0_reg_info = 
reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1);
 size_t bit_width = compiler_type.GetBitSize(&thread);
+size_t byte_size = compiler_type.GetByteSize(&thread);
 
 if (compiler_type.IsIntegerType (is_signed))
 {   
@@ -504,8 +508,13 @@ ABISysV_arm::GetReturnValueObjectImpl (T
 }
 else if (compiler_type.IsVectorType(nullptr, nullptr))
 {
-size_t byte_size = compiler_type.GetByteSize(&thread);
-if (byte_size <= 16)
+if (IsArmHardFloat(thread) && (byte_size == 8 || byte_size == 16))
+{
+is_vfp_candidate = true;
+vfp_byte_size = 8;
+vfp_count = (byte_size == 8?1:2);
+}
+else if (byte_size <= 16)
 {
 DataBufferHeap buffer(16, 0);
 uint32_t* buffer_ptr = (uint32_t*)buffer.GetBytes();
@@ -574,15 +583,23 @@ ABISysV_arm::GetReturnValueObjectImpl (T
 }
 }
 }
-else
+else if (is_complex && float_count == 2)
 {
+if (IsArmHardFloat(thread))
+{
+is_vfp_candidate = true;
+vfp_byte_size = byte_size / 2;
+vfp_count = 2;
+}
+else if (!GetReturnValuePassedInMemory(thread, reg_ctx, bit_width 
/ 8, value))
+return return_valobj_sp;
+}
+else
 // not handled yet
 return return_valobj_sp;
-}
 }
 else if (compiler_type.IsAggregateType())
 {
-size_t byte_size = compiler_type.GetByteSize(&thread);
 if (IsArmHardFloat(thread))
 {
 CompilerType base_type;
@@ -590,70 +607,59 @@ ABISysV_arm::GetReturnValueObjectImpl (T
 
 if (homogeneous_count > 0 && homogeneous_count <= 4)
 {
-if (base_type.IsFloatingPointType(float_count, is_complex))
+if (base_type.IsVectorType(nullptr, nullptr))
+{
+uint64_t base_byte_size = base_type.GetByteSize(nullptr);
+ 

[Lldb-commits] [lldb] r267405 - Handle invalid values of PLT entry size generated by linker

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Mon Apr 25 08:45:39 2016
New Revision: 267405

URL: http://llvm.org/viewvc/llvm-project?rev=267405&view=rev
Log:
Handle invalid values of PLT entry size generated by linker

Make sure we figure out correct plt entry field in case linker has generated a 
small value below realistic entry size like 4 bytes or below.

Differential revision: http://reviews.llvm.org/D19252


Modified:
lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp

Modified: lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp?rev=267405&r1=267404&r2=267405&view=diff
==
--- lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp (original)
+++ lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp Mon Apr 25 
08:45:39 2016
@@ -2610,7 +2610,10 @@ GetPltEntrySizeAndOffset(const ELFSectio
 elf_xword plt_entsize = plt_hdr->sh_addralign ?
 llvm::alignTo (plt_hdr->sh_entsize, plt_hdr->sh_addralign) : 
plt_hdr->sh_entsize;
 
-if (plt_entsize == 0)
+// Some linkers e.g ld for arm, fill plt_hdr->sh_entsize field incorrectly.
+// PLT entries relocation code in general requires multiple instruction and
+// should be greater than 4 bytes in most cases. Try to guess correct size 
just in case.
+if (plt_entsize <= 4)
 {
 // The linker haven't set the plt_hdr->sh_entsize field. Try to guess 
the size of the plt
 // entries based on the number of entries and the size of the plt 
section with the


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[Lldb-commits] [lldb] r267508 - Fix arm-linux-gnueabi regression due to rL267291

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Mon Apr 25 20:08:59 2016
New Revision: 267508

URL: http://llvm.org/viewvc/llvm-project?rev=267508&view=rev
Log:
Fix arm-linux-gnueabi regression due to rL267291

rL267291 introduces a lot regression on arm-linux LLDB testsuite.

This patch fixes half of them. I am merging it under already revied android 
counterpart.

Another patch fixing rest of the issue will follow this commit.

Differential revision: http://reviews.llvm.org/D19480


Modified:
lldb/trunk/source/Core/ArchSpec.cpp

Modified: lldb/trunk/source/Core/ArchSpec.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Core/ArchSpec.cpp?rev=267508&r1=267507&r2=267508&view=diff
==
--- lldb/trunk/source/Core/ArchSpec.cpp (original)
+++ lldb/trunk/source/Core/ArchSpec.cpp Mon Apr 25 20:08:59 2016
@@ -1016,7 +1016,11 @@ isCompatibleEnvironment(llvm::Triple::En
 // be compatible. This is required as a workaround for shared libraries 
compiled for Android
 // without the NOTE section indicating that they are using the Android ABI.
 if ((lhs == llvm::Triple::Android && rhs == llvm::Triple::EABI) ||
-(rhs == llvm::Triple::Android && lhs == llvm::Triple::EABI))
+(rhs == llvm::Triple::Android && lhs == llvm::Triple::EABI) ||
+(lhs == llvm::Triple::GNUEABI && rhs == llvm::Triple::EABI) ||
+(rhs == llvm::Triple::GNUEABI && lhs == llvm::Triple::EABI) ||
+(lhs == llvm::Triple::GNUEABIHF && rhs == llvm::Triple::EABIHF) ||
+(rhs == llvm::Triple::GNUEABIHF && lhs == llvm::Triple::EABIHF))
 return true;
 
 return false;


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[Lldb-commits] [lldb] r267550 - rL267291: Architecture change to thumb on parsing arm.attributes causes regression.

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Tue Apr 26 06:26:00 2016
New Revision: 267550

URL: http://llvm.org/viewvc/llvm-project?rev=267550&view=rev
Log:
rL267291: Architecture change to thumb on parsing arm.attributes causes 
regression.

Remove case handling elf arm attribute Tag_THUMB_ISA_use and setting 
architecture to thumb. 

Differential revision: http://reviews.llvm.org/D19520


Modified:
lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp

Modified: lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp?rev=267550&r1=267549&r2=267550&view=diff
==
--- lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp (original)
+++ lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp Tue Apr 26 
06:26:00 2016
@@ -1564,19 +1564,6 @@ ObjectFileELF::ParseARMAttributes(DataEx
 
 break;
 
-case llvm::ARMBuildAttrs::THUMB_ISA_use:
-{
-uint64_t ThumbISA = data.GetULEB128(&Offset);
-
-// NOTE: ignore ThumbISA == 
llvm::ARMBuildAttrs::AllowThumbDerived
-// since that derives it based on the architecutre/profile
-if (ThumbISA == llvm::ARMBuildAttrs::AllowThumb32)
-if (arch_spec.GetTriple().getArch() == 
llvm::Triple::UnknownArch ||
-arch_spec.GetTriple().getArch() == 
llvm::Triple::arm)
-arch_spec.GetTriple().setArch(llvm::Triple::thumb);
-
-break;
-}
 case llvm::ARMBuildAttrs::ABI_VFP_args:
 {
 uint64_t VFPArgs = data.GetULEB128(&Offset);


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[Lldb-commits] [lldb] r244419 - Fix for build errors on arm-linux-gnueabi-gcc

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Sun Aug  9 14:04:41 2015
New Revision: 244419

URL: http://llvm.org/viewvc/llvm-project?rev=244419&view=rev
Log:
Fix for build errors on arm-linux-gnueabi-gcc
http://reviews.llvm.org/D11256


Modified:
lldb/trunk/source/Host/common/Host.cpp
lldb/trunk/source/Host/posix/PipePosix.cpp
lldb/trunk/source/Plugins/Process/Linux/NativeProcessLinux.h
lldb/trunk/source/Plugins/Process/Linux/NativeThreadLinux.cpp

Modified: lldb/trunk/source/Host/common/Host.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Host/common/Host.cpp?rev=244419&r1=244418&r2=244419&view=diff
==
--- lldb/trunk/source/Host/common/Host.cpp (original)
+++ lldb/trunk/source/Host/common/Host.cpp Sun Aug  9 14:04:41 2015
@@ -143,7 +143,11 @@ private:
 #endif // __linux__
 
 #ifdef __linux__
+#if defined(__GNUC__) && (__GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 
8))
+static __thread volatile sig_atomic_t g_usr1_called;
+#else
 static thread_local volatile sig_atomic_t g_usr1_called;
+#endif
 
 static void
 SigUsr1Handler (int)

Modified: lldb/trunk/source/Host/posix/PipePosix.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Host/posix/PipePosix.cpp?rev=244419&r1=244418&r2=244419&view=diff
==
--- lldb/trunk/source/Host/posix/PipePosix.cpp (original)
+++ lldb/trunk/source/Host/posix/PipePosix.cpp Sun Aug  9 14:04:41 2015
@@ -13,6 +13,10 @@
 #include "llvm/ADT/SmallString.h"
 #include "llvm/Support/FileSystem.h"
 
+#if defined(__GNUC__) && (__GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 
8))
+#define _GLIBCXX_USE_NANOSLEEP
+#endif
+
 #include 
 #include 
 

Modified: lldb/trunk/source/Plugins/Process/Linux/NativeProcessLinux.h
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeProcessLinux.h?rev=244419&r1=244418&r2=244419&view=diff
==
--- lldb/trunk/source/Plugins/Process/Linux/NativeProcessLinux.h (original)
+++ lldb/trunk/source/Plugins/Process/Linux/NativeProcessLinux.h Sun Aug  9 
14:04:41 2015
@@ -171,7 +171,7 @@ namespace process_linux {
 const ProcessLaunchInfo &m_launch_info;
 };
 
-typedef std::function<::pid_t(Error &)> InitialOperation;
+typedef std::function< ::pid_t(Error &)> InitialOperation;
 
 // 
-
 // Private Instance Methods

Modified: lldb/trunk/source/Plugins/Process/Linux/NativeThreadLinux.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeThreadLinux.cpp?rev=244419&r1=244418&r2=244419&view=diff
==
--- lldb/trunk/source/Plugins/Process/Linux/NativeThreadLinux.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Linux/NativeThreadLinux.cpp Sun Aug  9 
14:04:41 2015
@@ -31,7 +31,7 @@
 #include 
 // Try to define a macro to encapsulate the tgkill syscall
 #define tgkill(pid, tid, sig) \
-syscall(SYS_tgkill, static_cast<::pid_t>(pid), static_cast<::pid_t>(tid), 
sig)
+syscall(SYS_tgkill, static_cast< ::pid_t>(pid), static_cast< 
::pid_t>(tid), sig)
 
 using namespace lldb;
 using namespace lldb_private;


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[Lldb-commits] [lldb] r244741 - Fix LLGS to enable read type watchpoints

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Wed Aug 12 06:30:21 2015
New Revision: 244741

URL: http://llvm.org/viewvc/llvm-project?rev=244741&view=rev
Log:
Fix LLGS to enable read type watchpoints
http://reviews.llvm.org/D11902

Modified:

lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp

lldb/trunk/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp

Modified: 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp?rev=244741&r1=244740&r2=244741&view=diff
==
--- 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp 
(original)
+++ 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp 
Wed Aug 12 06:30:21 2015
@@ -1018,6 +1018,9 @@ NativeRegisterContextLinux_x86_64::SetHa
 if (wp_index >= NumSupportedHardwareWatchpoints())
 return Error ("Watchpoint index out of range");
 
+if (watch_flags == 0x2)
+return Error ("Read watchpoints currently unsupported on x86_64 
architecture");
+
 if (watch_flags != 0x1 && watch_flags != 0x3)
 return Error ("Invalid read/write bits for watchpoint");
 

Modified: 
lldb/trunk/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp?rev=244741&r1=244740&r2=244741&view=diff
==
--- 
lldb/trunk/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
 (original)
+++ 
lldb/trunk/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
 Wed Aug 12 06:30:21 2015
@@ -2227,6 +2227,7 @@ GDBRemoteCommunicationServerLLGS::Handle
 
 bool want_breakpoint = true;
 bool want_hardware = false;
+uint32_t watch_flags = 0;
 
 const GDBStoppointType stoppoint_type =
 GDBStoppointType(packet.GetS32 (eStoppointInvalid));
@@ -2237,10 +2238,13 @@ GDBRemoteCommunicationServerLLGS::Handle
 case eBreakpointHardware:
 want_hardware = true;  want_breakpoint = true;  break;
 case eWatchpointWrite:
+watch_flags = 1;
 want_hardware = true;  want_breakpoint = false; break;
 case eWatchpointRead:
+watch_flags = 2;
 want_hardware = true;  want_breakpoint = false; break;
 case eWatchpointReadWrite:
+watch_flags = 3;
 want_hardware = true;  want_breakpoint = false; break;
 case eStoppointInvalid:
 return SendIllFormedResponse(packet, "Z packet had invalid 
software/hardware specifier");
@@ -2280,11 +2284,6 @@ GDBRemoteCommunicationServerLLGS::Handle
 }
 else
 {
-uint32_t watch_flags =
-stoppoint_type == eWatchpointWrite
-? 0x1  // Write
-: 0x3; // ReadWrite
-
 // Try to set the watchpoint.
 const Error error = m_debugged_process_sp->SetWatchpoint (
 addr, size, watch_flags, want_hardware);


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[Lldb-commits] [lldb] r244750 - Fix AArch64 watchpoint handlers in NativeRegisterContextLinux_arm64

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Wed Aug 12 08:42:24 2015
New Revision: 244750

URL: http://llvm.org/viewvc/llvm-project?rev=244750&view=rev
Log:
Fix AArch64 watchpoint handlers in NativeRegisterContextLinux_arm64

http://reviews.llvm.org/D11899


Modified:
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h

Modified: 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp?rev=244750&r1=244749&r2=244750&view=diff
==
--- 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp 
(original)
+++ 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp 
Wed Aug 12 08:42:24 2015
@@ -391,16 +391,8 @@ NativeRegisterContextLinux_arm64::SetHar
 if (log)
 log->Printf ("NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
 
-NativeProcessProtocolSP process_sp (m_thread.GetProcess ());
-if (!process_sp)
-return false;
-
-// Check if our hardware breakpoint and watchpoint information is updated.
-if (m_refresh_hwdebug_info)
-{
-ReadHardwareDebugInfo (m_max_hwp_supported, m_max_hbp_supported);
-m_refresh_hwdebug_info = false;
-}
+// Read hardware breakpoint and watchpoint information.
+ReadHardwareDebugInfo ();
 
 uint32_t control_value, bp_index;
 
@@ -443,7 +435,8 @@ NativeRegisterContextLinux_arm64::SetHar
 m_hbr_regs[bp_index].control = control_value;
 m_hbr_regs[bp_index].refcount = 1;
 
-//TODO: PTRACE CALL HERE for an UPDATE
+// PTRACE call to set corresponding hardware breakpoint register.
+WriteHardwareDebugRegs(eDREGTypeBREAK);
 }
 else
 m_hbr_regs[bp_index].refcount++;
@@ -459,6 +452,9 @@ NativeRegisterContextLinux_arm64::ClearH
 if (log)
 log->Printf ("NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
 
+// Read hardware breakpoint and watchpoint information.
+ReadHardwareDebugInfo ();
+
 if (hw_idx >= m_max_hbp_supported)
 return false;
 
@@ -474,8 +470,8 @@ NativeRegisterContextLinux_arm64::ClearH
 m_hbr_regs[hw_idx].address = 0;
 m_hbr_regs[hw_idx].refcount = 0;
 
-//TODO: PTRACE CALL HERE for an UPDATE
-return true;
+// PTRACE call to clear corresponding hardware breakpoint register.
+WriteHardwareDebugRegs(eDREGTypeBREAK);
 }
 
 return false;
@@ -489,6 +485,9 @@ NativeRegisterContextLinux_arm64::NumSup
 if (log)
 log->Printf ("NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
 
+// Read hardware breakpoint and watchpoint information.
+ReadHardwareDebugInfo ();
+
 return m_max_hwp_supported;
 }
 
@@ -499,33 +498,36 @@ NativeRegisterContextLinux_arm64::SetHar
 
 if (log)
 log->Printf ("NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
-
-NativeProcessProtocolSP process_sp (m_thread.GetProcess ());
-if (!process_sp)
-return false;
-
 
-// Check if our hardware breakpoint and watchpoint information is updated.
-if (m_refresh_hwdebug_info)
-{
-ReadHardwareDebugInfo (m_max_hwp_supported, m_max_hbp_supported);
-m_refresh_hwdebug_info = false;
-}
+// Read hardware breakpoint and watchpoint information.
+ReadHardwareDebugInfo ();

 uint32_t control_value, wp_index;
 
-
-if (watch_flags != 0x1 && watch_flags != 0x2 && watch_flags != 0x3)
-return 0;//Error ("Invalid read/write bits for watchpoint");
+// Check if we are setting watchpoint other than read/write/access
+// Also update watchpoint flag to match AArch64 write-read bit 
configuration.
+switch (watch_flags)
+{
+case 1:
+watch_flags = 2;
+break;
+case 2:
+watch_flags = 1;
+break;
+case 3:
+break;
+default:
+return LLDB_INVALID_INDEX32;
+}
 
 // Check if size has a valid hardware watchpoint length.
 if (size != 1 && size != 2 && size != 4 && size != 8)
-return 0;//Error ("Invalid size for watchpoint");
+return LLDB_INVALID_INDEX32;
 
 // Check 8-byte alignment for hardware watchpoint target address.
 // TODO: Add support for watching un-aligned addresses
 if (addr & 0x07)
-return 0;//Error ("LLDB for AArch64 currently supports 8-byte 
alignment for hardware watchpoint target address.");
+return LLDB_INVALID_INDEX32;
 
 // Setup control value
 control_value = watch_flags << 3;
@@ -554,12 +556,13 @@ NativeRegisterContextLinux_arm64::SetHar
 // Add new or update existing watchpoint
 if ((m_hwp_regs[wp_index].control & 1) == 0)
 {
+// Update watchpoint 

[Lldb-commits] [lldb] r245273 - Fix AArch64 watchpoint exception handling

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Tue Aug 18 03:28:06 2015
New Revision: 245273

URL: http://llvm.org/viewvc/llvm-project?rev=245273&view=rev
Log:
Fix AArch64 watchpoint exception handling
http://reviews.llvm.org/D11987

Modified:

lldb/trunk/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp

Modified: 
lldb/trunk/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp?rev=245273&r1=245272&r2=245273&view=diff
==
--- 
lldb/trunk/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
 (original)
+++ 
lldb/trunk/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
 Tue Aug 18 03:28:06 2015
@@ -181,7 +181,9 @@ GDBRemoteCommunicationServerCommon::Hand
 else
 response.Printf("watchpoint_exceptions_received:after;");
 #else
-if (host_arch.GetMachine() == llvm::Triple::mips64 ||
+if (host_arch.GetMachine() == llvm::Triple::aarch64 ||
+host_arch.GetMachine() == llvm::Triple::aarch64_be ||
+host_arch.GetMachine() == llvm::Triple::mips64 ||
 host_arch.GetMachine() == llvm::Triple::mips64el)
 response.Printf("watchpoint_exceptions_received:before;");
 else


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[Lldb-commits] [lldb] r245428 - Fix lldb-server arm-linux-g++ build

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Wed Aug 19 05:44:16 2015
New Revision: 245428

URL: http://llvm.org/viewvc/llvm-project?rev=245428&view=rev
Log:
Fix lldb-server arm-linux-g++ build


Modified:
lldb/trunk/source/Plugins/Process/Linux/NativeProcessLinux.cpp

Modified: lldb/trunk/source/Plugins/Process/Linux/NativeProcessLinux.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeProcessLinux.cpp?rev=245428&r1=245427&r2=245428&view=diff
==
--- lldb/trunk/source/Plugins/Process/Linux/NativeProcessLinux.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Linux/NativeProcessLinux.cpp Wed Aug 19 
05:44:16 2015
@@ -3284,7 +3284,7 @@ NativeProcessLinux::SigchldHandler()
 {
 signal = WTERMSIG(status);
 status_cstr = "SIGNALED";
-if (wait_pid == static_cast<::pid_t>(GetID())) {
+if (wait_pid == static_cast< ::pid_t>(GetID())) {
 exited = true;
 exit_status = -1;
 }


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[Lldb-commits] [lldb] r245961 - Adds support for hardware watchpoints on Arm targets.

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Tue Aug 25 13:22:04 2015
New Revision: 245961

URL: http://llvm.org/viewvc/llvm-project?rev=245961&view=rev
Log:
Adds support for hardware watchpoints on Arm targets.

http://reviews.llvm.org/D9703

This updated patches correct problems in arm hardware watchpoint support patch 
posted earlier.

This patch has been tested on samsung chromebook (ARM - Linux) and PandaBoard 
using basic watchpoint test application.

Also it was tested on Nexus 7 Android device.

On chromebook linux we are able to set and clear all types of watchpoints but 
on android we end up getting a watchpoint packet error because we are not able 
to call hardware watchpoint ptrace functions successfully.


Modified:
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h

lldb/trunk/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp

Modified: 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp?rev=245961&r1=245960&r2=245961&view=diff
==
--- lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp 
(original)
+++ lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp 
Tue Aug 25 13:22:04 2015
@@ -13,12 +13,24 @@
 
 #include "lldb/Core/DataBufferHeap.h"
 #include "lldb/Core/Error.h"
+#include "lldb/Core/Log.h"
 #include "lldb/Core/RegisterValue.h"
 
 #include "Plugins/Process/Utility/RegisterContextLinux_arm.h"
 
 #define REG_CONTEXT_SIZE (GetGPRSize() + sizeof (m_fpr))
 
+#ifndef PTRACE_GETHBPREGS
+  #define PTRACE_GETHBPREGS 29
+  #define PTRACE_SETHBPREGS 30
+#endif
+#if !defined(PTRACE_TYPE_ARG3)
+  #define PTRACE_TYPE_ARG3 void *
+#endif
+#if !defined(PTRACE_TYPE_ARG4)
+  #define PTRACE_TYPE_ARG4 void *
+#endif
+
 using namespace lldb;
 using namespace lldb_private;
 using namespace lldb_private::process_linux;
@@ -138,6 +150,12 @@ NativeRegisterContextLinux_arm::NativeRe
 
 ::memset(&m_fpr, 0, sizeof (m_fpr));
 ::memset(&m_gpr_arm, 0, sizeof (m_gpr_arm));
+::memset(&m_hwp_regs, 0, sizeof (m_hwp_regs));
+
+// 16 is just a maximum value, query hardware for actual watchpoint count
+m_max_hwp_supported = 16;
+m_max_hbp_supported = 16;
+m_refresh_hwdebug_info = true;
 }
 
 uint32_t
@@ -360,4 +378,470 @@ NativeRegisterContextLinux_arm::IsFPR(un
 return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
 }
 
+uint32_t
+NativeRegisterContextLinux_arm::SetHardwareBreakpoint (lldb::addr_t addr, 
size_t size)
+{
+Log *log(lldb_private::GetLogIfAllCategoriesSet (LIBLLDB_LOG_WATCHPOINTS));
+
+if (log)
+log->Printf ("NativeRegisterContextLinux_arm::%s()", __FUNCTION__);
+
+Error error;
+
+// Read hardware breakpoint and watchpoint information.
+error = ReadHardwareDebugInfo ();
+
+if (error.Fail())
+return LLDB_INVALID_INDEX32;
+
+uint32_t control_value = 0, bp_index = 0;
+
+// Check if size has a valid hardware breakpoint length.
+// Thumb instructions are 2-bytes but we have no way here to determine
+// if target address is a thumb or arm instruction.
+// TODO: Add support for setting thumb mode hardware breakpoints
+if (size != 4 && size != 2)
+return LLDB_INVALID_INDEX32;
+
+// Setup control value
+// Make the byte_mask into a valid Byte Address Select mask
+control_value = 0xfu << 5;
+
+// Enable this breakpoint and make it stop in privileged or user mode;
+control_value |= 7;
+
+// Make sure bits 1:0 are clear in our address
+// This should be different once we support thumb here.
+addr &= ~((lldb::addr_t)3);
+
+// Iterate over stored hardware breakpoints
+// Find a free bp_index or update reference count if duplicate.
+bp_index = LLDB_INVALID_INDEX32;
+
+for (uint32_t i = 0; i < m_max_hbp_supported; i++)
+{
+if ((m_hbr_regs[i].control & 1) == 0)
+{
+bp_index = i;  // Mark last free slot
+}
+else if (m_hbr_regs[i].address == addr && m_hbr_regs[i].control == 
control_value)
+{
+bp_index = i;  // Mark duplicate index
+break;  // Stop searching here
+}
+}
+
+ if (bp_index == LLDB_INVALID_INDEX32)
+ return LLDB_INVALID_INDEX32;
+
+// Add new or update existing watchpoint
+if ((m_hbr_regs[bp_index].control & 1) == 0)
+{
+m_hbr_regs[bp_index].address = addr;
+m_hbr_regs[bp_index].control = control_value;
+m_hbr_regs[bp_index].refcount = 1;
+
+// PTRACE call to set corresponding hardware breakpoint register.
+error = WriteHardwareDebugRegs(eDREGTypeBREAK, bp_index);
+
+if (error.Fail())
+return LLDB_INVALID_INDEX32;
+  

[Lldb-commits] [lldb] r246045 - Error checking correction in AArch64 hardware watchpoint code

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Wed Aug 26 13:23:27 2015
New Revision: 246045

URL: http://llvm.org/viewvc/llvm-project?rev=246045&view=rev
Log:
Error checking correction in AArch64 hardware watchpoint code

Differential Revision: http://reviews.llvm.org/D12328


Modified:
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp

Modified: 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp?rev=246045&r1=246044&r2=246045&view=diff
==
--- 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp 
(original)
+++ 
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp 
Wed Aug 26 13:23:27 2015
@@ -391,10 +391,15 @@ NativeRegisterContextLinux_arm64::SetHar
 if (log)
 log->Printf ("NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
 
+Error error;
+
 // Read hardware breakpoint and watchpoint information.
-ReadHardwareDebugInfo ();
+error = ReadHardwareDebugInfo ();
 
-uint32_t control_value, bp_index;
+if (error.Fail())
+return LLDB_INVALID_INDEX32;
+
+uint32_t control_value = 0, bp_index = 0;
 
 // Check if size has a valid hardware breakpoint length.
 if (size != 4)
@@ -436,7 +441,10 @@ NativeRegisterContextLinux_arm64::SetHar
 m_hbr_regs[bp_index].refcount = 1;
 
 // PTRACE call to set corresponding hardware breakpoint register.
-WriteHardwareDebugRegs(eDREGTypeBREAK);
+error = WriteHardwareDebugRegs(eDREGTypeBREAK);
+
+if (error.Fail())
+return LLDB_INVALID_INDEX32;
 }
 else
 m_hbr_regs[bp_index].refcount++;
@@ -452,8 +460,13 @@ NativeRegisterContextLinux_arm64::ClearH
 if (log)
 log->Printf ("NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
 
+Error error;
+
 // Read hardware breakpoint and watchpoint information.
-ReadHardwareDebugInfo ();
+error = ReadHardwareDebugInfo ();
+
+if (error.Fail())
+return false;
 
 if (hw_idx >= m_max_hbp_supported)
 return false;
@@ -472,6 +485,11 @@ NativeRegisterContextLinux_arm64::ClearH
 
 // PTRACE call to clear corresponding hardware breakpoint register.
 WriteHardwareDebugRegs(eDREGTypeBREAK);
+
+if (error.Fail())
+return false;
+
+return true;
 }
 
 return false;
@@ -485,8 +503,13 @@ NativeRegisterContextLinux_arm64::NumSup
 if (log)
 log->Printf ("NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
 
+Error error;
+
 // Read hardware breakpoint and watchpoint information.
-ReadHardwareDebugInfo ();
+error = ReadHardwareDebugInfo ();
+
+if (error.Fail())
+return LLDB_INVALID_INDEX32;
 
 return m_max_hwp_supported;
 }
@@ -499,10 +522,15 @@ NativeRegisterContextLinux_arm64::SetHar
 if (log)
 log->Printf ("NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
 
+Error error;
+
 // Read hardware breakpoint and watchpoint information.
-ReadHardwareDebugInfo ();
+error = ReadHardwareDebugInfo ();
+
+if (error.Fail())
+return LLDB_INVALID_INDEX32;

-uint32_t control_value, wp_index;
+uint32_t control_value = 0, wp_index = 0;
 
 // Check if we are setting watchpoint other than read/write/access
 // Also update watchpoint flag to match AArch64 write-read bit 
configuration.
@@ -562,7 +590,10 @@ NativeRegisterContextLinux_arm64::SetHar
 m_hwp_regs[wp_index].refcount = 1;
 
 // PTRACE call to set corresponding watchpoint register.
-WriteHardwareDebugRegs(eDREGTypeWATCH);
+error = WriteHardwareDebugRegs(eDREGTypeWATCH);
+
+if (error.Fail())
+return LLDB_INVALID_INDEX32;
 }
 else
 m_hwp_regs[wp_index].refcount++;
@@ -578,8 +609,13 @@ NativeRegisterContextLinux_arm64::ClearH
 if (log)
 log->Printf ("NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
 
+Error error;
+
 // Read hardware breakpoint and watchpoint information.
-ReadHardwareDebugInfo ();
+error = ReadHardwareDebugInfo ();
+
+if (error.Fail())
+return false;
 
 if (wp_index >= m_max_hwp_supported)
 return false;
@@ -598,7 +634,11 @@ NativeRegisterContextLinux_arm64::ClearH
 m_hwp_regs[wp_index].refcount = 0;
 
 // Ptrace call to update hardware debug registers
-WriteHardwareDebugRegs(eDREGTypeWATCH);
+error = WriteHardwareDebugRegs(eDREGTypeWATCH);
+
+if (error.Fail())
+return false;
+
 return true;
 }
 
@@ -613,8 +653,13 @@ NativeRegisterContextLinux_arm64::ClearA
 if (log)
 log->Printf ("NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
 
+Error error;
+
 // Read hardware b

[Lldb-commits] [lldb] [lldb-dap] Added "port" property to vscode "attach" command. (PR #91570)

[Omair Javaid via lldb-commits]

omjavaid wrote:

This breaks   lldb-api :: 
tools/lldb-server/commandline/TestGdbRemoteConnection.py on 
lldb-aarch64-windows bot.

https://lab.llvm.org/buildbot/#/builders/141/builds/376


https://github.com/llvm/llvm-project/pull/91570
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[Lldb-commits] [lldb] [lldb/aarch64] Fix unwinding when signal interrupts a leaf function (PR #91321)

[Omair Javaid via lldb-commits]

omjavaid wrote:

@labath this seems to have broken lldb-aarch64-windows bot with 
TestInterruptBacktrace.py failing on 
num_frames = thread.GetNumFrames()


https://github.com/llvm/llvm-project/pull/91321
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[Lldb-commits] [lldb] [lldb/aarch64] Fix unwinding when signal interrupts a leaf function (PR #91321)

[Omair Javaid via lldb-commits]

omjavaid wrote:

LLDB became unresponsive on windows when a `thread backtrace` command was 
issued  after hitting the exception
i have temporarily reverted the change to make buildbot green.

https://github.com/llvm/llvm-project/pull/91321
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[Lldb-commits] [lldb] [lldb/aarch64] Fix unwinding when signal interrupts a leaf function (PR #91321)

[Omair Javaid via lldb-commits]

omjavaid wrote:

> > LLDB became unresponsive on windows when a `thread backtrace` command was 
> > issued after hitting the exception i have temporarily reverted the change 
> > to make buildbot green.
> 
> Could you please give me some more information about the problem? I don't 
> have access to a windows arm machine, and the failure message doesn't give me 
> much to go on.

I will try to debug and get back with more information. If you need specific 
information or logs please let me know.

https://github.com/llvm/llvm-project/pull/91321
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[Lldb-commits] [lldb] WoA HW Break and Watchpoint support in LLDB (PR #108072)

[Omair Javaid via lldb-commits]

https://github.com/omjavaid created 
https://github.com/llvm/llvm-project/pull/108072

This pull request adds support for hardware breakpoints and watchpoints in LLDB 
on Windows on ARM.

### Known Issues:

1. **Number of Supported Hardware Breakpoints/Watchpoints:** Windows does not 
provide the exact number of supported hardware breakpoints or watchpoints. The 
current implementation guesses this number based on testing how many can be 
successfully applied on the platform. winnt.h defines ARM64_MAX_WATCHPOINTS = 2 
and ARM64_MAX_BREAKPOINTS = 8 however actual number differs.

2. **Initial Stop Behavior:** Hardware breakpoints or watchpoints set on the 
initial stop do not trigger, even though they are correctly written to the 
Windows context. They only trigger if set after the main program has started. 
This issue causes the test suite to fail when it attempts to set hardware 
breakpoints on the main function before running, as these do not get triggered.

### Testing:

1. Tested setting 1 hardware watchpoint and 6 hardware breakpoints on 
snapdragon elite x hardware.
2. The LLDB test suite currently fails related tests due to the initial stop 
behavior issue described above.

>From 1c29d30f0b9eb47da63c35f775ad69e1ef40c4de Mon Sep 17 00:00:00 2001
From: Muhammad Omair Javaid 
Date: Tue, 10 Sep 2024 18:03:29 +0500
Subject: [PATCH] WoA hardware breakpoint/watchpoint support

---
 .../Windows/Common/NativeProcessWindows.cpp   | 52 ---
 .../Common/NativeRegisterContextWindows.cpp   |  3 -
 .../Common/NativeRegisterContextWindows.h |  5 +-
 .../NativeRegisterContextWindows_WoW64.cpp|  2 +-
 .../NativeRegisterContextWindows_arm.cpp  |  2 +-
 .../NativeRegisterContextWindows_arm64.cpp| 86 ++-
 .../NativeRegisterContextWindows_arm64.h  | 31 ++-
 .../NativeRegisterContextWindows_i386.cpp |  2 +-
 .../NativeRegisterContextWindows_x86_64.cpp   |  2 +-
 .../Windows/Common/NativeThreadWindows.cpp| 32 +++
 10 files changed, 129 insertions(+), 88 deletions(-)

diff --git 
a/lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp 
b/lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
index 24c9aa6b32659d..886df987dc84b6 100644
--- a/lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
+++ b/lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
@@ -491,24 +491,47 @@ NativeProcessWindows::OnDebugException(bool first_chance,
 return ExceptionResult::MaskException;
   }
   case DWORD(STATUS_BREAKPOINT):
-  case STATUS_WX86_BREAKPOINT:
-if (FindSoftwareBreakpoint(record.GetExceptionAddress())) {
-  LLDB_LOG(log, "Hit non-loader breakpoint at address {0:x}.",
-   record.GetExceptionAddress());
-
-  StopThread(record.GetThreadID(), StopReason::eStopReasonBreakpoint);
-
-  if (NativeThreadWindows *stop_thread =
-  GetThreadByID(record.GetThreadID())) {
-auto ®ister_context = stop_thread->GetRegisterContext();
+  case STATUS_WX86_BREAKPOINT: {
+bool breakpoint_hit = false;
+NativeThreadWindows *stop_thread = GetThreadByID(record.GetThreadID());
+
+if (stop_thread) {
+  uint32_t hw_id = LLDB_INVALID_INDEX32;
+  auto ®_ctx = stop_thread->GetRegisterContext();
+  reg_ctx.GetHardwareBreakHitIndex(hw_id, record.GetExceptionAddress());
+  if (hw_id != LLDB_INVALID_INDEX32) {
+breakpoint_hit = true;
+LLDB_LOG(log, "Hit hardware breakpoint at address {0:x}.",
+ record.GetExceptionAddress());
+  } else if (FindSoftwareBreakpoint(record.GetExceptionAddress())) {
+breakpoint_hit = true;
+LLDB_LOG(log, "Hit non-loader breakpoint at address {0:x}.",
+ record.GetExceptionAddress());
 uint32_t breakpoint_size = GetSoftwareBreakpointPCOffset();
 // The current PC is AFTER the BP opcode, on all architectures.
-uint64_t pc = register_context.GetPC() - breakpoint_size;
-register_context.SetPC(pc);
+uint64_t pc = reg_ctx.GetPC() - breakpoint_size;
+reg_ctx.SetPC(pc);
   }
 
-  SetState(eStateStopped, true);
-  return ExceptionResult::MaskException;
+  if (breakpoint_hit) {
+StopThread(record.GetThreadID(), StopReason::eStopReasonBreakpoint);
+SetState(eStateStopped, true);
+return ExceptionResult::MaskException;
+  } else {
+const std::vector &args = record.GetExceptionArguments();
+if (args.size() >= 2) {
+  reg_ctx.GetWatchpointHitIndex(hw_id, args[1]);
+  if (hw_id != LLDB_INVALID_INDEX32) {
+addr_t wp_pc = record.GetExceptionAddress();
+std::string desc =
+formatv("{0} {1} {2}", args[1], hw_id, wp_pc).str();
+StopThread(record.GetThreadID(), StopReason::eStopReasonWatchpoint,
+   desc);
+SetState(eStateStopped, true);
+return ExceptionResult::MaskException;
+   

[Lldb-commits] [lldb] WoA HW Break and Watchpoint support in LLDB (PR #108072)

[Omair Javaid via lldb-commits]

https://github.com/omjavaid updated 
https://github.com/llvm/llvm-project/pull/108072

>From ac61e5a75ce59f7834034494a03b43e81bf02d41 Mon Sep 17 00:00:00 2001
From: Muhammad Omair Javaid 
Date: Tue, 10 Sep 2024 18:03:29 +0500
Subject: [PATCH] WoA hardware breakpoint/watchpoint support

---
 .../Windows/Common/NativeProcessWindows.cpp   | 52 ---
 .../Common/NativeRegisterContextWindows.cpp   |  3 -
 .../Common/NativeRegisterContextWindows.h |  6 +-
 .../NativeRegisterContextWindows_WoW64.cpp|  4 +-
 .../NativeRegisterContextWindows_arm.cpp  |  4 +-
 .../NativeRegisterContextWindows_arm64.cpp| 86 ++-
 .../NativeRegisterContextWindows_arm64.h  | 32 ++-
 .../NativeRegisterContextWindows_i386.cpp |  4 +-
 .../NativeRegisterContextWindows_x86_64.cpp   |  4 +-
 .../Windows/Common/NativeThreadWindows.cpp| 32 +++
 10 files changed, 135 insertions(+), 92 deletions(-)

diff --git 
a/lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp 
b/lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
index 24c9aa6b32659d..87a811123d5de8 100644
--- a/lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
+++ b/lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
@@ -491,24 +491,47 @@ NativeProcessWindows::OnDebugException(bool first_chance,
 return ExceptionResult::MaskException;
   }
   case DWORD(STATUS_BREAKPOINT):
-  case STATUS_WX86_BREAKPOINT:
-if (FindSoftwareBreakpoint(record.GetExceptionAddress())) {
-  LLDB_LOG(log, "Hit non-loader breakpoint at address {0:x}.",
-   record.GetExceptionAddress());
-
-  StopThread(record.GetThreadID(), StopReason::eStopReasonBreakpoint);
-
-  if (NativeThreadWindows *stop_thread =
-  GetThreadByID(record.GetThreadID())) {
-auto ®ister_context = stop_thread->GetRegisterContext();
+  case STATUS_WX86_BREAKPOINT: {
+bool breakpoint_hit = false;
+NativeThreadWindows *stop_thread = GetThreadByID(record.GetThreadID());
+
+if (stop_thread) {
+  uint32_t hw_id = LLDB_INVALID_INDEX32;
+  auto ®_ctx = stop_thread->GetRegisterContext();
+  reg_ctx.GetHardwareBreakHitIndex(hw_id, record.GetExceptionAddress());
+  if (hw_id != LLDB_INVALID_INDEX32) {
+breakpoint_hit = true;
+LLDB_LOG(log, "Hit hardware breakpoint at address {0:x}.",
+ record.GetExceptionAddress());
+  } else if (FindSoftwareBreakpoint(record.GetExceptionAddress())) {
+breakpoint_hit = true;
+LLDB_LOG(log, "Hit non-loader breakpoint at address {0:x}.",
+ record.GetExceptionAddress());
 uint32_t breakpoint_size = GetSoftwareBreakpointPCOffset();
 // The current PC is AFTER the BP opcode, on all architectures.
-uint64_t pc = register_context.GetPC() - breakpoint_size;
-register_context.SetPC(pc);
+uint64_t pc = reg_ctx.GetPC() - breakpoint_size;
+reg_ctx.SetPC(pc);
   }
 
-  SetState(eStateStopped, true);
-  return ExceptionResult::MaskException;
+  if (breakpoint_hit) {
+StopThread(record.GetThreadID(), StopReason::eStopReasonBreakpoint);
+SetState(eStateStopped, true);
+return ExceptionResult::MaskException;
+  } else {
+const std::vector &args = record.GetExceptionArguments();
+if (args.size() >= 2) {
+  reg_ctx.GetWatchpointHitIndex(hw_id, args[1]);
+  if (hw_id != LLDB_INVALID_INDEX32) {
+addr_t wp_pc = record.GetExceptionAddress();
+std::string desc =
+formatv("{0} {1} {2}", args[1], hw_id, wp_pc).str();
+StopThread(record.GetThreadID(), StopReason::eStopReasonWatchpoint,
+   desc);
+SetState(eStateStopped, true);
+return ExceptionResult::MaskException;
+  }
+}
+  }
 }
 
 if (!initial_stop) {
@@ -531,6 +554,7 @@ NativeProcessWindows::OnDebugException(bool first_chance,
   // Hit the initial stop. Continue the application.
   return ExceptionResult::BreakInDebugger;
 }
+  }
 
 [[fallthrough]];
   default:
diff --git 
a/lldb/source/Plugins/Process/Windows/Common/NativeRegisterContextWindows.cpp 
b/lldb/source/Plugins/Process/Windows/Common/NativeRegisterContextWindows.cpp
index 9128363eaa577a..95be1183abb759 100644
--- 
a/lldb/source/Plugins/Process/Windows/Common/NativeRegisterContextWindows.cpp
+++ 
b/lldb/source/Plugins/Process/Windows/Common/NativeRegisterContextWindows.cpp
@@ -18,9 +18,6 @@
 using namespace lldb;
 using namespace lldb_private;
 
-NativeRegisterContextWindows::NativeRegisterContextWindows(
-NativeThreadProtocol &thread, RegisterInfoInterface *reg_info_interface_p)
-: NativeRegisterContextRegisterInfo(thread, reg_info_interface_p) {}
 
 lldb::thread_t NativeRegisterContextWindows::GetThreadHandle() const {
   auto wthread = static_cast(&m_thread);
diff --git 
a/lldb/source/Plugins/Pro

[Lldb-commits] [lldb] [lldb][Windows] WoA HW Break and Watchpoint support in LLDB (PR #108072)

[Omair Javaid via lldb-commits]

@@ -178,9 +178,41 @@ Status NativeThreadWindows::RemoveWatchpoint(lldb::addr_t 
addr) {
 
 Status NativeThreadWindows::SetHardwareBreakpoint(lldb::addr_t addr,
   size_t size) {
+#if defined(__aarch64__) || defined(_M_ARM64)

omjavaid wrote:

Yes I think we can. I ll update this.

https://github.com/llvm/llvm-project/pull/108072
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[Lldb-commits] [lldb] [lldb][Windows] WoA HW Break and Watchpoint support in LLDB (PR #108072)

[Omair Javaid via lldb-commits]

@@ -491,24 +491,47 @@ NativeProcessWindows::OnDebugException(bool first_chance,
 return ExceptionResult::MaskException;
   }
   case DWORD(STATUS_BREAKPOINT):
-  case STATUS_WX86_BREAKPOINT:
-if (FindSoftwareBreakpoint(record.GetExceptionAddress())) {
-  LLDB_LOG(log, "Hit non-loader breakpoint at address {0:x}.",
-   record.GetExceptionAddress());
-
-  StopThread(record.GetThreadID(), StopReason::eStopReasonBreakpoint);
-
-  if (NativeThreadWindows *stop_thread =
-  GetThreadByID(record.GetThreadID())) {
-auto ®ister_context = stop_thread->GetRegisterContext();
+  case STATUS_WX86_BREAKPOINT: {
+bool breakpoint_hit = false;
+NativeThreadWindows *stop_thread = GetThreadByID(record.GetThreadID());
+
+if (stop_thread) {
+  uint32_t hw_id = LLDB_INVALID_INDEX32;
+  auto ®_ctx = stop_thread->GetRegisterContext();
+  reg_ctx.GetHardwareBreakHitIndex(hw_id, record.GetExceptionAddress());
+  if (hw_id != LLDB_INVALID_INDEX32) {
+breakpoint_hit = true;
+LLDB_LOG(log, "Hit hardware breakpoint at address {0:x}.",
+ record.GetExceptionAddress());
+  } else if (FindSoftwareBreakpoint(record.GetExceptionAddress())) {
+breakpoint_hit = true;
+LLDB_LOG(log, "Hit non-loader breakpoint at address {0:x}.",
+ record.GetExceptionAddress());
 uint32_t breakpoint_size = GetSoftwareBreakpointPCOffset();
 // The current PC is AFTER the BP opcode, on all architectures.
-uint64_t pc = register_context.GetPC() - breakpoint_size;
-register_context.SetPC(pc);
+uint64_t pc = reg_ctx.GetPC() - breakpoint_size;
+reg_ctx.SetPC(pc);
   }
 
-  SetState(eStateStopped, true);
-  return ExceptionResult::MaskException;
+  if (breakpoint_hit) {
+StopThread(record.GetThreadID(), StopReason::eStopReasonBreakpoint);
+SetState(eStateStopped, true);
+return ExceptionResult::MaskException;
+  } else {
+const std::vector &args = record.GetExceptionArguments();
+if (args.size() >= 2) {

omjavaid wrote:

I believe you're referring to the call below:
reg_ctx.GetWatchpointHitIndex(hw_id, args[1]);
Generally, GetWatchpointHitIndex returns an error only if it fails to read the 
hardware breakpoint resource information via ReadHardwareDebugInfo. If the 
watchpoint hit detection is successful, the method returns the hw_watchpoint_id 
of the corresponding watchpoint. On failure to find watchpoint hit, it returns 
LLDB_INVALID_INDEX32.

https://github.com/llvm/llvm-project/pull/108072
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[Lldb-commits] [lldb] [lldb][Windows] WoA HW Break and Watchpoint support in LLDB (PR #108072)

[Omair Javaid via lldb-commits]

@@ -143,8 +142,14 @@ 
NativeRegisterContextWindows::CreateHostNativeRegisterContextWindows(
 
 NativeRegisterContextWindows_arm64::NativeRegisterContextWindows_arm64(
 const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
-: NativeRegisterContextWindows(native_thread,
-   CreateRegisterInfoInterface(target_arch)) {}
+: NativeRegisterContextRegisterInfo(
+  native_thread, CreateRegisterInfoInterface(target_arch)) {
+  // Currently, there is no API to query the maximum supported hardware
+  // breakpoints and watchpoints on Windows. The values set below are based

omjavaid wrote:

I dont think a API exists to query hardware breakpoint or watchpoint resources. 
On x86_64 as well winnt.h definitions of hardware breakpoint and watchpoints 
are used.

winnt.h defined the max hardware breakpoints to be 8 however in reality only 6 
can be used successfully. Also for watchpoints it defines 2 arm64 hardware 
watchpoints but in reality only 1 can be used.

https://github.com/llvm/llvm-project/pull/108072
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[Lldb-commits] [lldb] [lldb][Windows] WoA HW Break and Watchpoint support in LLDB (PR #108072)

[Omair Javaid via lldb-commits]

omjavaid wrote:

> Remind me, does lldb support hardware breakpoints for x86 right now either? 
> From the content of this PR, I assume it does not.
> 
> (which is fine, I'm just trying to be clear what our starting point is)
yes x86_64 windows does not support hardware breakpoints. However it does 
support hardware watchpoints.



https://github.com/llvm/llvm-project/pull/108072
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[Lldb-commits] [lldb] [lldb][Windows] WoA HW Break and Watchpoint support in LLDB (PR #108072)

[Omair Javaid via lldb-commits]

https://github.com/omjavaid edited 
https://github.com/llvm/llvm-project/pull/108072
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[Lldb-commits] [lldb] [lldb][Windows] WoA HW Break and Watchpoint support in LLDB (PR #108072)

[Omair Javaid via lldb-commits]

omjavaid wrote:

> Seems ok to me.
> 
> If I had to guess, I'd say that the initial stop problem is due to us 
> stopping the process "too early" (i.e., in a state where it's not yet fully 
> initialized and ready to accept debugger commands). Maybe there's a different 
> way to stop the process at the first instruction?

Yes I think there might be a Windows API launch flag that can let us do early 
detection of hardware breakpoints and watchpoints. But so far after lots of 
experimentation I have not been able to find the right set. 



https://github.com/llvm/llvm-project/pull/108072
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[Lldb-commits] [lldb] [lldb][Windows] WoA HW Break and Watchpoint support in LLDB (PR #108072)

[Omair Javaid via lldb-commits]

@@ -143,8 +142,14 @@ 
NativeRegisterContextWindows::CreateHostNativeRegisterContextWindows(
 
 NativeRegisterContextWindows_arm64::NativeRegisterContextWindows_arm64(
 const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
-: NativeRegisterContextWindows(native_thread,
-   CreateRegisterInfoInterface(target_arch)) {}
+: NativeRegisterContextRegisterInfo(
+  native_thread, CreateRegisterInfoInterface(target_arch)) {
+  // Currently, there is no API to query the maximum supported hardware
+  // breakpoints and watchpoints on Windows. The values set below are based

omjavaid wrote:

In my testing  I was able to set and read the registers back successfully 
however the exception which should be generated as a result of setting those 
registers do not get triggered. So in theory you are able to set and read 
hardware breakpoint registers back with correct values. But there is some 
configuration internal to windows which probably does not happen until we land 
in user code for generating those exceptions.

https://github.com/llvm/llvm-project/pull/108072
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[Lldb-commits] [lldb] [lldb][Windows] WoA HW Break and Watchpoint support in LLDB (PR #108072)

[Omair Javaid via lldb-commits]

@@ -143,8 +142,14 @@ 
NativeRegisterContextWindows::CreateHostNativeRegisterContextWindows(
 
 NativeRegisterContextWindows_arm64::NativeRegisterContextWindows_arm64(
 const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
-: NativeRegisterContextWindows(native_thread,
-   CreateRegisterInfoInterface(target_arch)) {}
+: NativeRegisterContextRegisterInfo(
+  native_thread, CreateRegisterInfoInterface(target_arch)) {
+  // Currently, there is no API to query the maximum supported hardware
+  // breakpoints and watchpoints on Windows. The values set below are based

omjavaid wrote:

Also winnt.h defines wvr, wcr, bvr and bcr arrays which has size equal to 
ARM64_MAX_WATCHPOINTS or ARM64_MAX_BREAKPOINTS. So we should be able to read 
and write those arrays regardless of whether they eventually generate a 
watchpoint or breakpoint exception or not.

https://github.com/llvm/llvm-project/pull/108072
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[Lldb-commits] [lldb] [lldb][Windows] WoA HW Break and Watchpoint support in LLDB (PR #108072)

[Omair Javaid via lldb-commits]

omjavaid wrote:

> > Yes I think there might be a Windows API launch flag that can let us do 
> > early detection of hardware breakpoints and watchpoints. But so far after 
> > lots of experimentation I have not been able to find the right set.
> 
> Is it possible this is a bug in Windows itself? Though it seems unlikely 
> given that Visual Studio supports WoA.
> 
> I'm not sure about merging this until we know more about that part, at least 
> whether it's a bug or not. Perhaps we (Linaro) can get some information from 
> Microsoft on this?

So further update from my offline (out of LLDB) testing with windows API and 
setting hardware breakpoints suggest that we might be doing something different 
on LLDB side during launch or while setting hardware breakpoints/watchpoints 
that stops us from hitting those exceptions. 

In simple console based debugger I have played with Windows API and set 
hardware breakpoints and found a good configuration that works.

I will keep debugging this might get to fix it on LLDB side as well. And will 
talk to our friends at MS at some stage for any clarifications that might be 
needed.

https://github.com/llvm/llvm-project/pull/108072
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[Lldb-commits] [lldb] DebugInfoD tests + fixing issues exposed by tests (PR #85693)

[Omair Javaid via lldb-commits]

omjavaid wrote:

both commits from this PR broke LLDB buildbots on Arm and AArch64 Linux.
New tests apparently are failing on Arm/AArch64 Linux.
https://lab.llvm.org/buildbot/#/builders/96/builds/54867
https://lab.llvm.org/buildbot/#/builders/17/builds/50824

I will be reverting 
[b1575f9](https://github.com/llvm/llvm-project/commit/b1575f9082071702bd6aaa2600ce9fe011a091e9)
[6d939a6](https://github.com/llvm/llvm-project/commit/6d939a6ec69adf284cdbef2034b49fd02ba503fc)


https://github.com/llvm/llvm-project/pull/85693
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Re: [Lldb-commits] [PATCH] D114288: [NFC] Refactor symbol table parsing.

[Omair Javaid via lldb-commits]

On Fri, 3 Dec 2021 at 04:50, Greg Clayton via Phabricator <
revi...@reviews.llvm.org> wrote:

> clayborg added a comment.
>
> In D114288#3165212 , @clayborg
> wrote:
>
> > In D114288#3163808 ,
> @omjavaid wrote:
> >
> >> Hi @clayborg
> >> This breaks LLDB Arm/Linux buildbot.
> https://lab.llvm.org/buildbot/#/builders/17/builds/14035
> >
> > I will check this out on linux. Any reason why I did not get a message
> to my email that this was failing?
>
> I checked this out on normal linux and it passes correctly.
>
> I modified the test file to dump more input context so we can see what is
> going on on the lldb-arm-ubuntu buildbots in the error output with:
>
> commit 266a66c915cbbc36b1a3887963eb97f32306c7e4 <
> https://reviews.llvm.org/rG266a66c915cbbc36b1a3887963eb97f32306c7e4>
> (HEAD -> main, origin/main, origin/HEAD)
> Author: Greg Clayton 
> Date:   Thu Dec 2 15:47:15 2021 -0800
>
>   Include extra input contents on this test so we can see why
> lldb-arm-ubuntu buildbot is failing.
>
>   Only lldb-arm-ubuntu is failing after https://reviews.llvm.org/D114288
> and there isn't enough input context to see why this is failing. It works
> on x86_64 linux just fine.
>
> Hi Greg, I have marked the test as XFAIL on arm. It seems that the Arm
executable gets corrupted while removing certain sections and when run
lands on an illegal instruction. I ll try to figure it out and share
feedback or post a fix.

>
> Repository:
>   rG LLVM Github Monorepo
>
> CHANGES SINCE LAST ACTION
>   https://reviews.llvm.org/D114288/new/
>
> https://reviews.llvm.org/D114288
>
>
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Re: [Lldb-commits] [PATCH] D117559: [lldb] Remove remote testing ability from lldb**-server** tests

[Omair Javaid via lldb-commits]

On Wed, 19 Jan 2022 at 17:53, Pavel Labath via Phabricator <
revi...@reviews.llvm.org> wrote:

> labath added a comment.
>
> In D117559#3254095 ,
> @DavidSpickett wrote:
>
> > I'm running
> `lldb/test/API/tools/lldb-server/memory-tagging/TestGdbRemoteMemoryTagging.py`.
> >
> > If the details matter any...
> >
> > In qemu:
> >
> >   $ ./build-cross/bin/lldb-server platform --server --listen
> 0.0.0.0:54321
> >
> > On the host:
> >
> >   $ ./bin/lldb-dotest --platform-name remote-linux --platform-url
> connect://:54321 --platform-working-dir /tmp/test_lldb -p
> TestGdbRemoteMemoryTagging.py --arch aarch64
>
> Got it. Thanks.
>
> > I have qemu setup so that any port lldb-server picks should be
> accessible from the host and the VM is just running the usual background
> linux stuff plus lldb-server. Not a lot to use up ports.
>
> The tricky part is that even individual parallel test runs (if you run the
> whole test suite, not just a single test like you did above) can race with
> each other.
>
> > Can you remind me what forward/reverse mean here? I guess that forward
> is us telling the remote the port to use, which might already be taken on
> the remote itself.
>
> Correct.
>
> > Then reverse is the remote launching the lldb-server on a port it
> chooses, then telling us what it chose.
>
> Not quite. In "reverse mode" it is the client (in this case -- the test
> suite) who is choosing a port and listening on it. lldb-server gets an
> address and it connects to it.
>
> We also have the method which you described (we probably have more
> connection methods than we should). That one is also reliable (though it
> gets fuzzy with IPv6, as then the port number alone does not uniquely
> identify an endpoint), but it has more moving parts, and it is not
> implemented in the test suite -- just in the client, which we don't use for
> these tests.
>
> One of the goals I am trying to achieve here is actually to be able to
> test the various connection methods at the lldb-server level, but for that
> I need to untangle the connection code from the rest of the test suite
> setup. And ideally I would only support one method (the simplest one) for
> the remote connections and have mark other tests `@skipIfRemote` -- the
> reason for that is that we'd need different code to (e.g.) read the
> server-selected port from a remote machine than we would for the local one,
> so this would be more of a test of the test suite than the server itself.
>
> In D117559#3254148 , @omjavaid
> wrote:
>
> > This doesnt interfere with LLDB tests for SVE. Rather I have not used it
> in a while for SVE tests I ahve using setup similar to to one David has
> explained above.
>
> If you're using the setup that David mentioned, then this would break that.
>
> I am going to try to make a patch to use reverse connect for these tests
> instead.
>
The current set of changes at least dont hurt. I actually tried a test run
with your patch applied before responding.


>
> > @labath Do you know if android adb based tests are being run anywhere?
> Are we still maintaining this support and does it work?
>
> I would guess "no", but I don't know, really. I created this patch to find
> that out myself. :)
>
>
> Repository:
>   rG LLVM Github Monorepo
>
> CHANGES SINCE LAST ACTION
>   https://reviews.llvm.org/D117559/new/
>
> https://reviews.llvm.org/D117559
>
>
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Re: [Lldb-commits] [PATCH] D114288: [NFC] Refactor symbol table parsing.

[Omair Javaid via lldb-commits]

On Thu, 2 Dec 2021 at 01:37, Greg Clayton via Phabricator <
revi...@reviews.llvm.org> wrote:

> clayborg added a comment.
>
> In D114288#3163808 , @omjavaid
> wrote:
>
> > Hi @clayborg
> > This breaks LLDB Arm/Linux buildbot.
> https://lab.llvm.org/buildbot/#/builders/17/builds/14035
>
> I will check this out on linux. Any reason why I did not get a message to
> my email that this was failing?
>
I think there was some false negative before this issue so a failure email
wasnt triggered for this one.

>
>
> Repository:
>   rG LLVM Github Monorepo
>
> CHANGES SINCE LAST ACTION
>   https://reviews.llvm.org/D114288/new/
>
> https://reviews.llvm.org/D114288
>
>
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[Lldb-commits] [lldb] [lldb][AArch64] Add isAArch64SMEFA64 check to SME testing (PR #68094)

[Omair Javaid via lldb-commits]

https://github.com/omjavaid commented:

After this change isAArch64SME check will be replaced on all locations? 

So the manual says "The SVE FFR predicate register is not architecturally 
visible when the PE is in Streaming SVE mode if FEAT_SME_FA64 is not 
implemented or not enabled at the current Exception level."

All SVE tests seem to use FFR does it mean isAArch64SME is now redundant as far 
as LLDB testing is concerned?

https://github.com/llvm/llvm-project/pull/68094
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[Lldb-commits] [lldb] [lldb][AArch64] Add release notes and documentation for SME (PR #66767)

[Omair Javaid via lldb-commits]

@@ -0,0 +1,190 @@
+Using LLDB On AArch64 Linux
+===
+
+This page explains the details of debugging certain AArch64 extensions using
+LLDB. If something is not mentioned here, it likely works as you would expect.
+
+This is not a replacement for ptrace and Linux Kernel documentation. This 
covers
+how LLDB has chosen to use those things and how that effects your experience as
+a user.
+
+Scalable Vector Extension (SVE)
+---
+
+See `here 
`__
+to learn about the extension and `here 
`__
+for the Linux Kernel's handling of it.
+
+In LLDB you will be able to see the following new registers:
+
+* ``z0-z31`` vector registers, each one has size equal to the vector length.
+* ``p0-p15`` predicate registers, each one containing 1 bit per byte in the 
vector
+  length. Making each one vector length / 8 sized.
+* ``ffr`` the first fault register, same size as a predicate register.
+* ``vg``, the vector length in "granules". Each granule is 8 bytes.
+
+.. code-block::
+
+   Scalable Vector Extension Registers:
+ vg = 0x0002
+ z0 = {0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 <...> }
+   <...>
+ p0 = {0xff 0xff}
+   <...>
+ffr = {0xff 0xff}
+
+The example above has a vector length of 16 bytes. Within LLDB you will always
+see "vg" as in the ``vg`` register, which is 2 in this case (8*2 = 16).
+Elsewhere you may see "vq" which is the vector length in quadwords (16 bytes)
+elsewhere. Where you see "vl", it is in bytes.

omjavaid wrote:

elsewhere seems typo.

https://github.com/llvm/llvm-project/pull/66767
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[Lldb-commits] [lldb] [lldb][AArch64] Add release notes and documentation for SME (PR #66767)

[Omair Javaid via lldb-commits]

https://github.com/omjavaid deleted 
https://github.com/llvm/llvm-project/pull/66767
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[Lldb-commits] [lldb] [lldb][AArch64] Add release notes and documentation for SME (PR #66767)

[Omair Javaid via lldb-commits]

https://github.com/omjavaid edited 
https://github.com/llvm/llvm-project/pull/66767
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[Lldb-commits] [lldb] [lldb][AArch64] Add release notes and documentation for SME (PR #66767)

[Omair Javaid via lldb-commits]

@@ -0,0 +1,190 @@
+Using LLDB On AArch64 Linux
+===
+
+This page explains the details of debugging certain AArch64 extensions using
+LLDB. If something is not mentioned here, it likely works as you would expect.
+
+This is not a replacement for ptrace and Linux Kernel documentation. This 
covers
+how LLDB has chosen to use those things and how that effects your experience as
+a user.
+
+Scalable Vector Extension (SVE)
+---
+
+See `here 
`__
+to learn about the extension and `here 
`__
+for the Linux Kernel's handling of it.
+
+In LLDB you will be able to see the following new registers:
+
+* ``z0-z31`` vector registers, each one has size equal to the vector length.
+* ``p0-p15`` predicate registers, each one containing 1 bit per byte in the 
vector
+  length. Making each one vector length / 8 sized.
+* ``ffr`` the first fault register, same size as a predicate register.
+* ``vg``, the vector length in "granules". Each granule is 8 bytes.
+
+.. code-block::
+
+   Scalable Vector Extension Registers:
+ vg = 0x0002
+ z0 = {0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 <...> }
+   <...>
+ p0 = {0xff 0xff}
+   <...>
+ffr = {0xff 0xff}
+
+The example above has a vector length of 16 bytes. Within LLDB you will always
+see "vg" as in the ``vg`` register, which is 2 in this case (8*2 = 16).
+Elsewhere you may see "vq" which is the vector length in quadwords (16 bytes)
+elsewhere. Where you see "vl", it is in bytes.
+
+Changing the Vector Length
+..
+
+While you can count the size of a P or Z register, it is intended that ``vg`` 
be
+used to find the current vector length.
+
+vg can be written. Writing the current vector length changes nothing. If you
+increase the vector length, the registers will likely be reset to 0. If you
+decrease it, LLDB will truncate the Z registers but everything else will be 
reset
+to 0.
+
+Generally you should not assume that SVE state after changing the vector length
+is in any way the same as it was previously. If you need to do it, do it before
+a function's first use of SVE.
+
+Z Register Presentation
+...
+
+LLDB makes no attempt to predict how an SVE Z register will be used. Even if 
the
+next SVE instruction (which may some distance away) would use, for example, 32
+bit elements, LLDB prints ``z0`` as single bytes.
+
+If you know what format you are going to use, give a format option::
+
+  (lldb) register read z0 -f uint32_t[]
+  z0 = {0x01010101 0x01010101 0x01010101 0x01010101}
+
+FPSIMD and SVE Modes
+
+
+Prior to the debugee's first use of SVE, it is in what the Linux Kernel terms
+SIMD mode. Only the FPU is being used. In this state LLDB will still show the
+SVE registers however the values are simply the FPU values zero extended up to
+the vector length.
+
+On first access to SVE, the process goes into SVE mode. Now the Z values are
+in the real Z registers.
+
+You can also trigger this with LLDB by writing to an SVE register. Note that
+there is no way to undo this change from within LLDB. However, the debugee
+itself could do something to end up back in SIMD mode.
+
+Expression evaluation
+.
+
+If you evaluate an expression, all SVE state is saved prior to, and restored
+after the expression has been evaluated. Including the register values and
+vector length.
+
+Scalable Matrix Extension (SME)
+---
+
+See `here 
`__
+to learn about the extension and `here 
`__
+for the Linux Kernel's handling of it.
+
+SME adds a "Streaming Mode" to SVE. This mode has its own vector length.
+
+In LLDB you will see the following new registers:
+
+* ``tpidr2``, an extra per thread pointer reserved for use by the SME ABI.
+  This is not scalable, just pointer sized aka 64 bit.
+* ``z0-z31`` streaming SVE registers. These have the same names as the
+  non-streaming registers and therefore you will only see the active set in
+  LLDB. You cannot read or write the inactive mode's registers. Their size
+  is the same as the streaming vector length.
+* ``za`` the Array Storage register. The "Matrix" part of "Scalable Matrix
+  Extension". This is a square made up of rows of length equal to the streaming
+  vector length (svl). Meaning that the total size is svl * svl.
+* ``svg`` the vector length in granules. This acts the same as ``vg`` for SVE.
+  Except that where ``vg`` shows the length for the active mode, ``svg`` will
+  always show the streaming vector length, even in non-streaming mode. This
+  register is read only.
+

[Lldb-commits] [lldb] [lldb][AArch64] Add release notes and documentation for SME (PR #66767)

[Omair Javaid via lldb-commits]

@@ -0,0 +1,190 @@
+Using LLDB On AArch64 Linux
+===
+
+This page explains the details of debugging certain AArch64 extensions using
+LLDB. If something is not mentioned here, it likely works as you would expect.
+
+This is not a replacement for ptrace and Linux Kernel documentation. This 
covers
+how LLDB has chosen to use those things and how that effects your experience as
+a user.
+
+Scalable Vector Extension (SVE)
+---
+
+See `here 
`__
+to learn about the extension and `here 
`__
+for the Linux Kernel's handling of it.
+
+In LLDB you will be able to see the following new registers:
+
+* ``z0-z31`` vector registers, each one has size equal to the vector length.
+* ``p0-p15`` predicate registers, each one containing 1 bit per byte in the 
vector
+  length. Making each one vector length / 8 sized.
+* ``ffr`` the first fault register, same size as a predicate register.
+* ``vg``, the vector length in "granules". Each granule is 8 bytes.
+
+.. code-block::
+
+   Scalable Vector Extension Registers:
+ vg = 0x0002
+ z0 = {0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 <...> }
+   <...>
+ p0 = {0xff 0xff}
+   <...>
+ffr = {0xff 0xff}
+
+The example above has a vector length of 16 bytes. Within LLDB you will always
+see "vg" as in the ``vg`` register, which is 2 in this case (8*2 = 16).
+Elsewhere you may see "vq" which is the vector length in quadwords (16 bytes)
+elsewhere. Where you see "vl", it is in bytes.
+
+Changing the Vector Length
+..
+
+While you can count the size of a P or Z register, it is intended that ``vg`` 
be
+used to find the current vector length.
+
+vg can be written. Writing the current vector length changes nothing. If you
+increase the vector length, the registers will likely be reset to 0. If you
+decrease it, LLDB will truncate the Z registers but everything else will be 
reset
+to 0.
+
+Generally you should not assume that SVE state after changing the vector length
+is in any way the same as it was previously. If you need to do it, do it before
+a function's first use of SVE.
+
+Z Register Presentation
+...
+
+LLDB makes no attempt to predict how an SVE Z register will be used. Even if 
the

omjavaid wrote:

LLDB makes no attempt to predict how an SVE Z register should be visualized. 

https://github.com/llvm/llvm-project/pull/66767
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[Lldb-commits] [lldb] [lldb][AArch64] Add release notes and documentation for SME (PR #66767)

[Omair Javaid via lldb-commits]

@@ -0,0 +1,190 @@
+Using LLDB On AArch64 Linux
+===
+
+This page explains the details of debugging certain AArch64 extensions using
+LLDB. If something is not mentioned here, it likely works as you would expect.
+
+This is not a replacement for ptrace and Linux Kernel documentation. This 
covers
+how LLDB has chosen to use those things and how that effects your experience as
+a user.
+
+Scalable Vector Extension (SVE)
+---
+
+See `here 
`__
+to learn about the extension and `here 
`__
+for the Linux Kernel's handling of it.
+
+In LLDB you will be able to see the following new registers:
+
+* ``z0-z31`` vector registers, each one has size equal to the vector length.
+* ``p0-p15`` predicate registers, each one containing 1 bit per byte in the 
vector
+  length. Making each one vector length / 8 sized.
+* ``ffr`` the first fault register, same size as a predicate register.
+* ``vg``, the vector length in "granules". Each granule is 8 bytes.
+
+.. code-block::
+
+   Scalable Vector Extension Registers:
+ vg = 0x0002
+ z0 = {0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 <...> }
+   <...>
+ p0 = {0xff 0xff}
+   <...>
+ffr = {0xff 0xff}
+
+The example above has a vector length of 16 bytes. Within LLDB you will always
+see "vg" as in the ``vg`` register, which is 2 in this case (8*2 = 16).
+Elsewhere you may see "vq" which is the vector length in quadwords (16 bytes)
+elsewhere. Where you see "vl", it is in bytes.

omjavaid wrote:

Elsewhere in start and end of this sentence seems to be a typo.

https://github.com/llvm/llvm-project/pull/66767
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[Lldb-commits] [lldb] [lldb][AArch64] Add release notes and documentation for SME (PR #66767)

[Omair Javaid via lldb-commits]

@@ -0,0 +1,190 @@
+Using LLDB On AArch64 Linux
+===
+
+This page explains the details of debugging certain AArch64 extensions using
+LLDB. If something is not mentioned here, it likely works as you would expect.
+
+This is not a replacement for ptrace and Linux Kernel documentation. This 
covers
+how LLDB has chosen to use those things and how that effects your experience as
+a user.
+
+Scalable Vector Extension (SVE)
+---
+
+See `here 
`__
+to learn about the extension and `here 
`__
+for the Linux Kernel's handling of it.
+
+In LLDB you will be able to see the following new registers:
+
+* ``z0-z31`` vector registers, each one has size equal to the vector length.
+* ``p0-p15`` predicate registers, each one containing 1 bit per byte in the 
vector
+  length. Making each one vector length / 8 sized.
+* ``ffr`` the first fault register, same size as a predicate register.
+* ``vg``, the vector length in "granules". Each granule is 8 bytes.
+
+.. code-block::
+
+   Scalable Vector Extension Registers:
+ vg = 0x0002
+ z0 = {0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 <...> }
+   <...>
+ p0 = {0xff 0xff}
+   <...>
+ffr = {0xff 0xff}
+
+The example above has a vector length of 16 bytes. Within LLDB you will always
+see "vg" as in the ``vg`` register, which is 2 in this case (8*2 = 16).
+Elsewhere you may see "vq" which is the vector length in quadwords (16 bytes)
+elsewhere. Where you see "vl", it is in bytes.
+
+Changing the Vector Length
+..
+
+While you can count the size of a P or Z register, it is intended that ``vg`` 
be
+used to find the current vector length.
+
+vg can be written. Writing the current vector length changes nothing. If you

omjavaid wrote:

vg register also has write access to update SVE vector length during a debug 
session.

https://github.com/llvm/llvm-project/pull/66767
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[Lldb-commits] [lldb] [lldb][AArch64] Add release notes and documentation for SME (PR #66767)

[Omair Javaid via lldb-commits]

@@ -0,0 +1,190 @@
+Using LLDB On AArch64 Linux
+===
+
+This page explains the details of debugging certain AArch64 extensions using
+LLDB. If something is not mentioned here, it likely works as you would expect.
+
+This is not a replacement for ptrace and Linux Kernel documentation. This 
covers
+how LLDB has chosen to use those things and how that effects your experience as
+a user.
+
+Scalable Vector Extension (SVE)
+---
+
+See `here 
`__
+to learn about the extension and `here 
`__
+for the Linux Kernel's handling of it.
+
+In LLDB you will be able to see the following new registers:
+
+* ``z0-z31`` vector registers, each one has size equal to the vector length.
+* ``p0-p15`` predicate registers, each one containing 1 bit per byte in the 
vector
+  length. Making each one vector length / 8 sized.
+* ``ffr`` the first fault register, same size as a predicate register.
+* ``vg``, the vector length in "granules". Each granule is 8 bytes.
+
+.. code-block::
+
+   Scalable Vector Extension Registers:
+ vg = 0x0002
+ z0 = {0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 <...> }
+   <...>
+ p0 = {0xff 0xff}
+   <...>
+ffr = {0xff 0xff}
+
+The example above has a vector length of 16 bytes. Within LLDB you will always
+see "vg" as in the ``vg`` register, which is 2 in this case (8*2 = 16).
+Elsewhere you may see "vq" which is the vector length in quadwords (16 bytes)
+elsewhere. Where you see "vl", it is in bytes.
+
+Changing the Vector Length
+..
+
+While you can count the size of a P or Z register, it is intended that ``vg`` 
be
+used to find the current vector length.
+
+vg can be written. Writing the current vector length changes nothing. If you
+increase the vector length, the registers will likely be reset to 0. If you
+decrease it, LLDB will truncate the Z registers but everything else will be 
reset
+to 0.
+
+Generally you should not assume that SVE state after changing the vector length
+is in any way the same as it was previously. If you need to do it, do it before
+a function's first use of SVE.
+
+Z Register Presentation
+...
+
+LLDB makes no attempt to predict how an SVE Z register will be used. Even if 
the
+next SVE instruction (which may some distance away) would use, for example, 32
+bit elements, LLDB prints ``z0`` as single bytes.
+
+If you know what format you are going to use, give a format option::
+
+  (lldb) register read z0 -f uint32_t[]
+  z0 = {0x01010101 0x01010101 0x01010101 0x01010101}
+
+FPSIMD and SVE Modes
+
+
+Prior to the debugee's first use of SVE, it is in what the Linux Kernel terms
+SIMD mode. Only the FPU is being used. In this state LLDB will still show the
+SVE registers however the values are simply the FPU values zero extended up to
+the vector length.
+
+On first access to SVE, the process goes into SVE mode. Now the Z values are
+in the real Z registers.
+
+You can also trigger this with LLDB by writing to an SVE register. Note that
+there is no way to undo this change from within LLDB. However, the debugee
+itself could do something to end up back in SIMD mode.
+
+Expression evaluation
+.
+
+If you evaluate an expression, all SVE state is saved prior to, and restored
+after the expression has been evaluated. Including the register values and
+vector length.
+
+Scalable Matrix Extension (SME)
+---
+
+See `here 
`__
+to learn about the extension and `here 
`__
+for the Linux Kernel's handling of it.
+
+SME adds a "Streaming Mode" to SVE. This mode has its own vector length.
+
+In LLDB you will see the following new registers:
+
+* ``tpidr2``, an extra per thread pointer reserved for use by the SME ABI.
+  This is not scalable, just pointer sized aka 64 bit.
+* ``z0-z31`` streaming SVE registers. These have the same names as the
+  non-streaming registers and therefore you will only see the active set in
+  LLDB. You cannot read or write the inactive mode's registers. Their size
+  is the same as the streaming vector length.
+* ``za`` the Array Storage register. The "Matrix" part of "Scalable Matrix
+  Extension". This is a square made up of rows of length equal to the streaming
+  vector length (svl). Meaning that the total size is svl * svl.
+* ``svg`` the vector length in granules. This acts the same as ``vg`` for SVE.
+  Except that where ``vg`` shows the length for the active mode, ``svg`` will
+  always show the streaming vector length, even in non-streaming mode. This
+  register is read only.
+

[Lldb-commits] [lldb] [lldb][AArch64] Add release notes and documentation for SME (PR #66767)

[Omair Javaid via lldb-commits]

@@ -0,0 +1,190 @@
+Using LLDB On AArch64 Linux
+===
+
+This page explains the details of debugging certain AArch64 extensions using
+LLDB. If something is not mentioned here, it likely works as you would expect.
+
+This is not a replacement for ptrace and Linux Kernel documentation. This 
covers
+how LLDB has chosen to use those things and how that effects your experience as
+a user.
+
+Scalable Vector Extension (SVE)
+---
+
+See `here 
`__
+to learn about the extension and `here 
`__
+for the Linux Kernel's handling of it.
+
+In LLDB you will be able to see the following new registers:
+
+* ``z0-z31`` vector registers, each one has size equal to the vector length.
+* ``p0-p15`` predicate registers, each one containing 1 bit per byte in the 
vector
+  length. Making each one vector length / 8 sized.
+* ``ffr`` the first fault register, same size as a predicate register.
+* ``vg``, the vector length in "granules". Each granule is 8 bytes.
+
+.. code-block::
+
+   Scalable Vector Extension Registers:
+ vg = 0x0002
+ z0 = {0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 <...> }
+   <...>
+ p0 = {0xff 0xff}
+   <...>
+ffr = {0xff 0xff}
+
+The example above has a vector length of 16 bytes. Within LLDB you will always
+see "vg" as in the ``vg`` register, which is 2 in this case (8*2 = 16).
+Elsewhere you may see "vq" which is the vector length in quadwords (16 bytes)
+elsewhere. Where you see "vl", it is in bytes.
+
+Changing the Vector Length
+..
+
+While you can count the size of a P or Z register, it is intended that ``vg`` 
be
+used to find the current vector length.
+
+vg can be written. Writing the current vector length changes nothing. If you
+increase the vector length, the registers will likely be reset to 0. If you
+decrease it, LLDB will truncate the Z registers but everything else will be 
reset
+to 0.
+
+Generally you should not assume that SVE state after changing the vector length
+is in any way the same as it was previously. If you need to do it, do it before
+a function's first use of SVE.
+
+Z Register Presentation
+...
+
+LLDB makes no attempt to predict how an SVE Z register will be used. Even if 
the
+next SVE instruction (which may some distance away) would use, for example, 32
+bit elements, LLDB prints ``z0`` as single bytes.
+
+If you know what format you are going to use, give a format option::
+
+  (lldb) register read z0 -f uint32_t[]
+  z0 = {0x01010101 0x01010101 0x01010101 0x01010101}
+
+FPSIMD and SVE Modes
+
+
+Prior to the debugee's first use of SVE, it is in what the Linux Kernel terms
+SIMD mode. Only the FPU is being used. In this state LLDB will still show the
+SVE registers however the values are simply the FPU values zero extended up to
+the vector length.
+
+On first access to SVE, the process goes into SVE mode. Now the Z values are
+in the real Z registers.
+
+You can also trigger this with LLDB by writing to an SVE register. Note that
+there is no way to undo this change from within LLDB. However, the debugee
+itself could do something to end up back in SIMD mode.
+
+Expression evaluation
+.
+
+If you evaluate an expression, all SVE state is saved prior to, and restored
+after the expression has been evaluated. Including the register values and
+vector length.
+
+Scalable Matrix Extension (SME)
+---
+
+See `here 
`__
+to learn about the extension and `here 
`__
+for the Linux Kernel's handling of it.
+
+SME adds a "Streaming Mode" to SVE. This mode has its own vector length.
+
+In LLDB you will see the following new registers:
+
+* ``tpidr2``, an extra per thread pointer reserved for use by the SME ABI.
+  This is not scalable, just pointer sized aka 64 bit.
+* ``z0-z31`` streaming SVE registers. These have the same names as the
+  non-streaming registers and therefore you will only see the active set in
+  LLDB. You cannot read or write the inactive mode's registers. Their size
+  is the same as the streaming vector length.
+* ``za`` the Array Storage register. The "Matrix" part of "Scalable Matrix
+  Extension". This is a square made up of rows of length equal to the streaming
+  vector length (svl). Meaning that the total size is svl * svl.
+* ``svg`` the vector length in granules. This acts the same as ``vg`` for SVE.
+  Except that where ``vg`` shows the length for the active mode, ``svg`` will
+  always show the streaming vector length, even in non-streaming mode. This
+  register is read only.
+

[Lldb-commits] [lldb] [lldb][AArch64] Add release notes and documentation for SME (PR #66767)

[Omair Javaid via lldb-commits]

@@ -0,0 +1,190 @@
+Using LLDB On AArch64 Linux
+===
+
+This page explains the details of debugging certain AArch64 extensions using
+LLDB. If something is not mentioned here, it likely works as you would expect.
+
+This is not a replacement for ptrace and Linux Kernel documentation. This 
covers
+how LLDB has chosen to use those things and how that effects your experience as
+a user.
+
+Scalable Vector Extension (SVE)
+---
+
+See `here 
`__
+to learn about the extension and `here 
`__
+for the Linux Kernel's handling of it.
+
+In LLDB you will be able to see the following new registers:
+
+* ``z0-z31`` vector registers, each one has size equal to the vector length.
+* ``p0-p15`` predicate registers, each one containing 1 bit per byte in the 
vector
+  length. Making each one vector length / 8 sized.
+* ``ffr`` the first fault register, same size as a predicate register.
+* ``vg``, the vector length in "granules". Each granule is 8 bytes.
+
+.. code-block::
+
+   Scalable Vector Extension Registers:
+ vg = 0x0002
+ z0 = {0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 <...> }
+   <...>
+ p0 = {0xff 0xff}
+   <...>
+ffr = {0xff 0xff}
+
+The example above has a vector length of 16 bytes. Within LLDB you will always
+see "vg" as in the ``vg`` register, which is 2 in this case (8*2 = 16).
+Elsewhere you may see "vq" which is the vector length in quadwords (16 bytes)
+elsewhere. Where you see "vl", it is in bytes.
+
+Changing the Vector Length
+..
+
+While you can count the size of a P or Z register, it is intended that ``vg`` 
be
+used to find the current vector length.
+
+vg can be written. Writing the current vector length changes nothing. If you
+increase the vector length, the registers will likely be reset to 0. If you
+decrease it, LLDB will truncate the Z registers but everything else will be 
reset
+to 0.
+
+Generally you should not assume that SVE state after changing the vector length
+is in any way the same as it was previously. If you need to do it, do it before
+a function's first use of SVE.
+
+Z Register Presentation
+...
+
+LLDB makes no attempt to predict how an SVE Z register will be used. Even if 
the
+next SVE instruction (which may some distance away) would use, for example, 32
+bit elements, LLDB prints ``z0`` as single bytes.
+
+If you know what format you are going to use, give a format option::
+
+  (lldb) register read z0 -f uint32_t[]
+  z0 = {0x01010101 0x01010101 0x01010101 0x01010101}
+
+FPSIMD and SVE Modes
+
+
+Prior to the debugee's first use of SVE, it is in what the Linux Kernel terms
+SIMD mode. Only the FPU is being used. In this state LLDB will still show the
+SVE registers however the values are simply the FPU values zero extended up to
+the vector length.
+
+On first access to SVE, the process goes into SVE mode. Now the Z values are
+in the real Z registers.
+
+You can also trigger this with LLDB by writing to an SVE register. Note that
+there is no way to undo this change from within LLDB. However, the debugee
+itself could do something to end up back in SIMD mode.
+
+Expression evaluation
+.
+
+If you evaluate an expression, all SVE state is saved prior to, and restored
+after the expression has been evaluated. Including the register values and
+vector length.
+
+Scalable Matrix Extension (SME)
+---
+
+See `here 
`__
+to learn about the extension and `here 
`__
+for the Linux Kernel's handling of it.
+
+SME adds a "Streaming Mode" to SVE. This mode has its own vector length.
+
+In LLDB you will see the following new registers:
+
+* ``tpidr2``, an extra per thread pointer reserved for use by the SME ABI.
+  This is not scalable, just pointer sized aka 64 bit.
+* ``z0-z31`` streaming SVE registers. These have the same names as the
+  non-streaming registers and therefore you will only see the active set in
+  LLDB. You cannot read or write the inactive mode's registers. Their size
+  is the same as the streaming vector length.
+* ``za`` the Array Storage register. The "Matrix" part of "Scalable Matrix
+  Extension". This is a square made up of rows of length equal to the streaming
+  vector length (svl). Meaning that the total size is svl * svl.
+* ``svg`` the vector length in granules. This acts the same as ``vg`` for SVE.
+  Except that where ``vg`` shows the length for the active mode, ``svg`` will
+  always show the streaming vector length, even in non-streaming mode. This
+  register is read only.
-

[Lldb-commits] [lldb] [lldb][AArch64] Add release notes and documentation for SME (PR #66767)

[Omair Javaid via lldb-commits]

https://github.com/omjavaid commented:

The document looks great but I have left some comments. They are just more like 
my opinions you may consider some or all of them while updating this document.

https://github.com/llvm/llvm-project/pull/66767
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[Lldb-commits] [lldb] [lldb][AArch64] Invalidate SVG prior to reconfiguring ZA regdef (PR #66768)

[Omair Javaid via lldb-commits]

@@ -783,6 +783,11 @@ void GDBRemoteRegisterContext::AArch64Reconfigure() {
   std::optional svg_reg_value;
   const RegisterInfo *svg_reg_info = m_reg_info_sp->GetRegisterInfo("svg");
   if (svg_reg_info) {
+// When vg is written it is automatically made invalid. Writing vg will 
also
+// change svg if we're in streaming mode but it will not be made invalid
+// so do this manually so the following read gets the latest svg value.

omjavaid wrote:

I am wondering whether we should find a way to make svg and vg inter dependent 
to make sure they are invalidated together whenever an update happens. Do you 
see a way within RegisterInfo class to link registers together. I dont fully 
remember but i believe this could be done.

https://github.com/llvm/llvm-project/pull/66768
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[Lldb-commits] [lldb] [lldb][AArch64] Add release notes and documentation for SME (PR #66767)

[Omair Javaid via lldb-commits]

https://github.com/omjavaid approved this pull request.


https://github.com/llvm/llvm-project/pull/66767
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[Lldb-commits] [lldb] [lldb][AArch64] Add isAArch64SMEFA64 check to SME testing (PR #68094)

[Omair Javaid via lldb-commits]

https://github.com/omjavaid approved this pull request.


https://github.com/llvm/llvm-project/pull/68094
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[Lldb-commits] [lldb] [lldb][AArch64] Invalidate SVG prior to reconfiguring ZA regdef (PR #66768)

[Omair Javaid via lldb-commits]

@@ -783,6 +783,11 @@ void GDBRemoteRegisterContext::AArch64Reconfigure() {
   std::optional svg_reg_value;
   const RegisterInfo *svg_reg_info = m_reg_info_sp->GetRegisterInfo("svg");
   if (svg_reg_info) {
+// When vg is written it is automatically made invalid. Writing vg will 
also
+// change svg if we're in streaming mode but it will not be made invalid
+// so do this manually so the following read gets the latest svg value.

omjavaid wrote:

Sorry for the delay on this PR. I agree with your approach.

https://github.com/llvm/llvm-project/pull/66768
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[Lldb-commits] [lldb] [lldb][AArch64] Invalidate SVG prior to reconfiguring ZA regdef (PR #66768)

[Omair Javaid via lldb-commits]

https://github.com/omjavaid approved this pull request.


https://github.com/llvm/llvm-project/pull/66768
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[Lldb-commits] [lldb] [lldb][AArch64] Read mte_ctrl register from core files (PR #69689)

[Omair Javaid via lldb-commits]

https://github.com/omjavaid approved this pull request.

Looks good to me.

https://github.com/llvm/llvm-project/pull/69689
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[Lldb-commits] [lldb] Add new API in SBTarget for loading core from SBFile (PR #71769)

[Omair Javaid via lldb-commits]

omjavaid wrote:

I have reverted this temporarily as it broke  TestLinuxCore.py on 
lldb-*-windows. Kindly have a look at
https://lab.llvm.org/buildbot/#/builders/219/builds/7014

https://github.com/llvm/llvm-project/pull/71769
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Re: [Lldb-commits] [lldb] b6cd964 - Fix typo in xfail decorator for lldb thread plan list tests

[Omair Javaid via lldb-commits]

Thanks Pavel and Jan, Sorry for the inconvenience

On Mon, 6 Apr 2020 at 15:42, Pavel Labath  wrote:

> I guess these should go away after 4f644ff9e (which restrict the
> decorator to aarch64). Judging by
> <
> http://lists.llvm.org/pipermail/lldb-commits/Week-of-Mon-20200330/063428.html
> >,
> Jim is going to look into a better solution for that this week.
>
> pl
>
>
> On 06/04/2020 11:50, Jan Kratochvil wrote:
> > Hi,
> >
> > I get XPASSes now on Fedora 31 x86_64:
> >
> > http://lab.llvm.org:8014/builders/lldb-x86_64-fedora/builds/7169
> > http://lab.llvm.org:8014/builders/lldb-x86_64-fedora?numbuilds=1000
> >
> > So maybe to remove the expected failure?
> >
> >
> > Jan
> >
> >
> >
> > On Sun, 05 Apr 2020 17:18:54 +0200, Muhammad Omair Javaid via
> lldb-commits wrote:
> >>
> >> Author: Muhammad Omair Javaid
> >> Date: 2020-04-05T20:16:46+05:00
> >> New Revision: b6cd964ac7cb9b55dfcdbe43c5502c2c0f6cbebc
> >>
> >> URL:
> https://github.com/llvm/llvm-project/commit/b6cd964ac7cb9b55dfcdbe43c5502c2c0f6cbebc
> >> DIFF:
> https://github.com/llvm/llvm-project/commit/b6cd964ac7cb9b55dfcdbe43c5502c2c0f6cbebc.diff
> >>
> >> LOG: Fix typo in xfail decorator for lldb thread plan list tests
> >>
> >> Added:
> >>
> >>
> >> Modified:
> >> lldb/test/API/functionalities/thread_plan/TestThreadPlanCommands.py
> >>
> >> Removed:
> >>
> >>
> >>
> >>
> 
> >> diff  --git
> a/lldb/test/API/functionalities/thread_plan/TestThreadPlanCommands.py
> b/lldb/test/API/functionalities/thread_plan/TestThreadPlanCommands.py
> >> index b4ae9107aceb..5214a3f6b0fe 100644
> >> ---
> a/lldb/test/API/functionalities/thread_plan/TestThreadPlanCommands.py
> >> +++
> b/lldb/test/API/functionalities/thread_plan/TestThreadPlanCommands.py
> >> @@ -17,7 +17,7 @@ class TestThreadPlanCommands(TestBase):
> >>  NO_DEBUG_INFO_TESTCASE = True
> >>
> >>  @skipIfWindows
> >> -@expectedFailureAll(oslist=["Linux"])
> >> +@expectedFailureAll(oslist=["linux"])
> >>  def test_thread_plan_actions(self):
> >>  self.build()
> >>  self.main_source_file = lldb.SBFileSpec("main.c")
> >>
> >>
> >>
> >> ___
> >> lldb-commits mailing list
> >> lldb-commits@lists.llvm.org
> >> https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
> >
>
>

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Re: [Lldb-commits] [PATCH] D96840: [LLDB] [docs] Update the list of supported architectures on Windows

[Omair Javaid via lldb-commits]

On Wed, 17 Feb 2021 at 15:10, Martin Storsjö via Phabricator <
revi...@reviews.llvm.org> wrote:

> mstorsjo added a comment.
>
> In D96840#2567890 ,
> @DavidSpickett wrote:
>
> > Do we support 32 bit Arm specifically? (I'm not very familiar with
> Windows targets)
>
> Yes, I implemented support for both ARM and AArch64 in late 2019.
>
> > @omjavaid Has done some testing on the latest Windows On Arm which is
> AArch64. I think you should probably say "ARM and AArch64 support is more"
> but he can comment on how well it works.
>
> Possibly yes. I was referring to an issue for the ARM part that I never
> got time to fix properly, see D70840 .
> Other than that, I don't know of any issues with the AArch64 part, but I
> haven't used it very much either, fwiw.
>

HI  mstorsjo, did you manage to run LLDB testsuite with python support
enabled on windows. Can you please share steps to build and test LLDB on
windows on Arm/AArch64 if you have them handy somewhere. I ll check if
there is something missing on our part which needs to be done to get LLDB
in reasonable shape on windows on Arm/AArch64.

IMO, the biggest hurdle right now is swig/API generation and python support
enablement. If you think that is working already with some hack, then
please share it with me. I am using MS Surface Arm64 for the build.


>
> Repository:
>   rG LLVM Github Monorepo
>
> CHANGES SINCE LAST ACTION
>   https://reviews.llvm.org/D96840/new/
>
> https://reviews.llvm.org/D96840
>
>

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Re: [Lldb-commits] [PATCH] D96840: [LLDB] [docs] Update the list of supported architectures on Windows

[Omair Javaid via lldb-commits]

On Wed, 17 Feb 2021 at 15:26, Martin Storsjö  wrote:

> On Wed, 17 Feb 2021, Omair Javaid wrote:
>
> > HI  mstorsjo, did you manage to run LLDB testsuite with python support
> > enabled on windows. Can you please share steps to build and test LLDB on
> > windows on Arm/AArch64 if you have them handy somewhere. I ll check if
> there
> > is something missing on our part which needs to be done to get LLDB in
> > reasonable shape on windows on Arm/AArch64.
> >
> > IMO, the biggest hurdle right now is swig/API generation and python
> support
> > enablement. If you think that is working already with some hack, then
> please
> > share it with me. I am using MS Surface Arm64 for the build.
>
> Hi,
>
> I never ran the full testsuite, and I built with python disabled.
>
> I did manage to run some testcases, but I'm cross compiling (building on
> x86_64 linux, targeting aarch64 windows), so I transplanted parts of the
> testsuite to the target system and ran it via WSL - not very smooth, but
> it helped create and verify some test cases like
> test/Shell/Register/aarch64-fp-read.test at least.
>

Yes this was what I expected.

>
> // Martin
>


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Re: [Lldb-commits] [PATCH] D69371: [ARM64] Cleanup and speedup NativeRegisterContextLinux_arm64

[Omair Javaid via lldb-commits]

On Fri, 25 Oct 2019 at 17:53, Pavel Labath via Phabricator
 wrote:
>
> labath added a comment.
>
> In D69371#1721077 , @omjavaid wrote:
>
> > We ll be dealing with Linux user mode and mostly aarch64 data registers 
> > except for cpsr, fpsr and fpcr. I think we should be fine but let me 
> > confirm this again from documentation.
>
>
> Right, but you're creating a general interface for all architectures, not 
> just several aarch64 registers. Even if they don't make use of that facility 
> now, it would be good to make sure they can do that in the future.
>
> For instance, on x86, the kernel may decide to reject 
> https://github.com/torvalds/linux/blob/master/arch/x86/kernel/ptrace.c#L187 
> some values of some registers, and silently ignore some bits in others 
> https://github.com/torvalds/linux/blob/master/arch/x86/kernel/ptrace.c#L349. 
> That's why I think it would be better to commit changes to memory 
> automatically/immediately, and minimize the chances that subsequent "read" 
> operations will return data which does not reflect the actual values held by 
> the OS.

So I gave  fixed or undefined bits a thought and also considered
implications of reading/writing certain status or control registers.
User visible registers dont really have big implications and we can
afford to keep user-corrupted values until resume as in theory all
state changes are going to happen on resume and target/thread state is
halted.

But even if we don't want the user to be writing fixed value bit
fields, we can easily choose to invalidate register caches in case of
certain registers.

For example
if (regno == cpsr)
   InvalidateAllRegisters().

In case of arm64, NativeRegisterContextLinux_arm64::WriteRegister may
call NativeRegisterContextLinux_arm64::InvalidateAllRegisters() if a
register like cpsr, fpsr or fpcr is being written.
Other architectures can use similar implementation or ignore register
caching altogether.

>
>
> CHANGES SINCE LAST ACTION
>   https://reviews.llvm.org/D69371/new/
>
> https://reviews.llvm.org/D69371
>
>
>


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Re: [Lldb-commits] [PATCH] D63540: Fix lookup of symbols at the same address with no size vs. size

[Omair Javaid via lldb-commits]

On Thu, 14 Nov 2019 at 15:04, Jan Kratochvil via Phabricator <
revi...@reviews.llvm.org> wrote:

> jankratochvil added a comment.
>
> Getting `ld.lld: error: failed to open ../../../../bin/clang-10: Cannot
> allocate memory` when trying to build `lldb` natively on arm32 (the same
> error happens both for `clang` and for `lldb`).  Apparently memory is not a
> problem but the linker runs out of its 32-bit address space.
> I am aware of the cross-compiling `lldb` possibility but I haven't tried
> that yet. Do you have some simple instructions how to cross-compile `lldb`
> for arm32 on x86_64 host?
>

C_COMPILER=clang
CXX_COMPILER=clang++
LLVM_SOURCE_DIR="../../llvm-project/llvm"

BUILD_ENV_TRIPLE=`gcc -dumpmachine`

GCC_INC=/usr/$LLDB_HOST_TRIPLE/include
#GCC_V3=`gcc --version | grep ^gcc | sed 's/^.* //g'`
GCC_V3=`gcc -dumpversion`
TARGET_C_FLAGS="-target $LLDB_HOST_TRIPLE -I/$GCC_INC
-I/$GCC_INC/c++/$GCC_V3/$LLDB_HOST_TRIPLE"
TARGET_CXX_FLAGS="$TARGET_C_FLAGS"

cd ./build/$LLDB_HOST_TRIPLE

cmake -G Ninja \
-DCMAKE_CROSSCOMPILING=True \
-DCMAKE_C_COMPILER=$C_COMPILER \
-DCMAKE_CXX_COMPILER=$CXX_COMPILER \
-DCMAKE_C_FLAGS="$TARGET_C_FLAGS" \
-DCMAKE_CXX_FLAGS="$TARGET_CXX_FLAGS" \
-DLLDB_TEST_COMPILER=$LLDB_HOST_TRIPLE-gcc \
-DLLVM_USE_LINKER=gold \
-DLLVM_TABLEGEN=$PWD/../host/bin/llvm-tblgen \
-DCLANG_TABLEGEN=$PWD/../host/bin/clang-tblgen \
-DLLDB_TABLEGEN=$PWD/../host/bin/lldb-tblgen \
-DLLVM_HOST_TRIPLE=$LLDB_HOST_TRIPLE \
-DLLVM_ENABLE_PROJECTS="clang;lldb" \
-DLLVM_TARGETS_TO_BUILD=$TARGET_ARCH \
-DCMAKE_LIBRARY_ARCHITECTURE=$LLDB_HOST_TRIPLE \
-DCMAKE_IGNORE_PATH=/usr/lib/$BUILD_ENV_TRIPLE \
-DLLDB_DISABLE_PYTHON=1 \
-DLLDB_DISABLE_LIBEDIT=1 \
-DLLDB_DISABLE_CURSES=1 \
-DCMAKE_BUILD_TYPE=Release \
-DLLDB_EXPORT_ALL_SYMBOLS=1 \
-DLLVM_ENABLE_ASSERTIONS=On \
$LLVM_SOURCE_DIR

ninja lldb-server


>
>
> Repository:
>   rG LLVM Github Monorepo
>
> CHANGES SINCE LAST ACTION
>   https://reviews.llvm.org/D63540/new/
>
> https://reviews.llvm.org/D63540
>
>
>
>

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Re: [Lldb-commits] [PATCH] D63540: Fix lookup of symbols at the same address with no size vs. size

[Omair Javaid via lldb-commits]

Hi Jan,

This is known problem and fix is posted here https://reviews.llvm.org/D70155

Please use cmake argument -DLLVM_HOST_TRIPLE=arm-linux-gnueabihf as a
workaround.

Thanks!

On Fri, 15 Nov 2019 at 21:27, Jan Kratochvil via Phabricator <
revi...@reviews.llvm.org> wrote:

> jankratochvil added a comment.
>
> @omjavaid In the end I built a native `armv7l-unknown-linux-gnueabihf`
> lldb using:
>
>   cmake ../llvm-monorepo/llvm/ -DCMAKE_BUILD_TYPE=Release
> -DLLVM_ENABLE_PROJECTS="lldb;clang;lld"  -DLLVM_ENABLE_ASSERTIONS=ON
> -DLLVM_BUILD_LLVM_DYLIB
>
> Built it from trunk: `16bdcc809c72c639a2888b6b859dca88453e3c28`
> But it does not stop even in a trivial breakpoint:
>
>   $ echo 'int main(){}'|gcc -x c - -g;./bin/lldb -o 'b main' -o r ./a.out
>   (lldb) target create "./a.out"
>   Current executable set to
> '/home/fedora/jankratochvil/jkratoch/redhat/llvm-monorepo-clangassertdyn/a.out'
> (arm).
>   (lldb) b main
>   Breakpoint 1: where = a.out`main + 12 at :1:1, address =
> 0x000103dc
>   (lldb) r
>   Process 12146 exited with status = 0 (0x)
>
>   Process 12146 launched:
> '/home/fedora/jankratochvil/jkratoch/redhat/llvm-monorepo-clangassertdyn/a.out'
> (arm)
>   (lldb) q
>
> Are there some off-trunk patches needed?
>
>   kernel-5.2.9-200.fc30.armv7hl
>
>
> Repository:
>   rG LLVM Github Monorepo
>
> CHANGES SINCE LAST ACTION
>   https://reviews.llvm.org/D63540/new/
>
> https://reviews.llvm.org/D63540
>
>
>
>

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[Lldb-commits] [lldb] r370644 - [ARM64] Simplify RegisterInfos_arm64.h with macro based RegisterInfo array

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Mon Sep  2 04:53:29 2019
New Revision: 370644

URL: http://llvm.org/viewvc/llvm-project?rev=370644&view=rev
Log:
[ARM64] Simplify RegisterInfos_arm64.h with macro based RegisterInfo array

This patches paves way for upcoming SVE RegisterInfo definitions. This is 
cosmetic change which allows us to define ARM64 RegisterInfo using macros.

In future we ll have define two different RegisterInfos to choose between SVE 
vs non-SVE RegisterInfo with decision being made at thread creation.

Differential Revision: https://reviews.llvm.org/D66934


Modified:
lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm64.h

Modified: lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm64.h
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm64.h?rev=370644&r1=370643&r2=370644&view=diff
==
--- lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm64.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm64.h Mon Sep  2 
04:53:29 2019
@@ -456,188 +456,265 @@ static uint32_t g_d29_invalidates[] = {f
 static uint32_t g_d30_invalidates[] = {fpu_v30, fpu_s30, LLDB_INVALID_REGNUM};
 static uint32_t g_d31_invalidates[] = {fpu_v31, fpu_s31, LLDB_INVALID_REGNUM};
 
+// Generates register kinds array for 64-bit general purpose registers
+#define GPR64_KIND(reg, generic_kind)  
\
+  {
\
+arm64_ehframe::reg, arm64_dwarf::reg, generic_kind, LLDB_INVALID_REGNUM,   
\
+gpr_##reg  
\
+  }
+
+// Generates register kinds array for registers with lldb kind
+#define MISC_KIND(lldb_kind)   
\
+  {
\
+LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 
\
+LLDB_INVALID_REGNUM, lldb_kind 
\
+  }
+
+// Generates register kinds array for vector registers
+#define VREG_KIND(reg) 
\
+  {
\
+LLDB_INVALID_REGNUM, arm64_dwarf::reg, LLDB_INVALID_REGNUM,
\
+LLDB_INVALID_REGNUM, fpu_##reg 
\
+  }
+
+// Generates register kinds array for cpsr
+#define CPSR_KIND(lldb_kind)   
\
+  {
\
+arm64_ehframe::cpsr, arm64_dwarf::cpsr, LLDB_REGNUM_GENERIC_FLAGS, 
\
+LLDB_INVALID_REGNUM, lldb_kind 
\
+  }
+
+#define MISC_GPR_KIND(lldb_kind) CPSR_KIND(lldb_kind)
+#define MISC_FPU_KIND(lldb_kind) MISC_KIND(lldb_kind)
+#define MISC_EXC_KIND(lldb_kind) MISC_KIND(lldb_kind)
+
+// Defines a 64-bit general purpose register
+#define DEFINE_GPR64(reg, generic_kind)
\
+  {
\
+#reg, nullptr, 8, GPR_OFFSET(gpr_##reg), lldb::eEncodingUint,  
\
+lldb::eFormatHex, GPR64_KIND(reg, generic_kind), nullptr, nullptr, 
\
+nullptr, 0 
\
+  }
+
+// Defines a 64-bit general purpose register
+#define DEFINE_GPR64_ALT(reg, alt, generic_kind)   
\
+  {
\
+#reg, #alt, 8, GPR_OFFSET(gpr_##reg), lldb::eEncodingUint, 
\
+lldb::eFormatHex, GPR64_KIND(reg, generic_kind), nullptr, nullptr, 
\
+nullptr, 0 
\
+  }
+
+// Defines a 32-bit general purpose pseudo register
+#define DEFINE_GPR32(wreg, xreg)   
\
+  {
\
+#wreg, nullptr, 4, 
\
+GPR_OFFSET(gpr_##xreg) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET,   
\
+lldb::eEncodingUint, lldb::eFormatHex, MISC_KIND(gpr_##wreg),  
\
+g_contained_##xreg, g_##wreg##_invalidates, nullptr, 0 
\
+  }
+
+// Defines a vector register with 16-byte size
+#define DEFINE_VREG(reg)   
\
+  {
\
+#reg, nullptr, 16, FPU_OFFSET(fpu_##reg - fpu_v0), lldb::eEncodingVector,  
\
+lldb::eFormatVectorOfUInt8, VREG_KIND(reg), nullptr, nullptr, nullptr, 
\
+0

[Lldb-commits] [lldb] r361451 - [ARM64][AArch64] Update disassembler attributes to ARMv8.5 ISA with SVE extensions

[Omair Javaid via lldb-commits]

Author: omjavaid
Date: Wed May 22 17:46:34 2019
New Revision: 361451

URL: http://llvm.org/viewvc/llvm-project?rev=361451&view=rev
Log:
[ARM64][AArch64] Update disassembler attributes to ARMv8.5 ISA with SVE 
extensions

This patch updates assembler attributes for AArch64 targets so we can 
disassemble newer instructions supported in ISA version 8.5 and SVE extensions.

Differential Revision: https://reviews.llvm.org/D62235



Modified:
lldb/trunk/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp

Modified: lldb/trunk/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp?rev=361451&r1=361450&r2=361451&view=diff
==
--- lldb/trunk/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp (original)
+++ lldb/trunk/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp Wed May 
22 17:46:34 2019
@@ -1188,10 +1188,10 @@ DisassemblerLLVMC::DisassemblerLLVMC(con
   features_str += "+dspr2,";
   }
 
-  // If any AArch64 variant, enable the ARMv8.2 ISA extensions so we can
-  // disassemble newer instructions.
+  // If any AArch64 variant, enable the ARMv8.5 ISA with SVE extensions so we
+  // can disassemble newer instructions.
   if (triple.getArch() == llvm::Triple::aarch64)
-features_str += "+v8.2a";
+features_str += "+v8.5a,+sve2";
 
   if (triple.getArch() == llvm::Triple::aarch64
   && triple.getVendor() == llvm::Triple::Apple) {


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