[PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to lib/

[Zhao Qiang]

qe need to use the rheap, so move it to public directory.

Signed-off-by: Zhao Qiang 
---
 arch/powerpc/Kconfig| 3 ---
 arch/powerpc/include/asm/fsl_85xx_cache_sram.h  | 2 +-
 arch/powerpc/lib/Makefile   | 2 --
 arch/powerpc/platforms/44x/Kconfig  | 2 +-
 arch/powerpc/platforms/85xx/Kconfig | 2 +-
 arch/powerpc/platforms/Kconfig  | 2 +-
 arch/powerpc/platforms/Kconfig.cputype  | 2 +-
 arch/powerpc/sysdev/cpm1.c  | 2 +-
 arch/powerpc/sysdev/cpm2.c  | 2 +-
 arch/powerpc/sysdev/cpm_common.c| 2 +-
 arch/powerpc/sysdev/ppc4xx_ocm.c| 2 +-
 drivers/dma/bestcomm/Kconfig| 2 +-
 drivers/soc/fsl/qe/Kconfig  | 2 +-
 drivers/soc/fsl/qe/qe.c | 2 +-
 drivers/soc/fsl/qe/qe_common.c  | 2 +-
 include/linux/fsl/bestcomm/sram.h   | 2 +-
 {arch/powerpc/include/asm => include/linux/fsl}/rheap.h | 0
 lib/Kconfig | 3 +++
 lib/Makefile| 2 ++
 {arch/powerpc/lib => lib}/rheap.c   | 2 +-
 20 files changed, 20 insertions(+), 20 deletions(-)
 rename {arch/powerpc/include/asm => include/linux/fsl}/rheap.h (100%)
 rename {arch/powerpc/lib => lib}/rheap.c (99%)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index d003409..c9b16bf 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -1069,7 +1069,4 @@ config KEYS_COMPAT
 
 source "crypto/Kconfig"
 
-config PPC_LIB_RHEAP
-   bool
-
 source "arch/powerpc/kvm/Kconfig"
diff --git a/arch/powerpc/include/asm/fsl_85xx_cache_sram.h 
b/arch/powerpc/include/asm/fsl_85xx_cache_sram.h
index 2af2bdc..e57888a 100644
--- a/arch/powerpc/include/asm/fsl_85xx_cache_sram.h
+++ b/arch/powerpc/include/asm/fsl_85xx_cache_sram.h
@@ -26,7 +26,7 @@
 #ifndef __ASM_POWERPC_FSL_85XX_CACHE_SRAM_H__
 #define __ASM_POWERPC_FSL_85XX_CACHE_SRAM_H__
 
-#include 
+#include 
 #include 
 
 /*
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 59fa2de..c73dff8 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -32,8 +32,6 @@ obj-$(CONFIG_SMP) += locks.o
 obj-$(CONFIG_ALTIVEC)  += vmx-helper.o
 endif
 
-obj-$(CONFIG_PPC_LIB_RHEAP) += rheap.o
-
 obj-y  += code-patching.o
 obj-y  += feature-fixups.o
 obj-$(CONFIG_FTR_FIXUP_SELFTEST) += feature-fixups-test.o
diff --git a/arch/powerpc/platforms/44x/Kconfig 
b/arch/powerpc/platforms/44x/Kconfig
index 4d88f6a..c7994ff 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -282,7 +282,7 @@ config PPC4xx_GPIO
 config PPC4xx_OCM
bool "PPC4xx On Chip Memory (OCM) support"
depends on 4xx
-   select PPC_LIB_RHEAP
+   select LIB_RHEAP
help
  Enable OCM support for PowerPC 4xx platforms with on chip memory,
  OCM provides the fast place for memory access to improve performance.
diff --git a/arch/powerpc/platforms/85xx/Kconfig 
b/arch/powerpc/platforms/85xx/Kconfig
index f22635a..0a7cb9d 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -16,7 +16,7 @@ if PPC32
 
 config FSL_85XX_CACHE_SRAM
bool
-   select PPC_LIB_RHEAP
+   select LIB_RHEAP
help
  When selected, this option enables cache-sram support
  for memory allocation on P1/P2 QorIQ platforms.
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index ae8879c..25740c4 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -281,7 +281,7 @@ config CPM2
bool "Enable support for the CPM2 (Communications Processor Module)"
depends on (FSL_SOC_BOOKE && PPC32) || 8260
select CPM
-   select PPC_LIB_RHEAP
+   select LIB_RHEAP
select PPC_PCI_CHOICE
select ARCH_REQUIRE_GPIOLIB
help
diff --git a/arch/powerpc/platforms/Kconfig.cputype 
b/arch/powerpc/platforms/Kconfig.cputype
index a41bd02..0bb8c58 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -33,7 +33,7 @@ config PPC_8xx
bool "Freescale 8xx"
select FSL_SOC
select 8xx
-   select PPC_LIB_RHEAP
+   select LIB_RHEAP
 
 config 40x
bool "AMCC 40x"
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index 5e6ff38..c6f5762 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -38,7 +38,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/

[PATCH 1/2] qe_common: add qe common functions into qe_common.c

[Zhao Qiang]

qe need to call some common functions,
add a new file drivers/soc/fsl/qe/qe_common.c
for them.

Signed-off-by: Zhao Qiang 
---
 drivers/soc/fsl/qe/Makefile|   3 +-
 drivers/soc/fsl/qe/qe_common.c | 185 +
 include/soc/fsl/qe.h   |  75 +++--
 3 files changed, 253 insertions(+), 10 deletions(-)
 create mode 100644 drivers/soc/fsl/qe/qe_common.c

diff --git a/drivers/soc/fsl/qe/Makefile b/drivers/soc/fsl/qe/Makefile
index 703793f..49acb89 100644
--- a/drivers/soc/fsl/qe/Makefile
+++ b/drivers/soc/fsl/qe/Makefile
@@ -1,8 +1,7 @@
 #
 # Makefile for the linux ppc-specific parts of QE
 #
-obj-$(CONFIG_QUICC_ENGINE) += qe.o
-
+obj-$(CONFIG_QUICC_ENGINE) += qe.o qe_common.o
 obj-$(CONFIG_UCC)  += ucc.o
 obj-$(CONFIG_UCC_SLOW) += ucc_slow.o
 obj-$(CONFIG_UCC_FAST) += ucc_fast.o
diff --git a/drivers/soc/fsl/qe/qe_common.c b/drivers/soc/fsl/qe/qe_common.c
new file mode 100644
index 000..382ee7c
--- /dev/null
+++ b/drivers/soc/fsl/qe/qe_common.c
@@ -0,0 +1,185 @@
+/*
+ * common qe code
+ *
+ * author: scott wood 
+ *
+ * copyright 2007-2008,2010 freescale Semiconductor, Inc.
+ *
+ * some parts derived from commproc.c/qe2_common.c, which is:
+ * copyright (c) 1997 dan error_act (dma...@jlc.net)
+ * copyright (c) 1999-2001 dan Malek 
+ * copyright (c) 2000 montavista Software, Inc (sou...@mvista.com)
+ * 2006 (c) montavista software, Inc.
+ * vitaly bordug 
+ *
+ * this program is free software; you can redistribute it and/or modify
+ * it under the terms of version 2 of the GNU General Public License as
+ * published by the free software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+static spinlock_t qe_muram_lock;
+static rh_block_t qe_boot_muram_rh_block[16];
+static rh_info_t qe_muram_info;
+static u8 __iomem *muram_vbase;
+static phys_addr_t muram_pbase;
+
+/* max address size we deal with */
+#define OF_MAX_ADDR_CELLS  4
+
+int qe_muram_init(void)
+{
+   struct device_node *np;
+   struct resource r;
+   u32 zero[OF_MAX_ADDR_CELLS] = {};
+   resource_size_t max = 0;
+   int i = 0;
+   int ret = 0;
+
+   if (muram_pbase)
+   return 0;
+
+   spin_lock_init(&qe_muram_lock);
+   /* initialize the info header */
+   rh_init(&qe_muram_info, 1,
+   sizeof(qe_boot_muram_rh_block) /
+   sizeof(qe_boot_muram_rh_block[0]),
+   qe_boot_muram_rh_block);
+
+   np = of_find_compatible_node(NULL, NULL, "fsl,qe-muram-data");
+   if (!np) {
+   /* try legacy bindings */
+   np = of_find_node_by_name(NULL, "data-only");
+   if (!np) {
+   printk(KERN_ERR "Cannot find CPM muram data node");
+   ret = -ENODEV;
+   goto out;
+   }
+   }
+
+   muram_pbase = of_translate_address(np, zero);
+   if (muram_pbase == (phys_addr_t)OF_BAD_ADDR) {
+   printk(KERN_ERR "Cannot translate zero through CPM muram node");
+   ret = -ENODEV;
+   goto out;
+   }
+
+   while (of_address_to_resource(np, i++, &r) == 0) {
+   if (r.end > max)
+   max = r.end;
+
+   rh_attach_region(&qe_muram_info, r.start - muram_pbase,
+resource_size(&r));
+   }
+
+   muram_vbase = ioremap(muram_pbase, max - muram_pbase + 1);
+   if (!muram_vbase) {
+   printk(KERN_ERR "Cannot map CPM muram");
+   ret = -ENOMEM;
+   }
+
+out:
+   of_node_put(np);
+   return ret;
+}
+
+/**
+ * qe_muram_alloc - allocate the requested size worth of multi-user ram
+ * @size: number of bytes to allocate
+ * @align: requested alignment, in bytes
+ *
+ * This function returns an offset into the muram area.
+ * Use qe_dpram_addr() to get the virtual address of the area.
+ * Use qe_muram_free() to free the allocation.
+ */
+unsigned long qe_muram_alloc(unsigned long size, unsigned long align)
+{
+   unsigned long start;
+   unsigned long flags;
+
+   spin_lock_irqsave(&qe_muram_lock, flags);
+   qe_muram_info.alignment = align;
+   start = rh_alloc(&qe_muram_info, size, "commproc");
+   memset(qe_muram_addr(start), 0, size);
+   spin_unlock_irqrestore(&qe_muram_lock, flags);
+
+   return start;
+}
+EXPORT_SYMBOL(qe_muram_alloc);
+
+/**
+ * qe_muram_free - free a chunk of multi-user ram
+ * @offset: The beginning of the chunk as returned by qe_muram_alloc().
+ */
+int qe_muram_free(unsigned long offset)
+{
+   int ret;
+   unsigned long flags;
+
+   spin_lock_irqsave(&qe_muram_lock, flags);
+   ret = rh_free(&qe_muram_info, offset);
+   spin_unlock_irqrestore(&qe_muram_lock, 

RE: [v4] QE: Move QE from arch/powerpc to drivers/soc

[Zhao Qiang]

On Fri, Jan 30, 2015 at 1:22PM +0800, Wood Scott wrote:

> -Original Message-
> From: Wood Scott-B07421
> Sent: Friday, January 30, 2015 1:22 PM
> To: Zhao Qiang-B45475
> Cc: linux-ker...@vger.kernel.org; net...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; Wood Scott-B07421; Xie Xiaobo-R63061
> Subject: Re: [v4] QE: Move QE from arch/powerpc to drivers/soc
> 
> On Wed, Nov 12, 2014 at 11:40:13AM +0800, Zhao Qiang wrote:
> > ls1 has qe and ls1 has arm cpu.
> > move qe from arch/powerpc to drivers/soc/fsl to adapt to powerpc and
> > arm
> >
> > Signed-off-by: Zhao Qiang 
> > ---
> > Changes for v2:
> > - move code to driver/soc
> > Changes for v3:
> > - change drivers/soc/qe to drivers/soc/fsl-qe Changes for v4:
> > - move drivers/soc/fsl-qe to drivers/soc/fsl/qe
> > - move head files for qe from include/linux/fsl to include/soc/fsl
> > - move qe_ic.c to drivers/irqchip/
> 
> Need MAINTAINERS update for drivers/soc/fsl/qe, as previously discussed.

You mean, I need to finish the following work before move qe to public 
directory?

1. gpio.c -> needs to be converted to GPIO framework and placed in drivers/gpio
2. qe_ic* should probably move into drivers/irqchip
3. qe_io.c should be converted over to pinmux and put in drivers/pinctrl
4. Some of the clock could should be looked to be converted to use the clk 
framework

> 
> -Scott


Best Regards
Zhao Qiang
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v5] QE: Move QE from arch/powerpc to drivers/soc

[Zhao Qiang]

ls1 has qe and ls1 has arm cpu.
move qe from arch/powerpc to drivers/soc/fsl
to adapt to powerpc and arm

Signed-off-by: Zhao Qiang 
---
Changes for v2:
- move code to driver/soc
Changes for v3:
- change drivers/soc/qe to drivers/soc/fsl-qe
Changes for v4:
- move drivers/soc/fsl-qe to drivers/soc/fsl/qe
- move head files for qe from include/linux/fsl to include/soc/fsl
- move qe_ic.c to drivers/irqchip/
Changes for v5:
- update MAINTAINERS

 MAINTAINERS|  5 +++--
 arch/powerpc/platforms/83xx/km83xx.c   |  4 ++--
 arch/powerpc/platforms/83xx/misc.c |  2 +-
 arch/powerpc/platforms/83xx/mpc832x_mds.c  |  4 ++--
 arch/powerpc/platforms/83xx/mpc832x_rdb.c  |  4 ++--
 arch/powerpc/platforms/83xx/mpc836x_mds.c  |  4 ++--
 arch/powerpc/platforms/83xx/mpc836x_rdk.c  |  4 ++--
 arch/powerpc/platforms/85xx/common.c   |  2 +-
 arch/powerpc/platforms/85xx/corenet_generic.c  |  2 +-
 arch/powerpc/platforms/85xx/mpc85xx_mds.c  |  4 ++--
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c  |  4 ++--
 arch/powerpc/platforms/85xx/twr_p102x.c|  4 ++--
 arch/powerpc/platforms/Kconfig | 19 --
 arch/powerpc/sysdev/qe_lib/Kconfig | 23 ++
 arch/powerpc/sysdev/qe_lib/Makefile| 10 +++---
 arch/powerpc/sysdev/qe_lib/gpio.c  |  2 +-
 arch/powerpc/sysdev/qe_lib/qe_io.c |  2 +-
 arch/powerpc/sysdev/qe_lib/usb.c   |  4 ++--
 drivers/irqchip/Makefile   |  1 +
 .../sysdev/qe_lib => drivers/irqchip}/qe_ic.c  |  2 +-
 .../sysdev/qe_lib => drivers/irqchip}/qe_ic.h  |  2 +-
 drivers/net/ethernet/freescale/fsl_pq_mdio.c   |  2 +-
 drivers/net/ethernet/freescale/ucc_geth.c  |  8 
 drivers/net/ethernet/freescale/ucc_geth.h  |  8 
 drivers/soc/Kconfig|  2 ++
 drivers/soc/Makefile   |  1 +
 drivers/soc/fsl/Makefile   |  5 +
 .../sysdev/qe_lib => drivers/soc/fsl/qe}/Kconfig   | 16 +--
 drivers/soc/fsl/qe/Makefile|  8 
 .../sysdev/qe_lib => drivers/soc/fsl/qe}/qe.c  |  4 ++--
 .../sysdev/qe_lib => drivers/soc/fsl/qe}/ucc.c |  6 +++---
 .../qe_lib => drivers/soc/fsl/qe}/ucc_fast.c   |  8 
 .../qe_lib => drivers/soc/fsl/qe}/ucc_slow.c   |  8 
 drivers/spi/spi-fsl-cpm.c  |  2 +-
 drivers/tty/serial/ucc_uart.c  |  2 +-
 drivers/usb/gadget/fsl_qe_udc.c|  2 +-
 drivers/usb/host/fhci-hcd.c|  2 +-
 drivers/usb/host/fhci-hub.c|  2 +-
 drivers/usb/host/fhci-sched.c  |  2 +-
 drivers/usb/host/fhci.h|  4 ++--
 .../include/asm => include/linux/fsl}/qe_ic.h  |  0
 .../include/asm => include/soc/fsl}/immap_qe.h |  0
 {arch/powerpc/include/asm => include/soc/fsl}/qe.h |  2 +-
 .../powerpc/include/asm => include/soc/fsl}/ucc.h  |  4 ++--
 .../include/asm => include/soc/fsl}/ucc_fast.h |  6 +++---
 .../include/asm => include/soc/fsl}/ucc_slow.h |  6 +++---
 46 files changed, 103 insertions(+), 115 deletions(-)
 rename {arch/powerpc/sysdev/qe_lib => drivers/irqchip}/qe_ic.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/irqchip}/qe_ic.h (98%)
 create mode 100644 drivers/soc/fsl/Makefile
 copy {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl/qe}/Kconfig (50%)
 create mode 100644 drivers/soc/fsl/qe/Makefile
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl/qe}/qe.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl/qe}/ucc.c (98%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl/qe}/ucc_fast.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl/qe}/ucc_slow.c (98%)
 rename {arch/powerpc/include/asm => include/linux/fsl}/qe_ic.h (100%)
 rename {arch/powerpc/include/asm => include/soc/fsl}/immap_qe.h (100%)
 rename {arch/powerpc/include/asm => include/soc/fsl}/qe.h (99%)
 rename {arch/powerpc/include/asm => include/soc/fsl}/ucc.h (96%)
 rename {arch/powerpc/include/asm => include/soc/fsl}/ucc_fast.h (98%)
 rename {arch/powerpc/include/asm => include/soc/fsl}/ucc_slow.h (99%)

diff --git a/MAINTAINERS b/MAINTAINERS
index c43ea88..84b234b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3743,8 +3743,9 @@ F:include/linux/fs_enet_pd.h
 FREESCALE QUICC ENGINE LIBRARY
 L: linuxppc-dev@lists.ozlabs.org
 S: Orphan
-F: arch/powerpc/sysdev/qe_lib/
-F: arch/powerpc/include/asm/*qe.h
+F: drivers/soc/fsl/qe/
+F: include/soc/fsl/*qe*.h
+F: include/soc/fsl/*ucc*.h
 
 FREESCALE USB PERIPHERAL DRIVERS
 M: Li Yang 
di

RE: [PATCH v5] QE: Move QE from arch/powerpc to drivers/soc

[Zhao Qiang]

On Tue, 2015-06-02 at 10:53, Wood Scott wrote:

> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, June 02, 2015 10:53 AM
> To: Zhao Qiang-B45475
> Cc: linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org;
> net...@vger.kernel.org
> Subject: Re: [PATCH v5] QE: Move QE from arch/powerpc to drivers/soc
> 
> On Tue, 2015-06-02 at 10:37 +0800, Zhao Qiang wrote:
> > ls1 has qe and ls1 has arm cpu.
> > move qe from arch/powerpc to drivers/soc/fsl to adapt to powerpc and
> > arm
> >
> > Signed-off-by: Zhao Qiang 
> > ---
> > Changes for v2:
> >   - move code to driver/soc
> > Changes for v3:
> >   - change drivers/soc/qe to drivers/soc/fsl-qe Changes for v4:
> >   - move drivers/soc/fsl-qe to drivers/soc/fsl/qe
> >   - move head files for qe from include/linux/fsl to
> include/soc/fsl
> >   - move qe_ic.c to drivers/irqchip/ Changes for v5:
> >   - update MAINTAINERS
> >
> >  MAINTAINERS|  5 +++--
> >  arch/powerpc/platforms/83xx/km83xx.c   |  4 ++--
> >  arch/powerpc/platforms/83xx/misc.c |  2 +-
> >  arch/powerpc/platforms/83xx/mpc832x_mds.c  |  4 ++--
> >  arch/powerpc/platforms/83xx/mpc832x_rdb.c  |  4 ++--
> >  arch/powerpc/platforms/83xx/mpc836x_mds.c  |  4 ++--
> >  arch/powerpc/platforms/83xx/mpc836x_rdk.c  |  4 ++--
> >  arch/powerpc/platforms/85xx/common.c   |  2 +-
> >  arch/powerpc/platforms/85xx/corenet_generic.c  |  2 +-
> >  arch/powerpc/platforms/85xx/mpc85xx_mds.c  |  4 ++--
> >  arch/powerpc/platforms/85xx/mpc85xx_rdb.c  |  4 ++--
> >  arch/powerpc/platforms/85xx/twr_p102x.c|  4 ++--
> >  arch/powerpc/platforms/Kconfig | 19 
> > --
> >  arch/powerpc/sysdev/qe_lib/Kconfig | 23 ++--
> > --
> >  arch/powerpc/sysdev/qe_lib/Makefile| 10 +++---
> >  arch/powerpc/sysdev/qe_lib/gpio.c  |  2 +-
> >  arch/powerpc/sysdev/qe_lib/qe_io.c |  2 +-
> >  arch/powerpc/sysdev/qe_lib/usb.c   |  4 ++--
> >  drivers/irqchip/Makefile   |  1 +
> >  .../sysdev/qe_lib => drivers/irqchip}/qe_ic.c  |  2 +-
> >  .../sysdev/qe_lib => drivers/irqchip}/qe_ic.h  |  2 +-
> >  drivers/net/ethernet/freescale/fsl_pq_mdio.c   |  2 +-
> >  drivers/net/ethernet/freescale/ucc_geth.c  |  8 
> >  drivers/net/ethernet/freescale/ucc_geth.h  |  8 
> >  drivers/soc/Kconfig|  2 ++
> >  drivers/soc/Makefile   |  1 +
> >  drivers/soc/fsl/Makefile   |  5 +
> >  .../sysdev/qe_lib => drivers/soc/fsl/qe}/Kconfig   | 16 +---
> > ---
> >  drivers/soc/fsl/qe/Makefile|  8 
> >  .../sysdev/qe_lib => drivers/soc/fsl/qe}/qe.c  |  4 ++--
> >  .../sysdev/qe_lib => drivers/soc/fsl/qe}/ucc.c |  6 +++---
> >  .../qe_lib => drivers/soc/fsl/qe}/ucc_fast.c   |  8 
> >  .../qe_lib => drivers/soc/fsl/qe}/ucc_slow.c   |  8 
> >  drivers/spi/spi-fsl-cpm.c  |  2 +-
> >  drivers/tty/serial/ucc_uart.c  |  2 +-
> >  drivers/usb/gadget/fsl_qe_udc.c|  2 +-
> >  drivers/usb/host/fhci-hcd.c|  2 +-
> >  drivers/usb/host/fhci-hub.c|  2 +-
> >  drivers/usb/host/fhci-sched.c  |  2 +-
> >  drivers/usb/host/fhci.h|  4 ++--
> >  .../include/asm => include/linux/fsl}/qe_ic.h  |  0
> >  .../include/asm => include/soc/fsl}/immap_qe.h |  0
> >  {arch/powerpc/include/asm => include/soc/fsl}/qe.h |  2 +-
> > .../powerpc/include/asm => include/soc/fsl}/ucc.h  |  4 ++--
> >  .../include/asm => include/soc/fsl}/ucc_fast.h |  6 +++---
> >  .../include/asm => include/soc/fsl}/ucc_slow.h |  6 +++---
> >  46 files changed, 103 insertions(+), 115 deletions(-)  rename
> > {arch/powerpc/sysdev/qe_lib => drivers/irqchip}/qe_ic.c (99%)  rename
> > {arch/powerpc/sysdev/qe_lib => drivers/irqchip}/qe_ic.h (98%)  create
> > mode 100644 drivers/soc/fsl/Makefile  copy {arch/powerpc/sysdev/qe_lib
> > => drivers/soc/fsl/qe}/Kconfig
> > (50%)
> >  create mode 100644 drivers/soc/fsl/qe/Makefile  rename
> > {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl/qe}/qe.c (99%)  rename
> 

RE: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to lib/

[Zhao Qiang]

On Thu, 2015-05-28 at 1:37AM +0800, Wood Scott wrote:


> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, May 28, 2015 1:37 AM
> To: Zhao Qiang-B45475
> Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; Xie Xiaobo-R63061
> Subject: Re: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to
> lib/
> 
> On Wed, 2015-05-27 at 17:12 +0800, Zhao Qiang wrote:
> > qe need to use the rheap, so move it to public directory.
> 
> You've been previously asked to use lib/genalloc.c rather than introduce
> duplicate functionality into /lib.  NACK.

Can't use lib/genalloc.c instead of rheap.c.
Qe need to alloc muram of qe, not DIMM.

> 
> Also, please don't use coreid-based e-mail addresses with no real names
> associated, which makes it hard to tell who has been CCed.
> 
> -Scott
Best Regards
Zhao Qiang
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

RE: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to lib/

[Zhao Qiang]

On Thu, 2015-06-04 at 2:14PM, Wood Scott wrote:


> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, June 04, 2015 2:14 PM
> To: Zhao Qiang-B45475
> Cc: linuxppc-dev@lists.ozlabs.org; Xie Xiaobo-R63061
> Subject: Re: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to
> lib/
> 
> On Thu, 2015-06-04 at 00:56 -0500, Zhao Qiang-B45475 wrote:
> > On Thu, 2015-05-28 at 1:37AM +0800, Wood Scott wrote:
> >
> >
> > > -Original Message-
> > > From: Wood Scott-B07421
> > > Sent: Thursday, May 28, 2015 1:37 AM
> > > To: Zhao Qiang-B45475
> > > Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; Xie Xiaobo-
> > > R63061
> > > Subject: Re: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/
> > > to lib/
> > >
> > > On Wed, 2015-05-27 at 17:12 +0800, Zhao Qiang wrote:
> > > > qe need to use the rheap, so move it to public directory.
> > >
> > > You've been previously asked to use lib/genalloc.c rather than
> > > introduce duplicate functionality into /lib.  NACK.
> >
> > Can't use lib/genalloc.c instead of rheap.c.
> > Qe need to alloc muram of qe, not DIMM.
> 
> lib/genalloc.h is not for allocating main memory.  It is for allocating
> special regions.  It is serving the same purpose as rheap.

I need to use the func "rh_alloc_align", what it the similar func?
I just find a func "gen_pool_first_fit_order_align".

> 
> -Scott

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v2] QE: move qe code from arch/powerpc to drivers/soc

[Zhao Qiang]

LS1 is arm cpu and it has qe ip block.
move qe code from platform directory to public directory.

QE is an IP block integrates several comunications peripheral
controllers. It can implement a variety of applications, such
as uart, usb and tdm and so on.

Signed-off-by: Zhao Qiang 
---
Changes for v2:
- mv code to drivers/soc

 arch/powerpc/Kconfig   |  2 -
 arch/powerpc/platforms/83xx/km83xx.c   |  4 +-
 arch/powerpc/platforms/83xx/misc.c |  2 +-
 arch/powerpc/platforms/83xx/mpc832x_mds.c  |  4 +-
 arch/powerpc/platforms/83xx/mpc832x_rdb.c  |  4 +-
 arch/powerpc/platforms/83xx/mpc836x_mds.c  |  4 +-
 arch/powerpc/platforms/83xx/mpc836x_rdk.c  |  4 +-
 arch/powerpc/platforms/85xx/common.c   |  2 +-
 arch/powerpc/platforms/85xx/corenet_generic.c  |  2 +-
 arch/powerpc/platforms/85xx/mpc85xx_mds.c  |  4 +-
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c  |  4 +-
 arch/powerpc/platforms/85xx/twr_p102x.c|  4 +-
 arch/powerpc/platforms/Kconfig | 19 -
 arch/powerpc/sysdev/Makefile   |  1 -
 arch/powerpc/sysdev/qe_lib/Kconfig | 27 -
 drivers/net/ethernet/freescale/fsl_pq_mdio.c   |  2 +-
 drivers/net/ethernet/freescale/ucc_geth.c  |  8 ++--
 drivers/net/ethernet/freescale/ucc_geth.h  |  8 ++--
 drivers/soc/Kconfig|  2 +
 drivers/soc/Makefile   |  2 +
 drivers/soc/qe/Kconfig | 45 ++
 .../sysdev/qe_lib => drivers/soc/qe}/Makefile  |  0
 .../sysdev/qe_lib => drivers/soc/qe}/gpio.c|  2 +-
 .../powerpc/sysdev/qe_lib => drivers/soc/qe}/qe.c  |  4 +-
 .../sysdev/qe_lib => drivers/soc/qe}/qe_ic.c   |  2 +-
 .../sysdev/qe_lib => drivers/soc/qe}/qe_ic.h   |  2 +-
 .../sysdev/qe_lib => drivers/soc/qe}/qe_io.c   |  2 +-
 .../powerpc/sysdev/qe_lib => drivers/soc/qe}/ucc.c |  6 +--
 .../sysdev/qe_lib => drivers/soc/qe}/ucc_fast.c|  8 ++--
 .../sysdev/qe_lib => drivers/soc/qe}/ucc_slow.c|  8 ++--
 .../powerpc/sysdev/qe_lib => drivers/soc/qe}/usb.c |  4 +-
 drivers/spi/spi-fsl-cpm.c  |  2 +-
 drivers/tty/serial/ucc_uart.c  |  2 +-
 drivers/usb/gadget/fsl_qe_udc.c|  2 +-
 drivers/usb/host/fhci-hcd.c|  2 +-
 drivers/usb/host/fhci-hub.c|  2 +-
 drivers/usb/host/fhci-sched.c  |  2 +-
 drivers/usb/host/fhci.h|  4 +-
 .../include/asm => include/linux/fsl}/immap_qe.h   |  0
 .../powerpc/include/asm => include/linux/fsl}/qe.h |  2 +-
 .../include/asm => include/linux/fsl}/qe_ic.h  |  0
 .../include/asm => include/linux/fsl}/ucc.h|  4 +-
 .../include/asm => include/linux/fsl}/ucc_fast.h   |  6 +--
 .../include/asm => include/linux/fsl}/ucc_slow.h   |  6 +--
 44 files changed, 113 insertions(+), 113 deletions(-)
 delete mode 100644 arch/powerpc/sysdev/qe_lib/Kconfig
 create mode 100644 drivers/soc/qe/Kconfig
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/qe}/Makefile (100%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/qe}/gpio.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/qe}/qe.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/qe}/qe_ic.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/qe}/qe_ic.h (98%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/qe}/qe_io.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/qe}/ucc.c (98%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/qe}/ucc_fast.c (98%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/qe}/ucc_slow.c (98%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/qe}/usb.c (96%)
 rename {arch/powerpc/include/asm => include/linux/fsl}/immap_qe.h (100%)
 rename {arch/powerpc/include/asm => include/linux/fsl}/qe.h (99%)
 rename {arch/powerpc/include/asm => include/linux/fsl}/qe_ic.h (100%)
 rename {arch/powerpc/include/asm => include/linux/fsl}/ucc.h (96%)
 rename {arch/powerpc/include/asm => include/linux/fsl}/ucc_fast.h (98%)
 rename {arch/powerpc/include/asm => include/linux/fsl}/ucc_slow.h (99%)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index bd6dd6e..65ca032 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -1050,8 +1050,6 @@ source "drivers/Kconfig"
 
 source "fs/Kconfig"
 
-source "arch/powerpc/sysdev/qe_lib/Kconfig"
-
 source "lib/Kconfig"
 
 source "arch/powerpc/Kconfig.debug"
diff --git a/arch/powerpc/platforms/83xx/km83xx.c 
b/arch/powerpc/platforms/83xx/km83xx.c
index bf4c447..584d8cc 100644
--- a/arch/powerpc/platforms/83xx/km83xx.c
+++ b/arch/powerpc/platforms/83xx/km83xx.c
@@ -37,8 +37,8 @@
 #include 
 #include

[PATCH 2/3] qe_common: add qe common functions to qe_common.c

[Zhao Qiang]

qe need to call some common functions, move them into
public directory, add a new file drivers/soc/qe/qe_common.c
for them.

Signed-off-by: Zhao Qiang 
---
 drivers/soc/qe/Makefile|   2 +-
 drivers/soc/qe/qe_common.c | 185 +
 include/linux/fsl/qe.h |  52 +++--
 3 files changed, 230 insertions(+), 9 deletions(-)
 create mode 100644 drivers/soc/qe/qe_common.c

diff --git a/drivers/soc/qe/Makefile b/drivers/soc/qe/Makefile
index f1855c1..77f6fd9 100644
--- a/drivers/soc/qe/Makefile
+++ b/drivers/soc/qe/Makefile
@@ -1,7 +1,7 @@
 #
 # Makefile for the linux ppc-specific parts of QE
 #
-obj-$(CONFIG_QUICC_ENGINE)+= qe.o qe_ic.o qe_io.o
+obj-$(CONFIG_QUICC_ENGINE)+= qe.o qe_ic.o qe_io.o qe_common.o
 
 obj-$(CONFIG_UCC)  += ucc.o
 obj-$(CONFIG_UCC_SLOW) += ucc_slow.o
diff --git a/drivers/soc/qe/qe_common.c b/drivers/soc/qe/qe_common.c
new file mode 100644
index 000..ee02ae8
--- /dev/null
+++ b/drivers/soc/qe/qe_common.c
@@ -0,0 +1,185 @@
+/*
+ * Common QE code
+ *
+ * Author: Scott Wood 
+ *
+ * Copyright 2007-2008,2010 Freescale Semiconductor, Inc.
+ *
+ * Some parts derived from commproc.c/cpm2_common.c, which is:
+ * Copyright (c) 1997 Dan error_act (dma...@jlc.net)
+ * Copyright (c) 1999-2001 Dan Malek 
+ * Copyright (c) 2000 MontaVista Software, Inc (sou...@mvista.com)
+ * 2006 (c) MontaVista Software, Inc.
+ * Vitaly Bordug 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+static spinlock_t qe_muram_lock;
+static rh_block_t qe_boot_muram_rh_block[16];
+static rh_info_t qe_muram_info;
+static u8 __iomem *muram_vbase;
+static phys_addr_t muram_pbase;
+
+/* Max address size we deal with */
+#define OF_MAX_ADDR_CELLS  4
+
+int qe_muram_init(void)
+{
+   struct device_node *np;
+   struct resource r;
+   u32 zero[OF_MAX_ADDR_CELLS] = {};
+   resource_size_t max = 0;
+   int i = 0;
+   int ret = 0;
+
+   if (muram_pbase)
+   return 0;
+
+   spin_lock_init(&qe_muram_lock);
+   /* initialize the info header */
+   rh_init(&qe_muram_info, 1,
+   sizeof(qe_boot_muram_rh_block) /
+   sizeof(qe_boot_muram_rh_block[0]),
+   qe_boot_muram_rh_block);
+
+   np = of_find_compatible_node(NULL, NULL, "fsl,qe-muram-data");
+   if (!np) {
+   /* try legacy bindings */
+   np = of_find_node_by_name(NULL, "data-only");
+   if (!np) {
+   printk(KERN_ERR "Cannot find CPM muram data node");
+   ret = -ENODEV;
+   goto out;
+   }
+   }
+
+   muram_pbase = of_translate_address(np, zero);
+   if (muram_pbase == (phys_addr_t)OF_BAD_ADDR) {
+   printk(KERN_ERR "Cannot translate zero through CPM muram node");
+   ret = -ENODEV;
+   goto out;
+   }
+
+   while (of_address_to_resource(np, i++, &r) == 0) {
+   if (r.end > max)
+   max = r.end;
+
+   rh_attach_region(&qe_muram_info, r.start - muram_pbase,
+resource_size(&r));
+   }
+
+   muram_vbase = ioremap(muram_pbase, max - muram_pbase + 1);
+   if (!muram_vbase) {
+   printk(KERN_ERR "Cannot map CPM muram");
+   ret = -ENOMEM;
+   }
+
+out:
+   of_node_put(np);
+   return ret;
+}
+
+/**
+ * qe_muram_alloc - allocate the requested size worth of multi-user ram
+ * @size: number of bytes to allocate
+ * @align: requested alignment, in bytes
+ *
+ * This function returns an offset into the muram area.
+ * Use qe_dpram_addr() to get the virtual address of the area.
+ * Use qe_muram_free() to free the allocation.
+ */
+unsigned long qe_muram_alloc(unsigned long size, unsigned long align)
+{
+   unsigned long start;
+   unsigned long flags;
+
+   spin_lock_irqsave(&qe_muram_lock, flags);
+   qe_muram_info.alignment = align;
+   start = rh_alloc(&qe_muram_info, size, "commproc");
+   memset(qe_muram_addr(start), 0, size);
+   spin_unlock_irqrestore(&qe_muram_lock, flags);
+
+   return start;
+}
+EXPORT_SYMBOL(qe_muram_alloc);
+
+/**
+ * qe_muram_free - free a chunk of multi-user ram
+ * @offset: The beginning of the chunk as returned by qe_muram_alloc().
+ */
+int qe_muram_free(unsigned long offset)
+{
+   int ret;
+   unsigned long flags;
+
+   spin_lock_irqsave(&qe_muram_lock, flags);
+   ret = rh_free(&qe_muram_info, offset);
+   spin_unlock_irqrestore(&qe_muram_lock, flags);
+
+   return ret;
+}
+EXPORT_SYMBOL(qe_

[PATCH 3/3] rheap: move rheap.c from arch/powerpc/lib/ to lib/

[Zhao Qiang]

qe need to use the rheap, so move it to public directory.

Signed-off-by: Zhao Qiang 
---
 arch/powerpc/Kconfig| 3 ---
 arch/powerpc/include/asm/fsl_85xx_cache_sram.h  | 2 +-
 arch/powerpc/lib/Makefile   | 2 --
 arch/powerpc/platforms/44x/Kconfig  | 2 +-
 arch/powerpc/platforms/85xx/Kconfig | 2 +-
 arch/powerpc/platforms/Kconfig  | 2 +-
 arch/powerpc/platforms/Kconfig.cputype  | 2 +-
 arch/powerpc/sysdev/cpm1.c  | 2 +-
 arch/powerpc/sysdev/cpm2.c  | 2 +-
 arch/powerpc/sysdev/cpm_common.c| 2 +-
 arch/powerpc/sysdev/ppc4xx_ocm.c| 2 +-
 drivers/dma/bestcomm/Kconfig| 2 +-
 drivers/soc/qe/Kconfig  | 2 +-
 drivers/soc/qe/qe.c | 2 +-
 drivers/soc/qe/qe_common.c  | 2 +-
 drivers/video/Kconfig   | 2 +-
 include/linux/fsl/bestcomm/sram.h   | 2 +-
 {arch/powerpc/include/asm => include/linux/fsl}/rheap.h | 0
 lib/Kconfig | 3 +++
 lib/Makefile| 2 ++
 {arch/powerpc/lib => lib}/rheap.c   | 2 +-
 21 files changed, 21 insertions(+), 21 deletions(-)
 rename {arch/powerpc/include/asm => include/linux/fsl}/rheap.h (100%)
 rename {arch/powerpc/lib => lib}/rheap.c (99%)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index d20dc2b..18b658e 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -1046,7 +1046,4 @@ config PPC_CLOCK
default n
select HAVE_CLK
 
-config PPC_LIB_RHEAP
-   bool
-
 source "arch/powerpc/kvm/Kconfig"
diff --git a/arch/powerpc/include/asm/fsl_85xx_cache_sram.h 
b/arch/powerpc/include/asm/fsl_85xx_cache_sram.h
index 2af2bdc..e57888a 100644
--- a/arch/powerpc/include/asm/fsl_85xx_cache_sram.h
+++ b/arch/powerpc/include/asm/fsl_85xx_cache_sram.h
@@ -26,7 +26,7 @@
 #ifndef __ASM_POWERPC_FSL_85XX_CACHE_SRAM_H__
 #define __ASM_POWERPC_FSL_85XX_CACHE_SRAM_H__
 
-#include 
+#include 
 #include 
 
 /*
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 4504332..c7b4e2f 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -26,8 +26,6 @@ obj-$(CONFIG_SMP) += locks.o
 obj-$(CONFIG_ALTIVEC)  += vmx-helper.o
 endif
 
-obj-$(CONFIG_PPC_LIB_RHEAP) += rheap.o
-
 obj-y  += code-patching.o
 obj-y  += feature-fixups.o
 obj-$(CONFIG_FTR_FIXUP_SELFTEST) += feature-fixups-test.o
diff --git a/arch/powerpc/platforms/44x/Kconfig 
b/arch/powerpc/platforms/44x/Kconfig
index d6c7506..0ea1aee 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -254,7 +254,7 @@ config PPC4xx_GPIO
 config PPC4xx_OCM
bool "PPC4xx On Chip Memory (OCM) support"
depends on 4xx
-   select PPC_LIB_RHEAP
+   select LIB_RHEAP
help
  Enable OCM support for PowerPC 4xx platforms with on chip memory,
  OCM provides the fast place for memory access to improve performance.
diff --git a/arch/powerpc/platforms/85xx/Kconfig 
b/arch/powerpc/platforms/85xx/Kconfig
index ae9fdb51..ab4777a 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -19,7 +19,7 @@ if PPC32
 
 config FSL_85XX_CACHE_SRAM
bool "Freescale l2cache sram support"
-   select PPC_LIB_RHEAP
+   select LIB_RHEAP
help
  When selected, this option enables cache-sram support
  for memory allocation on P1/P2 QorIQ platforms.
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index d09ae32f..9c38a8d 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -282,7 +282,7 @@ config CPM2
bool "Enable support for the CPM2 (Communications Processor Module)"
depends on (FSL_SOC_BOOKE && PPC32) || 8260
select CPM
-   select PPC_LIB_RHEAP
+   select LIB_RHEAP
select PPC_PCI_CHOICE
select ARCH_REQUIRE_GPIOLIB
help
diff --git a/arch/powerpc/platforms/Kconfig.cputype 
b/arch/powerpc/platforms/Kconfig.cputype
index c9ef8a5..d68d19e 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -33,7 +33,7 @@ config PPC_8xx
bool "Freescale 8xx"
select FSL_SOC
select 8xx
-   select PPC_LIB_RHEAP
+   select LIB_RHEAP
 
 config 40x
bool "AMCC 40x"
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index 5e6ff38..c6f5762 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -38,7 +38,7 @@
 #include 
 #include 
 #include

[PATCH 2/3] qe: run qe_init and qe_ic_init

[Zhao Qiang]

qe and qe_ic need to be initialized before the
qe app drivers, using subsys_initcall to run
qe_init and qe_ic_init

Signed-off-by: Zhao Qiang 
---
 drivers/soc/qe/qe.c| 15 +++
 drivers/soc/qe/qe_ic.c | 15 +++
 2 files changed, 30 insertions(+)

diff --git a/drivers/soc/qe/qe.c b/drivers/soc/qe/qe.c
index 2aaa5b2..bfea0f8 100644
--- a/drivers/soc/qe/qe.c
+++ b/drivers/soc/qe/qe.c
@@ -683,6 +683,21 @@ unsigned int qe_get_num_of_snums(void)
 }
 EXPORT_SYMBOL(qe_get_num_of_snums);
 
+static int __init qe_init(void)
+{
+   struct device_node *np;
+
+   np = of_find_compatible_node(NULL, NULL, "fsl,qe");
+   if (!np) {
+   pr_err("%s: Could not find Quicc Engine node\n", __func__);
+   return -ENODEV;
+   }
+   qe_reset();
+   of_node_put(np);
+   return 0;
+}
+subsys_initcall(qe_init);
+
 #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC_85xx)
 static int qe_resume(struct platform_device *ofdev)
 {
diff --git a/drivers/soc/qe/qe_ic.c b/drivers/soc/qe/qe_ic.c
index cc1b8d5..11fe98c 100644
--- a/drivers/soc/qe/qe_ic.c
+++ b/drivers/soc/qe/qe_ic.c
@@ -34,6 +34,7 @@
 #include 
 
 #include "qe_ic.h"
+#include "../../irqchip/irqchip.h"
 
 static DEFINE_RAW_SPINLOCK(qe_ic_lock);
 
@@ -501,4 +502,18 @@ static int __init init_qe_ic_sysfs(void)
return 0;
 }
 
+static int __init qeic_of_init(void)
+{
+   struct device_node *np;
+
+   np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
+   if (np) {
+   qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
+  qe_ic_cascade_high_mpic);
+   of_node_put(np);
+   }
+   return 0;
+}
+subsys_initcall(qeic_of_init);
+
 subsys_initcall(init_qe_ic_sysfs);
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH 3/3] ls1021a-twr/qe: add qe node to ls1-twr

[Zhao Qiang]

add qe node to ls1021atwr fdt.

Signed-off-by: Zhao Qiang 
---
 arch/arm/boot/dts/ls1021a-twr.dts | 24 +++
 arch/arm/boot/dts/ls1021a.dtsi| 64 +++
 2 files changed, 88 insertions(+)

diff --git a/arch/arm/boot/dts/ls1021a-twr.dts 
b/arch/arm/boot/dts/ls1021a-twr.dts
index a52be7b..415387f 100755
--- a/arch/arm/boot/dts/ls1021a-twr.dts
+++ b/arch/arm/boot/dts/ls1021a-twr.dts
@@ -164,6 +164,30 @@
};
 };
 
+&uqe {
+   tdma: ucc@2000 {
+   compatible = "fsl,ucc-tdm";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot = <0xfffe>;
+   fsl,rx-timeslot = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-mode = "normal";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   };
+
+   serial: ucc@2200 {
+   device_type = "serial";
+   compatible = "ucc_uart";
+   port-number = <1>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
+};
+
 &pwm6 {
status = "okay";
 };
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 80747dc..3f2ab89 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -314,6 +314,70 @@
status = "disabled";
};
 
+   uqe: uqe@240 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   device_type = "qe";
+   compatible = "fsl,qe", "simple-bus";
+   ranges = <0x0 0x0 0x240 0x4>;
+   reg = <0x0 0x240 0x0 0x480>;
+   brg-frequency = <1>;
+   bus-frequency = <2>;
+
+   fsl,qe-num-riscs = <1>;
+   fsl,qe-num-snums = <28>;
+
+   qeic: qeic@80 {
+   compatible = "fsl,qe-ic";
+   reg = <0x80 0x80>;
+   #address-cells = <0>;
+   interrupt-controller;
+   #interrupt-cells = <1>;
+   interrupts = <0 109 0x04 0 109 0x04>;
+   };
+
+   si1: si@700 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "fsl,qe-si";
+   reg = <0x700 0x80>;
+   };
+
+   siram1: siram@1000 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "fsl,qe-siram";
+   reg = <0x1000 0x800>;
+   };
+
+   ucc@2000 {
+   cell-index = <1>;
+   reg = <0x2000 0x200>;
+   interrupts = <32>;
+   interrupt-parent = <&qeic>;
+   };
+
+   ucc@2200 {
+   cell-index = <3>;
+   reg = <0x2200 0x200>;
+   interrupts = <34>;
+   interrupt-parent = <&qeic>;
+   };
+
+   muram@1 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "fsl,qe-muram", "fsl,cpm-muram";
+   ranges = <0x0 0x1 0x6000>;
+
+   data-only@0 {
+   compatible = "fsl,qe-muram-data",
+   "fsl,cpm-muram-data";
+   reg = <0x0 0x6000>;
+   };
+   };
+   };
+
lpuart0: serial@295 {
compatible = "fsl,ls1021a-lpuart";
reg = <0x0 0x295 0x0 0x1000>;
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH 1/3] qe-uart: modify qe-uart to adapt both powerpc and arm

[Zhao Qiang]

qe has been supported by arm board ls1021, qe-uart need
to be supported by ls1021.
modify the code to make qe-uart can work on both powerpc
and ls1021.

Signed-off-by: Zhao Qiang 
---
 arch/arm/include/asm/delay.h  |  16 
 arch/arm/include/asm/io.h |  28 +++
 arch/arm/include/asm/irq.h|   2 +
 arch/arm/kernel/irq.c |   7 ++
 drivers/soc/qe/Kconfig|   1 -
 drivers/soc/qe/qe.c   |  63 ---
 drivers/soc/qe/qe_common.c|   2 +-
 drivers/soc/qe/qe_ic.c|   7 +-
 drivers/soc/qe/qe_io.c|  53 ++---
 drivers/soc/qe/ucc_slow.c |  40 +-
 drivers/tty/serial/ucc_uart.c | 176 +-
 include/linux/fsl/qe.h|  21 +
 12 files changed, 245 insertions(+), 171 deletions(-)

diff --git a/arch/arm/include/asm/delay.h b/arch/arm/include/asm/delay.h
index dff714d..a932f99 100644
--- a/arch/arm/include/asm/delay.h
+++ b/arch/arm/include/asm/delay.h
@@ -57,6 +57,22 @@ extern void __bad_udelay(void);
__const_udelay((n) * UDELAY_MULT)) :\
  __udelay(n))
 
+#define spin_event_timeout(condition, timeout, delay)  
\
+({ 
\
+   typeof(condition) __ret;   \
+   int i = 0; \
+   while (!(__ret = (condition)) && (i++ < timeout)) {\
+   if (delay) \
+   udelay(delay); \
+   else   \
+   cpu_relax();   \
+   udelay(1); \
+   }  \
+   if (!__ret)\
+   __ret = (condition);   \
+   __ret; \
+})
+
 /* Loop-based definitions for assembly code. */
 extern void __loop_delay(unsigned long loops);
 extern void __loop_udelay(unsigned long usecs);
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index d070741..4bec694 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -206,6 +206,34 @@ extern int pci_ioremap_io(unsigned int offset, phys_addr_t 
phys_addr);
 #endif
 #endif
 
+/* access ports */
+#define setbits32(_addr, _v) iowrite32be(ioread32be(_addr) |  (_v), (_addr))
+#define clrbits32(_addr, _v) iowrite32be(ioread32be(_addr) & ~(_v), (_addr))
+
+#define setbits16(_addr, _v) iowrite16be(ioread16be(_addr) |  (_v), (_addr))
+#define clrbits16(_addr, _v) iowrite16be(ioread16be(_addr) & ~(_v), (_addr))
+
+#define setbits8(_addr, _v) iowrite8(ioread8(_addr) |  (_v), (_addr))
+#define clrbits8(_addr, _v) iowrite8(ioread8(_addr) & ~(_v), (_addr))
+
+/* Clear and set bits in one shot.  These macros can be used to clear and
+ * set multiple bits in a register using a single read-modify-write.  These
+ * macros can also be used to set a multiple-bit bit pattern using a mask,
+ * by specifying the mask in the 'clear' parameter and the new bit pattern
+ * in the 'set' parameter.
+ */
+
+#define clrsetbits_be32(addr, clear, set) \
+   iowrite32be((ioread32be(addr) & ~(clear)) | (set), (addr))
+#define clrsetbits_le32(addr, clear, set) \
+   iowrite32le((ioread32le(addr) & ~(clear)) | (set), (addr))
+#define clrsetbits_be16(addr, clear, set) \
+   iowrite16be((ioread16be(addr) & ~(clear)) | (set), (addr))
+#define clrsetbits_le16(addr, clear, set) \
+   iowrite16le((ioread16le(addr) & ~(clear)) | (set), (addr))
+#define clrsetbits_8(addr, clear, set) \
+   iowrite8((ioread8(addr) & ~(clear)) | (set), (addr))
+
 /*
  *  IO port access primitives
  *  -
diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h
index 53c15de..4358904 100644
--- a/arch/arm/include/asm/irq.h
+++ b/arch/arm/include/asm/irq.h
@@ -30,6 +30,8 @@ extern void asm_do_IRQ(unsigned int, struct pt_regs *);
 void handle_IRQ(unsigned int, struct pt_regs *);
 void init_IRQ(void);
 
+extern irq_hw_number_t virq_to_hw(unsigned int virq);
+
 #ifdef CONFIG_MULTI_IRQ_HANDLER
 extern void (*handle_arch_irq)(struct pt_regs *);
 extern void set_handle_irq(void (*handle_irq)(struct pt_regs *));
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 9723d17..afa204a 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -121,6 +121,13 @@ void __init init_IRQ(void)
machine_desc->init_irq();
 }
 
+irq_hw_number_t virq_to_hw(unsigned int 

[PATCH 2/3] ls1021aqds: add qe node to ls1021aqds dts

[Zhao Qiang]

add qe node(qe-tdm and qe-uart) into ls1021a-qds.dts

Signed-off-by: Zhao Qiang 
---
 arch/arm/boot/dts/ls1021a-qds.dts | 24 
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/ls1021a-qds.dts 
b/arch/arm/boot/dts/ls1021a-qds.dts
index e24a5bc..4231daa 100644
--- a/arch/arm/boot/dts/ls1021a-qds.dts
+++ b/arch/arm/boot/dts/ls1021a-qds.dts
@@ -308,6 +308,30 @@
};
 };
 
+&uqe {
+   tdma: ucc@2000 {
+   compatible = "fsl,ucc-tdm";
+   rx-clock-name = "brg1";
+   tx-clock-name = "brg1";
+   fsl,rx-sync-clock = "none";
+   fsl,tx-sync-clock = "none";
+   fsl,tx-timeslot = <0xfffe>;
+   fsl,rx-timeslot = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-mode = "internal-loopback";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   };
+
+   serial: ucc@2200 {
+   device_type = "serial";
+   compatible = "ucc_uart";
+   port-number = <1>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
+};
+
 &pwm3 {
status = "okay";
 };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v3 1/3] QE: move qe code from arch/powerpc to drivers/soc

[Zhao Qiang]

LS1 is arm cpu and it has qe ip block.
move qe code from platform directory to public directory.

QE is an IP block integrates several comunications peripheral
controllers. It can implement a variety of applications, such
as uart, usb and tdm and so on.

Signed-off-by: Zhao Qiang 
---
Changes for v2:
- move code to driver/soc
Changes for v3:
- change drivers/soc/qe to drivers/soc/fsl-qe

 arch/powerpc/Kconfig   |  2 -
 arch/powerpc/platforms/83xx/km83xx.c   |  4 +-
 arch/powerpc/platforms/83xx/misc.c |  2 +-
 arch/powerpc/platforms/83xx/mpc832x_mds.c  |  4 +-
 arch/powerpc/platforms/83xx/mpc832x_rdb.c  |  4 +-
 arch/powerpc/platforms/83xx/mpc836x_mds.c  |  4 +-
 arch/powerpc/platforms/83xx/mpc836x_rdk.c  |  4 +-
 arch/powerpc/platforms/85xx/common.c   |  2 +-
 arch/powerpc/platforms/85xx/corenet_generic.c  |  2 +-
 arch/powerpc/platforms/85xx/mpc85xx_mds.c  |  4 +-
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c  |  4 +-
 arch/powerpc/platforms/85xx/twr_p102x.c|  4 +-
 arch/powerpc/platforms/Kconfig | 19 -
 arch/powerpc/sysdev/Makefile   |  1 -
 arch/powerpc/sysdev/qe_lib/Kconfig | 27 -
 drivers/net/ethernet/freescale/fsl_pq_mdio.c   |  2 +-
 drivers/net/ethernet/freescale/ucc_geth.c  |  8 ++--
 drivers/net/ethernet/freescale/ucc_geth.h  |  8 ++--
 drivers/soc/Kconfig|  2 +
 drivers/soc/Makefile   |  1 +
 drivers/soc/fsl-qe/Kconfig | 45 ++
 .../sysdev/qe_lib => drivers/soc/fsl-qe}/Makefile  |  0
 .../sysdev/qe_lib => drivers/soc/fsl-qe}/gpio.c|  2 +-
 .../sysdev/qe_lib => drivers/soc/fsl-qe}/qe.c  |  4 +-
 .../sysdev/qe_lib => drivers/soc/fsl-qe}/qe_ic.c   |  2 +-
 .../sysdev/qe_lib => drivers/soc/fsl-qe}/qe_ic.h   |  2 +-
 .../sysdev/qe_lib => drivers/soc/fsl-qe}/qe_io.c   |  2 +-
 .../sysdev/qe_lib => drivers/soc/fsl-qe}/ucc.c |  6 +--
 .../qe_lib => drivers/soc/fsl-qe}/ucc_fast.c   |  8 ++--
 .../qe_lib => drivers/soc/fsl-qe}/ucc_slow.c   |  8 ++--
 .../sysdev/qe_lib => drivers/soc/fsl-qe}/usb.c |  4 +-
 drivers/spi/spi-fsl-cpm.c  |  2 +-
 drivers/tty/serial/ucc_uart.c  |  2 +-
 drivers/usb/gadget/fsl_qe_udc.c|  2 +-
 drivers/usb/host/fhci-hcd.c|  2 +-
 drivers/usb/host/fhci-hub.c|  2 +-
 drivers/usb/host/fhci-sched.c  |  2 +-
 drivers/usb/host/fhci.h|  4 +-
 .../include/asm => include/linux/fsl}/immap_qe.h   |  0
 .../powerpc/include/asm => include/linux/fsl}/qe.h |  2 +-
 .../include/asm => include/linux/fsl}/qe_ic.h  |  0
 .../include/asm => include/linux/fsl}/ucc.h|  4 +-
 .../include/asm => include/linux/fsl}/ucc_fast.h   |  6 +--
 .../include/asm => include/linux/fsl}/ucc_slow.h   |  6 +--
 44 files changed, 112 insertions(+), 113 deletions(-)
 delete mode 100644 arch/powerpc/sysdev/qe_lib/Kconfig
 create mode 100644 drivers/soc/fsl-qe/Kconfig
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl-qe}/Makefile (100%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl-qe}/gpio.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl-qe}/qe.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl-qe}/qe_ic.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl-qe}/qe_ic.h (98%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl-qe}/qe_io.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl-qe}/ucc.c (98%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl-qe}/ucc_fast.c (98%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl-qe}/ucc_slow.c (98%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl-qe}/usb.c (96%)
 rename {arch/powerpc/include/asm => include/linux/fsl}/immap_qe.h (100%)
 rename {arch/powerpc/include/asm => include/linux/fsl}/qe.h (99%)
 rename {arch/powerpc/include/asm => include/linux/fsl}/qe_ic.h (100%)
 rename {arch/powerpc/include/asm => include/linux/fsl}/ucc.h (96%)
 rename {arch/powerpc/include/asm => include/linux/fsl}/ucc_fast.h (98%)
 rename {arch/powerpc/include/asm => include/linux/fsl}/ucc_slow.h (99%)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index d003409..007b052 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -1054,8 +1054,6 @@ source "drivers/Kconfig"
 
 source "fs/Kconfig"
 
-source "arch/powerpc/sysdev/qe_lib/Kconfig"
-
 source "lib/Kconfig"
 
 source "arch/powerpc/Kconfig.debug"
diff --git a/arch/powerpc/platforms/83xx/km83xx.c 
b/arch/powerpc/platforms/83xx/km83xx.c
index bf4c447..584d8cc 100644
--- a/arch/

[PATCH v3 2/3] qe_common: add qe common functions into qe_common.c

[Zhao Qiang]

qe need to call some common functions,
add a new file drivers/soc/fsl-qe/qe_common.c
for them.

Signed-off-by: Zhao Qiang 
---
 drivers/soc/fsl-qe/Makefile|   2 +-
 drivers/soc/fsl-qe/qe_common.c | 185 +
 include/linux/fsl/qe.h |  52 ++--
 3 files changed, 230 insertions(+), 9 deletions(-)
 create mode 100644 drivers/soc/fsl-qe/qe_common.c

diff --git a/drivers/soc/fsl-qe/Makefile b/drivers/soc/fsl-qe/Makefile
index f1855c1..77f6fd9 100644
--- a/drivers/soc/fsl-qe/Makefile
+++ b/drivers/soc/fsl-qe/Makefile
@@ -1,7 +1,7 @@
 #
 # Makefile for the linux ppc-specific parts of QE
 #
-obj-$(CONFIG_QUICC_ENGINE)+= qe.o qe_ic.o qe_io.o
+obj-$(CONFIG_QUICC_ENGINE)+= qe.o qe_ic.o qe_io.o qe_common.o
 
 obj-$(CONFIG_UCC)  += ucc.o
 obj-$(CONFIG_UCC_SLOW) += ucc_slow.o
diff --git a/drivers/soc/fsl-qe/qe_common.c b/drivers/soc/fsl-qe/qe_common.c
new file mode 100644
index 000..c82ddcc
--- /dev/null
+++ b/drivers/soc/fsl-qe/qe_common.c
@@ -0,0 +1,185 @@
+/*
+ * Common QE code
+ *
+ * Author: Scott Wood 
+ *
+ * Copyright 2007-2008,2010 Freescale Semiconductor, Inc.
+ *
+ * Some parts derived from commproc.c/cpm2_common.c, which is:
+ * Copyright (c) 1997 Dan error_act (dma...@jlc.net)
+ * Copyright (c) 1999-2001 Dan Malek 
+ * Copyright (c) 2000 MontaVista Software, Inc (sou...@mvista.com)
+ * 2006 (c) MontaVista Software, Inc.
+ * Vitaly Bordug 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+static spinlock_t qe_muram_lock;
+static rh_block_t qe_boot_muram_rh_block[16];
+static rh_info_t qe_muram_info;
+static u8 __iomem *muram_vbase;
+static phys_addr_t muram_pbase;
+
+/* Max address size we deal with */
+#define OF_MAX_ADDR_CELLS  4
+
+int qe_muram_init(void)
+{
+   struct device_node *np;
+   struct resource r;
+   u32 zero[OF_MAX_ADDR_CELLS] = {};
+   resource_size_t max = 0;
+   int i = 0;
+   int ret = 0;
+
+   if (muram_pbase)
+   return 0;
+
+   spin_lock_init(&qe_muram_lock);
+   /* initialize the info header */
+   rh_init(&qe_muram_info, 1,
+   sizeof(qe_boot_muram_rh_block) /
+   sizeof(qe_boot_muram_rh_block[0]),
+   qe_boot_muram_rh_block);
+
+   np = of_find_compatible_node(NULL, NULL, "fsl,qe-muram-data");
+   if (!np) {
+   /* try legacy bindings */
+   np = of_find_node_by_name(NULL, "data-only");
+   if (!np) {
+   pr_err("Cannot find CPM muram data node");
+   ret = -ENODEV;
+   goto out;
+   }
+   }
+
+   muram_pbase = of_translate_address(np, zero);
+   if (muram_pbase == (phys_addr_t)OF_BAD_ADDR) {
+   pr_err("Cannot translate zero through CPM muram node");
+   ret = -ENODEV;
+   goto out;
+   }
+
+   while (of_address_to_resource(np, i++, &r) == 0) {
+   if (r.end > max)
+   max = r.end;
+
+   rh_attach_region(&qe_muram_info, r.start - muram_pbase,
+resource_size(&r));
+   }
+
+   muram_vbase = ioremap(muram_pbase, max - muram_pbase + 1);
+   if (!muram_vbase) {
+   pr_err("Cannot map CPM muram");
+   ret = -ENOMEM;
+   }
+
+out:
+   of_node_put(np);
+   return ret;
+}
+
+/**
+ * qe_muram_alloc - allocate the requested size worth of multi-user ram
+ * @size: number of bytes to allocate
+ * @align: requested alignment, in bytes
+ *
+ * This function returns an offset into the muram area.
+ * Use qe_dpram_addr() to get the virtual address of the area.
+ * Use qe_muram_free() to free the allocation.
+ */
+unsigned long qe_muram_alloc(unsigned long size, unsigned long align)
+{
+   unsigned long start;
+   unsigned long flags;
+
+   spin_lock_irqsave(&qe_muram_lock, flags);
+   qe_muram_info.alignment = align;
+   start = rh_alloc(&qe_muram_info, size, "commproc");
+   memset(qe_muram_addr(start), 0, size);
+   spin_unlock_irqrestore(&qe_muram_lock, flags);
+
+   return start;
+}
+EXPORT_SYMBOL(qe_muram_alloc);
+
+/**
+ * qe_muram_free - free a chunk of multi-user ram
+ * @offset: The beginning of the chunk as returned by qe_muram_alloc().
+ */
+int qe_muram_free(unsigned long offset)
+{
+   int ret;
+   unsigned long flags;
+
+   spin_lock_irqsave(&qe_muram_lock, flags);
+   ret = rh_free(&qe_muram_info, offset);
+   spin_unlock_irqrestore(&qe_muram_lock, flags);
+
+   return ret;
+}
+EXPORT_SYMBOL(qe_muram_free);
+
+/**
+ 

[PATCH v3 3/3] rheap: move rheap.c from arch/powerpc/lib/ to lib/

[Zhao Qiang]

qe need to use the rheap, so move it to public directory.

Signed-off-by: Zhao Qiang 
---
 arch/powerpc/Kconfig| 3 ---
 arch/powerpc/include/asm/fsl_85xx_cache_sram.h  | 2 +-
 arch/powerpc/lib/Makefile   | 2 --
 arch/powerpc/platforms/44x/Kconfig  | 2 +-
 arch/powerpc/platforms/85xx/Kconfig | 2 +-
 arch/powerpc/platforms/Kconfig  | 2 +-
 arch/powerpc/platforms/Kconfig.cputype  | 2 +-
 arch/powerpc/sysdev/cpm1.c  | 2 +-
 arch/powerpc/sysdev/cpm2.c  | 2 +-
 arch/powerpc/sysdev/cpm_common.c| 2 +-
 arch/powerpc/sysdev/ppc4xx_ocm.c| 2 +-
 drivers/dma/bestcomm/Kconfig| 2 +-
 drivers/soc/fsl-qe/Kconfig  | 2 +-
 drivers/soc/fsl-qe/qe.c | 2 +-
 drivers/soc/fsl-qe/qe_common.c  | 2 +-
 include/linux/fsl/bestcomm/sram.h   | 2 +-
 {arch/powerpc/include/asm => include/linux/fsl}/rheap.h | 0
 lib/Kconfig | 3 +++
 lib/Makefile| 2 ++
 {arch/powerpc/lib => lib}/rheap.c   | 2 +-
 20 files changed, 20 insertions(+), 20 deletions(-)
 rename {arch/powerpc/include/asm => include/linux/fsl}/rheap.h (100%)
 rename {arch/powerpc/lib => lib}/rheap.c (99%)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 007b052..d6a31a6 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -1067,7 +1067,4 @@ config KEYS_COMPAT
 
 source "crypto/Kconfig"
 
-config PPC_LIB_RHEAP
-   bool
-
 source "arch/powerpc/kvm/Kconfig"
diff --git a/arch/powerpc/include/asm/fsl_85xx_cache_sram.h 
b/arch/powerpc/include/asm/fsl_85xx_cache_sram.h
index 2af2bdc..e57888a 100644
--- a/arch/powerpc/include/asm/fsl_85xx_cache_sram.h
+++ b/arch/powerpc/include/asm/fsl_85xx_cache_sram.h
@@ -26,7 +26,7 @@
 #ifndef __ASM_POWERPC_FSL_85XX_CACHE_SRAM_H__
 #define __ASM_POWERPC_FSL_85XX_CACHE_SRAM_H__
 
-#include 
+#include 
 #include 
 
 /*
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 59fa2de..c73dff8 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -32,8 +32,6 @@ obj-$(CONFIG_SMP) += locks.o
 obj-$(CONFIG_ALTIVEC)  += vmx-helper.o
 endif
 
-obj-$(CONFIG_PPC_LIB_RHEAP) += rheap.o
-
 obj-y  += code-patching.o
 obj-y  += feature-fixups.o
 obj-$(CONFIG_FTR_FIXUP_SELFTEST) += feature-fixups-test.o
diff --git a/arch/powerpc/platforms/44x/Kconfig 
b/arch/powerpc/platforms/44x/Kconfig
index 4d88f6a..c7994ff 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -282,7 +282,7 @@ config PPC4xx_GPIO
 config PPC4xx_OCM
bool "PPC4xx On Chip Memory (OCM) support"
depends on 4xx
-   select PPC_LIB_RHEAP
+   select LIB_RHEAP
help
  Enable OCM support for PowerPC 4xx platforms with on chip memory,
  OCM provides the fast place for memory access to improve performance.
diff --git a/arch/powerpc/platforms/85xx/Kconfig 
b/arch/powerpc/platforms/85xx/Kconfig
index f22635a..0a7cb9d 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -16,7 +16,7 @@ if PPC32
 
 config FSL_85XX_CACHE_SRAM
bool
-   select PPC_LIB_RHEAP
+   select LIB_RHEAP
help
  When selected, this option enables cache-sram support
  for memory allocation on P1/P2 QorIQ platforms.
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index ae8879c..25740c4 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -281,7 +281,7 @@ config CPM2
bool "Enable support for the CPM2 (Communications Processor Module)"
depends on (FSL_SOC_BOOKE && PPC32) || 8260
select CPM
-   select PPC_LIB_RHEAP
+   select LIB_RHEAP
select PPC_PCI_CHOICE
select ARCH_REQUIRE_GPIOLIB
help
diff --git a/arch/powerpc/platforms/Kconfig.cputype 
b/arch/powerpc/platforms/Kconfig.cputype
index a41bd02..0bb8c58 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -33,7 +33,7 @@ config PPC_8xx
bool "Freescale 8xx"
select FSL_SOC
select 8xx
-   select PPC_LIB_RHEAP
+   select LIB_RHEAP
 
 config 40x
bool "AMCC 40x"
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index 5e6ff38..c6f5762 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -38,7 +38,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/

[PATCH v4] QE: Move QE from arch/powerpc to drivers/soc

[Zhao Qiang]

ls1 has qe and ls1 has arm cpu.
move qe from arch/powerpc to drivers/soc/fsl
to adapt to powerpc and arm

Signed-off-by: Zhao Qiang 
---
Changes for v2:
- move code to driver/soc
Changes for v3:
- change drivers/soc/qe to drivers/soc/fsl-qe
Changes for v4:
- move drivers/soc/fsl-qe to drivers/soc/fsl/qe
- move head files for qe from include/linux/fsl to include/soc/fsl
- move qe_ic.c to drivers/irqchip/

 arch/powerpc/platforms/83xx/km83xx.c   |  4 +--
 arch/powerpc/platforms/83xx/misc.c |  2 +-
 arch/powerpc/platforms/83xx/mpc832x_mds.c  |  4 +--
 arch/powerpc/platforms/83xx/mpc832x_rdb.c  |  4 +--
 arch/powerpc/platforms/83xx/mpc836x_mds.c  |  4 +--
 arch/powerpc/platforms/83xx/mpc836x_rdk.c  |  4 +--
 arch/powerpc/platforms/85xx/common.c   |  2 +-
 arch/powerpc/platforms/85xx/corenet_generic.c  |  2 +-
 arch/powerpc/platforms/85xx/mpc85xx_mds.c  |  4 +--
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c  |  4 +--
 arch/powerpc/platforms/85xx/twr_p102x.c|  4 +--
 arch/powerpc/platforms/Kconfig | 19 -
 arch/powerpc/sysdev/qe_lib/Kconfig | 23 +---
 arch/powerpc/sysdev/qe_lib/Makefile| 10 +++
 arch/powerpc/sysdev/qe_lib/gpio.c  |  2 +-
 arch/powerpc/sysdev/qe_lib/qe_io.c |  2 +-
 arch/powerpc/sysdev/qe_lib/usb.c   |  4 +--
 drivers/irqchip/Makefile   |  1 +
 .../sysdev/qe_lib => drivers/irqchip}/qe_ic.c  |  2 +-
 .../sysdev/qe_lib => drivers/irqchip}/qe_ic.h  |  2 +-
 drivers/net/ethernet/freescale/fsl_pq_mdio.c   |  2 +-
 drivers/net/ethernet/freescale/ucc_geth.c  |  8 +++---
 drivers/net/ethernet/freescale/ucc_geth.h  |  8 +++---
 drivers/soc/Kconfig|  2 ++
 drivers/soc/Makefile   |  1 +
 drivers/soc/fsl/Makefile   |  5 
 drivers/soc/fsl/qe/Kconfig | 31 ++
 drivers/soc/fsl/qe/Makefile|  8 ++
 .../sysdev/qe_lib => drivers/soc/fsl/qe}/qe.c  |  4 +--
 .../sysdev/qe_lib => drivers/soc/fsl/qe}/ucc.c |  6 ++---
 .../qe_lib => drivers/soc/fsl/qe}/ucc_fast.c   |  8 +++---
 .../qe_lib => drivers/soc/fsl/qe}/ucc_slow.c   |  8 +++---
 drivers/spi/spi-fsl-cpm.c  |  2 +-
 drivers/tty/serial/ucc_uart.c  |  2 +-
 drivers/usb/gadget/fsl_qe_udc.c|  2 +-
 drivers/usb/host/fhci-hcd.c|  2 +-
 drivers/usb/host/fhci-hub.c|  2 +-
 drivers/usb/host/fhci-sched.c  |  2 +-
 drivers/usb/host/fhci.h|  4 +--
 .../include/asm => include/linux/fsl}/qe_ic.h  |  0
 .../include/asm => include/soc/fsl}/immap_qe.h |  0
 {arch/powerpc/include/asm => include/soc/fsl}/qe.h |  2 +-
 .../powerpc/include/asm => include/soc/fsl}/ucc.h  |  4 +--
 .../include/asm => include/soc/fsl}/ucc_fast.h |  6 ++---
 .../include/asm => include/soc/fsl}/ucc_slow.h |  6 ++---
 45 files changed, 121 insertions(+), 107 deletions(-)
 rename {arch/powerpc/sysdev/qe_lib => drivers/irqchip}/qe_ic.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/irqchip}/qe_ic.h (98%)
 create mode 100644 drivers/soc/fsl/Makefile
 create mode 100644 drivers/soc/fsl/qe/Kconfig
 create mode 100644 drivers/soc/fsl/qe/Makefile
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl/qe}/qe.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl/qe}/ucc.c (98%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl/qe}/ucc_fast.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/soc/fsl/qe}/ucc_slow.c (98%)
 rename {arch/powerpc/include/asm => include/linux/fsl}/qe_ic.h (100%)
 rename {arch/powerpc/include/asm => include/soc/fsl}/immap_qe.h (100%)
 rename {arch/powerpc/include/asm => include/soc/fsl}/qe.h (99%)
 rename {arch/powerpc/include/asm => include/soc/fsl}/ucc.h (96%)
 rename {arch/powerpc/include/asm => include/soc/fsl}/ucc_fast.h (98%)
 rename {arch/powerpc/include/asm => include/soc/fsl}/ucc_slow.h (99%)

diff --git a/arch/powerpc/platforms/83xx/km83xx.c 
b/arch/powerpc/platforms/83xx/km83xx.c
index bf4c447..11c386bb2 100644
--- a/arch/powerpc/platforms/83xx/km83xx.c
+++ b/arch/powerpc/platforms/83xx/km83xx.c
@@ -37,8 +37,8 @@
 #include 
 #include 
 #include 
-#include 
-#include 
+#include 
+#include 
 
 #include "mpc83xx.h"
 
diff --git a/arch/powerpc/platforms/83xx/misc.c 
b/arch/powerpc/platforms/83xx/misc.c
index 125336f..3e2e6d2 100644
--- a/arch/powerpc/platforms/83xx/misc.c
+++ b/arch/powerpc/platforms/83xx/misc.c
@@ -17,7 +17,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 
dif

RE: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to lib/

[Zhao Qiang]

I need to ensure one thing, 
In your point, you want me to use lib/genalloc.c instead of rheap.c.
Or just think rheap.c is not proper to put into lib?

Best Regards
Zhao Qiang


> -Original Message-
> From: Wood Scott-B07421
> Sent: Friday, June 05, 2015 6:41 AM
> To: Zhao Qiang-B45475
> Cc: linuxppc-dev@lists.ozlabs.org; Xie Xiaobo-R63061
> Subject: Re: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to
> lib/
> 
> On Thu, 2015-06-04 at 04:27 -0500, Zhao Qiang-B45475 wrote:
> > On Thu, 2015-06-04 at 2:14PM, Wood Scott wrote:
> >
> >
> > > -Original Message-
> > > From: Wood Scott-B07421
> > > Sent: Thursday, June 04, 2015 2:14 PM
> > > To: Zhao Qiang-B45475
> > > Cc: linuxppc-dev@lists.ozlabs.org; Xie Xiaobo-R63061
> > > Subject: Re: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/
> > > to lib/
> > >
> > > On Thu, 2015-06-04 at 00:56 -0500, Zhao Qiang-B45475 wrote:
> > > > On Thu, 2015-05-28 at 1:37AM +0800, Wood Scott wrote:
> > > >
> > > >
> > > > > -Original Message-
> > > > > From: Wood Scott-B07421
> > > > > Sent: Thursday, May 28, 2015 1:37 AM
> > > > > To: Zhao Qiang-B45475
> > > > > Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; Xie
> > > > > Xiaobo-
> > > > > R63061
> > > > > Subject: Re: [PATCH 2/2] rheap: move rheap.c from
> > > > > arch/powerpc/lib/ to lib/
> > > > >
> > > > > On Wed, 2015-05-27 at 17:12 +0800, Zhao Qiang wrote:
> > > > > > qe need to use the rheap, so move it to public directory.
> > > > >
> > > > > You've been previously asked to use lib/genalloc.c rather than
> > > > > introduce duplicate functionality into /lib.  NACK.
> > > >
> > > > Can't use lib/genalloc.c instead of rheap.c.
> > > > Qe need to alloc muram of qe, not DIMM.
> > >
> > > lib/genalloc.h is not for allocating main memory.  It is for
> > > allocating special regions.  It is serving the same purpose as
> > > rheap.
> >
> > I need to use the func "rh_alloc_align", what it the similar func?
> > I just find a func "gen_pool_first_fit_order_align".
> 
> I don't see anywhere the QE code currently calls rh_alloc_align() -- and
> cpm_muram_init() calls rh_init() with an alignment of 1.
> 
> If you do need some functionality that genalloc doesn't offer, add the
> functionality to genalloc.
> 
> -Scott

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

RE: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to lib/

[Zhao Qiang]

Now the point is, genalloc is not so proper to qe muram while rheap is written 
to manage muram,
if use genalloc instead of rheap, there will be amounts of work to do.
I have a suggestion, how about to put rheap under drivers/soc/qe, because rheap 
is 
To manage muram when it is added to sdk.

Best Regards
Zhao Qiang


> -Original Message-
> From: Wood Scott-B07421
> Sent: Wednesday, July 08, 2015 10:55 AM
> To: Zhao Qiang-B45475
> Cc: linuxppc-dev@lists.ozlabs.org; Xie Xiaobo-R63061
> Subject: Re: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to
> lib/
> 
> On Tue, 2015-07-07 at 21:54 -0500, Zhao Qiang-B45475 wrote:
> > I need to ensure one thing,
> > In your point, you want me to use lib/genalloc.c instead of rheap.c.
> > Or just think rheap.c is not proper to put into lib?
> >
> > Best Regards
> > Zhao Qiang
> 
> I want you to use lib/genalloc.c.
> 
> -Scott

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

RE: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to lib/

[Zhao Qiang]

So I will add two func for my use, do you think it is ok?
I need to align the address of allocated muram.
And I will set algo = gen_pool_first_fit_align.

+unsigned long gen_pool_alloc_align(struct gen_pool *pool, size_t size,
+   unsigned long align)
+{
+   struct gen_pool_chunk *chunk;
+   unsigned long addr = 0;
+   unsigned long align_mask;
+   int order = pool->min_alloc_order;
+   int nbits, start_bit = 0, end_bit, remain;
+
+#ifndef CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG
+   BUG_ON(in_nmi());
+#endif
+
+   if (size == 0)
+   return 0;
+
+   align_mask = ((align + (1UL << order) - 1) >> order) - 1;
+   nbits = (size + (1UL << order) - 1) >> order;
+   rcu_read_lock();
+   list_for_each_entry_rcu(chunk, &pool->chunks, next_chunk) {
+   if (size > atomic_read(&chunk->avail))
+   continue;
+
+   end_bit = chunk_size(chunk) >> order;
+retry:
+   start_bit = pool->algo(chunk->bits, end_bit, start_bit, nbits,
+   pool->data, align_mask);
+   if (start_bit >= end_bit)
+   continue;
+   remain = bitmap_set_ll(chunk->bits, start_bit, nbits);
+   if (remain) {
+   remain = bitmap_clear_ll(chunk->bits, start_bit,
+nbits - remain);
+   BUG_ON(remain);
+   goto retry;
+   }
+
+   addr = chunk->start_addr + ((unsigned long)start_bit << order);
+   size = nbits << order;
+   atomic_sub(size, &chunk->avail);
+   break;
+   }
+   rcu_read_unlock();
+   return addr;
+}
+EXPORT_SYMBOL(gen_pool_alloc);

+ * gen_pool_first_fit_align - find the first available region
+ * of memory matching the size requirement. The region will be aligned
+ * to the order of the size specified.
+ * @map: The address to base the search on
+ * @size: The bitmap size in bits
+ * @start: The bitnumber to start searching at
+ * @nr: The number of zeroed bits we're looking for
+ * @data: additional data - unused
+ */
+unsigned long gen_pool_first_fit_align(unsigned long *map,
+   unsigned long size, unsigned long start,
+   unsigned int nr, void *data, unsigned long align_mask)
+{
+   return bitmap_find_next_zero_area(map, size, start, nr, align_mask);
+}
+EXPORT_SYMBOL(gen_pool_first_fit_align);
+

Best Regards
Zhao Qiang


> -----Original Message-
> From: Wood Scott-B07421
> Sent: Wednesday, July 08, 2015 11:28 AM
> To: Zhao Qiang-B45475
> Cc: linuxppc-dev@lists.ozlabs.org; Xie Xiaobo-R63061
> Subject: Re: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to
> lib/
> 
> On Tue, 2015-07-07 at 22:26 -0500, Zhao Qiang-B45475 wrote:
> > Now the point is, genalloc is not so proper to qe muram while rheap is
> > written to manage muram,
> 
> rheap is not specific to muram.
> 
> > if use genalloc instead of rheap, there will be amounts of work to do.
> 
> Not much.  I think I've spent more time responding to continual e-mails
> on this topic than it would have taken to convert it. :-P
> 
> > I have a suggestion, how about to put rheap under drivers/soc/qe,
> > because rheap is To manage muram when it is added to sdk.
> 
> No.
> 
> -Scott

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

RE: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to lib/

[Zhao Qiang]

> -Original Message-

> From: Wood Scott-B07421

> Sent: Thursday, July 09, 2015 2:59 AM

> To: Zhao Qiang-B45475

> Cc: linuxppc-dev@lists.ozlabs.org; Xie Xiaobo-R63061

> Subject: Re: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to

> lib/

>

> On Wed, 2015-07-08 at 02:25 -0500, Zhao Qiang-B45475 wrote:

> > So I will add two func for my use, do you think it is ok?

> > I need to align the address of allocated muram.

> > And I will set algo = gen_pool_first_fit_align.

> >

> > +unsigned long gen_pool_alloc_align(struct gen_pool *pool, size_t size,

> > +   unsigned long align)

>

> Again, please explain why you need this for CPM/QE.  I don't see

> rh_alloc_align() currently being used by either.

>

> Also, please stop top-posting.





unsigned long rh_alloc(struct _rh_info *info, int size, const char *owner)

{

return rh_alloc_align(info, size, info->alignment, owner);

}

EXPORT_SYMBOL_GPL(rh_alloc);



>

> -Scott


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

RE: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to lib/

[Zhao Qiang]

On Wed, 2015-07-09 at 11:51 -0500, Wood Scott wrote:

> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, July 09, 2015 11:51 AM
> To: Zhao Qiang-B45475
> Cc: linuxppc-dev@lists.ozlabs.org; Xie Xiaobo-R63061
> Subject: Re: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to
> lib/
> 
> On Wed, 2015-07-08 at 22:18 -0500, Zhao Qiang-B45475 wrote:
> > > -Original Message-
> > > From: Wood Scott-B07421
> > > Sent: Thursday, July 09, 2015 2:59 AM
> > > To: Zhao Qiang-B45475
> > > Cc: linuxppc-dev@lists.ozlabs.org; Xie Xiaobo-R63061
> > > Subject: Re: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/
> > > to lib/
> > >
> > > On Wed, 2015-07-08 at 02:25 -0500, Zhao Qiang-B45475 wrote:
> > > > So I will add two func for my use, do you think it is ok?
> > > > I need to align the address of allocated muram.
> > > > And I will set algo = gen_pool_first_fit_align.
> > > >
> > > > +unsigned long gen_pool_alloc_align(struct gen_pool *pool, size_t
> size,
> > > > +   unsigned long align)
> > >
> > > Again, please explain why you need this for CPM/QE.  I don't see
> > > rh_alloc_align() currently being used by either.
> > >
> > > Also, please stop top-posting.
> >
> >
> > unsigned long rh_alloc(struct _rh_info *info, int size, const char
> > *owner) {
> > return rh_alloc_align(info, size, info->alignment, owner); }
> > EXPORT_SYMBOL_GPL(rh_alloc);
> 
> That doesn't involve a different alignment for each allocation.  It uses
> the same alignment for all of them, and the alignment that cpm_common.c
> provides to rh_init() is 1 byte.
> 
> ...but sigh, cpm_muram_alloc() is changing cpm_muram_info.alignment
> behind the rheap code's back.  Despite the existence of rh_alloc_align().
> 
> So yes, add aligned allocation functionality to genalloc, but don't
> duplicate
> gen_pool_alloc() to do so.  Instead, rename gen_pool_alloc() to
> gen_pool_alloc_align() with an alignment parameter (also modifying the
> algo function to take an alignment arg, which
> gen_pool_first_fit_order_align() would ignore), and provide a

Here, I don’t understand how to handle the algo In your mind. 
Can you explain more detailly?

> gen_pool_alloc() wrapper that specifies 1 as the required alignment.
> Also be sure to CC lkml on the patchset since you're touching core code
> that doesn't have its own maintainer or list.
> 
> -Scott

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

RE: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to lib/

[Zhao Qiang]

On Wed, 2015-07-09 at 02:09PM -0500, Wood Scott wrote:

> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, July 09, 2015 2:09 PM
> To: Zhao Qiang-B45475
> Cc: linuxppc-dev@lists.ozlabs.org; Xie Xiaobo-R63061
> Subject: Re: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to
> lib/
> 
> On Thu, 2015-07-09 at 01:05 -0500, Zhao Qiang-B45475 wrote:
> > On Wed, 2015-07-09 at 11:51 -0500, Wood Scott wrote:
> >
> > > -Original Message-
> > > From: Wood Scott-B07421
> > > Sent: Thursday, July 09, 2015 11:51 AM
> > > To: Zhao Qiang-B45475
> > > Cc: linuxppc-dev@lists.ozlabs.org; Xie Xiaobo-R63061
> > > Subject: Re: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/
> > > to lib/
> > >
> > > That doesn't involve a different alignment for each allocation.  It
> > > uses the same alignment for all of them, and the alignment that
> > > cpm_common.c provides to rh_init() is 1 byte.
> > >
> > > ...but sigh, cpm_muram_alloc() is changing cpm_muram_info.alignment
> > > behind the rheap code's back.  Despite the existence of
> rh_alloc_align().
> > >
> > > So yes, add aligned allocation functionality to genalloc, but don't
> > > duplicate
> > > gen_pool_alloc() to do so.  Instead, rename gen_pool_alloc() to
> > > gen_pool_alloc_align() with an alignment parameter (also modifying
> > > the algo function to take an alignment arg, which
> > > gen_pool_first_fit_order_align() would ignore), and provide a
> >
> > Here, I don’t understand how to handle the algo In your mind.
> > Can you explain more detailly?
> 
> The algorithms would be unchanged except that they would receive a new
> alignment (or alignment mask) parameter.  gen_pool_first_fit_order_align()
> would ignore it, but the other algorithms would pass it through to the
> bitmap allocator.

How about to add an align_mask parameter to gen_pool_first_fit? 

> 
> -Scott

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[RFC] genalloc:add an gen_pool_alloc_align func to genalloc

[Zhao Qiang]

Bytes alignment is required to manage some special ram,
so add gen_pool_alloc_align func to genalloc.
rename gen_pool_alloc to gen_pool_alloc_align with a align parameter,
then provide gen_pool_alloc to call gen_pool_alloc_align with
align = 1 Byte.

Signed-off-by: Zhao Qiang 
---
FSL's IP block QE require this function to manage muram.
QE supported only PowerPC, and its code was put under arch/powerpc directory,
using arch/powerpc/lib/rheap.c to manage muram.
Now it support both arm(ls1021,ls1043,ls2085 and such on) and powerpc,
the code need to move from arch/powerpc to public direcory,
Scott wood hopes to use genalloc to manage the muram, after discussing 
with scott, we decide to add gen_pool_alloc_align to meet the requirement
for bytes-alignment.

 include/linux/genalloc.h | 10 +++---
 lib/genalloc.c   | 38 ++
 2 files changed, 37 insertions(+), 11 deletions(-)

diff --git a/include/linux/genalloc.h b/include/linux/genalloc.h
index 1ccaab4..65fdf14 100644
--- a/include/linux/genalloc.h
+++ b/include/linux/genalloc.h
@@ -96,6 +96,8 @@ static inline int gen_pool_add(struct gen_pool *pool, 
unsigned long addr,
 }
 extern void gen_pool_destroy(struct gen_pool *);
 extern unsigned long gen_pool_alloc(struct gen_pool *, size_t);
+extern unsigned long gen_pool_alloc_align(struct gen_pool *, size_t,
+   unsigned long align);
 extern void *gen_pool_dma_alloc(struct gen_pool *pool, size_t size,
dma_addr_t *dma);
 extern void gen_pool_free(struct gen_pool *, unsigned long, size_t);
@@ -108,14 +110,16 @@ extern void gen_pool_set_algo(struct gen_pool *pool, 
genpool_algo_t algo,
void *data);
 
 extern unsigned long gen_pool_first_fit(unsigned long *map, unsigned long size,
-   unsigned long start, unsigned int nr, void *data);
+   unsigned long start, unsigned int nr, void *data,
+   unsigned long align_mask);
 
 extern unsigned long gen_pool_first_fit_order_align(unsigned long *map,
unsigned long size, unsigned long start, unsigned int nr,
-   void *data);
+   void *data, unsigned long align_mask);
 
 extern unsigned long gen_pool_best_fit(unsigned long *map, unsigned long size,
-   unsigned long start, unsigned int nr, void *data);
+   unsigned long start, unsigned int nr, void *data,
+   unsigned long align_mask);
 
 extern struct gen_pool *devm_gen_pool_create(struct device *dev,
int min_alloc_order, int nid);
diff --git a/lib/genalloc.c b/lib/genalloc.c
index d214866..dd63448 100644
--- a/lib/genalloc.c
+++ b/lib/genalloc.c
@@ -258,19 +258,22 @@ void gen_pool_destroy(struct gen_pool *pool)
 EXPORT_SYMBOL(gen_pool_destroy);
 
 /**
- * gen_pool_alloc - allocate special memory from the pool
+ * gen_pool_alloc_align - allocate special memory from the pool
  * @pool: pool to allocate from
  * @size: number of bytes to allocate from the pool
+ * @align: number of bytes to align
  *
  * Allocate the requested number of bytes from the specified pool.
  * Uses the pool allocation function (with first-fit algorithm by default).
  * Can not be used in NMI handler on architectures without
  * NMI-safe cmpxchg implementation.
  */
-unsigned long gen_pool_alloc(struct gen_pool *pool, size_t size)
+unsigned long gen_pool_alloc_align(struct gen_pool *pool, size_t size,
+   unsigned long align)
 {
struct gen_pool_chunk *chunk;
unsigned long addr = 0;
+   unsigned long align_mask;
int order = pool->min_alloc_order;
int nbits, start_bit = 0, end_bit, remain;
 
@@ -281,6 +284,7 @@ unsigned long gen_pool_alloc(struct gen_pool *pool, size_t 
size)
if (size == 0)
return 0;
 
+   align_mask = ((align + (1UL << order) - 1) >> order) - 1;
nbits = (size + (1UL << order) - 1) >> order;
rcu_read_lock();
list_for_each_entry_rcu(chunk, &pool->chunks, next_chunk) {
@@ -290,7 +294,7 @@ unsigned long gen_pool_alloc(struct gen_pool *pool, size_t 
size)
end_bit = chunk_size(chunk) >> order;
 retry:
start_bit = pool->algo(chunk->bits, end_bit, start_bit, nbits,
-   pool->data);
+   pool->data, align_mask);
if (start_bit >= end_bit)
continue;
remain = bitmap_set_ll(chunk->bits, start_bit, nbits);
@@ -309,6 +313,22 @@ retry:
rcu_read_unlock();
return addr;
 }
+EXPORT_SYMBOL(gen_pool_alloc_align);
+
+/**
+ * gen_pool_alloc - allocate special memory from the pool
+ * @pool: pool to allocate from
+ * @size: number of bytes to allocate from the pool
+ *
+ * Allocate the requested number of bytes from the specified pool.
+ * Uses the pool allocation function (with first-fit algorithm by default).
+ * Can not be us

RE: [RFC] genalloc:add an gen_pool_alloc_align func to genalloc

[Zhao Qiang]

> -Original Message-
> From: Wood Scott-B07421
> Sent: Friday, July 10, 2015 6:20 AM
> To: Zhao Qiang-B45475
> Cc: lau...@codeaurora.org; linux-ker...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; a...@linux-foundation.org; o...@lixom.net;
> catalin.mari...@arm.com; Xie Xiaobo-R63061
> Subject: Re: [RFC] genalloc:add an gen_pool_alloc_align func to genalloc
> 
> On Thu, 2015-07-09 at 15:47 +0800, Zhao Qiang wrote:
> > @@ -541,13 +562,14 @@ EXPORT_SYMBOL(gen_pool_first_fit_order_align);
> >   * which we can allocate the memory.
> >   */
> >  unsigned long gen_pool_best_fit(unsigned long *map, unsigned long size,
> > - unsigned long start, unsigned int nr, void *data)
> > + unsigned long start, unsigned int nr,
> > + void *data, unsigned long align_mask)
> >  {
> >   unsigned long start_bit = size;
> >   unsigned long len = size + 1;
> >   unsigned long index;
> >
> > - index = bitmap_find_next_zero_area(map, size, start, nr, 0);
> > + index = bitmap_find_next_zero_area(map, size, start, nr,
> align_mask);
> >
> >   while (index < size) {
> >   int next_bit = find_next_bit(map, size, index + nr);
> 
> What about the other call to bitmap_find_next_zero_area()?

All others will pass the align_mask to bitmap_find_next_zero_area.

> 
> -Scott

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

RE: [RFC] genalloc:add an gen_pool_alloc_align func to genalloc

[Zhao Qiang]

> -Original Message-
> From: Laura Abbott [mailto:labb...@redhat.com]
> Sent: Friday, July 10, 2015 5:51 AM
> To: Zhao Qiang-B45475; lau...@codeaurora.org
> Cc: linux-ker...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
> a...@linux-foundation.org; o...@lixom.net; catalin.mari...@arm.com; Wood
> Scott-B07421; Xie Xiaobo-R63061
> Subject: Re: [RFC] genalloc:add an gen_pool_alloc_align func to genalloc
> 
> On 07/09/2015 12:47 AM, Zhao Qiang wrote:
> > Bytes alignment is required to manage some special ram, so add
> > gen_pool_alloc_align func to genalloc.
> > rename gen_pool_alloc to gen_pool_alloc_align with a align parameter,
> > then provide gen_pool_alloc to call gen_pool_alloc_align with align =
> > 1 Byte.
> >
> > Signed-off-by: Zhao Qiang 
> > ---
> > FSL's IP block QE require this function to manage muram.
> > QE supported only PowerPC, and its code was put under arch/powerpc
> > directory, using arch/powerpc/lib/rheap.c to manage muram.
> > Now it support both arm(ls1021,ls1043,ls2085 and such on) and powerpc,
> > the code need to move from arch/powerpc to public direcory, Scott wood
> > hopes to use genalloc to manage the muram, after discussing with
> > scott, we decide to add gen_pool_alloc_align to meet the requirement
> > for bytes-alignment.
> 
> gen_pool supports custom allocation algorithms. I thought this was
> discussed previously and the conclusion was that if you wanted alignment
> you should use custom allocation algorithms. I'm failing at finding any
> thread discussing it though.
> 
> Perhaps another option would be to add another runtime argument to
> gen_pool where you could pass the alignment to your custom allocation
> function. This way alignment isn't inherently coded into any of the
> algorithms.
> 
> >
> >   include/linux/genalloc.h | 10 +++---
> >   lib/genalloc.c   | 38 ++
> >   2 files changed, 37 insertions(+), 11 deletions(-)
> >
> > diff --git a/include/linux/genalloc.h b/include/linux/genalloc.h index
> > 1ccaab4..65fdf14 100644
> > --- a/include/linux/genalloc.h
> > +++ b/include/linux/genalloc.h
> > @@ -96,6 +96,8 @@ static inline int gen_pool_add(struct gen_pool *pool,
> unsigned long addr,
> >   }
> >   extern void gen_pool_destroy(struct gen_pool *);
> >   extern unsigned long gen_pool_alloc(struct gen_pool *, size_t);
> > +extern unsigned long gen_pool_alloc_align(struct gen_pool *, size_t,
> > +   unsigned long align);
> >   extern void *gen_pool_dma_alloc(struct gen_pool *pool, size_t size,
> > dma_addr_t *dma);
> >   extern void gen_pool_free(struct gen_pool *, unsigned long, size_t);
> > @@ -108,14 +110,16 @@ extern void gen_pool_set_algo(struct gen_pool
> *pool, genpool_algo_t algo,
> > void *data);
> >
> >   extern unsigned long gen_pool_first_fit(unsigned long *map, unsigned
> long size,
> > -   unsigned long start, unsigned int nr, void *data);
> > +   unsigned long start, unsigned int nr, void *data,
> > +   unsigned long align_mask);
> >
> >   extern unsigned long gen_pool_first_fit_order_align(unsigned long
> *map,
> > unsigned long size, unsigned long start, unsigned int nr,
> > -   void *data);
> > +   void *data, unsigned long align_mask);
> >
> >   extern unsigned long gen_pool_best_fit(unsigned long *map, unsigned
> long size,
> > -   unsigned long start, unsigned int nr, void *data);
> > +   unsigned long start, unsigned int nr, void *data,
> > +   unsigned long align_mask);
> >
> >   extern struct gen_pool *devm_gen_pool_create(struct device *dev,
> > int min_alloc_order, int nid);
> > diff --git a/lib/genalloc.c b/lib/genalloc.c index d214866..dd63448
> > 100644
> > --- a/lib/genalloc.c
> > +++ b/lib/genalloc.c
> > @@ -258,19 +258,22 @@ void gen_pool_destroy(struct gen_pool *pool)
> >   EXPORT_SYMBOL(gen_pool_destroy);
> >
> >   /**
> > - * gen_pool_alloc - allocate special memory from the pool
> > + * gen_pool_alloc_align - allocate special memory from the pool
> >* @pool: pool to allocate from
> >* @size: number of bytes to allocate from the pool
> > + * @align: number of bytes to align
> >*
> >* Allocate the requested number of bytes from the specified pool.
> >* Uses the pool allocation function (with first-fit algorithm by
> default).
> >* Can not be used in NMI handler on architectures without
> >* NMI-safe cmpxch

[PATCH] powerpc/p1010rdb:update dts for pcie interrupt-map

[Zhao Qiang]

From: Zhao Qiang 

p1010rdb-pb use the irq[4:5] for inta and intb to pcie,
it is active-high, so set it.

Signed-off-by: Zhao Qiang 
Change-Id: I29db41b4a8b5a67c18151099884edda6de4d9d1a
Reviewed-on: http://git.am.freescale.net:8181/9915
Tested-by: Review Code-CDREVIEW 
Reviewed-by: Xiaobo Xie 
Reviewed-by: Jose Rivera 
---
 arch/powerpc/boot/dts/fsl/p1010si-post.dtsi | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi 
b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
index 1804ed7..4313ff6 100644
--- a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
@@ -59,8 +59,12 @@
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
-    0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
-    0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
+   /*
+*irq[4:5] only for PCIe in dts, set to active-high
+*irq[6:7] is pulled up on board, set to active-low
+*/
+    0x0 0x0 0x1 &mpic 0x4 0x2 0x0 0x0
+    0x0 0x0 0x2 &mpic 0x5 0x2 0x0 0x0
 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
>;
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[RFC v2] genalloc:add an gen_pool_first_fit_align algo to genalloc

[Zhao Qiang]

Bytes alignment is required to manage some special ram,
so add gen_pool_first_fit_align to genalloc.
User should define data structure
struct data {
int align;
struct gen_pool *pool;
}
align is the number of  bytes alignment,
pool points to gen_pool which include data.

Signed-off-by: Zhao Qiang 
---
*v2:
changes:
title has been modified, original patch link: 
http://patchwork.ozlabs.org/patch/493297/

original patch add a func gen_pool_alloc_align, 
then pass alignment to it as an parameter.
after discussing with lauraa and scott, they recommend 
to pass alignment as part of data based on 
commit message for ca279cf1065fb689abea1dc7d8c11787729bb185 which adds "data":

"As I can't predict all the possible requirements/needs for all allocation
uses cases, I add a "free" field 'void *data' to pass any needed 
information to the allocation function.  For example 'data' could be used 
to handle a structure where you store the alignment, the expected memory 
bank, the requester device, or any information that could influence the 
allocation algorithm."




 include/linux/genalloc.h |  4 
 lib/genalloc.c   | 25 +
 2 files changed, 29 insertions(+)

diff --git a/include/linux/genalloc.h b/include/linux/genalloc.h
index 1ccaab4..b85d0f8 100644
--- a/include/linux/genalloc.h
+++ b/include/linux/genalloc.h
@@ -110,6 +110,10 @@ extern void gen_pool_set_algo(struct gen_pool *pool, 
genpool_algo_t algo,
 extern unsigned long gen_pool_first_fit(unsigned long *map, unsigned long size,
unsigned long start, unsigned int nr, void *data);
 
+extern unsigned long gen_pool_first_fit_align(unsigned long *map,
+   unsigned long size, unsigned long start, unsigned int nr,
+   void *data);
+
 extern unsigned long gen_pool_first_fit_order_align(unsigned long *map,
unsigned long size, unsigned long start, unsigned int nr,
void *data);
diff --git a/lib/genalloc.c b/lib/genalloc.c
index d214866..e6608cd 100644
--- a/lib/genalloc.c
+++ b/lib/genalloc.c
@@ -509,6 +509,31 @@ unsigned long gen_pool_first_fit(unsigned long *map, 
unsigned long size,
 EXPORT_SYMBOL(gen_pool_first_fit);
 
 /**
+ * gen_pool_first_fit_align - find the first available region
+ * of memory matching the size requirement (no alignment constraint)
+ * @map: The address to base the search on
+ * @size: The bitmap size in bits
+ * @start: The bitnumber to start searching at
+ * @nr: The number of zeroed bits we're looking for
+ * @data: additional data - unused
+ */
+unsigned long gen_pool_first_fit_align(unsigned long *map, unsigned long size,
+   unsigned long start, unsigned int nr, void *data)
+{
+   unsigned long align_mask;
+   int order;
+
+   if (data && data->pool) {
+   order = data->pool->min_alloc_order;
+   align_mask = ((data->align + (1UL << order) - 1) >> order) - 1;
+   } else {
+   pr_err("no data or data->pool\n");
+   }
+   return bitmap_find_next_zero_area(map, size, start, nr, align_mask);
+}
+EXPORT_SYMBOL(gen_pool_first_fit_algin);
+
+/**
  * gen_pool_first_fit_order_align - find the first available region
  * of memory matching the size requirement. The region will be aligned
  * to the order of the size specified.
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

RE: [RFC v2] genalloc:add an gen_pool_first_fit_align algo to genalloc

[Zhao Qiang]

On Tue, 2015-07-28 at 5:21, Scott Wood wrote:
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, July 28, 2015 5:21 AM
> To: Zhao Qiang-B45475
> Cc: lau...@codeaurora.org; linux-ker...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; a...@linux-foundation.org; o...@lixom.net;
> catalin.mari...@arm.com; Xie Xiaobo-R63061
> Subject: Re: [RFC v2] genalloc:add an gen_pool_first_fit_align algo to
> genalloc
> 
> On Mon, 2015-07-27 at 17:57 +0800, Zhao Qiang wrote:
> 
> Where's the part that adds the ability to pass in data to each allocation
> call, as per the previous discussion?

You means to use gen_pool_alloc_data()?
Previously you said that the format of data is algorithm-specific,
So I think it is better to handle data in algorithm function.

If you still prefer gen_pool_alloc_data(), I will modify it.
But there still are details I want to confirm with you.
1. If use gen_pool_alloc_data(), should I pass data as a parameter?
2. Should I count align_mask in gen_pool_alloc_data(), meanwhile, add 
   a align_mask to data as a member?
3. where to define the data, in genalloc.h or caller layer?

> 
> -Scott

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

RE: [RFC v2] genalloc:add an gen_pool_first_fit_align algo to genalloc

[Zhao Qiang]

On Thu, 2015-07-30 at 5:21, Scott Wood wrote:
> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, July 30, 2015 12:19 AM
> To: Zhao Qiang-B45475
> Cc: lau...@codeaurora.org; linux-ker...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; a...@linux-foundation.org; o...@lixom.net;
> catalin.mari...@arm.com; Xie Xiaobo-R63061
> Subject: Re: [RFC v2] genalloc:add an gen_pool_first_fit_align algo to
> genalloc
> 
> On Tue, 2015-07-28 at 00:32 -0500, Zhao Qiang-B45475 wrote:
> > On Tue, 2015-07-28 at 5:21, Scott Wood wrote:
> > > -Original Message-
> > > From: Wood Scott-B07421
> > > Sent: Tuesday, July 28, 2015 5:21 AM
> > > To: Zhao Qiang-B45475
> > > Cc: lau...@codeaurora.org; linux-ker...@vger.kernel.org; linuxppc-
> > > d...@lists.ozlabs.org; a...@linux-foundation.org; o...@lixom.net;
> > > catalin.mari...@arm.com; Xie Xiaobo-R63061
> > > Subject: Re: [RFC v2] genalloc:add an gen_pool_first_fit_align algo
> > > to genalloc
> > >
> > > On Mon, 2015-07-27 at 17:57 +0800, Zhao Qiang wrote:
> > >
> > > Where's the part that adds the ability to pass in data to each
> > > allocation call, as per the previous discussion?
> >
> > You means to use gen_pool_alloc_data()?
> 
> Yes.
> 
> > Previously you said that the format of data is algorithm-specific, So
> > I think it is better to handle data in algorithm function.
> 
> It is a channel for communication from the API caller to the algorithm.
> 
> > If you still prefer gen_pool_alloc_data(), I will modify it.
> > But there still are details I want to confirm with you.
> > 1. If use gen_pool_alloc_data(), should I pass data as a parameter?
> 
> Yes.
> 
> > 2. Should I count align_mask in gen_pool_alloc_data(), meanwhile, add
> >a align_mask to data as a member?
> 
> gen_pool_alloc_data() should just pass data to the algorithm.  The
> algorithm should calculate align_mask based on align.  I don't think
> exposing align_mask to API users would be very friendly.

If calculate align_mask in algorithm, I need to get pool->min_alloc_order in 
algorithm,
Like:
   order = data->pool->min_alloc_order;
   align_mask = ((data->align + (1UL << order) - 1) >> order) - 1; 
so I add pool to structure data as a member. Is there any other better idea? 

> 
> > 3. where to define the data, in genalloc.h or caller layer?
> 
> Same place as where the algorithm function is declared.
> 
> -Scott
> 
-Zhao Qiang
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[RFC v3] genalloc:support memory-allocation with bytes-alignment to genalloc

[Zhao Qiang]

Bytes alignment is required to manage some special RAM,
so add gen_pool_first_fit_align to genalloc,
meanwhile add gen_pool_alloc_data to pass data to
gen_pool_first_fit_align(modify gen_pool_alloc as a wrapper)

Signed-off-by: Zhao Qiang 
---
*v2:
changes:
title has been modified, original patch link: 
http://patchwork.ozlabs.org/patch/493297/

original patch add a func gen_pool_alloc_align, 
then pass alignment to it as an parameter.
after discussing with lauraa and scott, they recommend 
to pass alignment as part of data based on 
commit message for ca279cf1065fb689abea1dc7d8c11787729bb185 which adds "data":

"As I can't predict all the possible requirements/needs for all allocation
uses cases, I add a "free" field 'void *data' to pass any needed 
information to the allocation function.  For example 'data' could be used 
to handle a structure where you store the alignment, the expected memory 
bank, the requester device, or any information that could influence the 
allocation algorithm."

*v3:
changes:
title has been modified, original patch link: 
http://patchwork.ozlabs.org/patch/500317/

according to the comments, add gen_pool_alloc_data,
modify gen_pool_alloc as a wrapper, define struct data_align
for gen_pool_first_fit_align algorithm. add parameter 
pointer pool to algorithm.

 include/linux/genalloc.h | 23 +++---
 lib/genalloc.c   | 63 
 2 files changed, 77 insertions(+), 9 deletions(-)

diff --git a/include/linux/genalloc.h b/include/linux/genalloc.h
index 1ccaab4..760af91 100644
--- a/include/linux/genalloc.h
+++ b/include/linux/genalloc.h
@@ -34,6 +34,7 @@
 
 struct device;
 struct device_node;
+struct gen_pool;
 
 /**
  * Allocation callback function type definition
@@ -47,7 +48,7 @@ typedef unsigned long (*genpool_algo_t)(unsigned long *map,
unsigned long size,
unsigned long start,
unsigned int nr,
-   void *data);
+   void *data, struct gen_pool *pool);
 
 /*
  *  General purpose special memory pool descriptor.
@@ -73,6 +74,13 @@ struct gen_pool_chunk {
unsigned long bits[0];  /* bitmap for allocating memory chunk */
 };
 
+/*
+ *  General purpose special memory pool data descriptor.
+ */
+struct data_align {
+   int align;  /* alignment by bytes for starting address */
+};
+
 extern struct gen_pool *gen_pool_create(int, int);
 extern phys_addr_t gen_pool_virt_to_phys(struct gen_pool *pool, unsigned long);
 extern int gen_pool_add_virt(struct gen_pool *, unsigned long, phys_addr_t,
@@ -96,6 +104,7 @@ static inline int gen_pool_add(struct gen_pool *pool, 
unsigned long addr,
 }
 extern void gen_pool_destroy(struct gen_pool *);
 extern unsigned long gen_pool_alloc(struct gen_pool *, size_t);
+extern unsigned long gen_pool_alloc_data(struct gen_pool *, size_t, void 
*data);
 extern void *gen_pool_dma_alloc(struct gen_pool *pool, size_t size,
dma_addr_t *dma);
 extern void gen_pool_free(struct gen_pool *, unsigned long, size_t);
@@ -108,14 +117,20 @@ extern void gen_pool_set_algo(struct gen_pool *pool, 
genpool_algo_t algo,
void *data);
 
 extern unsigned long gen_pool_first_fit(unsigned long *map, unsigned long size,
-   unsigned long start, unsigned int nr, void *data);
+   unsigned long start, unsigned int nr, void *data,
+   struct gen_pool *pool);
+
+extern unsigned long gen_pool_first_fit_align(unsigned long *map,
+   unsigned long size, unsigned long start, unsigned int nr,
+   void *data, struct gen_pool *pool);
 
 extern unsigned long gen_pool_first_fit_order_align(unsigned long *map,
unsigned long size, unsigned long start, unsigned int nr,
-   void *data);
+   void *data, struct gen_pool *pool);
 
 extern unsigned long gen_pool_best_fit(unsigned long *map, unsigned long size,
-   unsigned long start, unsigned int nr, void *data);
+   unsigned long start, unsigned int nr, void *data,
+   struct gen_pool *pool);
 
 extern struct gen_pool *devm_gen_pool_create(struct device *dev,
int min_alloc_order, int nid);
diff --git a/lib/genalloc.c b/lib/genalloc.c
index d214866..e0b737c 100644
--- a/lib/genalloc.c
+++ b/lib/genalloc.c
@@ -269,6 +269,24 @@ EXPORT_SYMBOL(gen_pool_destroy);
  */
 unsigned long gen_pool_alloc(struct gen_pool *pool, size_t size)
 {
+   return gen_pool_alloc_data(pool, size, NULL);
+}
+EXPORT_SYMBOL(gen_pool_alloc);
+
+/**
+ * gen_pool_alloc_data - allocate special memory from the pool
+ * @pool: pool to allocate from
+ * @size: number of bytes to allocate from the pool
+ * @data: data passed to algorithm
+ *
+ * Allocate the requested number of bytes from the specified pool.
+ * Uses the pool a

[RFC v4] genalloc:support memory-allocation with bytes-alignment to genalloc

[Zhao Qiang]

Bytes alignment is required to manage some special RAM,
so add gen_pool_first_fit_align to genalloc,
meanwhile add gen_pool_alloc_data to pass data to
gen_pool_first_fit_align(modify gen_pool_alloc as a wrapper)

Signed-off-by: Zhao Qiang 
---
*v2:
changes:
title has been modified, original patch link: 
http://patchwork.ozlabs.org/patch/493297/

original patch add a func gen_pool_alloc_align, 
then pass alignment to it as an parameter.
after discussing with lauraa and scott, they recommend 
to pass alignment as part of data based on 
commit message for ca279cf1065fb689abea1dc7d8c11787729bb185 which adds "data":

"As I can't predict all the possible requirements/needs for all allocation
uses cases, I add a "free" field 'void *data' to pass any needed 
information to the allocation function.  For example 'data' could be used 
to handle a structure where you store the alignment, the expected memory 
bank, the requester device, or any information that could influence the 
allocation algorithm."

*v3:
changes:
title has been modified, original patch link: 
http://patchwork.ozlabs.org/patch/500317/

according to the comments, add gen_pool_alloc_data,
modify gen_pool_alloc as a wrapper, define struct data_align
for gen_pool_first_fit_align algorithm. add parameter 
pointer pool to algorithm.

*v4:
changes:
v3 link: 
http://patchwork.ozlabs.org/patch/500317/
There are comments for v3, according to the comments,
modify the patch for v4. such as modifying annotations,
removing unnecessary chek, removing unnecessary cast and so on.

 include/linux/genalloc.h | 23 +++
 lib/genalloc.c   | 58 +++-
 2 files changed, 72 insertions(+), 9 deletions(-)

diff --git a/include/linux/genalloc.h b/include/linux/genalloc.h
index 1ccaab4..55da07e 100644
--- a/include/linux/genalloc.h
+++ b/include/linux/genalloc.h
@@ -34,6 +34,7 @@
 
 struct device;
 struct device_node;
+struct gen_pool;
 
 /**
  * Allocation callback function type definition
@@ -47,7 +48,7 @@ typedef unsigned long (*genpool_algo_t)(unsigned long *map,
unsigned long size,
unsigned long start,
unsigned int nr,
-   void *data);
+   void *data, struct gen_pool *pool);
 
 /*
  *  General purpose special memory pool descriptor.
@@ -73,6 +74,13 @@ struct gen_pool_chunk {
unsigned long bits[0];  /* bitmap for allocating memory chunk */
 };
 
+/*
+ *  gen_pool data descriptor for gen_pool_first_fit_align.
+ */
+struct genpool_data_align {
+   int align;  /* alignment by bytes for starting address */
+};
+
 extern struct gen_pool *gen_pool_create(int, int);
 extern phys_addr_t gen_pool_virt_to_phys(struct gen_pool *pool, unsigned long);
 extern int gen_pool_add_virt(struct gen_pool *, unsigned long, phys_addr_t,
@@ -96,6 +104,7 @@ static inline int gen_pool_add(struct gen_pool *pool, 
unsigned long addr,
 }
 extern void gen_pool_destroy(struct gen_pool *);
 extern unsigned long gen_pool_alloc(struct gen_pool *, size_t);
+extern unsigned long gen_pool_alloc_data(struct gen_pool *, size_t, void 
*data);
 extern void *gen_pool_dma_alloc(struct gen_pool *pool, size_t size,
dma_addr_t *dma);
 extern void gen_pool_free(struct gen_pool *, unsigned long, size_t);
@@ -108,14 +117,20 @@ extern void gen_pool_set_algo(struct gen_pool *pool, 
genpool_algo_t algo,
void *data);
 
 extern unsigned long gen_pool_first_fit(unsigned long *map, unsigned long size,
-   unsigned long start, unsigned int nr, void *data);
+   unsigned long start, unsigned int nr, void *data,
+   struct gen_pool *pool);
+
+extern unsigned long gen_pool_first_fit_align(unsigned long *map,
+   unsigned long size, unsigned long start, unsigned int nr,
+   void *data, struct gen_pool *pool);
 
 extern unsigned long gen_pool_first_fit_order_align(unsigned long *map,
unsigned long size, unsigned long start, unsigned int nr,
-   void *data);
+   void *data, struct gen_pool *pool);
 
 extern unsigned long gen_pool_best_fit(unsigned long *map, unsigned long size,
-   unsigned long start, unsigned int nr, void *data);
+   unsigned long start, unsigned int nr, void *data,
+   struct gen_pool *pool);
 
 extern struct gen_pool *devm_gen_pool_create(struct device *dev,
int min_alloc_order, int nid);
diff --git a/lib/genalloc.c b/lib/genalloc.c
index d214866..fe11a00 100644
--- a/lib/genalloc.c
+++ b/lib/genalloc.c
@@ -269,6 +269,24 @@ EXPORT_SYMBOL(gen_pool_destroy);
  */
 unsigned long gen_pool_alloc(struct gen_pool *pool, size_t size)
 {
+   return gen_pool_alloc_data(pool, size, pool->data);
+}
+EXPORT_SYMBOL(gen_pool_alloc);
+
+/**
+ * gen_pool_alloc_da

[PATCH] powerpc/p1010rdb:update phy node in dts

[Zhao Qiang]

Update phy node according to new P1010RDB-PB board.

Signed-off-by: Shengzhou Liu 
Signed-off-by: Zhao Qiang 
---
 arch/powerpc/boot/dts/p1010rdb.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/boot/dts/p1010rdb.dtsi 
b/arch/powerpc/boot/dts/p1010rdb.dtsi
index 7fc3402..8c675bf 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dtsi
+++ b/arch/powerpc/boot/dts/p1010rdb.dtsi
@@ -199,7 +199,7 @@
 
mdio@24000 {
phy0: ethernet-phy@0 {
-   interrupts = <3 1 0 0>;
+   interrupts = <0 1 0 0>;
reg = <0x1>;
};
 
@@ -209,7 +209,7 @@
};
 
phy2: ethernet-phy@2 {
-   interrupts = <2 1 0 0>;
+   interrupts = <1 1 0 0>;
reg = <0x2>;
};
 
-- 
1.8.0


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH] powerpc/p1010rdb:remove interrupts of ethernet-phy in device tree

[Zhao Qiang]

Since P1010RDB-PA and P1010RDB-PB boards use different external PHY
interrupt signals.
And actually the PHY interrupt is not used effectively with
corresponding interrupt handler.
So we can remove the interrupts node without side-effect to comply
with both P1010RDB-PA and P1010RDB-PB.

Signed-off-by: Shengzhou Liu 
Signed-off-by: Zhao Qiang 
---
 arch/powerpc/boot/dts/p1010rdb.dtsi | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/powerpc/boot/dts/p1010rdb.dtsi 
b/arch/powerpc/boot/dts/p1010rdb.dtsi
index 7fc3402..2433ae4 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dtsi
+++ b/arch/powerpc/boot/dts/p1010rdb.dtsi
@@ -199,17 +199,14 @@
 
mdio@24000 {
phy0: ethernet-phy@0 {
-   interrupts = <3 1 0 0>;
reg = <0x1>;
};
 
phy1: ethernet-phy@1 {
-   interrupts = <2 1 0 0>;
reg = <0x0>;
};
 
phy2: ethernet-phy@2 {
-   interrupts = <2 1 0 0>;
reg = <0x2>;
};
 
-- 
1.8.0


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v3] powerpc/p1010rdb-pb:make a new dts for p1010rdb-pb

[Zhao Qiang]

P1010RDB-PA and P1010RDB-PB boards use different external PHY
interrupt signals.
So make a new dts for P1010RDB-PB.

Signed-off-by: Shengzhou Liu 
Signed-off-by: Zhao Qiang 
---
Changes for v2:
-Remove phy interrupts for p1010rdb-pb
Changes for v3
-Maintain the phy interrupts p1010rdb-pa and make a new device 
tree for p1010rdb-pb

 arch/powerpc/boot/dts/p1010rdb-pa.dtsi |  11 ++
 arch/powerpc/boot/dts/p1010rdb-pb.dts  |  67 +
 arch/powerpc/boot/dts/p1010rdb-pb.dtsi |  11 ++
 arch/powerpc/boot/dts/p1010rdb.dts |   1 +
 arch/powerpc/boot/dts/p1010rdb.dtsi|   3 --
 arch/powerpc/boot/p1010rdb-pb.dtb  | Bin 0 -> 14030 bytes
 arch/powerpc/boot/p1010rdb.dtb | Bin 0 -> 14030 bytes
 arch/powerpc/platforms/85xx/p1010rdb.c |  29 ++
 8 files changed, 119 insertions(+), 3 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pa.dtsi
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pb.dts
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pb.dtsi
 create mode 100644 arch/powerpc/boot/p1010rdb-pb.dtb
 create mode 100644 arch/powerpc/boot/p1010rdb.dtb

diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dtsi 
b/arch/powerpc/boot/dts/p1010rdb-pa.dtsi
new file mode 100644
index 000..122996e
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pa.dtsi
@@ -0,0 +1,11 @@
+&phy0 {
+   interrupts = <3 1 0 0>;
+};
+
+&phy1 {
+   interrupts = <2 1 0 0>;
+};
+
+&phy2 {
+   interrupts = <2 1 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/p1010rdb-pb.dts 
b/arch/powerpc/boot/dts/p1010rdb-pb.dts
new file mode 100644
index 000..0213552
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pb.dts
@@ -0,0 +1,67 @@
+/*
+ * P1010 RDB-PB Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/include/ "fsl/p1010si-pre.dtsi"
+
+/ {
+   model = "fsl,P1010RDB-PB";
+   compatible = "fsl,P1010RDB-PB";
+
+   memory {
+   device_type = "memory";
+   };
+
+   board_ifc: ifc: ifc@ffe1e000 {
+   /* NOR, NAND Flashes and CPLD on board */
+   ranges = <0x0 0x0 0x0 0xee00 0x0200
+ 0x1 0x0 0x0 0xff80 0x0001
+ 0x3 0x0 0x0 0xffb0 0x0020>;
+   reg = <0x0 0xffe1e000 0 0x2000>;
+   };
+
+   board_soc: soc: soc@ffe0 {
+   ranges = <0x0 0x0 0xffe0 0x10>;
+   };
+
+   pci0: pcie@ffe09000 {
+   reg = <0 0xffe09000 0 0x1000>;
+   ranges = <0x200 0x0 0xa000 0 0xa000 0x0 0x2000
+ 0x100 0x0 0x 0 0xffc1 0x0 0x1>;
+   pcie@0 {
+   ranges = <0x200 0x0 0xa000
+ 0x200 0x0 0xa000
+ 0x0 0x2000
+
+ 0x100 0x0 0x0
+ 0x100 0x0 0x0
+ 0x0 0x10>;
+   };
+   };
+
+   pci1: pcie@ffe0a000 {
+   reg = <0 0xffe0a000 0 0x1000>;
+   ranges = <0x200 0x0 0x8000 0 0x8000 0x0 0x2000
+ 0x100 0x0 0x 0 0xffc0 0x0 0x1>;
+   pcie@0 {
+   ranges = <0x200 0x0 0x8000
+ 0x200 0x0 0x8000
+ 0x0 0x2000
+
+ 0x100 0x0 0x0
+ 0x100 0x0 0x0
+ 0x0 0x10>;
+   };
+   };
+};
+
+/include/ "p1010rdb.dtsi"
+/include/ "p1010rdb-pb.dtsi"
+/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb-pb.dtsi 
b/arch/powerpc/boot/dts/p1010rdb-pb.dtsi
new file mode 100644
index 000..52cd22e
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pb.dtsi
@@ -0,0 +1,11 @@
+&phy0 {
+   interrupts = <0 1 0 0>;
+};
+
+&phy1 {
+   interrupts = <2 1 0 0>;
+};
+
+&phy2 {
+   interrupts = <1 1 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/p1010rdb.dts 
b/arch/powerpc/boot/dts/p1010rdb.dts
index b868d22..0980ff0 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dts
+++ b/arch/powerpc/boot/dts/p1010rdb.dts
@@ -63,4 +63,5 @@
 };
 
 /include/ "p1010rdb.dtsi"
+/include/ "p1010rdb-pa.dtsi"
 /include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb.dtsi 
b/arch/powe

[PATCH v3] powerpc/p1010rdb-pb:make a new dts for p1010rdb-pb

[Zhao Qiang]

P1010RDB-PA and P1010RDB-PB boards use different external PHY
interrupt signals.
So make a new dts for P1010RDB-PB.

Signed-off-by: Shengzhou Liu 
Signed-off-by: Zhao Qiang 
---
Changes for v2:
-Remove phy interrupts for p1010rdb-pb
Changes for v3:
-Maintain the phy interrupts p1010rdb-pa and make a new device 
tree for p1010rdb-pb

 arch/powerpc/boot/dts/p1010rdb-pa.dtsi | 11 ++
 arch/powerpc/boot/dts/p1010rdb-pb.dts  | 67 ++
 arch/powerpc/boot/dts/p1010rdb-pb.dtsi | 11 ++
 arch/powerpc/boot/dts/p1010rdb.dts |  1 +
 arch/powerpc/boot/dts/p1010rdb.dtsi|  3 --
 arch/powerpc/platforms/85xx/p1010rdb.c | 29 +++
 6 files changed, 119 insertions(+), 3 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pa.dtsi
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pb.dts
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pb.dtsi

diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dtsi 
b/arch/powerpc/boot/dts/p1010rdb-pa.dtsi
new file mode 100644
index 000..122996e
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pa.dtsi
@@ -0,0 +1,11 @@
+&phy0 {
+   interrupts = <3 1 0 0>;
+};
+
+&phy1 {
+   interrupts = <2 1 0 0>;
+};
+
+&phy2 {
+   interrupts = <2 1 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/p1010rdb-pb.dts 
b/arch/powerpc/boot/dts/p1010rdb-pb.dts
new file mode 100644
index 000..0213552
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pb.dts
@@ -0,0 +1,67 @@
+/*
+ * P1010 RDB-PB Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/include/ "fsl/p1010si-pre.dtsi"
+
+/ {
+   model = "fsl,P1010RDB-PB";
+   compatible = "fsl,P1010RDB-PB";
+
+   memory {
+   device_type = "memory";
+   };
+
+   board_ifc: ifc: ifc@ffe1e000 {
+   /* NOR, NAND Flashes and CPLD on board */
+   ranges = <0x0 0x0 0x0 0xee00 0x0200
+ 0x1 0x0 0x0 0xff80 0x0001
+ 0x3 0x0 0x0 0xffb0 0x0020>;
+   reg = <0x0 0xffe1e000 0 0x2000>;
+   };
+
+   board_soc: soc: soc@ffe0 {
+   ranges = <0x0 0x0 0xffe0 0x10>;
+   };
+
+   pci0: pcie@ffe09000 {
+   reg = <0 0xffe09000 0 0x1000>;
+   ranges = <0x200 0x0 0xa000 0 0xa000 0x0 0x2000
+ 0x100 0x0 0x 0 0xffc1 0x0 0x1>;
+   pcie@0 {
+   ranges = <0x200 0x0 0xa000
+ 0x200 0x0 0xa000
+ 0x0 0x2000
+
+ 0x100 0x0 0x0
+ 0x100 0x0 0x0
+ 0x0 0x10>;
+   };
+   };
+
+   pci1: pcie@ffe0a000 {
+   reg = <0 0xffe0a000 0 0x1000>;
+   ranges = <0x200 0x0 0x8000 0 0x8000 0x0 0x2000
+ 0x100 0x0 0x 0 0xffc0 0x0 0x1>;
+   pcie@0 {
+   ranges = <0x200 0x0 0x8000
+ 0x200 0x0 0x8000
+ 0x0 0x2000
+
+ 0x100 0x0 0x0
+ 0x100 0x0 0x0
+ 0x0 0x10>;
+   };
+   };
+};
+
+/include/ "p1010rdb.dtsi"
+/include/ "p1010rdb-pb.dtsi"
+/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb-pb.dtsi 
b/arch/powerpc/boot/dts/p1010rdb-pb.dtsi
new file mode 100644
index 000..52cd22e
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pb.dtsi
@@ -0,0 +1,11 @@
+&phy0 {
+   interrupts = <0 1 0 0>;
+};
+
+&phy1 {
+   interrupts = <2 1 0 0>;
+};
+
+&phy2 {
+   interrupts = <1 1 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/p1010rdb.dts 
b/arch/powerpc/boot/dts/p1010rdb.dts
index b868d22..0980ff0 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dts
+++ b/arch/powerpc/boot/dts/p1010rdb.dts
@@ -63,4 +63,5 @@
 };
 
 /include/ "p1010rdb.dtsi"
+/include/ "p1010rdb-pa.dtsi"
 /include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb.dtsi 
b/arch/powerpc/boot/dts/p1010rdb.dtsi
index 7fc3402..2433ae4 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dtsi
+++ b/arch/powerpc/boot/dts/p1010rdb.dtsi
@@ -199,17 +199,14 @@
 
mdio@24000 {
phy0: ethernet-phy@0 {
-

[PATCH] powerpc/p1010rdb:update dts to adapt to both old and new p1010rdb

[Zhao Qiang]

P1010rdb-pa and p1010rdb-pb have different phy interrupts.
So update dts to adapt to both p1010rdb-pa and p1010rdb-pb.

Signed-off-by: Shengzhou Liu 
Signed-off-by: Zhao Qiang 
---
 arch/powerpc/boot/dts/p1010rdb-pa.dts | 33 ++
 arch/powerpc/boot/dts/p1010rdb-pb.dts | 33 ++
 arch/powerpc/boot/dts/p1010rdb.dts| 66 ---
 arch/powerpc/boot/dts/p1010rdb.dtsi   | 51 ---
 4 files changed, 112 insertions(+), 71 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pa.dts
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pb.dts
 delete mode 100644 arch/powerpc/boot/dts/p1010rdb.dts

diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dts 
b/arch/powerpc/boot/dts/p1010rdb-pa.dts
new file mode 100644
index 000..e1688d4
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pa.dts
@@ -0,0 +1,33 @@
+/*
+ * P1010 RDB-PA Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/include/ "fsl/p1010si-pre.dtsi"
+
+/ {
+   model = "fsl,P1010RDB-PA";
+   compatible = "fsl,P1010RDB";
+
+   /include/ "p1010rdb.dtsi"
+};
+
+&phy0 {
+   interrupts = <3 1 0 0>;
+};
+
+&phy1 {
+   interrupts = <2 1 0 0>;
+};
+
+&phy2 {
+   interrupts = <2 1 0 0>;
+};
+
+/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb-pb.dts 
b/arch/powerpc/boot/dts/p1010rdb-pb.dts
new file mode 100644
index 000..37f9366
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pb.dts
@@ -0,0 +1,33 @@
+/*
+ * P1010 RDB-PB Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/include/ "fsl/p1010si-pre.dtsi"
+
+/ {
+   model = "fsl,P1010RDB-PB";
+   compatible = "fsl,P1010RDB";
+
+   /include/ "p1010rdb.dtsi"
+};
+
+&phy0 {
+   interrupts = <0 1 0 0>;
+};
+
+&phy1 {
+   interrupts = <2 1 0 0>;
+};
+
+&phy2 {
+   interrupts = <1 1 0 0>;
+};
+
+/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb.dts 
b/arch/powerpc/boot/dts/p1010rdb.dts
deleted file mode 100644
index b868d22..000
--- a/arch/powerpc/boot/dts/p1010rdb.dts
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * P1010 RDB Device Tree Source
- *
- * Copyright 2011 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-/include/ "fsl/p1010si-pre.dtsi"
-
-/ {
-   model = "fsl,P1010RDB";
-   compatible = "fsl,P1010RDB";
-
-   memory {
-   device_type = "memory";
-   };
-
-   board_ifc: ifc: ifc@ffe1e000 {
-   /* NOR, NAND Flashes and CPLD on board */
-   ranges = <0x0 0x0 0x0 0xee00 0x0200
- 0x1 0x0 0x0 0xff80 0x0001
- 0x3 0x0 0x0 0xffb0 0x0020>;
-   reg = <0x0 0xffe1e000 0 0x2000>;
-   };
-
-   board_soc: soc: soc@ffe0 {
-   ranges = <0x0 0x0 0xffe0 0x10>;
-   };
-
-   pci0: pcie@ffe09000 {
-   reg = <0 0xffe09000 0 0x1000>;
-   ranges = <0x200 0x0 0xa000 0 0xa000 0x0 0x2000
- 0x100 0x0 0x 0 0xffc1 0x0 0x1>;
-   pcie@0 {
-   ranges = <0x200 0x0 0xa000
- 0x200 0x0 0xa000
- 0x0 0x2000
-
- 0x100 0x0 0x0
- 0x100 0x0 0x0
- 0x0 0x10>;
-   };
-   };
-
-   pci1: pcie@ffe0a000 {
-   reg = <0 0xffe0a000 0 0x1000>;
-   ranges = <0x200 0x0 0x8000 0 0x8000 0x0 0x2000
- 0x100 0x0 0x 0 0xffc0 0x0 0x1>;
-   pcie@0 {
-   ranges = <0x200 0x0 0x8000
- 0x200 0x0 0x8000
- 0x0 0x2000
-
-   

[PATCH] powerpc/p1010rdb:update mtd of nand to adapt to both old and new p1010rdb

[Zhao Qiang]

P1010rdb-pa and p1010rdb-pb have different mtd of nand.
So update dts to adapt to both p1010rdb-pa and p1010rdb-pb.

Signed-off-by: Zhao Qiang 
---
 arch/powerpc/boot/dts/p1010rdb-pa.dts | 40 +++
 arch/powerpc/boot/dts/p1010rdb-pb.dts | 34 +
 arch/powerpc/boot/dts/p1010rdb.dtsi   | 40 +--
 3 files changed, 75 insertions(+), 39 deletions(-)

diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dts 
b/arch/powerpc/boot/dts/p1010rdb-pa.dts
index e1688d4..9b4ca89 100644
--- a/arch/powerpc/boot/dts/p1010rdb-pa.dts
+++ b/arch/powerpc/boot/dts/p1010rdb-pa.dts
@@ -18,6 +18,46 @@
/include/ "p1010rdb.dtsi"
 };
 
+&ifc_nand {
+   partition@0 {
+   /* This location must not be altered  */
+   /* 1MB for u-boot Bootloader Image */
+   reg = <0x0 0x0010>;
+   label = "NAND U-Boot Image";
+   read-only;
+   };
+
+   partition@10 {
+   /* 1MB for DTB Image */
+   reg = <0x0010 0x0010>;
+   label = "NAND DTB Image";
+   };
+
+   partition@20 {
+   /* 4MB for Linux Kernel Image */
+   reg = <0x0020 0x0040>;
+   label = "NAND Linux Kernel Image";
+   };
+
+   partition@60 {
+   /* 4MB for Compressed Root file System Image */
+   reg = <0x0060 0x0040>;
+   label = "NAND Compressed RFS Image";
+   };
+
+   partition@a0 {
+   /* 15MB for JFFS2 based Root file System */
+   reg = <0x00a0 0x00f0>;
+   label = "NAND JFFS2 Root File System";
+   };
+
+   partition@190 {
+   /* 7MB for User Area */
+   reg = <0x0190 0x0070>;
+   label = "NAND User area";
+   };
+};
+
 &phy0 {
interrupts = <3 1 0 0>;
 };
diff --git a/arch/powerpc/boot/dts/p1010rdb-pb.dts 
b/arch/powerpc/boot/dts/p1010rdb-pb.dts
index 37f9366..f4c97fd 100644
--- a/arch/powerpc/boot/dts/p1010rdb-pb.dts
+++ b/arch/powerpc/boot/dts/p1010rdb-pb.dts
@@ -18,6 +18,40 @@
/include/ "p1010rdb.dtsi"
 };
 
+&ifc_nand {
+   partition@0 {
+   /* This location must not be altered  */
+   /* 2MB for u-boot Image and environment */
+   reg = <0x0 0x0020>;
+   label = "NAND U-Boot Image and env";
+   read-only;
+   };
+
+   partition@20 {
+   /* 1MB for DTB Image */
+   reg = <0x0020 0x0010>;
+   label = "NAND DTB Image";
+   };
+
+   partition@30 {
+   /* 5MB for Linux Kernel Image */
+   reg = <0x0030 0x0050>;
+   label = "NAND Linux Kernel Image";
+   };
+
+   partition@80 {
+   /* 56MB for Compressed Root file System Image */
+   reg = <0x0080 0x0380>;
+   label = "NAND  ROOTFS";
+   };
+
+   partition@400 {
+   /* 1984MB for User Area */
+   reg = <0x0400 0x7c00>;
+   label = "NAND User area";
+   };
+};
+
 &phy0 {
interrupts = <0 1 0 0>;
 };
diff --git a/arch/powerpc/boot/dts/p1010rdb.dtsi 
b/arch/powerpc/boot/dts/p1010rdb.dtsi
index 5e5ca56..61abc18 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dtsi
+++ b/arch/powerpc/boot/dts/p1010rdb.dtsi
@@ -79,49 +79,11 @@ board_ifc: ifc: ifc@ffe1e000 {
};
};
 
-   nand@1,0 {
+   ifc_nand: nand@1,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,ifc-nand";
reg = <0x1 0x0 0x1>;
-
-   partition@0 {
-   /* This location must not be altered  */
-   /* 1MB for u-boot Bootloader Image */
-   reg = <0x0 0x0010>;
-   label = "NAND U-Boot Image";
-   read-only;
-   };
-
-   partition@10 {
-   /* 1MB for DTB Image */
-   reg = <0x0010 0x0010>;
-   label = "NAND DTB Image";
-   };
-
-   partition@20 {
-   /* 4MB for Linux Kernel Image */
-   reg = <0x0020 0x0040>;
-   label = "NAND Linux Kernel Image";
-   };
-
-   partition@60 {
-   /* 4MB for Compressed Root file System Image */
-   reg = <0x0060 0x0040

[PATCH v2] powerpc/p1010rdb:update dts to adapt to both old and new p1010rdb

[Zhao Qiang]

P1010rdb-pa and p1010rdb-pb have different phy interrupts.
So update dts to adapt to both p1010rdb-pa and p1010rdb-pb.

Signed-off-by: Shengzhou Liu 
Signed-off-by: Zhao Qiang 
---
Changes for v2
- Take p1010rdb_36b.dts into account

 arch/powerpc/boot/dts/p1010rdb-pa.dts |  79 ++
 arch/powerpc/boot/dts/p1010rdb-pa_36b.dts | 105 ++
 arch/powerpc/boot/dts/p1010rdb-pb.dts |  79 ++
 arch/powerpc/boot/dts/p1010rdb-pb_36b.dts | 105 ++
 arch/powerpc/boot/dts/p1010rdb.dts|  66 ---
 arch/powerpc/boot/dts/p1010rdb.dtsi   |   3 -
 arch/powerpc/boot/dts/p1010rdb_36b.dts|  92 --
 7 files changed, 368 insertions(+), 161 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pa.dts
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pa_36b.dts
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pb.dts
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pb_36b.dts
 delete mode 100644 arch/powerpc/boot/dts/p1010rdb.dts
 delete mode 100644 arch/powerpc/boot/dts/p1010rdb_36b.dts

diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dts 
b/arch/powerpc/boot/dts/p1010rdb-pa.dts
new file mode 100644
index 000..35f1eb9
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pa.dts
@@ -0,0 +1,79 @@
+/*
+ * P1010 RDB-PA Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/include/ "fsl/p1010si-pre.dtsi"
+
+/ {
+   model = "fsl,P1010RDB-PA";
+   compatible = "fsl,P1010RDB";
+
+   memory {
+   device_type = "memory";
+   };
+
+   board_ifc: ifc: ifc@ffe1e000 {
+   /* NOR, NAND Flashes and CPLD on board */
+   ranges = <0x0 0x0 0x0 0xee00 0x0200
+ 0x1 0x0 0x0 0xff80 0x0001
+ 0x3 0x0 0x0 0xffb0 0x0020>;
+   reg = <0x0 0xffe1e000 0 0x2000>;
+   };
+
+   board_soc: soc: soc@ffe0 {
+   ranges = <0x0 0x0 0xffe0 0x10>;
+   };
+
+   pci0: pcie@ffe09000 {
+   reg = <0 0xffe09000 0 0x1000>;
+   ranges = <0x200 0x0 0xa000 0 0xa000 0x0 0x2000
+ 0x100 0x0 0x 0 0xffc1 0x0 0x1>;
+   pcie@0 {
+   ranges = <0x200 0x0 0xa000
+ 0x200 0x0 0xa000
+ 0x0 0x2000
+
+ 0x100 0x0 0x0
+ 0x100 0x0 0x0
+ 0x0 0x10>;
+   };
+   };
+
+   pci1: pcie@ffe0a000 {
+   reg = <0 0xffe0a000 0 0x1000>;
+   ranges = <0x200 0x0 0x8000 0 0x8000 0x0 0x2000
+ 0x100 0x0 0x 0 0xffc0 0x0 0x1>;
+   pcie@0 {
+   ranges = <0x200 0x0 0x8000
+ 0x200 0x0 0x8000
+ 0x0 0x2000
+
+ 0x100 0x0 0x0
+ 0x100 0x0 0x0
+ 0x0 0x10>;
+   };
+   };
+};
+
+/include/ "p1010rdb.dtsi"
+
+&phy0 {
+   interrupts = <3 1 0 0>;
+};
+
+&phy1 {
+   interrupts = <2 1 0 0>;
+};
+
+&phy2 {
+   interrupts = <2 1 0 0>;
+};
+
+/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts 
b/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts
new file mode 100644
index 000..c73bd16
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts
@@ -0,0 +1,105 @@
+/*
+ * P1010 RDB-PA Device Tree Source (36-bit address map)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ *   names of its contributors may be used to endorse or promote products
+ *   derived from this software with

[PATCH 1/2] powerpc/p1010rdb:add P1010RDB-PB platform support

[Zhao Qiang]

The P1010RDB-PB is similar to P1010RDB(P1010RDB-PA).
So, P1010RDB-PB use the same platform file as P1010RDB.
Then Add support for P1010RDB-PB platform.

Signed-off-by: Zhao Qiang 
---
 arch/powerpc/platforms/85xx/p1010rdb.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c 
b/arch/powerpc/platforms/85xx/p1010rdb.c
index 0252961..d6a3dd3 100644
--- a/arch/powerpc/platforms/85xx/p1010rdb.c
+++ b/arch/powerpc/platforms/85xx/p1010rdb.c
@@ -66,6 +66,8 @@ static int __init p1010_rdb_probe(void)
 
if (of_flat_dt_is_compatible(root, "fsl,P1010RDB"))
return 1;
+   if (of_flat_dt_is_compatible(root, "fsl,P1010RDB-PB"))
+   return 1;
return 0;
 }
 
-- 
1.8.0


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v4 2/2] powerpc/p1010rdb:update dts to adapt to both old and new p1010rdb

[Zhao Qiang]

P1010rdb-pa and p1010rdb-pb have different phy interrupts.
So update dts to adapt to both p1010rdb-pa and p1010rdb-pb.

Signed-off-by: Shengzhou Liu 
Signed-off-by: Zhao Qiang 
---
Changes for v2
- Take p1010rdb_36b.dts into account

Changes for v3
- Do sharing
- add "fsl,P1010RDB-PB"

Changes for v4
- remove "fsl,P1010RDB"

 arch/powerpc/boot/dts/p1010rdb-pa.dts  | 35 
 .../dts/{p1010rdb_36b.dts => p1010rdb-pa_36b.dts}  | 53 -
 arch/powerpc/boot/dts/p1010rdb-pb.dts  | 35 
 .../dts/{p1010rdb_36b.dts => p1010rdb-pb_36b.dts}  | 57 +--
 arch/powerpc/boot/dts/p1010rdb.dts | 66 --
 arch/powerpc/boot/dts/p1010rdb.dtsi|  3 -
 arch/powerpc/boot/dts/p1010rdb_32b.dtsi| 45 +++
 arch/powerpc/boot/dts/p1010rdb_36b.dtsi| 45 +++
 8 files changed, 184 insertions(+), 155 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pa.dts
 copy arch/powerpc/boot/dts/{p1010rdb_36b.dts => p1010rdb-pa_36b.dts} (64%)
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pb.dts
 rename arch/powerpc/boot/dts/{p1010rdb_36b.dts => p1010rdb-pb_36b.dts} (63%)
 delete mode 100644 arch/powerpc/boot/dts/p1010rdb.dts
 create mode 100644 arch/powerpc/boot/dts/p1010rdb_32b.dtsi
 create mode 100644 arch/powerpc/boot/dts/p1010rdb_36b.dtsi

diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dts 
b/arch/powerpc/boot/dts/p1010rdb-pa.dts
new file mode 100644
index 000..8a74700
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pa.dts
@@ -0,0 +1,35 @@
+/*
+ * P1010 RDB Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/include/ "fsl/p1010si-pre.dtsi"
+
+/ {
+   model = "fsl,P1010RDB";
+   compatible = "fsl,P1010RDB";
+
+   /include/ "p1010rdb_32b.dtsi"
+};
+
+/include/ "p1010rdb.dtsi"
+
+&phy0 {
+   interrupts = <3 1 0 0>;
+};
+
+&phy1 {
+   interrupts = <2 1 0 0>;
+};
+
+&phy2 {
+   interrupts = <2 1 0 0>;
+};
+
+/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb_36b.dts 
b/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts
similarity index 64%
copy from arch/powerpc/boot/dts/p1010rdb_36b.dts
copy to arch/powerpc/boot/dts/p1010rdb-pa_36b.dts
index 64776f4..2004ee7 100644
--- a/arch/powerpc/boot/dts/p1010rdb_36b.dts
+++ b/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts
@@ -38,52 +38,21 @@
model = "fsl,P1010RDB";
compatible = "fsl,P1010RDB";
 
-   memory {
-   device_type = "memory";
-   };
-
-   board_ifc: ifc: ifc@fffe1e000 {
-   /* NOR, NAND Flashes and CPLD on board */
-   ranges = <0x0 0x0 0xf 0xee00 0x0200
- 0x1 0x0 0xf 0xff80 0x0001
- 0x3 0x0 0xf 0xffb0 0x0020>;
-   reg = <0xf 0xffe1e000 0 0x2000>;
-   };
-
-   board_soc: soc: soc@fffe0 {
-   ranges = <0x0 0xf 0xffe0 0x10>;
-   };
+   /include/ "p1010rdb_36b.dtsi"
+};
 
-   pci0: pcie@fffe09000 {
-   reg = <0xf 0xffe09000 0 0x1000>;
-   ranges = <0x200 0x0 0xc000 0xc 0x2000 0x0 0x2000
- 0x100 0x0 0x 0xf 0xffc1 0x0 0x1>;
-   pcie@0 {
-   ranges = <0x200 0x0 0xc000
- 0x200 0x0 0xc000
- 0x0 0x2000
+/include/ "p1010rdb.dtsi"
 
- 0x100 0x0 0x0
- 0x100 0x0 0x0
- 0x0 0x10>;
-   };
-   };
+&phy0 {
+   interrupts = <3 1 0 0>;
+};
 
-   pci1: pcie@fffe0a000 {
-   reg = <0xf 0xffe0a000 0 0x1000>;
-   ranges = <0x200 0x0 0xc000 0xc 0x2000 0x0 0x2000
- 0x100 0x0 0x 0xf 0xffc1 0x0 0x1>;
-   pcie@0 {
-   ranges = <0x200 0x0 0xc000
- 0x200 0x0 0xc000
- 0x0 0x2000
+&phy1 {
+   interrupts = <2 1 0 0>;
+};
 
- 0x100 0x0 0x0
- 0x100 0x0 0x0
- 0x0 0x10>;
-   };
-   };
+&phy2 {
+   interrupts

[PATCH] powerpc/p1010rdb:update mtd of nand to adapt to both old and new p1010rdb

[Zhao Qiang]

P1010rdb-pa and p1010rdb-pb have different mtd of nand.
So update dts to adapt to both p1010rdb-pa and p1010rdb-pb.

Signed-off-by: Zhao Qiang 
---
 arch/powerpc/boot/dts/p1010rdb-pa.dts | 40 +++
 arch/powerpc/boot/dts/p1010rdb-pa_36b.dts | 40 +++
 arch/powerpc/boot/dts/p1010rdb-pb.dts | 34 ++
 arch/powerpc/boot/dts/p1010rdb-pb_36b.dts | 34 ++
 arch/powerpc/boot/dts/p1010rdb.dtsi   | 40 +--
 5 files changed, 149 insertions(+), 39 deletions(-)

diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dts 
b/arch/powerpc/boot/dts/p1010rdb-pa.dts
index f210ba5..76f252b 100644
--- a/arch/powerpc/boot/dts/p1010rdb-pa.dts
+++ b/arch/powerpc/boot/dts/p1010rdb-pa.dts
@@ -20,6 +20,46 @@
 
 /include/ "p1010rdb.dtsi"
 
+&ifc_nand {
+   partition@0 {
+   /* This location must not be altered  */
+   /* 1MB for u-boot Bootloader Image */
+   reg = <0x0 0x0010>;
+   label = "NAND U-Boot Image";
+   read-only;
+   };
+
+   partition@10 {
+   /* 1MB for DTB Image */
+   reg = <0x0010 0x0010>;
+   label = "NAND DTB Image";
+   };
+
+   partition@20 {
+   /* 4MB for Linux Kernel Image */
+   reg = <0x0020 0x0040>;
+   label = "NAND Linux Kernel Image";
+   };
+
+   partition@60 {
+   /* 4MB for Compressed Root file System Image */
+   reg = <0x0060 0x0040>;
+   label = "NAND Compressed RFS Image";
+   };
+
+   partition@a0 {
+   /* 15MB for JFFS2 based Root file System */
+   reg = <0x00a0 0x00f0>;
+   label = "NAND JFFS2 Root File System";
+   };
+
+   partition@190 {
+   /* 7MB for User Area */
+   reg = <0x0190 0x0070>;
+   label = "NAND User area";
+   };
+};
+
 &phy0 {
interrupts = <3 1 0 0>;
 };
diff --git a/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts 
b/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts
index 9740b0c..2961766 100644
--- a/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts
+++ b/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts
@@ -43,6 +43,46 @@
 
 /include/ "p1010rdb.dtsi"
 
+&ifc_nand {
+   partition@0 {
+   /* This location must not be altered  */
+   /* 1MB for u-boot Bootloader Image */
+   reg = <0x0 0x0010>;
+   label = "NAND U-Boot Image";
+   read-only;
+   };
+
+   partition@10 {
+   /* 1MB for DTB Image */
+   reg = <0x0010 0x0010>;
+   label = "NAND DTB Image";
+   };
+
+   partition@20 {
+   /* 4MB for Linux Kernel Image */
+   reg = <0x0020 0x0040>;
+   label = "NAND Linux Kernel Image";
+   };
+
+   partition@60 {
+   /* 4MB for Compressed Root file System Image */
+   reg = <0x0060 0x0040>;
+   label = "NAND Compressed RFS Image";
+   };
+
+   partition@a0 {
+   /* 15MB for JFFS2 based Root file System */
+   reg = <0x00a0 0x00f0>;
+   label = "NAND JFFS2 Root File System";
+   };
+
+   partition@190 {
+   /* 7MB for User Area */
+   reg = <0x0190 0x0070>;
+   label = "NAND User area";
+   };
+};
+
 &phy0 {
interrupts = <3 1 0 0>;
 };
diff --git a/arch/powerpc/boot/dts/p1010rdb-pb.dts 
b/arch/powerpc/boot/dts/p1010rdb-pb.dts
index 6eeb7d3..6187e9c 100644
--- a/arch/powerpc/boot/dts/p1010rdb-pb.dts
+++ b/arch/powerpc/boot/dts/p1010rdb-pb.dts
@@ -20,6 +20,40 @@
 
 /include/ "p1010rdb.dtsi"
 
+&ifc_nand {
+   partition@0 {
+   /* This location must not be altered  */
+   /* 2MB for u-boot Image and environment */
+   reg = <0x0 0x0020>;
+   label = "NAND U-Boot Image and env";
+   read-only;
+   };
+
+   partition@20 {
+   /* 1MB for DTB Image */
+   reg = <0x0020 0x0010>;
+   label = "NAND DTB Image";
+   };
+
+   partition@30 {
+   /* 5MB for Linux Kernel Image */
+   reg = <0x0030 0x0050>;
+   label = "NAND Linux Kernel Image";
+   };
+
+   partition@80 {
+   /* 56MB for Compressed Root file System Image */
+   reg = <0x0080 0x0380>;
+ 

[PATCH 1/3] powerpc/p1010rdb:add P1010RDB-PB platform support

[Zhao Qiang]

The P1010RDB-PB is similar to P1010RDB(P1010RDB-PA).
So, P1010RDB-PB use the same platform file as P1010RDB.
Then Add support for P1010RDB-PB platform.

Signed-off-by: Zhao Qiang 
---
 arch/powerpc/platforms/85xx/p1010rdb.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c 
b/arch/powerpc/platforms/85xx/p1010rdb.c
index 0252961..d6a3dd3 100644
--- a/arch/powerpc/platforms/85xx/p1010rdb.c
+++ b/arch/powerpc/platforms/85xx/p1010rdb.c
@@ -66,6 +66,8 @@ static int __init p1010_rdb_probe(void)
 
if (of_flat_dt_is_compatible(root, "fsl,P1010RDB"))
return 1;
+   if (of_flat_dt_is_compatible(root, "fsl,P1010RDB-PB"))
+   return 1;
return 0;
 }
 
-- 
1.8.4


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH 3/3] powerpc/p1010rdb:update mtd of nand to adapt to both old and new p1010rdb

[Zhao Qiang]

P1010rdb-pa and p1010rdb-pb have different mtd of nand.
So update dts to adapt to both p1010rdb-pa and p1010rdb-pb.

Move the nand-mtd from p1010rdb.dtsi to p1010rdb-pa*.dts.
Remove nand-mtd for p1010rdb-pb, whick will use mtdparts
from u-boot instead of nand-mtd in device tree.

Signed-off-by: Zhao Qiang 
---
 arch/powerpc/boot/dts/p1010rdb-pa.dts | 14 +
 arch/powerpc/boot/dts/p1010rdb-pa.dtsi| 85 +++
 arch/powerpc/boot/dts/p1010rdb-pa_36b.dts | 14 +
 arch/powerpc/boot/dts/p1010rdb.dtsi   | 40 +--
 4 files changed, 88 insertions(+), 65 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pa.dtsi

diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dts 
b/arch/powerpc/boot/dts/p1010rdb-pa.dts
index 8a74700..767d4c0 100644
--- a/arch/powerpc/boot/dts/p1010rdb-pa.dts
+++ b/arch/powerpc/boot/dts/p1010rdb-pa.dts
@@ -19,17 +19,5 @@
 };
 
 /include/ "p1010rdb.dtsi"
-
-&phy0 {
-   interrupts = <3 1 0 0>;
-};
-
-&phy1 {
-   interrupts = <2 1 0 0>;
-};
-
-&phy2 {
-   interrupts = <2 1 0 0>;
-};
-
+/include/ "p1010rdb-pa.dtsi"
 /include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dtsi 
b/arch/powerpc/boot/dts/p1010rdb-pa.dtsi
new file mode 100644
index 000..4c5a7bf
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pa.dtsi
@@ -0,0 +1,85 @@
+/*
+ * P1010 RDB Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ *   names of its contributors may be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 
THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&ifc_nand {
+   partition@0 {
+   /* This location must not be altered  */
+   /* 1MB for u-boot Bootloader Image */
+   reg = <0x0 0x0010>;
+   label = "NAND U-Boot Image";
+   read-only;
+   };
+
+   partition@10 {
+   /* 1MB for DTB Image */
+   reg = <0x0010 0x0010>;
+   label = "NAND DTB Image";
+   };
+
+   partition@20 {
+   /* 4MB for Linux Kernel Image */
+   reg = <0x0020 0x0040>;
+   label = "NAND Linux Kernel Image";
+   };
+
+   partition@60 {
+   /* 4MB for Compressed Root file System Image */
+   reg = <0x0060 0x0040>;
+   label = "NAND Compressed RFS Image";
+   };
+
+   partition@a0 {
+   /* 15MB for JFFS2 based Root file System */
+   reg = <0x00a0 0x00f0>;
+   label = "NAND JFFS2 Root File System";
+   };
+
+   partition@190 {
+   /* 7MB for User Area */
+   reg = <0x0190 0x0070>;
+   label = "NAND User area";
+   };
+};
+
+&phy0 {
+   interrupts = <3 1 0 0>;
+};
+
+&phy1 {
+   interrupts = <2 1 0 0>;
+};
+
+&phy2 {
+   interrupts = <2 1 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts 
b/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts
index 2004ee7..3033371 100644
--- a/arch/powerpc/boot/d

[PATCH 2/3] powerpc/p1010rdb:update dts to adapt to both old and new p1010rdb

[Zhao Qiang]

P1010rdb-pa and p1010rdb-pb have different phy interrupts.
So update dts to adapt to both p1010rdb-pa and p1010rdb-pb.

Signed-off-by: Shengzhou Liu 
Signed-off-by: Zhao Qiang 
---
 arch/powerpc/boot/dts/p1010rdb-pa.dts | 35 
 arch/powerpc/boot/dts/p1010rdb-pa_36b.dts | 58 
 arch/powerpc/boot/dts/p1010rdb-pb.dts | 35 
 arch/powerpc/boot/dts/p1010rdb-pb_36b.dts | 58 
 arch/powerpc/boot/dts/p1010rdb.dts| 66 ---
 arch/powerpc/boot/dts/p1010rdb.dtsi   |  3 --
 arch/powerpc/boot/dts/p1010rdb_32b.dtsi   | 79 +++
 arch/powerpc/boot/dts/p1010rdb_36b.dts| 89 ---
 arch/powerpc/boot/dts/p1010rdb_36b.dtsi   | 79 +++
 9 files changed, 344 insertions(+), 158 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pa.dts
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pa_36b.dts
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pb.dts
 create mode 100644 arch/powerpc/boot/dts/p1010rdb-pb_36b.dts
 delete mode 100644 arch/powerpc/boot/dts/p1010rdb.dts
 create mode 100644 arch/powerpc/boot/dts/p1010rdb_32b.dtsi
 delete mode 100644 arch/powerpc/boot/dts/p1010rdb_36b.dts
 create mode 100644 arch/powerpc/boot/dts/p1010rdb_36b.dtsi

diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dts 
b/arch/powerpc/boot/dts/p1010rdb-pa.dts
new file mode 100644
index 000..8a74700
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pa.dts
@@ -0,0 +1,35 @@
+/*
+ * P1010 RDB Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/include/ "fsl/p1010si-pre.dtsi"
+
+/ {
+   model = "fsl,P1010RDB";
+   compatible = "fsl,P1010RDB";
+
+   /include/ "p1010rdb_32b.dtsi"
+};
+
+/include/ "p1010rdb.dtsi"
+
+&phy0 {
+   interrupts = <3 1 0 0>;
+};
+
+&phy1 {
+   interrupts = <2 1 0 0>;
+};
+
+&phy2 {
+   interrupts = <2 1 0 0>;
+};
+
+/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts 
b/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts
new file mode 100644
index 000..2004ee7
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts
@@ -0,0 +1,58 @@
+/*
+ * P1010 RDB Device Tree Source (36-bit address map)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ *   names of its contributors may be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 
THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1010si-pre.dtsi"
+
+/ {
+   model = "fsl,P1010RDB";
+   compatible = "fsl,P1010RDB";
+
+   /include/ "p1010rdb_36b.dtsi"
+};
+
+/include/ "p1010rdb.dtsi"
+
+&phy0 {
+   interrupts = <3 1 0 0>;
+};
+
+&phy1 {
+   interrupts = <2 1 0 0>;
+};
+
+&phy2 {
+   interrupts = <2 1 0 0>;
+};
+
+/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb-pb.

[PATCH 1/2] flexcan: add err_irq handler for flexcan

[Zhao Qiang]

when flexcan is not physically linked, command 'cantest' will
trigger an err_irq, add err_irq handler for it.

Signed-off-by: Zhao Qiang 
---
 drivers/net/can/flexcan.c | 31 ++-
 1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index aaed97b..e3c6cfd 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -206,6 +206,7 @@ struct flexcan_priv {
void __iomem *base;
u32 reg_esr;
u32 reg_ctrl_default;
+   unsigned interr_irq;
 
struct clk *clk_ipg;
struct clk *clk_per;
@@ -654,6 +655,23 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
return IRQ_HANDLED;
 }
 
+static irqreturn_t flexcan_err_irq(int irq, void *dev_id)
+{
+   struct net_device *dev = dev_id;
+   struct flexcan_priv *priv = netdev_priv(dev);
+   struct flexcan_regs __iomem *regs = priv->base;
+   u32 reg_ctrl, reg_esr;
+
+   reg_esr = flexcan_read(®s->esr);
+   reg_ctrl = flexcan_read(®s->ctrl);
+   if (reg_esr & FLEXCAN_ESR_TX_WRN) {
+   flexcan_write(reg_esr & ~FLEXCAN_ESR_TX_WRN, ®s->esr);
+   flexcan_write(reg_ctrl & ~FLEXCAN_CTRL_ERR_MSK, ®s->ctrl);
+   netdev_err(dev, "No physical link!\n");
+   }
+   return IRQ_HANDLED;
+}
+
 static void flexcan_set_bittiming(struct net_device *dev)
 {
const struct flexcan_priv *priv = netdev_priv(dev);
@@ -860,6 +878,12 @@ static int flexcan_open(struct net_device *dev)
if (err)
goto out_close;
 
+   if (priv->err_irq)
+   err = request_irq(priv->err_irq, flexcan_err_irq, IRQF_SHARED,
+ dev->name, dev);
+   if (err)
+   goto out_close;
+
/* start chip and queuing */
err = flexcan_chip_start(dev);
if (err)
@@ -1007,7 +1031,7 @@ static int flexcan_probe(struct platform_device *pdev)
struct resource *mem;
struct clk *clk_ipg = NULL, *clk_per = NULL;
void __iomem *base;
-   int err, irq;
+   int err, irq, err_irq;
u32 clock_freq = 0;
 
if (pdev->dev.of_node)
@@ -1034,6 +1058,10 @@ static int flexcan_probe(struct platform_device *pdev)
if (irq <= 0)
return -ENODEV;
 
+   err_irq = platform_get_irq(pdev, 1);
+   if (err_irq <= 0)
+   err_irq = 0;
+
base = devm_ioremap_resource(&pdev->dev, mem);
if (IS_ERR(base))
return PTR_ERR(base);
@@ -1057,6 +1085,7 @@ static int flexcan_probe(struct platform_device *pdev)
dev->flags |= IFF_ECHO;
 
priv = netdev_priv(dev);
+   priv->err_irq = err_irq;
priv->can.clock.freq = clock_freq;
priv->can.bittiming_const = &flexcan_bittiming_const;
priv->can.do_set_mode = flexcan_set_mode;
-- 
1.8.5

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH 2/2] flexcan: add err interrupt for p1010rdb

[Zhao Qiang]

add err interrupt for p1010rdb into dts.

Signed-off-by: Zhao Qiang 
---
 arch/powerpc/boot/dts/fsl/p1010si-post.dtsi | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi 
b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
index 4313ff6..bcd95ba 100644
--- a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
@@ -141,13 +141,15 @@
can0: can@1c000 {
compatible = "fsl,p1010-flexcan";
reg = <0x1c000 0x1000>;
-   interrupts = <48 0x2 0 0>;
+   interrupts = <48 0x2 0 0
+ 16 0x2 0 0>;
};
 
can1: can@1d000 {
compatible = "fsl,p1010-flexcan";
reg = <0x1d000 0x1000>;
-   interrupts = <61 0x2 0 0>;
+   interrupts = <61 0x2 0 0
+ 16 0x2 0 0>;
};
 
L2: l2-cache-controller@2 {
-- 
1.8.5

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v2 1/2] flexcan: add err_irq handler for flexcan

[Zhao Qiang]

when flexcan is not physically linked, command 'cantest' will
trigger an err_irq, add err_irq handler for it.

Signed-off-by: Zhao Qiang 
---
Changes for v2:
- use a space instead of tab
- use flexcan_poll_state instead of print

 drivers/net/can/flexcan.c | 31 ++-
 1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index f425ec2..7432ba4 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -208,6 +208,7 @@ struct flexcan_priv {
void __iomem *base;
u32 reg_esr;
u32 reg_ctrl_default;
+   unsigned int err_irq;
 
struct clk *clk_ipg;
struct clk *clk_per;
@@ -744,6 +745,23 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
return IRQ_HANDLED;
 }
 
+static irqreturn_t flexcan_err_irq(int irq, void *dev_id)
+{
+   struct net_device *dev = dev_id;
+   struct flexcan_priv *priv = netdev_priv(dev);
+   struct flexcan_regs __iomem *regs = priv->base;
+   u32 reg_ctrl, reg_esr;
+
+   reg_esr = flexcan_read(®s->esr);
+   reg_ctrl = flexcan_read(®s->ctrl);
+   if (reg_esr & FLEXCAN_ESR_TX_WRN) {
+   flexcan_write(reg_esr & ~FLEXCAN_ESR_TX_WRN, ®s->esr);
+   flexcan_write(reg_ctrl & ~FLEXCAN_CTRL_ERR_MSK, ®s->ctrl);
+   flexcan_poll_state(dev, reg_esr);
+   }
+   return IRQ_HANDLED;
+}
+
 static void flexcan_set_bittiming(struct net_device *dev)
 {
const struct flexcan_priv *priv = netdev_priv(dev);
@@ -944,6 +962,12 @@ static int flexcan_open(struct net_device *dev)
if (err)
goto out_close;
 
+   if (priv->err_irq)
+   err = request_irq(priv->err_irq, flexcan_err_irq, IRQF_SHARED,
+ dev->name, dev);
+   if (err)
+   goto out_close;
+
/* start chip and queuing */
err = flexcan_chip_start(dev);
if (err)
@@ -1099,7 +1123,7 @@ static int flexcan_probe(struct platform_device *pdev)
struct resource *mem;
struct clk *clk_ipg = NULL, *clk_per = NULL;
void __iomem *base;
-   int err, irq;
+   int err, irq, err_irq;
u32 clock_freq = 0;
 
if (pdev->dev.of_node)
@@ -1126,6 +1150,10 @@ static int flexcan_probe(struct platform_device *pdev)
if (irq <= 0)
return -ENODEV;
 
+   err_irq = platform_get_irq(pdev, 1);
+   if (err_irq <= 0)
+   err_irq = 0;
+
base = devm_ioremap_resource(&pdev->dev, mem);
if (IS_ERR(base))
return PTR_ERR(base);
@@ -1149,6 +1177,7 @@ static int flexcan_probe(struct platform_device *pdev)
dev->flags |= IFF_ECHO;
 
priv = netdev_priv(dev);
+   priv->err_irq = err_irq;
priv->can.clock.freq = clock_freq;
priv->can.bittiming_const = &flexcan_bittiming_const;
priv->can.do_set_mode = flexcan_set_mode;
-- 
1.8.5

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v2 2/2] flexcan: add err interrupt for p1010rdb

[Zhao Qiang]

add err interrupt for p1010rdb into dts.

Signed-off-by: Zhao Qiang 
---
Changes for v2:
- add binding documentation update

 Documentation/devicetree/bindings/net/can/fsl-flexcan.txt | 7 +--
 arch/powerpc/boot/dts/fsl/p1010si-post.dtsi   | 6 --
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt 
b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
index 56d6cc3..81929e5 100644
--- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
+++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
@@ -10,7 +10,9 @@ Required properties:
   - fsl,p1010-flexcan
 
 - reg : Offset and length of the register set for this device
-- interrupts : Interrupt tuple for this device
+- interrupts : Interrupt tuple for this device.
+   The first interrupt is for FlexCAN(Message Buffer and Wake Up)
+   The second is for error(Shared with IFC, PEX1 and some other device)
 
 Optional properties:
 
@@ -23,7 +25,8 @@ Example:
can@1c000 {
compatible = "fsl,p1010-flexcan";
reg = <0x1c000 0x1000>;
-   interrupts = <48 0x2>;
+   interrupts = <48 0x2 0 0
+ 16 0x2 0 0>;
interrupt-parent = <&mpic>;
clock-frequency = <2>; // filled in by bootloader
};
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi 
b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
index af12ead..47125a6 100644
--- a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
@@ -136,13 +136,15 @@
can0: can@1c000 {
compatible = "fsl,p1010-flexcan";
reg = <0x1c000 0x1000>;
-   interrupts = <48 0x2 0 0>;
+   interrupts = <48 0x2 0 0
+ 16 0x2 0 0>;
};
 
can1: can@1d000 {
compatible = "fsl,p1010-flexcan";
reg = <0x1d000 0x1000>;
-   interrupts = <61 0x2 0 0>;
+   interrupts = <61 0x2 0 0
+ 16 0x2 0 0>;
};
 
L2: l2-cache-controller@2 {
-- 
1.8.5

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v3 1/2] flexcan: add err_irq handler for flexcan

[Zhao Qiang]

when flexcan is not physically linked, command 'cantest' will
trigger an err_irq, add err_irq handler for it.

Signed-off-by: Zhao Qiang 
---
Changes for v2:
- use a space instead of tab
- use flexcan_poll_state instead of print
Changes for v3:
- return IRQ_HANDLED if err is triggered
- stop transmitted packets when there is an err_interrupt 

 drivers/net/can/flexcan.c | 35 ++-
 1 file changed, 34 insertions(+), 1 deletion(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index f425ec2..6802a25 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -208,6 +208,7 @@ struct flexcan_priv {
void __iomem *base;
u32 reg_esr;
u32 reg_ctrl_default;
+   unsigned int err_irq;
 
struct clk *clk_ipg;
struct clk *clk_per;
@@ -744,6 +745,24 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
return IRQ_HANDLED;
 }
 
+static irqreturn_t flexcan_err_irq(int irq, void *dev_id)
+{
+   struct net_device *dev = dev_id;
+   struct flexcan_priv *priv = netdev_priv(dev);
+   struct flexcan_regs __iomem *regs = priv->base;
+   u32 reg_ctrl, reg_esr;
+
+   reg_esr = flexcan_read(®s->esr);
+   reg_ctrl = flexcan_read(®s->ctrl);
+   if (reg_esr & FLEXCAN_ESR_TX_WRN) {
+   flexcan_write(reg_esr & ~FLEXCAN_ESR_TX_WRN, ®s->esr);
+   flexcan_write(reg_ctrl & ~FLEXCAN_CTRL_ERR_MSK, ®s->ctrl);
+   netif_stop_queue(dev);
+   return IRQ_HANDLED;
+   }
+   return IRQ_NONE;
+}
+
 static void flexcan_set_bittiming(struct net_device *dev)
 {
const struct flexcan_priv *priv = netdev_priv(dev);
@@ -944,6 +963,15 @@ static int flexcan_open(struct net_device *dev)
if (err)
goto out_close;
 
+   if (priv->err_irq) {
+   err = request_irq(priv->err_irq, flexcan_err_irq, IRQF_SHARED,
+ dev->name, dev);
+   if (err) {
+   free_irq(priv->err_irq, dev);
+   goto out_free_irq;
+   }
+   }
+
/* start chip and queuing */
err = flexcan_chip_start(dev);
if (err)
@@ -1099,7 +1127,7 @@ static int flexcan_probe(struct platform_device *pdev)
struct resource *mem;
struct clk *clk_ipg = NULL, *clk_per = NULL;
void __iomem *base;
-   int err, irq;
+   int err, irq, err_irq;
u32 clock_freq = 0;
 
if (pdev->dev.of_node)
@@ -1126,6 +1154,10 @@ static int flexcan_probe(struct platform_device *pdev)
if (irq <= 0)
return -ENODEV;
 
+   err_irq = platform_get_irq(pdev, 1);
+   if (err_irq <= 0)
+   err_irq = 0;
+
base = devm_ioremap_resource(&pdev->dev, mem);
if (IS_ERR(base))
return PTR_ERR(base);
@@ -1149,6 +1181,7 @@ static int flexcan_probe(struct platform_device *pdev)
dev->flags |= IFF_ECHO;
 
priv = netdev_priv(dev);
+   priv->err_irq = err_irq;
priv->can.clock.freq = clock_freq;
priv->can.bittiming_const = &flexcan_bittiming_const;
priv->can.do_set_mode = flexcan_set_mode;
-- 
1.8.5

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v3 2/2] flexcan: add err interrupt for p1010rdb

[Zhao Qiang]

add err interrupt for p1010rdb into dts.

Signed-off-by: Zhao Qiang 
---
Changes for v2:
- add binding documentation update
Changes for v3:
- update binding documentation

 Documentation/devicetree/bindings/net/can/fsl-flexcan.txt | 15 +--
 arch/powerpc/boot/dts/fsl/p1010si-post.dtsi   |  6 --
 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt 
b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
index 56d6cc3..7bf377c 100644
--- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
+++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
@@ -10,7 +10,9 @@ Required properties:
   - fsl,p1010-flexcan
 
 - reg : Offset and length of the register set for this device
-- interrupts : Interrupt tuple for this device
+- interrupts : Interrupt tuple for this device.
+   The first interrupt is for FlexCAN(Message Buffer and Wake Up)
+   The second(optional) is for error
 
 Optional properties:
 
@@ -23,7 +25,16 @@ Example:
can@1c000 {
compatible = "fsl,p1010-flexcan";
reg = <0x1c000 0x1000>;
-   interrupts = <48 0x2>;
+   interrupts = <48 0x2 0 0>;
+   interrupt-parent = <&mpic>;
+   clock-frequency = <2>; // filled in by bootloader
+   };
+
+   can@1c000 {
+   compatible = "fsl,p1010-flexcan";
+   reg = <0x1c000 0x1000>;
+   interrupts = <48 0x2 0 0
+ 16 0x2 0 0>;
interrupt-parent = <&mpic>;
clock-frequency = <2>; // filled in by bootloader
};
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi 
b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
index af12ead..47125a6 100644
--- a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
@@ -136,13 +136,15 @@
can0: can@1c000 {
compatible = "fsl,p1010-flexcan";
reg = <0x1c000 0x1000>;
-   interrupts = <48 0x2 0 0>;
+   interrupts = <48 0x2 0 0
+ 16 0x2 0 0>;
};
 
can1: can@1d000 {
compatible = "fsl,p1010-flexcan";
reg = <0x1d000 0x1000>;
-   interrupts = <61 0x2 0 0>;
+   interrupts = <61 0x2 0 0
+ 16 0x2 0 0>;
};
 
L2: l2-cache-controller@2 {
-- 
1.8.5

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH] qe: move qe from arch/powerpc to drivers

[Zhao Qiang]

ls1 has qe and ls1 has arm cpu.
move qe from arch/powerpc to drivers.

Signed-off-by: Zhao Qiang 
---
 arch/powerpc/platforms/83xx/km83xx.c   |  4 +--
 arch/powerpc/platforms/83xx/misc.c |  2 +-
 arch/powerpc/platforms/83xx/mpc832x_mds.c  |  4 +--
 arch/powerpc/platforms/83xx/mpc832x_rdb.c  |  4 +--
 arch/powerpc/platforms/83xx/mpc836x_mds.c  |  4 +--
 arch/powerpc/platforms/83xx/mpc836x_rdk.c  |  4 +--
 arch/powerpc/platforms/85xx/common.c   |  2 +-
 arch/powerpc/platforms/85xx/corenet_generic.c  |  2 +-
 arch/powerpc/platforms/85xx/mpc85xx_mds.c  |  4 +--
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c  |  4 +--
 arch/powerpc/platforms/85xx/twr_p102x.c|  4 +--
 arch/powerpc/platforms/Kconfig | 11 ---
 arch/powerpc/sysdev/qe_lib/Kconfig | 18 ---
 arch/powerpc/sysdev/qe_lib/Makefile|  5 
 arch/powerpc/sysdev/qe_lib/gpio.c  |  2 +-
 arch/powerpc/sysdev/qe_lib/usb.c   |  4 +--
 drivers/Kconfig|  1 +
 drivers/Makefile   |  1 +
 drivers/net/ethernet/freescale/fsl_pq_mdio.c   |  2 +-
 drivers/net/ethernet/freescale/ucc_geth.c  |  8 ++---
 drivers/net/ethernet/freescale/ucc_geth.h  |  8 ++---
 drivers/qe/Kconfig | 35 ++
 .../powerpc/sysdev/qe_lib => drivers/qe}/Makefile  |  2 --
 {arch/powerpc/sysdev/qe_lib => drivers/qe}/qe.c|  4 +--
 {arch/powerpc/sysdev/qe_lib => drivers/qe}/qe_ic.c |  2 +-
 {arch/powerpc/sysdev/qe_lib => drivers/qe}/qe_ic.h |  2 +-
 {arch/powerpc/sysdev/qe_lib => drivers/qe}/qe_io.c |  2 +-
 {arch/powerpc/sysdev/qe_lib => drivers/qe}/ucc.c   |  6 ++--
 .../sysdev/qe_lib => drivers/qe}/ucc_fast.c|  8 ++---
 .../sysdev/qe_lib => drivers/qe}/ucc_slow.c|  8 ++---
 drivers/s390/net/qeth_core_mpc.h   |  2 +-
 drivers/spi/spi-fsl-cpm.c  |  2 +-
 drivers/tty/serial/ucc_uart.c  |  2 +-
 drivers/usb/gadget/fsl_qe_udc.c|  2 +-
 drivers/usb/host/fhci-hcd.c|  2 +-
 drivers/usb/host/fhci-hub.c|  2 +-
 drivers/usb/host/fhci-sched.c  |  2 +-
 drivers/usb/host/fhci.h|  4 +--
 .../include/asm => include/linux}/immap_qe.h   |  0
 {arch/powerpc/include/asm => include/linux}/qe.h   |  2 +-
 .../powerpc/include/asm => include/linux}/qe_ic.h  |  0
 {arch/powerpc/include/asm => include/linux}/ucc.h  |  4 +--
 .../include/asm => include/linux}/ucc_fast.h   |  6 ++--
 .../include/asm => include/linux}/ucc_slow.h   |  6 ++--
 44 files changed, 102 insertions(+), 101 deletions(-)
 create mode 100644 drivers/qe/Kconfig
 copy {arch/powerpc/sysdev/qe_lib => drivers/qe}/Makefile (76%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/qe}/qe.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/qe}/qe_ic.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/qe}/qe_ic.h (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/qe}/qe_io.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/qe}/ucc.c (98%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/qe}/ucc_fast.c (99%)
 rename {arch/powerpc/sysdev/qe_lib => drivers/qe}/ucc_slow.c (98%)
 rename {arch/powerpc/include/asm => include/linux}/immap_qe.h (100%)
 rename {arch/powerpc/include/asm => include/linux}/qe.h (99%)
 rename {arch/powerpc/include/asm => include/linux}/qe_ic.h (100%)
 rename {arch/powerpc/include/asm => include/linux}/ucc.h (97%)
 rename {arch/powerpc/include/asm => include/linux}/ucc_fast.h (99%)
 rename {arch/powerpc/include/asm => include/linux}/ucc_slow.h (99%)

diff --git a/arch/powerpc/platforms/83xx/km83xx.c 
b/arch/powerpc/platforms/83xx/km83xx.c
index bf4c447..22c0d6d 100644
--- a/arch/powerpc/platforms/83xx/km83xx.c
+++ b/arch/powerpc/platforms/83xx/km83xx.c
@@ -37,8 +37,8 @@
 #include 
 #include 
 #include 
-#include 
-#include 
+#include 
+#include 
 
 #include "mpc83xx.h"
 
diff --git a/arch/powerpc/platforms/83xx/misc.c 
b/arch/powerpc/platforms/83xx/misc.c
index 125336f..cbc82d8 100644
--- a/arch/powerpc/platforms/83xx/misc.c
+++ b/arch/powerpc/platforms/83xx/misc.c
@@ -17,7 +17,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 
diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c 
b/arch/powerpc/platforms/83xx/mpc832x_mds.c
index 8d76220..27dbf52 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c
@@ -36,8 +36,8 @@
 #include 
 #include 
 #include 
-#include 
-#include 
+#include 
+#include 
 
 #include "mpc83xx.h"
 
diff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c 
b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
index e

[PATCH] spi: include "int ret" with macro

[Zhao Qiang]

ret is unused when CONFIG_FSL_SOC defined,
so include it with "#ifndef CONFIG_FSL_SOC".

Signed-off-by: Zhao Qiang 
---
 drivers/spi/spi-fsl-lib.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-fsl-lib.c b/drivers/spi/spi-fsl-lib.c
index e5d45fc..44aace1 100644
--- a/drivers/spi/spi-fsl-lib.c
+++ b/drivers/spi/spi-fsl-lib.c
@@ -198,8 +198,9 @@ int of_mpc8xxx_spi_probe(struct platform_device *ofdev)
struct mpc8xxx_spi_probe_info *pinfo;
struct fsl_spi_platform_data *pdata;
const void *prop;
+#ifndef CONFIG_FSL_SOC
int ret = -ENOMEM;
-
+#endif
pinfo = devm_kzalloc(&ofdev->dev, sizeof(*pinfo), GFP_KERNEL);
if (!pinfo)
return -ENOMEM;
-- 
1.8.5

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH] powerpc/ucc_geth: deal with an compile warning

[Zhao Qiang]

deal with a compile warning: comparison between
'enum qe_fltr_largest_external_tbl_lookup_key_size'
and 'enum qe_fltr_tbl_lookup_key_size'

the code:
"if (ug_info->largestexternallookupkeysize ==
 QE_FLTR_TABLE_LOOKUP_KEY_SIZE_8_BYTES)"
is warned because different enum, so modify it.

"enum qe_fltr_largest_external_tbl_lookup_key_size
 largestexternallookupkeysize;

enum qe_fltr_tbl_lookup_key_size {
 QE_FLTR_TABLE_LOOKUP_KEY_SIZE_8_BYTES
 = 0x3f, /* LookupKey parsed by the Generate 
LookupKey
CMD is truncated to 8 bytes */
 QE_FLTR_TABLE_LOOKUP_KEY_SIZE_16_BYTES
 = 0x5f, /* LookupKey parsed by the Generate 
LookupKey
CMD is truncated to 16 bytes */
 };

 /* QE FLTR extended filtering Largest External Table Lookup Key Size */
 enum qe_fltr_largest_external_tbl_lookup_key_size {
 QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_NONE
 = 0x0,/* not used */
 QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_8_BYTES
 = QE_FLTR_TABLE_LOOKUP_KEY_SIZE_8_BYTES,/* 8 
bytes */
 QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_16_BYTES
 = QE_FLTR_TABLE_LOOKUP_KEY_SIZE_16_BYTES,   /* 16 
bytes */
 };"

Signed-off-by: Zhao Qiang 
---
 drivers/net/ethernet/freescale/ucc_geth.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/freescale/ucc_geth.c 
b/drivers/net/ethernet/freescale/ucc_geth.c
index ee2f1ff..0b0de89 100644
--- a/drivers/net/ethernet/freescale/ucc_geth.c
+++ b/drivers/net/ethernet/freescale/ucc_geth.c
@@ -2993,11 +2993,11 @@ static int ucc_geth_startup(struct ucc_geth_private 
*ugeth)
if (ug_info->rxExtendedFiltering) {
size += THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING;
if (ug_info->largestexternallookupkeysize ==
-   QE_FLTR_TABLE_LOOKUP_KEY_SIZE_8_BYTES)
+   QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_8_BYTES)
size +=
THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_8;
if (ug_info->largestexternallookupkeysize ==
-   QE_FLTR_TABLE_LOOKUP_KEY_SIZE_16_BYTES)
+   QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_16_BYTES)
size +=
THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_16;
}
-- 
1.8.5

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH] spi: include "int ret" with macro

[Zhao Qiang]

ret is unused when CONFIG_FSL_SOC defined,
so include it with "#ifndef CONFIG_FSL_SOC".

Signed-off-by: Zhao Qiang 
---
 drivers/spi/spi-fsl-lib.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-fsl-lib.c b/drivers/spi/spi-fsl-lib.c
index e5d45fc..44aace1 100644
--- a/drivers/spi/spi-fsl-lib.c
+++ b/drivers/spi/spi-fsl-lib.c
@@ -198,8 +198,9 @@ int of_mpc8xxx_spi_probe(struct platform_device *ofdev)
struct mpc8xxx_spi_probe_info *pinfo;
struct fsl_spi_platform_data *pdata;
const void *prop;
+#ifndef CONFIG_FSL_SOC
int ret = -ENOMEM;
-
+#endif
pinfo = devm_kzalloc(&ofdev->dev, sizeof(*pinfo), GFP_KERNEL);
if (!pinfo)
return -ENOMEM;
-- 
1.8.5

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v2] spi: deal with a compile warning

[Zhao Qiang]

ret is unused when CONFIG_FSL_SOC defined,
so return ret instead of -ENOMEM when the
kzalloc fails to avoid it.

Signed-off-by: Zhao Qiang 
---
Changes for v2:
-return ret instead of -ENOMEM when the kzalloc fails 

 drivers/spi/spi-fsl-lib.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/spi-fsl-lib.c b/drivers/spi/spi-fsl-lib.c
index e5d45fc..d40378f 100644
--- a/drivers/spi/spi-fsl-lib.c
+++ b/drivers/spi/spi-fsl-lib.c
@@ -202,7 +202,7 @@ int of_mpc8xxx_spi_probe(struct platform_device *ofdev)
 
pinfo = devm_kzalloc(&ofdev->dev, sizeof(*pinfo), GFP_KERNEL);
if (!pinfo)
-   return -ENOMEM;
+   return ret;
 
pdata = &pinfo->pdata;
dev->platform_data = pdata;
-- 
1.8.5

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH] powerpc/ucc_geth: deal with a compile warning

[Zhao Qiang]

deal with a compile warning: comparison between
'enum qe_fltr_largest_external_tbl_lookup_key_size'
and 'enum qe_fltr_tbl_lookup_key_size'

the code:
"if (ug_info->largestexternallookupkeysize ==
 QE_FLTR_TABLE_LOOKUP_KEY_SIZE_8_BYTES)"
is warned because different enum, so modify it.

"enum qe_fltr_largest_external_tbl_lookup_key_size
 largestexternallookupkeysize;

enum qe_fltr_tbl_lookup_key_size {
 QE_FLTR_TABLE_LOOKUP_KEY_SIZE_8_BYTES
 = 0x3f, /* LookupKey parsed by the Generate 
LookupKey
CMD is truncated to 8 bytes */
 QE_FLTR_TABLE_LOOKUP_KEY_SIZE_16_BYTES
 = 0x5f, /* LookupKey parsed by the Generate 
LookupKey
CMD is truncated to 16 bytes */
 };

 /* QE FLTR extended filtering Largest External Table Lookup Key Size */
 enum qe_fltr_largest_external_tbl_lookup_key_size {
 QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_NONE
 = 0x0,/* not used */
 QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_8_BYTES
 = QE_FLTR_TABLE_LOOKUP_KEY_SIZE_8_BYTES,/* 8 
bytes */
 QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_16_BYTES
 = QE_FLTR_TABLE_LOOKUP_KEY_SIZE_16_BYTES,   /* 16 
bytes */
 };"

Signed-off-by: Zhao Qiang 
---
 drivers/net/ethernet/freescale/ucc_geth.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/freescale/ucc_geth.c 
b/drivers/net/ethernet/freescale/ucc_geth.c
index c8299c3..0bf5ba1 100644
--- a/drivers/net/ethernet/freescale/ucc_geth.c
+++ b/drivers/net/ethernet/freescale/ucc_geth.c
@@ -2993,11 +2993,11 @@ static int ucc_geth_startup(struct ucc_geth_private 
*ugeth)
if (ug_info->rxExtendedFiltering) {
size += THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING;
if (ug_info->largestexternallookupkeysize ==
-   QE_FLTR_TABLE_LOOKUP_KEY_SIZE_8_BYTES)
+   QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_8_BYTES)
size +=
THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_8;
if (ug_info->largestexternallookupkeysize ==
-   QE_FLTR_TABLE_LOOKUP_KEY_SIZE_16_BYTES)
+   QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_16_BYTES)
size +=
THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_16;
}
-- 
1.8.5

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v4] flexcan: add err_irq handler for flexcan

[Zhao Qiang]

when flexcan is not physically linked, command 'cantest' will
trigger an err_irq, add err_irq handler for it.

Signed-off-by: Zhao Qiang 
---
Changes for v2:
- use a space instead of tab
- use flexcan_poll_state instead of print
Changes for v3:
- return IRQ_HANDLED if err is triggered
- stop transmitted packets when there is an err_interrupt 
Changes for v4:
- call flexcan_irq 

 drivers/net/can/flexcan.c | 38 +-
 1 file changed, 37 insertions(+), 1 deletion(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index f425ec2..098fcac 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -208,6 +208,7 @@ struct flexcan_priv {
void __iomem *base;
u32 reg_esr;
u32 reg_ctrl_default;
+   int err_irq;
 
struct clk *clk_ipg;
struct clk *clk_per;
@@ -744,6 +745,27 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
return IRQ_HANDLED;
 }
 
+static irqreturn_t flexcan_err_irq(int irq, void *dev_id)
+{
+   struct net_device *dev = dev_id;
+   struct flexcan_priv *priv = netdev_priv(dev);
+   struct flexcan_regs __iomem *regs = priv->base;
+   u32 reg_ctrl, reg_esr;
+
+   reg_esr = flexcan_read(®s->esr);
+   reg_ctrl = flexcan_read(®s->ctrl);
+
+   if (reg_esr & FLEXCAN_ESR_ALL_INT) {
+   if (reg_esr & FLEXCAN_ESR_ERR_INT)
+   flexcan_write(reg_ctrl & ~FLEXCAN_CTRL_ERR_MSK,
+ ®s->ctrl);
+   flexcan_irq(irq, dev);
+   return IRQ_HANDLED;
+   }
+
+   return IRQ_NONE;
+}
+
 static void flexcan_set_bittiming(struct net_device *dev)
 {
const struct flexcan_priv *priv = netdev_priv(dev);
@@ -944,6 +966,15 @@ static int flexcan_open(struct net_device *dev)
if (err)
goto out_close;
 
+   if (priv->err_irq) {
+   err = request_irq(priv->err_irq, flexcan_err_irq, IRQF_SHARED,
+ dev->name, dev);
+   if (err) {
+   free_irq(priv->err_irq, dev);
+   goto out_free_irq;
+   }
+   }
+
/* start chip and queuing */
err = flexcan_chip_start(dev);
if (err)
@@ -1099,7 +1130,7 @@ static int flexcan_probe(struct platform_device *pdev)
struct resource *mem;
struct clk *clk_ipg = NULL, *clk_per = NULL;
void __iomem *base;
-   int err, irq;
+   int err, irq, err_irq;
u32 clock_freq = 0;
 
if (pdev->dev.of_node)
@@ -1126,6 +1157,10 @@ static int flexcan_probe(struct platform_device *pdev)
if (irq <= 0)
return -ENODEV;
 
+   err_irq = platform_get_irq(pdev, 1);
+   if (err_irq <= 0)
+   err_irq = 0;
+
base = devm_ioremap_resource(&pdev->dev, mem);
if (IS_ERR(base))
return PTR_ERR(base);
@@ -1149,6 +1184,7 @@ static int flexcan_probe(struct platform_device *pdev)
dev->flags |= IFF_ECHO;
 
priv = netdev_priv(dev);
+   priv->err_irq = err_irq;
priv->can.clock.freq = clock_freq;
priv->can.bittiming_const = &flexcan_bittiming_const;
priv->can.do_set_mode = flexcan_set_mode;
-- 
1.8.5

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v5] flexcan: add err_irq handler for flexcan

[Zhao Qiang]

when flexcan is not physically linked, command 'cantest' will
trigger an err_irq, add err_irq handler for it.

Signed-off-by: Zhao Qiang 
---
Changes for v2:
- use a space instead of tab
- use flexcan_poll_state instead of print
Changes for v3:
- return IRQ_HANDLED if err is triggered
- stop transmitted packets when there is an err_interrupt 
Changes for v4:
- call flexcan_irq 
Changes for v5:
- move err_int_handling code from flexcan_irq to flexcan_err_irq
- call flexcan_err_irq from flexcan_irq

 drivers/net/can/flexcan.c | 55 ---
 1 file changed, 47 insertions(+), 8 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index f425ec2..a12d3a4 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -208,6 +208,7 @@ struct flexcan_priv {
void __iomem *base;
u32 reg_esr;
u32 reg_ctrl_default;
+   int err_irq;
 
struct clk *clk_ipg;
struct clk *clk_per;
@@ -690,19 +691,22 @@ static int flexcan_poll(struct napi_struct *napi, int 
quota)
return work_done;
 }
 
-static irqreturn_t flexcan_irq(int irq, void *dev_id)
+static irqreturn_t flexcan_err_irq(int irq, void *dev_id)
 {
struct net_device *dev = dev_id;
-   struct net_device_stats *stats = &dev->stats;
struct flexcan_priv *priv = netdev_priv(dev);
struct flexcan_regs __iomem *regs = priv->base;
-   u32 reg_iflag1, reg_esr;
+   u32 reg_ctrl, reg_esr, reg_iflag1;
+   irqreturn_t ret = IRQ_NONE;
 
-   reg_iflag1 = flexcan_read(®s->iflag1);
reg_esr = flexcan_read(®s->esr);
-   /* ACK all bus error and state change IRQ sources */
-   if (reg_esr & FLEXCAN_ESR_ALL_INT)
+   reg_ctrl = flexcan_read(®s->ctrl);
+   reg_iflag1 = flexcan_read(®s->iflag1);
+
+   if (reg_esr & FLEXCAN_ESR_ALL_INT) {
flexcan_write(reg_esr & FLEXCAN_ESR_ALL_INT, ®s->esr);
+   ret = IRQ_HANDLED;
+   }
 
/*
 * schedule NAPI in case of:
@@ -725,6 +729,23 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
napi_schedule(&priv->napi);
}
 
+   if (reg_esr & FLEXCAN_ESR_ERR_INT)
+   flexcan_write(reg_ctrl & ~FLEXCAN_CTRL_ERR_MSK, ®s->ctrl);
+
+   return ret;
+}
+
+static irqreturn_t flexcan_irq(int irq, void *dev_id)
+{
+   struct net_device *dev = dev_id;
+   struct net_device_stats *stats = &dev->stats;
+   struct flexcan_priv *priv = netdev_priv(dev);
+   struct flexcan_regs __iomem *regs = priv->base;
+   u32 reg_iflag1;
+
+   reg_iflag1 = flexcan_read(®s->iflag1);
+
+   flexcan_err_irq(irq, dev);
/* FIFO overflow */
if (reg_iflag1 & FLEXCAN_IFLAG_RX_FIFO_OVERFLOW) {
flexcan_write(FLEXCAN_IFLAG_RX_FIFO_OVERFLOW, ®s->iflag1);
@@ -944,10 +965,17 @@ static int flexcan_open(struct net_device *dev)
if (err)
goto out_close;
 
+   if (priv->err_irq) {
+   err = request_irq(priv->err_irq, flexcan_err_irq, IRQF_SHARED,
+ dev->name, dev);
+   if (err)
+   goto out_free_irq;
+   }
+
/* start chip and queuing */
err = flexcan_chip_start(dev);
if (err)
-   goto out_free_irq;
+   goto out_free_err_irq;
 
can_led_event(dev, CAN_LED_EVENT_OPEN);
 
@@ -956,6 +984,9 @@ static int flexcan_open(struct net_device *dev)
 
return 0;
 
+ out_free_err_irq:
+   if (priv->err_irq)
+   free_irq(priv->err_irq, dev);
  out_free_irq:
free_irq(dev->irq, dev);
  out_close:
@@ -977,6 +1008,9 @@ static int flexcan_close(struct net_device *dev)
flexcan_chip_stop(dev);
 
free_irq(dev->irq, dev);
+   if (priv->err_irq)
+   free_irq(priv->err_irq, dev);
+
clk_disable_unprepare(priv->clk_per);
clk_disable_unprepare(priv->clk_ipg);
 
@@ -1099,7 +1133,7 @@ static int flexcan_probe(struct platform_device *pdev)
struct resource *mem;
struct clk *clk_ipg = NULL, *clk_per = NULL;
void __iomem *base;
-   int err, irq;
+   int err, irq, err_irq;
u32 clock_freq = 0;
 
if (pdev->dev.of_node)
@@ -1126,6 +1160,10 @@ static int flexcan_probe(struct platform_device *pdev)
if (irq <= 0)
return -ENODEV;
 
+   err_irq = platform_get_irq(pdev, 1);
+   if (err_irq <= 0)
+   err_irq = 0;
+
base = devm_ioremap_resource(&pdev->dev, mem);
if (IS_ERR(base))
return PTR_ERR(base);
@@ -1149,6 +1187,7 @@ static int flexcan_probe(struct platform_device *pdev)
dev->flags |= IFF_ECHO;
 
priv = netdev_priv(dev);
+   priv-

[PATCH v6] flexcan: add err_irq handler for flexcan

[Zhao Qiang]

when flexcan is not physically linked, command 'cantest' will
trigger an err_irq, add err_irq handler for it.

Signed-off-by: Zhao Qiang 
---
Changes for v2:
- use a space instead of tab
- use flexcan_poll_state instead of print
Changes for v3:
- return IRQ_HANDLED if err is triggered
- stop transmitted packets when there is an err_interrupt 
Changes for v4:
- call flexcan_irq 
Changes for v5:
- move err_int_handling code from flexcan_irq to flexcan_err_irq
- call flexcan_err_irq from flexcan_irq
Changes for v6:
- move RX_IRQ handling back to flexcan_irq

 drivers/net/can/flexcan.c | 52 +--
 1 file changed, 46 insertions(+), 6 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index f425ec2..f6c92bc 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -208,6 +208,7 @@ struct flexcan_priv {
void __iomem *base;
u32 reg_esr;
u32 reg_ctrl_default;
+   int err_irq;
 
struct clk *clk_ipg;
struct clk *clk_per;
@@ -690,6 +691,28 @@ static int flexcan_poll(struct napi_struct *napi, int 
quota)
return work_done;
 }
 
+static irqreturn_t flexcan_err_irq(int irq, void *dev_id)
+{
+   struct net_device *dev = dev_id;
+   struct flexcan_priv *priv = netdev_priv(dev);
+   struct flexcan_regs __iomem *regs = priv->base;
+   u32 reg_ctrl, reg_esr;
+   irqreturn_t ret = IRQ_NONE;
+
+   reg_esr = flexcan_read(®s->esr);
+   reg_ctrl = flexcan_read(®s->ctrl);
+
+   if (reg_esr & FLEXCAN_ESR_ALL_INT) {
+   flexcan_write(reg_esr & FLEXCAN_ESR_ALL_INT, ®s->esr);
+   ret = IRQ_HANDLED;
+   }
+
+   if (reg_esr & FLEXCAN_ESR_ERR_INT)
+   flexcan_write(reg_ctrl & ~FLEXCAN_CTRL_ERR_MSK, ®s->ctrl);
+
+   return ret;
+}
+
 static irqreturn_t flexcan_irq(int irq, void *dev_id)
 {
struct net_device *dev = dev_id;
@@ -698,11 +721,10 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
struct flexcan_regs __iomem *regs = priv->base;
u32 reg_iflag1, reg_esr;
 
-   reg_iflag1 = flexcan_read(®s->iflag1);
reg_esr = flexcan_read(®s->esr);
-   /* ACK all bus error and state change IRQ sources */
-   if (reg_esr & FLEXCAN_ESR_ALL_INT)
-   flexcan_write(reg_esr & FLEXCAN_ESR_ALL_INT, ®s->esr);
+   reg_iflag1 = flexcan_read(®s->iflag1);
+
+   flexcan_err_irq(irq, dev);
 
/*
 * schedule NAPI in case of:
@@ -944,10 +966,17 @@ static int flexcan_open(struct net_device *dev)
if (err)
goto out_close;
 
+   if (priv->err_irq) {
+   err = request_irq(priv->err_irq, flexcan_err_irq, IRQF_SHARED,
+ dev->name, dev);
+   if (err)
+   goto out_free_irq;
+   }
+
/* start chip and queuing */
err = flexcan_chip_start(dev);
if (err)
-   goto out_free_irq;
+   goto out_free_err_irq;
 
can_led_event(dev, CAN_LED_EVENT_OPEN);
 
@@ -956,6 +985,9 @@ static int flexcan_open(struct net_device *dev)
 
return 0;
 
+ out_free_err_irq:
+   if (priv->err_irq)
+   free_irq(priv->err_irq, dev);
  out_free_irq:
free_irq(dev->irq, dev);
  out_close:
@@ -977,6 +1009,9 @@ static int flexcan_close(struct net_device *dev)
flexcan_chip_stop(dev);
 
free_irq(dev->irq, dev);
+   if (priv->err_irq)
+   free_irq(priv->err_irq, dev);
+
clk_disable_unprepare(priv->clk_per);
clk_disable_unprepare(priv->clk_ipg);
 
@@ -1099,7 +1134,7 @@ static int flexcan_probe(struct platform_device *pdev)
struct resource *mem;
struct clk *clk_ipg = NULL, *clk_per = NULL;
void __iomem *base;
-   int err, irq;
+   int err, irq, err_irq;
u32 clock_freq = 0;
 
if (pdev->dev.of_node)
@@ -1126,6 +1161,10 @@ static int flexcan_probe(struct platform_device *pdev)
if (irq <= 0)
return -ENODEV;
 
+   err_irq = platform_get_irq(pdev, 1);
+   if (err_irq <= 0)
+   err_irq = 0;
+
base = devm_ioremap_resource(&pdev->dev, mem);
if (IS_ERR(base))
return PTR_ERR(base);
@@ -1149,6 +1188,7 @@ static int flexcan_probe(struct platform_device *pdev)
dev->flags |= IFF_ECHO;
 
priv = netdev_priv(dev);
+   priv->err_irq = err_irq;
priv->can.clock.freq = clock_freq;
priv->can.bittiming_const = &flexcan_bittiming_const;
priv->can.do_set_mode = flexcan_set_mode;
-- 
1.8.5

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v7] flexcan: add err_irq handler for flexcan

[Zhao Qiang]

when flexcan is not physically linked, command 'cantest' will
trigger an err_irq, add err_irq handler for it.

Signed-off-by: Zhao Qiang 
---
Changes for v2:
- use a space instead of tab
- use flexcan_poll_state instead of print
Changes for v3:
- return IRQ_HANDLED if err is triggered
- stop transmitted packets when there is an err_interrupt 
Changes for v4:
- call flexcan_irq 
Changes for v5:
- move err_int_handling code from flexcan_irq to flexcan_err_irq
- call flexcan_err_irq from flexcan_irq
Changes for v6:
- move RX_IRQ handling back to flexcan_irq
Changes for v7:
- seperate err_irq_handling code from rx_irq_handling code and move it 
to err_irq_handler.

 drivers/net/can/flexcan.c | 73 ---
 1 file changed, 57 insertions(+), 16 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index f425ec2..12385f8 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -208,6 +208,7 @@ struct flexcan_priv {
void __iomem *base;
u32 reg_esr;
u32 reg_ctrl_default;
+   int err_irq;
 
struct clk *clk_ipg;
struct clk *clk_per;
@@ -690,6 +691,38 @@ static int flexcan_poll(struct napi_struct *napi, int 
quota)
return work_done;
 }
 
+static irqreturn_t flexcan_err_irq(int irq, void *dev_id)
+{
+   struct net_device *dev = dev_id;
+   struct flexcan_priv *priv = netdev_priv(dev);
+   struct flexcan_regs __iomem *regs = priv->base;
+   u32 reg_ctrl, reg_esr;
+   irqreturn_t ret = IRQ_NONE;
+
+   reg_esr = flexcan_read(®s->esr);
+   reg_ctrl = flexcan_read(®s->ctrl);
+
+   if (reg_esr & FLEXCAN_ESR_ALL_INT) {
+   flexcan_write(reg_esr & FLEXCAN_ESR_ALL_INT, ®s->esr);
+   ret = IRQ_HANDLED;
+   }
+
+   if (reg_esr & FLEXCAN_ESR_ERR_INT)
+   flexcan_write(reg_ctrl & ~FLEXCAN_CTRL_ERR_MSK, ®s->ctrl);
+
+   if ((reg_esr & FLEXCAN_ESR_ERR_STATE) ||
+   flexcan_has_and_handle_berr(priv, reg_esr)) {
+   /* The error bits are cleared on read,
+* save them for later use.
+*/
+   priv->reg_esr = reg_esr & FLEXCAN_ESR_ERR_BUS;
+   flexcan_write(priv->reg_ctrl_default & ~FLEXCAN_CTRL_ERR_ALL,
+ ®s->ctrl);
+   napi_schedule(&priv->napi);
+   }
+   return ret;
+}
+
 static irqreturn_t flexcan_irq(int irq, void *dev_id)
 {
struct net_device *dev = dev_id;
@@ -698,11 +731,10 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
struct flexcan_regs __iomem *regs = priv->base;
u32 reg_iflag1, reg_esr;
 
-   reg_iflag1 = flexcan_read(®s->iflag1);
reg_esr = flexcan_read(®s->esr);
-   /* ACK all bus error and state change IRQ sources */
-   if (reg_esr & FLEXCAN_ESR_ALL_INT)
-   flexcan_write(reg_esr & FLEXCAN_ESR_ALL_INT, ®s->esr);
+   reg_iflag1 = flexcan_read(®s->iflag1);
+
+   flexcan_err_irq(irq, dev);
 
/*
 * schedule NAPI in case of:
@@ -710,18 +742,9 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
 * - state change IRQ
 * - bus error IRQ and bus error reporting is activated
 */
-   if ((reg_iflag1 & FLEXCAN_IFLAG_RX_FIFO_AVAILABLE) ||
-   (reg_esr & FLEXCAN_ESR_ERR_STATE) ||
-   flexcan_has_and_handle_berr(priv, reg_esr)) {
-   /*
-* The error bits are cleared on read,
-* save them for later use.
-*/
-   priv->reg_esr = reg_esr & FLEXCAN_ESR_ERR_BUS;
+   if (reg_iflag1 & FLEXCAN_IFLAG_RX_FIFO_AVAILABLE) {
flexcan_write(FLEXCAN_IFLAG_DEFAULT &
~FLEXCAN_IFLAG_RX_FIFO_AVAILABLE, ®s->imask1);
-   flexcan_write(priv->reg_ctrl_default & ~FLEXCAN_CTRL_ERR_ALL,
-  ®s->ctrl);
napi_schedule(&priv->napi);
}
 
@@ -944,10 +967,17 @@ static int flexcan_open(struct net_device *dev)
if (err)
goto out_close;
 
+   if (priv->err_irq) {
+   err = request_irq(priv->err_irq, flexcan_err_irq, IRQF_SHARED,
+ dev->name, dev);
+   if (err)
+   goto out_free_irq;
+   }
+
/* start chip and queuing */
err = flexcan_chip_start(dev);
if (err)
-   goto out_free_irq;
+   goto out_free_err_irq;
 
can_led_event(dev, CAN_LED_EVENT_OPEN);
 
@@ -956,6 +986,9 @@ static int flexcan_open(struct net_device *dev)
 
return 0;
 
+ out_free_err_irq:
+   if (priv->err_irq)
+   free_irq(priv->err_irq, dev);
  out_free_

[PATCH] powerpc/p1010rdb-pa: modify phy interrupt.

[Zhao Qiang]

It is not correct according to p1010rdb-pa user guide.
So modify it.

Signed-off-by: Zhao Qiang 
---
 arch/powerpc/boot/dts/p1010rdb-pa.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dtsi 
b/arch/powerpc/boot/dts/p1010rdb-pa.dtsi
index 3d275e0..0cf6c34 100644
--- a/arch/powerpc/boot/dts/p1010rdb-pa.dtsi
+++ b/arch/powerpc/boot/dts/p1010rdb-pa.dtsi
@@ -39,7 +39,7 @@
 };
 
 &phy0 {
-   interrupts = <3 1 0 0>;
+   interrupts = <1 1 0 0>;
 };
 
 &phy1 {
@@ -47,5 +47,5 @@
 };
 
 &phy2 {
-   interrupts = <2 1 0 0>;
+   interrupts = <4 1 0 0>;
 };
-- 
1.8.4


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH] Corenet: Add QE platform support for Corenet

[Zhao Qiang]

There is QE on platform T104x, add support.
Call funcs qe_ic_init and qe_init if CONFIG_QUICC_ENGINE is defined.

Signed-off-by: Zhao Qiang 
---
 arch/powerpc/platforms/85xx/corenet_generic.c | 32 +++
 1 file changed, 32 insertions(+)

diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c 
b/arch/powerpc/platforms/85xx/corenet_generic.c
index fbd871e..f8c8e0c 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -26,6 +26,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 #include 
@@ -38,6 +40,10 @@ void __init corenet_gen_pic_init(void)
unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
MPIC_NO_RESET;
 
+#ifdef CONFIG_QUICC_ENGINE
+   struct device_node *np;
+#endif
+
if (ppc_md.get_irq == mpic_get_coreint_irq)
flags |= MPIC_ENABLE_COREINT;
 
@@ -45,6 +51,16 @@ void __init corenet_gen_pic_init(void)
BUG_ON(mpic == NULL);
 
mpic_init(mpic);
+
+#ifdef CONFIG_QUICC_ENGINE
+   np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
+   if (np) {
+   qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
+   qe_ic_cascade_high_mpic);
+   of_node_put(np);
+   }
+#endif
+
 }
 
 /*
@@ -52,11 +68,24 @@ void __init corenet_gen_pic_init(void)
  */
 void __init corenet_gen_setup_arch(void)
 {
+#ifdef CONFIG_QUICC_ENGINE
+   struct device_node *np;
+#endif
mpc85xx_smp_init();
 
swiotlb_detect_4g();
 
pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
+
+#ifdef CONFIG_QUICC_ENGINE
+   np = of_find_compatible_node(NULL, NULL, "fsl,qe");
+   if (!np) {
+   pr_err("%s: Could not find Quicc Engine node\n", __func__);
+   return;
+   }
+   qe_reset();
+   of_node_put(np);
+#endif
 }
 
 static const struct of_device_id of_device_ids[] = {
@@ -81,6 +110,9 @@ static const struct of_device_id of_device_ids[] = {
{
.compatible = "fsl,qoriq-pcie-v3.0",
},
+   {
+   .compatible = "fsl,qe",
+   },
/* The following two are for the Freescale hypervisor */
{
.name   = "hypervisor",
-- 
1.8.5


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCh v2 1/2] QE: split function mpc85xx_qe_init() into two functions.

[Zhao Qiang]

New QE doesn't have par_io, it doesn't need to init par_io
for new QE.
Split function mpc85xx_qe_init() into mpc85xx_qe_init()
and mpc85xx_qe_par_io_init().
Call mpc85xx_qe_init() for both new and old while
mpc85xx_qe_par_io_init() after mpc85xx_qe_init() for old.

Signed-off-by: Zhao Qiang 
---
Changes for v2:
-no

 arch/powerpc/platforms/85xx/common.c  | 6 ++
 arch/powerpc/platforms/85xx/mpc85xx.h | 2 ++
 arch/powerpc/platforms/85xx/mpc85xx_mds.c | 1 +
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 1 +
 arch/powerpc/platforms/85xx/twr_p102x.c   | 1 +
 5 files changed, 11 insertions(+)

diff --git a/arch/powerpc/platforms/85xx/common.c 
b/arch/powerpc/platforms/85xx/common.c
index 3b085c7..b564b5e 100644
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -107,6 +107,12 @@ void __init mpc85xx_qe_init(void)
qe_reset();
of_node_put(np);
 
+}
+
+void __init mpc85xx_qe_par_io_init(void)
+{
+   struct device_node *np;
+
np = of_find_node_by_name(NULL, "par_io");
if (np) {
struct device_node *ucc;
diff --git a/arch/powerpc/platforms/85xx/mpc85xx.h 
b/arch/powerpc/platforms/85xx/mpc85xx.h
index fc51dd4..39056f6 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx.h
+++ b/arch/powerpc/platforms/85xx/mpc85xx.h
@@ -10,8 +10,10 @@ static inline void __init mpc85xx_cpm2_pic_init(void) {}
 
 #ifdef CONFIG_QUICC_ENGINE
 extern void mpc85xx_qe_init(void);
+extern void mpc85xx_qe_par_io_init(void);
 #else
 static inline void __init mpc85xx_qe_init(void) {}
+static inline void __init mpc85xx_qe_par_io_init(void) {}
 #endif
 
 #endif
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c 
b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 34f3c5e..3c190b4 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -239,6 +239,7 @@ static void __init mpc85xx_mds_qe_init(void)
struct device_node *np;
 
mpc85xx_qe_init();
+   mpc85xx_qe_par_io_init();
mpc85xx_mds_reset_ucc_phys();
 
if (machine_is(p1021_mds)) {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c 
b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index e15bdd1..f9668ed 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -99,6 +99,7 @@ static void __init mpc85xx_rdb_setup_arch(void)
 
 #ifdef CONFIG_QUICC_ENGINE
mpc85xx_qe_init();
+   mpc85xx_qe_par_io_init();
 #if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
if (machine_is(p1025_rdb)) {
 
diff --git a/arch/powerpc/platforms/85xx/twr_p102x.c 
b/arch/powerpc/platforms/85xx/twr_p102x.c
index c25ff10..1eadb6d 100644
--- a/arch/powerpc/platforms/85xx/twr_p102x.c
+++ b/arch/powerpc/platforms/85xx/twr_p102x.c
@@ -77,6 +77,7 @@ static void __init twr_p1025_setup_arch(void)
 
 #ifdef CONFIG_QUICC_ENGINE
mpc85xx_qe_init();
+   mpc85xx_qe_par_io_init();
 
 #if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
if (machine_is(twr_p1025)) {
-- 
1.8.5


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCh v2 2/2] Corenet: Add QE platform support for Corenet

[Zhao Qiang]

There is QE on platform T104x, add support.
Call funcs qe_ic_init and qe_init if CONFIG_QUICC_ENGINE is defined.

Signed-off-by: Zhao Qiang 
---
Changes for v2:
- use mpc85xx_qe_init() instead
 arch/powerpc/platforms/85xx/corenet_generic.c | 25 +
 1 file changed, 25 insertions(+)

diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c 
b/arch/powerpc/platforms/85xx/corenet_generic.c
index fbd871e..f1f4575 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -26,11 +26,14 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 #include 
 #include 
 #include "smp.h"
+#include "mpc85xx.h"
 
 void __init corenet_gen_pic_init(void)
 {
@@ -38,6 +41,10 @@ void __init corenet_gen_pic_init(void)
unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
MPIC_NO_RESET;
 
+#ifdef CONFIG_QUICC_ENGINE
+   struct device_node *np;
+#endif
+
if (ppc_md.get_irq == mpic_get_coreint_irq)
flags |= MPIC_ENABLE_COREINT;
 
@@ -45,6 +52,16 @@ void __init corenet_gen_pic_init(void)
BUG_ON(mpic == NULL);
 
mpic_init(mpic);
+
+#ifdef CONFIG_QUICC_ENGINE
+   np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
+   if (np) {
+   qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
+   qe_ic_cascade_high_mpic);
+   of_node_put(np);
+   }
+#endif
+
 }
 
 /*
@@ -57,6 +74,11 @@ void __init corenet_gen_setup_arch(void)
swiotlb_detect_4g();
 
pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
+
+#ifdef CONFIG_QUICC_ENGINE
+   mpc85xx_qe_init();
+#endif
+
 }
 
 static const struct of_device_id of_device_ids[] = {
@@ -81,6 +103,9 @@ static const struct of_device_id of_device_ids[] = {
{
.compatible = "fsl,qoriq-pcie-v3.0",
},
+   {
+   .compatible = "fsl,qe",
+   },
/* The following two are for the Freescale hypervisor */
{
.name   = "hypervisor",
-- 
1.8.5


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v3 1/2] QE: split function mpc85xx_qe_init() into two functions.

[Zhao Qiang]

New QE doesn't have par_io, it doesn't need to init par_io
for new QE.
Split function mpc85xx_qe_init() into mpc85xx_qe_init()
and mpc85xx_qe_par_io_init().
Call mpc85xx_qe_init() for both new and old while
mpc85xx_qe_par_io_init() after mpc85xx_qe_init() for old.

Signed-off-by: Zhao Qiang 
---
Changes for v2:
- no
Changes for v3:
- no

 arch/powerpc/platforms/85xx/common.c  | 6 ++
 arch/powerpc/platforms/85xx/mpc85xx.h | 2 ++
 arch/powerpc/platforms/85xx/mpc85xx_mds.c | 1 +
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 1 +
 arch/powerpc/platforms/85xx/twr_p102x.c   | 1 +
 5 files changed, 11 insertions(+)

diff --git a/arch/powerpc/platforms/85xx/common.c 
b/arch/powerpc/platforms/85xx/common.c
index 3b085c7..b564b5e 100644
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -107,6 +107,12 @@ void __init mpc85xx_qe_init(void)
qe_reset();
of_node_put(np);
 
+}
+
+void __init mpc85xx_qe_par_io_init(void)
+{
+   struct device_node *np;
+
np = of_find_node_by_name(NULL, "par_io");
if (np) {
struct device_node *ucc;
diff --git a/arch/powerpc/platforms/85xx/mpc85xx.h 
b/arch/powerpc/platforms/85xx/mpc85xx.h
index fc51dd4..39056f6 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx.h
+++ b/arch/powerpc/platforms/85xx/mpc85xx.h
@@ -10,8 +10,10 @@ static inline void __init mpc85xx_cpm2_pic_init(void) {}
 
 #ifdef CONFIG_QUICC_ENGINE
 extern void mpc85xx_qe_init(void);
+extern void mpc85xx_qe_par_io_init(void);
 #else
 static inline void __init mpc85xx_qe_init(void) {}
+static inline void __init mpc85xx_qe_par_io_init(void) {}
 #endif
 
 #endif
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c 
b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 34f3c5e..3c190b4 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -239,6 +239,7 @@ static void __init mpc85xx_mds_qe_init(void)
struct device_node *np;
 
mpc85xx_qe_init();
+   mpc85xx_qe_par_io_init();
mpc85xx_mds_reset_ucc_phys();
 
if (machine_is(p1021_mds)) {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c 
b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index e15bdd1..f9668ed 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -99,6 +99,7 @@ static void __init mpc85xx_rdb_setup_arch(void)
 
 #ifdef CONFIG_QUICC_ENGINE
mpc85xx_qe_init();
+   mpc85xx_qe_par_io_init();
 #if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
if (machine_is(p1025_rdb)) {
 
diff --git a/arch/powerpc/platforms/85xx/twr_p102x.c 
b/arch/powerpc/platforms/85xx/twr_p102x.c
index c25ff10..1eadb6d 100644
--- a/arch/powerpc/platforms/85xx/twr_p102x.c
+++ b/arch/powerpc/platforms/85xx/twr_p102x.c
@@ -77,6 +77,7 @@ static void __init twr_p1025_setup_arch(void)
 
 #ifdef CONFIG_QUICC_ENGINE
mpc85xx_qe_init();
+   mpc85xx_qe_par_io_init();
 
 #if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
if (machine_is(twr_p1025)) {
-- 
1.8.5


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v3 2/2] Corenet: Add QE platform support for Corenet

[Zhao Qiang]

There is QE on platform T104x, add support.
Call funcs qe_ic_init and qe_init if CONFIG_QUICC_ENGINE is defined.

Signed-off-by: Zhao Qiang 
---
Changes for v2:
- use mpc85xx_qe_init() instead
Changes for v3:
- remove #ifdef which aren't really needed

 arch/powerpc/platforms/85xx/corenet_generic.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c 
b/arch/powerpc/platforms/85xx/corenet_generic.c
index fbd871e..19420ef 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -26,11 +26,13 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
 #include 
 #include "smp.h"
+#include "mpc85xx.h"
 
 void __init corenet_gen_pic_init(void)
 {
@@ -38,6 +40,8 @@ void __init corenet_gen_pic_init(void)
unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
MPIC_NO_RESET;
 
+   struct device_node *np;
+
if (ppc_md.get_irq == mpic_get_coreint_irq)
flags |= MPIC_ENABLE_COREINT;
 
@@ -45,6 +49,14 @@ void __init corenet_gen_pic_init(void)
BUG_ON(mpic == NULL);
 
mpic_init(mpic);
+
+   np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
+   if (np) {
+   qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
+   qe_ic_cascade_high_mpic);
+   of_node_put(np);
+   }
+
 }
 
 /*
@@ -57,6 +69,8 @@ void __init corenet_gen_setup_arch(void)
swiotlb_detect_4g();
 
pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
+
+   mpc85xx_qe_init();
 }
 
 static const struct of_device_id of_device_ids[] = {
@@ -81,6 +95,9 @@ static const struct of_device_id of_device_ids[] = {
{
.compatible = "fsl,qoriq-pcie-v3.0",
},
+   {
+   .compatible = "fsl,qe",
+   },
/* The following two are for the Freescale hypervisor */
{
.name   = "hypervisor",
-- 
1.8.5


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH] T1040RDB: add qe node for T1040RDB dts

[Zhao Qiang]

Signed-off-by: Zhao Qiang 
---
 arch/powerpc/boot/dts/t1040rdb.dts | 43 ++
 1 file changed, 43 insertions(+)

diff --git a/arch/powerpc/boot/dts/t1040rdb.dts 
b/arch/powerpc/boot/dts/t1040rdb.dts
index e2eee18..6ff0412 100644
--- a/arch/powerpc/boot/dts/t1040rdb.dts
+++ b/arch/powerpc/boot/dts/t1040rdb.dts
@@ -268,6 +268,49 @@
fsl,fman-mac = <&enet4>;
};
};
+
+   qe: qe@ffe13 {
+   ranges = <0x0 0xf 0xfe14 0x4>;
+   reg = <0xf 0xfe14 0 0x480>;
+   brg-frequency = <0>;
+   bus-frequency = <0>;
+
+   si1: si@700 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "fsl,qe-si";
+   reg = <0x700 0x80>;
+   };
+
+   siram1: siram@1000 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "fsl,qe-siram";
+   reg = <0x1000 0x800>;
+   };
+
+   tdma: ucc@2000 {
+   compatible = "fsl,ucc-tdm";
+   rx-clock-name = "clk3";
+   tx-clock-name = "clk4";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot = <0xfffe>;
+   fsl,rx-timeslot = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-mode = "normal";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   };
+
+   serial: ucc@2200 {
+   device_type = "serial";
+   compatible = "ucc_uart";
+   port-number = <1>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
+   };
 };
 /include/ "fsl/t1040si-post.dtsi"
 /include/ "fsl/qoriq-dpaa-res3.dtsi"
-- 
1.8.5


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH] phy/at8031: enable at8031 to work on interrupt mode

[Zhao Qiang]

The at8031 can work on polling mode and interrupt mode.
Add ack_interrupt and config intr funcs to enable
interrupt mode for it.

Signed-off-by: Zhao Qiang 
---
 drivers/net/phy/at803x.c | 30 ++
 1 file changed, 30 insertions(+)

diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
index bc71947..d034ef5 100644
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -27,6 +27,9 @@
 #define AT803X_MMD_ACCESS_CONTROL  0x0D
 #define AT803X_MMD_ACCESS_CONTROL_DATA 0x0E
 #define AT803X_FUNC_DATA   0x4003
+#define AT803X_INER0x0012
+#define AT803X_INER_INIT   0xec00
+#define AT803X_INSR0x0013
 #define AT803X_DEBUG_ADDR  0x1D
 #define AT803X_DEBUG_DATA  0x1E
 #define AT803X_DEBUG_SYSTEM_MODE_CTRL  0x05
@@ -191,6 +194,31 @@ static int at803x_config_init(struct phy_device *phydev)
return 0;
 }
 
+static int at803x_ack_interrupt(struct phy_device *phydev)
+{
+   int err;
+
+   err = phy_read(phydev, AT803X_INSR);
+
+   return (err < 0) ? err : 0;
+}
+
+static int at803x_config_intr(struct phy_device *phydev)
+{
+   int err;
+   int value;
+
+   value = phy_read(phydev, AT803X_INER);
+
+   if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
+   err = phy_write(phydev, AT803X_INER,
+   (value | AT803X_INER_INIT));
+   else
+   err = phy_write(phydev, AT803X_INER, value);
+
+   return err;
+}
+
 static struct phy_driver at803x_driver[] = {
 {
/* ATHEROS 8035 */
@@ -240,6 +268,8 @@ static struct phy_driver at803x_driver[] = {
.flags  = PHY_HAS_INTERRUPT,
.config_aneg= genphy_config_aneg,
.read_status= genphy_read_status,
+   .ack_interrupt  = &at803x_ack_interrupt,
+   .config_intr= &at803x_config_intr,
.driver = {
.owner = THIS_MODULE,
},
-- 
1.8.5


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH] phy/at8031: enable at8031 to work on interrupt mode

[Zhao Qiang]

The at8031 can work on polling mode and interrupt mode.
Add ack_interrupt and config intr funcs to enable
interrupt mode for it.

Signed-off-by: Zhao Qiang 
---
 drivers/net/phy/at803x.c | 30 ++
 1 file changed, 30 insertions(+)

diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
index bc71947..d034ef5 100644
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -27,6 +27,9 @@
 #define AT803X_MMD_ACCESS_CONTROL  0x0D
 #define AT803X_MMD_ACCESS_CONTROL_DATA 0x0E
 #define AT803X_FUNC_DATA   0x4003
+#define AT803X_INER0x0012
+#define AT803X_INER_INIT   0xec00
+#define AT803X_INSR0x0013
 #define AT803X_DEBUG_ADDR  0x1D
 #define AT803X_DEBUG_DATA  0x1E
 #define AT803X_DEBUG_SYSTEM_MODE_CTRL  0x05
@@ -191,6 +194,31 @@ static int at803x_config_init(struct phy_device *phydev)
return 0;
 }
 
+static int at803x_ack_interrupt(struct phy_device *phydev)
+{
+   int err;
+
+   err = phy_read(phydev, AT803X_INSR);
+
+   return (err < 0) ? err : 0;
+}
+
+static int at803x_config_intr(struct phy_device *phydev)
+{
+   int err;
+   int value;
+
+   value = phy_read(phydev, AT803X_INER);
+
+   if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
+   err = phy_write(phydev, AT803X_INER,
+   (value | AT803X_INER_INIT));
+   else
+   err = phy_write(phydev, AT803X_INER, value);
+
+   return err;
+}
+
 static struct phy_driver at803x_driver[] = {
 {
/* ATHEROS 8035 */
@@ -240,6 +268,8 @@ static struct phy_driver at803x_driver[] = {
.flags  = PHY_HAS_INTERRUPT,
.config_aneg= genphy_config_aneg,
.read_status= genphy_read_status,
+   .ack_interrupt  = &at803x_ack_interrupt,
+   .config_intr= &at803x_config_intr,
.driver = {
.owner = THIS_MODULE,
},
-- 
1.8.5


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v2] phy/at8031: enable at8031 to work on interrupt mode

[Zhao Qiang]

The at8031 can work on polling mode and interrupt mode.
Add ack_interrupt and config intr funcs to enable
interrupt mode for it.

Signed-off-by: Zhao Qiang 
---
changes for v2:
- when interrupt is not enabled, write 0 to interrupt enbale register
- delete a inner parens not needed
 drivers/net/phy/at803x.c | 30 ++
 1 file changed, 30 insertions(+)

diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
index bc71947..643464d 100644
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -27,6 +27,9 @@
 #define AT803X_MMD_ACCESS_CONTROL  0x0D
 #define AT803X_MMD_ACCESS_CONTROL_DATA 0x0E
 #define AT803X_FUNC_DATA   0x4003
+#define AT803X_INER0x0012
+#define AT803X_INER_INIT   0xec00
+#define AT803X_INSR0x0013
 #define AT803X_DEBUG_ADDR  0x1D
 #define AT803X_DEBUG_DATA  0x1E
 #define AT803X_DEBUG_SYSTEM_MODE_CTRL  0x05
@@ -191,6 +194,31 @@ static int at803x_config_init(struct phy_device *phydev)
return 0;
 }
 
+static int at803x_ack_interrupt(struct phy_device *phydev)
+{
+   int err;
+
+   err = phy_read(phydev, AT803X_INSR);
+
+   return (err < 0) ? err : 0;
+}
+
+static int at803x_config_intr(struct phy_device *phydev)
+{
+   int err;
+   int value;
+
+   value = phy_read(phydev, AT803X_INER);
+
+   if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
+   err = phy_write(phydev, AT803X_INER,
+   value | AT803X_INER_INIT);
+   else
+   err = phy_write(phydev, AT803X_INER, 0);
+
+   return err;
+}
+
 static struct phy_driver at803x_driver[] = {
 {
/* ATHEROS 8035 */
@@ -240,6 +268,8 @@ static struct phy_driver at803x_driver[] = {
.flags  = PHY_HAS_INTERRUPT,
.config_aneg= genphy_config_aneg,
.read_status= genphy_read_status,
+   .ack_interrupt  = &at803x_ack_interrupt,
+   .config_intr= &at803x_config_intr,
.driver = {
.owner = THIS_MODULE,
},
-- 
1.8.5


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH] spi: add "spi-lsb-first" to devicetree

[Zhao Qiang]

add optional property devicetree for SPI slave nodes
into devicetree so that LSB mode can be enabled by devicetree.

Signed-off-by: Zhao Qiang 
---
 Documentation/devicetree/bindings/spi/spi-bus.txt | 4 
 drivers/spi/spi.c | 2 ++
 2 files changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt 
b/Documentation/devicetree/bindings/spi/spi-bus.txt
index e5a4d1b..fdd9f15 100644
--- a/Documentation/devicetree/bindings/spi/spi-bus.txt
+++ b/Documentation/devicetree/bindings/spi/spi-bus.txt
@@ -55,11 +55,15 @@ contain the following properties.
chip select active high
 - spi-3wire   - (optional) Empty property indicating device requires
3-wire mode.
+- spi-lsb-first   - (optional) Empty property indicating device requires
+   LSB first mode.
 - spi-tx-bus-width - (optional) The bus width(number of data wires) that
   used for MOSI. Defaults to 1 if not present.
 - spi-rx-bus-width - (optional) The bus width(number of data wires) that
   used for MISO. Defaults to 1 if not present.
 
+- spi-rx-bus-width - (optional) The bus width(number of data wires) that
+  used for MISO. Defaults to 1 if not present.
 Some SPI controllers and devices support Dual and Quad SPI transfer mode.
 It allows data in SPI system transfered in 2 wires(DUAL) or 4 wires(QUAD).
 Now the value that spi-tx-bus-width and spi-rx-bus-width can receive is
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 23756b0..0a20a90 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1050,6 +1050,8 @@ static void of_register_spi_devices(struct spi_master 
*master)
spi->mode |= SPI_CS_HIGH;
if (of_find_property(nc, "spi-3wire", NULL))
spi->mode |= SPI_3WIRE;
+   if (of_find_property(nc, "spi-lsb-first", NULL))
+   spi->mode |= SPI_LSB_FIRST;
 
/* Device DUAL/QUAD mode */
if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) {
-- 
1.8.5


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v2] spi: add "spi-lsb-first" to devicetree

[Zhao Qiang]

add optional property devicetree for SPI slave nodes
into devicetree so that LSB mode can be enabled by devicetree.

Signed-off-by: Zhao Qiang 
---
changs for v2:
- remove duplicate "spi-rx-bus-width" 
 Documentation/devicetree/bindings/spi/spi-bus.txt | 2 ++
 drivers/spi/spi.c | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt 
b/Documentation/devicetree/bindings/spi/spi-bus.txt
index e5a4d1b..22d5740 100644
--- a/Documentation/devicetree/bindings/spi/spi-bus.txt
+++ b/Documentation/devicetree/bindings/spi/spi-bus.txt
@@ -55,6 +55,8 @@ contain the following properties.
chip select active high
 - spi-3wire   - (optional) Empty property indicating device requires
3-wire mode.
+- spi-lsb-first   - (optional) Empty property indicating device requires
+   LSB first mode.
 - spi-tx-bus-width - (optional) The bus width(number of data wires) that
   used for MOSI. Defaults to 1 if not present.
 - spi-rx-bus-width - (optional) The bus width(number of data wires) that
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 23756b0..0a20a90 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1050,6 +1050,8 @@ static void of_register_spi_devices(struct spi_master 
*master)
spi->mode |= SPI_CS_HIGH;
if (of_find_property(nc, "spi-3wire", NULL))
spi->mode |= SPI_3WIRE;
+   if (of_find_property(nc, "spi-lsb-first", NULL))
+   spi->mode |= SPI_LSB_FIRST;
 
/* Device DUAL/QUAD mode */
if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) {
-- 
1.8.5


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v2 3/7] QE: Add uqe_serial document to bindings

[Zhao Qiang]

Add uqe_serial document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt

Signed-off-by: Zhao Qiang 
---
Changes for v2
- modify tx/rx-clock-name specification

 .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt| 19 +++
 1 file changed, 19 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt

diff --git 
a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt 
b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
new file mode 100644
index 000..436c71c
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
@@ -0,0 +1,19 @@
+* Serial
+
+Currently defined compatibles:
+- ucc_uart
+
+Properties for ucc_uart:
+port-number : port number of UCC-UART
+tx/rx-clock-name : should be "brg1"-"brg16" for internal clock source,
+  should be "clk1"-"clk28" for external clock source.
+
+Example:
+
+   ucc_serial: ucc@2200 {
+   device_type = "serial";
+   compatible = "ucc_uart";
+   port-number = <1>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v2 4/7] bindings: move cpm_qe binding from powerpc/fsl to soc/fsl

[Zhao Qiang]

cpm_qe is supported on both powerpc and arm.
and the QE code has been moved from arch/powerpc into
drivers/soc/fsl, so move cpm_qe binding from powerpc/fsl
to soc/fsl

Signed-off-by: Zhao Qiang 
---
Changes for v2
- new added

 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/brg.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/i2c.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/pic.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/usb.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/gpio.txt| 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/network.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe.txt  | 0
 .../devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/firmware.txt   | 0
 .../devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/par_io.txt | 0
 .../devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/pincfg.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/ucc.txt  | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/usb.txt  | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/serial.txt  | 0
 .../devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/uqe_serial.txt| 0
 15 files changed, 0 insertions(+), 0 deletions(-)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm.txt 
(100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/cpm/brg.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/cpm/i2c.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/cpm/pic.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/cpm/usb.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/gpio.txt 
(100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/network.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe.txt 
(100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/qe/firmware.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/qe/par_io.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/qe/pincfg.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/qe/ucc.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/qe/usb.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/serial.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/uqe_serial.txt (100%)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/brg.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/brg.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/brg.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/brg.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/i2c.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/i2c.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/i2c.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/i2c.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/pic.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/pic.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/pic.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/pic.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/usb.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/usb.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/usb.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/usb.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/gpio.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/gpio.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/gpio.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/gpio.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/netwo

[PATCH v2 6/7] T104xRDB: Add qe node to t104xrdb

[Zhao Qiang]

add qe node to t104xrdb.dtsi

Signed-off-by: Zhao Qiang 
---
Changes for v2
- rebase

 arch/powerpc/boot/dts/fsl/t104xrdb.dtsi | 40 +
 1 file changed, 40 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi 
b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
index 830ea48..3b08601 100644
--- a/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
@@ -186,4 +186,44 @@
  0 0x0001>;
};
};
+
+   qe: qe@ffe14 {
+   ranges = <0x0 0xf 0xfe14 0x4>;
+   reg = <0xf 0xfe14 0 0x480>;
+   brg-frequency = <0>;
+   bus-frequency = <0>;
+
+   si1: si@700 {
+   compatible = "fsl,qe-si";
+   reg = <0x700 0x80>;
+   };
+
+   siram1: siram@1000 {
+   compatible = "fsl,qe-siram";
+   reg = <0x1000 0x800>;
+   };
+
+   ucc_hdlc: ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot = <0xfffe>;
+   fsl,rx-timeslot = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-mode = "normal";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   fsl,tdm-interface;
+   };
+
+   ucc_serial: ucc@2200 {
+   device_type = "serial";
+   compatible = "ucc_uart";
+   port-number = <1>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
+   };
 };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v2 2/7] QE: Add ucc hdlc document to bindings

[Zhao Qiang]

Add ucc hdlc document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt

Signed-off-by: Zhao Qiang 
---
Changes for v2
- use ucc-hdlc instead of ucc_hdlc
- add more information to properties.

 .../bindings/powerpc/fsl/cpm_qe/network.txt| 93 ++
 1 file changed, 93 insertions(+)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt 
b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
index 29b28b8..936158c 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
@@ -41,3 +41,96 @@ Example:
fsl,mdio-pin = <12>;
fsl,mdc-pin = <13>;
};
+
+* HDLC
+
+Currently defined compatibles:
+- fsl,ucc-hdlc
+
+Properties for fsl,ucc-hdlc:
+- rx-clock-name
+- tx-clock-name
+   Usage: required
+   Value type: 
+   Definition : should be "brg1"-"brg16" for internal clock source,
+should be "clk1"-"clk28" for external clock source.
+
+- fsl,rx-sync-clock
+   Usage: required
+   Value type: 
+   Definition : should be "none" when using internal clock source,
+should be "rsync_pin" when using external clock source.
+
+- fsl,tx-sync-clock
+   Usage: required
+   Value type: 
+   Definition : should be "none" when using internal clock source,
+should be "tsync_pin" when using external clock source.
+
+- fsl,tx-timeslot
+- fsl,rx-timeslot
+   Usage: required
+   Value type: 
+   Definition : time slot for TDM operation. Indicates which time slots
+used for transmitting and receiving.
+
+- fsl,tdm-framer-type
+   Usage: required
+   Value type: 
+   Definition : "e1" or "t1"
+
+- fsl,tdm-mode
+   Usage: required
+   Value type: 
+   Definition : "normal" or "internal-loopback"
+
+- fsl,tdm-id
+   Usage: required
+   Value type: 
+   Definition : number of TDM ID
+
+- fsl,siram-entry-id
+   Usage: required
+   Value type: 
+   Definition : should be 0,2,4...64. the number of TDM entry.
+
+- fsl,tdm-interface
+   Usage: optional
+   Value type: 
+   Definition : Specify that hdlc is based on tdm-interface
+
+Example:
+
+   ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot = <0xfffe>;
+   fsl,rx-timeslot = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-mode = "normal";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   fsl,tdm-interface;
+   };
+fsl,siram-entry-id : SI RAM entry ID for the TDM
+fsl,tdm-interface : hdlc is based on tdm-interface
+
+Example:
+
+   ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot = <0xfffe>;
+   fsl,rx-timeslot = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-mode = "normal";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   fsl,tdm-interface;
+   };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v2 1/7] QE: Add IC, SI and SIRAM document to device tree bindings.

[Zhao Qiang]

Add IC, SI and SIRAM document of QE to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt

Signed-off-by: Zhao Qiang 
---
Changes for v2
- Add interrupt-controller in Required properties
- delete address-cells and size-cells for qe-si and qe-siram

 .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt  | 50 ++
 1 file changed, 50 insertions(+)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt 
b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
index 4f89302..84052a7 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
@@ -69,6 +69,56 @@ Example:
};
  };
 
+* Interrupt Controller (IC)
+
+Required properties:
+- compatible : should be "fsl,qe-ic".
+- reg : Address range of IC register set.
+- interrupts : interrupts generated by the device.
+- interrupt-controller : this device is a interrupt controller.
+
+Example:
+
+   qeic: interrupt-controller@80 {
+   interrupt-controller;
+   compatible = "fsl,qe-ic";
+   #address-cells = <0>;
+   #interrupt-cells = <1>;
+   reg = <0x80 0x80>;
+   interrupts = <95 2 0 0  94 2 0 0>; //high:79 low:78
+   };
+
+* Serial Interface Block (SI)
+
+The SI manages the routing of eight TDM lines to the QE block serial drivers
+, the MCC and the UCCs, for receive and transmit.
+
+Required properties:
+- compatible : should be "fsl,qe-si".
+- reg : Address range of SI register set.
+
+Example:
+
+   si1: si@700 {
+   compatible = "fsl,qe-si";
+   reg = <0x700 0x80>;
+   };
+
+* Serial Interface Block RAM(SIRAM)
+
+store the routing entries of SI
+
+Required properties:
+- compatible : should be "fsl,qe-siram".
+- reg : Address range of SI RAM.
+
+Example:
+
+   siram1: siram@1000 {
+   compatible = "fsl,qe-siram";
+   reg = <0x1000 0x800>;
+   };
+
 * QE Firmware Node
 
 This node defines a firmware binary that is embedded in the device tree, for
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v2 5/7] T104xD4RDB: Add qe node to t104xd4rdb

[Zhao Qiang]

add qe node to t104xd4rdb.dtsi and t1040si-post.dtsi.

Signed-off-by: Zhao Qiang 
---
Changes for v2
- rebase

 arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 45 +
 arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi   | 40 +
 2 files changed, 85 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi 
b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index e0f4da5..012f813 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -673,3 +673,48 @@
};
};
 };
+
+&qe {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   device_type = "qe";
+   compatible = "fsl,qe";
+   fsl,qe-num-riscs = <1>;
+   fsl,qe-num-snums = <28>;
+
+   qeic: interrupt-controller@80 {
+   interrupt-controller;
+   compatible = "fsl,qe-ic";
+   #address-cells = <0>;
+   #interrupt-cells = <1>;
+   reg = <0x80 0x80>;
+   interrupts = <95 2 0 0  94 2 0 0>; //high:79 low:78
+   };
+
+   ucc@2000 {
+   cell-index = <1>;
+   reg = <0x2000 0x200>;
+   interrupts = <32>;
+   interrupt-parent = <&qeic>;
+   };
+
+   ucc@2200 {
+   cell-index = <3>;
+   reg = <0x2200 0x200>;
+   interrupts = <34>;
+   interrupt-parent = <&qeic>;
+   };
+
+   muram@1 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "fsl,qe-muram", "fsl,cpm-muram";
+   ranges = <0x0 0x1 0x6000>;
+
+   data-only@0 {
+   compatible = "fsl,qe-muram-data",
+   "fsl,cpm-muram-data";
+   reg = <0x0 0x6000>;
+   };
+   };
+};
diff --git a/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi 
b/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
index 3f6d7c6..2e24322 100644
--- a/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
@@ -212,4 +212,44 @@
  0 0x0001>;
};
};
+
+   qe: qe@ffe14 {
+   ranges = <0x0 0xf 0xfe14 0x4>;
+   reg = <0xf 0xfe14 0 0x480>;
+   brg-frequency = <0>;
+   bus-frequency = <0>;
+
+   si1: si@700 {
+   compatible = "fsl,qe-si";
+   reg = <0x700 0x80>;
+   };
+
+   siram1: siram@1000 {
+   compatible = "fsl,qe-siram";
+   reg = <0x1000 0x800>;
+   };
+
+   ucc_hdlc: ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot = <0xfffe>;
+   fsl,rx-timeslot = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-mode = "normal";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   fsl,tdm-interface;
+   };
+
+   ucc_serial: ucc@2200 {
+   device_type = "serial";
+   compatible = "ucc_uart";
+   port-number = <1>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
+   };
 };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v2 7/7] T104xQDS: Add qe node to t104xqds

[Zhao Qiang]

add qe node to t104xqds.dtsi

Signed-off-by: Zhao Qiang 
---
Changes for v2
- rebase

 arch/powerpc/boot/dts/fsl/t104xqds.dtsi | 40 +
 1 file changed, 40 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/t104xqds.dtsi 
b/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
index 1498d1e..1a8e60d 100644
--- a/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
@@ -190,4 +190,44 @@
  0 0x0001>;
};
};
+
+   qe: qe@ffe14 {
+   ranges = <0x0 0xf 0xfe14 0x4>;
+   reg = <0xf 0xfe14 0 0x480>;
+   brg-frequency = <0>;
+   bus-frequency = <0>;
+
+   si1: si@700 {
+   compatible = "fsl,qe-si";
+   reg = <0x700 0x80>;
+   };
+
+   siram1: siram@1000 {
+   compatible = "fsl,qe-siram";
+   reg = <0x1000 0x800>;
+   };
+
+   ucc_hdlc: ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot = <0xfffe>;
+   fsl,rx-timeslot = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-mode = "normal";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   fsl,tdm-interface;
+   };
+
+   ucc_serial: ucc@2200 {
+   device_type = "serial";
+   compatible = "ucc_uart";
+   port-number = <1>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
+   };
 };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v3 1/7] QE: Add IC, SI and SIRAM document to device tree bindings.

[Zhao Qiang]

Add IC, SI and SIRAM document of QE to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt

Signed-off-by: Zhao Qiang 
---
Changes for v2
- Add interrupt-controller in Required properties
- delete address-cells and size-cells for qe-si and qe-siram
Changes for v3
- Add SoC specific caompatible strings to qe-si and qe-siram

 .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt  | 50 ++
 1 file changed, 50 insertions(+)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt 
b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
index 4f89302..7ab21cb 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
@@ -69,6 +69,56 @@ Example:
};
  };
 
+* Interrupt Controller (IC)
+
+Required properties:
+- compatible : should be "fsl,qe-ic".
+- reg : Address range of IC register set.
+- interrupts : interrupts generated by the device.
+- interrupt-controller : this device is a interrupt controller.
+
+Example:
+
+   qeic: interrupt-controller@80 {
+   interrupt-controller;
+   compatible = "fsl,qe-ic";
+   #address-cells = <0>;
+   #interrupt-cells = <1>;
+   reg = <0x80 0x80>;
+   interrupts = <95 2 0 0  94 2 0 0>; //high:79 low:78
+   };
+
+* Serial Interface Block (SI)
+
+The SI manages the routing of eight TDM lines to the QE block serial drivers
+, the MCC and the UCCs, for receive and transmit.
+
+Required properties:
+- compatible : should be "fsl,t1040-qe-si".
+- reg : Address range of SI register set.
+
+Example:
+
+   si1: si@700 {
+   compatible = "fsl,t1040-qe-si";
+   reg = <0x700 0x80>;
+   };
+
+* Serial Interface Block RAM(SIRAM)
+
+store the routing entries of SI
+
+Required properties:
+- compatible : should be "fsl,t1040-qe-siram".
+- reg : Address range of SI RAM.
+
+Example:
+
+   siram1: siram@1000 {
+   compatible = "fsl,t1040-qe-siram";
+   reg = <0x1000 0x800>;
+   };
+
 * QE Firmware Node
 
 This node defines a firmware binary that is embedded in the device tree, for
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v3 2/7] QE: Add ucc hdlc document to bindings

[Zhao Qiang]

Add ucc hdlc document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt

Signed-off-by: Zhao Qiang 
---
Changes for v2
- use ucc-hdlc instead of ucc_hdlc
- add more information to properties.
Changes for v3
- use fsl,tx-timeslot-mask instead of fsl,tx-timeslot 
- use fsl,rx-timeslot-mask instead of fsl,rx-timeslot 
- add more info

 .../bindings/powerpc/fsl/cpm_qe/network.txt| 81 ++
 1 file changed, 81 insertions(+)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt 
b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
index 29b28b8..03c7416 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
@@ -41,3 +41,84 @@ Example:
fsl,mdio-pin = <12>;
fsl,mdc-pin = <13>;
};
+
+* HDLC
+
+Currently defined compatibles:
+- fsl,ucc-hdlc
+
+Properties for fsl,ucc-hdlc:
+- rx-clock-name
+- tx-clock-name
+   Usage: required
+   Value type: 
+   Definition : Must be "brg1"-"brg16" for internal clock source,
+Must be "clk1"-"clk24" for external clock source.
+
+- fsl,tdm-interface
+   Usage: optional
+   Value type: 
+   Definition : Specify that hdlc is based on tdm-interface
+
+The property below is dependent on fsl,tdm-interface:
+- fsl,rx-sync-clock
+   Usage: required
+   Value type: 
+   Definition : Must be "none", "rsync_pin", "brg9-11" and "brg13-15".
+
+- fsl,tx-sync-clock
+   Usage: required
+   Value type: 
+   Definition : Must be "none", "tsync_pin", "brg9-11" and "brg13-15".
+
+- fsl,tdm-framer-type
+   Usage: required for tdm interface
+   Value type: 
+   Definition : "e1" or "t1".Now e1 and t1 are used, other framer types
+are not supported.
+
+- fsl,tdm-id
+   Usage: required for tdm interface
+   Value type: 
+   Definition : number of TDM ID
+
+- fsl,tx-timeslot-mask
+- fsl,rx-timeslot-mask
+   Usage: required for tdm interface
+   Value type: 
+   Definition : time slot mask for TDM operation. Indicates which time
+slots used for transmitting and receiving.
+
+- fsl,siram-entry-id
+   Usage: required for tdm interface
+   Value type: 
+   Definition : Must be 0,2,4...64. the number of TDM entry.
+
+- fsl,tdm-internal-loopback
+   usage: optional for tdm interface
+   value type: 
+   Definition : Internal loopback connecting on TDM layer.
+
+Example for tdm interface:
+
+   ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot-mask = <0xfffe>;
+   fsl,rx-timeslot-mask = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   fsl,tdm-interface;
+   };
+
+Example for hdlc without tdm interface:
+
+   ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "brg1";
+   tx-clock-name = "brg1";
+   };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v3 3/7] QE: Add uqe_serial document to bindings

[Zhao Qiang]

Add uqe_serial document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt

Signed-off-by: Zhao Qiang 
---
Changes for v2
- modify tx/rx-clock-name specification
Changes for v2
- NA 

 .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt| 19 +++
 1 file changed, 19 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt

diff --git 
a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt 
b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
new file mode 100644
index 000..436c71c
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
@@ -0,0 +1,19 @@
+* Serial
+
+Currently defined compatibles:
+- ucc_uart
+
+Properties for ucc_uart:
+port-number : port number of UCC-UART
+tx/rx-clock-name : should be "brg1"-"brg16" for internal clock source,
+  should be "clk1"-"clk28" for external clock source.
+
+Example:
+
+   ucc_serial: ucc@2200 {
+   device_type = "serial";
+   compatible = "ucc_uart";
+   port-number = <1>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v3 6/7] T104xRDB: Add qe node to t104xrdb

[Zhao Qiang]

add qe node to t104xrdb.dtsi

Signed-off-by: Zhao Qiang 
---
Changes for v2
- rebase
Changes for v3
- rebase

 arch/powerpc/boot/dts/fsl/t104xrdb.dtsi | 39 +
 1 file changed, 39 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi 
b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
index 830ea48..79d923e 100644
--- a/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
@@ -186,4 +186,43 @@
  0 0x0001>;
};
};
+
+   qe: qe@ffe14 {
+   ranges = <0x0 0xf 0xfe14 0x4>;
+   reg = <0xf 0xfe14 0 0x480>;
+   brg-frequency = <0>;
+   bus-frequency = <0>;
+
+   si1: si@700 {
+   compatible = "fsl,t1040-qe-si";
+   reg = <0x700 0x80>;
+   };
+
+   siram1: siram@1000 {
+   compatible = "fsl,t1040-qe-siram";
+   reg = <0x1000 0x800>;
+   };
+
+   ucc_hdlc: ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot-mask = <0xfffe>;
+   fsl,rx-timeslot-mask = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   fsl,tdm-interface;
+   };
+
+   ucc_serial: ucc@2200 {
+   device_type = "serial";
+   compatible = "ucc_uart";
+   port-number = <1>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
+   };
 };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v3 5/7] T104xD4RDB: Add qe node to t104xd4rdb

[Zhao Qiang]

add qe node to t104xd4rdb.dtsi and t1040si-post.dtsi.

Signed-off-by: Zhao Qiang 
---
Changes for v2
- rebase
Changes for v3
- rebase

 arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 45 +
 arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi   | 39 +
 2 files changed, 84 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi 
b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index e0f4da5..012f813 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -673,3 +673,48 @@
};
};
 };
+
+&qe {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   device_type = "qe";
+   compatible = "fsl,qe";
+   fsl,qe-num-riscs = <1>;
+   fsl,qe-num-snums = <28>;
+
+   qeic: interrupt-controller@80 {
+   interrupt-controller;
+   compatible = "fsl,qe-ic";
+   #address-cells = <0>;
+   #interrupt-cells = <1>;
+   reg = <0x80 0x80>;
+   interrupts = <95 2 0 0  94 2 0 0>; //high:79 low:78
+   };
+
+   ucc@2000 {
+   cell-index = <1>;
+   reg = <0x2000 0x200>;
+   interrupts = <32>;
+   interrupt-parent = <&qeic>;
+   };
+
+   ucc@2200 {
+   cell-index = <3>;
+   reg = <0x2200 0x200>;
+   interrupts = <34>;
+   interrupt-parent = <&qeic>;
+   };
+
+   muram@1 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "fsl,qe-muram", "fsl,cpm-muram";
+   ranges = <0x0 0x1 0x6000>;
+
+   data-only@0 {
+   compatible = "fsl,qe-muram-data",
+   "fsl,cpm-muram-data";
+   reg = <0x0 0x6000>;
+   };
+   };
+};
diff --git a/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi 
b/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
index 3f6d7c6..d9e89d5 100644
--- a/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
@@ -212,4 +212,43 @@
  0 0x0001>;
};
};
+
+   qe: qe@ffe14 {
+   ranges = <0x0 0xf 0xfe14 0x4>;
+   reg = <0xf 0xfe14 0 0x480>;
+   brg-frequency = <0>;
+   bus-frequency = <0>;
+
+   si1: si@700 {
+   compatible = "fsl,t1040-qe-si";
+   reg = <0x700 0x80>;
+   };
+
+   siram1: siram@1000 {
+   compatible = "fsl,t1040-qe-siram";
+   reg = <0x1000 0x800>;
+   };
+
+   ucc_hdlc: ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot-mask = <0xfffe>;
+   fsl,rx-timeslot-mask = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   fsl,tdm-interface;
+   };
+
+   ucc_serial: ucc@2200 {
+   device_type = "serial";
+   compatible = "ucc_uart";
+   port-number = <1>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
+   };
 };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v3 7/7] T104xQDS: Add qe node to t104xqds

[Zhao Qiang]

add qe node to t104xqds.dtsi

Signed-off-by: Zhao Qiang 
---
Changes for v2
- rebase
Changes for v3
- rebase

 arch/powerpc/boot/dts/fsl/t104xqds.dtsi | 39 +
 1 file changed, 39 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/t104xqds.dtsi 
b/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
index 1498d1e..ab5f081 100644
--- a/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
@@ -190,4 +190,43 @@
  0 0x0001>;
};
};
+
+   qe: qe@ffe14 {
+   ranges = <0x0 0xf 0xfe14 0x4>;
+   reg = <0xf 0xfe14 0 0x480>;
+   brg-frequency = <0>;
+   bus-frequency = <0>;
+
+   si1: si@700 {
+   compatible = "fsl,t1040-qe-si";
+   reg = <0x700 0x80>;
+   };
+
+   siram1: siram@1000 {
+   compatible = "fsl,t1040-qe-siram";
+   reg = <0x1000 0x800>;
+   };
+
+   ucc_hdlc: ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot-mask = <0xfffe>;
+   fsl,rx-timeslot-mask = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   fsl,tdm-interface;
+   };
+
+   ucc_serial: ucc@2200 {
+   device_type = "serial";
+   compatible = "ucc_uart";
+   port-number = <1>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
+   };
 };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v3 4/7] bindings: move cpm_qe binding from powerpc/fsl to soc/fsl

[Zhao Qiang]

cpm_qe is supported on both powerpc and arm.
and the QE code has been moved from arch/powerpc into
drivers/soc/fsl, so move cpm_qe binding from powerpc/fsl
to soc/fsl

Signed-off-by: Zhao Qiang 
---
Changes for v3
- NA

 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/brg.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/i2c.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/pic.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/usb.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/gpio.txt| 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/network.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe.txt  | 0
 .../devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/firmware.txt   | 0
 .../devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/par_io.txt | 0
 .../devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/pincfg.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/ucc.txt  | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/usb.txt  | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/serial.txt  | 0
 .../devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/uqe_serial.txt| 0
 15 files changed, 0 insertions(+), 0 deletions(-)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm.txt 
(100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/cpm/brg.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/cpm/i2c.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/cpm/pic.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/cpm/usb.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/gpio.txt 
(100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/network.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe.txt 
(100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/qe/firmware.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/qe/par_io.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/qe/pincfg.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/qe/ucc.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/qe/usb.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/serial.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/uqe_serial.txt (100%)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/brg.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/brg.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/brg.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/brg.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/i2c.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/i2c.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/i2c.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/i2c.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/pic.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/pic.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/pic.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/pic.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/usb.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/usb.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/usb.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/usb.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/gpio.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/gpio.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/gpio.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/gpio.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
rename 

[PATCH v4 1/8] QE: Add IC, SI and SIRAM document to device tree bindings.

[Zhao Qiang]

Add IC, SI and SIRAM document of QE to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt

Signed-off-by: Zhao Qiang 
Acked-by: Rob Herring 
---
changes for v2
- Add interrupt-controller in Required properties
- delete address-cells and size-cells for qe-si and qe-siram
Changes for v3
- Add SoC specific caompatible strings to qe-si and qe-siram
Changes for v4
- NA 

 .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt  | 50 ++
 1 file changed, 50 insertions(+)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt 
b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
index 4f89302..7ab21cb 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
@@ -69,6 +69,56 @@ Example:
};
  };
 
+* Interrupt Controller (IC)
+
+Required properties:
+- compatible : should be "fsl,qe-ic".
+- reg : Address range of IC register set.
+- interrupts : interrupts generated by the device.
+- interrupt-controller : this device is a interrupt controller.
+
+Example:
+
+   qeic: interrupt-controller@80 {
+   interrupt-controller;
+   compatible = "fsl,qe-ic";
+   #address-cells = <0>;
+   #interrupt-cells = <1>;
+   reg = <0x80 0x80>;
+   interrupts = <95 2 0 0  94 2 0 0>; //high:79 low:78
+   };
+
+* Serial Interface Block (SI)
+
+The SI manages the routing of eight TDM lines to the QE block serial drivers
+, the MCC and the UCCs, for receive and transmit.
+
+Required properties:
+- compatible : should be "fsl,t1040-qe-si".
+- reg : Address range of SI register set.
+
+Example:
+
+   si1: si@700 {
+   compatible = "fsl,t1040-qe-si";
+   reg = <0x700 0x80>;
+   };
+
+* Serial Interface Block RAM(SIRAM)
+
+store the routing entries of SI
+
+Required properties:
+- compatible : should be "fsl,t1040-qe-siram".
+- reg : Address range of SI RAM.
+
+Example:
+
+   siram1: siram@1000 {
+   compatible = "fsl,t1040-qe-siram";
+   reg = <0x1000 0x800>;
+   };
+
 * QE Firmware Node
 
 This node defines a firmware binary that is embedded in the device tree, for
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v4 2/8] QE: Add ucc hdlc document to bindings

[Zhao Qiang]

Add ucc hdlc document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt

Signed-off-by: Zhao Qiang 
Acked-by: Rob Herring 
---
Changes for v2
- use ucc-hdlc instead of ucc_hdlc
- add more information to properties.
Changes for v3
- use fsl,tx-timeslot-mask instead of fsl,tx-timeslot 
- use fsl,rx-timeslot-mask instead of fsl,rx-timeslot 
- add more info
Changes for v4
- NA 

 .../bindings/powerpc/fsl/cpm_qe/network.txt| 81 ++
 1 file changed, 81 insertions(+)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt 
b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
index 29b28b8..03c7416 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
@@ -41,3 +41,84 @@ Example:
fsl,mdio-pin = <12>;
fsl,mdc-pin = <13>;
};
+
+* HDLC
+
+Currently defined compatibles:
+- fsl,ucc-hdlc
+
+Properties for fsl,ucc-hdlc:
+- rx-clock-name
+- tx-clock-name
+   Usage: required
+   Value type: 
+   Definition : Must be "brg1"-"brg16" for internal clock source,
+Must be "clk1"-"clk24" for external clock source.
+
+- fsl,tdm-interface
+   Usage: optional
+   Value type: 
+   Definition : Specify that hdlc is based on tdm-interface
+
+The property below is dependent on fsl,tdm-interface:
+- fsl,rx-sync-clock
+   Usage: required
+   Value type: 
+   Definition : Must be "none", "rsync_pin", "brg9-11" and "brg13-15".
+
+- fsl,tx-sync-clock
+   Usage: required
+   Value type: 
+   Definition : Must be "none", "tsync_pin", "brg9-11" and "brg13-15".
+
+- fsl,tdm-framer-type
+   Usage: required for tdm interface
+   Value type: 
+   Definition : "e1" or "t1".Now e1 and t1 are used, other framer types
+are not supported.
+
+- fsl,tdm-id
+   Usage: required for tdm interface
+   Value type: 
+   Definition : number of TDM ID
+
+- fsl,tx-timeslot-mask
+- fsl,rx-timeslot-mask
+   Usage: required for tdm interface
+   Value type: 
+   Definition : time slot mask for TDM operation. Indicates which time
+slots used for transmitting and receiving.
+
+- fsl,siram-entry-id
+   Usage: required for tdm interface
+   Value type: 
+   Definition : Must be 0,2,4...64. the number of TDM entry.
+
+- fsl,tdm-internal-loopback
+   usage: optional for tdm interface
+   value type: 
+   Definition : Internal loopback connecting on TDM layer.
+
+Example for tdm interface:
+
+   ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot-mask = <0xfffe>;
+   fsl,rx-timeslot-mask = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   fsl,tdm-interface;
+   };
+
+Example for hdlc without tdm interface:
+
+   ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "brg1";
+   tx-clock-name = "brg1";
+   };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v4 3/8] QE: Add uqe_serial document to bindings

[Zhao Qiang]

Add uqe_serial document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt

Signed-off-by: Zhao Qiang 
---
Changes for v2
- modify tx/rx-clock-name specification
Changes for v3
- NA 
Changes for v4
- drop device_type
- modify to SoC specific compatible 

 .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 18 ++
 1 file changed, 18 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt

diff --git 
a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt 
b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
new file mode 100644
index 000..c2de8ba
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
@@ -0,0 +1,18 @@
+* Serial
+
+Currently defined compatibles:
+- t1040-ucc-uart
+
+Properties for t1040-ucc-uart:
+port-number : port number of UCC-UART
+tx/rx-clock-name : should be "brg1"-"brg16" for internal clock source,
+  should be "clk1"-"clk28" for external clock source.
+
+Example:
+
+   ucc_serial: ucc@2200 {
+   compatible = "t1040-ucc-uart";
+   port-number = <0>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v4 4/8] bindings: move cpm_qe binding from powerpc/fsl to soc/fsl

[Zhao Qiang]

cpm_qe is supported on both powerpc and arm.
and the QE code has been moved from arch/powerpc into
drivers/soc/fsl, so move cpm_qe binding from powerpc/fsl
to soc/fsl

Signed-off-by: Zhao Qiang 
Acked-by: Rob Herring
---
Changes for v3
- NA
Changes for v4
- NA

 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/brg.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/i2c.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/pic.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/usb.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/gpio.txt| 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/network.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe.txt  | 0
 .../devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/firmware.txt   | 0
 .../devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/par_io.txt | 0
 .../devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/pincfg.txt | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/ucc.txt  | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/usb.txt  | 0
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/serial.txt  | 0
 .../devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/uqe_serial.txt| 0
 15 files changed, 0 insertions(+), 0 deletions(-)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm.txt 
(100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/cpm/brg.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/cpm/i2c.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/cpm/pic.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/cpm/usb.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/gpio.txt 
(100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/network.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe.txt 
(100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/qe/firmware.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/qe/par_io.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/qe/pincfg.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/qe/ucc.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/qe/usb.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/serial.txt (100%)
 rename Documentation/devicetree/bindings/{powerpc => 
soc}/fsl/cpm_qe/uqe_serial.txt (100%)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/brg.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/brg.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/brg.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/brg.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/i2c.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/i2c.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/i2c.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/i2c.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/pic.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/pic.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/pic.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/pic.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/usb.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/usb.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/usb.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/usb.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/gpio.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/gpio.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/gpio.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/gpio.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
similarity index 100%
rename from Documentation/devicetree/b

[PATCH v4 5/8] T104xD4RDB: Add qe node to t104xd4rdb

[Zhao Qiang]

add qe node to t104xd4rdb.dtsi and t1040si-post.dtsi.

Signed-off-by: Zhao Qiang 
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase

 arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 45 +
 arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi   | 38 
 2 files changed, 83 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi 
b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index e0f4da5..012f813 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -673,3 +673,48 @@
};
};
 };
+
+&qe {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   device_type = "qe";
+   compatible = "fsl,qe";
+   fsl,qe-num-riscs = <1>;
+   fsl,qe-num-snums = <28>;
+
+   qeic: interrupt-controller@80 {
+   interrupt-controller;
+   compatible = "fsl,qe-ic";
+   #address-cells = <0>;
+   #interrupt-cells = <1>;
+   reg = <0x80 0x80>;
+   interrupts = <95 2 0 0  94 2 0 0>; //high:79 low:78
+   };
+
+   ucc@2000 {
+   cell-index = <1>;
+   reg = <0x2000 0x200>;
+   interrupts = <32>;
+   interrupt-parent = <&qeic>;
+   };
+
+   ucc@2200 {
+   cell-index = <3>;
+   reg = <0x2200 0x200>;
+   interrupts = <34>;
+   interrupt-parent = <&qeic>;
+   };
+
+   muram@1 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "fsl,qe-muram", "fsl,cpm-muram";
+   ranges = <0x0 0x1 0x6000>;
+
+   data-only@0 {
+   compatible = "fsl,qe-muram-data",
+   "fsl,cpm-muram-data";
+   reg = <0x0 0x6000>;
+   };
+   };
+};
diff --git a/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi 
b/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
index 3f6d7c6..41ed3a6 100644
--- a/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
@@ -212,4 +212,42 @@
  0 0x0001>;
};
};
+
+   qe: qe@ffe14 {
+   ranges = <0x0 0xf 0xfe14 0x4>;
+   reg = <0xf 0xfe14 0 0x480>;
+   brg-frequency = <0>;
+   bus-frequency = <0>;
+
+   si1: si@700 {
+   compatible = "fsl,t1040-qe-si";
+   reg = <0x700 0x80>;
+   };
+
+   siram1: siram@1000 {
+   compatible = "fsl,t1040-qe-siram";
+   reg = <0x1000 0x800>;
+   };
+
+   ucc_hdlc: ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot-mask = <0xfffe>;
+   fsl,rx-timeslot-mask = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   fsl,tdm-interface;
+   };
+
+   ucc_serial: ucc@2200 {
+   compatible = "t1040-ucc-uart";
+   port-number = <0>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
+   };
 };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v4 6/8] T104xRDB: Add qe node to t104xrdb

[Zhao Qiang]

add qe node to t104xrdb.dtsi

Signed-off-by: Zhao Qiang 
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase

 arch/powerpc/boot/dts/fsl/t104xrdb.dtsi | 38 +
 1 file changed, 38 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi 
b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
index 830ea48..dd7fc2b 100644
--- a/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
@@ -186,4 +186,42 @@
  0 0x0001>;
};
};
+
+   qe: qe@ffe14 {
+   ranges = <0x0 0xf 0xfe14 0x4>;
+   reg = <0xf 0xfe14 0 0x480>;
+   brg-frequency = <0>;
+   bus-frequency = <0>;
+
+   si1: si@700 {
+   compatible = "fsl,t1040-qe-si";
+   reg = <0x700 0x80>;
+   };
+
+   siram1: siram@1000 {
+   compatible = "fsl,t1040-qe-siram";
+   reg = <0x1000 0x800>;
+   };
+
+   ucc_hdlc: ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot-mask = <0xfffe>;
+   fsl,rx-timeslot-mask = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   fsl,tdm-interface;
+   };
+
+   ucc_serial: ucc@2200 {
+   compatible = "t1040-ucc-uart";
+   port-number = <0>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
+   };
 };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v4 7/8] T104xQDS: Add qe node to t104xqds

[Zhao Qiang]

add qe node to t104xqds.dtsi

Signed-off-by: Zhao Qiang 
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase

 arch/powerpc/boot/dts/fsl/t104xqds.dtsi | 38 +
 1 file changed, 38 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/t104xqds.dtsi 
b/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
index 1498d1e..8e72041 100644
--- a/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
@@ -190,4 +190,42 @@
  0 0x0001>;
};
};
+
+   qe: qe@ffe14 {
+   ranges = <0x0 0xf 0xfe14 0x4>;
+   reg = <0xf 0xfe14 0 0x480>;
+   brg-frequency = <0>;
+   bus-frequency = <0>;
+
+   si1: si@700 {
+   compatible = "fsl,t1040-qe-si";
+   reg = <0x700 0x80>;
+   };
+
+   siram1: siram@1000 {
+   compatible = "fsl,t1040-qe-siram";
+   reg = <0x1000 0x800>;
+   };
+
+   ucc_hdlc: ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot-mask = <0xfffe>;
+   fsl,rx-timeslot-mask = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   fsl,tdm-interface;
+   };
+
+   ucc_serial: ucc@2200 {
+   compatible = "t1040-ucc-uart";
+   port-number = <0>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
+   };
 };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v4 8/8] QE-UART: modify of_device_id for qe-uart driver

[Zhao Qiang]

Drop device type and modify compatible to SoC specific compatible.

Signed-off-by: Zhao Qiang 
---
 drivers/tty/serial/ucc_uart.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/tty/serial/ucc_uart.c b/drivers/tty/serial/ucc_uart.c
index 1a7dc3c..ff6c1ab 100644
--- a/drivers/tty/serial/ucc_uart.c
+++ b/drivers/tty/serial/ucc_uart.c
@@ -1475,8 +1475,7 @@ static int ucc_uart_remove(struct platform_device *ofdev)
 
 static const struct of_device_id ucc_uart_match[] = {
{
-   .type = "serial",
-   .compatible = "ucc_uart",
+   .compatible = "t1040-ucc-uart",
},
{},
 };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v5 3/7] QE: Add uqe_serial document to bindings

[Zhao Qiang]

Add uqe_serial document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt

Signed-off-by: Zhao Qiang 
---
Changes for v2
- modify tx/rx-clock-name specification
Changes for v3
- NA 
Changes for v4
- drop device_type
- modify to SoC specific compatible 
Changes for v5
- add fsl to compatible as prefix 

 .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 18 ++
 1 file changed, 18 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt

diff --git 
a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt 
b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
new file mode 100644
index 000..5dc3089
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
@@ -0,0 +1,18 @@
+* Serial
+
+Currently defined compatibles:
+- fsl,t1040-ucc-uart
+
+Properties for fsl,t1040-ucc-uart:
+port-number : port number of UCC-UART
+tx/rx-clock-name : should be "brg1"-"brg16" for internal clock source,
+  should be "clk1"-"clk28" for external clock source.
+
+Example:
+
+   ucc_serial: ucc@2200 {
+   compatible = "fsl,t1040-ucc-uart";
+   port-number = <0>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v5 6/7] T104xRDB: Add qe node to t104xrdb

[Zhao Qiang]

add qe node to t104xrdb.dtsi

Signed-off-by: Zhao Qiang 
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase
Changes for v5
- rebase

 arch/powerpc/boot/dts/fsl/t104xrdb.dtsi | 38 +
 1 file changed, 38 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi 
b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
index 830ea48..69d5057 100644
--- a/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
@@ -186,4 +186,42 @@
  0 0x0001>;
};
};
+
+   qe: qe@ffe14 {
+   ranges = <0x0 0xf 0xfe14 0x4>;
+   reg = <0xf 0xfe14 0 0x480>;
+   brg-frequency = <0>;
+   bus-frequency = <0>;
+
+   si1: si@700 {
+   compatible = "fsl,t1040-qe-si";
+   reg = <0x700 0x80>;
+   };
+
+   siram1: siram@1000 {
+   compatible = "fsl,t1040-qe-siram";
+   reg = <0x1000 0x800>;
+   };
+
+   ucc_hdlc: ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot-mask = <0xfffe>;
+   fsl,rx-timeslot-mask = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   fsl,tdm-interface;
+   };
+
+   ucc_serial: ucc@2200 {
+   compatible = "fsl,t1040-ucc-uart";
+   port-number = <0>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
+   };
 };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v5 2/7] QE: Add ucc hdlc document to bindings

[Zhao Qiang]

Add ucc hdlc document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt

Signed-off-by: Zhao Qiang 
Acked-by: Rob Herring 
---
Changes for v2
- use ucc-hdlc instead of ucc_hdlc
- add more information to properties.
Changes for v3
- use fsl,tx-timeslot-mask instead of fsl,tx-timeslot 
- use fsl,rx-timeslot-mask instead of fsl,rx-timeslot 
- add more info
Changes for v4
- NA 
Changes for v5
- NA 

 .../bindings/powerpc/fsl/cpm_qe/network.txt| 81 ++
 1 file changed, 81 insertions(+)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt 
b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
index 29b28b8..03c7416 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
@@ -41,3 +41,84 @@ Example:
fsl,mdio-pin = <12>;
fsl,mdc-pin = <13>;
};
+
+* HDLC
+
+Currently defined compatibles:
+- fsl,ucc-hdlc
+
+Properties for fsl,ucc-hdlc:
+- rx-clock-name
+- tx-clock-name
+   Usage: required
+   Value type: 
+   Definition : Must be "brg1"-"brg16" for internal clock source,
+Must be "clk1"-"clk24" for external clock source.
+
+- fsl,tdm-interface
+   Usage: optional
+   Value type: 
+   Definition : Specify that hdlc is based on tdm-interface
+
+The property below is dependent on fsl,tdm-interface:
+- fsl,rx-sync-clock
+   Usage: required
+   Value type: 
+   Definition : Must be "none", "rsync_pin", "brg9-11" and "brg13-15".
+
+- fsl,tx-sync-clock
+   Usage: required
+   Value type: 
+   Definition : Must be "none", "tsync_pin", "brg9-11" and "brg13-15".
+
+- fsl,tdm-framer-type
+   Usage: required for tdm interface
+   Value type: 
+   Definition : "e1" or "t1".Now e1 and t1 are used, other framer types
+are not supported.
+
+- fsl,tdm-id
+   Usage: required for tdm interface
+   Value type: 
+   Definition : number of TDM ID
+
+- fsl,tx-timeslot-mask
+- fsl,rx-timeslot-mask
+   Usage: required for tdm interface
+   Value type: 
+   Definition : time slot mask for TDM operation. Indicates which time
+slots used for transmitting and receiving.
+
+- fsl,siram-entry-id
+   Usage: required for tdm interface
+   Value type: 
+   Definition : Must be 0,2,4...64. the number of TDM entry.
+
+- fsl,tdm-internal-loopback
+   usage: optional for tdm interface
+   value type: 
+   Definition : Internal loopback connecting on TDM layer.
+
+Example for tdm interface:
+
+   ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot-mask = <0xfffe>;
+   fsl,rx-timeslot-mask = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   fsl,tdm-interface;
+   };
+
+Example for hdlc without tdm interface:
+
+   ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "brg1";
+   tx-clock-name = "brg1";
+   };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH v5 5/7] T104xD4RDB: Add qe node to t104xd4rdb

[Zhao Qiang]

add qe node to t104xd4rdb.dtsi and t1040si-post.dtsi.

Signed-off-by: Zhao Qiang 
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase
Changes for v5
- rebase

 arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 45 +
 arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi   | 38 
 2 files changed, 83 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi 
b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index e0f4da5..012f813 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -673,3 +673,48 @@
};
};
 };
+
+&qe {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   device_type = "qe";
+   compatible = "fsl,qe";
+   fsl,qe-num-riscs = <1>;
+   fsl,qe-num-snums = <28>;
+
+   qeic: interrupt-controller@80 {
+   interrupt-controller;
+   compatible = "fsl,qe-ic";
+   #address-cells = <0>;
+   #interrupt-cells = <1>;
+   reg = <0x80 0x80>;
+   interrupts = <95 2 0 0  94 2 0 0>; //high:79 low:78
+   };
+
+   ucc@2000 {
+   cell-index = <1>;
+   reg = <0x2000 0x200>;
+   interrupts = <32>;
+   interrupt-parent = <&qeic>;
+   };
+
+   ucc@2200 {
+   cell-index = <3>;
+   reg = <0x2200 0x200>;
+   interrupts = <34>;
+   interrupt-parent = <&qeic>;
+   };
+
+   muram@1 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "fsl,qe-muram", "fsl,cpm-muram";
+   ranges = <0x0 0x1 0x6000>;
+
+   data-only@0 {
+   compatible = "fsl,qe-muram-data",
+   "fsl,cpm-muram-data";
+   reg = <0x0 0x6000>;
+   };
+   };
+};
diff --git a/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi 
b/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
index 3f6d7c6..7cc3596 100644
--- a/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
@@ -212,4 +212,42 @@
  0 0x0001>;
};
};
+
+   qe: qe@ffe14 {
+   ranges = <0x0 0xf 0xfe14 0x4>;
+   reg = <0xf 0xfe14 0 0x480>;
+   brg-frequency = <0>;
+   bus-frequency = <0>;
+
+   si1: si@700 {
+   compatible = "fsl,t1040-qe-si";
+   reg = <0x700 0x80>;
+   };
+
+   siram1: siram@1000 {
+   compatible = "fsl,t1040-qe-siram";
+   reg = <0x1000 0x800>;
+   };
+
+   ucc_hdlc: ucc@2000 {
+   compatible = "fsl,ucc-hdlc";
+   rx-clock-name = "clk8";
+   tx-clock-name = "clk9";
+   fsl,rx-sync-clock = "rsync_pin";
+   fsl,tx-sync-clock = "tsync_pin";
+   fsl,tx-timeslot-mask = <0xfffe>;
+   fsl,rx-timeslot-mask = <0xfffe>;
+   fsl,tdm-framer-type = "e1";
+   fsl,tdm-id = <0>;
+   fsl,siram-entry-id = <0>;
+   fsl,tdm-interface;
+   };
+
+   ucc_serial: ucc@2200 {
+   compatible = "fsl,t1040-ucc-uart";
+   port-number = <0>;
+   rx-clock-name = "brg2";
+   tx-clock-name = "brg2";
+   };
+   };
 };
-- 
2.1.0.27.g96db324

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev