[PATCH 0/2] powernv:stop: Use psscr_val,mask provided by firmware
From: "Gautham R. Shenoy" Hi, In the current implementation, the code for ISA v3.0 stop implementation has a couple of shortcomings. a) The code hand-codes the values for ESL,EC,TR,MTL bits of PSSCR and uses only the RL field from the firmware. While this is not incorrect, since the hand-coded values are legitimate, it is not a very flexible design since the firmware has the capability to communicate these values via the "ibm,cpu-idle-state-psscr" and "ibm,cpu-idle-state-psscr-mask" properties. In case where the firmware provides values for these fields that is different from the hand-coded values, the current code will not work as intended. b) Due to issue a), the current code assumes that ESL=EC=1 for all the stop states and hence the wakeup from the stop instruction will happen at 0x100, the system-reset vector. However, the ISA v3.0 allows the ESL=EC=0 behaviour where the corresponding stop-state loses no state and wakes up from the subsequent instruction. The current code doesn't handle this case. This patch series addresses these issues. The first patch in the series renames the existing IDLE_STATE_ENTER_SEQ macro to IDLE_STATE_ENTER_SEQ_NORET. It reuses the name IDLE_STATE_ENTER_SEQ for entering into stop-states which wake up at the subsequent instruction. The second patch in the series fixes issues a) and b) by ensuring that the psscr-value and the psscr-mask provided by the firmware are what will be used to set a particular stop state. It also adds support for handling wake-up from stop states which were entered with ESL=EC=0. These patches depend on the following skiboot patch that exports the PSSCR values and the mask for all the stop states: https://lists.ozlabs.org/pipermail/skiboot/2016-September/004869.html Gautham R. Shenoy (2): powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro powernv: Pass PSSCR value and mask to power9_idle_stop arch/powerpc/include/asm/cpuidle.h | 5 ++- arch/powerpc/include/asm/processor.h | 3 +- arch/powerpc/kernel/exceptions-64s.S | 6 +-- arch/powerpc/kernel/idle_book3s.S| 41 ++--- arch/powerpc/platforms/powernv/idle.c| 76 +++- arch/powerpc/platforms/powernv/powernv.h | 3 +- arch/powerpc/platforms/powernv/smp.c | 7 +-- drivers/cpuidle/cpuidle-powernv.c| 30 ++--- 8 files changed, 127 insertions(+), 44 deletions(-) -- 1.9.4
[PATCH 1/2] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro
From: "Gautham R. Shenoy" Currently all the low-power idle states are expected to wake up at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ that puts the CPU to an idle state and never returns. On ISA_300, when the ESL and EC bits in the PSSCR are zero, the CPU is expected to wake up at the next instruction of the idle instruction. This patch adds a new macro named IDLE_STATE_ENTER_SEQ_NORET for the no-return variant and reuses the name IDLE_STATE_ENTER_SEQ for a variant that allows resuming operation at the instruction next to the idle-instruction. Signed-off-by: Gautham R. Shenoy --- arch/powerpc/include/asm/cpuidle.h | 5 - arch/powerpc/kernel/exceptions-64s.S | 6 +++--- arch/powerpc/kernel/idle_book3s.S| 10 +- 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/arch/powerpc/include/asm/cpuidle.h b/arch/powerpc/include/asm/cpuidle.h index 01b8a13..9fd23f6 100644 --- a/arch/powerpc/include/asm/cpuidle.h +++ b/arch/powerpc/include/asm/cpuidle.h @@ -21,7 +21,7 @@ extern u64 pnv_first_deep_stop_state; /* Idle state entry routines */ #ifdef CONFIG_PPC_P7_NAP -#defineIDLE_STATE_ENTER_SEQ(IDLE_INST) \ +#define IDLE_STATE_ENTER_SEQ(IDLE_INST) \ /* Magic NAP/SLEEP/WINKLE mode enter sequence */\ std r0,0(r1); \ ptesync;\ @@ -29,6 +29,9 @@ extern u64 pnv_first_deep_stop_state; 1: cmp cr0,r0,r0; \ bne 1b; \ IDLE_INST; \ + +#defineIDLE_STATE_ENTER_SEQ_NORET(IDLE_INST) \ + IDLE_STATE_ENTER_SEQ(IDLE_INST) \ b . #endif /* CONFIG_PPC_P7_NAP */ diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index bffec73..238307d 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -1301,12 +1301,12 @@ machine_check_handle_early: lbz r3,PACA_THREAD_IDLE_STATE(r13) cmpwi r3,PNV_THREAD_NAP bgt 10f - IDLE_STATE_ENTER_SEQ(PPC_NAP) + IDLE_STATE_ENTER_SEQ_NORET(PPC_NAP) /* No return */ 10: cmpwi r3,PNV_THREAD_SLEEP bgt 2f - IDLE_STATE_ENTER_SEQ(PPC_SLEEP) + IDLE_STATE_ENTER_SEQ_NORET(PPC_SLEEP) /* No return */ 2: @@ -1320,7 +1320,7 @@ machine_check_handle_early: */ ori r13,r13,1 SET_PACA(r13) - IDLE_STATE_ENTER_SEQ(PPC_WINKLE) + IDLE_STATE_ENTER_SEQ_NORET(PPC_WINKLE) /* No return */ 4: #endif diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S index bd739fe..32d666b 100644 --- a/arch/powerpc/kernel/idle_book3s.S +++ b/arch/powerpc/kernel/idle_book3s.S @@ -188,7 +188,7 @@ pnv_enter_arch207_idle_mode: stb r3,PACA_THREAD_IDLE_STATE(r13) cmpwi cr3,r3,PNV_THREAD_SLEEP bge cr3,2f - IDLE_STATE_ENTER_SEQ(PPC_NAP) + IDLE_STATE_ENTER_SEQ_NORET(PPC_NAP) /* No return */ 2: /* Sleep or winkle */ @@ -222,7 +222,7 @@ pnv_fastsleep_workaround_at_entry: common_enter: /* common code for all the threads entering sleep or winkle */ bgt cr3,enter_winkle - IDLE_STATE_ENTER_SEQ(PPC_SLEEP) + IDLE_STATE_ENTER_SEQ_NORET(PPC_SLEEP) fastsleep_workaround_at_entry: ori r15,r15,PNV_CORE_IDLE_LOCK_BIT @@ -244,7 +244,7 @@ fastsleep_workaround_at_entry: enter_winkle: bl save_sprs_to_stack - IDLE_STATE_ENTER_SEQ(PPC_WINKLE) + IDLE_STATE_ENTER_SEQ_NORET(PPC_WINKLE) /* * r3 - requested stop state @@ -257,7 +257,7 @@ power_enter_stop: ld r4,ADDROFF(pnv_first_deep_stop_state)(r5) cmpdr3,r4 bge 2f - IDLE_STATE_ENTER_SEQ(PPC_STOP) + IDLE_STATE_ENTER_SEQ_NORET(PPC_STOP) 2: /* * Entering deep idle state. @@ -279,7 +279,7 @@ lwarx_loop_stop: bl save_sprs_to_stack - IDLE_STATE_ENTER_SEQ(PPC_STOP) + IDLE_STATE_ENTER_SEQ_NORET(PPC_STOP) _GLOBAL(power7_idle) /* Now check if user or arch enabled NAP mode */ -- 1.9.4
[PATCH 2/2] powernv: Pass PSSCR value and mask to power9_idle_stop
From: "Gautham R. Shenoy" The power9_idle_stop method currently takes only the requested stop level as a parameter and picks up the rest of the PSSCR bits from a hand-coded macro. This is not a very flexible design, especially when the firmware has the capability to communicate the psscr value and the mask associated with a particular stop state via device tree. This patch modifies the power9_idle_stop API to take as parameters the PSSCR value and the PSSCR mask corresponding to the stop state that needs to be set. These PSSCR value and mask are respectively obtained by parsing the "ibm,cpu-idle-state-psscr" and "ibm,cpu-idle-state-psscr-mask" fields from the device tree. In addition to this, the patch adds support for handling stop states for which ESL and EC bits in the PSSCR are zero. As per the architecture, a wakeup from these stop states resumes execution from the subsequent instruction as opposed to waking up at the System Vector. This patch depends on the following skiboot patch that exports the PSSCR values and the mask for all the stop states: https://lists.ozlabs.org/pipermail/skiboot/2016-September/004869.html Signed-off-by: Gautham R. Shenoy --- arch/powerpc/include/asm/processor.h | 3 +- arch/powerpc/kernel/idle_book3s.S| 31 - arch/powerpc/platforms/powernv/idle.c| 76 +++- arch/powerpc/platforms/powernv/powernv.h | 3 +- arch/powerpc/platforms/powernv/smp.c | 7 +-- drivers/cpuidle/cpuidle-powernv.c| 30 ++--- 6 files changed, 115 insertions(+), 35 deletions(-) diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 68e3bf5..4ead497 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -460,7 +460,8 @@ extern int powersave_nap; /* set if nap mode can be used in idle loop */ extern unsigned long power7_nap(int check_irq); extern unsigned long power7_sleep(void); extern unsigned long power7_winkle(void); -extern unsigned long power9_idle_stop(unsigned long stop_level); +extern unsigned long power9_idle_stop(unsigned long stop_psscr_val, + unsigned long stop_psscr_mask); extern void flush_instruction_cache(void); extern void hard_reset_now(void); diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S index 32d666b..9f77cd4 100644 --- a/arch/powerpc/kernel/idle_book3s.S +++ b/arch/powerpc/kernel/idle_book3s.S @@ -40,9 +40,7 @@ #define _WORC GPR11 #define _PTCR GPR12 -#define PSSCR_HV_TEMPLATE PSSCR_ESL | PSSCR_EC | \ - PSSCR_PSLL_MASK | PSSCR_TR_MASK | \ - PSSCR_MTL_MASK +#define PSSCR_EC_ESL_MASK_SHIFTED (PSSCR_EC | PSSCR_ESL) >> 16 .text @@ -247,13 +245,23 @@ enter_winkle: IDLE_STATE_ENTER_SEQ_NORET(PPC_WINKLE) /* - * r3 - requested stop state + * r3 - PSSCR value corresponding to the requested stop state. */ power_enter_stop: /* + * Check if we are executing the lite variant with ESL=EC=0 + */ + andis. r4, r3, PSSCR_EC_ESL_MASK_SHIFTED + andi.r3, r3, PSSCR_RL_MASK /* r3 = requested stop state */ + cmpdir4, 0 + bne 1f + IDLE_STATE_ENTER_SEQ(PPC_STOP) + li r3,0 /* Since we didn't lose state, return 0 */ + b pnv_wakeup_noloss +/* * Check if the requested state is a deep idle state. */ - LOAD_REG_ADDRBASE(r5,pnv_first_deep_stop_state) +1: LOAD_REG_ADDRBASE(r5,pnv_first_deep_stop_state) ld r4,ADDROFF(pnv_first_deep_stop_state)(r5) cmpdr3,r4 bge 2f @@ -330,16 +338,17 @@ ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 66); \ ld r3,ORIG_GPR3(r1); /* Restore original r3 */ \ 20:nop; - /* - * r3 - requested stop state + * r3 - The PSSCR value corresponding to the stop state. + * r4 - The PSSCR mask corrresonding to the stop state. */ _GLOBAL(power9_idle_stop) - LOAD_REG_IMMEDIATE(r4, PSSCR_HV_TEMPLATE) - or r4,r4,r3 - mtspr SPRN_PSSCR, r4 - li r4, 1 + mfspr r5, SPRN_PSSCR + andcr5, r5, r4 + or r3, r3, r5 + mtspr SPRN_PSSCR, r3 LOAD_REG_ADDR(r5,power_enter_stop) + li r4, 1 b pnv_powersave_common /* No return */ /* diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c index 479c256..575f2aa 100644 --- a/arch/powerpc/platforms/powernv/idle.c +++ b/arch/powerpc/platforms/powernv/idle.c @@ -237,15 +237,21 @@ static DEVICE_ATTR(fastsleep_workaround_applyonce, 0600, show_fastsleep_workaround_applyonce, store_fastsleep_workaround_applyonce); +/* + * The default stop state that will be used by ppc_md.power_save + * function on platforms that support stop instruction. + */ +u64 pnv_default_stop_val; +u6
Re: [PATCH v3 0/4] implement vcpu preempted check
On Thu, Jul 21, 2016 at 07:45:10AM -0400, Pan Xinhui wrote: > change from v2: > no code change, fix typos, update some comments > > change from v1: > a simplier definition of default vcpu_is_preempted > skip mahcine type check on ppc, and add config. remove dedicated macro. > add one patch to drop overload of rwsem_spin_on_owner and > mutex_spin_on_owner. > add more comments > thanks boqun and Peter's suggestion. > > This patch set aims to fix lock holder preemption issues. So I really like the concept, but I would also really like to see support for more hypervisors included before we can move forward with this. Please consider s390 and (x86/arm) KVM. Once we have a few, more can follow later, but I think its important to not only have PPC support for this.
Re: [v3,4/5] powerpc/pm: support deep sleep feature on T104x
From: Scott Wood
Sent: Thursday, September 29, 2016 4:03 AM
To: C.H. Zhao
Cc: linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org;
z.chen...@gmail.com; Jason Jin
Subject: Re: [v3,4/5] powerpc/pm: support deep sleep feature on T104x
On Tue, 2016-09-27 at 11:05 +, C.H. Zhao wrote:
> From: Scott Wood
> Sent: Sunday, September 25, 2016 3:24 PM
> To: C.H. Zhao
> Cc: linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org; z.chenhui@g
> mail.com; Jason Jin
> Subject: Re: [v3,4/5] powerpc/pm: support deep sleep feature on T104x
>
> On Tue, Aug 02, 2016 at 07:59:31PM +0800, Chenhui Zhao wrote:
> >
> > T104x has deep sleep feature, which can switch off most parts of
> > the SoC when it is in deep sleep mode. This way, it becomes more
> > energy-efficient.
> >
> > The DDR controller will also be powered off in deep sleep. Therefore,
> > the last stage (the latter part of fsl_dp_enter_low) will run without DDR
> > access. This piece of code and related TLBs are prefetched in advance.
> >
> > Due to the different initialization code between 32-bit and 64-bit, they
> > have separate resume entry and precedure.
> >
> > The feature supports 32-bit and 64-bit kernel mode.
> >
> > Signed-off-by: Chenhui Zhao
> > ---
> > arch/powerpc/include/asm/fsl_pm.h | 24 ++
> > arch/powerpc/kernel/asm-offsets.c | 12 +
> > arch/powerpc/kernel/fsl_booke_entry_mapping.S | 10 +
> > arch/powerpc/kernel/head_64.S | 2 +-
> > arch/powerpc/platforms/85xx/Makefile | 1 +
> > arch/powerpc/platforms/85xx/deepsleep.c | 278 ++
> > arch/powerpc/platforms/85xx/qoriq_pm.c | 25 ++
> > arch/powerpc/platforms/85xx/t104x_deepsleep.S | 531
> > ++
> > arch/powerpc/sysdev/fsl_rcpm.c | 8 +-
> > 9 files changed, 889 insertions(+), 2 deletions(-)
> > create mode 100644 arch/powerpc/platforms/85xx/deepsleep.c
> > create mode 100644 arch/powerpc/platforms/85xx/t104x_deepsleep.S
> >
> > diff --git a/arch/powerpc/include/asm/fsl_pm.h
> > b/arch/powerpc/include/asm/fsl_pm.h
> > index e05049b..48c2631 100644
> > --- a/arch/powerpc/include/asm/fsl_pm.h
> > +++ b/arch/powerpc/include/asm/fsl_pm.h
> > @@ -20,6 +20,7 @@
> >
> > #define PLAT_PM_SLEEP 20
> > #define PLAT_PM_LPM20 30
> > +#define PLAT_PM_LPM35 40
> >
> > #define FSL_PM_SLEEP (1 << 0)
> > #define FSL_PM_DEEP_SLEEP (1 << 1)
> > @@ -48,4 +49,27 @@ extern const struct fsl_pm_ops *qoriq_pm_ops;
> >
> > int __init fsl_rcpm_init(void);
> >
> > +#ifdef CONFIG_FSL_QORIQ_PM
> > +int fsl_enter_deepsleep(void);
> > +int fsl_deepsleep_init(void);
> > +#else
> > +static inline int fsl_enter_deepsleep(void) { return -1; }
> > +static inline int fsl_deepsleep_init(void) { return -1; }
> > +#endif
> Please return proper error codes.
>
> Where can fsl_deepsleep_init() be called without CONFIG_FSL_QORIQ_PM?
>
> [Chenhui] I can get rid of the ifdef here. And add it
> in arch/powerpc/sysdev/fsl_rcpm.c.
No, this is the right place for the ifdef for functions that are called from
code that doesn't depend on CONFIG_FSL_QORIQ_PM. But fsl_deepsleep_init() is
called from deepsleep.c which is only built with CONFIG_FSL_QORIQ_PM, and it's
hard to picture a scenario where it would be called from elsewhere.
[Chenhui] You are right. No need to enclose fsl_deepsleep_init() in the ifdef.
But regarding fsl_enter_deepsleep(), it is called in
rcpm_v2_plat_enter_sleep()
in arch/powerpc/sysdev/fsl_rcpm.c. It still needs to be
enclosed in the ifdef.
I would change it like:
int fsl_deepsleep_init(void);
#ifdef CONFIG_FSL_QORIQ_PM
int fsl_enter_deepsleep(void);
#else
static inline int fsl_enter_deepsleep(void) { return -EINVAL; }
#endif
> > diff --git a/arch/powerpc/kernel/fsl_booke_entry_mapping.S
> > b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
> > index 83dd0f6..659b059 100644
> > --- a/arch/powerpc/kernel/fsl_booke_entry_mapping.S
> > +++ b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
> > @@ -173,6 +173,10 @@ skpinv: addi r6,r6,1 /*
> > Increment */
> > lis r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_NEEDED)@h
> > ori r6,r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M,
> > M_IF_NEEDED)@l
> > mtspr SPRN_MAS2,r6
> > +#ifdef ENTRY_DEEPSLEEP_SETUP
> > + LOAD_REG_IMMEDIATE(r8, MEMORY_START)
> > + ori r8,r8,(MAS3_SX|MAS3_SW|MAS3_SR)
> > +#endif
> > mtspr SPRN_MAS3,r8
> > tlbwe
> >
> Have you tried this with a relocatable kernel?
>
> [Chenhui] Not yet. Not sure whether it has been supported on QorIQ platform.
It is supported, and deep sleep needs to work with it.
[Chenhui] OK. I'm going to work something out.
> > +static void fsl_dp_set_res
Re: [PATCH v3 0/4] implement vcpu preempted check
On 09/29/2016 12:10 PM, Peter Zijlstra wrote: > On Thu, Jul 21, 2016 at 07:45:10AM -0400, Pan Xinhui wrote: >> change from v2: >> no code change, fix typos, update some comments >> >> change from v1: >> a simplier definition of default vcpu_is_preempted >> skip mahcine type check on ppc, and add config. remove dedicated macro. >> add one patch to drop overload of rwsem_spin_on_owner and >> mutex_spin_on_owner. >> add more comments >> thanks boqun and Peter's suggestion. >> >> This patch set aims to fix lock holder preemption issues. > > So I really like the concept, but I would also really like to see > support for more hypervisors included before we can move forward with > this. > > Please consider s390 and (x86/arm) KVM. Once we have a few, more can > follow later, but I think its important to not only have PPC support for > this. Actually the s390 preemted check via sigp sense running is available for all hypervisors (z/VM, LPAR and KVM) which implies everywhere as you can no longer buy s390 systems without LPAR. As Heiko already pointed out we could simply use a small inline function that calls cpu_is_preempted from arch/s390/lib/spinlock (or smp_vcpu_scheduled from smp.c) Christian
Re: [PATCH v3 0/4] implement vcpu preempted check
On Thu, Sep 29, 2016 at 12:23:19PM +0200, Christian Borntraeger wrote: > On 09/29/2016 12:10 PM, Peter Zijlstra wrote: > > On Thu, Jul 21, 2016 at 07:45:10AM -0400, Pan Xinhui wrote: > >> change from v2: > >>no code change, fix typos, update some comments > >> > >> change from v1: > >>a simplier definition of default vcpu_is_preempted > >>skip mahcine type check on ppc, and add config. remove dedicated macro. > >>add one patch to drop overload of rwsem_spin_on_owner and > >> mutex_spin_on_owner. > >>add more comments > >>thanks boqun and Peter's suggestion. > >> > >> This patch set aims to fix lock holder preemption issues. > > > > So I really like the concept, but I would also really like to see > > support for more hypervisors included before we can move forward with > > this. > > > > Please consider s390 and (x86/arm) KVM. Once we have a few, more can > > follow later, but I think its important to not only have PPC support for > > this. > > Actually the s390 preemted check via sigp sense running is available for > all hypervisors (z/VM, LPAR and KVM) which implies everywhere as you can no > longer buy s390 systems without LPAR. > > As Heiko already pointed out we could simply use a small inline function > that calls cpu_is_preempted from arch/s390/lib/spinlock (or > smp_vcpu_scheduled from smp.c) Sure, and I had vague memories of Heiko's email. This patch set however completely fails to do that trivial hooking up.
Re: [PATCH v3 0/4] implement vcpu preempted check
On 09/29/2016 12:23 PM, Christian Borntraeger wrote:
> On 09/29/2016 12:10 PM, Peter Zijlstra wrote:
>> On Thu, Jul 21, 2016 at 07:45:10AM -0400, Pan Xinhui wrote:
>>> change from v2:
>>> no code change, fix typos, update some comments
>>>
>>> change from v1:
>>> a simplier definition of default vcpu_is_preempted
>>> skip mahcine type check on ppc, and add config. remove dedicated macro.
>>> add one patch to drop overload of rwsem_spin_on_owner and
>>> mutex_spin_on_owner.
>>> add more comments
>>> thanks boqun and Peter's suggestion.
>>>
>>> This patch set aims to fix lock holder preemption issues.
>>
>> So I really like the concept, but I would also really like to see
>> support for more hypervisors included before we can move forward with
>> this.
>>
>> Please consider s390 and (x86/arm) KVM. Once we have a few, more can
>> follow later, but I think its important to not only have PPC support for
>> this.
>
> Actually the s390 preemted check via sigp sense running is available for
> all hypervisors (z/VM, LPAR and KVM) which implies everywhere as you can no
> longer buy s390 systems without LPAR.
>
> As Heiko already pointed out we could simply use a small inline function
> that calls cpu_is_preempted from arch/s390/lib/spinlock (or
> smp_vcpu_scheduled from smp.c)
Maybe something like
(untested and just pasted, so white space damaged)
diff --git a/arch/s390/include/asm/spinlock.h b/arch/s390/include/asm/spinlock.h
index 63ebf37..6e82986 100644
--- a/arch/s390/include/asm/spinlock.h
+++ b/arch/s390/include/asm/spinlock.h
@@ -21,6 +21,13 @@ _raw_compare_and_swap(unsigned int *lock, unsigned int old,
unsigned int new)
return __sync_bool_compare_and_swap(lock, old, new);
}
+int arch_vcpu_is_preempted(int cpu);
+#define vcpu_is_preempted cpu_is_preempted
+static inline bool cpu_is_preempted(int cpu)
+{
+ return arch_vcpu_is_preempted(cpu);
+}
+
/*
* Simple spin lock operations. There are two variants, one clears IRQ's
* on the local processor, one does not.
diff --git a/arch/s390/lib/spinlock.c b/arch/s390/lib/spinlock.c
index e5f50a7..260d179 100644
--- a/arch/s390/lib/spinlock.c
+++ b/arch/s390/lib/spinlock.c
@@ -37,7 +37,7 @@ static inline void _raw_compare_and_delay(unsigned int *lock,
unsigned int old)
asm(".insn rsy,0xeb22,%0,0,%1" : : "d" (old), "Q" (*lock));
}
-static inline int cpu_is_preempted(int cpu)
+int arch_vcpu_is_preempted(int cpu)
{
if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
return 0;
@@ -45,6 +45,7 @@ static inline int cpu_is_preempted(int cpu)
return 0;
return 1;
}
+EXPORT_SYMBOL(arch_vcpu_is_preempted);
void arch_spin_lock_wait(arch_spinlock_t *lp)
{
If ok I can respin into a proper patch.
Re: [PATCH v3 0/4] implement vcpu preempted check
On 09/29/2016 12:40 PM, Christian Borntraeger wrote:
> On 09/29/2016 12:23 PM, Christian Borntraeger wrote:
>> On 09/29/2016 12:10 PM, Peter Zijlstra wrote:
>>> On Thu, Jul 21, 2016 at 07:45:10AM -0400, Pan Xinhui wrote:
change from v2:
no code change, fix typos, update some comments
change from v1:
a simplier definition of default vcpu_is_preempted
skip mahcine type check on ppc, and add config. remove dedicated macro.
add one patch to drop overload of rwsem_spin_on_owner and
mutex_spin_on_owner.
add more comments
thanks boqun and Peter's suggestion.
This patch set aims to fix lock holder preemption issues.
>>>
>>> So I really like the concept, but I would also really like to see
>>> support for more hypervisors included before we can move forward with
>>> this.
>>>
>>> Please consider s390 and (x86/arm) KVM. Once we have a few, more can
>>> follow later, but I think its important to not only have PPC support for
>>> this.
>>
>> Actually the s390 preemted check via sigp sense running is available for
>> all hypervisors (z/VM, LPAR and KVM) which implies everywhere as you can no
>> longer buy s390 systems without LPAR.
>>
>> As Heiko already pointed out we could simply use a small inline function
>> that calls cpu_is_preempted from arch/s390/lib/spinlock (or
>> smp_vcpu_scheduled from smp.c)
>
> Maybe something like
> (untested and just pasted, so white space damaged)
Now tested. With 8 host cpus and 16 guest cpus perf bench sched shows the
same improvements as in Pan Xinhuis cover letter.
Also the runtime shrinks a lot.
>
> diff --git a/arch/s390/include/asm/spinlock.h
> b/arch/s390/include/asm/spinlock.h
> index 63ebf37..6e82986 100644
> --- a/arch/s390/include/asm/spinlock.h
> +++ b/arch/s390/include/asm/spinlock.h
> @@ -21,6 +21,13 @@ _raw_compare_and_swap(unsigned int *lock, unsigned int
> old, unsigned int new)
> return __sync_bool_compare_and_swap(lock, old, new);
> }
>
> +int arch_vcpu_is_preempted(int cpu);
> +#define vcpu_is_preempted cpu_is_preempted
> +static inline bool cpu_is_preempted(int cpu)
> +{
> + return arch_vcpu_is_preempted(cpu);
> +}
> +
> /*
> * Simple spin lock operations. There are two variants, one clears IRQ's
> * on the local processor, one does not.
> diff --git a/arch/s390/lib/spinlock.c b/arch/s390/lib/spinlock.c
> index e5f50a7..260d179 100644
> --- a/arch/s390/lib/spinlock.c
> +++ b/arch/s390/lib/spinlock.c
> @@ -37,7 +37,7 @@ static inline void _raw_compare_and_delay(unsigned int
> *lock, unsigned int old)
> asm(".insn rsy,0xeb22,%0,0,%1" : : "d" (old), "Q" (*lock));
> }
>
> -static inline int cpu_is_preempted(int cpu)
> +int arch_vcpu_is_preempted(int cpu)
> {
> if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
> return 0;
> @@ -45,6 +45,7 @@ static inline int cpu_is_preempted(int cpu)
> return 0;
> return 1;
> }
> +EXPORT_SYMBOL(arch_vcpu_is_preempted);
>
> void arch_spin_lock_wait(arch_spinlock_t *lp)
> {
>
>
>
> If ok I can respin into a proper patch.
Re: [PATCH v5 3/4] PCI: Add a new option for resource_alignment to reassign alignment
On Thu, Sep 29, 2016 at 10:38:01AM +0800, Yongji Xie wrote:
> On 2016/9/29 6:42, Bjorn Helgaas wrote:
>
> >On Tue, Sep 13, 2016 at 05:00:33PM +0800, Yongji Xie wrote:
> >>When using resource_alignment kernel parameter, the current
> >>implement reassigns the alignment by changing resources' size
> >>which can potentially break some drivers. For example, the driver
> >>uses the size to locate some register whose length is related
> >>to the size.
> >>
> >>This patch adds a new option "noresize" for the parameter to
> >>solve this problem.
> >>
> >>Signed-off-by: Yongji Xie
> >>---
> >> Documentation/kernel-parameters.txt |9 ++---
> >> drivers/pci/pci.c | 37
> >> +--
> >> 2 files changed, 33 insertions(+), 13 deletions(-)
> >>
> >>diff --git a/Documentation/kernel-parameters.txt
> >>b/Documentation/kernel-parameters.txt
> >>index a4f4d69..d6a340d 100644
> >>--- a/Documentation/kernel-parameters.txt
> >>+++ b/Documentation/kernel-parameters.txt
> >>@@ -3023,9 +3023,10 @@ bytes respectively. Such letter suffixes can also be
> >>entirely omitted.
> >>window. The default value is 64 megabytes.
> >>resource_alignment=
> >>Format:
> >>- [ >>align>@][:]:.[; ...]
> >>- [@]pci::\
> >>- [::][;
> >>...]
> >>+ [@][noresize@][:]
> >>+ :.[; ...]
> >>+ [ >>align>@][noresize@]pci::
> >>+ [::][; ...]
> >>Specifies alignment and device to reassign
> >>aligned memory resources.
> >>If is not specified,
> >>@@ -3036,6 +3037,8 @@ bytes respectively. Such letter suffixes can also be
> >>entirely omitted.
> >>instances of a device, the PCI vendor,
> >>device, subvendor, and subdevice may be
> >>specified, e.g., 4096@pci:8086:9c22:103c:198f
> >>+ noresize: Don't change the resources' sizes when
> >>+ reassigning alignment.
> >>ecrc= Enable/disable PCIe ECRC (transaction layer
> >>end-to-end CRC checking).
> >>bios: Use BIOS/firmware settings. This is the
> >>diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> >>index b8357d7..37f8062 100644
> >>--- a/drivers/pci/pci.c
> >>+++ b/drivers/pci/pci.c
> >>@@ -4946,11 +4946,13 @@ static DEFINE_SPINLOCK(resource_alignment_lock);
> >> /**
> >> * pci_specified_resource_alignment - get resource alignment specified by
> >> user.
> >> * @dev: the PCI device to get
> >>+ * @resize: whether or not to change resources' size when reassigning
> >>alignment
> >> *
> >> * RETURNS: Resource alignment if it is specified.
> >> * Zero if it is not specified.
> >> */
> >>-static resource_size_t pci_specified_resource_alignment(struct pci_dev
> >>*dev)
> >>+static resource_size_t pci_specified_resource_alignment(struct pci_dev
> >>*dev,
> >>+ bool *resize)
> >> {
> >>int seg, bus, slot, func, align_order, count;
> >>unsigned short vendor, device, subsystem_vendor, subsystem_device;
> >>@@ -4974,6 +4976,13 @@ static resource_size_t
> >>pci_specified_resource_alignment(struct pci_dev *dev)
> >>} else {
> >>align_order = -1;
> >>}
> >>+
> >>+ if (!strncmp(p, "noresize@", 9)) {
> >>+ *resize = false;
> >>+ p += 9;
> >>+ } else
> >>+ *resize = true;
> >>+
> >>if (strncmp(p, "pci:", 4) == 0) {
> >>/* PCI vendor/device (subvendor/subdevice) ids are
> >> specified */
> >>p += 4;
> >>@@ -5045,6 +5054,7 @@ void pci_reassigndev_resource_alignment(struct
> >>pci_dev *dev)
> >> {
> >>int i;
> >>struct resource *r;
> >>+ bool resize = true;
> >>resource_size_t align, size;
> >>u16 command;
> >>@@ -5058,7 +5068,7 @@ void pci_reassigndev_resource_alignment(struct
> >>pci_dev *dev)
> >>return;
> >>/* check if specified PCI is target device to reassign */
> >>- align = pci_specified_resource_alignment(dev);
> >>+ align = pci_specified_resource_alignment(dev, &resize);
> >>if (!align)
> >>return;
> >>@@ -5086,15 +5096,22 @@ void pci_reassigndev_resource_alignment(struct
> >>pci_dev *dev)
> >>}
> >>size = resource_size(r);
> >>- if (size < align) {
> >>- size = align;
> >>- dev_info(&dev->dev,
> >>- "Rounding up size of resource #%d to %#llx.\n",
> >>- i, (unsigned long long)size);
> >>+ if (resize) {
>
Re: [v3,1/6] powerpc/eeh: Allow to freeze PE in eeh_pe_set_option()
On Wed, 2016-28-09 at 04:34:53 UTC, Gavin Shan wrote: > Function eeh_pe_set_option() is used to apply the requested options > (enable, disable, unfreeze) in EEH virtualization path. The semantics > of this function isn't complete until freezing is supported. > > This allows to freeze the indicated PE. The new semantics is going to > be used in PCI surprise hot remove path, to freeze removed PCI devices > (PE) to avoid unexpected EEH error reporting. > > Signed-off-by: Gavin Shan Series applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/de5a6622495117ef2e0335d509e917 cheers
Re: powerpc/powernv: Call opal_pci_poll() if needed
On Fri, 2016-24-06 at 06:44:19 UTC, Gavin Shan wrote: > When issuing PHB reset, OPAL API opal_pci_poll() is called to drive > the state machine in OPAL forward. However, we needn't always call > the function under some circumstances like reset deassert. > > This avoids calling opal_pci_poll() when OPAL_SUCCESS is returned > from opal_pci_reset(). Except the overhead introduced by additional > one unnecessary OPAL call, I didn't run into real issue because of > this. > > Reported-by: Pridhiviraj Paidipeddi > Signed-off-by: Gavin Shan Applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/fbce44d0ed42e4653172376f4dfeaa cheers
Re: [v3] KVM: PPC: Book3S HV: Migrate pinned pages out of CMA
On Tue, 2016-06-09 at 06:27:31 UTC, Balbir Singh wrote: > When PCI Device pass-through is enabled via VFIO, KVM-PPC will > pin pages using get_user_pages_fast(). One of the downsides of > the pinning is that the page could be in CMA region. The CMA > region is used for other allocations like the hash page table. > Ideally we want the pinned pages to be from non CMA region. > > This patch (currently only for KVM PPC with VFIO) forcefully > migrates the pages out (huge pages are omitted for the moment). > There are more efficient ways of doing this, but that might > be elaborate and might impact a larger audience beyond just > the kvm ppc implementation. > > The magic is in new_iommu_non_cma_page() which allocates the > new page from a non CMA region. > > I've tested the patches lightly at my end. The full solution > requires migration of THP pages in the CMA region. That work > will be done incrementally on top of this. > > Signed-off-by: Balbir Singh > Acked-by: Alexey Kardashevskiy Applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/2e5bbb5461f138cac631fe21b4ad95 cheers
Re: powerpc/vdso64: Use double word compare on pointers
On Sun, 2016-25-09 at 07:16:53 UTC, Anton Blanchard wrote:
> From: Anton Blanchard
>
> __kernel_get_syscall_map and __kernel_clock_getres use cmpli to
> check if the passed in pointer is non zero. cmpli maps to a 32 bit
> compare on binutils, so we ignore the top 32 bits.
>
> A simple test case can be created by passing in a bogus pointer with
> the bottom 32 bits clear. Using a clk_id that is handled by the VDSO,
> then one that is handled by the kernel shows the problem:
>
> printf("%d\n", clock_getres(CLOCK_REALTIME, (void *)0x1));
> printf("%d\n", clock_getres(CLOCK_BOOTTIME, (void *)0x1));
>
> And we get:
>
> 0
> -1
>
> The bigger issue is if we pass a valid pointer with the bottom 32 bits
> clear, in this case we will return success but won't write any data
> to the pointer.
>
> I stumbled across this issue because the LLVM integrated assembler
> doesn't accept cmpli with 3 arguments. Fix this by converting them to
> cmpldi.
>
> Cc: sta...@vger.kernel.org
> Signed-off-by: Anton Blanchard
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/5045ea37377ce8cca6890d32b127ad
cheers
Re: [PATCH v5 4/4] PCI: Add a macro to set default alignment for all PCI devices
On Tue, Sep 13, 2016 at 05:00:34PM +0800, Yongji Xie wrote:
> When vfio passthroughs a PCI device of which MMIO BARs are
> smaller than PAGE_SIZE, guest will not handle the mmio
> accesses to the BARs which leads to mmio emulations in host.
>
> This is because vfio will not allow to passthrough one BAR's
> mmio page which may be shared with other BARs. Otherwise,
> there will be a backdoor that guest can use to access BARs
> of other guest.
>
> This patch adds a macro to set default alignment for all
> PCI devices. Then we could solve this issue on some platforms
> which would easily hit this issue because of their 64K page
> such as PowerNV platform by defining this macro as PAGE_SIZE.
>
> Signed-off-by: Yongji Xie
> ---
> arch/powerpc/include/asm/pci.h |4
> drivers/pci/pci.c |4
> 2 files changed, 8 insertions(+)
>
> diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
> index e9bd6cf..5e31bc2 100644
> --- a/arch/powerpc/include/asm/pci.h
> +++ b/arch/powerpc/include/asm/pci.h
> @@ -28,6 +28,10 @@
> #define PCIBIOS_MIN_IO 0x1000
> #define PCIBIOS_MIN_MEM 0x1000
>
> +#ifdef CONFIG_PPC_POWERNV
> +#define PCIBIOS_DEFAULT_ALIGNMENTPAGE_SIZE
> +#endif
> +
> struct pci_dev;
>
> /* Values for the `which' argument to sys_pciconfig_iobase syscall. */
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 37f8062..9c61cbe 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -4959,6 +4959,10 @@ static resource_size_t
> pci_specified_resource_alignment(struct pci_dev *dev,
> resource_size_t align = 0;
> char *p;
>
> +#ifdef PCIBIOS_DEFAULT_ALIGNMENT
> + align = PCIBIOS_DEFAULT_ALIGNMENT;
> + *resize = false;
> +#endif
I'm a little confused about how this works.
I think this change only does something if the user specifies
"pci=resource_alignment=..." or writes to the /sys/.../resource_alignment
file, because those are the only ways to set resource_alignment_param.
If that's true, isn't the *default* to align to PAGE_SIZE? So I don't
understand what PCIBIOS_DEFAULT_ALIGNMENT changes.
And I'm hoping we can get rid of the resize flag based on the
discussion of the previous patch.
> spin_lock(&resource_alignment_lock);
> p = resource_alignment_param;
> if (pci_has_flag(PCI_PROBE_ONLY)) {
> --
> 1.7.9.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 27/27] perf tests: Add dwarf unwind test for powerpc
From: Ravi Bangoria
The user stack dump feature was recently added for powerpc. But there
was no test case available to test it.
This test works same as on other architectures by preparing a stack
frame on the perf test thread and comparing each frame by unwinding it.
$ ./perf test 50
50: Test dwarf unwind: Ok
User stack dump for powerpc: https://lkml.org/lkml/2016/4/28/482
Signed-off-by: Ravi Bangoria
Acked-by: Jiri Olsa
Cc: Alexander Shishkin
Cc: Anju T Sudhakar
Cc: Josh Poimboeuf
Cc: Masami Hiramatsu
Cc: Matt Fleming
Cc: Michael Ellerman
Cc: Namhyung Kim
Cc: Peter Zijlstra
Cc: Wang Nan
Cc: linuxppc-dev@lists.ozlabs.org
Link:
http://lkml.kernel.org/r/1474267100-31079-1-git-send-email-ravi.bango...@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo
---
tools/perf/arch/powerpc/Build| 1 +
tools/perf/arch/powerpc/include/arch-tests.h | 13
tools/perf/arch/powerpc/include/perf_regs.h | 2 +
tools/perf/arch/powerpc/tests/Build | 4 ++
tools/perf/arch/powerpc/tests/arch-tests.c | 15 +
tools/perf/arch/powerpc/tests/dwarf-unwind.c | 62 ++
tools/perf/arch/powerpc/tests/regs_load.S| 94
tools/perf/tests/Build | 2 +-
tools/perf/tests/dwarf-unwind.c | 2 +-
9 files changed, 193 insertions(+), 2 deletions(-)
create mode 100644 tools/perf/arch/powerpc/include/arch-tests.h
create mode 100644 tools/perf/arch/powerpc/tests/Build
create mode 100644 tools/perf/arch/powerpc/tests/arch-tests.c
create mode 100644 tools/perf/arch/powerpc/tests/dwarf-unwind.c
create mode 100644 tools/perf/arch/powerpc/tests/regs_load.S
diff --git a/tools/perf/arch/powerpc/Build b/tools/perf/arch/powerpc/Build
index 54afe4a467e7..db52fa22d3a1 100644
--- a/tools/perf/arch/powerpc/Build
+++ b/tools/perf/arch/powerpc/Build
@@ -1 +1,2 @@
libperf-y += util/
+libperf-y += tests/
diff --git a/tools/perf/arch/powerpc/include/arch-tests.h
b/tools/perf/arch/powerpc/include/arch-tests.h
new file mode 100644
index ..84d8dedef2ed
--- /dev/null
+++ b/tools/perf/arch/powerpc/include/arch-tests.h
@@ -0,0 +1,13 @@
+#ifndef ARCH_TESTS_H
+#define ARCH_TESTS_H
+
+#ifdef HAVE_DWARF_UNWIND_SUPPORT
+struct thread;
+struct perf_sample;
+int test__arch_unwind_sample(struct perf_sample *sample,
+struct thread *thread);
+#endif
+
+extern struct test arch_tests[];
+
+#endif
diff --git a/tools/perf/arch/powerpc/include/perf_regs.h
b/tools/perf/arch/powerpc/include/perf_regs.h
index 75de0e92e71e..c12f4e804f66 100644
--- a/tools/perf/arch/powerpc/include/perf_regs.h
+++ b/tools/perf/arch/powerpc/include/perf_regs.h
@@ -5,6 +5,8 @@
#include
#include
+void perf_regs_load(u64 *regs);
+
#define PERF_REGS_MASK ((1ULL << PERF_REG_POWERPC_MAX) - 1)
#define PERF_REGS_MAX PERF_REG_POWERPC_MAX
#ifdef __powerpc64__
diff --git a/tools/perf/arch/powerpc/tests/Build
b/tools/perf/arch/powerpc/tests/Build
new file mode 100644
index ..d827ef384b33
--- /dev/null
+++ b/tools/perf/arch/powerpc/tests/Build
@@ -0,0 +1,4 @@
+libperf-$(CONFIG_DWARF_UNWIND) += regs_load.o
+libperf-$(CONFIG_DWARF_UNWIND) += dwarf-unwind.o
+
+libperf-y += arch-tests.o
diff --git a/tools/perf/arch/powerpc/tests/arch-tests.c
b/tools/perf/arch/powerpc/tests/arch-tests.c
new file mode 100644
index ..e24f46241f40
--- /dev/null
+++ b/tools/perf/arch/powerpc/tests/arch-tests.c
@@ -0,0 +1,15 @@
+#include
+#include "tests/tests.h"
+#include "arch-tests.h"
+
+struct test arch_tests[] = {
+#ifdef HAVE_DWARF_UNWIND_SUPPORT
+ {
+ .desc = "Test dwarf unwind",
+ .func = test__dwarf_unwind,
+ },
+#endif
+ {
+ .func = NULL,
+ },
+};
diff --git a/tools/perf/arch/powerpc/tests/dwarf-unwind.c
b/tools/perf/arch/powerpc/tests/dwarf-unwind.c
new file mode 100644
index ..0bac3137ccbd
--- /dev/null
+++ b/tools/perf/arch/powerpc/tests/dwarf-unwind.c
@@ -0,0 +1,62 @@
+#include
+#include "perf_regs.h"
+#include "thread.h"
+#include "map.h"
+#include "event.h"
+#include "debug.h"
+#include "tests/tests.h"
+#include "arch-tests.h"
+
+#define STACK_SIZE 8192
+
+static int sample_ustack(struct perf_sample *sample,
+struct thread *thread, u64 *regs)
+{
+ struct stack_dump *stack = &sample->user_stack;
+ struct map *map;
+ unsigned long sp;
+ u64 stack_size, *buf;
+
+ buf = malloc(STACK_SIZE);
+ if (!buf) {
+ pr_debug("failed to allocate sample uregs data\n");
+ return -1;
+ }
+
+ sp = (unsigned long) regs[PERF_REG_POWERPC_R1];
+
+ map = map_groups__find(thread->mg, MAP__VARIABLE, (u64) sp);
+ if (!map) {
+ pr_debug("failed to get stack map\n");
+ free(buf);
+ return -1;
+ }
+
+ stack_size = map->end - sp;
+ stack_size = stack_size > STACK_SIZE ? STACK_SI
[GIT PULL 00/27] perf/core improvements and fixes
Hi Ingo, Please consider pulling, more to come soon, - Arnaldo Build and test results at the end of this message. The following changes since commit 6b652de2b27c0a4020ce0e8f277e782b6af76096: Merge tag 'perf-core-for-mingo-20160922' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core (2016-09-23 07:21:38 +0200) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git tags/perf-core-for-mingo-20160929 for you to fetch changes up to d18019a53a07e009899ff6b8dc5ec30f249360d9: perf tests: Add dwarf unwind test for powerpc (2016-09-29 11:18:21 -0300) perf/core improvements and fixes: User visible: - New features: - Add support for using symbols in address filters with Intel PT and ARM CoreSight (hardware assisted tracing facilities) (Adrian Hunter, Mathieu Poirier) Fixes: - Fix MMAP event synthesis for pre-existing threads when no hugetlbfs mount is in place (Adrian Hunter) - Don't ignore kernel idle symbols in 'perf script' (Adrian Hunter) - Assorted Intel PT fixes (Adrian Hunter) Improvements: - Fix handling of C++ symbols in 'perf probe' (Masami Hiramatsu) - Beautify sched_[gs]et_attr return value in 'perf trace' (Arnaldo Carvalho de Melo) Infrastructure: --- New features: - Add dwarf unwind 'perf test' for powerpc (Ravi Bangoria) Fixes: - Fix error paths in 'perf record' (Adrian Hunter) Documentation: - Update documentation info about quipper, a C++ parser for converting to/from perf.data/chromium profiling format (Simon Que) Build Fixes: Fix building in 32 bit platform with libbabeltrace (Wang Nan) Signed-off-by: Arnaldo Carvalho de Melo Adrian Hunter (16): perf record: Fix documentation 'event_sources' -> 'event_source' perf tools: Fix MMAP event synthesis broken by MAP_HUGETLB change perf script: Fix vanished idle symbols perf record: Rename label 'out_symbol_exit' perf record: Fix error paths perf symbols: Add dso__last_symbol() perf record: Add support for using symbols in address filters perf probe: Increase debug level of SDT debug messages perf intel-pt: Fix snapshot overlap detection decoder errors perf intel-pt: Add support for recording the max non-turbo ratio perf intel-pt: Fix missing error codes processing auxtrace_info perf intel-pt: Add a helper function for processing AUXTRACE_INFO perf intel-pt: Record address filter in AUXTRACE_INFO event perf intel-pt: Read address filter from AUXTRACE_INFO event perf intel-pt: Enable decoder to handle TIP.PGD with missing IP perf intel-pt: Fix decoding when there are address filters Arnaldo Carvalho de Melo (1): perf trace: Beautify sched_[gs]et_attr return value Masami Hiramatsu (4): perf probe: Ignore the error of finding inline instance perf probe: Skip if the function address is 0 perf probe: Fix to cut off incompatible chars from group name perf probe: Match linkage name with mangled name Mathieu Poirier (3): perf tools: Make perf_evsel__append_filter() generic perf evsel: New tracepoint specific function perf evsel: Add support for address filters Ravi Bangoria (1): perf tests: Add dwarf unwind test for powerpc Simon Que (1): perf tools: Update documentation info about quipper Wang Nan (1): perf data: Fix building in 32 bit platform with libbabeltrace tools/perf/Documentation/perf-record.txt | 61 +- tools/perf/Documentation/perf.data-file-format.txt | 6 +- tools/perf/arch/powerpc/Build | 1 + tools/perf/arch/powerpc/include/arch-tests.h | 13 + tools/perf/arch/powerpc/include/perf_regs.h| 2 + tools/perf/arch/powerpc/tests/Build| 4 + tools/perf/arch/powerpc/tests/arch-tests.c | 15 + tools/perf/arch/powerpc/tests/dwarf-unwind.c | 62 ++ tools/perf/arch/powerpc/tests/regs_load.S | 94 +++ tools/perf/arch/x86/util/intel-pt.c| 57 +- tools/perf/builtin-record.c| 32 +- tools/perf/builtin-trace.c | 10 +- tools/perf/tests/Build | 2 +- tools/perf/tests/dwarf-unwind.c| 2 +- tools/perf/util/auxtrace.c | 737 + tools/perf/util/auxtrace.h | 54 ++ tools/perf/util/build-id.c | 4 +- tools/perf/util/data-convert-bt.c | 2 +- tools/perf/util/dwarf-aux.c| 28 +- tools/perf/util/dwarf-aux.h| 3 + tools/perf/util/event.c
Re: [PATCH v5] powerpc: Do not make the entire heap executable
On 09/28, Kees Cook wrote: > > This is where the flags are actually built from what's coming in > through the newly created exported function vm_brk_flags() below. The > only flag we're acting on is VM_EXEC (passed in from set_brk() above). > I think do_brk_flags() should mask the valid flags, or we'll regret it > in the future. I'd like to see something like: > > /* Until we need other flags, refuse anything except VM_EXEC. */ > if ((flags & (~VM_EXEC)) != 0) > return -EINVAL; > flags |= VM_DATA_DEFAULT_FLAGS | VM_ACCOUNT | mm->def_flags; I tried to suggest this too. In particular it would be simply wrong to accept VM_LOCKED in flags. Oleg.
RE: [PATCH] dma/fsldma : Unmap region obtained by of_iomap
> -Original Message-
> From: Arvind Yadav [mailto:arvind.yadav...@gmail.com]
> Sent: Wednesday, September 28, 2016 5:45 AM
> To: le...@freescale.com; z...@zh-kernel.org; vinod.k...@intel.com
> Cc: dan.j.willi...@intel.com; linuxppc-dev@lists.ozlabs.org;
> dmaeng...@vger.kernel.org; linux-ker...@vger.kernel.org
> Subject: [PATCH] dma/fsldma : Unmap region obtained by of_iomap
>
> Free memory mapping, if probe is not successful.
>
> Signed-off-by: Arvind Yadav
Acked-by: Li Yang
> ---
> drivers/dma/fsldma.c |4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c index
> 911b717..7ba8944 100644
> --- a/drivers/dma/fsldma.c
> +++ b/drivers/dma/fsldma.c
> @@ -1351,7 +1351,7 @@ static int fsldma_of_probe(struct platform_device
> *op)
> if (!fdev->regs) {
> dev_err(&op->dev, "unable to ioremap registers\n");
> err = -ENOMEM;
> - goto out_free_fdev;
> + goto out_free;
> }
>
> /* map the channel IRQ if it exists, but don't hookup the handler yet */
> @@ -1416,6 +1416,8 @@ static int fsldma_of_probe(struct platform_device
> *op)
>
> out_free_fdev:
> irq_dispose_mapping(fdev->irq);
> + iounmap(fdev->regs);
> +out_free:
> kfree(fdev);
> out_return:
> return err;
> --
> 1.7.9.5
Re: [GIT PULL 00/27] perf/core improvements and fixes
* Arnaldo Carvalho de Melo wrote: > Hi Ingo, > > Please consider pulling, more to come soon, > > - Arnaldo > > Build and test results at the end of this message. > > The following changes since commit 6b652de2b27c0a4020ce0e8f277e782b6af76096: > > Merge tag 'perf-core-for-mingo-20160922' of > git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core > (2016-09-23 07:21:38 +0200) > > are available in the git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git > tags/perf-core-for-mingo-20160929 > > for you to fetch changes up to d18019a53a07e009899ff6b8dc5ec30f249360d9: > > perf tests: Add dwarf unwind test for powerpc (2016-09-29 11:18:21 -0300) > > > perf/core improvements and fixes: > > User visible: > - > > New features: > > - Add support for using symbols in address filters with Intel PT and ARM > CoreSight (hardware assisted tracing facilities) (Adrian Hunter, Mathieu > Poirier) > > Fixes: > > - Fix MMAP event synthesis for pre-existing threads when no hugetlbfs > mount is in place (Adrian Hunter) > > - Don't ignore kernel idle symbols in 'perf script' (Adrian Hunter) > > - Assorted Intel PT fixes (Adrian Hunter) > > Improvements: > > - Fix handling of C++ symbols in 'perf probe' (Masami Hiramatsu) > > - Beautify sched_[gs]et_attr return value in 'perf trace' (Arnaldo Carvalho > de Melo) > > Infrastructure: > --- > > New features: > > - Add dwarf unwind 'perf test' for powerpc (Ravi Bangoria) > > Fixes: > > - Fix error paths in 'perf record' (Adrian Hunter) > > Documentation: > > - Update documentation info about quipper, a C++ parser for converting > to/from perf.data/chromium profiling format (Simon Que) > > Build Fixes: > > Fix building in 32 bit platform with libbabeltrace (Wang Nan) > > Signed-off-by: Arnaldo Carvalho de Melo > > > Adrian Hunter (16): > perf record: Fix documentation 'event_sources' -> 'event_source' > perf tools: Fix MMAP event synthesis broken by MAP_HUGETLB change > perf script: Fix vanished idle symbols > perf record: Rename label 'out_symbol_exit' > perf record: Fix error paths > perf symbols: Add dso__last_symbol() > perf record: Add support for using symbols in address filters > perf probe: Increase debug level of SDT debug messages > perf intel-pt: Fix snapshot overlap detection decoder errors > perf intel-pt: Add support for recording the max non-turbo ratio > perf intel-pt: Fix missing error codes processing auxtrace_info > perf intel-pt: Add a helper function for processing AUXTRACE_INFO > perf intel-pt: Record address filter in AUXTRACE_INFO event > perf intel-pt: Read address filter from AUXTRACE_INFO event > perf intel-pt: Enable decoder to handle TIP.PGD with missing IP > perf intel-pt: Fix decoding when there are address filters > > Arnaldo Carvalho de Melo (1): > perf trace: Beautify sched_[gs]et_attr return value > > Masami Hiramatsu (4): > perf probe: Ignore the error of finding inline instance > perf probe: Skip if the function address is 0 > perf probe: Fix to cut off incompatible chars from group name > perf probe: Match linkage name with mangled name > > Mathieu Poirier (3): > perf tools: Make perf_evsel__append_filter() generic > perf evsel: New tracepoint specific function > perf evsel: Add support for address filters > > Ravi Bangoria (1): > perf tests: Add dwarf unwind test for powerpc > > Simon Que (1): > perf tools: Update documentation info about quipper > > Wang Nan (1): > perf data: Fix building in 32 bit platform with libbabeltrace > > tools/perf/Documentation/perf-record.txt | 61 +- > tools/perf/Documentation/perf.data-file-format.txt | 6 +- > tools/perf/arch/powerpc/Build | 1 + > tools/perf/arch/powerpc/include/arch-tests.h | 13 + > tools/perf/arch/powerpc/include/perf_regs.h| 2 + > tools/perf/arch/powerpc/tests/Build| 4 + > tools/perf/arch/powerpc/tests/arch-tests.c | 15 + > tools/perf/arch/powerpc/tests/dwarf-unwind.c | 62 ++ > tools/perf/arch/powerpc/tests/regs_load.S | 94 +++ > tools/perf/arch/x86/util/intel-pt.c| 57 +- > tools/p
Re: [PATCH v5 00/10] ima: carry the measurement list across kexec
Mimi Zohar writes: > The TPM PCRs are only reset on a hard reboot. In order to validate a > TPM's quote after a soft reboot (eg. kexec -e), the IMA measurement list > of the running kernel must be saved and then restored on the subsequent > boot, possibly of a different architecture. > > The existing securityfs binary_runtime_measurements file conveniently > provides a serialized format of the IMA measurement list. This patch > set serializes the measurement list in this format and restores it. > > Up to now, the binary_runtime_measurements was defined as architecture > native format. The assumption being that userspace could and would > handle any architecture conversions. With the ability of carrying the > measurement list across kexec, possibly from one architecture to a > different one, the per boot architecture information is lost and with it > the ability of recalculating the template digest hash. To resolve this > problem, without breaking the existing ABI, this patch set introduces > the boot command line option "ima_canonical_fmt", which is arbitrarily > defined as little endian. > > The need for this boot command line option will be limited to the > existing version 1 format of the binary_runtime_measurements. > Subsequent formats will be defined as canonical format (eg. TPM 2.0 > support for larger digests). > > A simplified method of Thiago Bauermann's "kexec buffer handover" patch > series for carrying the IMA measurement list across kexec is included > in this patch set. The simplified method requires all file measurements > be taken prior to executing the kexec load, as subsequent measurements > will not be carried across the kexec and restored. So I just went through the kexec portions of this and I don't see anything particularly worrying. I have one thing that I think could be improved, but is not wrong. Having both receiving and transmitting the ima measurments both under HAVE_IMA_KEXEC seems wrong. There may be people who want to receive the measurment list but don't want to support kexec'ing other kernels or the other way around. I can very much see bootloaders that expect they will be the first kernel to not want to compile in the extra code for receiving the measurment list. But again that is a nit, and not a problem. So for the series, from the kexec point of view. Acked-by: "Eric W. Biederman" > > These patches can also be found in the next-kexec-restore branch of: > git://git.kernel.org/pub/scm/linux/kernel/git/zohar/linux-integrity.git > > Changelog v5: > - Included patches from Thiago Bauermann's "kexec buffer handover" > patch series for carrying the IMA measurement list across kexec. > - Added CONFIG_HAVE_IMA_KEXEC > - Renamed functions to variations of ima_kexec_buffer instead of > variations of kexec_handover_buffer > > Changelog v4: > - Fixed "spinlock bad magic" BUG - reported by Dmitry Vyukov > - Rebased on Thiago Bauermann's v5 patch set > - Removed the skip_checksum initialization > > Changelog v3: > - Cleaned up the code for calculating the requested kexec segment size > needed for the IMA measurement list, limiting the segment size to half > of the totalram_pages. > - Fixed kernel test robot reports as enumerated in the respective > patch changelog. > > Changelog v2: > - Canonical measurement list support added > - Redefined the ima_kexec_hdr struct to use well defined sizes > > Andreas Steffen (1): > ima: platform-independent hash value > > Mimi Zohar (7): > ima: on soft reboot, restore the measurement list > ima: permit duplicate measurement list entries > ima: maintain memory size needed for serializing the measurement list > ima: on soft reboot, save the measurement list > ima: store the builtin/custom template definitions in a list > ima: support restoring multiple template formats > ima: define a canonical binary_runtime_measurements list format > > Thiago Jung Bauermann (2): > powerpc: ima: Get the kexec buffer passed by the previous kernel > powerpc: ima: Send the kexec buffer to the next kernel > > Documentation/kernel-parameters.txt | 4 + > arch/Kconfig | 3 + > arch/powerpc/Kconfig | 1 + > arch/powerpc/include/asm/ima.h| 29 +++ > arch/powerpc/include/asm/kexec.h | 16 +- > arch/powerpc/kernel/Makefile | 4 + > arch/powerpc/kernel/ima_kexec.c | 223 +++ > arch/powerpc/kernel/kexec_elf_64.c| 2 +- > arch/powerpc/kernel/machine_kexec_64.c| 116 ++-- > include/linux/ima.h | 12 ++ > kernel/kexec_file.c | 4 + > security/integrity/ima/Kconfig| 12 ++ > security/integrity/ima/Makefile | 1 + > security/integrity/ima/ima.h | 31 > security/integrity/ima/ima_crypto.c | 6 +- > security/integrity/ima/ima_fs.c | 30 ++- > security/integrity/ima/ima_init.c | 2
Re: [PATHC v2 0/9] ima: carry the measurement list across kexec
Thiago Jung Bauermann writes: > Hello Eric, > > Am Dienstag, 20 September 2016, 11:07:29 schrieb Eric W. Biederman: >> A semi-generic concept called a hand-over buffer seems to be a >> construction of infrustructure for no actual reason that will just >> result in confusion. There are lots of things that are handed over, the >> flattend device tree, ramdisks, bootparams on x86, etc, etc. ima is not >> special in this execpt for being perhaps the first addition that we are >> going to want the option of including on most architectures. > > Ok, I understand. I decided to implement a generic concept because I thought > that proposing a feature that is more useful than what I need it for would > increase its chance of being accepted. It's interesting to see that it had > the opposite effect. Yes. In this case it was not clear that anyone else could use it, and being less generic you can tweak the needs of the code to ima without anyone having to worry about it. So thank you very much for making the code more specific to the circumstances. > I reworked and simplified the code and folded the hand-over buffer patches > into Mimi's patch series to carry the measurement list across kexec. The > kexec buffer code is in the following patches now: > > [PATCH v5 01/10] powerpc: ima: Get the kexec buffer passed by the previous > kernel > [PATCH v5 05/10] powerpc: ima: Send the kexec buffer to the next > kernel That plus [PATCH v5 06/10] ima: on soft reboot, save the measurement list > Each patch has a changelog listing what I changed to make it specific to > IMA. I am a little sad to see you needed to modify kexec_file.c to get where you were going, but that isn't a huge issue either way. Eric
Re: [PATCH v5 00/10] ima: carry the measurement list across kexec
On Thu, 2016-09-29 at 16:37 -0500, Eric W. Biederman wrote: > Mimi Zohar writes: > > > The TPM PCRs are only reset on a hard reboot. In order to validate a > > TPM's quote after a soft reboot (eg. kexec -e), the IMA measurement list > > of the running kernel must be saved and then restored on the subsequent > > boot, possibly of a different architecture. > > > > The existing securityfs binary_runtime_measurements file conveniently > > provides a serialized format of the IMA measurement list. This patch > > set serializes the measurement list in this format and restores it. > > > > Up to now, the binary_runtime_measurements was defined as architecture > > native format. The assumption being that userspace could and would > > handle any architecture conversions. With the ability of carrying the > > measurement list across kexec, possibly from one architecture to a > > different one, the per boot architecture information is lost and with it > > the ability of recalculating the template digest hash. To resolve this > > problem, without breaking the existing ABI, this patch set introduces > > the boot command line option "ima_canonical_fmt", which is arbitrarily > > defined as little endian. > > > > The need for this boot command line option will be limited to the > > existing version 1 format of the binary_runtime_measurements. > > Subsequent formats will be defined as canonical format (eg. TPM 2.0 > > support for larger digests). > > > > A simplified method of Thiago Bauermann's "kexec buffer handover" patch > > series for carrying the IMA measurement list across kexec is included > > in this patch set. The simplified method requires all file measurements > > be taken prior to executing the kexec load, as subsequent measurements > > will not be carried across the kexec and restored. > > So I just went through the kexec portions of this and I don't see > anything particularly worrying. > > I have one thing that I think could be improved, but is not wrong. > Having both receiving and transmitting the ima measurments both under > HAVE_IMA_KEXEC seems wrong. There may be people who want to receive the > measurment list but don't want to support kexec'ing other kernels or the > other way around. I can very much see bootloaders that expect they will > be the first kernel to not want to compile in the extra code for > receiving the measurment list. > > But again that is a nit, and not a problem. Right, some kernels will want to carry the measurement list across kexec and have it restored on the kexec'ed kernel, whiles others won't. The CONFIG_IMA_KEXEC. enables "dumping" the IMA measurement list to be carried across kexec. > So for the series, from the kexec point of view. > > Acked-by: "Eric W. Biederman" Thanks, Eric! > > > > > These patches can also be found in the next-kexec-restore branch of: > > git://git.kernel.org/pub/scm/linux/kernel/git/zohar/linux-integrity.git > > > > Changelog v5: > > - Included patches from Thiago Bauermann's "kexec buffer handover" > > patch series for carrying the IMA measurement list across kexec. > > - Added CONFIG_HAVE_IMA_KEXEC > > - Renamed functions to variations of ima_kexec_buffer instead of > > variations of kexec_handover_buffer > > > > Changelog v4: > > - Fixed "spinlock bad magic" BUG - reported by Dmitry Vyukov > > - Rebased on Thiago Bauermann's v5 patch set > > - Removed the skip_checksum initialization > > > > Changelog v3: > > - Cleaned up the code for calculating the requested kexec segment size > > needed for the IMA measurement list, limiting the segment size to half > > of the totalram_pages. > > - Fixed kernel test robot reports as enumerated in the respective > > patch changelog. > > > > Changelog v2: > > - Canonical measurement list support added > > - Redefined the ima_kexec_hdr struct to use well defined sizes > > > > Andreas Steffen (1): > > ima: platform-independent hash value > > > > Mimi Zohar (7): > > ima: on soft reboot, restore the measurement list > > ima: permit duplicate measurement list entries > > ima: maintain memory size needed for serializing the measurement list > > ima: on soft reboot, save the measurement list > > ima: store the builtin/custom template definitions in a list > > ima: support restoring multiple template formats > > ima: define a canonical binary_runtime_measurements list format > > > > Thiago Jung Bauermann (2): > > powerpc: ima: Get the kexec buffer passed by the previous kernel > > powerpc: ima: Send the kexec buffer to the next kernel > > > > Documentation/kernel-parameters.txt | 4 + > > arch/Kconfig | 3 + > > arch/powerpc/Kconfig | 1 + > > arch/powerpc/include/asm/ima.h| 29 +++ > > arch/powerpc/include/asm/kexec.h | 16 +- > > arch/powerpc/kernel/Makefile | 4 + > > arch/powerpc/kernel/ima_kexec.c | 223 +++ > > arch/powerpc/kernel/kexec_elf_64.c
Re: [PATCH v21 00/20] perf, tools: Add support for PMU events in JSON format
Em Tue, Sep 27, 2016 at 04:18:46PM +0200, Jiri Olsa escreveu: > On Mon, Sep 26, 2016 at 09:59:54AM -0700, Andi Kleen wrote: > > On Mon, Sep 26, 2016 at 12:03:43PM -0300, Arnaldo Carvalho de Melo wrote: > > > Em Mon, Sep 26, 2016 at 10:35:33AM +0200, Jiri Olsa escreveu: > > > > ping.. is that working for you? IMO we can include this > > > > as additional patch to the set.. > > > > > > No, it doesn't fails to build on the first cross env I tried, fixing it > > > now, resulting patch: > > > > Yes it shouldn't be difficult to fix cross building. I don't think > > there are any fundamental problems. > > right, how about attached patch > > Arnaldo, > could you please try it on cross build.. I still dont have setup for that :-\ > > thanks, > jirka So, this makes it work for me in one of the cross build envs I have (all in https://hub.docker.com/r/acmel/) if I apply this patch on top: diff --git a/tools/build/Makefile b/tools/build/Makefile index 653faee2a055..8332959fbca4 100644 --- a/tools/build/Makefile +++ b/tools/build/Makefile @@ -42,7 +42,7 @@ $(OUTPUT)fixdep-in.o: FORCE $(Q)$(MAKE) $(build)=fixdep $(OUTPUT)fixdep: $(OUTPUT)fixdep-in.o - $(QUIET_LINK)$(CC) $(LDFLAGS) -o $@ $< + $(QUIET_LINK)$(HOSTCC) $(LDFLAGS) -o $@ $< FORCE: --- I've broken up the patch into multiple ones, to get first fixdep working, then to move to jevents, I'm putting this on a tmp.perf/hostprog branch till I've tested it all. - Arnaldo > > --- > diff --git a/tools/build/Build b/tools/build/Build > index 63a6c34c0c88..76d1a4960973 100644 > --- a/tools/build/Build > +++ b/tools/build/Build > @@ -1 +1,3 @@ > +hostprogs := fixdep > + > fixdep-y := fixdep.o > diff --git a/tools/build/Makefile b/tools/build/Makefile > index 0d5a0e3a8fa9..653faee2a055 100644 > --- a/tools/build/Makefile > +++ b/tools/build/Makefile > @@ -14,6 +14,12 @@ endef > $(call allow-override,CC,$(CROSS_COMPILE)gcc) > $(call allow-override,LD,$(CROSS_COMPILE)ld) > > +HOSTCC ?= gcc > +HOSTLD ?= ld > +HOSTAR ?= ar > + > +export HOSTCC HOSTLD HOSTAR > + > ifeq ($(V),1) >Q = > else > diff --git a/tools/build/Makefile.build b/tools/build/Makefile.build > index 27f3583193e6..031c5631cc21 100644 > --- a/tools/build/Makefile.build > +++ b/tools/build/Makefile.build > @@ -58,6 +58,9 @@ quiet_cmd_mkdir = MKDIR$(dir $@) > quiet_cmd_cc_o_c = CC $@ >cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $< > > +quiet_cmd_host_cc_o_c = HOSTCC $@ > + cmd_host_cc_o_c = $(HOSTCC) $(c_flags) -c -o $@ $< > + > quiet_cmd_cpp_i_c = CPP $@ >cmd_cpp_i_c = $(CC) $(c_flags) -E -o $@ $< > > @@ -70,16 +73,24 @@ quiet_cmd_gen = GEN $@ > # If there's nothing to link, create empty $@ object. > quiet_cmd_ld_multi = LD $@ >cmd_ld_multi = $(if $(strip $(obj-y)),\ > -$(LD) -r -o $@ $(filter $(obj-y),$^),rm -f $@; $(AR) > rcs $@) > + $(LD) -r -o $@ $(filter $(obj-y),$^),rm -f $@; $(AR) > rcs $@) > + > +quiet_cmd_host_ld_multi = HOSTLD $@ > + cmd_host_ld_multi = $(if $(strip $(obj-y)),\ > + $(HOSTLD) -r -o $@ $(filter $(obj-y),$^),rm -f > $@; $(HOSTAR) rcs $@) > + > +ifneq ($(filter $(obj),$(hostprogs)),) > + host = host_ > +endif > > # Build rules > $(OUTPUT)%.o: %.c FORCE > $(call rule_mkdir) > - $(call if_changed_dep,cc_o_c) > + $(call if_changed_dep,$(host)cc_o_c) > > $(OUTPUT)%.o: %.S FORCE > $(call rule_mkdir) > - $(call if_changed_dep,cc_o_c) > + $(call if_changed_dep,$(host)cc_o_c) > > $(OUTPUT)%.i: %.c FORCE > $(call rule_mkdir) > @@ -119,7 +130,7 @@ $(sort $(subdir-obj-y)): $(subdir-y) ; > > $(in-target): $(obj-y) FORCE > $(call rule_mkdir) > - $(call if_changed,ld_multi) > + $(call if_changed,$(host)ld_multi) > > __build: $(in-target) > @: > diff --git a/tools/build/Makefile.include b/tools/build/Makefile.include > index be630bed66d2..ad22e4e7bc59 100644 > --- a/tools/build/Makefile.include > +++ b/tools/build/Makefile.include > @@ -1,10 +1,6 @@ > build := -f $(srctree)/tools/build/Makefile.build dir=. obj > > -ifdef CROSS_COMPILE > -fixdep: > -else > fixdep: > $(Q)$(MAKE) -C $(srctree)/tools/build CFLAGS= LDFLAGS= $(OUTPUT)fixdep > -endif > > .PHONY: fixdep > diff --git a/tools/perf/Makefile.perf b/tools/perf/Makefile.perf > index 0abebcba849f..1347b5de3669 100644 > --- a/tools/perf/Makefile.perf > +++ b/tools/perf/Makefile.perf > @@ -144,6 +144,10 @@ $(call allow-override,LD,$(CROSS_COMPILE)ld) > > LD += $(EXTRA_LDFLAGS) > > +HOSTCC ?= gcc > +HOSTLD ?= ld > +HOSTAR ?= ar > + > PKG_CONFIG = $(CROSS_COMPILE)pkg-config > > RM = rm -f > @@ -345,6 +349,7 @@ strip: $(PROGRAMS) $(OUTPUT)perf > PERF_IN := $(OUTPUT)perf-in.o > > export srctree OUTPUT RM CC LD AR CFLAGS V BISON FLEX AWK > +export HOSTCC HOSTLD HOSTAR > include $(srctree)/tools/build/Makefile.include > > JEVENTS := $(OUTPUT)pmu-even
Re: [PATHC v2 0/9] ima: carry the measurement list across kexec
Am Donnerstag, 29 September 2016, 16:43:08 schrieb Eric W. Biederman: > Thiago Jung Bauermann writes: > > Hello Eric, > > > > Am Dienstag, 20 September 2016, 11:07:29 schrieb Eric W. Biederman: > >> A semi-generic concept called a hand-over buffer seems to be a > >> construction of infrustructure for no actual reason that will just > >> result in confusion. There are lots of things that are handed over, > >> the > >> flattend device tree, ramdisks, bootparams on x86, etc, etc. ima is > >> not > >> special in this execpt for being perhaps the first addition that we are > >> going to want the option of including on most architectures. > > > > Ok, I understand. I decided to implement a generic concept because I > > thought that proposing a feature that is more useful than what I need > > it for would increase its chance of being accepted. It's interesting to > > see that it had the opposite effect. > > Yes. In this case it was not clear that anyone else could use it, and > being less generic you can tweak the needs of the code to ima without > anyone having to worry about it. > > So thank you very much for making the code more specific to the > circumstances. Thank you very much for your feedback and your reviews! -- []'s Thiago Jung Bauermann IBM Linux Technology Center
[PATCH v2 1/2] pci: Call pcibios_sriov_enable() before IOV BARs are enabled
In current implementation, pcibios_sriov_enable() is used by PPC
PowerNV platform only. In PowerNV specific pcibios_sriov_enable(),
PF's IOV BARs might be updated (shifted) by pci_update_resource().
It means the IOV BARs aren't ready for decoding incoming memory
address until pcibios_sriov_enable() returns.
This calls pcibios_sriov_enable() earlier before the IOV BARs are
enabled. As the result, the IOV BARs have been configured correctly
when they are enabled.
Signed-off-by: Gavin Shan
Tested-by: Carol Soto
---
drivers/pci/iov.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 2194b44..f1343f0 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -303,13 +303,6 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
return rc;
}
- pci_iov_set_numvfs(dev, nr_virtfn);
- iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
- pci_cfg_access_lock(dev);
- pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
- msleep(100);
- pci_cfg_access_unlock(dev);
-
iov->initial_VFs = initial;
if (nr_virtfn < initial)
initial = nr_virtfn;
@@ -320,6 +313,13 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
goto err_pcibios;
}
+ pci_iov_set_numvfs(dev, nr_virtfn);
+ iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
+ pci_cfg_access_lock(dev);
+ pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
+ msleep(100);
+ pci_cfg_access_unlock(dev);
+
for (i = 0; i < initial; i++) {
rc = pci_iov_add_virtfn(dev, i, 0);
if (rc)
--
2.1.0
[PATCH v2 2/2] PCI: Don't disable PF's memory decoding when enabling SRIOV
pci_update_resource() might be called to update (shift) IOV BARs
in PPC PowerNV specific pcibios_sriov_enable() when enabling PF's
SRIOV capability. At that point, the PF have been functional if
the SRIOV is enabled through sysfs entry "sriov_numvfs". The PF's
memory decoding (0x2 in PCI_COMMAND) shouldn't be disabled when
updating its IOV BARs with pci_update_resource(). Otherwise, we
receives EEH error caused by MMIO access to PF's memory BARs during
the window when PF's memory decoding is disabled.
sriov_numvfs_store
pdev->driver->sriov_configure
mlx5_core_sriov_configure
pci_enable_sriov
sriov_enable
pcibios_sriov_enable
pnv_pci_sriov_enable
pnv_pci_vf_resource_shift
pci_update_resource
This doesn't change the PF's memory decoding in the path by introducing
additional parameter (@mmio_force_on) to pci_update_resource() in
the above path.
Reported-by: Carol Soto
Signed-off-by: Gavin Shan
Tested-by: Carol Soto
---
arch/powerpc/platforms/powernv/pci-ioda.c | 2 +-
drivers/pci/iov.c | 2 +-
drivers/pci/pci.c | 2 +-
drivers/pci/setup-res.c | 9 +
include/linux/pci.h | 2 +-
5 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 38a5c65..f4ccc5b 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1006,7 +1006,7 @@ static int pnv_pci_vf_resource_shift(struct pci_dev *dev,
int offset)
dev_info(&dev->dev, "VF BAR%d: %pR shifted to %pR (%sabling %d
VFs shifted by %d)\n",
i, &res2, res, (offset > 0) ? "En" : "Dis",
num_vfs, offset);
- pci_update_resource(dev, i + PCI_IOV_RESOURCES);
+ pci_update_resource(dev, i + PCI_IOV_RESOURCES, true);
}
return 0;
}
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index f1343f0..db31966 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -511,7 +511,7 @@ static void sriov_restore_state(struct pci_dev *dev)
return;
for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
- pci_update_resource(dev, i);
+ pci_update_resource(dev, i, false);
pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
pci_iov_set_numvfs(dev, iov->num_VFs);
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index aab9d51..87a33c0 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -545,7 +545,7 @@ static void pci_restore_bars(struct pci_dev *dev)
return;
for (i = 0; i < PCI_BRIDGE_RESOURCES; i++)
- pci_update_resource(dev, i);
+ pci_update_resource(dev, i, false);
}
static const struct pci_platform_pm_ops *pci_platform_pm;
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index 66c4d8f..e8a50ff 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -26,7 +26,7 @@
#include "pci.h"
-void pci_update_resource(struct pci_dev *dev, int resno)
+void pci_update_resource(struct pci_dev *dev, int resno, bool mmio_force_on)
{
struct pci_bus_region region;
bool disable;
@@ -81,7 +81,8 @@ void pci_update_resource(struct pci_dev *dev, int resno)
* disable decoding so that a half-updated BAR won't conflict
* with another device.
*/
- disable = (res->flags & IORESOURCE_MEM_64) && !dev->mmio_always_on;
+ disable = (res->flags & IORESOURCE_MEM_64) &&
+ !mmio_force_on && !dev->mmio_always_on;
if (disable) {
pci_read_config_word(dev, PCI_COMMAND, &cmd);
pci_write_config_word(dev, PCI_COMMAND,
@@ -310,7 +311,7 @@ int pci_assign_resource(struct pci_dev *dev, int resno)
res->flags &= ~IORESOURCE_STARTALIGN;
dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
if (resno < PCI_BRIDGE_RESOURCES)
- pci_update_resource(dev, resno);
+ pci_update_resource(dev, resno, false);
return 0;
}
@@ -350,7 +351,7 @@ int pci_reassign_resource(struct pci_dev *dev, int resno,
resource_size_t addsiz
dev_info(&dev->dev, "BAR %d: reassigned %pR (expanded by %#llx)\n",
resno, res, (unsigned long long) addsize);
if (resno < PCI_BRIDGE_RESOURCES)
- pci_update_resource(dev, resno);
+ pci_update_resource(dev, resno, false);
return 0;
}
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 0ab8359..99231d1 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1039,7 +1039,7 @@ int pci_try_reset_bus(struct pci_bus *bus);
void pci_reset_secondary_bus(struct pci_dev *dev);
void pcibios_reset_secondary_bus(struct pci_dev *dev);
void pci_reset_bridge_secondary_bus(struct pci_dev *dev);
-void pci_update_res
Re: [PATCH] PCI: Add parameter @mmio_force_on to pci_update_resource()
On Wed, Sep 28, 2016 at 11:14:08AM +1000, Gavin Shan wrote:
>On Wed, Sep 28, 2016 at 10:06:44AM +1000, Benjamin Herrenschmidt wrote:
>>On Wed, 2016-09-28 at 09:37 +1000, Gavin Shan wrote:
>>>
>>> Yeah, it's safe to update it with memory decoding on. As the function call
>>> flow I listed in the changelog (as below), nobody should access the IOV BAR
>>> when pci_update_resource() is called. However, the PF's memory BARs might
>>> be accessed that time and it's not safe to disable PF's memory decoding.
>>
>>The problem isn't so much whether anybody accesses the IOV BAR while
>>it's updated but whether the IOV BAR will decode at all.
>>
>>IE. The BAR is updated in two steps, 32-bit each. That means that there
>>is a window where it contains a "bogus" value.
>>
>>If that bogus value conflicts with another BAR (another BAR of the PF
>>or another PF of the same device for example) then there is a risk of
>>something bad happening if the driver accesses that conflicting
>>resource during that window.
>>
>>On the other hand, if the IOV BAR doesn't decode at all while the
>>update is done, which I think is the case as I believe SR-IOV isn't
>>enabled during the update (please verify), then we are safe.
>>
>
>I assumed the SRIOV and its memory space aren't enabled when updating IOV
>BARs, but unfortunately they have been enabled at that point. I think
>pcibios_sriov_enable() should be moved before SRIOV is enabled. Note
>that pcibios_sriov_enable() is used by PowerNV only.
>
>static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
>{
> :
>pci_iov_set_numvfs(dev, nr_virtfn);
>iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
>pci_cfg_access_lock(dev);
>pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
> /* SRIOV and its memory space enabled */
>msleep(100);
>pci_cfg_access_unlock(dev);
>
>iov->initial_VFs = initial;
>if (nr_virtfn < initial)
>initial = nr_virtfn;
>
>rc = pcibios_sriov_enable(dev, initial);
> /* IOV BARs are updated inside it */
>
> :
>}
>
I will add one patch in v2, to call pcibios_sriov_enable() before IOV BARs
are enabled. v2 will be posted shortly.
Thanks,
Gavin
[PATCH] powerpc/fadump: Fix build break when CONFIG_PROC_VMCORE=n
The fadump code calls vmcore_cleanup() which only exists if CONFIG_PROC_VMCORE=y. We don't want to depend on CONFIG_PROC_VMCORE, because it's user selectable, so just wrap the call in an #ifdef. Signed-off-by: Michael Ellerman --- arch/powerpc/kernel/fadump.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/kernel/fadump.c b/arch/powerpc/kernel/fadump.c index b3a66d36..8d461303dd13 100644 --- a/arch/powerpc/kernel/fadump.c +++ b/arch/powerpc/kernel/fadump.c @@ -1104,7 +1104,9 @@ static ssize_t fadump_release_memory_store(struct kobject *kobj, * Take away the '/proc/vmcore'. We are releasing the dump * memory, hence it will not be valid anymore. */ +#ifdef CONFIG_PROC_VMCORE vmcore_cleanup(); +#endif fadump_invalidate_release_mem(); } else -- 2.7.4
Re: [PATCH v14 13/15] selftests/powerpc: Add ptrace tests for TM SPR registers
Hi Cyril,
On Wed, Sep 14, 2016 at 03:04:12PM +1000, Cyril Bur wrote:
> On Mon, 2016-09-12 at 15:33 +0800, wei.guo.si...@gmail.com wrote:
> > From: Anshuman Khandual
> >
> > This patch adds ptrace interface test for TM SPR registers. This
> > also adds ptrace interface based helper functions related to TM
> > SPR registers access.
> >
>
> I'm seeing this one fail a lot, it does occasionally succeed but fails
> a lot on my test setup.
>
> I use qemu on a power8 for most of my testing:
> qemu-system-ppc64 --enable-kvm -machine pseries,accel=kvm,usb=off -m
> 4096 -realtime mlock=off -smp 4,sockets=1,cores=2,threads=2 -nographic
> -vga none
>
>
> > Signed-off-by: Anshuman Khandual
> > Signed-off-by: Simon Guo
> > ---
> > tools/testing/selftests/powerpc/ptrace/Makefile| 3 +-
> > .../selftests/powerpc/ptrace/ptrace-tm-spr.c | 186
> > +
> > tools/testing/selftests/powerpc/ptrace/ptrace.h| 35
> > 3 files changed, 223 insertions(+), 1 deletion(-)
> > create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-
> > spr.c
> >
> > diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile
> > b/tools/testing/selftests/powerpc/ptrace/Makefile
> > index 797840a..f34670e 100644
> > --- a/tools/testing/selftests/powerpc/ptrace/Makefile
> > +++ b/tools/testing/selftests/powerpc/ptrace/Makefile
> > @@ -1,7 +1,8 @@
> > TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
> > \
> > ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
> > \
> > -ptrace-tm-spd-vsx
> > +ptrace-tm-spd-vsx ptrace-tm-spr
> >
> > +include ../../lib.mk
> >
> > all: $(TEST_PROGS)
> > CFLAGS += -m64
> > diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
> > b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
> > new file mode 100644
> > index 000..2863070
> > --- /dev/null
> > +++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
> > @@ -0,0 +1,186 @@
> > +/*
> > + * Ptrace test TM SPR registers
> > + *
> > + * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License
> > + * as published by the Free Software Foundation; either version
> > + * 2 of the License, or (at your option) any later version.
> > + */
> > +#include "ptrace.h"
> > +
> > +/* Tracee and tracer shared data */
> > +struct shared {
> > + int flag;
> > + struct tm_spr_regs regs;
> > +};
> > +unsigned long tfhar;
> > +
> > +int shm_id;
> > +volatile struct shared *cptr, *pptr;
> > +
> > +int shm_id1;
> > +volatile int *cptr1, *pptr1;
> > +
> > +#define TM_SCHED 0xde018c01
> > +#define TM_KVM_SCHED 0xe001ac01
> > +
> > +int validate_tm_spr(struct tm_spr_regs *regs)
> > +{
> > + if (regs->tm_tfhar != tfhar)
> > + return TEST_FAIL;
> > +
> > + if ((regs->tm_texasr != TM_SCHED) && (regs->tm_texasr !=
> > TM_KVM_SCHED))
> > + return TEST_FAIL;
>
> The above condition fails, should this test try again if this condition
> is true, rather than fail?
>
I reproduced the failure with your configuration. Besides treclaim, there are
many other reasons that may lead to the transaction failure according to ISA.
At least I observed following Texasr values:
11801
18801
1a801
I noticed some FIAR locates at IPI handling related code. My previous
configuration
is 4 sockets/each with only 1 core/1 thread. That is probably the reason I
always
passed the test in the old configuration.(per my understanding, IPI is limited
within
threads). So I removed the checking regarding specfied TEXASR value.
And I think I have reworked all your other comments.
I will send out v15 soon. Again thanks for your code inspection.
BR,
- Simon
[PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers
From: Simon Guo This selftest suite is for PPC register ptrace functionality. It is also useful for Transaction Memory functionality verification. Signed-off-by: Anshuman Khandual Signed-off-by: Simon Guo Test Result (All tests pass on both BE and LE) -- ptrace-ebb PASS ptrace-gpr PASS ptrace-tm-gpr PASS ptrace-tm-spd-gpr PASS ptrace-tar PASS ptrace-tm-tar PASS ptrace-tm-spd-tar PASS ptrace-vsx PASS ptrace-tm-vsx PASS ptrace-tm-spd-vsx PASS ptrace-tm-spr PASS Previous versions: == RFC: https://lkml.org/lkml/2014/4/1/292 V1: https://lkml.org/lkml/2014/4/2/43 V2: https://lkml.org/lkml/2014/5/5/88 V3: https://lkml.org/lkml/2014/5/23/486 V4: https://lkml.org/lkml/2014/11/11/6 V5: https://lkml.org/lkml/2014/11/25/134 V6: https://lkml.org/lkml/2014/12/2/98 V7: https://lkml.org/lkml/2015/1/14/19 V8: https://lkml.org/lkml/2015/5/19/700 V9: https://lkml.org/lkml/2015/10/8/522 V10: https://lkml.org/lkml/2016/2/16/219 V11: https://lkml.org/lkml/2016/7/16/231 V12: https://lkml.org/lkml/2016/7/27/134 V13: https://lkml.org/lkml/2016/7/27/656 V14: https://lkml.org/lkml/2016/9/12/57 Changes in V15: --- - Squash patch 1 and 2 to avoid compile error after patch 1. - Reorganize some code across patch 3 and 4 to avoid compile error - Created a new directory utility under tools/testing/selftesting/powerpc to organize common APIs across selftests. - Use "tbegin." instead of TBEGIN macro. The same for other TM instructions. - Correct while(ptr); loop without memory barrier. - Remove an invalid checking on TEXASR in tm-spd-spr.c. - Use FAIL_IF() as possible to indicate failure line conveniently. - Consolidate some asm code on GPR/FPR load/save into reg.h/reg.S - rebased to recent ppc git tree. Changes in V14: --- - Remove duplicated NT_PPC_xxx register macro in tools/testing/selftests/powerpc/ptrace/ptrace.h - Clean some coding style warning Changes in V13: --- - Remove Cc lines from changelog - Add more Signed-off-by lines of Simon Guo Changes in V12: --- - Revert change which is trying to incoporate following patch: [PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live registers - Release share memory resource in all self test cases - Optimize tfhar usage in ptrace-tm-spr.c Changes in V11: --- - Rework based on following patch: [PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live registers - Split EBB/PMU register ptrace implementation. - Clean some coding style warning - Added more shared memory based sync between parent and child during TM tests - Re worded some of the commit messages and cleaned them up - selftests/powerpc/ebb/reg.h has already moved as selftests/powerpc/reg.h Dropped the previous patch doing the same thing - Combined the definitions of SPRN_DSCR from dscr/ test cases - Fixed dscr/ test cases for new SPRN_DSCR_PRIV definition available Changes in V10: --- - Rebased against the latest mainline - Fixed couple of build failures in the test cases related to aux vector Changes in V9: -- - Fixed static build check failure after tm_orig_msr got dropped - Fixed asm volatile construct for used registers set - Fixed EBB, VSX, VMX tests for LE - Fixed TAR test which was failing because of system calls - Added checks for PPC_FEATURE2_HTM aux feature in the tests - Fixed copyright statements Changes in V8: -- - Split the misc register set into individual ELF core notes - Implemented support for VSX register set (on and off TM) - Implemented support for EBB register set - Implemented review comments on previous versions - Some code re-arrangements, re-writes and documentation - Added comprehensive list of test cases into selftests Changes in V7: -- - Fixed a config directive in the MISC code - Merged the two gitignore patches into a single one Changes in V6: -- - Added two git ignore patches for powerpc selftests - Re-formatted all in-code function definitions in kernel-doc format Changes in V5: -- - Changed flush_tmregs_to_thread, so not to take into account self tracing - Dropped the 3rd patch in the series which had merged two functions - Fixed one build problem for the misc debug register patch - Accommodated almost all the review comments from Suka on the 6th patch - Minor changes to the self test program - Changed commit messages for some of the patches Changes in V4: -- - Added one test program into the powerpc selftest bucket in this regard - Split the 2nd patch in the previous series into four different patches - Accommodated most of the review comments on the previous patch series - Added a patch to merge functions __switch_to_tm and tm_reclaim_task Changes in V3: -- - Added two new error paths in every TM related g
[PATCH v15 01/15] selftests/powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h'/'instructions.h'
From: Anshuman Khandual
This patch adds SPR number for TAR, PPR, DSCR special
purpose registers. It also adds TM, VSX, VMX related
instructions which will then be used by patches later
in the series.
Now that the new DSCR register definitions (SPRN_DSCR_PRIV and
SPRN_DSCR) are defined outside this directory, use them instead.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/dscr/dscr.h | 10 -
tools/testing/selftests/powerpc/reg.h | 35 ++---
2 files changed, 36 insertions(+), 9 deletions(-)
diff --git a/tools/testing/selftests/powerpc/dscr/dscr.h
b/tools/testing/selftests/powerpc/dscr/dscr.h
index a36af1b..18ea223b 100644
--- a/tools/testing/selftests/powerpc/dscr/dscr.h
+++ b/tools/testing/selftests/powerpc/dscr/dscr.h
@@ -28,8 +28,6 @@
#include "utils.h"
-#define SPRN_DSCR 0x11/* Privilege state SPR */
-#define SPRN_DSCR_USR 0x03/* Problem state SPR */
#define THREADS100 /* Max threads */
#define COUNT 100 /* Max iterations */
#define DSCR_MAX 16 /* Max DSCR value */
@@ -48,14 +46,14 @@ inline unsigned long get_dscr(void)
{
unsigned long ret;
- asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR));
+ asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR_PRIV));
return ret;
}
inline void set_dscr(unsigned long val)
{
- asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
+ asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_PRIV));
}
/* Problem state DSCR access */
@@ -63,14 +61,14 @@ inline unsigned long get_dscr_usr(void)
{
unsigned long ret;
- asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR_USR));
+ asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR));
return ret;
}
inline void set_dscr_usr(unsigned long val)
{
- asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_USR));
+ asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
}
/* Default DSCR access */
diff --git a/tools/testing/selftests/powerpc/reg.h
b/tools/testing/selftests/powerpc/reg.h
index fddf368..f5d33db 100644
--- a/tools/testing/selftests/powerpc/reg.h
+++ b/tools/testing/selftests/powerpc/reg.h
@@ -51,10 +51,39 @@
#define SPRN_SDAR 781
#define SPRN_SIER 768
-#define SPRN_TEXASR 0x82
+#define SPRN_TEXASR 0x82/* Transaction Exception and Status Register */
#define SPRN_TFIAR 0x81/* Transaction Failure Inst Addr*/
#define SPRN_TFHAR 0x80/* Transaction Failure Handler Addr */
-#define TEXASR_FS 0x0800
-#define SPRN_TAR0x32f
+#define SPRN_TAR0x32f /* Target Address Register */
+
+#define SPRN_DSCR_PRIV 0x11/* Privilege State DSCR */
+#define SPRN_DSCR 0x03/* Data Stream Control Register */
+#define SPRN_PPR 896 /* Program Priority Register */
+
+/* TEXASR register bits */
+#define TEXASR_FC 0xFE00
+#define TEXASR_FP 0x0100
+#define TEXASR_DA 0x0080
+#define TEXASR_NO 0x0040
+#define TEXASR_FO 0x0020
+#define TEXASR_SIC 0x0010
+#define TEXASR_NTC 0x0008
+#define TEXASR_TC 0x0004
+#define TEXASR_TIC 0x0002
+#define TEXASR_IC 0x0001
+#define TEXASR_IFC 0x8000
+#define TEXASR_ABT 0x0001
+#define TEXASR_SPD 0x8000
+#define TEXASR_HV 0x2000
+#define TEXASR_PR 0x1000
+#define TEXASR_FS 0x0800
+#define TEXASR_TE 0x0400
+#define TEXASR_ROT 0x0200
+
+/* Vector Instructions */
+#define VSX_XX1(xs, ra, rb)(((xs) & 0x1f) << 21 | ((ra) << 16) | \
+((rb) << 11) | (((xs) >> 5)))
+#define STXVD2X(xs, ra, rb).long (0x7c000798 | VSX_XX1((xs), (ra), (rb)))
+#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb)))
#endif /* _SELFTESTS_POWERPC_REG_H */
--
1.8.3.1
[PATCH v15 02/15] selftests/powerpc: move shared utility files into new utility/ dir
From: Simon Guo There are some functions, especially register related, which can be shared across multiple selftests/powerpc test directories. This patch creates a new utility directory to store those shared functionalities, so that the file layout becomes more neat. Signed-off-by: Simon Guo --- tools/testing/selftests/powerpc/Makefile | 2 +- tools/testing/selftests/powerpc/alignment/Makefile | 2 +- tools/testing/selftests/powerpc/basic_asm.h| 70 - .../testing/selftests/powerpc/benchmarks/Makefile | 2 +- .../selftests/powerpc/benchmarks/context_switch.c | 2 +- .../selftests/powerpc/context_switch/Makefile | 2 +- .../testing/selftests/powerpc/copyloops/validate.c | 2 +- tools/testing/selftests/powerpc/instructions.h | 68 - tools/testing/selftests/powerpc/math/fpu_asm.S | 2 +- tools/testing/selftests/powerpc/math/vmx_asm.S | 2 +- tools/testing/selftests/powerpc/mm/Makefile| 2 +- tools/testing/selftests/powerpc/pmu/Makefile | 4 +- tools/testing/selftests/powerpc/pmu/ebb/Makefile | 2 +- tools/testing/selftests/powerpc/reg.h | 89 -- .../testing/selftests/powerpc/stringloops/memcmp.c | 2 +- tools/testing/selftests/powerpc/tm/Makefile| 2 +- tools/testing/selftests/powerpc/tm/tm.h| 2 +- .../testing/selftests/powerpc/utility/basic_asm.h | 73 ++ .../selftests/powerpc/utility/instructions.h | 68 + tools/testing/selftests/powerpc/utility/reg.h | 89 ++ tools/testing/selftests/powerpc/utility/utils.c| 87 + tools/testing/selftests/powerpc/utility/utils.h| 70 + tools/testing/selftests/powerpc/utils.c| 87 - tools/testing/selftests/powerpc/utils.h| 70 - 24 files changed, 402 insertions(+), 399 deletions(-) delete mode 100644 tools/testing/selftests/powerpc/basic_asm.h delete mode 100644 tools/testing/selftests/powerpc/instructions.h delete mode 100644 tools/testing/selftests/powerpc/reg.h create mode 100644 tools/testing/selftests/powerpc/utility/basic_asm.h create mode 100644 tools/testing/selftests/powerpc/utility/instructions.h create mode 100644 tools/testing/selftests/powerpc/utility/reg.h create mode 100644 tools/testing/selftests/powerpc/utility/utils.c create mode 100644 tools/testing/selftests/powerpc/utility/utils.h delete mode 100644 tools/testing/selftests/powerpc/utils.c delete mode 100644 tools/testing/selftests/powerpc/utils.h diff --git a/tools/testing/selftests/powerpc/Makefile b/tools/testing/selftests/powerpc/Makefile index 1cc6d64..b6eb817 100644 --- a/tools/testing/selftests/powerpc/Makefile +++ b/tools/testing/selftests/powerpc/Makefile @@ -8,7 +8,7 @@ ifeq ($(ARCH),powerpc) GIT_VERSION = $(shell git describe --always --long --dirty || echo "unknown") -CFLAGS := -std=gnu99 -Wall -O2 -Wall -Werror -DGIT_VERSION='"$(GIT_VERSION)"' -I$(CURDIR) $(CFLAGS) +CFLAGS := -std=gnu99 -Wall -O2 -Wall -Werror -DGIT_VERSION='"$(GIT_VERSION)"' -I$(CURDIR) -I$(CURDIR)/utility $(CFLAGS) export CFLAGS diff --git a/tools/testing/selftests/powerpc/alignment/Makefile b/tools/testing/selftests/powerpc/alignment/Makefile index ad6a4e4..b61e5e7 100644 --- a/tools/testing/selftests/powerpc/alignment/Makefile +++ b/tools/testing/selftests/powerpc/alignment/Makefile @@ -2,7 +2,7 @@ TEST_PROGS := copy_unaligned copy_first_unaligned paste_unaligned paste_last_una all: $(TEST_PROGS) -$(TEST_PROGS): ../harness.c ../utils.c copy_paste_unaligned_common.c +$(TEST_PROGS): ../harness.c ../utility/utils.c copy_paste_unaligned_common.c include ../../lib.mk diff --git a/tools/testing/selftests/powerpc/basic_asm.h b/tools/testing/selftests/powerpc/basic_asm.h deleted file mode 100644 index 3349a07..000 --- a/tools/testing/selftests/powerpc/basic_asm.h +++ /dev/null @@ -1,70 +0,0 @@ -#ifndef _SELFTESTS_POWERPC_BASIC_ASM_H -#define _SELFTESTS_POWERPC_BASIC_ASM_H - -#include -#include - -#define LOAD_REG_IMMEDIATE(reg,expr) \ - lis reg,(expr)@highest; \ - ori reg,reg,(expr)@higher; \ - rldicr reg,reg,32,31; \ - orisreg,reg,(expr)@high;\ - ori reg,reg,(expr)@l; - -/* - * Note: These macros assume that variables being stored on the stack are - * doublewords, while this is usually the case it may not always be the - * case for each use case. - */ -#if defined(_CALL_ELF) && _CALL_ELF == 2 -#define STACK_FRAME_MIN_SIZE 32 -#define STACK_FRAME_TOC_POS 24 -#define __STACK_FRAME_PARAM(_param) (32 + ((_param)*8)) -#define __STACK_FRAME_LOCAL(_num_params,_var_num) ((STACK_FRAME_PARAM(_num_params)) + ((_var_num)*8)) -#else -#define STACK_FRAME_MIN_SIZE 112 -#define STACK_FRAME_TOC_POS 40 -#define __STACK_FRAME_PARAM(i) (48 + ((i)*8)) - -/* - * Caveat: if a function passed more than 8 doublewords, the caller w
[PATCH v15 03/15] selftests/powerpc: Add ptrace tests for EBB
From: Anshuman Khandual
This patch adds ptrace interface test for EBB/PMU specific
registers. This also adds some generic ptrace interface
based helper functions to be used by other patches later
on in the series.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/Makefile | 3 +-
tools/testing/selftests/powerpc/ptrace/Makefile| 11 +
.../testing/selftests/powerpc/ptrace/ptrace-ebb.c | 187 +
.../testing/selftests/powerpc/ptrace/ptrace-ebb.h | 99 +
tools/testing/selftests/powerpc/ptrace/ptrace.h| 225 +
5 files changed, 524 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/Makefile
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.h
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace.h
diff --git a/tools/testing/selftests/powerpc/Makefile
b/tools/testing/selftests/powerpc/Makefile
index b6eb817..2fe383c 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -25,7 +25,8 @@ SUB_DIRS = alignment \
syscalls \
tm \
vphn \
- math
+ math \
+ ptrace
endif
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile
b/tools/testing/selftests/powerpc/ptrace/Makefile
new file mode 100644
index 000..84c1c01
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -0,0 +1,11 @@
+TEST_PROGS := ptrace-ebb
+
+include ../../lib.mk
+
+all: $(TEST_PROGS)
+CFLAGS += -m64
+$(TEST_PROGS): ../harness.c ../utility/utils.c ptrace.h
+ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S
../pmu/ebb/busy_loop.S
+ptrace-ebb: CFLAGS += -I../pmu/ebb
+clean:
+ rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
new file mode 100644
index 000..1ec4a6b
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
@@ -0,0 +1,187 @@
+/*
+ * Ptrace interface test for EBB
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ebb.h"
+#include "ptrace.h"
+#include "ptrace-ebb.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+void ebb(void)
+{
+ struct event event;
+
+ cptr = (int *)shmat(shm_id, NULL, 0);
+
+ event_init_named(&event, 0x1001e, "cycles");
+ event.attr.config |= (1ull << 63);
+ event.attr.exclusive = 1;
+ event.attr.pinned = 1;
+ event.attr.exclude_kernel = 1;
+ event.attr.exclude_hv = 1;
+ event.attr.exclude_idle = 1;
+
+ if (event_open(&event)) {
+ perror("event_open() failed");
+ exit(1);
+ }
+
+ setup_ebb_handler(standard_ebb_callee);
+ mtspr(SPRN_BESCR, 0x8001ull);
+
+ /*
+* make sure BESCR has been set before continue
+*/
+ mb();
+
+ if (ebb_event_enable(&event)) {
+ perror("ebb_event_handler() failed");
+ exit(1);
+ }
+
+ mtspr(SPRN_PMC1, pmc_sample_period(SAMPLE_PERIOD));
+ core_busy_loop();
+ cptr[0] = 1;
+ while (1)
+ asm volatile("" : : : "memory");
+
+ exit(0);
+}
+
+int validate_ebb(struct ebb_regs *regs)
+{
+ #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+ struct opd *opd = (struct opd *) ebb_handler;
+ #endif
+
+ printf("EBBRR: %lx\n", regs->ebbrr);
+ #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+ printf("EBBHR: %lx; expected: %lx\n",
+ regs->ebbhr, (unsigned long)opd->entry);
+ #else
+ printf("EBBHR: %lx; expected: %lx\n",
+ regs->ebbhr, (unsigned long)ebb_handler);
+ #endif
+ printf("BESCR: %lx\n", regs->bescr);
+
+ #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+ if (regs->ebbhr != opd->entry)
+ return TEST_FAIL;
+ #else
+ if (regs->ebbhr != (unsigned long) ebb_handler)
+ return TEST_FAIL;
+ #endif
+
+ return TEST_PASS;
+}
+
+int validate_pmu(struct pmu_regs *regs)
+{
+ printf("SIAR: %lx\n", regs->siar);
+ printf("SDAR: %lx\n", regs->sdar);
+ printf("SIER: %lx; expected: %lx\n",
+ regs->sier, (unsigned long)SIER_EXP);
+ printf("MMCR2: %lx; expected: %lx\n",
+ regs->mmcr2, (unsigned long)MMCR2_EXP);
+ printf("MMCR0: %lx; expected: %lx\n",
+ regs->mmcr0, (unsigned lo
[PATCH v15 04/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers
From: Anshuman Khandual
This patch adds ptrace interface test for GPR/FPR registers.
This adds ptrace interface based helper functions related to
GPR/FPR access and some assembly helper functions related to
GPR/FPR registers.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/math/fpu_asm.S | 42 +---
tools/testing/selftests/powerpc/ptrace/Makefile| 4 +-
.../testing/selftests/powerpc/ptrace/ptrace-gpr.c | 123
.../testing/selftests/powerpc/ptrace/ptrace-gpr.h | 74
tools/testing/selftests/powerpc/ptrace/ptrace.h| 211 +
tools/testing/selftests/powerpc/utility/reg.S | 132 +
tools/testing/selftests/powerpc/utility/reg.h | 101 ++
7 files changed, 645 insertions(+), 42 deletions(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.h
create mode 100644 tools/testing/selftests/powerpc/utility/reg.S
diff --git a/tools/testing/selftests/powerpc/math/fpu_asm.S
b/tools/testing/selftests/powerpc/math/fpu_asm.S
index 8d4eb96..6e423fa 100644
--- a/tools/testing/selftests/powerpc/math/fpu_asm.S
+++ b/tools/testing/selftests/powerpc/math/fpu_asm.S
@@ -8,49 +8,11 @@
*/
#include "basic_asm.h"
-
-#define PUSH_FPU(pos) \
- stfdf14,pos(sp); \
- stfdf15,pos+8(sp); \
- stfdf16,pos+16(sp); \
- stfdf17,pos+24(sp); \
- stfdf18,pos+32(sp); \
- stfdf19,pos+40(sp); \
- stfdf20,pos+48(sp); \
- stfdf21,pos+56(sp); \
- stfdf22,pos+64(sp); \
- stfdf23,pos+72(sp); \
- stfdf24,pos+80(sp); \
- stfdf25,pos+88(sp); \
- stfdf26,pos+96(sp); \
- stfdf27,pos+104(sp); \
- stfdf28,pos+112(sp); \
- stfdf29,pos+120(sp); \
- stfdf30,pos+128(sp); \
- stfdf31,pos+136(sp);
-
-#define POP_FPU(pos) \
- lfd f14,pos(sp); \
- lfd f15,pos+8(sp); \
- lfd f16,pos+16(sp); \
- lfd f17,pos+24(sp); \
- lfd f18,pos+32(sp); \
- lfd f19,pos+40(sp); \
- lfd f20,pos+48(sp); \
- lfd f21,pos+56(sp); \
- lfd f22,pos+64(sp); \
- lfd f23,pos+72(sp); \
- lfd f24,pos+80(sp); \
- lfd f25,pos+88(sp); \
- lfd f26,pos+96(sp); \
- lfd f27,pos+104(sp); \
- lfd f28,pos+112(sp); \
- lfd f29,pos+120(sp); \
- lfd f30,pos+128(sp); \
- lfd f31,pos+136(sp);
+#include "reg.h"
# Careful calling this, it will 'clobber' fpu (by design)
# Don't call this from C
+# double precision
FUNC_START(load_fpu)
lfd f14,0(r3)
lfd f15,8(r3)
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 84c1c01..e9b8e7d 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,10 +1,10 @@
-TEST_PROGS := ptrace-ebb
+TEST_PROGS := ptrace-ebb ptrace-gpr
include ../../lib.mk
all: $(TEST_PROGS)
CFLAGS += -m64
-$(TEST_PROGS): ../harness.c ../utility/utils.c ptrace.h
+$(TEST_PROGS): ../harness.c ../utility/reg.S ../utility/utils.c ptrace.h
ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S
../pmu/ebb/busy_loop.S
ptrace-ebb: CFLAGS += -I../pmu/ebb
clean:
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
new file mode 100644
index 000..0b4ebcc
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
@@ -0,0 +1,123 @@
+/*
+ * Ptrace test for GPR/FPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "reg.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+
+void gpr(void)
+{
+ unsigned long gpr_buf[18];
+ float fpr_buf[32];
+
+ cptr = (int *)shmat(shm_id, NULL, 0);
+
+ asm __volatile__(
+ ASM_LOAD_GPR_IMMED(gpr_1)
+ ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+ :
+ : [gpr_1]"i"(GPR_1), [flt_1] "r" (&a)
+ : "memory", "r6", "r7", "r8", "r9", "r10",
+ "r11", "r12", "r13", "r14", "r15", "r16", "r17",
+ "r18", "r19", "r20", "r21", "r22", "r23", "r24",
+ "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+ );
+
+ cptr[1] = 1;
+
+ while (!cptr[0])
+ asm volatile("" : : : "memory");
+
+ shmdt((voi
[PATCH v15 05/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in TM
From: Anshuman Khandual
This patch adds ptrace interface test for GPR/FPR registers
inside TM context. This adds ptrace interface based helper
functions related to checkpointed GPR/FPR access.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 5 +-
.../selftests/powerpc/ptrace/ptrace-tm-gpr.c | 158 +
2 files changed, 161 insertions(+), 2 deletions(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile
b/tools/testing/selftests/powerpc/ptrace/Makefile
index e9b8e7d..bb958a8 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,11 +1,12 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
include ../../lib.mk
all: $(TEST_PROGS)
-CFLAGS += -m64
+CFLAGS += -m64 -I../tm -mhtm
$(TEST_PROGS): ../harness.c ../utility/reg.S ../utility/utils.c ptrace.h
ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S
../pmu/ebb/busy_loop.S
ptrace-ebb: CFLAGS += -I../pmu/ebb
+
clean:
rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
new file mode 100644
index 000..59206b9
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
@@ -0,0 +1,158 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "tm.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+unsigned long *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+
+void tm_gpr(void)
+{
+ unsigned long gpr_buf[18];
+ unsigned long result, texasr;
+ float fpr_buf[32];
+
+ printf("Starting the child\n");
+ cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+ cptr[1] = 0;
+ asm __volatile__(
+ ASM_LOAD_GPR_IMMED(gpr_1)
+ ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+ "1: ;"
+ "tbegin.;"
+ "beq 2f;"
+ ASM_LOAD_GPR_IMMED(gpr_2)
+ ASM_LOAD_FPR_SINGLE_PRECISION(flt_2)
+ "tsuspend.;"
+ "li 7, 1;"
+ "stw 7, 0(%[cptr1]);"
+ "tresume.;"
+ "b .;"
+
+ "tend.;"
+ "li 0, 0;"
+ "ori %[res], 0, 0;"
+ "b 3f;"
+
+ /* Transaction abort handler */
+ "2: ;"
+ "li 0, 1;"
+ "ori %[res], 0, 0;"
+ "mfspr %[texasr], %[sprn_texasr];"
+
+ "3: ;"
+ : [res] "=r" (result), [texasr] "=r" (texasr)
+ : [gpr_1]"i"(GPR_1), [gpr_2]"i"(GPR_2),
+ [sprn_texasr] "i" (SPRN_TEXASR), [flt_1] "r" (&a),
+ [flt_2] "r" (&b), [cptr1] "r" (&cptr[1])
+ : "memory", "r7", "r8", "r9", "r10",
+ "r11", "r12", "r13", "r14", "r15", "r16",
+ "r17", "r18", "r19", "r20", "r21", "r22",
+ "r23", "r24", "r25", "r26", "r27", "r28",
+ "r29", "r30", "r31"
+ );
+
+ if (result) {
+ if (!cptr[0])
+ goto trans;
+
+ shmdt((void *)cptr);
+ store_gpr(gpr_buf);
+ store_fpr_single_precision(fpr_buf);
+
+ if (validate_gpr(gpr_buf, GPR_3))
+ exit(1);
+
+ if (validate_fpr_float(fpr_buf, c))
+ exit(1);
+
+ exit(0);
+ }
+ shmdt((void *)cptr);
+ exit(1);
+}
+
+int trace_tm_gpr(pid_t child)
+{
+ unsigned long gpr[18];
+ unsigned long fpr[32];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_gpr(child, gpr));
+ FAIL_IF(validate_gpr(gpr, GPR_2));
+ FAIL_IF(show_fpr(child, fpr));
+ FAIL_IF(validate_fpr(fpr, FPR_2_REP));
+ FAIL_IF(show_ckpt_fpr(child, fpr));
+ FAIL_IF(validate_fpr(fpr, FPR_1_REP));
+ FAIL_IF(show_ckpt_gpr(child, gpr));
+ FAIL_IF(validate_gpr(gpr, GPR_1));
+ FAIL_IF(write_ckpt_gpr(child, GPR_3));
+ FAIL_IF(write_ckpt_fpr(child, FPR_3_REP));
+
+ pptr[0] = 1;
+ FAIL_IF(stop_trace(child));
+
+ return TEST_PASS;
+}
+
+int ptrace_tm_gpr(void)
+{
+ pid_t pid;
+ int ret, status;
+
+ SKIP_IF(!have_htm());
+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+ pid = fork();
+ if (pid < 0) {
+ perror("
[PATCH v15 06/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM
From: Anshuman Khandual
This patch adds ptrace interface test for GPR/FPR registers
inside suspended TM context.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 2 +-
.../selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c | 169 +
2 files changed, 170 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile
b/tools/testing/selftests/powerpc/ptrace/Makefile
index bb958a8..9f3ed2b 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,4 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
new file mode 100644
index 000..327fa94
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
@@ -0,0 +1,169 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "tm.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+float d = FPR_4;
+
+__attribute__((used)) void wait_parent(void)
+{
+ cptr[2] = 1;
+ while (!cptr[1])
+ asm volatile("" : : : "memory");
+}
+
+void tm_spd_gpr(void)
+{
+ unsigned long gpr_buf[18];
+ unsigned long result, texasr;
+ float fpr_buf[32];
+
+ cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+ cptr[2] = 0;
+ asm __volatile__(
+ ASM_LOAD_GPR_IMMED(gpr_1)
+ ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+
+ "1: ;"
+ "tbegin.;"
+ "beq 2f;"
+
+ ASM_LOAD_GPR_IMMED(gpr_2)
+ "tsuspend.;"
+ ASM_LOAD_GPR_IMMED(gpr_4)
+ ASM_LOAD_FPR_SINGLE_PRECISION(flt_4)
+
+ "bl wait_parent;"
+ "tresume.;"
+ "tend.;"
+ "li 0, 0;"
+ "ori %[res], 0, 0;"
+ "b 3f;"
+
+ /* Transaction abort handler */
+ "2: ;"
+ "li 0, 1;"
+ "ori %[res], 0, 0;"
+ "mfspr %[texasr], %[sprn_texasr];"
+
+ "3: ;"
+ : [res] "=r" (result), [texasr] "=r" (texasr)
+ : [gpr_1]"i"(GPR_1), [gpr_2]"i"(GPR_2), [gpr_4]"i"(GPR_4),
+ [sprn_texasr] "i" (SPRN_TEXASR), [flt_1] "r" (&a),
+ [flt_2] "r" (&b), [flt_4] "r" (&d)
+ : "memory", "r5", "r6", "r7",
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+ "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+ );
+
+ if (result) {
+ if (!cptr[0])
+ goto trans;
+
+ shmdt((void *)cptr);
+ store_gpr(gpr_buf);
+ store_fpr_single_precision(fpr_buf);
+
+ if (validate_gpr(gpr_buf, GPR_3))
+ exit(1);
+
+ if (validate_fpr_float(fpr_buf, c))
+ exit(1);
+ exit(0);
+ }
+ shmdt((void *)cptr);
+ exit(1);
+}
+
+int trace_tm_spd_gpr(pid_t child)
+{
+ unsigned long gpr[18];
+ unsigned long fpr[32];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_gpr(child, gpr));
+ FAIL_IF(validate_gpr(gpr, GPR_4));
+ FAIL_IF(show_fpr(child, fpr));
+ FAIL_IF(validate_fpr(fpr, FPR_4_REP));
+ FAIL_IF(show_ckpt_fpr(child, fpr));
+ FAIL_IF(validate_fpr(fpr, FPR_1_REP));
+ FAIL_IF(show_ckpt_gpr(child, gpr));
+ FAIL_IF(validate_gpr(gpr, GPR_1));
+ FAIL_IF(write_ckpt_gpr(child, GPR_3));
+ FAIL_IF(write_ckpt_fpr(child, FPR_3_REP));
+
+ pptr[0] = 1;
+ pptr[1] = 1;
+ FAIL_IF(stop_trace(child));
+ return TEST_PASS;
+}
+
+int ptrace_tm_spd_gpr(void)
+{
+ pid_t pid;
+ int ret, status;
+
+ SKIP_IF(!have_htm());
+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+ pid = fork();
+ if (pid < 0) {
+ perror("fork() failed");
+ return TEST_FAIL;
+ }
+
+ if (pid == 0)
+ tm_spd_gpr();
+
+ if (pid) {
+ pptr = (int *)shmat(shm_id, NULL, 0);
+
[PATCH v15 07/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers
From: Anshuman Khandual
This patch adds ptrace interface test for TAR, PPR, DSCR
registers. This also adds ptrace interface based helper
functions related to TAR, PPR, DSCR register access.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 3 +-
.../testing/selftests/powerpc/ptrace/ptrace-tar.c | 135 +++
.../testing/selftests/powerpc/ptrace/ptrace-tar.h | 50 ++
tools/testing/selftests/powerpc/ptrace/ptrace.h| 181 +
4 files changed, 368 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.h
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9f3ed2b..dfb0847 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,5 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
+ptrace-tar
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
new file mode 100644
index 000..f9b5069
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
@@ -0,0 +1,135 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr;
+int *pptr;
+
+void tar(void)
+{
+ unsigned long reg[3];
+ int ret;
+
+ cptr = (int *)shmat(shm_id, NULL, 0);
+ printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+ user_write, TAR_1, PPR_1, DSCR_1);
+
+ mtspr(SPRN_TAR, TAR_1);
+ mtspr(SPRN_PPR, PPR_1);
+ mtspr(SPRN_DSCR, DSCR_1);
+
+ cptr[2] = 1;
+
+ /* Wait on parent */
+ while (!cptr[0])
+ asm volatile("" : : : "memory");
+
+ reg[0] = mfspr(SPRN_TAR);
+ reg[1] = mfspr(SPRN_PPR);
+ reg[2] = mfspr(SPRN_DSCR);
+
+ printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+ user_read, reg[0], reg[1], reg[2]);
+
+ /* Unblock the parent now */
+ cptr[1] = 1;
+ shmdt((int *)cptr);
+
+ ret = validate_tar_registers(reg, TAR_2, PPR_2, DSCR_2);
+ if (ret)
+ exit(1);
+ exit(0);
+}
+
+int trace_tar(pid_t child)
+{
+ unsigned long reg[3];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_tar_registers(child, reg));
+ printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+ ptrace_read_running, reg[0], reg[1], reg[2]);
+
+ FAIL_IF(validate_tar_registers(reg, TAR_1, PPR_1, DSCR_1));
+ FAIL_IF(stop_trace(child));
+ return TEST_PASS;
+}
+
+int trace_tar_write(pid_t child)
+{
+ FAIL_IF(start_trace(child));
+ FAIL_IF(write_tar_registers(child, TAR_2, PPR_2, DSCR_2));
+ printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+ ptrace_write_running, TAR_2, PPR_2, DSCR_2);
+
+ FAIL_IF(stop_trace(child));
+ return TEST_PASS;
+}
+
+int ptrace_tar(void)
+{
+ pid_t pid;
+ int ret, status;
+
+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+ pid = fork();
+ if (pid < 0) {
+ perror("fork() failed");
+ return TEST_FAIL;
+ }
+
+ if (pid == 0)
+ tar();
+
+ if (pid) {
+ pptr = (int *)shmat(shm_id, NULL, 0);
+ pptr[0] = 0;
+ pptr[1] = 0;
+
+ while (!pptr[2])
+ asm volatile("" : : : "memory");
+ ret = trace_tar(pid);
+ if (ret)
+ return ret;
+
+ ret = trace_tar_write(pid);
+ if (ret)
+ return ret;
+
+ /* Unblock the child now */
+ pptr[0] = 1;
+
+ /* Wait on child */
+ while (!pptr[1])
+ asm volatile("" : : : "memory");
+
+ shmdt((int *)pptr);
+
+ ret = wait(&status);
+ shmctl(shm_id, IPC_RMID, NULL);
+ if (ret != pid) {
+ printf("Child's exit status not captured\n");
+ return TEST_PASS;
+ }
+
+ return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+ TEST_PASS;
+ }
+ return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
[PATCH v15 08/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM
From: Anshuman Khandual
This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside TM context. This also adds ptrace
interface based helper functions related to checkpointed
TAR, PPR, DSCR register access.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 2 +-
.../selftests/powerpc/ptrace/ptrace-tm-tar.c | 160 +
2 files changed, 161 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile
b/tools/testing/selftests/powerpc/ptrace/Makefile
index dfb0847..9af9ad5 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar
+ptrace-tar ptrace-tm-tar
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
new file mode 100644
index 000..48b462f
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
@@ -0,0 +1,160 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+unsigned long *cptr, *pptr;
+
+
+void tm_tar(void)
+{
+ unsigned long result, texasr;
+ unsigned long regs[3];
+ int ret;
+
+ cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+ cptr[1] = 0;
+ asm __volatile__(
+ "li 4, %[tar_1];"
+ "mtspr %[sprn_tar], 4;"/* TAR_1 */
+ "li 4, %[dscr_1];"
+ "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+ "or 31,31,31;" /* PPR_1*/
+
+ "1: ;"
+ "tbegin.;"
+ "beq 2f;"
+
+ "li 4, %[tar_2];"
+ "mtspr %[sprn_tar], 4;"/* TAR_2 */
+ "li 4, %[dscr_2];"
+ "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+ "or 1,1,1;" /* PPR_2 */
+ "tsuspend.;"
+ "li 0, 1;"
+ "stw 0, 0(%[cptr1]);"
+ "tresume.;"
+ "b .;"
+
+ "tend.;"
+ "li 0, 0;"
+ "ori %[res], 0, 0;"
+ "b 3f;"
+
+ /* Transaction abort handler */
+ "2: ;"
+ "li 0, 1;"
+ "ori %[res], 0, 0;"
+ "mfspr %[texasr], %[sprn_texasr];"
+
+ "3: ;"
+
+ : [res] "=r" (result), [texasr] "=r" (texasr)
+ : [sprn_dscr]"i"(SPRN_DSCR), [sprn_tar]"i"(SPRN_TAR),
+ [sprn_ppr]"i"(SPRN_PPR), [sprn_texasr]"i"(SPRN_TEXASR),
+ [tar_1]"i"(TAR_1), [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2),
+ [dscr_2]"i"(DSCR_2), [cptr1] "r" (&cptr[1])
+ : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+ );
+
+ /* TM failed, analyse */
+ if (result) {
+ if (!cptr[0])
+ goto trans;
+
+ regs[0] = mfspr(SPRN_TAR);
+ regs[1] = mfspr(SPRN_PPR);
+ regs[2] = mfspr(SPRN_DSCR);
+
+ shmdt(&cptr);
+ printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+ user_read, regs[0], regs[1], regs[2]);
+
+ ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+ if (ret)
+ exit(1);
+ exit(0);
+ }
+ shmdt(&cptr);
+ exit(1);
+}
+
+int trace_tm_tar(pid_t child)
+{
+ unsigned long regs[3];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_tar_registers(child, regs));
+ printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+ ptrace_read_running, regs[0], regs[1], regs[2]);
+
+ FAIL_IF(validate_tar_registers(regs, TAR_2, PPR_2, DSCR_2));
+ FAIL_IF(show_tm_checkpointed_state(child, regs));
+ printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+ ptrace_read_ckpt, regs[0], regs[1], regs[2]);
+
+ FAIL_IF(validate_tar_registers(regs, TAR_1, PPR_1, DSCR_1));
+ FAIL_IF(write_ckpt_tar_registers(child, TAR_4, PPR_4, DSCR_4));
+ printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+ ptrace_write_ckpt, TAR_4, PPR_4, DSCR_4);
+
+ pptr[0] = 1;
+ FAIL_IF(stop_trace(child));
+ return TEST_PASS;
+}
+
+int ptrace_tm_tar(void)
+{
+ pid_t p
[PATCH v15 09/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM
From: Anshuman Khandual
This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside suspended TM context.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 2 +-
.../selftests/powerpc/ptrace/ptrace-tm-spd-tar.c | 174 +
2 files changed, 175 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9af9ad5..19e4a7c 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
new file mode 100644
index 000..b3c061d
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
@@ -0,0 +1,174 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+int *cptr, *pptr;
+
+__attribute__((used)) void wait_parent(void)
+{
+ cptr[2] = 1;
+ while (!cptr[1])
+ asm volatile("" : : : "memory");
+}
+
+void tm_spd_tar(void)
+{
+ unsigned long result, texasr;
+ unsigned long regs[3];
+ int ret;
+
+ cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+ cptr[2] = 0;
+ asm __volatile__(
+ "li 4, %[tar_1];"
+ "mtspr %[sprn_tar], 4;"/* TAR_1 */
+ "li 4, %[dscr_1];"
+ "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+ "or 31,31,31;" /* PPR_1*/
+
+ "1: ;"
+ "tbegin.;"
+ "beq 2f;"
+
+ "li 4, %[tar_2];"
+ "mtspr %[sprn_tar], 4;"/* TAR_2 */
+ "li 4, %[dscr_2];"
+ "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+ "or 1,1,1;" /* PPR_2 */
+
+ "tsuspend.;"
+ "li 4, %[tar_3];"
+ "mtspr %[sprn_tar], 4;"/* TAR_3 */
+ "li 4, %[dscr_3];"
+ "mtspr %[sprn_dscr], 4;"/* DSCR_3 */
+ "or 6,6,6;" /* PPR_3 */
+ "bl wait_parent;"
+ "tresume.;"
+
+ "tend.;"
+ "li 0, 0;"
+ "ori %[res], 0, 0;"
+ "b 3f;"
+
+ /* Transaction abort handler */
+ "2: ;"
+ "li 0, 1;"
+ "ori %[res], 0, 0;"
+ "mfspr %[texasr], %[sprn_texasr];"
+
+ "3: ;"
+
+ : [res] "=r" (result), [texasr] "=r" (texasr)
+ : [val] "r" (cptr[1]), [sprn_dscr]"i"(SPRN_DSCR),
+ [sprn_tar]"i"(SPRN_TAR), [sprn_ppr]"i"(SPRN_PPR),
+ [sprn_texasr]"i"(SPRN_TEXASR), [tar_1]"i"(TAR_1),
+ [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2), [dscr_2]"i"(DSCR_2),
+ [tar_3]"i"(TAR_3), [dscr_3]"i"(DSCR_3)
+ : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+ );
+
+ /* TM failed, analyse */
+ if (result) {
+ if (!cptr[0])
+ goto trans;
+
+ regs[0] = mfspr(SPRN_TAR);
+ regs[1] = mfspr(SPRN_PPR);
+ regs[2] = mfspr(SPRN_DSCR);
+
+ shmdt(&cptr);
+ printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+ user_read, regs[0], regs[1], regs[2]);
+
+ ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+ if (ret)
+ exit(1);
+ exit(0);
+ }
+ shmdt(&cptr);
+ exit(1);
+}
+
+int trace_tm_spd_tar(pid_t child)
+{
+ unsigned long regs[3];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_tar_registers(child, regs));
+ printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+ ptrace_read_running, regs[0], regs[1], regs[2]);
+
+ FAIL_IF(validate_tar_registers(regs, TAR_3, PPR_3, DSCR_3));
+ FAIL_IF(show_tm_checkpointed_state(child, regs));
+ printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+ ptrace_read_ckpt, regs[0], regs[1], regs[2]);
+
+ FAIL_IF(validate_tar_registers(regs
[PATCH v15 10/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers
From: Anshuman Khandual
This patch adds ptrace interface test for VSX, VMX registers.
This also adds ptrace interface based helper functions related
to VSX, VMX registers access. This also adds some assembly
helper functions related to VSX and VMX registers.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 2 +-
.../testing/selftests/powerpc/ptrace/ptrace-vsx.c | 117 +
.../testing/selftests/powerpc/ptrace/ptrace-vsx.h | 127 ++
tools/testing/selftests/powerpc/ptrace/ptrace.h| 119 +
tools/testing/selftests/powerpc/utility/reg.S | 265 +
5 files changed, 629 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 19e4a7c..9d9f658 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
new file mode 100644
index 000..04084ee
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
@@ -0,0 +1,117 @@
+/*
+ * Ptrace test for VMX/VSX registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+
+void vsx(void)
+{
+ int ret;
+
+ cptr = (int *)shmat(shm_id, NULL, 0);
+ loadvsx(fp_load, 0);
+ cptr[1] = 1;
+
+ while (!cptr[0])
+ asm volatile("" : : : "memory");
+ shmdt((void *) cptr);
+
+ storevsx(fp_store, 0);
+ ret = compare_vsx_vmx(fp_store, fp_load_new);
+ if (ret)
+ exit(1);
+ exit(0);
+}
+
+int trace_vsx(pid_t child)
+{
+ unsigned long vsx[VSX_MAX];
+ unsigned long vmx[VMX_MAX + 2][2];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_vsx(child, vsx));
+ FAIL_IF(validate_vsx(vsx, fp_load));
+ FAIL_IF(show_vmx(child, vmx));
+ FAIL_IF(validate_vmx(vmx, fp_load));
+
+ memset(vsx, 0, sizeof(vsx));
+ memset(vmx, 0, sizeof(vmx));
+ load_vsx_vmx(fp_load_new, vsx, vmx);
+
+ FAIL_IF(write_vsx(child, vsx));
+ FAIL_IF(write_vmx(child, vmx));
+ FAIL_IF(stop_trace(child));
+
+ return TEST_PASS;
+}
+
+int ptrace_vsx(void)
+{
+ pid_t pid;
+ int ret, status, i;
+
+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+
+ for (i = 0; i < VEC_MAX; i++)
+ fp_load[i] = i + rand();
+
+ for (i = 0; i < VEC_MAX; i++)
+ fp_load_new[i] = i + 2 * rand();
+
+ pid = fork();
+ if (pid < 0) {
+ perror("fork() failed");
+ return TEST_FAIL;
+ }
+
+ if (pid == 0)
+ vsx();
+
+ if (pid) {
+ pptr = (int *)shmat(shm_id, NULL, 0);
+ while (!pptr[1])
+ asm volatile("" : : : "memory");
+
+ ret = trace_vsx(pid);
+ if (ret) {
+ kill(pid, SIGTERM);
+ shmdt((void *)pptr);
+ shmctl(shm_id, IPC_RMID, NULL);
+ return TEST_FAIL;
+ }
+
+ pptr[0] = 1;
+ shmdt((void *)pptr);
+
+ ret = wait(&status);
+ shmctl(shm_id, IPC_RMID, NULL);
+ if (ret != pid) {
+ printf("Child's exit status not captured\n");
+ return TEST_FAIL;
+ }
+
+ return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+ TEST_PASS;
+ }
+ return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(ptrace_vsx, "ptrace_vsx");
+}
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
new file mode 100644
index 000..f4e4b42
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
@@ -0,0 +1,127 @@
+/*
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program
[PATCH v15 11/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM
From: Anshuman Khandual
This patch adds ptrace interface test for VSX, VMX registers
inside TM context. This also adds ptrace interface based helper
functions related to chckpointed VSX, VMX registers access.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 3 +-
.../selftests/powerpc/ptrace/ptrace-tm-vsx.c | 168 +
2 files changed, 170 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9d9f658..a518fbd 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
new file mode 100644
index 000..b4081e2
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
@@ -0,0 +1,168 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+unsigned long *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+ loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+ loadvsx(fp_load_ckpt, 0);
+}
+
+void tm_vsx(void)
+{
+ unsigned long result, texasr;
+ int ret;
+
+ cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+ cptr[1] = 0;
+ asm __volatile__(
+ "bl load_vsx_ckpt;"
+
+ "1: ;"
+ "tbegin.;"
+ "beq 2f;"
+
+ "bl load_vsx;"
+ "tsuspend.;"
+ "li 7, 1;"
+ "stw 7, 0(%[cptr1]);"
+ "tresume.;"
+ "b .;"
+
+ "tend.;"
+ "li 0, 0;"
+ "ori %[res], 0, 0;"
+ "b 3f;"
+
+ "2: ;"
+ "li 0, 1;"
+ "ori %[res], 0, 0;"
+ "mfspr %[texasr], %[sprn_texasr];"
+
+ "3: ;"
+ : [res] "=r" (result), [texasr] "=r" (texasr)
+ : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+ [sprn_texasr] "i" (SPRN_TEXASR), [cptr1] "r" (&cptr[1])
+ : "memory", "r0", "r1", "r2", "r3", "r4",
+ "r7", "r8", "r9", "r10", "r11"
+ );
+
+ if (result) {
+ if (!cptr[0])
+ goto trans;
+
+ shmdt((void *)cptr);
+ storevsx(fp_store, 0);
+ ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+ if (ret)
+ exit(1);
+ exit(0);
+ }
+ shmdt((void *)cptr);
+ exit(1);
+}
+
+int trace_tm_vsx(pid_t child)
+{
+ unsigned long vsx[VSX_MAX];
+ unsigned long vmx[VMX_MAX + 2][2];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_vsx(child, vsx));
+ FAIL_IF(validate_vsx(vsx, fp_load));
+ FAIL_IF(show_vmx(child, vmx));
+ FAIL_IF(validate_vmx(vmx, fp_load));
+ FAIL_IF(show_vsx_ckpt(child, vsx));
+ FAIL_IF(validate_vsx(vsx, fp_load_ckpt));
+ FAIL_IF(show_vmx_ckpt(child, vmx));
+ FAIL_IF(validate_vmx(vmx, fp_load_ckpt));
+ memset(vsx, 0, sizeof(vsx));
+ memset(vmx, 0, sizeof(vmx));
+
+ load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
+
+ FAIL_IF(write_vsx_ckpt(child, vsx));
+ FAIL_IF(write_vmx_ckpt(child, vmx));
+ pptr[0] = 1;
+ FAIL_IF(stop_trace(child));
+ return TEST_PASS;
+}
+
+int ptrace_tm_vsx(void)
+{
+ pid_t pid;
+ int ret, status, i;
+
+ SKIP_IF(!have_htm());
+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+
+ for (i = 0; i < 128; i++) {
+ fp_load[i] = 1 + rand();
+ fp_load_ckpt[i] = 1 + 2 * rand();
+ fp_load_ckpt_new[i] = 1 + 3 * rand();
+ }
+
+ pid = fork();
+ if (pid < 0) {
+ perror("fork() failed");
+ return TEST_FAIL;
+ }
+
+ if (pid == 0)
+ tm_vsx();
+
+ if (pid) {
+ pptr
[PATCH v15 12/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in suspended TM
From: Anshuman Khandual
This patch adds ptrace interface test for VSX, VMX registers
inside suspended TM context.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 3 +-
.../selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c | 185 +
2 files changed, 187 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile
b/tools/testing/selftests/powerpc/ptrace/Makefile
index a518fbd..b5b097a 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
+ptrace-tm-spd-vsx
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
new file mode 100644
index 000..0df3c23
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
@@ -0,0 +1,185 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+int *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+ loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_new(void)
+{
+ loadvsx(fp_load_new, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+ loadvsx(fp_load_ckpt, 0);
+}
+
+__attribute__((used)) void wait_parent(void)
+{
+ cptr[2] = 1;
+ while (!cptr[1])
+ asm volatile("" : : : "memory");
+}
+
+void tm_spd_vsx(void)
+{
+ unsigned long result, texasr;
+ int ret;
+
+ cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+ cptr[2] = 0;
+ asm __volatile__(
+ "bl load_vsx_ckpt;"
+
+ "1: ;"
+ "tbegin.;"
+ "beq 2f;"
+
+ "bl load_vsx_new;"
+ "tsuspend.;"
+ "bl load_vsx;"
+ "bl wait_parent;"
+ "tresume.;"
+
+ "tend.;"
+ "li 0, 0;"
+ "ori %[res], 0, 0;"
+ "b 3f;"
+
+ "2: ;"
+ "li 0, 1;"
+ "ori %[res], 0, 0;"
+ "mfspr %[texasr], %[sprn_texasr];"
+
+ "3: ;"
+ : [res] "=r" (result), [texasr] "=r" (texasr)
+ : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+ [sprn_texasr] "i" (SPRN_TEXASR)
+ : "memory", "r0", "r1", "r2", "r3", "r4",
+ "r8", "r9", "r10", "r11"
+ );
+
+ if (result) {
+ if (!cptr[0])
+ goto trans;
+ shmdt((void *)cptr);
+
+ storevsx(fp_store, 0);
+ ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+ if (ret)
+ exit(1);
+ exit(0);
+ }
+ shmdt((void *)cptr);
+ exit(1);
+}
+
+int trace_tm_spd_vsx(pid_t child)
+{
+ unsigned long vsx[VSX_MAX];
+ unsigned long vmx[VMX_MAX + 2][2];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_vsx(child, vsx));
+ FAIL_IF(validate_vsx(vsx, fp_load));
+ FAIL_IF(show_vmx(child, vmx));
+ FAIL_IF(validate_vmx(vmx, fp_load));
+ FAIL_IF(show_vsx_ckpt(child, vsx));
+ FAIL_IF(validate_vsx(vsx, fp_load_ckpt));
+ FAIL_IF(show_vmx_ckpt(child, vmx));
+ FAIL_IF(validate_vmx(vmx, fp_load_ckpt));
+
+ memset(vsx, 0, sizeof(vsx));
+ memset(vmx, 0, sizeof(vmx));
+
+ load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
+
+ FAIL_IF(write_vsx_ckpt(child, vsx));
+ FAIL_IF(write_vmx_ckpt(child, vmx));
+
+ pptr[0] = 1;
+ pptr[1] = 1;
+ FAIL_IF(stop_trace(child));
+
+ return TEST_PASS;
+}
+
+int ptrace_tm_spd_vsx(void)
+{
+ pid_t pid;
+ int ret, status, i;
+
+ SKIP_IF(!have_htm());
+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+
+ for (i = 0; i < 128; i++) {
+ fp_load[i] = 1 + rand();
+ fp_load_new[i] = 1 + 2 * rand();
+ fp_load_ckpt[i] = 1 + 3 * rand();
+ fp_load_ckpt_new[
[PATCH v15 13/15] selftests/powerpc: Add ptrace tests for TM SPR registers
From: Anshuman Khandual
This patch adds ptrace interface test for TM SPR registers. This
also adds ptrace interface based helper functions related to TM
SPR registers access.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 3 +-
.../selftests/powerpc/ptrace/ptrace-tm-spr.c | 168 +
tools/testing/selftests/powerpc/ptrace/ptrace.h| 35 +
3 files changed, 204 insertions(+), 2 deletions(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile
b/tools/testing/selftests/powerpc/ptrace/Makefile
index b5b097a..ec2a9b0 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,7 +1,6 @@
TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
-ptrace-tm-spd-vsx
-
+ptrace-tm-spd-vsx ptrace-tm-spr
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
new file mode 100644
index 000..94e57cb
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
@@ -0,0 +1,168 @@
+/*
+ * Ptrace test TM SPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+
+/* Tracee and tracer shared data */
+struct shared {
+ int flag;
+ struct tm_spr_regs regs;
+};
+unsigned long tfhar;
+
+int shm_id;
+struct shared *cptr, *pptr;
+
+int shm_id1;
+int *cptr1, *pptr1;
+
+#define TM_KVM_SCHED 0xe001ac01
+int validate_tm_spr(struct tm_spr_regs *regs)
+{
+ FAIL_IF(regs->tm_tfhar != tfhar);
+ FAIL_IF((regs->tm_texasr == TM_KVM_SCHED) && (regs->tm_tfiar != 0));
+
+ return TEST_PASS;
+}
+
+void tm_spr(void)
+{
+ unsigned long result, texasr;
+ int ret;
+
+ cptr = (struct shared *)shmat(shm_id, NULL, 0);
+ cptr1 = (int *)shmat(shm_id1, NULL, 0);
+
+trans:
+ cptr1[0] = 0;
+ asm __volatile__(
+ "1: ;"
+ /* TM failover handler should follow "tbegin.;" */
+ "mflr 31;"
+ "bl 4f;"/* $ = TFHAR - 12 */
+ "4: ;"
+ "mflr %[tfhar];"
+ "mtlr 31;"
+
+ "tbegin.;"
+ "beq 2f;"
+
+ "tsuspend.;"
+ "li 8, 1;"
+ "sth 8, 0(%[cptr1]);"
+ "tresume.;"
+ "b .;"
+
+ "tend.;"
+ "li 0, 0;"
+ "ori %[res], 0, 0;"
+ "b 3f;"
+
+ "2: ;"
+
+ "li 0, 1;"
+ "ori %[res], 0, 0;"
+ "mfspr %[texasr], %[sprn_texasr];"
+
+ "3: ;"
+ : [tfhar] "=r" (tfhar), [res] "=r" (result),
+ [texasr] "=r" (texasr), [cptr1] "=r" (cptr1)
+ : [sprn_texasr] "i" (SPRN_TEXASR)
+ : "memory", "r0", "r1", "r2", "r3", "r4",
+ "r8", "r9", "r10", "r11", "r31"
+ );
+
+ /* There are 2 32bit instructions before tbegin. */
+ tfhar += 12;
+
+ if (result) {
+ if (!cptr->flag)
+ goto trans;
+
+ ret = validate_tm_spr((struct tm_spr_regs *)&cptr->regs);
+ shmdt((void *)cptr);
+ shmdt((void *)cptr1);
+ if (ret)
+ exit(1);
+ exit(0);
+ }
+ shmdt((void *)cptr);
+ shmdt((void *)cptr1);
+ exit(1);
+}
+
+int trace_tm_spr(pid_t child)
+{
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_tm_spr(child, (struct tm_spr_regs *)&pptr->regs));
+
+ printf("TFHAR: %lx TEXASR: %lx TFIAR: %lx\n", pptr->regs.tm_tfhar,
+ pptr->regs.tm_texasr, pptr->regs.tm_tfiar);
+
+ pptr->flag = 1;
+ FAIL_IF(stop_trace(child));
+
+ return TEST_PASS;
+}
+
+int ptrace_tm_spr(void)
+{
+ pid_t pid;
+ int ret, status;
+
+ SKIP_IF(!have_htm());
+ shm_id = shmget(IPC_PRIVATE, sizeof(struct shared), 0777|IPC_CREAT);
+ shm_id1 = shmget(IPC_PRIVATE, sizeof(int), 0777|IPC_CREAT);
+ pid = fork();
+ if (pid < 0) {
+ perror("fork() failed");
+ return TEST_FAIL;
+ }
+
+ if (pid == 0)
+ tm_spr();
+
+ if (pid) {
+ pptr = (struct shared *)shmat(shm_id, NULL, 0);
+ pptr1 = (int *)shmat(shm_id1, NULL, 0);
+
+ while (!pptr1[0])
+ asm volatile(
[PATCH v15 14/15] selftests/powerpc: Add .gitignore file for ptrace executables
From: Anshuman Khandual This patch adds a .gitignore file for all the executables in the ptrace test directory thus making invisible with git status query. Signed-off-by: Anshuman Khandual Signed-off-by: Simon Guo --- tools/testing/selftests/powerpc/ptrace/.gitignore | 11 +++ 1 file changed, 11 insertions(+) create mode 100644 tools/testing/selftests/powerpc/ptrace/.gitignore diff --git a/tools/testing/selftests/powerpc/ptrace/.gitignore b/tools/testing/selftests/powerpc/ptrace/.gitignore new file mode 100644 index 000..bdf3566 --- /dev/null +++ b/tools/testing/selftests/powerpc/ptrace/.gitignore @@ -0,0 +1,11 @@ +ptrace-ebb +ptrace-gpr +ptrace-tm-gpr +ptrace-tm-spd-gpr +ptrace-tar +ptrace-tm-tar +ptrace-tm-spd-tar +ptrace-vsx +ptrace-tm-vsx +ptrace-tm-spd-vsx +ptrace-tm-spr -- 1.8.3.1
[PATCH v15 15/15] selftests/powerpc: Fix a build issue
From: Anshuman Khandual
Fixes the following build failure -
cp_abort.c:90:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
for (int i = 0; i < NUM_LOOPS; i++) {
^
cp_abort.c:90:3: note: use option -std=c99, -std=gnu99, -std=c11 or
-std=gnu11 to compile your code
cp_abort.c:97:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
for (int i = 0; i < NUM_LOOPS; i++) {
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
Reviewed-by: Cyril Bur
---
tools/testing/selftests/powerpc/context_switch/cp_abort.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tools/testing/selftests/powerpc/context_switch/cp_abort.c
b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
index 5a5b55a..1ce7dce 100644
--- a/tools/testing/selftests/powerpc/context_switch/cp_abort.c
+++ b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
@@ -67,7 +67,7 @@ int test_cp_abort(void)
/* 128 bytes for a full cache line */
char buf[128] __cacheline_aligned;
cpu_set_t cpuset;
- int fd1[2], fd2[2], pid;
+ int fd1[2], fd2[2], pid, i;
char c;
/* only run this test on a P9 or later */
@@ -87,14 +87,14 @@ int test_cp_abort(void)
FAIL_IF(pid < 0);
if (!pid) {
- for (int i = 0; i < NUM_LOOPS; i++) {
+ for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((write(fd1[WRITE_FD], &c, 1)) != 1);
FAIL_IF((read(fd2[READ_FD], &c, 1)) != 1);
/* A paste succeeds if CR0 EQ bit is set */
FAIL_IF(paste(buf) & 0x2000);
}
} else {
- for (int i = 0; i < NUM_LOOPS; i++) {
+ for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((read(fd1[READ_FD], &c, 1)) != 1);
copy(buf);
FAIL_IF((write(fd2[WRITE_FD], &c, 1) != 1));
--
1.8.3.1
Re: [PATCH v5 3/4] PCI: Add a new option for resource_alignment to reassign alignment
On 2016/9/29 19:54, Bjorn Helgaas wrote:
On Thu, Sep 29, 2016 at 10:38:01AM +0800, Yongji Xie wrote:
On 2016/9/29 6:42, Bjorn Helgaas wrote:
On Tue, Sep 13, 2016 at 05:00:33PM +0800, Yongji Xie wrote:
When using resource_alignment kernel parameter, the current
implement reassigns the alignment by changing resources' size
which can potentially break some drivers. For example, the driver
uses the size to locate some register whose length is related
to the size.
This patch adds a new option "noresize" for the parameter to
solve this problem.
Signed-off-by: Yongji Xie
---
Documentation/kernel-parameters.txt |9 ++---
drivers/pci/pci.c | 37 +--
2 files changed, 33 insertions(+), 13 deletions(-)
diff --git a/Documentation/kernel-parameters.txt
b/Documentation/kernel-parameters.txt
index a4f4d69..d6a340d 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -3023,9 +3023,10 @@ bytes respectively. Such letter suffixes can also be
entirely omitted.
window. The default value is 64 megabytes.
resource_alignment=
Format:
- [@][:]:.[; ...]
- [@]pci::\
- [::][;
...]
+ [@][noresize@][:]
+ :.[; ...]
+ [@][noresize@]pci::
+ [::][; ...]
Specifies alignment and device to reassign
aligned memory resources.
If is not specified,
@@ -3036,6 +3037,8 @@ bytes respectively. Such letter suffixes can also be
entirely omitted.
instances of a device, the PCI vendor,
device, subvendor, and subdevice may be
specified, e.g., 4096@pci:8086:9c22:103c:198f
+ noresize: Don't change the resources' sizes when
+ reassigning alignment.
ecrc= Enable/disable PCIe ECRC (transaction layer
end-to-end CRC checking).
bios: Use BIOS/firmware settings. This is the
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index b8357d7..37f8062 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -4946,11 +4946,13 @@ static DEFINE_SPINLOCK(resource_alignment_lock);
/**
* pci_specified_resource_alignment - get resource alignment specified by
user.
* @dev: the PCI device to get
+ * @resize: whether or not to change resources' size when reassigning alignment
*
* RETURNS: Resource alignment if it is specified.
* Zero if it is not specified.
*/
-static resource_size_t pci_specified_resource_alignment(struct pci_dev *dev)
+static resource_size_t pci_specified_resource_alignment(struct pci_dev *dev,
+ bool *resize)
{
int seg, bus, slot, func, align_order, count;
unsigned short vendor, device, subsystem_vendor, subsystem_device;
@@ -4974,6 +4976,13 @@ static resource_size_t
pci_specified_resource_alignment(struct pci_dev *dev)
} else {
align_order = -1;
}
+
+ if (!strncmp(p, "noresize@", 9)) {
+ *resize = false;
+ p += 9;
+ } else
+ *resize = true;
+
if (strncmp(p, "pci:", 4) == 0) {
/* PCI vendor/device (subvendor/subdevice) ids are
specified */
p += 4;
@@ -5045,6 +5054,7 @@ void pci_reassigndev_resource_alignment(struct pci_dev
*dev)
{
int i;
struct resource *r;
+ bool resize = true;
resource_size_t align, size;
u16 command;
@@ -5058,7 +5068,7 @@ void pci_reassigndev_resource_alignment(struct pci_dev
*dev)
return;
/* check if specified PCI is target device to reassign */
- align = pci_specified_resource_alignment(dev);
+ align = pci_specified_resource_alignment(dev, &resize);
if (!align)
return;
@@ -5086,15 +5096,22 @@ void pci_reassigndev_resource_alignment(struct pci_dev
*dev)
}
size = resource_size(r);
- if (size < align) {
- size = align;
- dev_info(&dev->dev,
- "Rounding up size of resource #%d to %#llx.\n",
- i, (unsigned long long)size);
+ if (resize) {
+ if (size < align) {
+ size = align;
+ dev_info(&dev->dev,
+ "Rounding up size of resource #%d to
Re: [PATCH v3 0/4] implement vcpu preempted check
在 2016/9/29 18:10, Peter Zijlstra 写道: On Thu, Jul 21, 2016 at 07:45:10AM -0400, Pan Xinhui wrote: change from v2: no code change, fix typos, update some comments change from v1: a simplier definition of default vcpu_is_preempted skip mahcine type check on ppc, and add config. remove dedicated macro. add one patch to drop overload of rwsem_spin_on_owner and mutex_spin_on_owner. add more comments thanks boqun and Peter's suggestion. This patch set aims to fix lock holder preemption issues. So I really like the concept, but I would also really like to see support for more hypervisors included before we can move forward with this. Please consider s390 and (x86/arm) KVM. Once we have a few, more can follow later, but I think its important to not only have PPC support for this. hi, Peter right, we need consider more arches. I will try to work out a RFC patch on x86 anyway. There are already some discussions of the solution on x86 :) thanks xinhui
Re: [PATCH v5 4/4] PCI: Add a macro to set default alignment for all PCI devices
On 2016/9/29 22:00, Bjorn Helgaas wrote: On Tue, Sep 13, 2016 at 05:00:34PM +0800, Yongji Xie wrote: When vfio passthroughs a PCI device of which MMIO BARs are smaller than PAGE_SIZE, guest will not handle the mmio accesses to the BARs which leads to mmio emulations in host. This is because vfio will not allow to passthrough one BAR's mmio page which may be shared with other BARs. Otherwise, there will be a backdoor that guest can use to access BARs of other guest. This patch adds a macro to set default alignment for all PCI devices. Then we could solve this issue on some platforms which would easily hit this issue because of their 64K page such as PowerNV platform by defining this macro as PAGE_SIZE. Signed-off-by: Yongji Xie --- arch/powerpc/include/asm/pci.h |4 drivers/pci/pci.c |4 2 files changed, 8 insertions(+) diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h index e9bd6cf..5e31bc2 100644 --- a/arch/powerpc/include/asm/pci.h +++ b/arch/powerpc/include/asm/pci.h @@ -28,6 +28,10 @@ #define PCIBIOS_MIN_IO0x1000 #define PCIBIOS_MIN_MEM 0x1000 +#ifdef CONFIG_PPC_POWERNV +#define PCIBIOS_DEFAULT_ALIGNMENT PAGE_SIZE +#endif + struct pci_dev; /* Values for the `which' argument to sys_pciconfig_iobase syscall. */ diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 37f8062..9c61cbe 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -4959,6 +4959,10 @@ static resource_size_t pci_specified_resource_alignment(struct pci_dev *dev, resource_size_t align = 0; char *p; +#ifdef PCIBIOS_DEFAULT_ALIGNMENT + align = PCIBIOS_DEFAULT_ALIGNMENT; + *resize = false; +#endif I'm a little confused about how this works. I think this change only does something if the user specifies "pci=resource_alignment=..." or writes to the /sys/.../resource_alignment file, because those are the only ways to set resource_alignment_param. If that's true, isn't the *default* to align to PAGE_SIZE? So I don't understand what PCIBIOS_DEFAULT_ALIGNMENT changes. In pci_reassigndev_resource_alignment(), we can see: align = pci_specified_resource_alignment(dev); if (!align) return; So we would still align the device's BAR to PAGE_SIZE without set resource_alignment_param if we set @align to a default value in pci_specified_resource_alignment(). And I'm hoping we can get rid of the resize flag based on the discussion of the previous patch. Will do. Thanks, Yongji
Re: [PATCH v3 0/4] implement vcpu preempted check
在 2016/9/29 18:31, Peter Zijlstra 写道: On Thu, Sep 29, 2016 at 12:23:19PM +0200, Christian Borntraeger wrote: On 09/29/2016 12:10 PM, Peter Zijlstra wrote: On Thu, Jul 21, 2016 at 07:45:10AM -0400, Pan Xinhui wrote: change from v2: no code change, fix typos, update some comments change from v1: a simplier definition of default vcpu_is_preempted skip mahcine type check on ppc, and add config. remove dedicated macro. add one patch to drop overload of rwsem_spin_on_owner and mutex_spin_on_owner. add more comments thanks boqun and Peter's suggestion. This patch set aims to fix lock holder preemption issues. So I really like the concept, but I would also really like to see support for more hypervisors included before we can move forward with this. Please consider s390 and (x86/arm) KVM. Once we have a few, more can follow later, but I think its important to not only have PPC support for this. Actually the s390 preemted check via sigp sense running is available for all hypervisors (z/VM, LPAR and KVM) which implies everywhere as you can no longer buy s390 systems without LPAR. As Heiko already pointed out we could simply use a small inline function that calls cpu_is_preempted from arch/s390/lib/spinlock (or smp_vcpu_scheduled from smp.c) Sure, and I had vague memories of Heiko's email. This patch set however completely fails to do that trivial hooking up. sorry for that. I will try to work it out on x86. Hi, Will I appreciate that if you or some other arm guys could help on it. :)
