RE: [PATCH V5 2/2] mtd: spi-nor: Add driver for Cadence Quad SPI Flash Controller.
Hi Graham,
> -Original Message-
> From: Graham Moore [mailto:grmo...@opensource.altera.com]
> Sent: Monday, July 27, 2015 10:40 AM
> To: Vikas MANOCHA
> Cc: Marek Vasut; linux-...@lists.infradead.org; David Woodhouse; Brian
> Norris; linux-kernel@vger.kernel.org; Alan Tull; Dinh Nguyen; Yves
> Vandervennet
> Subject: Re: [PATCH V5 2/2] mtd: spi-nor: Add driver for Cadence Quad SPI
> Flash Controller.
>
> Hi Vikas,
>
> On 07/24/2015 07:02 PM, vikasm wrote:
> > Hi Graham,
> >
> > On 07/24/2015 10:17 AM, Graham Moore wrote:
> >> Signed-off-by: Graham Moore
> >> ---
> >> V2: use NULL instead of modalias in spi_nor_scan call
> >> V3: Use existing property is-decoded-cs instead of creating duplicate.
> >> V4: Support Micron quad mode by snooping command stream for EVCR
> >> command and subsequently configuring Cadence controller for quad
> mode.
> >> V5: Clean up sparse and smatch complaints. Remove snooping of Micron
> >> quad mode. Add comment on XIP mode bit and dummy clock cycles. Set
> >> up SRAM partition at 1:1 during init.
> >> ---
> >> arch/arm/boot/dts/socfpga.dtsi |1 +
> >> arch/arm/boot/dts/socfpga_cyclone5_socdk.dts |1 -
> >> drivers/mtd/spi-nor/Kconfig |6 +
> >> drivers/mtd/spi-nor/Makefile |1 +
> >> drivers/mtd/spi-nor/cadence-quadspi.c| 1261
> ++
> >> 5 files changed, 1269 insertions(+), 1 deletion(-)
> >> create mode 100644 drivers/mtd/spi-nor/cadence-quadspi.c
> >>
> >> diff --git a/arch/arm/boot/dts/socfpga.dtsi
> >> b/arch/arm/boot/dts/socfpga.dtsi index c71a705..e9ecdce 100644
> >> --- a/arch/arm/boot/dts/socfpga.dtsi
> >> +++ b/arch/arm/boot/dts/socfpga.dtsi
> >> @@ -695,6 +695,7 @@
> >> is-decoded-cs = <1>;
> >> fifo-depth = <128>;
> >> status = "disabled";
> >> + m25p,fast-read;
> >
> > This patch is not applicable to l2-mtd master or linus master repo, might
> need to rebase it.
> >
>
> Argh, my mistake, these dts files are not supposed to be in the patch.
>
> ...
>
> >> +#include
> >> +
> >> +#define CQSPI_NAME "cadence-qspi"
> >
> > replace space with tabs.
> >
>
> They *are* tabs in my original patch. Not sure how they got changed to
> spaces...
>
> ...
> >> +
> >> +#define CQSPI_FIFO_WIDTH 4
> >
> > FIFO width could be 4 or 8 etc depending on the SOC, it would be better to
> get it from device.
> > You can refer to u-boot code for the same.
> >
>
> OK
> ...
> >> +
> >> +#define CQSPI_INDIRECTTRIGGER_ADDR_MASK0xF
> >
> > Mask value of 0xF is specific to socfpga platform.
> > Please refer to u-boot patchset for same discussion.
> >
>
> OK
> ...
> >> +static void cqspi_fifo_read(void *dest, const void __iomem
> *src_ahb_addr,
> >> + unsigned int bytes) {
> >> + unsigned int temp;
> >> + int remaining = bytes;
> >> + unsigned int *dest_ptr = (unsigned int *)dest;
> >> +
> >> + while (remaining >= CQSPI_FIFO_WIDTH) {
> >> + *dest_ptr = readl(src_ahb_addr);
> >> + dest_ptr++;
> >> + remaining -= CQSPI_FIFO_WIDTH;
> >
> > this logic only works when fifo width is 4 with "unsigned int" data of 4
> bytes.
> > It has been corrected in mainline u-boot or in the u-boot patches.
> >
>
> OK
> ...
> >> +static int cqspi_indirect_read_setup(struct spi_nor *nor,
> >> +unsigned int from_addr) {
> >> + unsigned int reg;
> >> + unsigned int dummy_clk = 0;
> >> + struct cqspi_st *cqspi = nor->priv;
> >> + void __iomem *reg_base = cqspi->iobase;
> >> + unsigned int ahb_phy_addr = cqspi->ahb_phy_addr;
> >> +
> >> + writel((ahb_phy_addr & CQSPI_INDIRECTTRIGGER_ADDR_MASK),
> >> + reg_base + CQSPI_REG_INDIRECTTRIGGER);
> >> + writel(from_addr, reg_base + CQSPI_REG_INDIRECTRDSTARTADDR);
> >
> > Base trigger register address (0x1c register) corresponds to the
> > address which should be put on AHB bus to handle indirect transfer
> triggere
RE: [PATCH V6 2/2] mtd: spi-nor: Add driver for Cadence Quad SPI Flash Controller.
Hi Marek,
> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: Wednesday, August 05, 2015 4:15 PM
> To: Vikas MANOCHA
> Cc: Graham Moore; linux-...@lists.infradead.org; David Woodhouse; Brian
> Norris; linux-kernel@vger.kernel.org; Alan Tull; Dinh Nguyen; Yves
> Vandervennet
> Subject: Re: [PATCH V6 2/2] mtd: spi-nor: Add driver for Cadence Quad SPI
> Flash Controller.
>
> On Wednesday, August 05, 2015 at 08:29:11 PM, vikasm wrote:
> > Hi Graham,
>
> Hi vikasm,
>
> > On 07/28/2015 10:38 AM, Graham Moore wrote:
> > > Signed-off-by: Graham Moore
> > > ---
> > > V2: use NULL instead of modalias in spi_nor_scan call
> > > V3: Use existing property is-decoded-cs instead of creating duplicate.
> > > V4: Support Micron quad mode by snooping command stream for EVCR
> > > command and subsequently configuring Cadence controller for quad
> mode.
> > > V5: Clean up sparse and smatch complaints. Remove snooping of
> > > Micron quad mode. Add comment on XIP mode bit and dummy clock
> > > cycles. Set up SRAM partition at 1:1 during init.
> > > V6: Remove dts patch that was included by mistake. Incorporate
> > > Vikas's comments regarding fifo width, SRAM partition setting, and
> > > trigger address. Trigger address was added as an unsigned int, as
> > > it is not an IO resource per se, and does not need to be mapped.
> > > Also add Marek Vasut's workaround for picking up OF properties on
> subnodes.
> >
> > I am still not able to apply this patch to master. It seems to be
> > rebased on master for ..spi-nor/Kconfig & spi-nor/makefile.
>
> I'm able to apply this on next/master just fine.
I think my thunderbird client is messing up with the patch, I am trying to fix
it.
>
> > Also I still see spaces are still not replaced by tabs in this version.
>
> Which exact spots are you talking about ? I don't see that many indent flubs
> in this patch to be honest. Sometimes, it is better to indent the last piece
> with spaces (mandated by kernel coding style btw) to increase the
> readability.
>
> This is in particular the case with stuff like this:
>
> pr_err("formating string that is almost 80 chars long %i!\n",
>parameter_that_is_indented_with_7_spaces);
>
> The sole purpose is to align stuff right under the opening parenthesis.
>
> > > ---
>
> btw. would you please learn to use [...] and keep only the part you're
> commenting on with a bit of context in your reply? It is really hard to locate
> your comment if it's inbetween 500 lines of nothing.
>
> [...]
Thanks Marek, I am not sure how to use it. I would appreciate any help.
>
> > > +static int cqspi_indirect_read_setup(struct spi_nor *nor,
> > > +unsigned int from_addr) {
> > > + unsigned int reg;
> > > + unsigned int dummy_clk = 0;
> > > + struct cqspi_st *cqspi = nor->priv;
> > > + void __iomem *reg_base = cqspi->iobase;
> > > +
> > > + writel(cqspi->trigger_address,
> > > + reg_base + CQSPI_REG_INDIRECTTRIGGER);
> >
> > move indirect trigger configuration in init, no need to do it for
> > every read & write.
>
> Fixed.
>
> > > + writel(from_addr, reg_base + CQSPI_REG_INDIRECTRDSTARTADDR);
> > > +
> > > + reg = nor->read_opcode << CQSPI_REG_RD_INSTR_OPCODE_LSB;
> > > + reg |= cqspi_calc_rdreg(nor, nor->read_opcode);
> > > +
> > > + /* Setup dummy clock cycles */ #define
> > > +CQSPI_SUPPORT_XIP_CHIPS #ifdef CQSPI_SUPPORT_XIP_CHIPS
> > > + /*
> > > +* Set mode bits high to ensure chip doesn't enter XIP.
> > > +* This results in an extra 8 dummy clocks so
> > > +* we must account for them.
> > > +*/
> > > + writel(0xFF, reg_base + CQSPI_REG_MODE_BIT);
> > > + reg |= (1 << CQSPI_REG_RD_INSTR_MODE_EN_LSB);
> > > + if (nor->read_dummy >= 8)
> > > + dummy_clk = nor->read_dummy - 8;
> > > + else
> > > + dummy_clk = 0;
> > > +#else
> > > + dummy_clk = nor->read_dummy; #endif
> > > + reg |= (dummy_clk & CQSPI_REG_RD_INSTR_DUMMY_MASK)
> > > + << CQSPI_REG_RD_INSTR_DUMMY_LSB;
> > > +
> > > + writel(reg, reg_base + CQSPI_REG_RD_INSTR);
> > > +
> > > + /* Set address wi
[PATCH] ARM: dts: stm32f7: add STM32f769I & stm32f746 discovery board support
Stm32f769I & stm32f746 are MCUs of stm32f7 family. Here are the major
spces of the two boards:
stm32f769I discovery board:
- Cortex-M7 core @216MHz
- 2MB mcu internal flash
- 512KB internal sram
- 16MB sdram memory
- 64MB qspi flash memory
- 4 inch wvga LCD-TFT Display
stm32f746 discovery board:
- Cortex-M7 core @216MHz
- 1MB mcu internal flash
- 320KB internal sram
- 8MB sdram memory
- 16MB qspi flash memory
- 4.3 inch 480x272 LCD-TFT display
Signed-off-by: Vikas Manocha
---
arch/arm/boot/dts/Makefile| 2 +
arch/arm/boot/dts/stm32f746-disco.dts | 101 ++
arch/arm/boot/dts/stm32f746.dtsi | 2 +-
arch/arm/boot/dts/stm32f769-disco.dts | 101 ++
4 files changed, 205 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/stm32f746-disco.dts
create mode 100644 arch/arm/boot/dts/stm32f769-disco.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 0118084..a119f74 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -763,6 +763,8 @@ dtb-$(CONFIG_ARCH_STI) += \
dtb-$(CONFIG_ARCH_STM32)+= \
stm32f429-disco.dtb \
stm32f469-disco.dtb \
+ stm32f746-disco.dtb \
+ stm32f769-disco.dtb \
stm32429i-eval.dtb \
stm32746g-eval.dtb
dtb-$(CONFIG_MACH_SUN4I) += \
diff --git a/arch/arm/boot/dts/stm32f746-disco.dts
b/arch/arm/boot/dts/stm32f746-disco.dts
new file mode 100644
index 000..c0e313f
--- /dev/null
+++ b/arch/arm/boot/dts/stm32f746-disco.dts
@@ -0,0 +1,101 @@
+/*
+ * Copyright 2017 - Vikas MANOCHA
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "stm32f746.dtsi"
+#include
+
+/ {
+ model = "STMicroelectronics STM32F746-DISCO board";
+ compatible = "st,stm32f746-disco", "st,stm32f746";
+
+ chosen {
+ bootargs = "root=/dev/ram";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0xC000 0x80>;
+ };
+
+ aliases {
+ serial0 = &usart1;
+ };
+
+};
+
+&clk_hse {
+ clock-frequency = <2500>;
+};
+
+&pinctrl {
+ usart1_pins: usart1@0 {
+ pins1 {
+ pinmux = ;
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <2>;
+ };
+ pins2 {
+ pinmux = ;
+ bias-disable;
+ };
+ };
+
+ qspi_pins: qspi@0 {
+ pins {
+ pinmux = ,
+ ,
+ ,
+ ,
+ ,
+ ;
+ slew-rate = <2&
Re: [PATCH] ARM: dts: stm32f7: add STM32f769I & stm32f746 discovery board support
Thanks Alex,
On 04/10/2017 12:23 AM, Alexandre Torgue wrote:
> Hi
>
> On 04/08/2017 03:12 AM, Vikas Manocha wrote:
>> Stm32f769I & stm32f746 are MCUs of stm32f7 family. Here are the major
>> spces of the two boards:
>>
>> stm32f769I discovery board:
>> - Cortex-M7 core @216MHz
>> - 2MB mcu internal flash
>> - 512KB internal sram
>> - 16MB sdram memory
>> - 64MB qspi flash memory
>> - 4 inch wvga LCD-TFT Display
>>
>> stm32f746 discovery board:
>> - Cortex-M7 core @216MHz
>> - 1MB mcu internal flash
>> - 320KB internal sram
>> - 8MB sdram memory
>> - 16MB qspi flash memory
>> - 4.3 inch 480x272 LCD-TFT display
>>
>> Signed-off-by: Vikas Manocha
>> ---
>> arch/arm/boot/dts/Makefile| 2 +
>> arch/arm/boot/dts/stm32f746-disco.dts | 101
>> ++
>> arch/arm/boot/dts/stm32f746.dtsi | 2 +-
>> arch/arm/boot/dts/stm32f769-disco.dts | 101
>> ++
>> 4 files changed, 205 insertions(+), 1 deletion(-)
>> create mode 100644 arch/arm/boot/dts/stm32f746-disco.dts
>> create mode 100644 arch/arm/boot/dts/stm32f769-disco.dts
>>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index 0118084..a119f74 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -763,6 +763,8 @@ dtb-$(CONFIG_ARCH_STI) += \
>> dtb-$(CONFIG_ARCH_STM32)+= \
>> stm32f429-disco.dtb \
>> stm32f469-disco.dtb \
>> +stm32f746-disco.dtb \
>> +stm32f769-disco.dtb \
>> stm32429i-eval.dtb \
>> stm32746g-eval.dtb
>> dtb-$(CONFIG_MACH_SUN4I) += \
>> diff --git a/arch/arm/boot/dts/stm32f746-disco.dts
>> b/arch/arm/boot/dts/stm32f746-disco.dts
>> new file mode 100644
>> index 000..c0e313f
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/stm32f746-disco.dts
>> @@ -0,0 +1,101 @@
>> +/*
>> + * Copyright 2017 - Vikas MANOCHA
>> + *
>> + * This file is dual-licensed: you can use it either under the terms
>> + * of the GPL or the X11 license, at your option. Note that this dual
>> + * licensing only applies to this file, and not this project as a
>> + * whole.
>> + *
>> + * a) This file is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of the
>> + * License, or (at your option) any later version.
>> + *
>> + * This file is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * Or, alternatively,
>> + *
>> + * b) Permission is hereby granted, free of charge, to any person
>> + * obtaining a copy of this software and associated documentation
>> + * files (the "Software"), to deal in the Software without
>> + * restriction, including without limitation the rights to use,
>> + * copy, modify, merge, publish, distribute, sublicense, and/or
>> + * sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following
>> + * conditions:
>> + *
>> + * The above copyright notice and this permission notice shall be
>> + * included in all copies or substantial portions of the Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
>> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> + * OTHER DEALINGS IN THE SOFTWARE.
>> + */
>> +
>> +/dts-v1/;
>> +#include "stm32f746.dtsi"
>> +#include
>> +
>> +/ {
>> +model = "STMicroelectronics STM32F746-DISCO board";
>> +compatible = "st,stm32f746-disco", "st,stm32f746";
>> +
>> +chosen {
>> +bootargs = "root=/dev/ram";
>> +stdout-path = &qu
RE: [PATCH] ARM: dts: stm32f7: add STM32f769I & stm32f746 discovery board support
Hi Alex, > -Original Message- > From: Alexandre TORGUE > Sent: Tuesday, April 11, 2017 12:51 AM > To: Vikas MANOCHA ; Patrice CHOTARD > > Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS > ; moderated list:ARM PORT > ; open list > ; Mark Rutland ; Maxime > Coquelin ; Rob Herring ; > Russell King > Subject: Re: [PATCH] ARM: dts: stm32f7: add STM32f769I & stm32f746 discovery > board support > > Hi Vikas > > On 04/10/2017 08:40 PM, Vikas Manocha wrote: > > Thanks Alex, > > > > On 04/10/2017 12:23 AM, Alexandre Torgue wrote: > >> Hi > >> > >> On 04/08/2017 03:12 AM, Vikas Manocha wrote: > >>> Stm32f769I & stm32f746 are MCUs of stm32f7 family. Here are the > >>> major spces of the two boards: > >>> > >>> stm32f769I discovery board: > >>> - Cortex-M7 core @216MHz > >>> - 2MB mcu internal flash > >>> - 512KB internal sram > >>> - 16MB sdram memory > >>> - 64MB qspi flash memory > >>> - 4 inch wvga LCD-TFT Display > >>> > >>> stm32f746 discovery board: > >>> - Cortex-M7 core @216MHz > >>> - 1MB mcu internal flash > >>> - 320KB internal sram > >>> - 8MB sdram memory > >>> - 16MB qspi flash memory > >>> - 4.3 inch 480x272 LCD-TFT display > >>> > >>> Signed-off-by: Vikas Manocha > >>> --- > >>> arch/arm/boot/dts/Makefile| 2 + > >>> arch/arm/boot/dts/stm32f746-disco.dts | 101 > >>> ++ > >>> arch/arm/boot/dts/stm32f746.dtsi | 2 +- > >>> arch/arm/boot/dts/stm32f769-disco.dts | 101 > >>> ++ > >>> 4 files changed, 205 insertions(+), 1 deletion(-) create mode > >>> 100644 arch/arm/boot/dts/stm32f746-disco.dts > >>> create mode 100644 arch/arm/boot/dts/stm32f769-disco.dts > >>> > >>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > >>> index 0118084..a119f74 100644 > >>> --- a/arch/arm/boot/dts/Makefile > >>> +++ b/arch/arm/boot/dts/Makefile > >>> @@ -763,6 +763,8 @@ dtb-$(CONFIG_ARCH_STI) += \ > >>> dtb-$(CONFIG_ARCH_STM32)+= \ > >>> stm32f429-disco.dtb \ > >>> stm32f469-disco.dtb \ > >>> +stm32f746-disco.dtb \ > >>> +stm32f769-disco.dtb \ > >>> stm32429i-eval.dtb \ > >>> stm32746g-eval.dtb > >>> dtb-$(CONFIG_MACH_SUN4I) += \ > >>> diff --git a/arch/arm/boot/dts/stm32f746-disco.dts > >>> b/arch/arm/boot/dts/stm32f746-disco.dts > >>> new file mode 100644 > >>> index 000..c0e313f > >>> --- /dev/null > >>> +++ b/arch/arm/boot/dts/stm32f746-disco.dts > >>> @@ -0,0 +1,101 @@ > >>> +/* > >>> + * Copyright 2017 - Vikas MANOCHA > >>> + * > >>> + * This file is dual-licensed: you can use it either under the > >>> +terms > >>> + * of the GPL or the X11 license, at your option. Note that this > >>> +dual > >>> + * licensing only applies to this file, and not this project as a > >>> + * whole. > >>> + * > >>> + * a) This file is free software; you can redistribute it and/or > >>> + * modify it under the terms of the GNU General Public License as > >>> + * published by the Free Software Foundation; either version 2 of the > >>> + * License, or (at your option) any later version. > >>> + * > >>> + * This file is distributed in the hope that it will be useful, > >>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of > >>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > >>> + * GNU General Public License for more details. > >>> + * > >>> + * Or, alternatively, > >>> + * > >>> + * b) Permission is hereby granted, free of charge, to any person > >>> + * obtaining a copy of this software and associated documentation > >>> + * files (the "Software"), to deal in the Software without > >>> + * restriction, including without limitation the rights to use, > >>> + * copy, modify, merge, publish, distribute, sublicense, and/or > >>> + * sell copies of the Software, and to permit persons to who
[PATCH] ARM: dts: stm32f7: add stm32f769I & stm32f746 discovery board support
Stm32f769I & stm32f746 are MCUs of stm32f7 family. Here are the major
specs of the two boards:
stm32f769I discovery board:
- Cortex-M7 core @216MHz
- 2MB mcu internal flash
- 512KB internal sram
- 16MB sdram memory
- 64MB qspi flash memory
- 4 inch wvga LCD-TFT Display
stm32f746 discovery board:
- Cortex-M7 core @216MHz
- 1MB mcu internal flash
- 320KB internal sram
- 8MB sdram memory
- 16MB qspi flash memory
- 4.3 inch 480x272 LCD-TFT display
Signed-off-by: Vikas Manocha
---
Changed in v2:
- moved pin muxing from board dts file to dtsi file.
arch/arm/boot/dts/Makefile| 2 +
arch/arm/boot/dts/stm32f746-disco.dts | 74 +++
arch/arm/boot/dts/stm32f746.dtsi | 12 ++
arch/arm/boot/dts/stm32f769-disco.dts | 74 +++
4 files changed, 162 insertions(+)
create mode 100644 arch/arm/boot/dts/stm32f746-disco.dts
create mode 100644 arch/arm/boot/dts/stm32f769-disco.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 0118084..a119f74 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -763,6 +763,8 @@ dtb-$(CONFIG_ARCH_STI) += \
dtb-$(CONFIG_ARCH_STM32)+= \
stm32f429-disco.dtb \
stm32f469-disco.dtb \
+ stm32f746-disco.dtb \
+ stm32f769-disco.dtb \
stm32429i-eval.dtb \
stm32746g-eval.dtb
dtb-$(CONFIG_MACH_SUN4I) += \
diff --git a/arch/arm/boot/dts/stm32f746-disco.dts
b/arch/arm/boot/dts/stm32f746-disco.dts
new file mode 100644
index 000..55afae9
--- /dev/null
+++ b/arch/arm/boot/dts/stm32f746-disco.dts
@@ -0,0 +1,74 @@
+/*
+ * Copyright 2017 - Vikas MANOCHA
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "stm32f746.dtsi"
+#include
+
+/ {
+ model = "STMicroelectronics STM32F746-DISCO board";
+ compatible = "st,stm32f746-disco", "st,stm32f746";
+
+ chosen {
+ bootargs = "root=/dev/ram";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0xC000 0x80>;
+ };
+
+ aliases {
+ serial0 = &usart1;
+ };
+
+};
+
+&clk_hse {
+ clock-frequency = <2500>;
+};
+
+&usart1 {
+ pinctrl-0 = <&usart1_pins_pa9_pa10>;
+ pinctrl-names = "default";
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index f321ffe..1064fb1 100644
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -287,6 +287,18 @@
bias-disable;
};
};
+ usart1_pins_pa9_pa10: usart1@1 {
+ pins1 {
+ pinmux = ;
+
[PATCH v3] ARM: dts: stm32f7: add stm32f769I & stm32f746 discovery board support
Stm32f769I & stm32f746 are MCUs of stm32f7 family. Here are the major
specs of the two boards:
stm32f769I discovery board:
- Cortex-M7 core @216MHz
- 2MB mcu internal flash
- 512KB internal sram
- 16MB sdram memory
- 64MB qspi flash memory
- 4 inch wvga LCD-TFT Display
stm32f746 discovery board:
- Cortex-M7 core @216MHz
- 1MB mcu internal flash
- 320KB internal sram
- 8MB sdram memory
- 16MB qspi flash memory
- 4.3 inch 480x272 LCD-TFT display
Signed-off-by: Vikas Manocha
---
Changed in v3:
- fixed usart pin muxing for stm32f746 board, correct one is
usart1_pins_pa9_pb7.
- Added patch version in the patch title, was missed in v2.
Changed in v2:
- moved pin muxing from board dts file to soc dtsi
arch/arm/boot/dts/Makefile| 2 +
arch/arm/boot/dts/stm32f746-disco.dts | 74 +++
arch/arm/boot/dts/stm32f746.dtsi | 12 ++
arch/arm/boot/dts/stm32f769-disco.dts | 74 +++
4 files changed, 162 insertions(+)
create mode 100644 arch/arm/boot/dts/stm32f746-disco.dts
create mode 100644 arch/arm/boot/dts/stm32f769-disco.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 0118084..a119f74 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -763,6 +763,8 @@ dtb-$(CONFIG_ARCH_STI) += \
dtb-$(CONFIG_ARCH_STM32)+= \
stm32f429-disco.dtb \
stm32f469-disco.dtb \
+ stm32f746-disco.dtb \
+ stm32f769-disco.dtb \
stm32429i-eval.dtb \
stm32746g-eval.dtb
dtb-$(CONFIG_MACH_SUN4I) += \
diff --git a/arch/arm/boot/dts/stm32f746-disco.dts
b/arch/arm/boot/dts/stm32f746-disco.dts
new file mode 100644
index 000..52e5834
--- /dev/null
+++ b/arch/arm/boot/dts/stm32f746-disco.dts
@@ -0,0 +1,74 @@
+/*
+ * Copyright 2017 - Vikas MANOCHA
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "stm32f746.dtsi"
+#include
+
+/ {
+ model = "STMicroelectronics STM32F746-DISCO board";
+ compatible = "st,stm32f746-disco", "st,stm32f746";
+
+ chosen {
+ bootargs = "root=/dev/ram";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0xC000 0x80>;
+ };
+
+ aliases {
+ serial0 = &usart1;
+ };
+
+};
+
+&clk_hse {
+ clock-frequency = <2500>;
+};
+
+&usart1 {
+ pinctrl-0 = <&usart1_pins_pa9_pb7>;
+ pinctrl-names = "default";
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index f321ffe..82becbb 100644
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -287,6 +287,18 @@
bias-disable;
};
};
+
Re: [RESEND RFC PATCH] ARM: dts: stm32: change pinctrl bindings definition
Hi Alex,
On 07/17/2017 09:23 AM, Alexandre Torgue wrote:
> From: Alexandre TORGUE
>
> Initially each pin was declared in "include/dt-bindings/stm32f429-pinfunc.h"
> and each definition contained SOC names (ex: STM32F429_PA9_FUNC_USART1_TX).
> Since this approach was approved, the number of supported MCU has
> increased (STM32F429/STM32F469/STM32f746/STM32H743). To avoid to add a new
> file in "include/dt-bindings" each time a new STM32 SOC arrives I propose
> a new approach which consist to use a macro to define pin muxing in device
> tree. All STM32 will use the common macro to define pinmux. Furthermore, it
> will make easy maintenance and integration of new SOC.
>
> Signed-off-by: Alexandre TORGUE
>
> diff --git a/arch/arm/boot/dts/stm32f429.dtsi
> b/arch/arm/boot/dts/stm32f429.dtsi
> index a8113dc..4bb2b4f 100644
> --- a/arch/arm/boot/dts/stm32f429.dtsi
> +++ b/arch/arm/boot/dts/stm32f429.dtsi
> @@ -47,7 +47,7 @@
>
> #include "skeleton.dtsi"
> #include "armv7-m.dtsi"
> -#include
> +#include
> #include
> #include
>
> @@ -687,35 +687,35 @@
>
> usart1_pins_a: usart1@0 {
> pins1 {
> - pinmux = ;
> + pinmux = ; /*
> USART1_TX */
> bias-disable;
> drive-push-pull;
> slew-rate = <0>;
> };
> pins2 {
> - pinmux =
> ;
> + pinmux = ;
> /* USART1_RX */
> bias-disable;
> };
> };
>
> usart3_pins_a: usart3@0 {
> pins1 {
> - pinmux =
> ;
> + pinmux = ;
> /* USART3_TX */
> bias-disable;
> drive-push-pull;
> slew-rate = <0>;
> };
> pins2 {
> - pinmux =
> ;
> + pinmux = ;
> /* USART3_RX */
> bias-disable;
> };
> };
>
> usbotg_fs_pins_a: usbotg_fs@0 {
> pins {
> - pinmux =
> ,
> -
> ,
> -
> ;
> + pinmux = ,
> /* OTG_FS_ID */
> + ,
> /* OTG_FS_DM */
> + ;
> /* OTG_FS_DP */
> bias-disable;
> drive-push-pull;
> slew-rate = <2>;
> @@ -724,9 +724,9 @@
>
> usbotg_fs_pins_b: usbotg_fs@1 {
> pins {
> - pinmux =
> ,
> -
> ,
> -
> ;
> + pinmux = ,
> /* OTG_HS_ID */
> + ,
> /* OTG_HS_DM */
> + ;
> /* OTG_HS_DP */
> bias-disable;
> drive-push-pull;
> slew-rate = <2>;
> @@ -735,18 +735,18 @@
>
> usbotg_hs_pins_a: usbotg_hs@0 {
> pins {
> - pinmux =
> ,
> -
> ,
> -
> ,
> -
> ,
> -
> ,
> -
> ,
> -
> ,
> -
> ,
> -
> ,
> -
> ,
> -
> ,
> -
> ;
> + pinmux = ,
> /* OTG_HS_ULPI_NXT*/
> + ,
> /* OTG_HS_ULPI_DIR */
> + ,
> /* OTG_HS_ULPI_STP */
> + ,
> /* OTG_HS_ULPI_CK */
> + ,
> /* OTG_HS_ULPI_D0 */
> + ,
> /* OTG_HS_ULPI_D1 */
Re: [RFC PATCH v2] ARM: dts: stm32: change pinctrl bindings definition
Looks good,
On 07/21/2017 05:34 AM, Alexandre Torgue wrote:
> Initially each pin was declared in "include/dt-bindings/stm32f429-pinfunc.h"
> and each definition contained SOC names (ex: STM32F429_PA9_FUNC_USART1_TX).
> Since this approach was approved, the number of supported MCU has
> increased (STM32F429/STM32F469/STM32f746/STM32H743). To avoid to add a new
> file in "include/dt-bindings" each time a new STM32 SOC arrives I propose
> a new approach which consist to use a macro to define pin muxing in device
> tree. All STM32 will use the common macro to define pinmux. Furthermore, it
> will make maintenance and integration of new SOC easier .
>
> Signed-off-by: Alexandre TORGUE
Reviewed-by: Vikas MANOCHA
Cheers,
Vikas
>
> diff --git a/arch/arm/boot/dts/stm32f429.dtsi
> b/arch/arm/boot/dts/stm32f429.dtsi
> index a8113dc..e9e46ee 100644
> --- a/arch/arm/boot/dts/stm32f429.dtsi
> +++ b/arch/arm/boot/dts/stm32f429.dtsi
> @@ -47,7 +47,7 @@
>
> #include "skeleton.dtsi"
> #include "armv7-m.dtsi"
> -#include
> +#include
> #include
> #include
>
> @@ -687,35 +687,35 @@
>
> usart1_pins_a: usart1@0 {
> pins1 {
> - pinmux = ;
> + pinmux = AF7)>; /* USART1_TX */
> bias-disable;
> drive-push-pull;
> slew-rate = <0>;
> };
> pins2 {
> - pinmux =
> ;
> + pinmux = AF7)>; /* USART1_RX */
> bias-disable;
> };
> };
>
> usart3_pins_a: usart3@0 {
> pins1 {
> - pinmux =
> ;
> + pinmux = AF7)>; /* USART3_TX */
> bias-disable;
> drive-push-pull;
> slew-rate = <0>;
> };
> pins2 {
> - pinmux =
> ;
> + pinmux = AF7)>; /* USART3_RX */
> bias-disable;
> };
> };
>
> usbotg_fs_pins_a: usbotg_fs@0 {
> pins {
> - pinmux =
> ,
> -
> ,
> -
> ;
> + pinmux = AF10)>, /* OTG_FS_ID */
> + AF10)>, /* OTG_FS_DM */
> + AF10)>; /* OTG_FS_DP */
> bias-disable;
> drive-push-pull;
> slew-rate = <2>;
> @@ -724,9 +724,9 @@
>
> usbotg_fs_pins_b: usbotg_fs@1 {
> pins {
> - pinmux =
> ,
> -
> ,
> -
> ;
> + pinmux = AF12)>, /* OTG_HS_ID */
> + AF12)>, /* OTG_HS_DM */
> + AF12)>; /* OTG_HS_DP */
> bias-disable;
> drive-push-pull;
> slew-rate = <2>;
> @@ -735,18 +735,18 @@
>
> usbotg_hs_pins_a: usbotg_hs@0 {
> pins {
> - pinmux =
> ,
> -
> ,
> -
> ,
> -
> ,
> -
> ,
> -
> ,
> -
> ,
> -
> ,
> -
> ,
> -
> ,
> -
> ,
>
RE: [PATCH 1/1] ARM: compressed/head.S: fix __nop macro rept number for ARMv7M
Hi Patrice, > -Original Message- > From: Patrice CHOTARD > Sent: Friday, May 19, 2017 6:41 AM > To: Ard Biesheuvel > Cc: li...@armlinux.org.uk; linux-arm-ker...@lists.infradead.org; > linux-kernel@vger.kernel.org; Christophe PRIOUZEAU > ; Christophe KERELLO > ; Vikas MANOCHA ; > Patrick DELAUNAY > Subject: Re: [PATCH 1/1] ARM: compressed/head.S: fix __nop macro rept number > for ARMv7M > > Hi Ard > > On 05/18/2017 01:16 PM, Ard Biesheuvel wrote: > > On 12 May 2017 at 08:22, Patrice CHOTARD wrote: > >> Hi all > >> > >> It's a gentle reminder to not forgot this patch. > >> > >> Thanks > >> > >> Patrice > >> > >> On 04/25/2017 11:01 AM, patrice.chot...@st.com wrote: > >>> From: Patrice Chotard > >>> > >>> In zImage, _magic_sig is located at offset 0x24. > >>> But for ARMv7M architecture which enable CPU_THUMBONLY and !EFI_STUB > >>> kernel flag, _magic_sig is located at offset 0x14 > >>> > >>> 00 46 00 46 00 46 00 46 00 46 00 46 00 46 0f f2 > >>> |.F.F.F.F.F.F.F.ò| > >>> 0010 15 0c 60 47 18 28 6f 01 00 00 00 00 28 5c 0e 00 > >>> |..`G.(o.(\..| > >>> 0020 01 02 03 04 0f 46 90 46 00 00 00 00 00 00 00 00 > >>> |.F.F| > >>> > >>> Reproduced with stm32_defconfig with XIP_KERNEL flag disabled. > >>> > >>> To restore correct _magic_sig offset at 0x24, we add 8 additional > >>> "mov r0, r0" instruction. > >>> > >>> Signed-off-by: Patrice Chotard > >>> --- > >>> arch/arm/boot/compressed/head.S | 3 ++- > >>> 1 file changed, 2 insertions(+), 1 deletion(-) > >>> > >>> diff --git a/arch/arm/boot/compressed/head.S > >>> b/arch/arm/boot/compressed/head.S index 9150f97..5d9cda3 100644 > >>> --- a/arch/arm/boot/compressed/head.S > >>> +++ b/arch/arm/boot/compressed/head.S > >>> @@ -127,7 +127,8 @@ > >>>AR_CLASS( .arm) > >>> start: > >>>.type start,#function > >>> - .rept 7 > >>> + ARM( .rept 7) > >>> + THUMB( .rept 15) > >>> > > > > Could you try using W(mov) instead of mov in the definition of __nop ? > > If i use W(mov) instead of mov in __nop macro, i need to add one additional > "mov r0,r0" in THUMB case as following : > > > start: > .type start,#function > .rept 7 > __nop > .endr > ARM( mov r0, r0 ) > ARM( b 1f ) > + THUMB( mov r0, r0 ) No need of extra THUMB instruction, compiling previous mov r0,r0 should be good for both arm & thumb : __nop .endr mov r0, r0 /* 32 bit for arm & 16 bit for thumb */ ARM( b 1f ) THUMB( badrr12, 1f ) Cheers, Vikas >THUMB( badrr12, 1f ) >THUMB( bx r12 ) > > .word _magic_sig @ Magic numbers to help the loader > .word _magic_start@ absolute load/run zImage address > .word _magic_end @ zImage end address > .word 0x04030201 @ endianness flag > > > Which implementation do you prefer ? > > Thanks > > Patrice
RE: [PATCH 0/3] Arm: dts: stm32: remove extra compatible uart string
Hi Alex, > -Original Message- > From: Alexandre TORGUE > Sent: Thursday, October 05, 2017 9:02 AM > To: Vikas MANOCHA ; linux-kernel@vger.kernel.org > Cc: Patrice CHOTARD > Subject: Re: [PATCH 0/3] Arm: dts: stm32: remove extra compatible uart string > > Hi Vikas > > > On 09/29/2017 12:51 AM, Vikas Manocha wrote: > > stm32 uart driver is using two compatible strings "st,stm32-usart" > > & "st,stm32-uart". One can be removed safely to save some space & time. > > > > Vikas Manocha (3): > >Arm: dts: stm32: remove extra compatible string for uart > >Arm: dts: stm32: remove extra compatible string from DT & driver > >ARM: dts: stm32h7: correct uart nodes compatible string > > > > Documentation/devicetree/bindings/dma/stm32-dma.txt | 2 +- > > Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 10 > > +++--- > > arch/arm/boot/dts/stm32f429.dtsi| 12 > > ++-- > > arch/arm/boot/dts/stm32f746.dtsi| 12 > > ++-- > > arch/arm/boot/dts/stm32h743.dtsi| 4 ++-- > > drivers/tty/serial/stm32-usart.c| 3 --- > > 6 files changed, 18 insertions(+), 25 deletions(-) > > > > I think it is better to put people in CC of patch 1, 2, 3 also in CC of > cover-letter. I am not sure how to add relevant people in cover-letter, Get_maintainers script works for the patches only. > I think you should split patches differently. Maybe one > for drivers and bindings (doc) updates. And others for DT updates. Yes, it's like this only. First patch is DT binding & second is its implementation in the driver & stm32 device tree. > > Conerning DT patches, all headers should start by "ARM: dts: stm32: blabla" Yes, Same headers is used for the patch. You mean "arm" should be "ARM" ? Cheers, Vikas > > Regards > Alex
[PATCH 0/3] Arm: dts: stm32: remove extra compatible uart string
stm32 uart driver is using two compatible strings "st,stm32-usart" & "st,stm32-uart". One can be removed safely to save some space & time. Vikas Manocha (3): Arm: dts: stm32: remove extra compatible string for uart Arm: dts: stm32: remove extra compatible string from DT & driver ARM: dts: stm32h7: correct uart nodes compatible string Documentation/devicetree/bindings/dma/stm32-dma.txt | 2 +- Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 10 +++--- arch/arm/boot/dts/stm32f429.dtsi| 12 ++-- arch/arm/boot/dts/stm32f746.dtsi| 12 ++-- arch/arm/boot/dts/stm32h743.dtsi| 4 ++-- drivers/tty/serial/stm32-usart.c| 3 --- 6 files changed, 18 insertions(+), 25 deletions(-) -- 1.9.1
[PATCH 1/3] Arm: dts: stm32: remove extra compatible string for uart
This patch removes the extra compatibility string "st,stm32-usart" to
avoid confusion, save some time & space.
Signed-off-by: Vikas Manocha
Reviewed-by: Patrice Chotard
---
Documentation/devicetree/bindings/dma/stm32-dma.txt | 2 +-
Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 10 +++---
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/stm32-dma.txt
b/Documentation/devicetree/bindings/dma/stm32-dma.txt
index 4408af6..6f44df9 100644
--- a/Documentation/devicetree/bindings/dma/stm32-dma.txt
+++ b/Documentation/devicetree/bindings/dma/stm32-dma.txt
@@ -71,7 +71,7 @@ channel: a phandle to the DMA controller plus the following
four integer cells:
Example:
usart1: serial@40011000 {
- compatible = "st,stm32-usart", "st,stm32-uart";
+ compatible = "st,stm32-uart";
reg = <0x40011000 0x400>;
interrupts = <37>;
clocks = <&clk_pclk2>;
diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index 3657f9f..d150b04 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -2,14 +2,10 @@
Required properties:
- compatible: can be either:
- - "st,stm32-usart",
- "st,stm32-uart",
- - "st,stm32f7-usart",
- "st,stm32f7-uart",
- - "st,stm32h7-usart"
- "st,stm32h7-uart".
- depending on whether the device supports synchronous mode
- and is compatible with stm32(f4), stm32f7 or stm32h7.
+ depending is compatible with stm32(f4), stm32f7 or stm32h7.
- reg: The address and length of the peripheral registers space
- interrupts:
- The interrupt line for the USART instance,
@@ -33,7 +29,7 @@ usart4: serial@40004c00 {
};
usart2: serial@40004400 {
- compatible = "st,stm32-usart", "st,stm32-uart";
+ compatible = "st,stm32-uart";
reg = <0x40004400 0x400>;
interrupts = <38>;
clocks = <&clk_pclk1>;
@@ -43,7 +39,7 @@ usart2: serial@40004400 {
};
usart1: serial@40011000 {
- compatible = "st,stm32-usart", "st,stm32-uart";
+ compatible = "st,stm32-uart";
reg = <0x40011000 0x400>;
interrupts = <37>;
clocks = <&rcc 0 164>;
--
1.9.1
[PATCH 3/3] ARM: dts: stm32h7: correct uart nodes compatible string
With this change, stm32h743 will use its own uart configuration.
Major difference between stm32f7 & stm32h7 uart configuration is FIFO
availability in stm32h7.
Signed-off-by: Vikas Manocha
Reviewed-by: Patrice Chotard
---
arch/arm/boot/dts/stm32h743.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index 26de315..fab637b 100644
--- a/arch/arm/boot/dts/stm32h743.dtsi
+++ b/arch/arm/boot/dts/stm32h743.dtsi
@@ -67,7 +67,7 @@
};
usart2: serial@40004400 {
- compatible = "st,stm32f7-uart";
+ compatible = "st,stm32h7-uart";
reg = <0x40004400 0x400>;
interrupts = <38>;
status = "disabled";
@@ -99,7 +99,7 @@
};
usart1: serial@40011000 {
- compatible = "st,stm32f7-uart";
+ compatible = "st,stm32h7-uart";
reg = <0x40011000 0x400>;
interrupts = <37>;
status = "disabled";
--
1.9.1
[PATCH 2/3] Arm: dts: stm32: remove extra compatible string from DT & driver
This patch remove the extra compatibility string "st,stm32-usart" from
driver & device tree.
Signed-off-by: Vikas Manocha
Reviewed-by: Patrice Chotard
---
arch/arm/boot/dts/stm32f429.dtsi | 12 ++--
arch/arm/boot/dts/stm32f746.dtsi | 12 ++--
arch/arm/boot/dts/stm32h743.dtsi | 4 ++--
drivers/tty/serial/stm32-usart.c | 3 ---
4 files changed, 14 insertions(+), 17 deletions(-)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index dd7e99b..5d6bfdf 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -315,7 +315,7 @@
};
usart2: serial@40004400 {
- compatible = "st,stm32-usart", "st,stm32-uart";
+ compatible = "st,stm32-uart";
reg = <0x40004400 0x400>;
interrupts = <38>;
clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART2)>;
@@ -323,7 +323,7 @@
};
usart3: serial@40004800 {
- compatible = "st,stm32-usart", "st,stm32-uart";
+ compatible = "st,stm32-uart";
reg = <0x40004800 0x400>;
interrupts = <39>;
clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART3)>;
@@ -387,7 +387,7 @@
};
usart7: serial@40007800 {
- compatible = "st,stm32-usart", "st,stm32-uart";
+ compatible = "st,stm32-uart";
reg = <0x40007800 0x400>;
interrupts = <82>;
clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART7)>;
@@ -395,7 +395,7 @@
};
usart8: serial@40007c00 {
- compatible = "st,stm32-usart", "st,stm32-uart";
+ compatible = "st,stm32-uart";
reg = <0x40007c00 0x400>;
interrupts = <83>;
clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART8)>;
@@ -445,7 +445,7 @@
};
usart1: serial@40011000 {
- compatible = "st,stm32-usart", "st,stm32-uart";
+ compatible = "st,stm32-uart";
reg = <0x40011000 0x400>;
interrupts = <37>;
clocks = <&rcc 0 STM32F4_APB2_CLOCK(USART1)>;
@@ -456,7 +456,7 @@
};
usart6: serial@40011400 {
- compatible = "st,stm32-usart", "st,stm32-uart";
+ compatible = "st,stm32-uart";
reg = <0x40011400 0x400>;
interrupts = <71>;
clocks = <&rcc 0 STM32F4_APB2_CLOCK(USART6)>;
diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index 5633860..5f94178 100644
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -136,7 +136,7 @@
};
usart2: serial@40004400 {
- compatible = "st,stm32f7-usart", "st,stm32f7-uart";
+ compatible = "st,stm32f7-uart";
reg = <0x40004400 0x400>;
interrupts = <38>;
clocks = <&rcc 1 CLK_USART2>;
@@ -144,7 +144,7 @@
};
usart3: serial@40004800 {
- compatible = "st,stm32f7-usart", "st,stm32f7-uart";
+ compatible = "st,stm32f7-uart";
reg = <0x40004800 0x400>;
interrupts = <39>;
clocks = <&rcc 1 CLK_USART3>;
@@ -177,7 +177,7 @@
};
usart7: serial@40007800 {
- compatible = "st,stm32f7-usart", "st,stm32f7-uart";
+ compatible = "st,stm32f7-uart";
reg = <0x40007800 0x400>;
interrupts = <82>;
clocks = <&rcc 1 CLK_UART7>;
@@ -185,7 +185,7 @@
};
usart8: serial@40007c00 {
- compatible = "st,stm32f7-usart", "st,stm32f7-uart";
+ compatible = "st,stm32f7-uart";
reg = <0x40007c00 0x400>;
interrupts = <83>;
clocks = <&rcc 1
