Re: [PATCH v2] scsi: ufs: Fix possible infinite loop in ufshcd_hold

2020-07-29 Thread Can Guo

Hi Stanley,

On 2020-07-29 18:26, Stanley Chu wrote:

Hi Can,

On Wed, 2020-07-29 at 16:43 +0800, Can Guo wrote:

Hi Stanley,

On 2020-07-29 10:40, Stanley Chu wrote:
> In ufshcd_suspend(), after clk-gating is suspended and link is set
> as Hibern8 state, ufshcd_hold() is still possibly invoked before
> ufshcd_suspend() returns. For example, MediaTek's suspend vops may
> issue UIC commands which would call ufshcd_hold() during the command
> issuing flow.
>
> Now if UFSHCD_CAP_HIBERN8_WITH_CLK_GATING capability is enabled,
> then ufshcd_hold() may enter infinite loops because there is no
> clk-ungating work scheduled or pending. In this case, ufshcd_hold()
> shall just bypass, and keep the link as Hibern8 state.
>

The infinite loop is expected as ufshcd_hold is called again after
link is put to hibern8 state, so in QCOM's code, we never do this.


Sadly MediaTek have to do this to make our UniPro to enter low-power
mode.


The cap UFSHCD_CAP_HIBERN8_WITH_CLK_GATING means UIC link state
must not be HIBERN8 after ufshcd_hold(async=false) returns.


If driver is not in PM scenarios, e.g., suspended, above statement 
shall

be always followed. But two obvious violations are existed,

1. In ufshcd_suspend(), link is set as HIBERN8 behind ufshcd_hold()
2. In ufshcd_resume(), link is set back as Active before
ufshcd_release() is invoked

So as my understanding, special conditions are allowed in PM scenarios,
and this is why "hba->clk_gating.is_suspended" is introduced. By this
thought, I used "hba->clk_gating.is_suspended" in this patch as the
mandatory condition to allow ufshcd_hold() usage in vendor suspend and
resume callbacks.



Instead of bailing out from that loop, which makes the logic of
ufshcd_hold and clk gating even more complex, how about removing
ufshcd_hold/release from ufshcd_send_uic_cmd()? I think they are
redundant and we should never send DME cmds if clocks/powers are
not ready. I mean callers should make sure they are ready to send
DME cmds (and only callers know when), but not leave that job to
ufshcd_send_uic_cmd(). It is convenient to remove ufshcd_hold/
release from ufshcd_send_uic_cmd() as there are not many places
sending DME cmds without holding the clocks, ufs_bsg.c is one.
And I have tested my idea on my setup, it worked well for me.
Another benefit is that it also allows us to use DME cmds
in clk gating/ungating contexts if we need to in the future.



Brilliant idea! But this may not solve problems if vendor callbacks 
need

more than UIC commands in the future.

This simple patch could make all vendor operations on UFSHCI in PM
callbacks possible with UFSHCD_CAP_HIBERN8_WITH_CLK_GATING enabled, and
again, it allows those operations in PM scenarios only.



Other than UIC cmds, I can only think of device manangement cmds (like 
query).
If device management cmds come into the way in the future, we fix it as 
well.
I mean that is the right thing to do in my opinion - just like we don't 
call

pm_runtime_get_sync() in ufshcd_send_uic_cmd().

I can understand that you want a simple/quick fix to get it work for you 
once
for all, but from my point of view, debugging clk gating/ungating really 
takes
huge efforts sometime (I've spent a lot of time on it). Some flash 
vendors also
use it in their own driver widely which makes some failure scenes even 
harder to
undertand/debug. So the first thing comes to my head is that we should 
avoid

making it more complex or giving it more exceptions.

From functionality point of view, it looks ok to me. It is just that I 
cannot
predict it won't cause new problems since the clk gating/ungating 
sequeces are

like magic in some use cases sometime.

Thanks,

Can Guo.


Please let me know your idea, thanks.

Can Guo.


Thanks,
Stanley Chu



> Signed-off-by: Stanley Chu 
> Signed-off-by: Andy Teng 
>
> ---
>
> Changes since v1:
> - Fix return value: Use unique bool variable to get the result of
> flush_work(). Thcan prevent incorrect returned value, i.e., rc, if
> flush_work() returns true
> - Fix commit message
>
> ---
>  drivers/scsi/ufs/ufshcd.c | 5 -
>  1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
> index 577cc0d7487f..acba2271c5d3 100644
> --- a/drivers/scsi/ufs/ufshcd.c
> +++ b/drivers/scsi/ufs/ufshcd.c
> @@ -1561,6 +1561,7 @@ static void ufshcd_ungate_work(struct work_struct
> *work)
>  int ufshcd_hold(struct ufs_hba *hba, bool async)
>  {
>int rc = 0;
> +  bool flush_result;
>unsigned long flags;
>
>if (!ufshcd_is_clkgating_allowed(hba))
> @@ -1592,7 +1593,9 @@ int ufshcd_hold(struct ufs_hba *hba, bool async)
>break;
>}
>spin_unlock_irqrestore(hba->host->host_lock, flags);
> -  flush_work(&hba->clk_gating.ungate_work);
> +  flush_result = flush_work(&hba->clk_gating.ungate_work);
> +  if (hba->clk_gating.is_suspended && !flush_result)
> +   

[tip: sched/fifo] sched,tracing: Convert to sched_set_fifo()

2020-07-29 Thread tip-bot2 for Peter Zijlstra
The following commit has been merged into the sched/fifo branch of tip:

Commit-ID: 4fd5750af02ab7bba7c58a073060cc1da8a69173
Gitweb:
https://git.kernel.org/tip/4fd5750af02ab7bba7c58a073060cc1da8a69173
Author:Peter Zijlstra 
AuthorDate:Mon, 20 Jul 2020 23:49:18 +02:00
Committer: Peter Zijlstra 
CommitterDate: Wed, 29 Jul 2020 11:43:53 +02:00

sched,tracing: Convert to sched_set_fifo()

One module user of sched_setscheduler() was overlooked and is
obviously causing build failures.

Convert ring_buffer_benchmark to use sched_set_fifo_low() when fifo==1
and sched_set_fifo() when fifo==2. This is a bit of an abuse, but it
makes the thing 'work' again.

Specifically, it enables all combinations that were previously
possible:

  producer higher than consumer
  consumer higher than producer

Fixes: 616d91b68cd5 ("sched: Remove sched_setscheduler*() EXPORTs")
Reported-by: kernel test robot 
Reported-by: Stephen Rothwell 
Signed-off-by: Peter Zijlstra (Intel) 
Reviewed-by: Steven Rostedt (VMware) 
Link: 
https://lkml.kernel.org/r/20200720214918.gm5...@worktop.programming.kicks-ass.net
---
 kernel/trace/ring_buffer_benchmark.c | 48 ---
 1 file changed, 23 insertions(+), 25 deletions(-)

diff --git a/kernel/trace/ring_buffer_benchmark.c 
b/kernel/trace/ring_buffer_benchmark.c
index 8df0aa8..78e5765 100644
--- a/kernel/trace/ring_buffer_benchmark.c
+++ b/kernel/trace/ring_buffer_benchmark.c
@@ -45,8 +45,8 @@ MODULE_PARM_DESC(write_iteration, "# of writes between 
timestamp readings");
 static int producer_nice = MAX_NICE;
 static int consumer_nice = MAX_NICE;
 
-static int producer_fifo = -1;
-static int consumer_fifo = -1;
+static int producer_fifo;
+static int consumer_fifo;
 
 module_param(producer_nice, int, 0644);
 MODULE_PARM_DESC(producer_nice, "nice prio for producer");
@@ -55,10 +55,10 @@ module_param(consumer_nice, int, 0644);
 MODULE_PARM_DESC(consumer_nice, "nice prio for consumer");
 
 module_param(producer_fifo, int, 0644);
-MODULE_PARM_DESC(producer_fifo, "fifo prio for producer");
+MODULE_PARM_DESC(producer_fifo, "use fifo for producer: 0 - disabled, 1 - low 
prio, 2 - fifo");
 
 module_param(consumer_fifo, int, 0644);
-MODULE_PARM_DESC(consumer_fifo, "fifo prio for consumer");
+MODULE_PARM_DESC(consumer_fifo, "use fifo for consumer: 0 - disabled, 1 - low 
prio, 2 - fifo");
 
 static int read_events;
 
@@ -303,22 +303,22 @@ static void ring_buffer_producer(void)
trace_printk("ERROR!\n");
 
if (!disable_reader) {
-   if (consumer_fifo < 0)
+   if (consumer_fifo)
+   trace_printk("Running Consumer at SCHED_FIFO %s\n",
+consumer_fifo == 1 ? "low" : "high");
+   else
trace_printk("Running Consumer at nice: %d\n",
 consumer_nice);
-   else
-   trace_printk("Running Consumer at SCHED_FIFO %d\n",
-consumer_fifo);
}
-   if (producer_fifo < 0)
+   if (producer_fifo)
+   trace_printk("Running Producer at SCHED_FIFO %s\n",
+producer_fifo == 1 ? "low" : "high");
+   else
trace_printk("Running Producer at nice: %d\n",
 producer_nice);
-   else
-   trace_printk("Running Producer at SCHED_FIFO %d\n",
-producer_fifo);
 
/* Let the user know that the test is running at low priority */
-   if (producer_fifo < 0 && consumer_fifo < 0 &&
+   if (!producer_fifo && !consumer_fifo &&
producer_nice == MAX_NICE && consumer_nice == MAX_NICE)
trace_printk("WARNING!!! This test is running at lowest 
priority.\n");
 
@@ -455,21 +455,19 @@ static int __init ring_buffer_benchmark_init(void)
 * Run them as low-prio background tasks by default:
 */
if (!disable_reader) {
-   if (consumer_fifo >= 0) {
-   struct sched_param param = {
-   .sched_priority = consumer_fifo
-   };
-   sched_setscheduler(consumer, SCHED_FIFO, ¶m);
-   } else
+   if (consumer_fifo >= 2)
+   sched_set_fifo(consumer);
+   else if (consumer_fifo == 1)
+   sched_set_fifo_low(consumer);
+   else
set_user_nice(consumer, consumer_nice);
}
 
-   if (producer_fifo >= 0) {
-   struct sched_param param = {
-   .sched_priority = producer_fifo
-   };
-   sched_setscheduler(producer, SCHED_FIFO, ¶m);
-   } else
+   if (producer_fifo >= 2)
+   sched_set_fifo(producer);
+   else if (producer_fifo == 1)
+   sched_set_fifo_low(producer);
+   else

[PATCH] drivers: power: axp20x-battery: support setting charge_full_design

2020-07-29 Thread Jack Mitchell
Signed-off-by: Jack Mitchell 
---
 drivers/power/supply/axp20x_battery.c | 39 +++
 1 file changed, 39 insertions(+)

diff --git a/drivers/power/supply/axp20x_battery.c 
b/drivers/power/supply/axp20x_battery.c
index fe96f77bffa7..8ce4ebe7ccd5 100644
--- a/drivers/power/supply/axp20x_battery.c
+++ b/drivers/power/supply/axp20x_battery.c
@@ -60,6 +60,7 @@
 
 #define AXP20X_V_OFF_MASK  GENMASK(2, 0)
 
+#define AXP20X_BAT_MAX_CAP_VALID   BIT(7)
 
 struct axp20x_batt_ps;
 
@@ -86,6 +87,7 @@ struct axp20x_batt_ps {
struct axp20x_thermal_sensor sensor;
/* Maximum constant charge current */
unsigned int max_ccc;
+   unsigned int charge_full_design;
const struct axp_data   *data;
 };
 
@@ -260,6 +262,10 @@ static int axp20x_battery_get_prop(struct power_supply 
*psy,
val->intval = POWER_SUPPLY_HEALTH_GOOD;
break;
 
+   case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
+   val->intval = axp20x_batt->charge_full_design;
+   break;
+
case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
ret = axp20x_get_constant_charge_current(axp20x_batt,
 &val->intval);
@@ -401,6 +407,30 @@ static int axp20x_battery_set_max_voltage(struct 
axp20x_batt_ps *axp20x_batt,
  AXP20X_CHRG_CTRL1_TGT_VOLT, val);
 }
 
+static int axp20x_set_charge_full_design(struct axp20x_batt_ps *axp_batt,
+ int charge_full_uah)
+{
+   /* (Unit: 1.456mAh) */
+   int max_capacity_units = charge_full_uah / 1456;
+   int ret;
+
+   u8 max_capacity_msb = (max_capacity_units & 0x7F00) >> 8;
+   u8 max_capacity_lsb = (max_capacity_units & 0xFF);
+
+   axp_batt->charge_full_design = max_capacity_units * 1456;
+
+   max_capacity_msb |= AXP20X_BAT_MAX_CAP_VALID;
+
+   ret = regmap_write(axp_batt->regmap, AXP288_FG_DES_CAP0_REG,
+  max_capacity_lsb);
+
+   if (ret)
+   return ret;
+
+   return regmap_write(axp_batt->regmap, AXP288_FG_DES_CAP1_REG,
+   max_capacity_msb);
+}
+
 static int axp20x_set_constant_charge_current(struct axp20x_batt_ps *axp_batt,
  int charge_current)
 {
@@ -492,6 +522,7 @@ static enum power_supply_property axp20x_battery_props[] = {
POWER_SUPPLY_PROP_STATUS,
POWER_SUPPLY_PROP_VOLTAGE_NOW,
POWER_SUPPLY_PROP_CURRENT_NOW,
+   POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT,
POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX,
POWER_SUPPLY_PROP_HEALTH,
@@ -675,6 +706,7 @@ static int axp20x_power_probe(struct platform_device *pdev)
if (!power_supply_get_battery_info(axp20x_batt->batt, &info)) {
int vmin = info.voltage_min_design_uv;
int ccc = info.constant_charge_current_max_ua;
+   int cfd = info.charge_full_design_uah;
 
if (vmin > 0 && axp20x_set_voltage_min_design(axp20x_batt,
  vmin))
@@ -692,6 +724,13 @@ static int axp20x_power_probe(struct platform_device *pdev)
axp20x_batt->max_ccc = ccc;
axp20x_set_constant_charge_current(axp20x_batt, ccc);
}
+
+   if (cfd > 0 && axp20x_set_charge_full_design(axp20x_batt,
+  cfd)) {
+   dev_err(&pdev->dev,
+   "couldn't set charge_full_design\n");
+   axp20x_batt->charge_full_design = 0;
+   }
}
 
error = axp20x_thermal_register_sensor(pdev, axp20x_batt);
-- 
2.28.0



Re: [PATCH v3] Staging: media: atomisp: fixed a brace coding sytle issue

2020-07-29 Thread Andy Shevchenko
On Wed, Jul 29, 2020 at 01:19:50PM +0530, Ankit Baluni wrote:
> Removed braces for a 'if' condition as it contain only single line & 
> there is no need for braces for such case according to coding style
> rules.

Reviewed-by: Andy Shevchenko 

> Signed-off-by: Ankit Baluni 
> 
> ---
> Changes in v2:
>   -Added more description about the patch.
>   -Added space before the symobol '<' in 'From'
>and 'Signed-off-by' line.
> Changes in v3:
>   -Removed space before ':' in subject line.
> 
>  drivers/staging/media/atomisp/pci/atomisp_cmd.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/staging/media/atomisp/pci/atomisp_cmd.c 
> b/drivers/staging/media/atomisp/pci/atomisp_cmd.c
> index 8ea65bef35d2..28b96b66f4f3 100644
> --- a/drivers/staging/media/atomisp/pci/atomisp_cmd.c
> +++ b/drivers/staging/media/atomisp/pci/atomisp_cmd.c
> @@ -4981,9 +4981,8 @@ enum mipi_port_id __get_mipi_port(struct atomisp_device 
> *isp,
>   case ATOMISP_CAMERA_PORT_SECONDARY:
>   return MIPI_PORT1_ID;
>   case ATOMISP_CAMERA_PORT_TERTIARY:
> - if (MIPI_PORT1_ID + 1 != N_MIPI_PORT_ID) {
> + if (MIPI_PORT1_ID + 1 != N_MIPI_PORT_ID)
>   return MIPI_PORT1_ID + 1;
> - }
>   /* fall through */
>   default:
>   dev_err(isp->dev, "unsupported port: %d\n", port);
> -- 
> 2.25.1
> 

-- 
With Best Regards,
Andy Shevchenko




Re: [PATCH v2 4/5] clk: mediatek: Add configurable enable control to mtk_pll_data

2020-07-29 Thread Nicolas Boichat
On Wed, Jul 29, 2020 at 4:44 PM Weiyi Lu  wrote:
>
> In all MediaTek PLL design, bit0 of CON0 register is always
> the enable bit.
> However, there's a special case of usbpll on MT8192.
> The enable bit of usbpll is moved to bit2 of other register.
> Add configurable en_reg and pll_en_bit for enable control or
> default 0 where pll data are static variables.
> Hence, CON0_BASE_EN could also be removed.
> And there might have another special case on other chips,
> the enable bit is still on CON0 register but not at bit0.
>
> Signed-off-by: Weiyi Lu 
> ---
>  drivers/clk/mediatek/clk-mtk.h |  2 ++
>  drivers/clk/mediatek/clk-pll.c | 18 +++---
>  2 files changed, 13 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
> index c3d6756..810eb97 100644
> --- a/drivers/clk/mediatek/clk-mtk.h
> +++ b/drivers/clk/mediatek/clk-mtk.h
> @@ -233,6 +233,8 @@ struct mtk_pll_data {
> uint32_t pcw_chg_reg;
> const struct mtk_pll_div_table *div_table;
> const char *parent_name;
> +   uint32_t en_reg;
> +   uint8_t pll_en_bit;
>  };
>
>  void mtk_clk_register_plls(struct device_node *node,
> diff --git a/drivers/clk/mediatek/clk-pll.c b/drivers/clk/mediatek/clk-pll.c
> index 3c79e1a..1434e99 100644
> --- a/drivers/clk/mediatek/clk-pll.c
> +++ b/drivers/clk/mediatek/clk-pll.c
> @@ -16,7 +16,6 @@
>  #define REG_CON0   0
>  #define REG_CON1   4
>
> -#define CON0_BASE_EN   BIT(0)
>  #define CON0_PWR_ONBIT(0)
>  #define CON0_ISO_ENBIT(1)
>  #define PCW_CHG_MASK   BIT(31)
> @@ -44,6 +43,7 @@ struct mtk_clk_pll {
> void __iomem*tuner_en_addr;
> void __iomem*pcw_addr;
> void __iomem*pcw_chg_addr;
> +   void __iomem*en_addr;
> const struct mtk_pll_data *data;
>  };
>
> @@ -56,7 +56,7 @@ static int mtk_pll_is_prepared(struct clk_hw *hw)
>  {
> struct mtk_clk_pll *pll = to_mtk_clk_pll(hw);
>
> -   return (readl(pll->base_addr + REG_CON0) & CON0_BASE_EN) != 0;
> +   return (readl(pll->en_addr) & BIT(pll->data->pll_en_bit)) != 0;
>  }
>
>  static unsigned long __mtk_pll_recalc_rate(struct mtk_clk_pll *pll, u32 fin,
> @@ -247,8 +247,8 @@ static int mtk_pll_prepare(struct clk_hw *hw)
> writel(r, pll->pwr_addr);
> udelay(1);
>
> -   r = readl(pll->base_addr + REG_CON0) | CON0_BASE_EN;
> -   writel(r, pll->base_addr + REG_CON0);
> +   r = readl(pll->en_addr) | BIT(pll->data->pll_en_bit);
> +   writel(r, pll->en_addr);
>
> r = readl(pll->base_addr + REG_CON0) | pll->data->en_mask;
> writel(r, pll->base_addr + REG_CON0);
> @@ -283,9 +283,9 @@ static void mtk_pll_unprepare(struct clk_hw *hw)
> r &= ~pll->data->en_mask;
> writel(r, pll->base_addr + REG_CON0);
>
> -   r = readl(pll->base_addr + REG_CON0);
> -   r &= ~CON0_BASE_EN;
> -   writel(r, pll->base_addr + REG_CON0);
> +   r = readl(pll->en_addr);
> +   r &= ~BIT(pll->data->pll_en_bit);

1 line, but that'll come naturally from the change I requested in the
previous patch.

> +   writel(r, pll->en_addr);
>
> r = readl(pll->pwr_addr) | CON0_ISO_EN;
> writel(r, pll->pwr_addr);
> @@ -327,6 +327,10 @@ static struct clk *mtk_clk_register_pll(const struct 
> mtk_pll_data *data,
> pll->tuner_addr = base + data->tuner_reg;
> if (data->tuner_en_reg)
> pll->tuner_en_addr = base + data->tuner_en_reg;
> +   if (data->en_reg)
> +   pll->en_addr = base + data->en_reg;
> +   else
> +   pll->en_addr = pll->base_addr + REG_CON0;

Don't you need to set pll->data->pll_en_bit to CON0_BASE_EN here?
(which probably means that you need to add a pll->en_bit field to
struct mtk_clk_pll)

> pll->hw.init = &init;
> pll->data = data;
>
> --
> 1.8.1.1.dirty


[PATCH 1/6] dt-bindings: soc: ti: Add TI PRUSS bindings

2020-07-29 Thread Grzegorz Jaszczyk
This patch adds the bindings for the Programmable Real-Time Unit
and Industrial Communication Subsystem (PRU-ICSS) present on various
TI SoCs. The IP is present on multiple TI SoC architecture families
including the OMAP architecture SoCs such as AM33xx, AM437x and
AM57xx; and on a Keystone 2 architecture based 66AK2G SoC. It is
also present on the Davinci based OMAPL138 SoCs and K3 architecture
based AM65x and J721E SoCs as well.

The IP has a number of sub-modules some of which are represented as
their own devices. This binding covers only the top-level sub-system
devices, and some sub-modules like MDIO, MII_RT (Ethernet MII_RT module
with MII ports) and IEP (Industrial Ethernet Peripheral). The remaining
sub-modules bindings shall be defined in the respective driver
subsystem bindings folders. Couple of full examples have also been
added demonstrating the devices on AM335x and AM437x SoCs.

Signed-off-by: Suman Anna 
Signed-off-by: Roger Quadros 
Signed-off-by: Grzegorz Jaszczyk 
Reviewed-by: Lee Jones 
---
 .../devicetree/bindings/soc/ti/ti,pruss.yaml   | 383 +
 1 file changed, 383 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml

diff --git a/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml 
b/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml
new file mode 100644
index 000..4b7a098
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml
@@ -0,0 +1,383 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/ti/ti,pruss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: |+
+  TI Programmable Real-Time Unit and Industrial Communication Subsystem
+
+maintainers:
+  - Suman Anna 
+
+description: |+
+
+  The Programmable Real-Time Unit and Industrial Communication Subsystem
+  (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
+  Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
+  cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
+  instruction RAMs, some internal peripheral modules to facilitate industrial
+  communication, and an interrupt controller.
+
+  The programmable nature of the PRUs provide flexibility to implement custom
+  peripheral interfaces, fast real-time responses, or specialized data 
handling.
+  The common peripheral modules include the following,
+- an Ethernet MII_RT module with two MII ports
+- an MDIO port to control external Ethernet PHYs
+- an Industrial Ethernet Peripheral (IEP) to manage/generate Industrial
+  Ethernet functions
+- an Enhanced Capture Module (eCAP)
+- an Industrial Ethernet Timer with 7/9 capture and 16 compare events
+- a 16550-compatible UART to support PROFIBUS
+- Enhanced GPIO with async capture and serial support
+
+  A PRU-ICSS subsystem can have up to three shared data memories. A PRU core
+  acts on a primary Data RAM (there are usually 2 Data RAMs) at its address
+  0x0, but also has access to a secondary Data RAM (primary to the other PRU
+  core) at its address 0x2000. A shared Data RAM, if present, can be accessed
+  by both the PRU cores. The Interrupt Controller (INTC) and a CFG module are
+  common to both the PRU cores. Each PRU core also has a private instruction
+  RAM, and specific register spaces for Control and Debug functionalities.
+
+  Various sub-modules within a PRU-ICSS subsystem are represented as individual
+  nodes and are defined using a parent-child hierarchy depending on their
+  integration within the IP and the SoC. These nodes are described in the
+  following sections.
+
+
+  PRU-ICSS Node
+  ==
+  Each PRU-ICSS instance is represented as its own node with the individual PRU
+  processor cores, the memories node, an INTC node and an MDIO node represented
+  as child nodes within this PRUSS node. This node shall be a child of the
+  corresponding interconnect bus nodes or target-module nodes.
+
+  See ../../mfd/syscon.yaml for generic SysCon binding details.
+
+
+properties:
+  compatible:
+enum:
+  - ti,am3356-pruss  # for AM335x SoC family
+  - ti,am4376-pruss0 # for AM437x SoC family and PRUSS unit 0
+  - ti,am4376-pruss1 # for AM437x SoC family and PRUSS unit 1
+  - ti,am5728-pruss  # for AM57xx SoC family
+  - ti,k2g-pruss # for 66AK2G SoC family
+  - ti,am654-icssg   # for K3 AM65x SoC family
+  - ti,j721e-icssg   # for K3 J721E SoC family
+
+  reg:
+maxItems: 1
+
+  ranges:
+maxItems: 1
+description: |
+  Standard ranges definition using addresses from 0 for child nodes.
+
+  power-domains:
+description: |
+  This property is as per sci-pm-domain.txt.
+
+  memories:
+description: |
+  The various Data RAMs within a single PRU-ICSS unit are represented as a
+  single node with the name 'memories'.
+
+type: object
+
+properties:
+  reg:
+mi

[PATCH 3/6] soc: ti: pruss: Add support for PRU-ICSSs on AM437x SoCs

2020-07-29 Thread Grzegorz Jaszczyk
From: Suman Anna 

The AM437x SoCs have two different PRU-ICSS subsystems: PRU-ICSS1
and a smaller PRU-ICSS0. Enhance the PRUSS platform driver to support
both the PRU-ICSS sub-systems on these SoCs.

The PRU-ICSS1 on AM437x is very similar to the PRU-ICSS on AM33xx
except for few minor differences - increased Instruction RAM, increased
Shared Data RAM2, and 1 less interrupt (PRUSS host interrupt 7 which is
redirected to the other PRUSS) towards the MPU INTC. The PRU-ICSS0 is
a cut-down version of the IP, with less DRAM per PRU, no Shared DRAM etc.
It also does not have direct access to L3 bus regions, there is a single
interface to L3 for both PRUSS0 and PRUSS1, and it would have to go
through the PRUSS1's interface. The PRUSS_SYSCFG register is reserved on
PRUSS0, so any external access requires the programming the corresponding
PRUSS_SYSCFG register in PRUSS1. It does have its own dedicated I/O lines
though. Note that this instance does not support any PRU Ethernet related
use cases.

The adaptation uses SoC-specific compatibles in the driver and uses
a newly introduced pruss_match_private_data structure and the
pruss_get_private_data() function to retrieve a PRUSS instance specific
data using a device-name based lookup logic. The reset and the L3 external
access are managed by the parent interconnect ti-sysc bus driver so that
PRUSS1 and PRUSS0 can be independently supported.

Signed-off-by: Suman Anna 
Signed-off-by: Andrew F. Davis 
Signed-off-by: Grzegorz Jaszczyk 
---
 drivers/soc/ti/Kconfig |  2 +-
 drivers/soc/ti/pruss.c | 35 ++-
 2 files changed, 35 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/ti/Kconfig b/drivers/soc/ti/Kconfig
index b934bc3..40d6a22 100644
--- a/drivers/soc/ti/Kconfig
+++ b/drivers/soc/ti/Kconfig
@@ -103,7 +103,7 @@ config TI_K3_SOCINFO
 
 config TI_PRUSS
tristate "TI PRU-ICSS Subsystem Platform drivers"
-   depends on SOC_AM33XX
+   depends on SOC_AM33XX || SOC_AM43XX
select MFD_SYSCON
help
  TI PRU-ICSS Subsystem platform specific support.
diff --git a/drivers/soc/ti/pruss.c b/drivers/soc/ti/pruss.c
index c071bb2..04938ba 100644
--- a/drivers/soc/ti/pruss.c
+++ b/drivers/soc/ti/pruss.c
@@ -17,6 +17,14 @@
 #include 
 #include 
 
+/**
+ * struct pruss_private_data - PRUSS driver private data
+ * @has_no_sharedram: flag to indicate the absence of PRUSS Shared Data RAM
+ */
+struct pruss_private_data {
+   bool has_no_sharedram;
+};
+
 static int pruss_probe(struct platform_device *pdev)
 {
struct device *dev = &pdev->dev;
@@ -25,8 +33,15 @@ static int pruss_probe(struct platform_device *pdev)
struct pruss *pruss;
struct resource res;
int ret, i, index;
+   const struct pruss_private_data *data;
const char *mem_names[PRUSS_MEM_MAX] = { "dram0", "dram1", "shrdram2" };
 
+   data = of_device_get_match_data(&pdev->dev);
+   if (IS_ERR(data)) {
+   dev_err(dev, "missing private data\n");
+   return -ENODEV;
+   }
+
ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
if (ret) {
dev_err(dev, "failed to set the DMA coherent mask");
@@ -45,7 +60,14 @@ static int pruss_probe(struct platform_device *pdev)
return -ENODEV;
}
 
-   for (i = 0; i < ARRAY_SIZE(mem_names); i++) {
+   for (i = 0; i < PRUSS_MEM_MAX; i++) {
+   /*
+* On AM437x one of two PRUSS units don't contain Shared RAM,
+* skip it
+*/
+   if (data && data->has_no_sharedram && i == PRUSS_MEM_SHRD_RAM2)
+   continue;
+
index = of_property_match_string(child, "reg-names",
 mem_names[i]);
if (index < 0) {
@@ -126,8 +148,19 @@ static int pruss_remove(struct platform_device *pdev)
return 0;
 }
 
+/* instance-specific driver private data */
+static const struct pruss_private_data am437x_pruss1_data = {
+   .has_no_sharedram = false,
+};
+
+static const struct pruss_private_data am437x_pruss0_data = {
+   .has_no_sharedram = true,
+};
+
 static const struct of_device_id pruss_of_match[] = {
{ .compatible = "ti,am3356-pruss" },
+   { .compatible = "ti,am4376-pruss0", .data = &am437x_pruss0_data, },
+   { .compatible = "ti,am4376-pruss1", .data = &am437x_pruss1_data, },
{},
 };
 MODULE_DEVICE_TABLE(of, pruss_of_match);
-- 
2.7.4



[PATCH 0/6] Add TI PRUSS platform driver

2020-07-29 Thread Grzegorz Jaszczyk
Hi,

The Programmable Real-Time Unit and Industrial Communication Subsystem
(PRU-ICSS) is present on various TI SoCs. The IP is present on multiple TI SoC
architecture families including the OMAP architecture SoCs such as AM33xx,
AM437x and AM57xx; and on a Keystone 2 architecture based 66AK2G SoC. It is also
present on the Davinci based OMAPL138 SoCs and K3 architecture based AM65x and
J721E SoCs as well.

A PRUSS consists of dual 32-bit RISC cores (Programmable Real-Time Units, or
PRUs), shared RAM, data and instruction RAMs, some internal peripheral modules
to facilitate industrial communication, and an interrupt controller.

The programmable nature of the PRUs provide flexibility to implement custom
peripheral interfaces, fast real-time responses, or specialized data handling.
The common peripheral modules include the following,
  - an Ethernet MII_RT module with two MII ports
  - an MDIO port to control external Ethernet PHYs
  - an Industrial Ethernet Peripheral (IEP) to manage/generate Industrial
Ethernet functions
  - an Enhanced Capture Module (eCAP)
  - an Industrial Ethernet Timer with 7/9 capture and 16 compare events
  - a 16550-compatible UART to support PROFIBUS
  - Enhanced GPIO with async capture and serial support


A typical usage scenario would be to load the application firmware into one or
more of the PRU cores, initialize one or more of the peripherals and perform I/O
through shared RAM from either a kernel driver or directly from userspace.

This series contains the PRUSS platform driver. This is the parent driver for
the entire PRUSS and is used for managing the subsystem level resources like
various memories and the CFG module.  It is responsible for the creation and
deletion of the platform devices for the child PRU devices and other child
devices (like Interrupt Controller, MDIO node and some syscon nodes) so that
they can be managed by specific platform drivers.

Grzegorz Jaszczyk (1):
  dt-bindings: soc: ti: Add TI PRUSS bindings

Suman Anna (5):
  soc: ti: pruss: Add a platform driver for PRUSS in TI SoCs
  soc: ti: pruss: Add support for PRU-ICSSs on AM437x SoCs
  soc: ti: pruss: Add support for PRU-ICSS subsystems on AM57xx SoCs
  soc: ti: pruss: Add support for PRU-ICSS subsystems on 66AK2G SoC
  soc: ti: pruss: enable support for ICSSG subsystems on K3 AM65x SoCs

 .../devicetree/bindings/soc/ti/ti,pruss.yaml   | 383 +
 drivers/soc/ti/Kconfig |  11 +
 drivers/soc/ti/Makefile|   1 +
 drivers/soc/ti/pruss.c | 183 ++
 include/linux/pruss_driver.h   |  48 +++
 5 files changed, 626 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml
 create mode 100644 drivers/soc/ti/pruss.c
 create mode 100644 include/linux/pruss_driver.h

-- 
2.7.4



Re: [PATCH v2 3/5] clk: mediatek: Fix asymmetrical PLL enable and disable control

2020-07-29 Thread Nicolas Boichat
On Wed, Jul 29, 2020 at 6:51 PM Nicolas Boichat  wrote:
>
> On Wed, Jul 29, 2020 at 4:44 PM Weiyi Lu  wrote:
> >
> > The en_mask actually is a combination of divider enable mask
> > and pll enable bit(bit0).
> > Before this patch, we enabled both divider mask and bit0 in prepare(),
> > but only cleared the bit0 in unprepare().
> > Now, setting the enable register(CON0) in 2 steps: first divider mask,
> > then bit0 during prepare(), vice versa.
> > Hence, en_mask will only be used as divider enable mask.
> > Meanwhile, all the SoC PLL data are updated.
>
> I like this a lot better, most changes look fine, just a few nits.
>
> >
> > Signed-off-by: Weiyi Lu 
> > ---
> >  drivers/clk/mediatek/clk-mt2701.c | 26 
> >  drivers/clk/mediatek/clk-mt2712.c | 30 ++--
> >  drivers/clk/mediatek/clk-mt6765.c | 20 +--
> >  drivers/clk/mediatek/clk-mt6779.c | 24 +++---
> >  drivers/clk/mediatek/clk-mt6797.c | 20 +--
> >  drivers/clk/mediatek/clk-mt7622.c | 18 -
> >  drivers/clk/mediatek/clk-mt7629.c | 12 +--
> >  drivers/clk/mediatek/clk-mt8173.c | 42 
> > ++-
> >  drivers/clk/mediatek/clk-mt8183.c | 22 ++--
> >  drivers/clk/mediatek/clk-pll.c| 10 --
> >  10 files changed, 122 insertions(+), 102 deletions(-)
> >
[snip]
> > diff --git a/drivers/clk/mediatek/clk-pll.c b/drivers/clk/mediatek/clk-pll.c
> > index f440f2cd..3c79e1a 100644
> > --- a/drivers/clk/mediatek/clk-pll.c
> > +++ b/drivers/clk/mediatek/clk-pll.c
> > @@ -247,8 +247,10 @@ static int mtk_pll_prepare(struct clk_hw *hw)
> > writel(r, pll->pwr_addr);
> > udelay(1);
> >
> > -   r = readl(pll->base_addr + REG_CON0);
> > -   r |= pll->data->en_mask;
> > +   r = readl(pll->base_addr + REG_CON0) | CON0_BASE_EN;
> > +   writel(r, pll->base_addr + REG_CON0);
> > +
> > +   r = readl(pll->base_addr + REG_CON0) | pll->data->en_mask;

One more question. I have the feeling that CON0_BASE_EN is what
enables the clock for good (and pll->data->en_mask is just an
additional setting/mask, since you could disable the clock by simply
clearing CON0_BASE_EN). Shouldn't you set pll->data->en_mask _first_,
then CON0_BASE_EN?

> > writel(r, pll->base_addr + REG_CON0);
>
> As a small optimization, you can do:
>
> if (pll->data->en_mask) {
>r = readl(pll->base_addr + REG_CON0) | pll->data->en_mask;
>writel(r, pll->base_addr + REG_CON0);
> }
>
> >
> > __mtk_pll_tuner_enable(pll);
> > @@ -278,6 +280,10 @@ static void mtk_pll_unprepare(struct clk_hw *hw)
> > __mtk_pll_tuner_disable(pll);
> >
> > r = readl(pll->base_addr + REG_CON0);
> > +   r &= ~pll->data->en_mask;
>
> Move this to one line? (so that the code looks symmetrical, too?)
>
> > +   writel(r, pll->base_addr + REG_CON0);
> > +
> > +   r = readl(pll->base_addr + REG_CON0);
> > r &= ~CON0_BASE_EN;

And ditto, ~CON0_BASE_EN then ~pll->data->en_mask?

>
> ditto?
>
> > writel(r, pll->base_addr + REG_CON0);
> >
> > --
> > 1.8.1.1.dirty


[PATCH 5/6] soc: ti: pruss: Add support for PRU-ICSS subsystems on 66AK2G SoC

2020-07-29 Thread Grzegorz Jaszczyk
From: Suman Anna 

The 66AK2G SoC supports two PRU-ICSS instances, named PRUSS0 and PRUSS1,
each of which has two PRU processor cores. The two PRU-ICSS instances
are identical to each other with few minor SoC integration differences,
and are very similar to the PRU-ICSS1 of AM57xx/AM43xx. The Shared Data
RAM size is larger and the number of interrupts coming into MPU INTC
is like the instances on AM437x. There are also few other differences
attributing to integration in Keystone architecture (like no SYSCFG
register or PRCM handshake protocols). Other IP level differences
include different constant table, differences in system event interrupt
input sources etc. They also do not have a programmable module reset
line like those present on AM33xx/AM43xx SoCs. The modules are reset
just like any other IP with the SoC's global cold/warm resets.

The existing PRUSS platform driver has been enhanced to support these
66AK2G PRU-ICSS instances through new 66AK2G specific compatible for
properly probing and booting all the different PRU cores in each
PRU-ICSS processor subsystem. A build dependency with ARCH_KEYSTONE
is added to enable the driver to be built in K2G-only configuration.

Signed-off-by: Andrew F. Davis 
Signed-off-by: Suman Anna 
Signed-off-by: Grzegorz Jaszczyk 
---
 drivers/soc/ti/Kconfig | 2 +-
 drivers/soc/ti/pruss.c | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/ti/Kconfig b/drivers/soc/ti/Kconfig
index 99dbc14..c290343 100644
--- a/drivers/soc/ti/Kconfig
+++ b/drivers/soc/ti/Kconfig
@@ -103,7 +103,7 @@ config TI_K3_SOCINFO
 
 config TI_PRUSS
tristate "TI PRU-ICSS Subsystem Platform drivers"
-   depends on SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX
+   depends on SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE
select MFD_SYSCON
help
  TI PRU-ICSS Subsystem platform specific support.
diff --git a/drivers/soc/ti/pruss.c b/drivers/soc/ti/pruss.c
index 5df4caa..d5f128e 100644
--- a/drivers/soc/ti/pruss.c
+++ b/drivers/soc/ti/pruss.c
@@ -162,6 +162,7 @@ static const struct of_device_id pruss_of_match[] = {
{ .compatible = "ti,am4376-pruss0", .data = &am437x_pruss0_data, },
{ .compatible = "ti,am4376-pruss1", .data = &am437x_pruss1_data, },
{ .compatible = "ti,am5728-pruss" },
+   { .compatible = "ti,k2g-pruss" },
{},
 };
 MODULE_DEVICE_TABLE(of, pruss_of_match);
-- 
2.7.4



[PATCH 4/6] soc: ti: pruss: Add support for PRU-ICSS subsystems on AM57xx SoCs

2020-07-29 Thread Grzegorz Jaszczyk
From: Suman Anna 

The AM57xx family of SoCs supports two PRU-ICSS instances, each of
which has two PRU processor cores. The two PRU-ICSS instances are
identical to each other, and are very similar to the PRU-ICSS1 of
AM33xx/AM43xx except for a few minor differences like the RAM sizes
and the number of interrupts coming into the MPU INTC. They do
not have a programmable module reset line unlike those present on
AM33xx/AM43xx SoCs. The modules are reset just like any other IP
with the SoC's global cold/warm resets. Each PRU-ICSS's INTC is also
preceded by a Crossbar that enables multiple external events to be
routed to a specific number of input interrupt events. Any interrupt
event directed towards PRUSS needs this crossbar to be setup properly
on the firmware side.

The existing PRUSS platform driver has been enhanced to support
these AM57xx PRU-ICSS instances through new AM57xx specific
compatible for properly probing and booting all the different PRU
cores in each PRU-ICSS processor subsystem. A build dependency with
SOC_DRA7XX is also added to enable the driver to be built in
AM57xx-only configuration (there is no separate Kconfig option
for AM57xx vs DRA7xx).

Signed-off-by: Suman Anna 
Signed-off-by: Grzegorz Jaszczyk 
---
 drivers/soc/ti/Kconfig | 2 +-
 drivers/soc/ti/pruss.c | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/ti/Kconfig b/drivers/soc/ti/Kconfig
index 40d6a22..99dbc14 100644
--- a/drivers/soc/ti/Kconfig
+++ b/drivers/soc/ti/Kconfig
@@ -103,7 +103,7 @@ config TI_K3_SOCINFO
 
 config TI_PRUSS
tristate "TI PRU-ICSS Subsystem Platform drivers"
-   depends on SOC_AM33XX || SOC_AM43XX
+   depends on SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX
select MFD_SYSCON
help
  TI PRU-ICSS Subsystem platform specific support.
diff --git a/drivers/soc/ti/pruss.c b/drivers/soc/ti/pruss.c
index 04938ba..5df4caa 100644
--- a/drivers/soc/ti/pruss.c
+++ b/drivers/soc/ti/pruss.c
@@ -161,6 +161,7 @@ static const struct of_device_id pruss_of_match[] = {
{ .compatible = "ti,am3356-pruss" },
{ .compatible = "ti,am4376-pruss0", .data = &am437x_pruss0_data, },
{ .compatible = "ti,am4376-pruss1", .data = &am437x_pruss1_data, },
+   { .compatible = "ti,am5728-pruss" },
{},
 };
 MODULE_DEVICE_TABLE(of, pruss_of_match);
-- 
2.7.4



[PATCH 6/6] soc: ti: pruss: enable support for ICSSG subsystems on K3 AM65x SoCs

2020-07-29 Thread Grzegorz Jaszczyk
From: Suman Anna 

The K3 AM65x family of SoCs have the next generation of the PRU-ICSS
processor subsystem capable of supporting Gigabit Ethernet, and is
commonly referred to as ICSSG. These SoCs contain typically three
ICSSG instances named ICSSG0, ICSSG1 and ICSSG2. The three ICSSGs are
identical to each other for the most part with minor SoC integration
differences and capabilities. The ICSSG2 supports slightly enhanced
features like SGMII mode Ethernet, while the ICSS0 and ICSSG1 instances
are limited to MII mode only.

The ICSSGs on K3 AM65x SoCs are in general super-sets of the PRUSS on the
AM57xx/66AK2G SoCs. They include two additional auxiliary PRU cores called
RTUs and few other additional sub-modules. The interrupt integration is
also different on the K3 AM65x SoCs and are propagated through various
SoC-level Interrupt Router and Interrupt Aggregator blocks. Other IP level
differences include different constant tables, differences in system event
interrupt input sources etc. They also do not have a programmable module
reset line like those present on AM33xx/AM43xx SoCs. The modules are reset
just like any other IP with the SoC's global cold/warm resets.

The existing pruss platform driver has been updated to support these new
ICSSG instances through new AM65x specific compatibles. A build dependency
with ARCH_K3 is added to enable building all the existing PRUSS platform
drivers for this ARMv8 platform.

Signed-off-by: Suman Anna 
Signed-off-by: Grzegorz Jaszczyk 
---
 drivers/soc/ti/Kconfig | 2 +-
 drivers/soc/ti/pruss.c | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/ti/Kconfig b/drivers/soc/ti/Kconfig
index c290343..f5b82ff 100644
--- a/drivers/soc/ti/Kconfig
+++ b/drivers/soc/ti/Kconfig
@@ -103,7 +103,7 @@ config TI_K3_SOCINFO
 
 config TI_PRUSS
tristate "TI PRU-ICSS Subsystem Platform drivers"
-   depends on SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE
+   depends on SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE || 
ARCH_K3
select MFD_SYSCON
help
  TI PRU-ICSS Subsystem platform specific support.
diff --git a/drivers/soc/ti/pruss.c b/drivers/soc/ti/pruss.c
index d5f128e..ccc9783 100644
--- a/drivers/soc/ti/pruss.c
+++ b/drivers/soc/ti/pruss.c
@@ -163,6 +163,7 @@ static const struct of_device_id pruss_of_match[] = {
{ .compatible = "ti,am4376-pruss1", .data = &am437x_pruss1_data, },
{ .compatible = "ti,am5728-pruss" },
{ .compatible = "ti,k2g-pruss" },
+   { .compatible = "ti,am654-icssg" },
{},
 };
 MODULE_DEVICE_TABLE(of, pruss_of_match);
-- 
2.7.4



[PATCH 2/6] soc: ti: pruss: Add a platform driver for PRUSS in TI SoCs

2020-07-29 Thread Grzegorz Jaszczyk
From: Suman Anna 

The Programmable Real-Time Unit - Industrial Communication
Subsystem (PRU-ICSS) is present on various TI SoCs such as
AM335x or AM437x or the Keystone 66AK2G. Each SoC can have
one or more PRUSS instances that may or may not be identical.
For example, AM335x SoCs have a single PRUSS, while AM437x has
two PRUSS instances PRUSS1 and PRUSS0, with the PRUSS0 being
a cut-down version of the PRUSS1.

The PRUSS consists of dual 32-bit RISC cores called the
Programmable Real-Time Units (PRUs), some shared, data and
instruction memories, some internal peripheral modules, and
an interrupt controller. The programmable nature of the PRUs
provide flexibility to implement custom peripheral interfaces,
fast real-time responses, or specialized data handling.

The PRU-ICSS functionality is achieved through three different
platform drivers addressing a specific portion of the PRUSS.
Some sub-modules of the PRU-ICSS IP reuse some of the existing
drivers (like davinci mdio driver or the generic syscon driver).
This design provides flexibility in representing the different
modules of PRUSS accordingly, and at the same time allowing the
PRUSS driver to add some instance specific configuration within
an SoC.

The PRUSS platform driver deals with the overall PRUSS and is
used for managing the subsystem level resources like various
memories and the CFG module. It is responsible for the creation
and deletion of the platform devices for the child PRU devices
and other child devices (like Interrupt Controller, MDIO node
and some syscon nodes) so that they can be managed by specific
platform drivers. The PRUSS interrupt controller is managed by
an irqchip driver, while the individual PRU RISC cores are
managed by a PRU remoteproc driver.

The driver currently supports the AM335x SoC, and support for
other TI SoCs will be added in subsequent patches.

Signed-off-by: Suman Anna 
Signed-off-by: Andrew F. Davis 
Signed-off-by: Tero Kristo 
Signed-off-by: Grzegorz Jaszczyk 
---
 drivers/soc/ti/Kconfig   |  11 
 drivers/soc/ti/Makefile  |   1 +
 drivers/soc/ti/pruss.c   | 147 +++
 include/linux/pruss_driver.h |  48 ++
 4 files changed, 207 insertions(+)
 create mode 100644 drivers/soc/ti/pruss.c
 create mode 100644 include/linux/pruss_driver.h

diff --git a/drivers/soc/ti/Kconfig b/drivers/soc/ti/Kconfig
index e192fb7..b934bc3 100644
--- a/drivers/soc/ti/Kconfig
+++ b/drivers/soc/ti/Kconfig
@@ -101,6 +101,17 @@ config TI_K3_SOCINFO
  platforms to provide information about the SoC family and
  variant to user space.
 
+config TI_PRUSS
+   tristate "TI PRU-ICSS Subsystem Platform drivers"
+   depends on SOC_AM33XX
+   select MFD_SYSCON
+   help
+ TI PRU-ICSS Subsystem platform specific support.
+
+ Say Y or M here to support the Programmable Realtime Unit (PRU)
+ processors on various TI SoCs. It's safe to say N here if you're
+ not interested in the PRU or if you are unsure.
+
 endif # SOC_TI
 
 config TI_SCI_INTA_MSI_DOMAIN
diff --git a/drivers/soc/ti/Makefile b/drivers/soc/ti/Makefile
index 1110e5c..18129aa 100644
--- a/drivers/soc/ti/Makefile
+++ b/drivers/soc/ti/Makefile
@@ -12,3 +12,4 @@ obj-$(CONFIG_TI_SCI_PM_DOMAINS)   += 
ti_sci_pm_domains.o
 obj-$(CONFIG_TI_SCI_INTA_MSI_DOMAIN)   += ti_sci_inta_msi.o
 obj-$(CONFIG_TI_K3_RINGACC)+= k3-ringacc.o
 obj-$(CONFIG_TI_K3_SOCINFO)+= k3-socinfo.o
+obj-$(CONFIG_TI_PRUSS) += pruss.o
diff --git a/drivers/soc/ti/pruss.c b/drivers/soc/ti/pruss.c
new file mode 100644
index 000..c071bb2
--- /dev/null
+++ b/drivers/soc/ti/pruss.c
@@ -0,0 +1,147 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * PRU-ICSS platform driver for various TI SoCs
+ *
+ * Copyright (C) 2014-2020 Texas Instruments Incorporated - http://www.ti.com/
+ * Author(s):
+ * Suman Anna 
+ * Andrew F. Davis 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int pruss_probe(struct platform_device *pdev)
+{
+   struct device *dev = &pdev->dev;
+   struct device_node *np = dev_of_node(dev);
+   struct device_node *child;
+   struct pruss *pruss;
+   struct resource res;
+   int ret, i, index;
+   const char *mem_names[PRUSS_MEM_MAX] = { "dram0", "dram1", "shrdram2" };
+
+   ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
+   if (ret) {
+   dev_err(dev, "failed to set the DMA coherent mask");
+   return ret;
+   }
+
+   pruss = devm_kzalloc(dev, sizeof(*pruss), GFP_KERNEL);
+   if (!pruss)
+   return -ENOMEM;
+
+   pruss->dev = dev;
+
+   child = of_get_child_by_name(np, "memories");
+   if (!child) {
+   dev_err(dev, "%pOF is missing its 'memories' node\n", child);
+   return -ENODEV;
+   }
+
+   for (i = 0; i < ARRAY_SIZE(mem_names); i++) {
+

linux-next: build failure after merge of the printk tree

2020-07-29 Thread Stephen Rothwell
Hi all,

After merging the printk tree, today's linux-next build (powerpc
allyesconfig) failed like this:

In file included from include/linux/printk.h:10,
 from include/linux/kernel.h:15,
 from include/asm-generic/bug.h:20,
 from arch/powerpc/include/asm/bug.h:109,
 from include/linux/bug.h:5,
 from arch/powerpc/include/asm/cmpxchg.h:8,
 from arch/powerpc/include/asm/atomic.h:11,
 from include/linux/atomic.h:7,
 from include/asm-generic/qspinlock_types.h:19,
 from arch/powerpc/include/asm/spinlock_types.h:10,
 from include/linux/spinlock_types.h:13,
 from include/linux/genalloc.h:32,
 from drivers/soc/fsl/qe/qe_common.c:16:
include/linux/ratelimit_types.h:16:2: error: unknown type name 'raw_spinlock_t'
   16 |  raw_spinlock_t lock;  /* protect the state */
  |  ^~
In file included from include/linux/wait.h:9,
 from include/linux/pid.h:6,
 from include/linux/sched.h:14,
 from include/linux/ratelimit.h:6,
 from include/linux/dev_printk.h:16,
 from include/linux/device.h:15,
 from include/linux/node.h:18,
 from include/linux/cpu.h:17,
 from include/linux/of_device.h:5,
 from drivers/soc/fsl/qe/qe_common.c:19:
include/linux/ratelimit.h: In function 'ratelimit_state_init':
include/linux/ratelimit.h:14:21: error: passing argument 1 of 
'__raw_spin_lock_init' from incompatible pointer type 
[-Werror=incompatible-pointer-types]
   14 |  raw_spin_lock_init(&rs->lock);
include/linux/spinlock.h:103:24: note: in definition of macro 
'raw_spin_lock_init'
  103 |  __raw_spin_lock_init((lock), #lock, &__key, LD_WAIT_SPIN); \
  |^~~~
include/linux/spinlock.h:96:52: note: expected 'raw_spinlock_t *' {aka 'struct 
raw_spinlock *'} but argument is of type 'int *'
   96 |   extern void __raw_spin_lock_init(raw_spinlock_t *lock, const char 
*name,
  |^~~~
In file included from arch/powerpc/include/asm/cmpxchg.h:8,
 from arch/powerpc/include/asm/atomic.h:11,
 from include/linux/atomic.h:7,
 from include/asm-generic/qspinlock_types.h:19,
 from arch/powerpc/include/asm/spinlock_types.h:10,
 from include/linux/spinlock_types.h:13,
 from include/linux/ratelimit_types.h:7,
 from include/linux/printk.h:10,
 from include/linux/kernel.h:15,
 from include/asm-generic/bug.h:20,
 from arch/powerpc/include/asm/bug.h:109,
 from drivers/block/drbd/drbd_interval.c:2:
include/linux/bug.h:34:47: warning: 'struct bug_entry' declared inside 
parameter list will not be visible outside of this definition or declaration
   34 | static inline int is_warning_bug(const struct bug_entry *bug)
  |   ^
include/linux/bug.h: In function 'is_warning_bug':
include/linux/bug.h:36:12: error: dereferencing pointer to incomplete type 
'const struct bug_entry'
   36 |  return bug->flags & BUGFLAG_WARNING;
  |^~

And another similar.

Caused by commit

  b4a461e72bcb ("printk: Make linux/printk.h self-contained")

This is becoming a bit of a whack-a-mole :-(

I have reverted that commit for today.
-- 
Cheers,
Stephen Rothwell


pgp7xvlwNxINU.pgp
Description: OpenPGP digital signature


[char-misc-next] MAINTAINERS: Fix maintainer entry for mei driver

2020-07-29 Thread Tomas Winkler
mei driver has sub modules, those are not
listed via scripts/get_maintainer.pl when using asterisk:
drivers/misc/mei/*
The correct notation is:
drivers/misc/mei/

Cc: Joe Perches 
Cc: Gustavo A. R. Silva 
Signed-off-by: Tomas Winkler 
---
 MAINTAINERS | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 86994c35d56e..dbe6a71eb6f2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8789,7 +8789,7 @@ M:Tomas Winkler 
 L: linux-kernel@vger.kernel.org
 S: Supported
 F: Documentation/driver-api/mei/*
-F: drivers/misc/mei/*
+F: drivers/misc/mei/
 F: drivers/watchdog/mei_wdt.c
 F: include/linux/mei_cl_bus.h
 F: include/uapi/linux/mei.h
-- 
2.25.4



[PATCH 1/2] ASoC: intel: atom: Add period size constraint

2020-07-29 Thread Brent Lu
Use constraint to enforce the period sizes which are validated in
Android BSP.

Signed-off-by: Brent Lu 
---
 sound/soc/intel/atom/sst-mfld-platform-pcm.c | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/sound/soc/intel/atom/sst-mfld-platform-pcm.c 
b/sound/soc/intel/atom/sst-mfld-platform-pcm.c
index 49b9f18..f614651 100644
--- a/sound/soc/intel/atom/sst-mfld-platform-pcm.c
+++ b/sound/soc/intel/atom/sst-mfld-platform-pcm.c
@@ -300,6 +300,16 @@ static void power_down_sst(struct sst_runtime_stream 
*stream)
stream->ops->power(sst->dev, false);
 }
 
+static const unsigned int media_period_size[] = {
+   /* sizes validated on Android platform */
+   240, 320, 960, 3072
+};
+
+static const struct snd_pcm_hw_constraint_list constraints_media_period_size = 
{
+   .count = ARRAY_SIZE(media_period_size),
+   .list  = media_period_size,
+};
+
 static int sst_media_open(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
 {
@@ -333,6 +343,11 @@ static int sst_media_open(struct snd_pcm_substream 
*substream,
if (ret_val < 0)
return ret_val;
 
+   /* Avoid using period size which is not validated */
+   snd_pcm_hw_constraint_list(substream->runtime, 0,
+   SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
+   &constraints_media_period_size);
+
/* Make sure, that the period size is always even */
snd_pcm_hw_constraint_step(substream->runtime, 0,
   SNDRV_PCM_HW_PARAM_PERIODS, 2);
-- 
2.7.4



[PATCH 2/2] ASoC: Intel: Add period size constraint on strago board

2020-07-29 Thread Brent Lu
From: Yu-Hsuan Hsu 

The CRAS server does not set the period size in hw_param so ALSA will
calculate a value for period size which is based on the buffer size
and other parameters. The value may not always be aligned with Atom's
dsp design so a constraint is added to make sure the board always has
a good value.

Cyan uses chtmax98090 and others(banon, celes, edgar, kefka...) use
rt5650.

Signed-off-by: Yu-Hsuan Hsu 
Signed-off-by: Brent Lu 
---
 sound/soc/intel/boards/cht_bsw_max98090_ti.c | 14 +-
 sound/soc/intel/boards/cht_bsw_rt5645.c  | 14 +-
 2 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/sound/soc/intel/boards/cht_bsw_max98090_ti.c 
b/sound/soc/intel/boards/cht_bsw_max98090_ti.c
index 835e9bd..bf67254 100644
--- a/sound/soc/intel/boards/cht_bsw_max98090_ti.c
+++ b/sound/soc/intel/boards/cht_bsw_max98090_ti.c
@@ -283,8 +283,20 @@ static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
 
 static int cht_aif1_startup(struct snd_pcm_substream *substream)
 {
-   return snd_pcm_hw_constraint_single(substream->runtime,
+   int err;
+
+   /* Set period size to 240 to align with Atom design */
+   err = snd_pcm_hw_constraint_minmax(substream->runtime,
+   SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 240, 240);
+   if (err < 0)
+   return err;
+
+   err = snd_pcm_hw_constraint_single(substream->runtime,
SNDRV_PCM_HW_PARAM_RATE, 48000);
+   if (err < 0)
+   return err;
+
+   return 0;
 }
 
 static int cht_max98090_headset_init(struct snd_soc_component *component)
diff --git a/sound/soc/intel/boards/cht_bsw_rt5645.c 
b/sound/soc/intel/boards/cht_bsw_rt5645.c
index b53c024..6e62f0d 100644
--- a/sound/soc/intel/boards/cht_bsw_rt5645.c
+++ b/sound/soc/intel/boards/cht_bsw_rt5645.c
@@ -414,8 +414,20 @@ static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
 
 static int cht_aif1_startup(struct snd_pcm_substream *substream)
 {
-   return snd_pcm_hw_constraint_single(substream->runtime,
+   int err;
+
+   /* Set period size to 240 to align with Atom design */
+   err = snd_pcm_hw_constraint_minmax(substream->runtime,
+   SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 240, 240);
+   if (err < 0)
+   return err;
+
+   err = snd_pcm_hw_constraint_single(substream->runtime,
SNDRV_PCM_HW_PARAM_RATE, 48000);
+   if (err < 0)
+   return err;
+
+   return 0;
 }
 
 static const struct snd_soc_ops cht_aif1_ops = {
-- 
2.7.4



[PATCH 0/2] Add period size constraint for Atom Chromebook

2020-07-29 Thread Brent Lu
Two different constraints are implemented: one is in platform's CPU
DAI to enforce period sizes which are already used in Android BSP. The
other is in Atom Chromebook's machine driver to use 240 as period size.

Brent Lu (1):
  ASoC: intel: atom: Add period size constraint

Yu-Hsuan Hsu (1):
  ASoC: Intel: Add period size constraint on strago board

 sound/soc/intel/atom/sst-mfld-platform-pcm.c | 15 +++
 sound/soc/intel/boards/cht_bsw_max98090_ti.c | 14 +-
 sound/soc/intel/boards/cht_bsw_rt5645.c  | 14 +-
 3 files changed, 41 insertions(+), 2 deletions(-)

-- 
2.7.4



Re: [PATCH 16/19] perf metric: Make compute_single function more precise

2020-07-29 Thread Arnaldo Carvalho de Melo
Em Wed, Jul 29, 2020 at 01:47:01AM +0530, kajoljain escreveu:
> 
> 
> On 7/28/20 10:56 PM, Ian Rogers wrote:
> > On Tue, Jul 28, 2020 at 5:36 AM Arnaldo Carvalho de Melo
> >  wrote:
> >>
> >> Em Sun, Jul 19, 2020 at 08:13:17PM +0200, Jiri Olsa escreveu:
> >>> So far compute_single function relies on the fact, that
> >>> there's only single metric defined within evlist in all
> >>> tests. In following patch we will add test for metric
> >>> group, so we need to be able to compute metric by given
> >>> name.
> >>>
> >>> Adding the name argument to compute_single and iterating
> >>> evlist and evsel's expression to find the given metric.
> >>
> >> Applied, thanks.
> >>
> >> Ian, Kajol, I didn't notice your Acked-by or Reviewed-by, like for the
> >> other patches, can you check?
> > 
> > 
> > Acked-by: Ian Rogers 
> 
> Reviewed-By: Kajol Jain

Thanks, updated the patch with both tags,

- Arnaldo


[PATCH tip/locking/core v2 2/2] kcsan: Improve IRQ state trace reporting

2020-07-29 Thread Marco Elver
To improve the general usefulness of the IRQ state trace events with
KCSAN enabled, save and restore the trace information when entering and
exiting the KCSAN runtime as well as when generating a KCSAN report.

Without this, reporting the IRQ trace events (whether via a KCSAN report
or outside of KCSAN via a lockdep report) is rather useless due to
continuously being touched by KCSAN. This is because if KCSAN is
enabled, every instrumented memory access causes changes to IRQ trace
events (either by KCSAN disabling/enabling interrupts or taking
report_lock when generating a report).

Before "lockdep: Prepare for NMI IRQ state tracking", KCSAN avoided
touching the IRQ trace events via raw_local_irq_save/restore() and
lockdep_off/on().

Fixes: 248591f5d257 ("kcsan: Make KCSAN compatible with new IRQ state tracking")
Signed-off-by: Marco Elver 
---
v2:
* Use simple struct copy, now that the IRQ trace events are in a struct.

Depends on:  "lockdep: Prepare for NMI IRQ state tracking"
---
 include/linux/sched.h |  4 
 kernel/kcsan/core.c   | 23 +++
 kernel/kcsan/kcsan.h  |  7 +++
 kernel/kcsan/report.c |  3 +++
 4 files changed, 37 insertions(+)

diff --git a/include/linux/sched.h b/include/linux/sched.h
index 52e0fdd6a555..060e9214c8b5 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -1184,8 +1184,12 @@ struct task_struct {
 #ifdef CONFIG_KASAN
unsigned intkasan_depth;
 #endif
+
 #ifdef CONFIG_KCSAN
struct kcsan_ctxkcsan_ctx;
+#ifdef CONFIG_TRACE_IRQFLAGS
+   struct irqtrace_events  kcsan_save_irqtrace;
+#endif
 #endif
 
 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
diff --git a/kernel/kcsan/core.c b/kernel/kcsan/core.c
index 732623c30359..0fe068192781 100644
--- a/kernel/kcsan/core.c
+++ b/kernel/kcsan/core.c
@@ -291,6 +291,20 @@ static inline unsigned int get_delay(void)
0);
 }
 
+void kcsan_save_irqtrace(struct task_struct *task)
+{
+#ifdef CONFIG_TRACE_IRQFLAGS
+   task->kcsan_save_irqtrace = task->irqtrace;
+#endif
+}
+
+void kcsan_restore_irqtrace(struct task_struct *task)
+{
+#ifdef CONFIG_TRACE_IRQFLAGS
+   task->irqtrace = task->kcsan_save_irqtrace;
+#endif
+}
+
 /*
  * Pull everything together: check_access() below contains the performance
  * critical operations; the fast-path (including check_access) functions should
@@ -336,9 +350,11 @@ static noinline void kcsan_found_watchpoint(const volatile 
void *ptr,
flags = user_access_save();
 
if (consumed) {
+   kcsan_save_irqtrace(current);
kcsan_report(ptr, size, type, KCSAN_VALUE_CHANGE_MAYBE,
 KCSAN_REPORT_CONSUMED_WATCHPOINT,
 watchpoint - watchpoints);
+   kcsan_restore_irqtrace(current);
} else {
/*
 * The other thread may not print any diagnostics, as it has
@@ -396,6 +412,12 @@ kcsan_setup_watchpoint(const volatile void *ptr, size_t 
size, int type)
goto out;
}
 
+   /*
+* Save and restore the IRQ state trace touched by KCSAN, since KCSAN's
+* runtime is entered for every memory access, and potentially useful
+* information is lost if dirtied by KCSAN.
+*/
+   kcsan_save_irqtrace(current);
if (!kcsan_interrupt_watcher)
local_irq_save(irq_flags);
 
@@ -539,6 +561,7 @@ kcsan_setup_watchpoint(const volatile void *ptr, size_t 
size, int type)
 out_unlock:
if (!kcsan_interrupt_watcher)
local_irq_restore(irq_flags);
+   kcsan_restore_irqtrace(current);
 out:
user_access_restore(ua_flags);
 }
diff --git a/kernel/kcsan/kcsan.h b/kernel/kcsan/kcsan.h
index 763d6d08d94b..29480010dc30 100644
--- a/kernel/kcsan/kcsan.h
+++ b/kernel/kcsan/kcsan.h
@@ -9,6 +9,7 @@
 #define _KERNEL_KCSAN_KCSAN_H
 
 #include 
+#include 
 
 /* The number of adjacent watchpoints to check. */
 #define KCSAN_CHECK_ADJACENT 1
@@ -22,6 +23,12 @@ extern unsigned int kcsan_udelay_interrupt;
  */
 extern bool kcsan_enabled;
 
+/*
+ * Save/restore IRQ flags state trace dirtied by KCSAN.
+ */
+void kcsan_save_irqtrace(struct task_struct *task);
+void kcsan_restore_irqtrace(struct task_struct *task);
+
 /*
  * Initialize debugfs file.
  */
diff --git a/kernel/kcsan/report.c b/kernel/kcsan/report.c
index 6b2fb1a6d8cd..9d07e175de0f 100644
--- a/kernel/kcsan/report.c
+++ b/kernel/kcsan/report.c
@@ -308,6 +308,9 @@ static void print_verbose_info(struct task_struct *task)
if (!task)
return;
 
+   /* Restore IRQ state trace for printing. */
+   kcsan_restore_irqtrace(task);
+
pr_err("\n");
debug_show_held_locks(task);
print_irqtrace_events(task);
-- 
2.28.0.rc0.142.g3c755180ce-goog



[PATCH tip/locking/core v2 1/2] lockdep: Refactor IRQ trace events fields into struct

2020-07-29 Thread Marco Elver
Refactor the IRQ trace events fields, used for printing information
about the IRQ trace events, into a separate struct 'irqtrace_events'.

This improves readability by separating the information only used in
reporting, as well as enables (simplified) storing/restoring of
irqtrace_events snapshots.

No functional change intended.

Signed-off-by: Marco Elver 
---
v2:
* Introduce patch, as pre-requisite to "kcsan: Improve IRQ state trace
  reporting".
---
 include/linux/irqflags.h | 13 +
 include/linux/sched.h| 11 ++--
 kernel/fork.c| 16 ---
 kernel/locking/lockdep.c | 58 +---
 4 files changed, 50 insertions(+), 48 deletions(-)

diff --git a/include/linux/irqflags.h b/include/linux/irqflags.h
index 5811ee8a5cd8..bd5c55755447 100644
--- a/include/linux/irqflags.h
+++ b/include/linux/irqflags.h
@@ -33,6 +33,19 @@
 
 #ifdef CONFIG_TRACE_IRQFLAGS
 
+/* Per-task IRQ trace events information. */
+struct irqtrace_events {
+   unsigned intirq_events;
+   unsigned long   hardirq_enable_ip;
+   unsigned long   hardirq_disable_ip;
+   unsigned inthardirq_enable_event;
+   unsigned inthardirq_disable_event;
+   unsigned long   softirq_disable_ip;
+   unsigned long   softirq_enable_ip;
+   unsigned intsoftirq_disable_event;
+   unsigned intsoftirq_enable_event;
+};
+
 DECLARE_PER_CPU(int, hardirqs_enabled);
 DECLARE_PER_CPU(int, hardirq_context);
 
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 8d1de021b315..52e0fdd6a555 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -18,6 +18,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -980,17 +981,9 @@ struct task_struct {
 #endif
 
 #ifdef CONFIG_TRACE_IRQFLAGS
-   unsigned intirq_events;
+   struct irqtrace_events  irqtrace;
unsigned inthardirq_threaded;
-   unsigned long   hardirq_enable_ip;
-   unsigned long   hardirq_disable_ip;
-   unsigned inthardirq_enable_event;
-   unsigned inthardirq_disable_event;
u64 hardirq_chain_key;
-   unsigned long   softirq_disable_ip;
-   unsigned long   softirq_enable_ip;
-   unsigned intsoftirq_disable_event;
-   unsigned intsoftirq_enable_event;
int softirqs_enabled;
int softirq_context;
int irq_config;
diff --git a/kernel/fork.c b/kernel/fork.c
index 70d9d0a4de2a..56a640799680 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -2035,17 +2035,11 @@ static __latent_entropy struct task_struct 
*copy_process(
seqcount_init(&p->mems_allowed_seq);
 #endif
 #ifdef CONFIG_TRACE_IRQFLAGS
-   p->irq_events = 0;
-   p->hardirq_enable_ip = 0;
-   p->hardirq_enable_event = 0;
-   p->hardirq_disable_ip = _THIS_IP_;
-   p->hardirq_disable_event = 0;
-   p->softirqs_enabled = 1;
-   p->softirq_enable_ip = _THIS_IP_;
-   p->softirq_enable_event = 0;
-   p->softirq_disable_ip = 0;
-   p->softirq_disable_event = 0;
-   p->softirq_context = 0;
+   memset(&p->irqtrace, 0, sizeof(p->irqtrace));
+   p->irqtrace.hardirq_disable_ip  = _THIS_IP_;
+   p->irqtrace.softirq_enable_ip   = _THIS_IP_;
+   p->softirqs_enabled = 1;
+   p->softirq_context  = 0;
 #endif
 
p->pagefault_disabled = 0;
diff --git a/kernel/locking/lockdep.c b/kernel/locking/lockdep.c
index c9ea05edce25..7b5800374c40 100644
--- a/kernel/locking/lockdep.c
+++ b/kernel/locking/lockdep.c
@@ -3484,19 +3484,21 @@ check_usage_backwards(struct task_struct *curr, struct 
held_lock *this,
 
 void print_irqtrace_events(struct task_struct *curr)
 {
-   printk("irq event stamp: %u\n", curr->irq_events);
+   const struct irqtrace_events *trace = &curr->irqtrace;
+
+   printk("irq event stamp: %u\n", trace->irq_events);
printk("hardirqs last  enabled at (%u): [<%px>] %pS\n",
-   curr->hardirq_enable_event, (void *)curr->hardirq_enable_ip,
-   (void *)curr->hardirq_enable_ip);
+   trace->hardirq_enable_event, (void *)trace->hardirq_enable_ip,
+   (void *)trace->hardirq_enable_ip);
printk("hardirqs last disabled at (%u): [<%px>] %pS\n",
-   curr->hardirq_disable_event, (void *)curr->hardirq_disable_ip,
-   (void *)curr->hardirq_disable_ip);
+   trace->hardirq_disable_event, (void *)trace->hardirq_disable_ip,
+   (void *)trace->hardirq_disable_ip);
printk("softirqs last  enabled at (%u): [<%px>] %pS\n",
-   curr->softirq_enable_event, (void *)curr->softirq_enable_ip,
-   (void *)curr->soft

[RFC][PATCH] locking/refcount: Provide __refcount API to obtain the old value

2020-07-29 Thread peterz
On Tue, Jul 28, 2020 at 11:56:38AM +0100, David Howells wrote:
> Peter Zijlstra  wrote:
> 
> > > Please do not _undo_ the changes; just add the API you need.
> > 
> > add_return and sub_return are horrible interface for refcount, which is
> > the problem.
> > 
> > If you meant: refcount_dec(), but want the old value for tracing, you
> > want a different ordering than if you wanted to do
> > refcount_dec_and_test(); dec_return can't know this.
> > 
> > David, would something like a __refcount_*() API work where there is a
> > 3rd argument (int *), which, if !NULL, will be assigned the old value?
> 
> That would be fine, though the number needs to be something I can interpret
> easily when looking through the traces.  It would also be okay if there was an
> interpretation function that I could use in the trace point when setting the
> variable.

I'm not entirely sure what you mean with interpret, provided you don't
trigger a refcount fail, the number will be just what you expect and
would get from refcount_read(). If you do trigger a fail, you'll get a
negative value.

How's the below? I didn't provide __refcount versions for the external
functions, I suppose that can be done too, but wondered if you really
needed those.

---
Subject: locking/refcount: Provide __refcount API to obtain the old value
From: Peter Zijlstra 
Date: Wed Jul 29 13:00:57 CEST 2020

David requested means to obtain the old/previous value from the
refcount API for tracing purposes.

Duplicate (most of) the API as __refcount*() with an additional
'int *' argument into which, if !NULL, the old value will be stored.

Requested-by: David Howells 
Signed-off-by: Peter Zijlstra (Intel) 
---
 include/linux/refcount.h |   65 +--
 1 file changed, 57 insertions(+), 8 deletions(-)

--- a/include/linux/refcount.h
+++ b/include/linux/refcount.h
@@ -165,7 +165,7 @@ static inline unsigned int refcount_read
  *
  * Return: false if the passed refcount is 0, true otherwise
  */
-static inline __must_check bool refcount_add_not_zero(int i, refcount_t *r)
+static inline __must_check bool __refcount_add_not_zero(int i, refcount_t *r, 
int *oldp)
 {
int old = refcount_read(r);
 
@@ -174,12 +174,20 @@ static inline __must_check bool refcount
break;
} while (!atomic_try_cmpxchg_relaxed(&r->refs, &old, old + i));
 
+   if (oldp)
+   *oldp = old;
+
if (unlikely(old < 0 || old + i < 0))
refcount_warn_saturate(r, REFCOUNT_ADD_NOT_ZERO_OVF);
 
return old;
 }
 
+static inline __must_check bool refcount_add_not_zero(int i, refcount_t *r)
+{
+   return __refcount_add_not_zero(i, r, NULL);
+}
+
 /**
  * refcount_add - add a value to a refcount
  * @i: the value to add to the refcount
@@ -196,16 +204,24 @@ static inline __must_check bool refcount
  * cases, refcount_inc(), or one of its variants, should instead be used to
  * increment a reference count.
  */
-static inline void refcount_add(int i, refcount_t *r)
+static inline void __refcount_add(int i, refcount_t *r, int *oldp)
 {
int old = atomic_fetch_add_relaxed(i, &r->refs);
 
+   if (oldp)
+   *oldp = old;
+
if (unlikely(!old))
refcount_warn_saturate(r, REFCOUNT_ADD_UAF);
else if (unlikely(old < 0 || old + i < 0))
refcount_warn_saturate(r, REFCOUNT_ADD_OVF);
 }
 
+static inline void refcount_add(int i, refcount_t *r)
+{
+   __refcount_add(i, r, NULL);
+}
+
 /**
  * refcount_inc_not_zero - increment a refcount unless it is 0
  * @r: the refcount to increment
@@ -219,9 +235,14 @@ static inline void refcount_add(int i, r
  *
  * Return: true if the increment was successful, false otherwise
  */
+static inline __must_check bool __refcount_inc_not_zero(refcount_t *r, int 
*oldp)
+{
+   return __refcount_add_not_zero(1, r, oldp);
+}
+
 static inline __must_check bool refcount_inc_not_zero(refcount_t *r)
 {
-   return refcount_add_not_zero(1, r);
+   return __refcount_inc_not_zero(r, NULL);
 }
 
 /**
@@ -236,9 +257,14 @@ static inline __must_check bool refcount
  * Will WARN if the refcount is 0, as this represents a possible use-after-free
  * condition.
  */
+static inline void __refcount_inc(refcount_t *r, int *oldp)
+{
+   __refcount_add(1, r, oldp);
+}
+
 static inline void refcount_inc(refcount_t *r)
 {
-   refcount_add(1, r);
+   __refcount_inc(r, NULL);
 }
 
 /**
@@ -261,10 +287,13 @@ static inline void refcount_inc(refcount
  *
  * Return: true if the resulting refcount is 0, false otherwise
  */
-static inline __must_check bool refcount_sub_and_test(int i, refcount_t *r)
+static inline __must_check bool __refcount_sub_and_test(int i, refcount_t *r, 
int *oldp)
 {
int old = atomic_fetch_sub_release(i, &r->refs);
 
+   if (oldp)
+   *oldp = old;
+
if (old == i) {
smp_acquire__after_ctrl_dep();
return true;
@@ -276,6 

Re: [PATCH] vgacon: fix out of bounds write to the scrollback buffer

2020-07-29 Thread Jiri Slaby
On 29. 07. 20, 10:19, 张云海 wrote:
> On 2020/7/29 16:11, Jiri Slaby wrote:
>> But the loop checks for the overflow:
>>   if (vgacon_scrollback_cur->tail >= vgacon_scrollback_cur->size)
>> vgacon_scrollback_cur->tail = 0;
>>
>> So the first 2 iterations would write to the end of the buffer and this
>> 3rd one should have zeroed ->tail.
> 
> In the 2nd  iteration before the check:
> vgacon_scrollback_cur->tail is 65360 which is still less then
> vgacon_scrollback_cur->size(65440), so the ->tail won't be zeroed.
> 
> Then it gose to the 3rd  iteration, overflow occurs.

Ahh, I see now! So it must be triggered by CSI M instead. It allows for
more than 1 in count. So this is PoC for this case:
#include 
#include 
#include 
#include 
#include 
#include 
#include 

int main(int argc, char** argv)
{
int fd = open("/dev/tty1", O_RDWR);
unsigned short size[3] = {25, 200, 0};
ioctl(fd, 0x5609, size); // VT_RESIZE

write(fd, "\e[1;1H", 6);
for (int i = 0; i < 30; i++)
write(fd, "\e[10M", 5);
}

It corrupts memory, so it crashes the kernel randomly. Even with my
before-loop patch.

So now: could you resend your patch with improved commit message, add
all those Ccs etc.? You can copy most of the Ccs from my patch verbatim.

I am also not sure the test I was pointing out on the top of this
message would be of any use after the change. But maybe leave the code
rest in peace.

thanks,
-- 
js
suse labs


Re: [PATCH 1/2] ASoC: intel: atom: Add period size constraint

2020-07-29 Thread Andy Shevchenko
On Wed, Jul 29, 2020 at 07:03:04PM +0800, Brent Lu wrote:
> Use constraint to enforce the period sizes which are validated in
> Android BSP.
> 
> Signed-off-by: Brent Lu 
> ---
>  sound/soc/intel/atom/sst-mfld-platform-pcm.c | 15 +++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/sound/soc/intel/atom/sst-mfld-platform-pcm.c 
> b/sound/soc/intel/atom/sst-mfld-platform-pcm.c
> index 49b9f18..f614651 100644
> --- a/sound/soc/intel/atom/sst-mfld-platform-pcm.c
> +++ b/sound/soc/intel/atom/sst-mfld-platform-pcm.c
> @@ -300,6 +300,16 @@ static void power_down_sst(struct sst_runtime_stream 
> *stream)
>   stream->ops->power(sst->dev, false);
>  }
>  
> +static const unsigned int media_period_size[] = {
> + /* sizes validated on Android platform */

> + 240, 320, 960, 3072

Leave comma at the end.

> +};
> +
> +static const struct snd_pcm_hw_constraint_list constraints_media_period_size 
> = {
> + .count = ARRAY_SIZE(media_period_size),
> + .list  = media_period_size,
> +};
> +
>  static int sst_media_open(struct snd_pcm_substream *substream,
>   struct snd_soc_dai *dai)
>  {
> @@ -333,6 +343,11 @@ static int sst_media_open(struct snd_pcm_substream 
> *substream,
>   if (ret_val < 0)
>   return ret_val;
>  
> + /* Avoid using period size which is not validated */
> + snd_pcm_hw_constraint_list(substream->runtime, 0,
> + SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
> + &constraints_media_period_size);
> +
>   /* Make sure, that the period size is always even */
>   snd_pcm_hw_constraint_step(substream->runtime, 0,
>  SNDRV_PCM_HW_PARAM_PERIODS, 2);
> -- 
> 2.7.4
> 

-- 
With Best Regards,
Andy Shevchenko




Re: [PATCH 0/2] Add period size constraint for Atom Chromebook

2020-07-29 Thread Andy Shevchenko
On Wed, Jul 29, 2020 at 07:03:03PM +0800, Brent Lu wrote:
> Two different constraints are implemented: one is in platform's CPU
> DAI to enforce period sizes which are already used in Android BSP. The
> other is in Atom Chromebook's machine driver to use 240 as period size.

One nit to one patch.
Overall, LGTM and thus FWIW,
Reviewed-by: Andy Shevchenko 

> Brent Lu (1):
>   ASoC: intel: atom: Add period size constraint
> 
> Yu-Hsuan Hsu (1):
>   ASoC: Intel: Add period size constraint on strago board
> 
>  sound/soc/intel/atom/sst-mfld-platform-pcm.c | 15 +++
>  sound/soc/intel/boards/cht_bsw_max98090_ti.c | 14 +-
>  sound/soc/intel/boards/cht_bsw_rt5645.c  | 14 +-
>  3 files changed, 41 insertions(+), 2 deletions(-)
> 
> -- 
> 2.7.4
> 

-- 
With Best Regards,
Andy Shevchenko




RE: [PATCH v4 1/2] dma-direct: provide the ability to reserve per-numa CMA

2020-07-29 Thread Song Bao Hua (Barry Song)



> -Original Message-
> From: Christoph Hellwig [mailto:h...@lst.de]
> Sent: Wednesday, July 29, 2020 12:23 AM
> To: Song Bao Hua (Barry Song) 
> Cc: Christoph Hellwig ; m.szyprow...@samsung.com;
> robin.mur...@arm.com; w...@kernel.org; ganapatrao.kulka...@cavium.com;
> catalin.mari...@arm.com; io...@lists.linux-foundation.org; Linuxarm
> ; linux-arm-ker...@lists.infradead.org;
> linux-kernel@vger.kernel.org; Zengtao (B) ;
> huangdaode ; Jonathan Cameron
> ; Nicolas Saenz Julienne
> ; Steve Capper ; Andrew
> Morton ; Mike Rapoport 
> Subject: Re: [PATCH v4 1/2] dma-direct: provide the ability to reserve
> per-numa CMA
> 
> On Tue, Jul 28, 2020 at 12:19:03PM +, Song Bao Hua (Barry Song) wrote:
> > I am sorry I haven't got your point yet. Do you mean something like the
> below?
> >
> > arch/arm64/Kconfig:
> > config CMDLINE
> > string "Default kernel command string"
> > -   default ""
> > +   default "pernuma_cma=16M"
> > help
> >   Provide a set of default command-line options at build time by
> >   entering them here. As a minimum, you should specify the the
> >   root device (e.g. root=/dev/nfs).
> 
> Yes.
> 
> > A background of the current code is that Linux distributions can usually use
> arch/arm64/configs/defconfig
> > directly to build kernel. cmdline can be easily ignored during the 
> > generation
> of Linux distributions.
> 
> I've not actually heard of a distro shipping defconfig yet..
> 
> >
> > > if a way to expose this in the device tree might be useful, but people
> > > more familiar with the device tree and the arm code will have to chime
> > > in on that.
> >
> > Not sure if it is an useful user case as we are using ACPI but not device 
> > tree
> since it is an ARM64
> > server with NUMA.
> 
> Well, than maybe ACPI experts need to chime in on this.
> 
> > > This seems to have lost the dma_contiguous_default_area NULL check.
> >
> > cma_alloc() is doing the check by returning NULL if cma is NULL.
> >
> > struct page *cma_alloc(struct cma *cma, size_t count, unsigned int align,
> >bool no_warn)
> > {
> > ...
> > if (!cma || !cma->count)
> > return NULL;
> > }
> >
> > But I agree here the code can check before calling cma_alloc_aligned.
> 
> Oh, indeed.  Please split the removal of the NULL check in to a prep
> patch then.

Do you mean removing the NULL check in cma_alloc()? If so, it seems lot of 
places
need to be changed:

struct page *dma_alloc_from_contiguous(struct device *dev, size_t count,
   unsigned int align, bool no_warn)
{
if (align > CONFIG_CMA_ALIGNMENT)
align = CONFIG_CMA_ALIGNMENT;
+ code to check dev_get_cma_area(dev) is not NULL
return cma_alloc(dev_get_cma_area(dev), count, align, no_warn);
}

bool dma_release_from_contiguous(struct device *dev, struct page *pages,
 int count)
{
+ code to check dev_get_cma_area(dev) is not NULL
return cma_release(dev_get_cma_area(dev), pages, count);
}

bool cma_release(struct cma *cma, const struct page *pages, unsigned int count)
{
unsigned long pfn;
+ do we need to remove this !cma too if we remove it in cma_alloc()?
if (!cma || !pages)
return false;
...
}

And some other places where cma_alloc() and cma_release() are called:

arch/powerpc/kvm/book3s_hv_builtin.c
drivers/dma-buf/heaps/cma_heap.c
drivers/s390/char/vmcp.c
drivers/staging/android/ion/ion_cma_heap.c
mm/hugetlb.c

it seems many code were written with the assumption that cma_alloc/release will
check if cma is null so they don't check it before calling cma_alloc().

And I am not sure if kernel robot will report error like pointer reference 
before checking
it if !cma is removed in cma_alloc().

Thanks
Barry


linux-next: build failure after merge of the net-next tree

2020-07-29 Thread Stephen Rothwell
Hi all,

After merging the net-next tree, today's linux-next build (i386 defconfig)
failed like this:

x86_64-linux-gnu-ld: net/core/fib_rules.o: in function `fib_rules_lookup':
fib_rules.c:(.text+0x5c6): undefined reference to `fib6_rule_match'
x86_64-linux-gnu-ld: fib_rules.c:(.text+0x5d8): undefined reference to 
`fib6_rule_match'
x86_64-linux-gnu-ld: fib_rules.c:(.text+0x64d): undefined reference to 
`fib6_rule_action'
x86_64-linux-gnu-ld: fib_rules.c:(.text+0x662): undefined reference to 
`fib6_rule_action'
x86_64-linux-gnu-ld: fib_rules.c:(.text+0x67a): undefined reference to 
`fib6_rule_suppress'
x86_64-linux-gnu-ld: fib_rules.c:(.text+0x68d): undefined reference to 
`fib6_rule_suppress'

Caused by commit

  b9aaec8f0be5 ("fib: use indirect call wrappers in the most common 
fib_rules_ops")

# CONFIG_IPV6_MULTIPLE_TABLES is not set

I have reverted that commit for today.

-- 
Cheers,
Stephen Rothwell


pgp2cDg37Filg.pgp
Description: OpenPGP digital signature


[PATCH] trace : use kvmalloc instead of kmalloc

2020-07-29 Thread Zhaoyang Huang
High order memory stuff within trace could introduce OOM, use kvmalloc instead.

traced_probes invoked oom-killer: 
gfp_mask=0x140c0c0(GFP_KERNEL|__GFP_COMP|__GFP_ZERO), nodemask=(null),  
order=2, oom_score_adj=-1

traced_probes cpuset=system-background mems_allowed=0
CPU: 3 PID: 588 Comm: traced_probes Tainted: GW  O4.14.181 #1
Hardware name: Generic DT based system
(unwind_backtrace) from [] (show_stack+0x20/0x24)
(show_stack) from [] (dump_stack+0xa8/0xec)
(dump_stack) from [] (dump_header+0x9c/0x220)
(dump_header) from [] (oom_kill_process+0xc0/0x5c4)
(oom_kill_process) from [] (out_of_memory+0x220/0x310)
(out_of_memory) from [] (__alloc_pages_nodemask+0xff8/0x13a4)
(__alloc_pages_nodemask) from [] (kmalloc_order+0x30/0x48)
(kmalloc_order) from [] (kmalloc_order_trace+0x30/0x118)
(kmalloc_order_trace) from [] (tracing_buffers_open+0x50/0xfc)
(tracing_buffers_open) from [] (do_dentry_open+0x278/0x34c)
(do_dentry_open) from [] (vfs_open+0x50/0x70)
(vfs_open) from [] (path_openat+0x5fc/0x169c)
(path_openat) from [] (do_filp_open+0x94/0xf8)
(do_filp_open) from [] (do_sys_open+0x168/0x26c)
(do_sys_open) from [] (SyS_openat+0x34/0x38)
(SyS_openat) from [] (ret_fast_syscall+0x0/0x28)

Signed-off-by: Zhaoyang Huang 
---
 kernel/trace/trace.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c
index ca1ee65..d4eb7ea 100644
--- a/kernel/trace/trace.c
+++ b/kernel/trace/trace.c
@@ -6891,7 +6891,7 @@ static int tracing_buffers_open(struct inode *inode, 
struct file *filp)
if (trace_array_get(tr) < 0)
return -ENODEV;
 
-   info = kzalloc(sizeof(*info), GFP_KERNEL);
+   info = kvmalloc(sizeof(*info), GFP_KERNEL);
if (!info) {
trace_array_put(tr);
return -ENOMEM;
-- 
1.9.1



[PATCH] clk: mmp: avoid missing prototype warning

2020-07-29 Thread Arnd Bergmann
The kernel test robot points out two harmless warnings in the
mmp clk drivers:

drivers/clk/mmp/clk-pxa168.c:68:13: warning: no previous prototype for 
'pxa168_clk_init' [-Wmissing-prototypes]
drivers/clk/mmp/clk-pxa910.c:66:13: warning: no previous prototype for 
'pxa910_clk_init' [-Wmissing-prototypes]

Fix these by including corresponding header file.

Reported-by: kernel test robot 
Signed-off-by: Arnd Bergmann 
---
 drivers/clk/mmp/clk-pxa168.c | 1 +
 drivers/clk/mmp/clk-pxa910.c | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/clk/mmp/clk-pxa168.c b/drivers/clk/mmp/clk-pxa168.c
index 8e2551ab8462..b351039cac09 100644
--- a/drivers/clk/mmp/clk-pxa168.c
+++ b/drivers/clk/mmp/clk-pxa168.c
@@ -10,6 +10,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/drivers/clk/mmp/clk-pxa910.c b/drivers/clk/mmp/clk-pxa910.c
index 7a7965141918..f254ceff3ea7 100644
--- a/drivers/clk/mmp/clk-pxa910.c
+++ b/drivers/clk/mmp/clk-pxa910.c
@@ -10,6 +10,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
-- 
2.27.0



Re: drivers/clk/mmp/clk-pxa168.c:68:13: warning: no previous prototype for 'pxa168_clk_init'

2020-07-29 Thread Arnd Bergmann
On Wed, Jul 29, 2020 at 11:23 AM kernel test robot  wrote:
>
> Hi Bartosz,
>
> First bad commit (maybe != root cause):
>
> tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
> master
> head:   6ba1b005ffc388c2aeaddae20da29e4810dea298
> commit: f962396ce29244d9a64f241481fa73fa370404c3 ARM: davinci: support 
> multiplatform build for ARM v5
> date:   11 months ago
> config: arm-randconfig-r012-20200729 (attached as .config)
> compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
> reproduce (this is a W=1 build):
> wget 
> https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
> ~/bin/make.cross
> chmod +x ~/bin/make.cross
> git checkout f962396ce29244d9a64f241481fa73fa370404c3
> # save the attached .config to linux build tree
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross 
> ARCH=arm

I don't think this is related to the patch above, but I've sent a fix anyway.

  Arnd


Re: [RFC][PATCH] locking/refcount: Provide __refcount API to obtain the old value

2020-07-29 Thread peterz
On Wed, Jul 29, 2020 at 01:11:20PM +0200, pet...@infradead.org wrote:

> Subject: locking/refcount: Provide __refcount API to obtain the old value
> From: Peter Zijlstra 
> Date: Wed Jul 29 13:00:57 CEST 2020
> 
> David requested means to obtain the old/previous value from the
> refcount API for tracing purposes.
> 
> Duplicate (most of) the API as __refcount*() with an additional
> 'int *' argument into which, if !NULL, the old value will be stored.
> 
> Requested-by: David Howells 
> Signed-off-by: Peter Zijlstra (Intel) 
> ---
>  include/linux/refcount.h |   65 
> +--
>  1 file changed, 57 insertions(+), 8 deletions(-)
> 
> --- a/include/linux/refcount.h
> +++ b/include/linux/refcount.h
> @@ -165,7 +165,7 @@ static inline unsigned int refcount_read
>   *
>   * Return: false if the passed refcount is 0, true otherwise
>   */
> -static inline __must_check bool refcount_add_not_zero(int i, refcount_t *r)
> +static inline __must_check bool __refcount_add_not_zero(int i, refcount_t 
> *r, int *oldp)
>  {
>   int old = refcount_read(r);
>  
> @@ -174,12 +174,20 @@ static inline __must_check bool refcount
>   break;
>   } while (!atomic_try_cmpxchg_relaxed(&r->refs, &old, old + i));
>  
> + if (oldp)
> + *oldp = old;
> +
>   if (unlikely(old < 0 || old + i < 0))
>   refcount_warn_saturate(r, REFCOUNT_ADD_NOT_ZERO_OVF);
>  
>   return old;
>  }
>  
> +static inline __must_check bool refcount_add_not_zero(int i, refcount_t *r)
> +{
> + return __refcount_add_not_zero(i, r, NULL);
> +}

so, I could also emulate C++'s

bool refcount_add_not_zero(int i, refcount_t *r, int *oldp = NULL)

style by going to town on this with a bunch of CPP magic, but I don't
think that'll actually make things clearer.

It'll look something like:

#define __REF_ARGS(_0, _1, _2, _3, _n, X...) _n
#define REG_ARGS(X...) __REF_ARGS(, ##X, 3, 2, 1, 0)

#define __REF_CONCAT(a, b) a ## b
#define REF_CONCAT(a, b) __REF_CONCAT(a, b)

#define REF_UNARY_2(func, arg1, arg2)   func(arg1, arg2)
#define REF_UNARY_1(func, arg1) func(arg1, NULL)
#define REF_UNARY(func, X...) REF_CONCAT(REF_UNARY_, REF_ARGS(X))(func, X)

#define REF_BINARY_3(func, arg1, arg2, arg3)func(arg1, arg2, arg3)
#define REF_BINARY_2(func, arg1, arg2)  func(arg1, arg2, NULL)
#define REF_BINARY(func, X...) REF_CONCAT(REF_BINARY_, REF_ARGS(X))(func, X)

#define refcount_add(X...)  REF_BINARY(__refcount_add, X)
#define refcount_inc(X...)  REF_UNARY(__refcount_inc, X)

Opinions?


[Linux-kernel-mentees] [PATCH v2 RESEND] usbhid: Fix slab-out-of-bounds write in hiddev_ioctl_usage()

2020-07-29 Thread Peilin Ye
`uref->usage_index` is not always being properly checked, causing
hiddev_ioctl_usage() to go out of bounds under some cases. Fix it.

Reported-by: syzbot+34ee1b45d88571c2f...@syzkaller.appspotmail.com
Link: 
https://syzkaller.appspot.com/bug?id=f2aebe90b8c56806b050a20b36f51ed6acabe802
Reviewed-by: Dan Carpenter 
Signed-off-by: Peilin Ye 
---
Change in v2:
- Add the same check for the `HIDIOCGUSAGE` case. (Suggested by
  Dan Carpenter )

 drivers/hid/usbhid/hiddev.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/hid/usbhid/hiddev.c b/drivers/hid/usbhid/hiddev.c
index 4140dea693e9..4f97e6c12059 100644
--- a/drivers/hid/usbhid/hiddev.c
+++ b/drivers/hid/usbhid/hiddev.c
@@ -519,12 +519,16 @@ static noinline int hiddev_ioctl_usage(struct hiddev 
*hiddev, unsigned int cmd,
 
switch (cmd) {
case HIDIOCGUSAGE:
+   if (uref->usage_index >= field->report_count)
+   goto inval;
uref->value = field->value[uref->usage_index];
if (copy_to_user(user_arg, uref, sizeof(*uref)))
goto fault;
goto goodreturn;
 
case HIDIOCSUSAGE:
+   if (uref->usage_index >= field->report_count)
+   goto inval;
field->value[uref->usage_index] = uref->value;
goto goodreturn;
 
-- 
2.25.1



[PATCH v6 00/11] ppc64: enable kdump support for kexec_file_load syscall

2020-07-29 Thread Hari Bathini
Sorry! There was a gateway issue on my system while posting v5, due to
which some patches did not make it through. Resending...

This patch series enables kdump support for kexec_file_load system
call (kexec -s -p) on PPC64. The changes are inspired from kexec-tools
code but heavily modified for kernel consumption.

The first patch adds a weak arch_kexec_locate_mem_hole() function to
override locate memory hole logic suiting arch needs. There are some
special regions in ppc64 which should be avoided while loading buffer
& there are multiple callers to kexec_add_buffer making it complicated
to maintain range sanity and using generic lookup at the same time.

The second patch marks ppc64 specific code within arch/powerpc/kexec
and arch/powerpc/purgatory to make the subsequent code changes easy
to understand.

The next patch adds helper function to setup different memory ranges
needed for loading kdump kernel, booting into it and exporting the
crashing kernel's elfcore.

The fourth patch overrides arch_kexec_locate_mem_hole() function to
locate memory hole for kdump segments by accounting for the special
memory regions, referred to as excluded memory ranges, and sets
kbuf->mem when a suitable memory region is found.

The fifth patch moves walk_drmem_lmbs() out of .init section with
a few changes to reuse it for setting up kdump kernel's usable memory
ranges. The next patch uses walk_drmem_lmbs() to look up the LMBs
and set linux,drconf-usable-memory & linux,usable-memory properties
in order to restrict kdump kernel's memory usage.

The next patch setups up backup region as a kexec segment while
loading kdump kernel and teaches purgatory to copy data from source
to destination.

Patch 09 builds the elfcore header for the running kernel & passes
the info to kdump kernel via "elfcorehdr=" parameter to export as
/proc/vmcore file. The next patch sets up the memory reserve map
for the kexec kernel and also claims kdump support for kdump as
all the necessary changes are added.

The next patch fixes a lookup issue for `kexec -l -s` case when
memory is reserved for crashkernel.

The last patch updates purgatory to setup r8 & r9 with opal base
and opal entry addresses respectively to aid kernels built with
CONFIG_PPC_EARLY_DEBUG_OPAL enabled.

Tested the changes successfully on P8, P9 lpars, couple of OpenPOWER
boxes, one with secureboot enabled, KVM guest and a simulator.

v5 -> v6:
* Fixed reference count leak in add_tce_mem_ranges() function and also
  updated error handling in reading tce table base & sizes.
* Instead of trying to reinvent the wheel with get_node_path() &
  get_node_path_size() functions, used %pOF format as suggested by mpe.
* Moved patch 07/11 to end of the series for mpe to take a call on
  whether to have it or not.

v4 -> v5:
* Dropped patches 07/12 & 08/12 and updated purgatory to do everything
  in assembly.
* Added a new patch (which was part of patch 08/12 in v4) to update
  r8 & r9 registers with opal base & opal entry addresses as it is
  expected on kernels built with CONFIG_PPC_EARLY_DEBUG_OPAL enabled.
* Fixed kexec load issue on KVM guest.

v3 -> v4:
* Updated get_node_path() function to be iterative instead of a recursive one.
* Added comment explaining why low memory is added to kdump kernel's usable
  memory ranges though it doesn't fall in crashkernel region.
* Fixed stack_buf to be quadword aligned in accordance with ABI.
* Added missing of_node_put() in setup_purgatory_ppc64().
* Added a FIXME tag to indicate issue in adding opal/rtas regions to
  core image.

v2 -> v3:
* Fixed TOC pointer calculation for purgatory by using section info
  that has relocations applied.
* Fixed arch_kexec_locate_mem_hole() function to fallback to generic
  kexec_locate_mem_hole() lookup if exclude ranges list is empty.
* Dropped check for backup_start in trampoline_64.S as purgatory()
  function takes care of it anyway.

v1 -> v2:
* Introduced arch_kexec_locate_mem_hole() for override and dropped
  weak arch_kexec_add_buffer().
* Addressed warnings reported by lkp.
* Added patch to address kexec load issue when memory is reserved
  for crashkernel.
* Used the appropriate license header for the new files added.
* Added an option to merge ranges to minimize reallocations while
  adding memory ranges.
* Dropped within_crashkernel parameter for add_opal_mem_range() &
  add_rtas_mem_range() functions as it is not really needed.

---

Hari Bathini (11):
  kexec_file: allow archs to handle special regions while locating memory 
hole
  powerpc/kexec_file: mark PPC64 specific code
  powerpc/kexec_file: add helper functions for getting memory ranges
  ppc64/kexec_file: avoid stomping memory used by special regions
  powerpc/drmem: make lmb walk a bit more flexible
  ppc64/kexec_file: restrict memory usage of kdump kernel
  ppc64/kexec_file: setup backup region for kdump kernel
  ppc64/kexec_file: prepare elfcore header for crashing kernel
  ppc64/kexec_file: add appropr

[PATCH v6 01/11] kexec_file: allow archs to handle special regions while locating memory hole

2020-07-29 Thread Hari Bathini
Some architectures may have special memory regions, within the given
memory range, which can't be used for the buffer in a kexec segment.
Implement weak arch_kexec_locate_mem_hole() definition which arch code
may override, to take care of special regions, while trying to locate
a memory hole.

Also, add the missing declarations for arch overridable functions and
and drop the __weak descriptors in the declarations to avoid non-weak
definitions from becoming weak.

Reported-by: kernel test robot 
[lkp: In v1, arch_kimage_file_post_load_cleanup() declaration was missing]
Signed-off-by: Hari Bathini 
Tested-by: Pingfan Liu 
Acked-by: Dave Young 
Reviewed-by: Thiago Jung Bauermann 
---

v5 -> v6:
* Unchanged.

v4 -> v5:
* Unchanged.

v3 -> v4:
* Unchanged. Added Reviewed-by tag from Thiago.

v2 -> v3:
* Unchanged. Added Acked-by & Tested-by tags from Dave & Pingfan.

v1 -> v2:
* Introduced arch_kexec_locate_mem_hole() for override and dropped
  weak arch_kexec_add_buffer().
* Dropped __weak identifier for arch overridable functions.
* Fixed the missing declaration for arch_kimage_file_post_load_cleanup()
  reported by lkp. lkp report for reference:
- https://lore.kernel.org/patchwork/patch/1264418/


 include/linux/kexec.h |   29 ++---
 kernel/kexec_file.c   |   16 ++--
 2 files changed, 32 insertions(+), 13 deletions(-)

diff --git a/include/linux/kexec.h b/include/linux/kexec.h
index ea67910ae6b7..9e93bef52968 100644
--- a/include/linux/kexec.h
+++ b/include/linux/kexec.h
@@ -183,17 +183,24 @@ int kexec_purgatory_get_set_symbol(struct kimage *image, 
const char *name,
   bool get_value);
 void *kexec_purgatory_get_symbol_addr(struct kimage *image, const char *name);
 
-int __weak arch_kexec_kernel_image_probe(struct kimage *image, void *buf,
-unsigned long buf_len);
-void * __weak arch_kexec_kernel_image_load(struct kimage *image);
-int __weak arch_kexec_apply_relocations_add(struct purgatory_info *pi,
-   Elf_Shdr *section,
-   const Elf_Shdr *relsec,
-   const Elf_Shdr *symtab);
-int __weak arch_kexec_apply_relocations(struct purgatory_info *pi,
-   Elf_Shdr *section,
-   const Elf_Shdr *relsec,
-   const Elf_Shdr *symtab);
+/* Architectures may override the below functions */
+int arch_kexec_kernel_image_probe(struct kimage *image, void *buf,
+ unsigned long buf_len);
+void *arch_kexec_kernel_image_load(struct kimage *image);
+int arch_kexec_apply_relocations_add(struct purgatory_info *pi,
+Elf_Shdr *section,
+const Elf_Shdr *relsec,
+const Elf_Shdr *symtab);
+int arch_kexec_apply_relocations(struct purgatory_info *pi,
+Elf_Shdr *section,
+const Elf_Shdr *relsec,
+const Elf_Shdr *symtab);
+int arch_kimage_file_post_load_cleanup(struct kimage *image);
+#ifdef CONFIG_KEXEC_SIG
+int arch_kexec_kernel_verify_sig(struct kimage *image, void *buf,
+unsigned long buf_len);
+#endif
+int arch_kexec_locate_mem_hole(struct kexec_buf *kbuf);
 
 extern int kexec_add_buffer(struct kexec_buf *kbuf);
 int kexec_locate_mem_hole(struct kexec_buf *kbuf);
diff --git a/kernel/kexec_file.c b/kernel/kexec_file.c
index 09cc78df53c6..e89912d33a27 100644
--- a/kernel/kexec_file.c
+++ b/kernel/kexec_file.c
@@ -635,6 +635,19 @@ int kexec_locate_mem_hole(struct kexec_buf *kbuf)
return ret == 1 ? 0 : -EADDRNOTAVAIL;
 }
 
+/**
+ * arch_kexec_locate_mem_hole - Find free memory to place the segments.
+ * @kbuf:   Parameters for the memory search.
+ *
+ * On success, kbuf->mem will have the start address of the memory region 
found.
+ *
+ * Return: 0 on success, negative errno on error.
+ */
+int __weak arch_kexec_locate_mem_hole(struct kexec_buf *kbuf)
+{
+   return kexec_locate_mem_hole(kbuf);
+}
+
 /**
  * kexec_add_buffer - place a buffer in a kexec segment
  * @kbuf:  Buffer contents and memory parameters.
@@ -647,7 +660,6 @@ int kexec_locate_mem_hole(struct kexec_buf *kbuf)
  */
 int kexec_add_buffer(struct kexec_buf *kbuf)
 {
-
struct kexec_segment *ksegment;
int ret;
 
@@ -675,7 +687,7 @@ int kexec_add_buffer(struct kexec_buf *kbuf)
kbuf->buf_align = max(kbuf->buf_align, PAGE_SIZE);
 
/* Walk the RAM ranges and allocate a suitable range for the buffer */
-   ret = kexec_locate_mem_hole(kbuf);
+   ret = arch_kexec_locate_mem_hole(kbuf);
if (ret)
return ret;
 




[PATCH v6 03/11] powerpc/kexec_file: add helper functions for getting memory ranges

2020-07-29 Thread Hari Bathini
In kexec case, the kernel to be loaded uses the same memory layout as
the running kernel. So, passing on the DT of the running kernel would
be good enough.

But in case of kdump, different memory ranges are needed to manage
loading the kdump kernel, booting into it and exporting the elfcore
of the crashing kernel. The ranges are exclude memory ranges, usable
memory ranges, reserved memory ranges and crash memory ranges.

Exclude memory ranges specify the list of memory ranges to avoid while
loading kdump segments. Usable memory ranges list the memory ranges
that could be used for booting kdump kernel. Reserved memory ranges
list the memory regions for the loading kernel's reserve map. Crash
memory ranges list the memory ranges to be exported as the crashing
kernel's elfcore.

Add helper functions for setting up the above mentioned memory ranges.
This helpers facilitate in understanding the subsequent changes better
and make it easy to setup the different memory ranges listed above, as
and when appropriate.

Signed-off-by: Hari Bathini 
Tested-by: Pingfan Liu 
Reviewed-by: Thiago Jung Bauermann 
---

v5 -> v6:
* Dropped email address from copyright header of the new file being
  added: arch/powerpc/kexec/ranges.c
* Changed mrngs to mem_rngs. Using the convention mem_ranges for
  'struct crash_mem **' types & mem_rngs for 'struct crash_mem *'
  for easy readibility.
* Updated add_opal_mem_range() & add_rtas_mem_range() functions without
  goto statements.
* Moved implementation of all add_foo_mem_range(s)() functions to
  patch 04/11, where they are used.
* Fixed reference count leak in add_tce_mem_ranges() function and also
  updated error handling in reading tce table base & sizes.

v4 -> v5:
* Added Reviewed-by tag from Thiago.
* Added the missing "#ifdef CONFIG_PPC_BOOK3S_64" around add_htab_mem_range()
  function in arch/powerpc/kexec/ranges.c file.
* add_tce_mem_ranges() function returned error when tce table is not found
  in a pci node. This is wrong as pci nodes may not always have tce tables
  (KVM guests, for example). Fixed it by ignoring error in reading tce
  table base/size while returning from the function.

v3 -> v4:
* Updated sort_memory_ranges() function to reuse sort() from lib/sort.c
  and addressed other review comments from Thiago.

v2 -> v3:
* Unchanged. Added Tested-by tag from Pingfan.

v1 -> v2:
* Added an option to merge ranges while sorting to minimize reallocations
  for memory ranges list.
* Dropped within_crashkernel option for add_opal_mem_range() &
  add_rtas_mem_range() as it is not really needed.


 arch/powerpc/include/asm/kexec_ranges.h |   11 +
 arch/powerpc/kexec/Makefile |2 
 arch/powerpc/kexec/ranges.c |  235 +++
 3 files changed, 247 insertions(+), 1 deletion(-)
 create mode 100644 arch/powerpc/include/asm/kexec_ranges.h
 create mode 100644 arch/powerpc/kexec/ranges.c

diff --git a/arch/powerpc/include/asm/kexec_ranges.h 
b/arch/powerpc/include/asm/kexec_ranges.h
new file mode 100644
index ..35ae31a7a4de
--- /dev/null
+++ b/arch/powerpc/include/asm/kexec_ranges.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef _ASM_POWERPC_KEXEC_RANGES_H
+#define _ASM_POWERPC_KEXEC_RANGES_H
+
+#define MEM_RANGE_CHUNK_SZ 2048/* Memory ranges size chunk */
+
+void sort_memory_ranges(struct crash_mem *mrngs, bool merge);
+struct crash_mem *realloc_mem_ranges(struct crash_mem **mem_ranges);
+int add_mem_range(struct crash_mem **mem_ranges, u64 base, u64 size);
+
+#endif /* _ASM_POWERPC_KEXEC_RANGES_H */
diff --git a/arch/powerpc/kexec/Makefile b/arch/powerpc/kexec/Makefile
index 67c355329457..4aff6846c772 100644
--- a/arch/powerpc/kexec/Makefile
+++ b/arch/powerpc/kexec/Makefile
@@ -7,7 +7,7 @@ obj-y   += core.o crash.o core_$(BITS).o
 
 obj-$(CONFIG_PPC32)+= relocate_32.o
 
-obj-$(CONFIG_KEXEC_FILE)   += file_load.o file_load_$(BITS).o elf_$(BITS).o
+obj-$(CONFIG_KEXEC_FILE)   += file_load.o ranges.o file_load_$(BITS).o 
elf_$(BITS).o
 
 ifdef CONFIG_HAVE_IMA_KEXEC
 ifdef CONFIG_IMA
diff --git a/arch/powerpc/kexec/ranges.c b/arch/powerpc/kexec/ranges.c
new file mode 100644
index ..dc3ce036f416
--- /dev/null
+++ b/arch/powerpc/kexec/ranges.c
@@ -0,0 +1,235 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * powerpc code to implement the kexec_file_load syscall
+ *
+ * Copyright (C) 2004  Adam Litke (a...@us.ibm.com)
+ * Copyright (C) 2004  IBM Corp.
+ * Copyright (C) 2004,2005  Milton D Miller II, IBM Corporation
+ * Copyright (C) 2005  R Sharada (shar...@in.ibm.com)
+ * Copyright (C) 2006  Mohan Kumar M (mo...@in.ibm.com)
+ * Copyright (C) 2020  IBM Corporation
+ *
+ * Based on kexec-tools' kexec-ppc64.c, fs2dt.c.
+ * Heavily modified for the kernel by
+ * Hari Bathini, IBM Corporation.
+ */
+
+#define pr_fmt(fmt) "kexec ranges: " fmt
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+ * get_max_nr_r

[PATCH v6 02/11] powerpc/kexec_file: mark PPC64 specific code

2020-07-29 Thread Hari Bathini
Some of the kexec_file_load code isn't PPC64 specific. Move PPC64
specific code from kexec/file_load.c to kexec/file_load_64.c. Also,
rename purgatory/trampoline.S to purgatory/trampoline_64.S in the
same spirit. No functional changes.

Signed-off-by: Hari Bathini 
Tested-by: Pingfan Liu 
Reviewed-by: Laurent Dufour 
Reviewed-by: Thiago Jung Bauermann 
---

v5 -> v6:
* Dropped email address from copyright header of the new file being
  added: arch/powerpc/kexec/file_load_64.c

v4 -> v5:
* Unchanged.

v3 -> v4:
* Moved common code back to set_new_fdt() from setup_new_fdt_ppc64()
  function. Added Reviewed-by tags from Laurent & Thiago.

v2 -> v3:
* Unchanged. Added Tested-by tag from Pingfan.

v1 -> v2:
* No changes.


 arch/powerpc/include/asm/kexec.h   |9 ++
 arch/powerpc/kexec/Makefile|2 -
 arch/powerpc/kexec/elf_64.c|7 +-
 arch/powerpc/kexec/file_load.c |   19 +
 arch/powerpc/kexec/file_load_64.c  |   87 
 arch/powerpc/purgatory/Makefile|4 +
 arch/powerpc/purgatory/trampoline.S|  117 
 arch/powerpc/purgatory/trampoline_64.S |  117 
 8 files changed, 222 insertions(+), 140 deletions(-)
 create mode 100644 arch/powerpc/kexec/file_load_64.c
 delete mode 100644 arch/powerpc/purgatory/trampoline.S
 create mode 100644 arch/powerpc/purgatory/trampoline_64.S

diff --git a/arch/powerpc/include/asm/kexec.h b/arch/powerpc/include/asm/kexec.h
index c68476818753..ac8fd4839171 100644
--- a/arch/powerpc/include/asm/kexec.h
+++ b/arch/powerpc/include/asm/kexec.h
@@ -116,6 +116,15 @@ int setup_new_fdt(const struct kimage *image, void *fdt,
  unsigned long initrd_load_addr, unsigned long initrd_len,
  const char *cmdline);
 int delete_fdt_mem_rsv(void *fdt, unsigned long start, unsigned long size);
+
+#ifdef CONFIG_PPC64
+int setup_purgatory_ppc64(struct kimage *image, const void *slave_code,
+ const void *fdt, unsigned long kernel_load_addr,
+ unsigned long fdt_load_addr);
+int setup_new_fdt_ppc64(const struct kimage *image, void *fdt,
+   unsigned long initrd_load_addr,
+   unsigned long initrd_len, const char *cmdline);
+#endif /* CONFIG_PPC64 */
 #endif /* CONFIG_KEXEC_FILE */
 
 #else /* !CONFIG_KEXEC_CORE */
diff --git a/arch/powerpc/kexec/Makefile b/arch/powerpc/kexec/Makefile
index 86380c69f5ce..67c355329457 100644
--- a/arch/powerpc/kexec/Makefile
+++ b/arch/powerpc/kexec/Makefile
@@ -7,7 +7,7 @@ obj-y   += core.o crash.o core_$(BITS).o
 
 obj-$(CONFIG_PPC32)+= relocate_32.o
 
-obj-$(CONFIG_KEXEC_FILE)   += file_load.o elf_$(BITS).o
+obj-$(CONFIG_KEXEC_FILE)   += file_load.o file_load_$(BITS).o elf_$(BITS).o
 
 ifdef CONFIG_HAVE_IMA_KEXEC
 ifdef CONFIG_IMA
diff --git a/arch/powerpc/kexec/elf_64.c b/arch/powerpc/kexec/elf_64.c
index 3072fd6dbe94..23ad04ccaf8e 100644
--- a/arch/powerpc/kexec/elf_64.c
+++ b/arch/powerpc/kexec/elf_64.c
@@ -88,7 +88,8 @@ static void *elf64_load(struct kimage *image, char 
*kernel_buf,
goto out;
}
 
-   ret = setup_new_fdt(image, fdt, initrd_load_addr, initrd_len, cmdline);
+   ret = setup_new_fdt_ppc64(image, fdt, initrd_load_addr,
+ initrd_len, cmdline);
if (ret)
goto out;
 
@@ -107,8 +108,8 @@ static void *elf64_load(struct kimage *image, char 
*kernel_buf,
pr_debug("Loaded device tree at 0x%lx\n", fdt_load_addr);
 
slave_code = elf_info.buffer + elf_info.proghdrs[0].p_offset;
-   ret = setup_purgatory(image, slave_code, fdt, kernel_load_addr,
- fdt_load_addr);
+   ret = setup_purgatory_ppc64(image, slave_code, fdt, kernel_load_addr,
+   fdt_load_addr);
if (ret)
pr_err("Error setting up the purgatory.\n");
 
diff --git a/arch/powerpc/kexec/file_load.c b/arch/powerpc/kexec/file_load.c
index 143c91724617..38439aba27d7 100644
--- a/arch/powerpc/kexec/file_load.c
+++ b/arch/powerpc/kexec/file_load.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * ppc64 code to implement the kexec_file_load syscall
+ * powerpc code to implement the kexec_file_load syscall
  *
  * Copyright (C) 2004  Adam Litke (a...@us.ibm.com)
  * Copyright (C) 2004  IBM Corp.
@@ -20,22 +20,7 @@
 #include 
 #include 
 
-#define SLAVE_CODE_SIZE256
-
-const struct kexec_file_ops * const kexec_file_loaders[] = {
-   &kexec_elf64_ops,
-   NULL
-};
-
-int arch_kexec_kernel_image_probe(struct kimage *image, void *buf,
- unsigned long buf_len)
-{
-   /* We don't support crash kernels yet. */
-   if (image->type == KEXEC_TYPE_CRASH)
-   return -EOPNOTSUPP;
-
-   return kexec_image_probe_default(image, buf, buf_len);
-}
+

[PATCH v6 05/11] powerpc/drmem: make lmb walk a bit more flexible

2020-07-29 Thread Hari Bathini
Currently, numa & prom are the users of drmem lmb walk code. Loading
kdump with kexec_file also needs to walk the drmem LMBs to setup the
usable memory ranges for kdump kernel. But there are couple of issues
in using the code as is. One, walk_drmem_lmb() code is built into the
.init section currently, while kexec_file needs it later. Two, there
is no scope to pass data to the callback function for processing and/
or erroring out on certain conditions.

Fix that by, moving drmem LMB walk code out of .init section, adding
scope to pass data to the callback function and bailing out when
an error is encountered in the callback function.

Signed-off-by: Hari Bathini 
Tested-by: Pingfan Liu 
Reviewed-by: Thiago Jung Bauermann 
---

v5 -> v6:
* Unchanged.

v4 -> v5:
* Unchanged.

v3 -> v4:
* Unchanged. Added Reviewed-by tag from Thiago.

v2 -> v3:
* Unchanged. Added Tested-by tag from Pingfan.

v1 -> v2:
* No changes.


 arch/powerpc/include/asm/drmem.h |9 ++--
 arch/powerpc/kernel/prom.c   |   13 +++---
 arch/powerpc/mm/drmem.c  |   87 +-
 arch/powerpc/mm/numa.c   |   13 +++---
 4 files changed, 78 insertions(+), 44 deletions(-)

diff --git a/arch/powerpc/include/asm/drmem.h b/arch/powerpc/include/asm/drmem.h
index 414d209f45bb..17ccc6474ab6 100644
--- a/arch/powerpc/include/asm/drmem.h
+++ b/arch/powerpc/include/asm/drmem.h
@@ -90,13 +90,14 @@ static inline bool drmem_lmb_reserved(struct drmem_lmb *lmb)
 }
 
 u64 drmem_lmb_memory_max(void);
-void __init walk_drmem_lmbs(struct device_node *dn,
-   void (*func)(struct drmem_lmb *, const __be32 **));
+int walk_drmem_lmbs(struct device_node *dn, void *data,
+   int (*func)(struct drmem_lmb *, const __be32 **, void *));
 int drmem_update_dt(void);
 
 #ifdef CONFIG_PPC_PSERIES
-void __init walk_drmem_lmbs_early(unsigned long node,
-   void (*func)(struct drmem_lmb *, const __be32 **));
+int __init
+walk_drmem_lmbs_early(unsigned long node, void *data,
+ int (*func)(struct drmem_lmb *, const __be32 **, void *));
 #endif
 
 static inline void invalidate_lmb_associativity_index(struct drmem_lmb *lmb)
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 9cc49f265c86..7df78de378b0 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -468,8 +468,9 @@ static bool validate_mem_limit(u64 base, u64 *size)
  * This contains a list of memory blocks along with NUMA affinity
  * information.
  */
-static void __init early_init_drmem_lmb(struct drmem_lmb *lmb,
-   const __be32 **usm)
+static int  __init early_init_drmem_lmb(struct drmem_lmb *lmb,
+   const __be32 **usm,
+   void *data)
 {
u64 base, size;
int is_kexec_kdump = 0, rngs;
@@ -484,7 +485,7 @@ static void __init early_init_drmem_lmb(struct drmem_lmb 
*lmb,
 */
if ((lmb->flags & DRCONF_MEM_RESERVED) ||
!(lmb->flags & DRCONF_MEM_ASSIGNED))
-   return;
+   return 0;
 
if (*usm)
is_kexec_kdump = 1;
@@ -499,7 +500,7 @@ static void __init early_init_drmem_lmb(struct drmem_lmb 
*lmb,
 */
rngs = dt_mem_next_cell(dt_root_size_cells, usm);
if (!rngs) /* there are no (base, size) duple */
-   return;
+   return 0;
}
 
do {
@@ -524,6 +525,8 @@ static void __init early_init_drmem_lmb(struct drmem_lmb 
*lmb,
if (lmb->flags & DRCONF_MEM_HOTREMOVABLE)
memblock_mark_hotplug(base, size);
} while (--rngs);
+
+   return 0;
 }
 #endif /* CONFIG_PPC_PSERIES */
 
@@ -534,7 +537,7 @@ static int __init early_init_dt_scan_memory_ppc(unsigned 
long node,
 #ifdef CONFIG_PPC_PSERIES
if (depth == 1 &&
strcmp(uname, "ibm,dynamic-reconfiguration-memory") == 0) {
-   walk_drmem_lmbs_early(node, early_init_drmem_lmb);
+   walk_drmem_lmbs_early(node, NULL, early_init_drmem_lmb);
return 0;
}
 #endif
diff --git a/arch/powerpc/mm/drmem.c b/arch/powerpc/mm/drmem.c
index 59327cefbc6a..b2eeea39684c 100644
--- a/arch/powerpc/mm/drmem.c
+++ b/arch/powerpc/mm/drmem.c
@@ -14,6 +14,8 @@
 #include 
 #include 
 
+static int n_root_addr_cells, n_root_size_cells;
+
 static struct drmem_lmb_info __drmem_info;
 struct drmem_lmb_info *drmem_info = &__drmem_info;
 
@@ -189,12 +191,13 @@ int drmem_update_dt(void)
return rc;
 }
 
-static void __init read_drconf_v1_cell(struct drmem_lmb *lmb,
+static void read_drconf_v1_cell(struct drmem_lmb *lmb,
   const __be32 **prop)
 {
const __be32 *p = *prop;
 
-   lmb->base_addr = dt_mem_next_cell(dt_root_addr_cells, &p);
+   lmb->base_addr = of_read_number(p, n_root_addr_cells);
+

[PATCH v6 04/11] ppc64/kexec_file: avoid stomping memory used by special regions

2020-07-29 Thread Hari Bathini
crashkernel region could have an overlap with special memory regions
like  opal, rtas, tce-table & such. These regions are referred to as
exclude memory ranges. Setup this ranges during image probe in order
to avoid them while finding the buffer for different kdump segments.
Override arch_kexec_locate_mem_hole() to locate a memory hole taking
these ranges into account.

Signed-off-by: Hari Bathini 
Reviewed-by: Thiago Jung Bauermann 
---

v5 -> v6:
* Implemented all the add_foo_mem_ranges() functions that get used while
  setting up exclude memory ranges.

v4 -> v5:
* Unchanged. Added Reviewed-by tag from Thiago.

v3 -> v4:
* Dropped KDUMP_BUF_MIN & KDUMP_BUF_MAX macros and fixed off-by-one error
  in arch_locate_mem_hole() helper routines.

v2 -> v3:
* If there are no exclude ranges, the right thing to do is fallbacking
  back to default kexec_locate_mem_hole() implementation instead of
  returning 0. Fixed that.

v1 -> v2:
* Did arch_kexec_locate_mem_hole() override to handle special regions.
* Ensured holes in the memory are accounted for while locating mem hole.
* Updated add_rtas_mem_range() & add_opal_mem_range() callsites based on
  the new prototype for these functions.


 arch/powerpc/include/asm/kexec.h|7 -
 arch/powerpc/include/asm/kexec_ranges.h |   14 +
 arch/powerpc/kexec/elf_64.c |8 +
 arch/powerpc/kexec/file_load_64.c   |  337 +++
 arch/powerpc/kexec/ranges.c |  177 
 5 files changed, 539 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/include/asm/kexec.h b/arch/powerpc/include/asm/kexec.h
index ac8fd4839171..835dc92e091c 100644
--- a/arch/powerpc/include/asm/kexec.h
+++ b/arch/powerpc/include/asm/kexec.h
@@ -100,14 +100,16 @@ void relocate_new_kernel(unsigned long indirection_page, 
unsigned long reboot_co
 #ifdef CONFIG_KEXEC_FILE
 extern const struct kexec_file_ops kexec_elf64_ops;
 
-#ifdef CONFIG_IMA_KEXEC
 #define ARCH_HAS_KIMAGE_ARCH
 
 struct kimage_arch {
+   struct crash_mem *exclude_ranges;
+
+#ifdef CONFIG_IMA_KEXEC
phys_addr_t ima_buffer_addr;
size_t ima_buffer_size;
-};
 #endif
+};
 
 int setup_purgatory(struct kimage *image, const void *slave_code,
const void *fdt, unsigned long kernel_load_addr,
@@ -125,6 +127,7 @@ int setup_new_fdt_ppc64(const struct kimage *image, void 
*fdt,
unsigned long initrd_load_addr,
unsigned long initrd_len, const char *cmdline);
 #endif /* CONFIG_PPC64 */
+
 #endif /* CONFIG_KEXEC_FILE */
 
 #else /* !CONFIG_KEXEC_CORE */
diff --git a/arch/powerpc/include/asm/kexec_ranges.h 
b/arch/powerpc/include/asm/kexec_ranges.h
index 35ae31a7a4de..7a9f8d15 100644
--- a/arch/powerpc/include/asm/kexec_ranges.h
+++ b/arch/powerpc/include/asm/kexec_ranges.h
@@ -7,5 +7,19 @@
 void sort_memory_ranges(struct crash_mem *mrngs, bool merge);
 struct crash_mem *realloc_mem_ranges(struct crash_mem **mem_ranges);
 int add_mem_range(struct crash_mem **mem_ranges, u64 base, u64 size);
+int add_tce_mem_ranges(struct crash_mem **mem_ranges);
+int add_initrd_mem_range(struct crash_mem **mem_ranges);
+#ifdef CONFIG_PPC_BOOK3S_64
+int add_htab_mem_range(struct crash_mem **mem_ranges);
+#else
+static inline int add_htab_mem_range(struct crash_mem **mem_ranges)
+{
+   return 0;
+}
+#endif
+int add_kernel_mem_range(struct crash_mem **mem_ranges);
+int add_rtas_mem_range(struct crash_mem **mem_ranges);
+int add_opal_mem_range(struct crash_mem **mem_ranges);
+int add_reserved_mem_ranges(struct crash_mem **mem_ranges);
 
 #endif /* _ASM_POWERPC_KEXEC_RANGES_H */
diff --git a/arch/powerpc/kexec/elf_64.c b/arch/powerpc/kexec/elf_64.c
index 23ad04ccaf8e..64c15a5a280b 100644
--- a/arch/powerpc/kexec/elf_64.c
+++ b/arch/powerpc/kexec/elf_64.c
@@ -46,6 +46,14 @@ static void *elf64_load(struct kimage *image, char 
*kernel_buf,
if (ret)
goto out;
 
+   if (image->type == KEXEC_TYPE_CRASH) {
+   /* min & max buffer values for kdump case */
+   kbuf.buf_min = pbuf.buf_min = crashk_res.start;
+   kbuf.buf_max = pbuf.buf_max =
+   ((crashk_res.end < ppc64_rma_size) ?
+crashk_res.end : (ppc64_rma_size - 1));
+   }
+
ret = kexec_elf_load(image, &ehdr, &elf_info, &kbuf, &kernel_load_addr);
if (ret)
goto out;
diff --git a/arch/powerpc/kexec/file_load_64.c 
b/arch/powerpc/kexec/file_load_64.c
index 3e9ac5f216b0..d09c7724efa8 100644
--- a/arch/powerpc/kexec/file_load_64.c
+++ b/arch/powerpc/kexec/file_load_64.c
@@ -17,12 +17,262 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 const struct kexec_file_ops * const kexec_file_loaders[] = {
&kexec_elf64_ops,
NULL
 };
 
+/**
+ * get_exclude_memory_ranges - Get exclude memory ranges. This list includes
+ * regions like opal/rtas, tce-table, initrd,
+ * 

[PATCH V13] printk: Add monotonic, boottime, and realtime timestamps

2020-07-29 Thread Chunyan Zhang
From: Prarit Bhargava 

printk.time=1/CONFIG_PRINTK_TIME=1 adds a unmodified local hardware clock
timestamp to printk messages.  The local hardware clock loses time each
day making it difficult to determine exactly when an issue has occurred in
the kernel log, and making it difficult to determine how kernel and
hardware issues relate to each other in real time.

Make printk output different timestamps by adding options for no
timestamp, the local hardware clock, the monotonic clock, the boottime
clock, and the real clock.  Allow a user to pick one of the clocks by
using the printk.time kernel parameter.  Output the type of clock in
/sys/module/printk/parameters/time so userspace programs can interpret the
timestamp.

v2: Use peterz's suggested Kconfig options.  Merge patchset together.
Fix i386 !CONFIG_PRINTK builds.

v3: Fixed x86_64_defconfig. Added printk_time_type enum and
printk_time_str for better output. Added BOOTTIME clock functionality.

v4: Fix messages, add additional printk.time options, and fix configs.

v5: Renaming of structures, and allow printk_time_set() to
evaluate substrings of entries (eg: allow 'r', 'real', 'realtime').  From
peterz, make fast functions return 0 until timekeeping is initialized
(removes timekeeping_active & ktime_get_boot|real_log_ts() suggested by
 tglx and adds ktime_get_real_offset()).  Switch to a function pointer
for printk_get_ts() and reference fast functions.  Make timestamp_sources enum
match choice options for CONFIG_PRINTK_TIME (adds PRINTK_TIME_UNDEFINED).

v6: Define PRINTK_TIME_UNDEFINED for !CONFIG_PRINTK builds.  Separate
timekeeping changes into separate patch.  Minor include file cleanup.

v7: Add default case to printk_set_timestamp() and add PRINTK_TIME_DEBUG
for users that want to set timestamp to different values during runtime.
Add jstultz' Kconfig to avoid defconfig churn.

v8: Add CONFIG_PRINTK_TIME_DEBUG to allow timestamp runtime switching.
Rename PRINTK_TIME_DISABLE to PRINTK_TIME_DISABLED.  Rename
printk_set_timestamp() to printk_set_ts_func().  Separate
printk_set_ts_func() and printk_get_first_ts() portions.  Rename param
functions.  Adjust configs, enum, and timestamp_sources_str to be 0-4.
Add mention realtime clock is UTC in Documentation.

v9: Fix typo.  Add __ktime_get_real_fast_ns_unsafe().

v10: Remove time parameter restrictions.

v11: Rework using tglx's real time patch

v12: Reword Kconfig names.  Simplify timestamp logic and remove
recursive code.

v13: This patch seems have being forgotten for 3 years. Rebase it on
the latest kernel v5.8, reolve conflicts and fix compiling errors.
Change code to adapt new printk_time usage.
Petr's concern on printk_time is addressed by current version of kernel, too.

Signed-off-by: Prarit Bhargava 
Cc: Mark Salyzyn 
Cc: Jonathan Corbet 
Cc: Petr Mladek 
Cc: Sergey Senozhatsky 
Cc: Steven Rostedt 
Cc: John Stultz 
Cc: Thomas Gleixner 
Cc: Stephen Boyd 
Cc: Andrew Morton 
Cc: Greg Kroah-Hartman 
Cc: "Paul E. McKenney" 
Cc: Christoffer Dall 
Cc: Deepa Dinamani 
Cc: Ingo Molnar 
Cc: Joel Fernandes 
Cc: Prarit Bhargava 
Cc: Kees Cook 
Cc: Peter Zijlstra 
Cc: Geert Uytterhoeven 
Cc: "Luis R. Rodriguez" 
Cc: Nicholas Piggin 
Cc: "Jason A. Donenfeld" 
Cc: Olof Johansson 
Cc: Josh Poimboeuf 
Cc: linux-...@vger.kernel.org
[jstultz: reworked Kconfig settings to avoid defconfig noise]
Signed-off-by: John Stultz 
Reviewed-by: Petr Mladek 
[orson: rebase on v5.8 and make necessary changes]
Signed-off-by: Orson Zhai 
---
 Documentation/admin-guide/kernel-parameters.txt |   6 +-
 kernel/printk/printk.c  | 127 +++-
 lib/Kconfig.debug   |  48 -
 3 files changed, 174 insertions(+), 7 deletions(-)

diff --git a/Documentation/admin-guide/kernel-parameters.txt 
b/Documentation/admin-guide/kernel-parameters.txt
index fb95fad..0bf5f69 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -3874,8 +3874,10 @@
ratelimit - ratelimit the logging
Default: ratelimit
 
-   printk.time=Show timing data prefixed to each printk message line
-   Format:   (1/Y/y=enable, 0/N/n=disable)
+   printk.time=Show timestamp prefixed to each printk message line
+   Format: 
+   (0/N/n/disable, 1/Y/y/local,
+b/boot, m/monotonic, r/realtime (in UTC))
 
processor.max_cstate=   [HW,ACPI]
Limit processor to maximum C-state
diff --git a/kernel/printk/printk.c b/kernel/printk/printk.c
index b71eaf5..ba35f89 100644
--- a/kernel/printk/printk.c
+++ b/kernel/printk/printk.c
@@ -612,6 +612,9 @@ static u32 truncate_msg(u16 *text_len, u16 *trunc_msg_len,
return msg_used_size(*text_len + *trunc_msg_len, 0, pad_len);
 }
 
+static u64 printk_get_first_ts(void);
+static u64 (*printk_get_ts)(void) = printk_get_f

Re: [PATCH 05/15] h8300, nds32, openrisc: simplify detection of memory extents

2020-07-29 Thread Stafford Horne
On Tue, Jul 28, 2020 at 08:11:43AM +0300, Mike Rapoport wrote:
> From: Mike Rapoport 
> 
> Instead of traversing memblock.memory regions to find memory_start and
> memory_end, simply query memblock_{start,end}_of_DRAM().
> 
> Signed-off-by: Mike Rapoport 
> ---
>  arch/h8300/kernel/setup.c| 8 +++-
>  arch/nds32/kernel/setup.c| 8 ++--
>  arch/openrisc/kernel/setup.c | 9 ++---
>  3 files changed, 7 insertions(+), 18 deletions(-)

Hi Mike,

For the openrisc part:

Acked-by: Stafford Horne 

> --- a/arch/openrisc/kernel/setup.c
> +++ b/arch/openrisc/kernel/setup.c
> @@ -48,17 +48,12 @@ static void __init setup_memory(void)
>   unsigned long ram_start_pfn;
>   unsigned long ram_end_pfn;
>   phys_addr_t memory_start, memory_end;
> - struct memblock_region *region;
>  
>   memory_end = memory_start = 0;
>  
>   /* Find main memory where is the kernel, we assume its the only one */
> - for_each_memblock(memory, region) {
> - memory_start = region->base;
> - memory_end = region->base + region->size;
> - printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__,
> -memory_start, memory_end);
> - }
> + memory_start = memblock_start_of_DRAM();
> + memory_end = memblock_end_of_DRAM();
>  
>   if (!memory_end) {
>   panic("No memory!");
> -- 
> 2.26.2
> 


[PATCH v6 07/11] ppc64/kexec_file: setup backup region for kdump kernel

2020-07-29 Thread Hari Bathini
Though kdump kernel boots from loaded address, the first 64KB of it is
copied down to real 0. So, setup a backup region and let purgatory
copy the first 64KB of crashed kernel into this backup region before
booting into kdump kernel. Update reserve map with backup region and
crashed kernel's memory to avoid kdump kernel from accidentially using
that memory.

Signed-off-by: Hari Bathini 
Reviewed-by: Thiago Jung Bauermann 
---

v5 -> v6:
* Added Reviewed-by tag from Thiago.
* The comment explaining why a source buffer is needed for backup segment
  is moved to appropriate place.
* Used the special branching instruction mpe suggested instead of "bl 0f"
* Added local labels & space between arguments in assembler code.

v4 -> v5:
* Did not add Reviewed-by tag from Thiago yet as he might want to reconsider
  it with the changes in this patch.
* Wrote backup region copy code in assembler. Also, dropped the patch that
  applies RELA relocations & the patch that sets up stack as they are no
  longer needed.
* For correctness, updated fdt_add_mem_rsv() to take "BACKUP_SRC_END + 1"
  as start address instead of BACKUP_SRC_SIZE.

v3 -> v4:
* Moved fdt_add_mem_rsv() for backup region under kdump flag, on Thiago's
  suggestion, as it is only relevant for kdump.

v2 -> v3:
* Dropped check for backup_start in trampoline_64.S as purgatory() takes
  care of it anyway.

v1 -> v2:
* Check if backup region is available before branching out. This is
  to keep `kexec -l -s` flow as before as much as possible. This would
  eventually change with more testing and addition of sha256 digest
  verification support.
* Fixed missing prototype for purgatory() as reported by lkp.
  lkp report for reference:
- https://lore.kernel.org/patchwork/patch/1264423/


 arch/powerpc/include/asm/crashdump-ppc64.h |   19 ++
 arch/powerpc/include/asm/kexec.h   |7 ++
 arch/powerpc/kexec/elf_64.c|9 +++
 arch/powerpc/kexec/file_load_64.c  |   93 +++-
 arch/powerpc/purgatory/trampoline_64.S |   38 ++-
 5 files changed, 159 insertions(+), 7 deletions(-)
 create mode 100644 arch/powerpc/include/asm/crashdump-ppc64.h

diff --git a/arch/powerpc/include/asm/crashdump-ppc64.h 
b/arch/powerpc/include/asm/crashdump-ppc64.h
new file mode 100644
index ..68d9717cc5ee
--- /dev/null
+++ b/arch/powerpc/include/asm/crashdump-ppc64.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef _ASM_POWERPC_CRASHDUMP_PPC64_H
+#define _ASM_POWERPC_CRASHDUMP_PPC64_H
+
+/*
+ * Backup region - first 64KB of System RAM
+ *
+ * If ever the below macros are to be changed, please be judicious.
+ * The implicit assumptions are:
+ * - start, end & size are less than UINT32_MAX.
+ * - start & size are at least 8 byte aligned.
+ *
+ * For implementation details: arch/powerpc/purgatory/trampoline_64.S
+ */
+#define BACKUP_SRC_START   0
+#define BACKUP_SRC_END 0x
+#define BACKUP_SRC_SIZE(BACKUP_SRC_END - BACKUP_SRC_START + 1)
+
+#endif /* __ASM_POWERPC_CRASHDUMP_PPC64_H */
diff --git a/arch/powerpc/include/asm/kexec.h b/arch/powerpc/include/asm/kexec.h
index 835dc92e091c..f9514ebeffaa 100644
--- a/arch/powerpc/include/asm/kexec.h
+++ b/arch/powerpc/include/asm/kexec.h
@@ -105,6 +105,9 @@ extern const struct kexec_file_ops kexec_elf64_ops;
 struct kimage_arch {
struct crash_mem *exclude_ranges;
 
+   unsigned long backup_start;
+   void *backup_buf;
+
 #ifdef CONFIG_IMA_KEXEC
phys_addr_t ima_buffer_addr;
size_t ima_buffer_size;
@@ -120,6 +123,10 @@ int setup_new_fdt(const struct kimage *image, void *fdt,
 int delete_fdt_mem_rsv(void *fdt, unsigned long start, unsigned long size);
 
 #ifdef CONFIG_PPC64
+struct kexec_buf;
+
+int load_crashdump_segments_ppc64(struct kimage *image,
+ struct kexec_buf *kbuf);
 int setup_purgatory_ppc64(struct kimage *image, const void *slave_code,
  const void *fdt, unsigned long kernel_load_addr,
  unsigned long fdt_load_addr);
diff --git a/arch/powerpc/kexec/elf_64.c b/arch/powerpc/kexec/elf_64.c
index 64c15a5a280b..76e2fc7e6dc3 100644
--- a/arch/powerpc/kexec/elf_64.c
+++ b/arch/powerpc/kexec/elf_64.c
@@ -68,6 +68,15 @@ static void *elf64_load(struct kimage *image, char 
*kernel_buf,
 
pr_debug("Loaded purgatory at 0x%lx\n", pbuf.mem);
 
+   /* Load additional segments needed for panic kernel */
+   if (image->type == KEXEC_TYPE_CRASH) {
+   ret = load_crashdump_segments_ppc64(image, &kbuf);
+   if (ret) {
+   pr_err("Failed to load kdump kernel segments\n");
+   goto out;
+   }
+   }
+
if (initrd != NULL) {
kbuf.buffer = initrd;
kbuf.bufsz = kbuf.memsz = initrd_len;
diff --git a/arch/powerpc/kexec/file_load_64.c 
b/arch/powerpc/kexec/file_load_64.c
index f946608747

[PATCH v6 06/11] ppc64/kexec_file: restrict memory usage of kdump kernel

2020-07-29 Thread Hari Bathini
Kdump kernel, used for capturing the kernel core image, is supposed
to use only specific memory regions to avoid corrupting the image to
be captured. The regions are crashkernel range - the memory reserved
explicitly for kdump kernel, memory used for the tce-table, the OPAL
region and RTAS region as applicable. Restrict kdump kernel memory
to use only these regions by setting up usable-memory DT property.
Also, tell the kdump kernel to run at the loaded address by setting
the magic word at 0x5c.

Signed-off-by: Hari Bathini 
Tested-by: Pingfan Liu 
Reviewed-by: Thiago Jung Bauermann 
---

v5 -> v6:
* Added Reviewed-by tag from Thiago.
* Avoided pass by reference count parameter in add_usable_mem() function
  by calculating the range count added from index value before & after it.
* Instead of trying to reinvent the wheel with get_node_path() &
  get_node_path_size() functions, used %pOF format as suggested by mpe.
* Used kernel types instead of uint32_t/uint64_t.
* and Dropped 'struct crash_mem *' member & added 'struct crash_mem_range *',
  nr_ranges & max_entries fields to 'struct umem_info' to avoid bit of
  a clutter in check_realloc_usable_mem() & add_usable_mem() functions.
* Updated the comment as to why 0 till crashk_res.start was needed to be
  added to usable memory ranges. Note that kexec-tools also has been
  doing the same thing.

v4 -> v5:
* Renamed get_node_pathlen() function to get_node_path_size() and
  handled root node separately to avoid off-by-one error in
  calculating string size.
* Updated get_node_path() in line with change in get_node_path_size().

v3 -> v4:
* Updated get_node_path() to be an iterative function instead of a
  recursive one.
* Added comment explaining why low memory is added to kdump kernel's
  usable memory ranges though it doesn't fall in crashkernel region.
* For correctness, added fdt_add_mem_rsv() for the low memory being
  added to kdump kernel's usable memory ranges.
* Fixed prop pointer update in add_usable_mem_property() and changed
  duple to tuple as suggested by Thiago.

v2 -> v3:
* Unchanged. Added Tested-by tag from Pingfan.

v1 -> v2:
* Fixed off-by-one error while setting up usable-memory properties.
* Updated add_rtas_mem_range() & add_opal_mem_range() callsites based on
  the new prototype for these functions.


 arch/powerpc/kexec/file_load_64.c |  386 +
 1 file changed, 385 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/kexec/file_load_64.c 
b/arch/powerpc/kexec/file_load_64.c
index d09c7724efa8..f94660874765 100644
--- a/arch/powerpc/kexec/file_load_64.c
+++ b/arch/powerpc/kexec/file_load_64.c
@@ -17,9 +17,23 @@
 #include 
 #include 
 #include 
+#include 
 #include 
+#include 
+#include 
 #include 
 
+struct umem_info {
+   u64 *buf;   /* data buffer for usable-memory property */
+   u32 size;   /* size allocated for the data buffer */
+   u32 max_entries;/* maximum no. of entries */
+   u32 idx;/* index of current entry */
+
+   /* usable memory ranges to look up */
+   unsigned int nr_ranges;
+   const struct crash_mem_range *ranges;
+};
+
 const struct kexec_file_ops * const kexec_file_loaders[] = {
&kexec_elf64_ops,
NULL
@@ -74,6 +88,44 @@ static int get_exclude_memory_ranges(struct crash_mem 
**mem_ranges)
return ret;
 }
 
+/**
+ * get_usable_memory_ranges - Get usable memory ranges. This list includes
+ *regions like crashkernel, opal/rtas & tce-table,
+ *that kdump kernel could use.
+ * @mem_ranges:   Range list to add the memory ranges to.
+ *
+ * Returns 0 on success, negative errno on error.
+ */
+static int get_usable_memory_ranges(struct crash_mem **mem_ranges)
+{
+   int ret;
+
+   /*
+* Early boot failure observed on guests when low memory (first memory
+* block?) is not added to usable memory. So, add [0, crashk_res.end]
+* instead of [crashk_res.start, crashk_res.end] to workaround it.
+* Also, crashed kernel's memory must be added to reserve map to
+* avoid kdump kernel from using it.
+*/
+   ret = add_mem_range(mem_ranges, 0, crashk_res.end + 1);
+   if (ret)
+   goto out;
+
+   ret = add_rtas_mem_range(mem_ranges);
+   if (ret)
+   goto out;
+
+   ret = add_opal_mem_range(mem_ranges);
+   if (ret)
+   goto out;
+
+   ret = add_tce_mem_ranges(mem_ranges);
+out:
+   if (ret)
+   pr_err("Failed to setup usable memory ranges\n");
+   return ret;
+}
+
 /**
  * __locate_mem_hole_top_down - Looks top down for a large enough memory hole
  *  in the memory regions between buf_min & buf_max
@@ -273,6 +325,286 @@ static int locate_mem_hole_bottom_up_ppc64(struct 
kexec_buf *kbuf,
return ret;
 }
 
+/**
+ * check_realloc_usable_mem - Reallocate buffer if it

[PATCH v6 08/11] ppc64/kexec_file: prepare elfcore header for crashing kernel

2020-07-29 Thread Hari Bathini
Prepare elf headers for the crashing kernel's core file using
crash_prepare_elf64_headers() and pass on this info to kdump
kernel by updating its command line with elfcorehdr parameter.
Also, add elfcorehdr location to reserve map to avoid it from
being stomped on while booting.

Signed-off-by: Hari Bathini 
Tested-by: Pingfan Liu 
Reviewed-by: Thiago Jung Bauermann 
---

v5 -> v6:
* Unchanged.

v4 -> v5:
* Unchanged. Added Reviewed-by tag from Thiago.

v3 -> v4:
* Added a FIXME tag to indicate issue in adding opal/rtas regions to
  core image.
* Folded prepare_elf_headers() function into load_elfcorehdr_segment().

v2 -> v3:
* Unchanged. Added Tested-by tag from Pingfan.

v1 -> v2:
* Tried merging adjacent memory ranges on hitting maximum ranges limit
  to reduce reallocations for memory ranges and also, minimize PT_LOAD
  segments for elfcore.
* Updated add_rtas_mem_range() & add_opal_mem_range() callsites based on
  the new prototype for these functions.


 arch/powerpc/include/asm/kexec.h  |6 +
 arch/powerpc/kexec/elf_64.c   |   12 +++
 arch/powerpc/kexec/file_load.c|   49 +++
 arch/powerpc/kexec/file_load_64.c |  165 +
 4 files changed, 232 insertions(+)

diff --git a/arch/powerpc/include/asm/kexec.h b/arch/powerpc/include/asm/kexec.h
index f9514ebeffaa..fe885bc3127e 100644
--- a/arch/powerpc/include/asm/kexec.h
+++ b/arch/powerpc/include/asm/kexec.h
@@ -108,12 +108,18 @@ struct kimage_arch {
unsigned long backup_start;
void *backup_buf;
 
+   unsigned long elfcorehdr_addr;
+   unsigned long elf_headers_sz;
+   void *elf_headers;
+
 #ifdef CONFIG_IMA_KEXEC
phys_addr_t ima_buffer_addr;
size_t ima_buffer_size;
 #endif
 };
 
+char *setup_kdump_cmdline(struct kimage *image, char *cmdline,
+ unsigned long cmdline_len);
 int setup_purgatory(struct kimage *image, const void *slave_code,
const void *fdt, unsigned long kernel_load_addr,
unsigned long fdt_load_addr);
diff --git a/arch/powerpc/kexec/elf_64.c b/arch/powerpc/kexec/elf_64.c
index 76e2fc7e6dc3..d0e459bb2f05 100644
--- a/arch/powerpc/kexec/elf_64.c
+++ b/arch/powerpc/kexec/elf_64.c
@@ -35,6 +35,7 @@ static void *elf64_load(struct kimage *image, char 
*kernel_buf,
void *fdt;
const void *slave_code;
struct elfhdr ehdr;
+   char *modified_cmdline = NULL;
struct kexec_elf_info elf_info;
struct kexec_buf kbuf = { .image = image, .buf_min = 0,
  .buf_max = ppc64_rma_size };
@@ -75,6 +76,16 @@ static void *elf64_load(struct kimage *image, char 
*kernel_buf,
pr_err("Failed to load kdump kernel segments\n");
goto out;
}
+
+   /* Setup cmdline for kdump kernel case */
+   modified_cmdline = setup_kdump_cmdline(image, cmdline,
+  cmdline_len);
+   if (!modified_cmdline) {
+   pr_err("Setting up cmdline for kdump kernel failed\n");
+   ret = -EINVAL;
+   goto out;
+   }
+   cmdline = modified_cmdline;
}
 
if (initrd != NULL) {
@@ -131,6 +142,7 @@ static void *elf64_load(struct kimage *image, char 
*kernel_buf,
pr_err("Error setting up the purgatory.\n");
 
 out:
+   kfree(modified_cmdline);
kexec_free_elf_info(&elf_info);
 
/* Make kimage_file_post_load_cleanup free the fdt buffer for us. */
diff --git a/arch/powerpc/kexec/file_load.c b/arch/powerpc/kexec/file_load.c
index 38439aba27d7..d52c09729edd 100644
--- a/arch/powerpc/kexec/file_load.c
+++ b/arch/powerpc/kexec/file_load.c
@@ -18,10 +18,45 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #define SLAVE_CODE_SIZE256 /* First 0x100 bytes */
 
+/**
+ * setup_kdump_cmdline - Prepend "elfcorehdr= " to command line
+ *   of kdump kernel for exporting the core.
+ * @image:   Kexec image
+ * @cmdline: Command line parameters to update.
+ * @cmdline_len: Length of the cmdline parameters.
+ *
+ * kdump segment must be setup before calling this function.
+ *
+ * Returns new cmdline buffer for kdump kernel on success, NULL otherwise.
+ */
+char *setup_kdump_cmdline(struct kimage *image, char *cmdline,
+ unsigned long cmdline_len)
+{
+   int elfcorehdr_strlen;
+   char *cmdline_ptr;
+
+   cmdline_ptr = kzalloc(COMMAND_LINE_SIZE, GFP_KERNEL);
+   if (!cmdline_ptr)
+   return NULL;
+
+   elfcorehdr_strlen = sprintf(cmdline_ptr, "elfcorehdr=0x%lx ",
+   image->arch.elfcorehdr_addr);
+
+   if (elfcorehdr_strlen + cmdline_len > COMMAND_LINE_SIZE) {
+   pr_err("Appending elfcorehdr= exceeds cmdline size\n");
+  

[PATCH v6 10/11] ppc64/kexec_file: fix kexec load failure with lack of memory hole

2020-07-29 Thread Hari Bathini
The kexec purgatory has to run in real mode. Only the first memory
block maybe accessible in real mode. And, unlike the case with panic
kernel, no memory is set aside for regular kexec load. Another thing
to note is, the memory for crashkernel is reserved at an offset of
128MB. So, when crashkernel memory is reserved, the memory ranges to
load kexec segments shrink further as the generic code only looks for
memblock free memory ranges and in all likelihood only a tiny bit of
memory from 0 to 128MB would be available to load kexec segments.

With kdump being used by default in general, kexec file load is likely
to fail almost always. This can be fixed by changing the memory hole
lookup logic for regular kexec to use the same method as kdump. This
would mean that most kexec segments will overlap with crashkernel
memory region. That should still be ok as the pages, whose destination
address isn't available while loading, are placed in an intermediate
location till a flush to the actual destination address happens during
kexec boot sequence.

Signed-off-by: Hari Bathini 
Tested-by: Pingfan Liu 
Reviewed-by: Thiago Jung Bauermann 
---

v5 -> v6:
* Unchanged.

v4 -> v5:
* Unchanged.

v3 -> v4:
* Unchanged. Added Reviewed-by tag from Thiago.

v2 -> v3:
* Unchanged. Added Tested-by tag from Pingfan.

v1 -> v2:
* New patch to fix locating memory hole for kexec_file_load (kexec -s -l)
  when memory is reserved for crashkernel.


 arch/powerpc/kexec/file_load_64.c |   33 ++---
 1 file changed, 14 insertions(+), 19 deletions(-)

diff --git a/arch/powerpc/kexec/file_load_64.c 
b/arch/powerpc/kexec/file_load_64.c
index f13c5b8399e1..c6a37ad5a0a4 100644
--- a/arch/powerpc/kexec/file_load_64.c
+++ b/arch/powerpc/kexec/file_load_64.c
@@ -1012,13 +1012,6 @@ int arch_kexec_locate_mem_hole(struct kexec_buf *kbuf)
u64 buf_min, buf_max;
int ret;
 
-   /*
-* Use the generic kexec_locate_mem_hole for regular
-* kexec_file_load syscall
-*/
-   if (kbuf->image->type != KEXEC_TYPE_CRASH)
-   return kexec_locate_mem_hole(kbuf);
-
/* Look up the exclude ranges list while locating the memory hole */
emem = &(kbuf->image->arch.exclude_ranges);
if (!(*emem) || ((*emem)->nr_ranges == 0)) {
@@ -1026,11 +1019,15 @@ int arch_kexec_locate_mem_hole(struct kexec_buf *kbuf)
return kexec_locate_mem_hole(kbuf);
}
 
+   buf_min = kbuf->buf_min;
+   buf_max = kbuf->buf_max;
/* Segments for kdump kernel should be within crashkernel region */
-   buf_min = (kbuf->buf_min < crashk_res.start ?
-  crashk_res.start : kbuf->buf_min);
-   buf_max = (kbuf->buf_max > crashk_res.end ?
-  crashk_res.end : kbuf->buf_max);
+   if (kbuf->image->type == KEXEC_TYPE_CRASH) {
+   buf_min = (buf_min < crashk_res.start ?
+  crashk_res.start : buf_min);
+   buf_max = (buf_max > crashk_res.end ?
+  crashk_res.end : buf_max);
+   }
 
if (buf_min > buf_max) {
pr_err("Invalid buffer min and/or max values\n");
@@ -1067,15 +1064,13 @@ int arch_kexec_locate_mem_hole(struct kexec_buf *kbuf)
 int arch_kexec_kernel_image_probe(struct kimage *image, void *buf,
  unsigned long buf_len)
 {
-   if (image->type == KEXEC_TYPE_CRASH) {
-   int ret;
+   int ret;
 
-   /* Get exclude memory ranges needed for setting up kdump 
segments */
-   ret = get_exclude_memory_ranges(&(image->arch.exclude_ranges));
-   if (ret) {
-   pr_err("Failed to setup exclude memory ranges for 
buffer lookup\n");
-   return ret;
-   }
+   /* Get exclude memory ranges needed for setting up kexec segments */
+   ret = get_exclude_memory_ranges(&(image->arch.exclude_ranges));
+   if (ret) {
+   pr_err("Failed to setup exclude memory ranges for buffer 
lookup\n");
+   return ret;
}
 
return kexec_image_probe_default(image, buf, buf_len);




[PATCH v6 09/11] ppc64/kexec_file: add appropriate regions for memory reserve map

2020-07-29 Thread Hari Bathini
While initrd, elfcorehdr and backup regions are already added to the
reserve map, there are a few missing regions that need to be added to
the memory reserve map. Add them here. And now that all the changes
to load panic kernel are in place, claim likewise.

Signed-off-by: Hari Bathini 
Tested-by: Pingfan Liu 
Reviewed-by: Thiago Jung Bauermann 
---

v5 -> v6:
* Unchanged.

v4 -> v5:
* Unchanged.

v3 -> v4:
* Fixed a spellcheck and added Reviewed-by tag from Thiago.

v2 -> v3:
* Unchanged. Added Tested-by tag from Pingfan.

v1 -> v2:
* Updated add_rtas_mem_range() & add_opal_mem_range() callsites based on
  the new prototype for these functions.


 arch/powerpc/kexec/file_load_64.c |   58 ++---
 1 file changed, 53 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/kexec/file_load_64.c 
b/arch/powerpc/kexec/file_load_64.c
index 0d280d097cd6..f13c5b8399e1 100644
--- a/arch/powerpc/kexec/file_load_64.c
+++ b/arch/powerpc/kexec/file_load_64.c
@@ -205,6 +205,34 @@ static int get_crash_memory_ranges(struct crash_mem 
**mem_ranges)
return ret;
 }
 
+/**
+ * get_reserved_memory_ranges - Get reserve memory ranges. This list includes
+ *  memory regions that should be added to the
+ *  memory reserve map to ensure the region is
+ *  protected from any mischief.
+ * @mem_ranges: Range list to add the memory ranges to.
+ *
+ * Returns 0 on success, negative errno on error.
+ */
+static int get_reserved_memory_ranges(struct crash_mem **mem_ranges)
+{
+   int ret;
+
+   ret = add_rtas_mem_range(mem_ranges);
+   if (ret)
+   goto out;
+
+   ret = add_tce_mem_ranges(mem_ranges);
+   if (ret)
+   goto out;
+
+   ret = add_reserved_mem_ranges(mem_ranges);
+out:
+   if (ret)
+   pr_err("Failed to setup reserved memory ranges\n");
+   return ret;
+}
+
 /**
  * __locate_mem_hole_top_down - Looks top down for a large enough memory hole
  *  in the memory regions between buf_min & buf_max
@@ -897,8 +925,8 @@ int setup_new_fdt_ppc64(const struct kimage *image, void 
*fdt,
unsigned long initrd_load_addr,
unsigned long initrd_len, const char *cmdline)
 {
-   struct crash_mem *umem = NULL;
-   int ret;
+   struct crash_mem *umem = NULL, *rmem = NULL;
+   int i, nr_ranges, ret;
 
ret = setup_new_fdt(image, fdt, initrd_load_addr, initrd_len, cmdline);
if (ret)
@@ -941,7 +969,27 @@ int setup_new_fdt_ppc64(const struct kimage *image, void 
*fdt,
}
}
 
+   /* Update memory reserve map */
+   ret = get_reserved_memory_ranges(&rmem);
+   if (ret)
+   goto out;
+
+   nr_ranges = rmem ? rmem->nr_ranges : 0;
+   for (i = 0; i < nr_ranges; i++) {
+   u64 base, size;
+
+   base = rmem->ranges[i].start;
+   size = rmem->ranges[i].end - base + 1;
+   ret = fdt_add_mem_rsv(fdt, base, size);
+   if (ret) {
+   pr_err("Error updating memory reserve map: %s\n",
+  fdt_strerror(ret));
+   goto out;
+   }
+   }
+
 out:
+   kfree(rmem);
kfree(umem);
return ret;
 }
@@ -1024,10 +1072,10 @@ int arch_kexec_kernel_image_probe(struct kimage *image, 
void *buf,
 
/* Get exclude memory ranges needed for setting up kdump 
segments */
ret = get_exclude_memory_ranges(&(image->arch.exclude_ranges));
-   if (ret)
+   if (ret) {
pr_err("Failed to setup exclude memory ranges for 
buffer lookup\n");
-   /* Return this until all changes for panic kernel are in */
-   return -EOPNOTSUPP;
+   return ret;
+   }
}
 
return kexec_image_probe_default(image, buf, buf_len);




[PATCH v6 11/11] ppc64/kexec_file: enable early kernel's OPAL calls

2020-07-29 Thread Hari Bathini
Kernel built with CONFIG_PPC_EARLY_DEBUG_OPAL enabled expects r8 & r9
to be filled with OPAL base & entry addresses respectively. Setting
these registers allows the kernel to perform OPAL calls before the
device tree is parsed.

Signed-off-by: Hari Bathini 
Reviewed-by: Thiago Jung Bauermann 
---

v5 -> v6:
* Added Reviewed-by tag from Thiago.
* Moved the patch to end of the series for mpe to take a call on whether
  to have it or not.

v4 -> v5:
* New patch. Updated opal_base & opal_entry values in r8 & r9 respectively.
  This change was part of the below dropped patch in v4:
- https://lore.kernel.org/patchwork/patch/1275667/


 arch/powerpc/kexec/file_load_64.c  |   20 
 arch/powerpc/purgatory/trampoline_64.S |   16 
 2 files changed, 36 insertions(+)

diff --git a/arch/powerpc/kexec/file_load_64.c 
b/arch/powerpc/kexec/file_load_64.c
index c6a37ad5a0a4..53bb71e3a2e1 100644
--- a/arch/powerpc/kexec/file_load_64.c
+++ b/arch/powerpc/kexec/file_load_64.c
@@ -876,6 +876,7 @@ int setup_purgatory_ppc64(struct kimage *image, const void 
*slave_code,
  const void *fdt, unsigned long kernel_load_addr,
  unsigned long fdt_load_addr)
 {
+   struct device_node *dn = NULL;
int ret;
 
ret = setup_purgatory(image, slave_code, fdt, kernel_load_addr,
@@ -903,9 +904,28 @@ int setup_purgatory_ppc64(struct kimage *image, const void 
*slave_code,
 &image->arch.backup_start,
 sizeof(image->arch.backup_start),
 false);
+   if (ret)
+   goto out;
+
+   /* Setup OPAL base & entry values */
+   dn = of_find_node_by_path("/ibm,opal");
+   if (dn) {
+   u64 val;
+
+   of_property_read_u64(dn, "opal-base-address", &val);
+   ret = kexec_purgatory_get_set_symbol(image, "opal_base", &val,
+sizeof(val), false);
+   if (ret)
+   goto out;
+
+   of_property_read_u64(dn, "opal-entry-address", &val);
+   ret = kexec_purgatory_get_set_symbol(image, "opal_entry", &val,
+sizeof(val), false);
+   }
 out:
if (ret)
pr_err("Failed to setup purgatory symbols");
+   of_node_put(dn);
return ret;
 }
 
diff --git a/arch/powerpc/purgatory/trampoline_64.S 
b/arch/powerpc/purgatory/trampoline_64.S
index e79077ff1355..e6a6e7e6dfe4 100644
--- a/arch/powerpc/purgatory/trampoline_64.S
+++ b/arch/powerpc/purgatory/trampoline_64.S
@@ -87,6 +87,10 @@ master:
li  %r4,28
STWX_BE %r17,%r3,%r4/* Store my cpu as __be32 at byte 28 */
 1:
+   /* Load opal base and entry values in r8 & r9 respectively */
+   ld  %r8,(opal_base - 0b)(%r18)
+   ld  %r9,(opal_entry - 0b)(%r18)
+
/* load the kernel address */
ld  %r4,(kernel - 0b)(%r18)
 
@@ -133,6 +137,18 @@ backup_start:
.8byte  0x0
.size backup_start, . - backup_start
 
+   .balign 8
+   .globl opal_base
+opal_base:
+   .8byte  0x0
+   .size opal_base, . - opal_base
+
+   .balign 8
+   .globl opal_entry
+opal_entry:
+   .8byte  0x0
+   .size opal_entry, . - opal_entry
+
.data
.balign 8
 .globl purgatory_sha256_digest




[PATCH V13] printk: Add monotonic, boottime, and realtime timestamps

2020-07-29 Thread Chunyan Zhang
From: Prarit Bhargava 

printk.time=1/CONFIG_PRINTK_TIME=1 adds a unmodified local hardware clock
timestamp to printk messages.  The local hardware clock loses time each
day making it difficult to determine exactly when an issue has occurred in
the kernel log, and making it difficult to determine how kernel and
hardware issues relate to each other in real time.

Make printk output different timestamps by adding options for no
timestamp, the local hardware clock, the monotonic clock, the boottime
clock, and the real clock.  Allow a user to pick one of the clocks by
using the printk.time kernel parameter.  Output the type of clock in
/sys/module/printk/parameters/time so userspace programs can interpret the
timestamp.

v2: Use peterz's suggested Kconfig options.  Merge patchset together.
Fix i386 !CONFIG_PRINTK builds.

v3: Fixed x86_64_defconfig. Added printk_time_type enum and
printk_time_str for better output. Added BOOTTIME clock functionality.

v4: Fix messages, add additional printk.time options, and fix configs.

v5: Renaming of structures, and allow printk_time_set() to
evaluate substrings of entries (eg: allow 'r', 'real', 'realtime').  From
peterz, make fast functions return 0 until timekeeping is initialized
(removes timekeeping_active & ktime_get_boot|real_log_ts() suggested by
 tglx and adds ktime_get_real_offset()).  Switch to a function pointer
for printk_get_ts() and reference fast functions.  Make timestamp_sources enum
match choice options for CONFIG_PRINTK_TIME (adds PRINTK_TIME_UNDEFINED).

v6: Define PRINTK_TIME_UNDEFINED for !CONFIG_PRINTK builds.  Separate
timekeeping changes into separate patch.  Minor include file cleanup.

v7: Add default case to printk_set_timestamp() and add PRINTK_TIME_DEBUG
for users that want to set timestamp to different values during runtime.
Add jstultz' Kconfig to avoid defconfig churn.

v8: Add CONFIG_PRINTK_TIME_DEBUG to allow timestamp runtime switching.
Rename PRINTK_TIME_DISABLE to PRINTK_TIME_DISABLED.  Rename
printk_set_timestamp() to printk_set_ts_func().  Separate
printk_set_ts_func() and printk_get_first_ts() portions.  Rename param
functions.  Adjust configs, enum, and timestamp_sources_str to be 0-4.
Add mention realtime clock is UTC in Documentation.

v9: Fix typo.  Add __ktime_get_real_fast_ns_unsafe().

v10: Remove time parameter restrictions.

v11: Rework using tglx's real time patch

v12: Reword Kconfig names.  Simplify timestamp logic and remove
recursive code.

v13: This patch seems have being forgotten for 3 years. Rebase it on
the latest kernel v5.8, reolve conflicts and fix compiling errors.
Change code to adapt new printk_time usage.
Petr's concern on printk_time is addressed by current version of kernel, too.

Signed-off-by: Prarit Bhargava 
Cc: Mark Salyzyn 
Cc: Jonathan Corbet 
Cc: Petr Mladek 
Cc: Sergey Senozhatsky 
Cc: Steven Rostedt 
Cc: John Stultz 
Cc: Thomas Gleixner 
Cc: Stephen Boyd 
Cc: Andrew Morton 
Cc: Greg Kroah-Hartman 
Cc: "Paul E. McKenney" 
Cc: Christoffer Dall 
Cc: Deepa Dinamani 
Cc: Ingo Molnar 
Cc: Joel Fernandes 
Cc: Prarit Bhargava 
Cc: Kees Cook 
Cc: Peter Zijlstra 
Cc: Geert Uytterhoeven 
Cc: "Luis R. Rodriguez" 
Cc: Nicholas Piggin 
Cc: "Jason A. Donenfeld" 
Cc: Olof Johansson 
Cc: Josh Poimboeuf 
Cc: linux-...@vger.kernel.org
[jstultz: reworked Kconfig settings to avoid defconfig noise]
Signed-off-by: John Stultz 
Reviewed-by: Petr Mladek 
[orson: rebase on v5.8 and make necessary changes]
Signed-off-by: Orson Zhai 
---
 Documentation/admin-guide/kernel-parameters.txt |   6 +-
 kernel/printk/printk.c  | 127 +++-
 lib/Kconfig.debug   |  48 -
 3 files changed, 174 insertions(+), 7 deletions(-)

diff --git a/Documentation/admin-guide/kernel-parameters.txt 
b/Documentation/admin-guide/kernel-parameters.txt
index fb95fad..0bf5f69 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -3874,8 +3874,10 @@
ratelimit - ratelimit the logging
Default: ratelimit
 
-   printk.time=Show timing data prefixed to each printk message line
-   Format:   (1/Y/y=enable, 0/N/n=disable)
+   printk.time=Show timestamp prefixed to each printk message line
+   Format: 
+   (0/N/n/disable, 1/Y/y/local,
+b/boot, m/monotonic, r/realtime (in UTC))
 
processor.max_cstate=   [HW,ACPI]
Limit processor to maximum C-state
diff --git a/kernel/printk/printk.c b/kernel/printk/printk.c
index b71eaf5..ba35f89 100644
--- a/kernel/printk/printk.c
+++ b/kernel/printk/printk.c
@@ -612,6 +612,9 @@ static u32 truncate_msg(u16 *text_len, u16 *trunc_msg_len,
return msg_used_size(*text_len + *trunc_msg_len, 0, pad_len);
 }
 
+static u64 printk_get_first_ts(void);
+static u64 (*printk_get_ts)(void) = printk_get_f

Re: [PATCH 14/24] openrisc: use asm-generic/mmu_context.h for no-op implementations

2020-07-29 Thread Stafford Horne
On Tue, Jul 28, 2020 at 01:33:55PM +1000, Nicholas Piggin wrote:
> Cc: Jonas Bonn 
> Cc: Stefan Kristiansson 
> Cc: Stafford Horne 
> Cc: openr...@lists.librecores.org
> Signed-off-by: Nicholas Piggin 
> ---
>  arch/openrisc/include/asm/mmu_context.h | 8 +++-
>  arch/openrisc/mm/tlb.c  | 2 ++
>  2 files changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/openrisc/include/asm/mmu_context.h 
> b/arch/openrisc/include/asm/mmu_context.h
> index ced577542e29..a6702384c77d 100644
> --- a/arch/openrisc/include/asm/mmu_context.h
> +++ b/arch/openrisc/include/asm/mmu_context.h
> @@ -17,13 +17,13 @@
>  
>  #include 
>  
> +#define init_new_context init_new_context
>  extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
> +#define destroy_context destroy_context
>  extern void destroy_context(struct mm_struct *mm);
>  extern void switch_mm(struct mm_struct *prev, struct mm_struct *next,
> struct task_struct *tsk);
>  
> -#define deactivate_mm(tsk, mm)   do { } while (0)
> -
>  #define activate_mm(prev, next) switch_mm((prev), (next), NULL)
>  
>  /* current active pgd - this is similar to other processors pgd
> @@ -32,8 +32,6 @@ extern void switch_mm(struct mm_struct *prev, struct 
> mm_struct *next,
>  
>  extern volatile pgd_t *current_pgd[]; /* defined in arch/openrisc/mm/fault.c 
> */
>  
> -static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct 
> *tsk)
> -{
> -}
> +#include 

This looks ok.

>  #endif
> diff --git a/arch/openrisc/mm/tlb.c b/arch/openrisc/mm/tlb.c
> index 4b680aed8f5f..821aab4cf3be 100644
> --- a/arch/openrisc/mm/tlb.c
> +++ b/arch/openrisc/mm/tlb.c
> @@ -159,6 +159,7 @@ void switch_mm(struct mm_struct *prev, struct mm_struct 
> *next,
>   * instance.
>   */
>  
> +#define init_new_context init_new_context
>  int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
>  {
>   mm->context = NO_CONTEXT;
> @@ -170,6 +171,7 @@ int init_new_context(struct task_struct *tsk, struct 
> mm_struct *mm)
>   * drops it.
>   */
>  
> +#define destroy_context destroy_context
>  void destroy_context(struct mm_struct *mm)
>  {
>   flush_tlb_mm(mm);

I don't think we need the #define's in the .c file.  Do we?

-Stafford

> -- 
> 2.23.0
> 


Re: linux-next: build failure after merge of the printk tree

2020-07-29 Thread Herbert Xu
On Wed, Jul 29, 2020 at 09:03:11PM +1000, Stephen Rothwell wrote:
> 
> After merging the printk tree, today's linux-next build (powerpc
> allyesconfig) failed like this:

Hi Stephen:

This loop was introduced recently by the powerpc tree with

https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?h=next&id=aa65ff6b18e0366db1790609956a4ac7308c5668

powerpc/64s: Implement queued spinlocks and rwlocks

However the loop itself goes back further and in fact someone has
already tried to work around it by adding ifdefs on CONFIG_PARAVIRT
in asm-generic/qspinlock_types.h.  I'll try to fix this properly.

Cheers,
-- 
Email: Herbert Xu 
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt


[PATCH] trace : use kvmalloc instead of kmalloc

2020-07-29 Thread Zhaoyang Huang
High order memory stuff within trace could introduce OOM, use kvmalloc instead.

Please find the bellowing for the call stack we run across in an android 
system. The scenario happens when traced_probes is woken up to get a large 
quantity of trace even if free memory is even higher than watermark_low. 

traced_probes invoked oom-killer: 
gfp_mask=0x140c0c0(GFP_KERNEL|__GFP_COMP|__GFP_ZERO), nodemask=(null),  
order=2, oom_score_adj=-1

traced_probes cpuset=system-background mems_allowed=0
CPU: 3 PID: 588 Comm: traced_probes Tainted: GW  O4.14.181 #1
Hardware name: Generic DT based system
(unwind_backtrace) from [] (show_stack+0x20/0x24)
(show_stack) from [] (dump_stack+0xa8/0xec)
(dump_stack) from [] (dump_header+0x9c/0x220)
(dump_header) from [] (oom_kill_process+0xc0/0x5c4)
(oom_kill_process) from [] (out_of_memory+0x220/0x310)
(out_of_memory) from [] (__alloc_pages_nodemask+0xff8/0x13a4)
(__alloc_pages_nodemask) from [] (kmalloc_order+0x30/0x48)
(kmalloc_order) from [] (kmalloc_order_trace+0x30/0x118)
(kmalloc_order_trace) from [] (tracing_buffers_open+0x50/0xfc)
(tracing_buffers_open) from [] (do_dentry_open+0x278/0x34c)
(do_dentry_open) from [] (vfs_open+0x50/0x70)
(vfs_open) from [] (path_openat+0x5fc/0x169c)
(path_openat) from [] (do_filp_open+0x94/0xf8)
(do_filp_open) from [] (do_sys_open+0x168/0x26c)
(do_sys_open) from [] (SyS_openat+0x34/0x38)
(SyS_openat) from [] (ret_fast_syscall+0x0/0x28)

Signed-off-by: Zhaoyang Huang 
---
 kernel/trace/trace.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c
index ca1ee65..d4eb7ea 100644
--- a/kernel/trace/trace.c
+++ b/kernel/trace/trace.c
@@ -6891,7 +6891,7 @@ static int tracing_buffers_open(struct inode *inode, 
struct file *filp)
if (trace_array_get(tr) < 0)
return -ENODEV;
 
-   info = kzalloc(sizeof(*info), GFP_KERNEL);
+   info = kvmalloc(sizeof(*info), GFP_KERNEL);
if (!info) {
trace_array_put(tr);
return -ENOMEM;
-- 
1.9.1



Re: (resend) [PATCH [linux-4.14.y]] dm cache: submit writethrough writes in parallel to origin and cache

2020-07-29 Thread Greg KH
On Mon, Jul 27, 2020 at 11:00:14AM -0400, Mike Snitzer wrote:
> This mail needs to be saent to sta...@vger.kernel.org (now cc'd).
> 
> Greg et al: please backport 2df3bae9a6543e90042291707b8db0cbfbae9ee9

Now backported, thanks.

greg k-h


[Linux-kernel-mentees] [PATCH v2] block/floppy: Prevent kernel-infoleak in raw_cmd_copyout()

2020-07-29 Thread Peilin Ye
raw_cmd_copyout() is potentially copying uninitialized kernel stack memory
since it is initializing `cmd` by assignment, which may cause the compiler
to leave uninitialized holes in this structure. Fix it by using memcpy()
instead.

Cc: sta...@vger.kernel.org
Suggested-by: Dan Carpenter 
Suggested-by: Arnd Bergmann 
Signed-off-by: Peilin Ye 
---
Change in v2:
- Remove inappropriate "Fixes:" tag. (Suggested by: Denis Efremov
  )

Reference: https://lwn.net/Articles/417989/

$ pahole -C "floppy_raw_cmd" drivers/block/floppy.o
struct floppy_raw_cmd {
unsigned int   flags;/* 0 4 */

/* XXX 4 bytes hole, try to pack */

void * data; /* 8 8 */
char * kernel_data;  /*16 8 */
struct floppy_raw_cmd *next; /*24 8 */
long int   length;   /*32 8 */
long int   phys_length;  /*40 8 */
intbuffer_length;/*48 4 */
unsigned char  rate; /*52 1 */
unsigned char  cmd_count;/*53 1 */
union {
struct {
unsigned char cmd[16];   /*5416 */
/* --- cacheline 1 boundary (64 bytes) was 6 bytes ago 
--- */
unsigned char reply_count;   /*70 1 */
unsigned char reply[16]; /*7116 */
};   /*5433 */
unsigned char  fullcmd[33];  /*5433 */
};   /*5433 */

/* XXX 1 byte hole, try to pack */

/* --- cacheline 1 boundary (64 bytes) was 24 bytes ago --- */
inttrack;/*88 4 */
intresultcode;   /*92 4 */
intreserved1;/*96 4 */
intreserved2;/*   100 4 */

/* size: 104, cachelines: 2, members: 14 */
/* sum members: 99, holes: 2, sum holes: 5 */
/* last cacheline: 40 bytes */
};

 drivers/block/floppy.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/block/floppy.c b/drivers/block/floppy.c
index 09079aee8dc4..b8ea98f7a9cb 100644
--- a/drivers/block/floppy.c
+++ b/drivers/block/floppy.c
@@ -3126,7 +3126,9 @@ static int raw_cmd_copyout(int cmd, void __user *param,
int ret;
 
while (ptr) {
-   struct floppy_raw_cmd cmd = *ptr;
+   struct floppy_raw_cmd cmd;
+
+   memcpy(&cmd, ptr, sizeof(cmd));
cmd.next = NULL;
cmd.kernel_data = NULL;
ret = copy_to_user(param, &cmd, sizeof(cmd));
-- 
2.25.1



Re: BUG: omap5: v5.8-rc7 boot fails

2020-07-29 Thread Tony Lindgren
* Tony Lindgren  [200728 08:23]:
> * H. Nikolaus Schaller  [200727 20:51]:
> > Hi Tony,
> > after trying v5.8-rc7 the Pyra boot hangs after ca. 3 seconds
> > (a little random what the last log line is).
> > 
> > I could bisect it to:
> > 
> > 6cfcd5563b4fadbf49ba8fa481978e5e86d30322 is the first bad commit
> > commit 6cfcd5563b4fadbf49ba8fa481978e5e86d30322
> > Author: Tony Lindgren 
> > Date:   Mon Jul 13 09:26:01 2020 -0700
> > 
> > clocksource/drivers/timer-ti-dm: Fix suspend and resume for am3 and am4
> > 
> > And a git revert makes it boot again.
> > 
> > I haven't had time to do more tests (e.g. with omap3/4 or on omap5uevm).
> 
> Oops sorry about that, I'll take a look.

This fixes booting for me, but I still need to check if we also
need to enable before the reset. And then this needs to be tested
on all the related SoCs again.

Regards,

Tony

8< --
diff --git a/drivers/clocksource/timer-ti-dm-systimer.c 
b/drivers/clocksource/timer-ti-dm-systimer.c
--- a/drivers/clocksource/timer-ti-dm-systimer.c
+++ b/drivers/clocksource/timer-ti-dm-systimer.c
@@ -409,8 +409,8 @@ static int __init dmtimer_systimer_setup(struct device_node 
*np,
t->wakeup = regbase + _OMAP_TIMER_WAKEUP_EN_OFFSET;
t->ifctrl = regbase + _OMAP_TIMER_IF_CTRL_OFFSET;
 
-   dmtimer_systimer_enable(t);
dmtimer_systimer_reset(t);
+   dmtimer_systimer_enable(t);
pr_debug("dmtimer rev %08x sysc %08x\n", readl_relaxed(t->base),
 readl_relaxed(t->base + t->sysc));
 


Re: (resend) [PATCH [linux-4.14.y]] dm cache: submit writethrough writes in parallel to origin and cache

2020-07-29 Thread Greg KH
On Wed, Jul 29, 2020 at 01:51:19PM +0200, Greg KH wrote:
> On Mon, Jul 27, 2020 at 11:00:14AM -0400, Mike Snitzer wrote:
> > This mail needs to be saent to sta...@vger.kernel.org (now cc'd).
> > 
> > Greg et al: please backport 2df3bae9a6543e90042291707b8db0cbfbae9ee9
> 
> Now backported, thanks.

Nope, it broke the build, I need something that actually works :)


Re: [PATCH v3 1/4] dt-bindings: arm: rockchip: Update ROCKPi 4 binding

2020-07-29 Thread Jagan Teki
On Thu, Jul 23, 2020 at 9:20 PM Rob Herring  wrote:
>
> On Thu, Jul 23, 2020 at 02:32:07PM +0530, Jagan Teki wrote:
> > ROCKPi 4 has 3 variants of hardware platforms called
> > ROCKPi 4A, 4B, and 4C.
> >
> > - ROCKPi 4A has no Wif/BT.
> > - ROCKPi 4B has AP6256 Wifi/BT, PoE.
> > - ROCKPi 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
> >   GPIO pin change compared to 4B, 4C
> >
> > So, update the existing ROCKPi 4 binding to support
> > ROCKPi 4A/B/C hardware platforms.
> >
> > Signed-off-by: Jagan Teki 
> > ---
> > Changes for v3:
> > - new patch
> >
> >  Documentation/devicetree/bindings/arm/rockchip.yaml | 6 +-
> >  1 file changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml 
> > b/Documentation/devicetree/bindings/arm/rockchip.yaml
> > index db2e35796795..e6f656b0bd56 100644
> > --- a/Documentation/devicetree/bindings/arm/rockchip.yaml
> > +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
> > @@ -430,8 +430,12 @@ properties:
> >- const: radxa,rock
> >- const: rockchip,rk3188
> >
> > -  - description: Radxa ROCK Pi 4
> > +  - description: Radxa ROCK Pi 4A/B/C
> >  items:
> > +  - enum:
> > +  - const: radxa,rockpi4a
> > +  - const: radxa,rockpi4b
> > +  - const: radxa,rockpi4c
> >- const: radxa,rockpi4
>
> radxa,rockpi4 already meant 'ROCKPi 4A' and should continue to do so.
> Just add 4B and 4C strings. It's up to you if they should be backwards
> compatible with 'radxa,rockpi4' (meaning 4A), but I'd guess not unless
> it's just a board pop option.

At-least from dts nodes enablement point of view the existing dts
(with radxa,rockpi4) is 4B since it has wifi/bt enabled. 4A is the
real name of the board so having a compatible with radxa,rockpi4a is
meaningful as I understood.

So, based on the above statements the respective binding look like

  - description: Radxa ROCK Pi 4A/B/C
items:
  - enum:
  - radxa,rockpi4a
  - radxa,rockpi4b
  - radxa,rockpi4c
  - const: radxa,rockpi4
  - const: rockchip,rk3399

Comments, please?

Jagan.


Re: [PATCH v10 4/5] arm64: kdump: fix kdump broken with ZONE_DMA reintroduced

2020-07-29 Thread Catalin Marinas
Hi Chen,

On Wed, Jul 29, 2020 at 11:52:39AM +0800, chenzhou wrote:
> On 2020/7/28 1:30, Catalin Marinas wrote:
> > Anyway, there are two series solving slightly different issues with
> > kdump reservations:
> >
> > 1. This series which relaxes the crashkernel= allocation to go anywhere
> >in the accessible space while having a dedicated crashkernel=X,low
> >option for ZONE_DMA.
> >
> > 2. Bhupesh's series [1] forcing crashkernel=X allocations only from
> >ZONE_DMA.
> >
> > For RPi4 support, we limited ZONE_DMA allocations to the 1st GB.
> > Existing crashkernel= uses may no longer work, depending on where the
> > allocation falls. Option (2) above is a quick fix assuming that the
> > crashkernel reservation is small enough. What's a typical crashkernel
> > option here? That series is probably more prone to reservation failures.
> >
> > Option (1), i.e. this series, doesn't solve the problem raised by
> > Bhupesh unless one uses the crashkernel=X,low argument. It can actually
> > make it worse even for ZONE_DMA32 since the allocation can go above 4G
> > (assuming that we change the ZONE_DMA configuration to only limit it to
> > 1GB on RPi4).
> >
> > I'm more inclined to keep the crashkernel= behaviour to ZONE_DMA
> > allocations. If this is too small for typical kdump, we can look into
> > expanding ZONE_DMA to 4G on non-RPi4 hardware (we had patches on the
> > list). In addition, if Chen thinks allocations above 4G are still needed
> > or if RPi4 needs a sufficiently large crashkernel=, I'd rather have a
> > ",high" option to explicitly require such access.
> 
> Thanks for your reply and exhaustive explanation.
> 
> In our ARM servers, we need to to reserve a large chunk for kdump(512M
> or 1G), there is no enough low memory. So we proposed this patch
> series "support reserving crashkernel above 4G on arm64 kdump" In
> April 2019.

Trying to go through the discussions last year, hopefully things get
clearer.

So prior to the ZONE_DMA change, you still couldn't reserve 1G in the
first 4GB? It shouldn't be sparsely populated during early boot.

> I introduce parameters "crashkernel=X,[high,low]" as x86_64 does in earlier 
> versions.
> Suggested by James, to simplify, we call reserve_crashkernel_low() at the 
> beginning of
> reserve_crashkernel() and then relax the arm64_dma32_phys_limit if 
> reserve_crashkernel_low()
> allocated something.
> That is, just the parameter "crashkernel=X,low" is ok and i deleted 
> "crashkernel=X,high".

The problem I see is that with your patches we diverge from x86
behaviour (and the arm64 behaviour prior to the ZONE_DMA reduction) as
we now require that crashkernel=X,low is always passed if you want
something in ZONE_DMA (and you do want, otherwise the crashdump kernel
fails to boot).

My main requirement is that crashkernel=X, without any suffix, still
works which I don't think is guaranteed with your patches (well,
ignoring RPi4 ZONE_DMA). Bhupesh's series is a quick fix but doesn't
solve your large allocation requirements (that may have worked prior to
the ZONE_DMA change).

> After the ZONE_DMA introduced in December 2019, the issue occurred as
> you said above. In fact, we didn't have RPi4 machine.

You don't even need to have a RPi4 machine, ZONE_DMA has been set to 1GB
unconditionally. And while we could move it back to 4GB on non-RPi4
hardware, I'd rather have a solution that fixes kdump for RPi4 as well.

> Originally, i suggested to fix this based on this patch series and
> used the dedicated option.
> 
> According to your clarify, for typical kdump, there are other
> solutions. In this case, "keep the crashkernel= behaviour to ZONE_DMA
> allocations" looks much better.
> 
> How about like this:
> 1. For ZONE_DMA issue, use Bhupesh's solution, keep the crashkernel=
>behaviour to ZONE_DMA allocations.
> 2. For this patch series, make the reserve_crashkernel_low() to
>ZONE_DMA allocations.

So you mean rebasing your series on top of Bhupesh's? I guess you can
combine the two, I really don't care which way as long as we fix both
issues and agree on the crashkernel= semantics. I think with some tweaks
we can go with your series alone.

IIUC from the x86 code (especially the part you #ifdef'ed out for
arm64), if ",low" is not passed (so just standard crashkernel=X), it
still allocates sufficient low memory for the swiotlb in ZONE_DMA. The
rest can go in a high region. Why can't we do something similar on
arm64? Of course, you can keep the ",low" argument for explicit
allocation but I don't want to mandate it.

So with an implicit ZONE_DMA allocation similar to the x86 one, we
probably don't need Bhupesh's series at all. In addition, we can limit
crashkernel= to the first 4G with a fall-back to high like x86 (not sure
if memblock_find_in_range() is guaranteed to search in ascending order).
I don't think we need an explicit ",high" annotation.

So with the above, just a crashkernel=1G gives you at least 256MB in
ZONE_DMA followed by the rest anywhe

[PATCH v2 03/10] arm64: dts: qcom: talkman: Add Synaptics RMI4 touchscreen

2020-07-29 Thread Konrad Dybcio
This adds touchscreen capabilities to the Lumia 950.

Signed-off-by: Konrad Dybcio 
---
 .../dts/qcom/msm8992-msft-lumia-talkman.dts   | 28 +++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8992-msft-lumia-talkman.dts 
b/arch/arm64/boot/dts/qcom/msm8992-msft-lumia-talkman.dts
index 3cc01f02219d..c337a86a5c77 100644
--- a/arch/arm64/boot/dts/qcom/msm8992-msft-lumia-talkman.dts
+++ b/arch/arm64/boot/dts/qcom/msm8992-msft-lumia-talkman.dts
@@ -32,6 +32,34 @@ chosen {
};
 };
 
+&blsp_i2c1 {
+   status = "okay";
+
+   rmi4-i2c-dev@4b {
+   compatible = "syna,rmi4-i2c";
+   reg = <0x4b>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   interrupt-parent = <&tlmm>;
+   interrupts = <77 IRQ_TYPE_EDGE_FALLING>;
+
+   rmi4-f01@1 {
+   reg = <0x01>;
+   syna,nosleep-mode = <1>;
+   };
+
+   rmi4-f12@12 {
+   reg = <0x12>;
+   syna,sensor-type = <1>;
+   syna,clip-x-low = <0>;
+   syna,clip-x-high = <1440>;
+   syna,clip-y-low = <0>;
+   syna,clip-y-high = <2560>;
+   };
+   };
+};
+
 &sdhc_1 {
status = "okay";
 
-- 
2.27.0



[PATCH v2 02/10] arm64: dts: qcom: msm8992: Add BLSP_I2C1 support

2020-07-29 Thread Konrad Dybcio
This will be required to support touchscreen on Lumia
devices.

Signed-off-by: Konrad Dybcio 
---
 arch/arm64/boot/dts/qcom/msm8992.dtsi | 35 +++
 1 file changed, 35 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi 
b/arch/arm64/boot/dts/qcom/msm8992.dtsi
index 9b42ac42b171..c7dc81311f6a 100644
--- a/arch/arm64/boot/dts/qcom/msm8992.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
@@ -304,6 +304,27 @@ blsp1_uart2: serial@f991e000 {
status = "disabled";
};
 
+   /*
+* This I2C seems to only be present on WP platforms
+* and is likely disabled in firmware
+* (hangs at least one device) on android platforms.
+*/
+   blsp_i2c1: i2c@f9923000 {
+   compatible = "qcom,i2c-qup-v2.2.1";
+   reg = <0xf9923000 0x500>;
+   interrupts = ;
+   clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+   <&gcc 
GCC_BLSP1_QUP1_I2C_APPS_CLK>;
+   clock-names = "iface", "core";
+   clock-frequency = <40>;
+   pinctrl-names = "default", "sleep";
+   pinctrl-0 = <&i2c1_default>;
+   pinctrl-1 = <&i2c1_sleep>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
+
blsp_i2c2: i2c@f9924000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0xf9924000 0x500>;
@@ -524,6 +545,20 @@ sdc1_rclk_off: rclk-off {
bias-pull-down;
};
 
+   i2c1_default: i2c1-default {
+   function = "blsp_i2c1";
+   pins = "gpio2", "gpio3";
+   drive-strength = <2>;
+   bias-disable;
+   };
+
+   i2c1_sleep: i2c1-sleep {
+   function = "gpio";
+   pins = "gpio2", "gpio3";
+   drive-strength = <2>;
+   bias-disable;
+   };
+
i2c2_default: i2c2-default {
function = "blsp_i2c2";
pins = "gpio6", "gpio7";
-- 
2.27.0



[PATCH v2 04/10] arm64: dts: qcom: msm8994: Add USB support

2020-07-29 Thread Konrad Dybcio
This is a very basic dwc3 configuration (no PHYs yet),
but it works.

Signed-off-by: Konrad Dybcio 
---
 arch/arm64/boot/dts/qcom/msm8994.dtsi | 31 +++
 1 file changed, 31 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi 
b/arch/arm64/boot/dts/qcom/msm8994.dtsi
index 6707f898607f..69c99a4cd817 100644
--- a/arch/arm64/boot/dts/qcom/msm8994.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi
@@ -282,6 +282,37 @@ frame@f9028000 {
};
};
 
+   usb3: usb@f92f8800 {
+   compatible = "qcom,msm8996-dwc3", "qcom,dwc3";
+   reg = <0xf92f8800 0x400>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   clocks = <&gcc GCC_USB30_MASTER_CLK>,
+<&gcc GCC_SYS_NOC_USB3_AXI_CLK>,
+<&gcc GCC_USB30_SLEEP_CLK>,
+<&gcc GCC_USB30_MOCK_UTMI_CLK>;
+   clock-names = "core", "iface", "sleep", "mock_utmi", 
"ref", "xo";
+
+   assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
+ <&gcc GCC_USB30_MASTER_CLK>;
+   assigned-clock-rates = <1920>, <12000>;
+
+   power-domains = <&gcc USB30_GDSC>;
+   qcom,select-utmi-as-pipe-clk;
+
+   dwc3@f920 {
+   compatible = "snps,dwc3";
+   reg = <0xf920 0xcc00>;
+   interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;
+   snps,dis_u2_susphy_quirk;
+   snps,dis_enblslpm_quirk;
+   maximum-speed = "high-speed";
+   dr_mode = "peripheral";
+   };
+   };
+
sdhc1: sdhci@f9824900 {
compatible = "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
-- 
2.27.0



[PATCH v2 05/10] arm64: dts: qcom: msm8992: Add USB support

2020-07-29 Thread Konrad Dybcio
This is a very basic dwc3 configuration (no PHYs yet),
but it works.

Signed-off-by: Konrad Dybcio 
---
 arch/arm64/boot/dts/qcom/msm8992.dtsi | 31 +++
 1 file changed, 31 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi 
b/arch/arm64/boot/dts/qcom/msm8992.dtsi
index c7dc81311f6a..c9502fcf5d70 100644
--- a/arch/arm64/boot/dts/qcom/msm8992.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
@@ -242,6 +242,37 @@ frame@f9028000 {
};
};
 
+   usb3: usb@f92f8800 {
+   compatible = "qcom,msm8996-dwc3", "qcom,dwc3";
+   reg = <0xf92f8800 0x400>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   clocks = <&gcc GCC_USB30_MASTER_CLK>,
+<&gcc GCC_SYS_NOC_USB3_AXI_CLK>,
+<&gcc GCC_USB30_SLEEP_CLK>,
+<&gcc GCC_USB30_MOCK_UTMI_CLK>;
+   clock-names = "core", "iface", "sleep", "mock_utmi", 
"ref", "xo";
+
+   assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
+ <&gcc GCC_USB30_MASTER_CLK>;
+   assigned-clock-rates = <1920>, <12000>;
+
+   power-domains = <&gcc USB30_GDSC>;
+   qcom,select-utmi-as-pipe-clk;
+
+   dwc3@f920 {
+   compatible = "snps,dwc3";
+   reg = <0xf920 0xcc00>;
+   interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;
+   snps,dis_u2_susphy_quirk;
+   snps,dis_enblslpm_quirk;
+   maximum-speed = "high-speed";
+   dr_mode = "peripheral";
+   };
+   };
+
sdhc_1: sdhci@f9824900 {
compatible = "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
-- 
2.27.0



[PATCH v2 10/10] arm64: dts: qcom: msm8992/4: Add clocks property to gcc node

2020-07-29 Thread Konrad Dybcio
This is required for the platforms to function after the recent
driver cleanup and also is the current coding style.

Signed-off-by: Konrad Dybcio 
---
 arch/arm64/boot/dts/qcom/msm8992.dtsi | 2 ++
 arch/arm64/boot/dts/qcom/msm8994.dtsi | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi 
b/arch/arm64/boot/dts/qcom/msm8992.dtsi
index c9502fcf5d70..008206251f49 100644
--- a/arch/arm64/boot/dts/qcom/msm8992.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
@@ -457,6 +457,8 @@ gcc: clock-controller@fc40 {
#reset-cells = <1>;
#power-domain-cells = <1>;
reg = <0xfc40 0x2000>;
+   clock-names = "xo", "sleep_clk";
+   clocks = <&xo_board>, <&sleep_clk>;
};
 
rpm_msg_ram: memory@fc428000 {
diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi 
b/arch/arm64/boot/dts/qcom/msm8994.dtsi
index 58fc8b0321c3..f2f850ebd3c8 100644
--- a/arch/arm64/boot/dts/qcom/msm8994.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi
@@ -528,6 +528,8 @@ gcc: clock-controller@fc40 {
#reset-cells = <1>;
#power-domain-cells = <1>;
reg = <0xfc40 0x2000>;
+   clock-names = "xo", "sleep_clk";
+   clocks = <&xo_board>, <&sleep_clk>;
};
 
rpm_msg_ram: memory@fc428000 {
-- 
2.27.0



[PATCH v2 06/10] arm64: dts: qcom: kitakami: Add Synaptics touchscreen

2020-07-29 Thread Konrad Dybcio
All Kitakami devices seem to use the Synaptics RMI4
touchscreen attached to the same i2c bus. Configure and
enable it.

Signed-off-by: Konrad Dybcio 
---
 .../qcom/msm8994-sony-xperia-kitakami.dtsi| 45 ++-
 1 file changed, 44 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi 
b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
index 4032b7478f04..696cd39852f4 100644
--- a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
@@ -138,7 +138,34 @@ &blsp_i2c5 {
 &blsp_i2c6 {
status = "okay";
 
-   /* Synaptics touchscreen */
+   rmi4-i2c-dev@2c {
+   compatible = "syna,rmi4-i2c";
+   reg = <0x2c>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   interrupt-parent = <&tlmm>;
+   interrupts = <42 IRQ_TYPE_EDGE_FALLING>;
+
+   pinctrl-names = "default";
+   pinctrl-0 = <&ts_int_active &ts_reset_active>;
+
+   vdd-supply = <&pm8994_l22>;
+   vio-supply = <&pm8994_s4>;
+
+   syna,reset-delay-ms = <220>;
+   syna,startup-delay-ms = <220>;
+
+   rmi4-f01@1 {
+   reg = <0x01>;
+   syna,nosleep-mode = <1>;
+   };
+
+   rmi4-f11@11 {
+   reg = <0x11>;
+   syna,sensor-type = <1>;
+   };
+   };
 };
 
 &blsp1_uart2 {
@@ -233,3 +260,19 @@ &sdhc1 {
 * vqmmc-supply = <&pm8994_s4>;
 */
 };
+
+&tlmm {
+   ts_int_active: ts-int-active {
+   pins = "gpio42";
+   drive-strength = <2>;
+   bias-disable;
+   input-enable;
+   };
+
+   ts_reset_active: ts-reset-active {
+   pins = "gpio109";
+   drive-strength = <2>;
+   bias-disable;
+   output-low;
+   };
+};
-- 
2.27.0



[PATCH v2 00/10] msm8992/4 updates

2020-07-29 Thread Konrad Dybcio
This series brings support for:

* sdhci2 on 8992/4
* BLSP_I2C1 (a seemingly WP-exclusive i2c bus) for 8992
* Synaptics RMI4 touchscreen for Sony Kitakami and MSFT L950
* DWC3 USB for msm8992/4 (doesn't work on Lumias, they use custom
circuitry)
* Missing clocks for 8994 GCC needed for USB

And also cleans up the clock driver

changes since v1:
- switch clocks to use parent_data instead of parent_names
- add missing reset for modem
- clean up gcc-msm8994 probe and remove predefined "xo"
- remove peripheral_noc_clk_src from SDHCI AHB clocks which was added by mistake

Konrad Dybcio (10):
  arm64: dts: qcom: msm8992: Add support for SDHCI2
  arm64: dts: qcom: msm8992: Add BLSP_I2C1 support
  arm64: dts: qcom: talkman: Add Synaptics RMI4 touchscreen
  arm64: dts: qcom: msm8994: Add USB support
  arm64: dts: qcom: msm8992: Add USB support
  arm64: dts: qcom: kitakami: Add Synaptics touchscreen
  arm64: dts: qcom: msm8994: Add SDHCI2 node
  arm64: dts: qcom: kitakami: Enable SDHCI2
  clk: qcom: gcc-msm8994: Fix up the driver and modernize it
  arm64: dts: qcom: msm8992/4: Add clocks property to gcc node

 .../dts/qcom/msm8992-msft-lumia-talkman.dts   |  28 +
 arch/arm64/boot/dts/qcom/msm8992.dtsi | 126 +++
 .../qcom/msm8994-sony-xperia-kitakami.dtsi|  49 +-
 arch/arm64/boot/dts/qcom/msm8994.dtsi |  91 ++
 drivers/clk/qcom/gcc-msm8994.c| 800 +-
 include/dt-bindings/clock/qcom,gcc-msm8994.h  |  37 +
 6 files changed, 915 insertions(+), 216 deletions(-)

-- 
2.27.0



[PATCH v2 07/10] arm64: dts: qcom: msm8994: Add SDHCI2 node

2020-07-29 Thread Konrad Dybcio
Add SDHCI2 to enable use of uSD cards on msm8994.

Signed-off-by: Konrad Dybcio 
---
 arch/arm64/boot/dts/qcom/msm8994.dtsi | 58 +++
 1 file changed, 58 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi 
b/arch/arm64/boot/dts/qcom/msm8994.dtsi
index 69c99a4cd817..58fc8b0321c3 100644
--- a/arch/arm64/boot/dts/qcom/msm8994.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi
@@ -336,6 +336,28 @@ sdhc1: sdhci@f9824900 {
status = "disabled";
};
 
+   sdhc2: sdhci@f98a4900 {
+   compatible = "qcom,sdhci-msm-v4";
+   reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
+   reg-names = "hc_mem", "core_mem";
+
+   interrupts = ,
+   ;
+   interrupt-names = "hc_irq", "pwr_irq";
+
+   clocks = <&gcc GCC_SDCC2_APPS_CLK>,
+   <&gcc GCC_SDCC2_AHB_CLK>,
+   <&xo_board>;
+   clock-names = "core", "iface", "xo";
+
+   pinctrl-names = "default", "sleep";
+   pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
+   pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off 
&sdc2_data_off>;
+
+   bus-width = <4>;
+   status = "disabled";
+   };
+
blsp1_dma: dma@f9904000 {
compatible = "qcom,bam-v1.7.0";
reg = <0xf9904000 0x19000>;
@@ -714,6 +736,42 @@ sdc1_rclk_off: rclk-off {
pins = "sdc1_rclk";
bias-pull-down;
};
+
+   sdc2_clk_on: sdc2-clk-on {
+   pins = "sdc2_clk";
+   bias-disable;
+   drive-strength = <10>;
+   };
+
+   sdc2_clk_off: sdc2-clk-off {
+   pins = "sdc2_clk";
+   bias-disable;
+   drive-strength = <2>;
+   };
+
+   sdc2_cmd_on: sdc2-cmd-on {
+   pins = "sdc2_cmd";
+   bias-pull-up;
+   drive-strength = <10>;
+   };
+
+   sdc2_cmd_off: sdc2-cmd-off {
+   pins = "sdc2_cmd";
+   bias-pull-up;
+   drive-strength = <2>;
+   };
+
+   sdc2_data_on: sdc2-data-on {
+   pins = "sdc2_data";
+   bias-pull-up;
+   drive-strength = <10>;
+   };
+
+   sdc2_data_off: sdc2-data-off {
+   pins = "sdc2_data";
+   bias-pull-up;
+   drive-strength = <2>;
+   };
};
};
 
-- 
2.27.0



[PATCH v2 08/10] arm64: dts: qcom: kitakami: Enable SDHCI2

2020-07-29 Thread Konrad Dybcio
This enables the use of uSD cards.

Signed-off-by: Konrad Dybcio 
---
 arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi 
b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
index 696cd39852f4..806e8ee00833 100644
--- a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
@@ -261,6 +261,10 @@ &sdhc1 {
 */
 };
 
+&sdhc2 {
+   status = "okay";
+};
+
 &tlmm {
ts_int_active: ts-int-active {
pins = "gpio42";
-- 
2.27.0



[PATCH v2 01/10] arm64: dts: qcom: msm8992: Add support for SDHCI2

2020-07-29 Thread Konrad Dybcio
This will let us use SD cards on our devices.

Signed-off-by: Konrad Dybcio 
---
 arch/arm64/boot/dts/qcom/msm8992.dtsi | 58 +++
 1 file changed, 58 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi 
b/arch/arm64/boot/dts/qcom/msm8992.dtsi
index 188fff2095f1..9b42ac42b171 100644
--- a/arch/arm64/boot/dts/qcom/msm8992.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
@@ -269,6 +269,28 @@ sdhc_1: sdhci@f9824900 {
status = "disabled";
};
 
+   sdhc_2: sdhci@f98a4900 {
+   compatible = "qcom,sdhci-msm-v4";
+   reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
+   reg-names = "hc_mem", "core_mem";
+
+   interrupts = ,
+   ;
+   interrupt-names = "hc_irq", "pwr_irq";
+
+   clocks = <&gcc GCC_SDCC2_APPS_CLK>,
+   <&gcc GCC_SDCC2_AHB_CLK>,
+   <&xo_board>;
+   clock-names = "core", "iface", "xo";
+
+   pinctrl-names = "default", "sleep";
+   pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
+   pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off 
&sdc2_data_off>;
+
+   bus-width = <4>;
+   status = "disabled";
+   };
+
blsp1_uart2: serial@f991e000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0xf991e000 0x1000>;
@@ -573,6 +595,42 @@ i2c13_sleep: i2c13-sleep {
drive-strength = <2>;
bias-disable;
};
+
+   sdc2_clk_on: sdc2-clk-on {
+   pins = "sdc2_clk";
+   bias-disable;
+   drive-strength = <16>;
+   };
+
+   sdc2_clk_off: sdc2-clk-off {
+   pins = "sdc2_clk";
+   bias-disable;
+   drive-strength = <2>;
+   };
+
+   sdc2_cmd_on: sdc2-cmd-on {
+   pins = "sdc2_cmd";
+   bias-pull-up;
+   drive-strength = <10>;
+   };
+
+   sdc2_cmd_off: sdc2-cmd-off {
+   pins = "sdc2_cmd";
+   bias-pull-up;
+   drive-strength = <2>;
+   };
+
+   sdc2_data_on: sdc2-data-on {
+   pins = "sdc2_data";
+   bias-pull-up;
+   drive-strength = <10>;
+   };
+
+   sdc2_data_off: sdc2-data-off {
+   pins = "sdc2_data";
+   bias-pull-up;
+   drive-strength = <2>;
+   };
};
};
 
-- 
2.27.0



[PATCH v2 09/10] clk: qcom: gcc-msm8994: Fix up the driver and modernize it

2020-07-29 Thread Konrad Dybcio
This change adds GDSCs, resets and most of the missing
clocks to the msm8994 GCC driver. The remaining ones
are of local_vote_clk and gate_clk type, which are not
yet supported upstream. Also reorder them to match the
original downstream driver.

Clocks have been switched from using parent_names to
parent_data, predefined "xo" has been removed in favour
of specifying it in the DT and the probe function has
been updated to use qcom_cc_really_probe.

Signed-off-by: Konrad Dybcio 
---
 drivers/clk/qcom/gcc-msm8994.c   | 800 ++-
 include/dt-bindings/clock/qcom,gcc-msm8994.h |  37 +
 2 files changed, 622 insertions(+), 215 deletions(-)

diff --git a/drivers/clk/qcom/gcc-msm8994.c b/drivers/clk/qcom/gcc-msm8994.c
index b7fc8c7ba195..ee6b2d7ac2a2 100644
--- a/drivers/clk/qcom/gcc-msm8994.c
+++ b/drivers/clk/qcom/gcc-msm8994.c
@@ -20,6 +20,7 @@
 #include "clk-rcg.h"
 #include "clk-branch.h"
 #include "reset.h"
+#include "gdsc.h"
 
 enum {
P_XO,
@@ -27,40 +28,6 @@ enum {
P_GPLL4,
 };
 
-static const struct parent_map gcc_xo_gpll0_map[] = {
-   { P_XO, 0 },
-   { P_GPLL0, 1 },
-};
-
-static const char * const gcc_xo_gpll0[] = {
-   "xo",
-   "gpll0",
-};
-
-static const struct parent_map gcc_xo_gpll0_gpll4_map[] = {
-   { P_XO, 0 },
-   { P_GPLL0, 1 },
-   { P_GPLL4, 5 },
-};
-
-static const char * const gcc_xo_gpll0_gpll4[] = {
-   "xo",
-   "gpll0",
-   "gpll4",
-};
-
-static struct clk_fixed_factor xo = {
-   .mult = 1,
-   .div = 1,
-   .hw.init = &(struct clk_init_data)
-   {
-   .name = "xo",
-   .parent_names = (const char *[]) { "xo_board" },
-   .num_parents = 1,
-   .ops = &clk_fixed_factor_ops,
-   },
-};
-
 static struct clk_alpha_pll gpll0_early = {
.offset = 0x0,
.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT],
@@ -117,6 +84,28 @@ static struct clk_alpha_pll_postdiv gpll4 = {
},
 };
 
+static const struct parent_map gcc_xo_gpll0_map[] = {
+   { P_XO, 0 },
+   { P_GPLL0, 1 },
+};
+
+static const struct clk_parent_data gcc_xo_gpll0[] = {
+   { .fw_name = "xo" },
+   { .hw = &gpll0.clkr.hw },
+};
+
+static const struct parent_map gcc_xo_gpll0_gpll4_map[] = {
+   { P_XO, 0 },
+   { P_GPLL0, 1 },
+   { P_GPLL4, 5 },
+};
+
+static const struct clk_parent_data gcc_xo_gpll0_gpll4[] = {
+   { .fw_name = "xo" },
+   { .hw = &gpll0.clkr.hw },
+   { .hw = &gpll4.clkr.hw },
+};
+
 static struct freq_tbl ftbl_ufs_axi_clk_src[] = {
F(5000, P_GPLL0, 12, 0, 0),
F(1, P_GPLL0, 6, 0, 0),
@@ -136,7 +125,7 @@ static struct clk_rcg2 ufs_axi_clk_src = {
.clkr.hw.init = &(struct clk_init_data)
{
.name = "ufs_axi_clk_src",
-   .parent_names = gcc_xo_gpll0,
+   .parent_data = gcc_xo_gpll0,
.num_parents = 2,
.ops = &clk_rcg2_ops,
},
@@ -157,7 +146,7 @@ static struct clk_rcg2 usb30_master_clk_src = {
.clkr.hw.init = &(struct clk_init_data)
{
.name = "usb30_master_clk_src",
-   .parent_names = gcc_xo_gpll0,
+   .parent_data = gcc_xo_gpll0,
.num_parents = 2,
.ops = &clk_rcg2_ops,
},
@@ -177,7 +166,7 @@ static struct clk_rcg2 blsp1_qup1_i2c_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data)
{
.name = "blsp1_qup1_i2c_apps_clk_src",
-   .parent_names = gcc_xo_gpll0,
+   .parent_data = gcc_xo_gpll0,
.num_parents = 2,
.ops = &clk_rcg2_ops,
},
@@ -205,7 +194,7 @@ static struct clk_rcg2 blsp1_qup1_spi_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data)
{
.name = "blsp1_qup1_spi_apps_clk_src",
-   .parent_names = gcc_xo_gpll0,
+   .parent_data = gcc_xo_gpll0,
.num_parents = 2,
.ops = &clk_rcg2_ops,
},
@@ -219,7 +208,7 @@ static struct clk_rcg2 blsp1_qup2_i2c_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data)
{
.name = "blsp1_qup2_i2c_apps_clk_src",
-   .parent_names = gcc_xo_gpll0,
+   .parent_data = gcc_xo_gpll0,
.num_parents = 2,
.ops = &clk_rcg2_ops,
},
@@ -234,7 +223,7 @@ static struct clk_rcg2 blsp1_qup2_spi_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data)
{
.name = "blsp1_qup2_spi_apps_clk_src",
-   .parent_names = gcc_xo_gpll0,
+   .parent_data = gcc_xo_gpll0,
.num_parents = 2,
.ops = &clk_rcg2_ops,
},
@@ -248,7 +237,7 @@ static struct clk_rcg2 blsp1_qup3_i2c_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data)
{
.name = "blsp1_qup3_i2c_apps_clk_src",
-  

Re: [V9fs-developer] [PATCH kernel] 9p/trans_fd: Check file mode at opening

2020-07-29 Thread Greg Kurz
On Wed, 29 Jul 2020 09:50:21 +1000
Alexey Kardashevskiy  wrote:

> 
> 
> On 29/07/2020 03:42, Greg Kurz wrote:
> > Hi Alexey,
> > 
> > Working on 9p now ?!? ;-)
> 
> No, I am running syzkaller and seeing things :)
> 

:)

> 
> > Cc'ing Dominique Martinet who appears to be the person who takes care of 9p
> > these days.
> > 
> > On Tue, 28 Jul 2020 22:41:29 +1000
> > Alexey Kardashevskiy  wrote:
> > 
> >> The "fd" transport layer uses 2 file descriptors passed externally
> >> and calls kernel_write()/kernel_read() on these. If files were opened
> >> without FMODE_WRITE/FMODE_READ, WARN_ON_ONCE() will fire.
> >>
> >> This adds file mode checking in p9_fd_open; this returns -EBADF to
> >> preserve the original behavior.
> >>
> > 
> > So this would cause open() to fail with EBADF, which might look a bit
> > weird to userspace since it didn't pass an fd... Is this to have a
> > different error than -EIO that is returned when either rfd or wfd
> > doesn't point to an open file descriptor ?
> 
> This is only to preserve the existing behavior.
> 
> > If yes, why do we care ?
> 
> 
> Without the patch, p9_fd_open() produces a kernel warning which is not
> great by itself and becomes crash with panic_on_warn.
> 

I don't question the patch, just the errno. Why not returning -EIO ?

> 
> 
> > 
> >> Found by syzkaller.
> >>
> >> Signed-off-by: Alexey Kardashevskiy 
> >> ---
> >>  net/9p/trans_fd.c | 7 ++-
> >>  1 file changed, 6 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/net/9p/trans_fd.c b/net/9p/trans_fd.c
> >> index 13cd683a658a..62cdfbd01f0a 100644
> >> --- a/net/9p/trans_fd.c
> >> +++ b/net/9p/trans_fd.c
> >> @@ -797,6 +797,7 @@ static int parse_opts(char *params, struct p9_fd_opts 
> >> *opts)
> >>  
> >>  static int p9_fd_open(struct p9_client *client, int rfd, int wfd)
> >>  {
> >> +  bool perm;
> >>struct p9_trans_fd *ts = kzalloc(sizeof(struct p9_trans_fd),
> >>   GFP_KERNEL);
> >>if (!ts)
> >> @@ -804,12 +805,16 @@ static int p9_fd_open(struct p9_client *client, int 
> >> rfd, int wfd)
> >>  
> >>ts->rd = fget(rfd);
> >>ts->wr = fget(wfd);
> >> -  if (!ts->rd || !ts->wr) {
> >> +  perm = ts->rd && (ts->rd->f_mode & FMODE_READ) &&
> >> + ts->wr && (ts->wr->f_mode & FMODE_WRITE);
> >> +  if (!ts->rd || !ts->wr || !perm) {
> >>if (ts->rd)
> >>fput(ts->rd);
> >>if (ts->wr)
> >>fput(ts->wr);
> >>kfree(ts);
> >> +  if (!perm)
> >> +  return -EBADF;
> >>return -EIO;
> >>}
> >>  
> > 
> 



[tip: sched/core] sched/uclamp: Fix a deadlock when enabling uclamp static key

2020-07-29 Thread tip-bot2 for Qais Yousef
The following commit has been merged into the sched/core branch of tip:

Commit-ID: e65855a52b479f98674998cb23b21ef5a8144b04
Gitweb:
https://git.kernel.org/tip/e65855a52b479f98674998cb23b21ef5a8144b04
Author:Qais Yousef 
AuthorDate:Thu, 16 Jul 2020 12:03:47 +01:00
Committer: Peter Zijlstra 
CommitterDate: Wed, 29 Jul 2020 13:51:47 +02:00

sched/uclamp: Fix a deadlock when enabling uclamp static key

The following splat was caught when setting uclamp value of a task:

  BUG: sleeping function called from invalid context at 
./include/linux/percpu-rwsem.h:49

   cpus_read_lock+0x68/0x130
   static_key_enable+0x1c/0x38
   __sched_setscheduler+0x900/0xad8

Fix by ensuring we enable the key outside of the critical section in
__sched_setscheduler()

Fixes: 46609ce22703 ("sched/uclamp: Protect uclamp fast path code with static 
key")
Signed-off-by: Qais Yousef 
Signed-off-by: Peter Zijlstra (Intel) 
Link: https://lkml.kernel.org/r/20200716110347.19553-4-qais.you...@arm.com
---
 kernel/sched/core.c | 11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 6782534..e44d83f 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -1346,6 +1346,15 @@ static int uclamp_validate(struct task_struct *p,
if (upper_bound > SCHED_CAPACITY_SCALE)
return -EINVAL;
 
+   /*
+* We have valid uclamp attributes; make sure uclamp is enabled.
+*
+* We need to do that here, because enabling static branches is a
+* blocking operation which obviously cannot be done while holding
+* scheduler locks.
+*/
+   static_branch_enable(&sched_uclamp_used);
+
return 0;
 }
 
@@ -1376,8 +1385,6 @@ static void __setscheduler_uclamp(struct task_struct *p,
if (likely(!(attr->sched_flags & SCHED_FLAG_UTIL_CLAMP)))
return;
 
-   static_branch_enable(&sched_uclamp_used);
-
if (attr->sched_flags & SCHED_FLAG_UTIL_CLAMP_MIN) {
uclamp_se_set(&p->uclamp_req[UCLAMP_MIN],
  attr->sched_util_min, true);


[tip: sched/core] sched/uclamp: Add a new sysctl to control RT default boost value

2020-07-29 Thread tip-bot2 for Qais Yousef
The following commit has been merged into the sched/core branch of tip:

Commit-ID: 13685c4a08fca9dd76bf53bfcbadc044ab2a08cb
Gitweb:
https://git.kernel.org/tip/13685c4a08fca9dd76bf53bfcbadc044ab2a08cb
Author:Qais Yousef 
AuthorDate:Thu, 16 Jul 2020 12:03:45 +01:00
Committer: Peter Zijlstra 
CommitterDate: Wed, 29 Jul 2020 13:51:47 +02:00

sched/uclamp: Add a new sysctl to control RT default boost value

RT tasks by default run at the highest capacity/performance level. When
uclamp is selected this default behavior is retained by enforcing the
requested uclamp.min (p->uclamp_req[UCLAMP_MIN]) of the RT tasks to be
uclamp_none(UCLAMP_MAX), which is SCHED_CAPACITY_SCALE; the maximum
value.

This is also referred to as 'the default boost value of RT tasks'.

See commit 1a00d71c ("sched/uclamp: Set default clamps for RT tasks").

On battery powered devices, it is desired to control this default
(currently hardcoded) behavior at runtime to reduce energy consumed by
RT tasks.

For example, a mobile device manufacturer where big.LITTLE architecture
is dominant, the performance of the little cores varies across SoCs, and
on high end ones the big cores could be too power hungry.

Given the diversity of SoCs, the new knob allows manufactures to tune
the best performance/power for RT tasks for the particular hardware they
run on.

They could opt to further tune the value when the user selects
a different power saving mode or when the device is actively charging.

The runtime aspect of it further helps in creating a single kernel image
that can be run on multiple devices that require different tuning.

Keep in mind that a lot of RT tasks in the system are created by the
kernel. On Android for instance I can see over 50 RT tasks, only
a handful of which created by the Android framework.

To control the default behavior globally by system admins and device
integrator, introduce the new sysctl_sched_uclamp_util_min_rt_default
to change the default boost value of the RT tasks.

I anticipate this to be mostly in the form of modifying the init script
of a particular device.

To avoid polluting the fast path with unnecessary code, the approach
taken is to synchronously do the update by traversing all the existing
tasks in the system. This could race with a concurrent fork(), which is
dealt with by introducing sched_post_fork() function which will ensure
the racy fork will get the right update applied.

Tested on Juno-r2 in combination with the RT capacity awareness [1].
By default an RT task will go to the highest capacity CPU and run at the
maximum frequency, which is particularly energy inefficient on high end
mobile devices because the biggest core[s] are 'huge' and power hungry.

With this patch the RT task can be controlled to run anywhere by
default, and doesn't cause the frequency to be maximum all the time.
Yet any task that really needs to be boosted can easily escape this
default behavior by modifying its requested uclamp.min value
(p->uclamp_req[UCLAMP_MIN]) via sched_setattr() syscall.

[1] 804d402fb6f6: ("sched/rt: Make RT capacity-aware")

Signed-off-by: Qais Yousef 
Signed-off-by: Peter Zijlstra (Intel) 
Link: https://lkml.kernel.org/r/20200716110347.19553-2-qais.you...@arm.com
---
 include/linux/sched.h|  10 ++-
 include/linux/sched/sysctl.h |   1 +-
 include/linux/sched/task.h   |   1 +-
 kernel/fork.c|   1 +-
 kernel/sched/core.c  | 119 --
 kernel/sysctl.c  |   7 ++-
 6 files changed, 131 insertions(+), 8 deletions(-)

diff --git a/include/linux/sched.h b/include/linux/sched.h
index adf0125..a6bf77c 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -686,9 +686,15 @@ struct task_struct {
struct sched_dl_entity  dl;
 
 #ifdef CONFIG_UCLAMP_TASK
-   /* Clamp values requested for a scheduling entity */
+   /*
+* Clamp values requested for a scheduling entity.
+* Must be updated with task_rq_lock() held.
+*/
struct uclamp_seuclamp_req[UCLAMP_CNT];
-   /* Effective clamp values used for a scheduling entity */
+   /*
+* Effective clamp values used for a scheduling entity.
+* Must be updated with task_rq_lock() held.
+*/
struct uclamp_seuclamp[UCLAMP_CNT];
 #endif
 
diff --git a/include/linux/sched/sysctl.h b/include/linux/sched/sysctl.h
index 24be30a..3c31ba8 100644
--- a/include/linux/sched/sysctl.h
+++ b/include/linux/sched/sysctl.h
@@ -67,6 +67,7 @@ extern unsigned int sysctl_sched_dl_period_min;
 #ifdef CONFIG_UCLAMP_TASK
 extern unsigned int sysctl_sched_uclamp_util_min;
 extern unsigned int sysctl_sched_uclamp_util_max;
+extern unsigned int sysctl_sched_uclamp_util_min_rt_default;
 #endif
 
 #ifdef CONFIG_CFS_BANDWIDTH
diff --git a/include/linux/sched/task.h b/include/linux/sched/task.h
index 3835907..e7ddab0 100644
--- a/include/linux/sched/task.h
+++ b/include/

[tip: sched/core] Documentation/sysctl: Document uclamp sysctl knobs

2020-07-29 Thread tip-bot2 for Qais Yousef
The following commit has been merged into the sched/core branch of tip:

Commit-ID: 1f73d1abe5836bd8ffe747ff5cb7561b17ce5bc6
Gitweb:
https://git.kernel.org/tip/1f73d1abe5836bd8ffe747ff5cb7561b17ce5bc6
Author:Qais Yousef 
AuthorDate:Thu, 16 Jul 2020 12:03:46 +01:00
Committer: Peter Zijlstra 
CommitterDate: Wed, 29 Jul 2020 13:51:48 +02:00

Documentation/sysctl: Document uclamp sysctl knobs

Uclamp exposes 3 sysctl knobs:

* sched_util_clamp_min
* sched_util_clamp_max
* sched_util_clamp_min_rt_default

Document them in sysctl/kernel.rst.

Signed-off-by: Qais Yousef 
Signed-off-by: Peter Zijlstra (Intel) 
Link: https://lkml.kernel.org/r/20200716110347.19553-3-qais.you...@arm.com
---
 Documentation/admin-guide/sysctl/kernel.rst | 54 -
 1 file changed, 54 insertions(+)

diff --git a/Documentation/admin-guide/sysctl/kernel.rst 
b/Documentation/admin-guide/sysctl/kernel.rst
index 83acf50..55bf6b4 100644
--- a/Documentation/admin-guide/sysctl/kernel.rst
+++ b/Documentation/admin-guide/sysctl/kernel.rst
@@ -1062,6 +1062,60 @@ Enables/disables scheduler statistics. Enabling this 
feature
 incurs a small amount of overhead in the scheduler but is
 useful for debugging and performance tuning.
 
+sched_util_clamp_min:
+=
+
+Max allowed *minimum* utilization.
+
+Default value is 1024, which is the maximum possible value.
+
+It means that any requested uclamp.min value cannot be greater than
+sched_util_clamp_min, i.e., it is restricted to the range
+[0:sched_util_clamp_min].
+
+sched_util_clamp_max:
+=
+
+Max allowed *maximum* utilization.
+
+Default value is 1024, which is the maximum possible value.
+
+It means that any requested uclamp.max value cannot be greater than
+sched_util_clamp_max, i.e., it is restricted to the range
+[0:sched_util_clamp_max].
+
+sched_util_clamp_min_rt_default:
+
+
+By default Linux is tuned for performance. Which means that RT tasks always run
+at the highest frequency and most capable (highest capacity) CPU (in
+heterogeneous systems).
+
+Uclamp achieves this by setting the requested uclamp.min of all RT tasks to
+1024 by default, which effectively boosts the tasks to run at the highest
+frequency and biases them to run on the biggest CPU.
+
+This knob allows admins to change the default behavior when uclamp is being
+used. In battery powered devices particularly, running at the maximum
+capacity and frequency will increase energy consumption and shorten the battery
+life.
+
+This knob is only effective for RT tasks which the user hasn't modified their
+requested uclamp.min value via sched_setattr() syscall.
+
+This knob will not escape the range constraint imposed by sched_util_clamp_min
+defined above.
+
+For example if
+
+   sched_util_clamp_min_rt_default = 800
+   sched_util_clamp_min = 600
+
+Then the boost will be clamped to 600 because 800 is outside of the permissible
+range of [0:600]. This could happen for instance if a powersave mode will
+restrict all boosts temporarily by modifying sched_util_clamp_min. As soon as
+this restriction is lifted, the requested sched_util_clamp_min_rt_default
+will take effect.
 
 seccomp
 ===


[PATCH v5 1/4] dt-bindings: power: Add BQ27z561 compatible

2020-07-29 Thread Dan Murphy
Add the Texas Instruments bq27z561 battery monitor to the bq27xxx
binding.

Acked-by: Rob Herring 
Signed-off-by: Dan Murphy 
---

v5 - Rebased on power-next and changed bq27561->bq27z561

 Documentation/devicetree/bindings/power/supply/bq27xxx.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml 
b/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml
index 03d1020a2e47..0aa33590ac24 100644
--- a/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml
+++ b/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml
@@ -49,6 +49,7 @@ properties:
   - ti,bq27426
   - ti,bq27441
   - ti,bq27621
+  - ti,bq27z561
 
   reg:
 maxItems: 1
-- 
2.28.0



Re: [PATCH v2 09/10] clk: qcom: gcc-msm8994: Fix up the driver and modernize it

2020-07-29 Thread Konrad Dybcio
Wouldn't be myself if I didn't forget that

Fixes: aec89f78cf01 (clk: qcom: Add support for msm8994 global clock controller)

Konrad


Re: [PATCHv2] staging/speakup: Move out of staging

2020-07-29 Thread Greg KH
On Wed, Jul 29, 2020 at 02:35:31AM +0200, Samuel Thibault wrote:
> The nasty TODO items are done.
> 
> Signed-off-by: Samuel Thibault 

Now applied, thanks for all of the work so far.

I will be glad to merge patches for this subsystem to Linus if you want
me to collect them.  If so, feel free to forward them on to me, or send
me a pull request.

thanks,

greg k-h


[PATCH v5 3/4] dt-bindings: power: Add BQ28z610 compatible

2020-07-29 Thread Dan Murphy
Add the Texas Instruments bq28z610 battery monitor to the bq27xxx
binding.

Acked-by: Rob Herring 
Signed-off-by: Dan Murphy 
---
 Documentation/devicetree/bindings/power/supply/bq27xxx.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml 
b/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml
index 0aa33590ac24..82f682705f44 100644
--- a/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml
+++ b/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml
@@ -50,6 +50,7 @@ properties:
   - ti,bq27441
   - ti,bq27621
   - ti,bq27z561
+  - ti,bq28z610
 
   reg:
 maxItems: 1
-- 
2.28.0



[PATCH v5 2/4] power: supply: bq27xxx_battery: Add the BQ27z561 Battery monitor

2020-07-29 Thread Dan Murphy
Add the Texas Instruments BQ27z561 battery monitor.  The register address
map is laid out the same as compared to other devices within the file.
The battery status register has differing bits to determine if the
battery is full, discharging or dead.

Signed-off-by: Dan Murphy 
---
 drivers/power/supply/bq27xxx_battery.c | 69 +-
 drivers/power/supply/bq27xxx_battery_i2c.c |  2 +
 include/linux/power/bq27xxx_battery.h  |  1 +
 3 files changed, 71 insertions(+), 1 deletion(-)

diff --git a/drivers/power/supply/bq27xxx_battery.c 
b/drivers/power/supply/bq27xxx_battery.c
index acaafed037be..a858e3b2a0ee 100644
--- a/drivers/power/supply/bq27xxx_battery.c
+++ b/drivers/power/supply/bq27xxx_battery.c
@@ -18,6 +18,7 @@
  * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
  *
  * Datasheets:
+<<< HEAD
  * https://www.ti.com/product/bq27000
  * https://www.ti.com/product/bq27200
  * https://www.ti.com/product/bq27010
@@ -43,6 +44,7 @@
  * https://www.ti.com/product/bq27411-g1
  * https://www.ti.com/product/bq27441-g1
  * https://www.ti.com/product/bq27621-g1
+ * https://www.ti.com/lit/gpn/bq27z561
  */
 
 #include 
@@ -79,6 +81,11 @@
 #define BQ27000_FLAG_FCBIT(5)
 #define BQ27000_FLAG_CHGS  BIT(7) /* Charge state flag */
 
+/* BQ27Z561 has different layout for Flags register */
+#define BQ27Z561_FLAG_FDC  BIT(4) /* Battery fully discharged */
+#define BQ27Z561_FLAG_FC   BIT(5) /* Battery fully charged */
+#define BQ27Z561_FLAG_DIS_CH   BIT(6) /* Battery is discharging */
+
 /* control register params */
 #define BQ27XXX_SEALED 0x20
 #define BQ27XXX_SET_CFGUPDATE  0x13
@@ -431,12 +438,32 @@ static u8
[BQ27XXX_REG_DCAP] = 0x3c,
[BQ27XXX_REG_AP] = 0x18,
BQ27XXX_DM_REG_ROWS,
-   };
+   },
 #define bq27411_regs bq27421_regs
 #define bq27425_regs bq27421_regs
 #define bq27426_regs bq27421_regs
 #define bq27441_regs bq27421_regs
 #define bq27621_regs bq27421_regs
+   bq27z561_regs[BQ27XXX_REG_MAX] = {
+   [BQ27XXX_REG_CTRL] = 0x00,
+   [BQ27XXX_REG_TEMP] = 0x06,
+   [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
+   [BQ27XXX_REG_VOLT] = 0x08,
+   [BQ27XXX_REG_AI] = 0x14,
+   [BQ27XXX_REG_FLAGS] = 0x0a,
+   [BQ27XXX_REG_TTE] = 0x16,
+   [BQ27XXX_REG_TTF] = 0x18,
+   [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
+   [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
+   [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
+   [BQ27XXX_REG_FCC] = 0x12,
+   [BQ27XXX_REG_CYCT] = 0x2a,
+   [BQ27XXX_REG_AE] = 0x22,
+   [BQ27XXX_REG_SOC] = 0x2c,
+   [BQ27XXX_REG_DCAP] = 0x3c,
+   [BQ27XXX_REG_AP] = 0x22,
+   BQ27XXX_DM_REG_ROWS,
+   };
 
 static enum power_supply_property bq27000_props[] = {
POWER_SUPPLY_PROP_STATUS,
@@ -672,6 +699,25 @@ static enum power_supply_property bq27421_props[] = {
 #define bq27441_props bq27421_props
 #define bq27621_props bq27421_props
 
+static enum power_supply_property bq27z561_props[] = {
+   POWER_SUPPLY_PROP_STATUS,
+   POWER_SUPPLY_PROP_PRESENT,
+   POWER_SUPPLY_PROP_VOLTAGE_NOW,
+   POWER_SUPPLY_PROP_CURRENT_NOW,
+   POWER_SUPPLY_PROP_CAPACITY,
+   POWER_SUPPLY_PROP_CAPACITY_LEVEL,
+   POWER_SUPPLY_PROP_TEMP,
+   POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
+   POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
+   POWER_SUPPLY_PROP_TECHNOLOGY,
+   POWER_SUPPLY_PROP_CHARGE_FULL,
+   POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
+   POWER_SUPPLY_PROP_CYCLE_COUNT,
+   POWER_SUPPLY_PROP_POWER_AVG,
+   POWER_SUPPLY_PROP_HEALTH,
+   POWER_SUPPLY_PROP_MANUFACTURER,
+};
+
 struct bq27xxx_dm_reg {
u8 subclass_id;
u8 offset;
@@ -767,11 +813,14 @@ static struct bq27xxx_dm_reg bq27621_dm_regs[] = {
 #define bq27621_dm_regs 0
 #endif
 
+#define bq27z561_dm_regs 0
+
 #define BQ27XXX_O_ZERO 0x0001
 #define BQ27XXX_O_OTDC 0x0002 /* has OTC/OTD overtemperature flags */
 #define BQ27XXX_O_UTOT  0x0004 /* has OT overtemperature flag */
 #define BQ27XXX_O_CFGUP0x0008
 #define BQ27XXX_O_RAM  0x0010
+#define BQ27Z561_O_BITS0x0020
 
 #define BQ27XXX_DATA(ref, key, opt) {  \
.opts = (opt),  \
@@ -816,6 +865,7 @@ static struct {
[BQ27426]   = BQ27XXX_DATA(bq27426,   0x80008000, BQ27XXX_O_UTOT | 
BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
[BQ27441]   = BQ27XXX_DATA(bq27441,   0x80008000, BQ27XXX_O_UTOT | 
BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
[BQ27621]   = BQ27XXX_DATA(bq27621,   0x80008000, BQ27XXX_O_UTOT | 
BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
+   [BQ27Z561]  = BQ27XXX_DATA(bq27z561,   0 , BQ27Z561_O_BITS),
 };
 
 static DEFINE_MUTEX(bq27xxx_list_lock);
@@ -1551,6 +1601,8 @@ static bool bq27xxx_battery_dead(struct 

[PATCH v5 4/4] power: supply: bq27xxx_battery: Add the BQ28z610 Battery monitor

2020-07-29 Thread Dan Murphy
Add the Texas Instruments BQ28z610 battery monitor.
The register address map is laid out the same as compared to other
devices within the file.

The battery status register bits are similar to the bq27z561 but they
are different compared to other fuel gauge devices within this file.

Signed-off-by: Dan Murphy 
---
 drivers/power/supply/bq27xxx_battery.c | 43 +-
 drivers/power/supply/bq27xxx_battery_i2c.c |  2 +
 include/linux/power/bq27xxx_battery.h  |  1 +
 3 files changed, 45 insertions(+), 1 deletion(-)

diff --git a/drivers/power/supply/bq27xxx_battery.c 
b/drivers/power/supply/bq27xxx_battery.c
index a858e3b2a0ee..5c3917b96a57 100644
--- a/drivers/power/supply/bq27xxx_battery.c
+++ b/drivers/power/supply/bq27xxx_battery.c
@@ -18,7 +18,6 @@
  * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
  *
  * Datasheets:
-<<< HEAD
  * https://www.ti.com/product/bq27000
  * https://www.ti.com/product/bq27200
  * https://www.ti.com/product/bq27010
@@ -45,6 +44,7 @@
  * https://www.ti.com/product/bq27441-g1
  * https://www.ti.com/product/bq27621-g1
  * https://www.ti.com/lit/gpn/bq27z561
+ * https://www.ti.com/lit/gpn/bq28z610
  */
 
 #include 
@@ -463,6 +463,26 @@ static u8
[BQ27XXX_REG_DCAP] = 0x3c,
[BQ27XXX_REG_AP] = 0x22,
BQ27XXX_DM_REG_ROWS,
+   },
+   bq28z610_regs[BQ27XXX_REG_MAX] = {
+   [BQ27XXX_REG_CTRL] = 0x00,
+   [BQ27XXX_REG_TEMP] = 0x06,
+   [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
+   [BQ27XXX_REG_VOLT] = 0x08,
+   [BQ27XXX_REG_AI] = 0x14,
+   [BQ27XXX_REG_FLAGS] = 0x0a,
+   [BQ27XXX_REG_TTE] = 0x16,
+   [BQ27XXX_REG_TTF] = 0x18,
+   [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
+   [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
+   [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
+   [BQ27XXX_REG_FCC] = 0x12,
+   [BQ27XXX_REG_CYCT] = 0x2a,
+   [BQ27XXX_REG_AE] = 0x22,
+   [BQ27XXX_REG_SOC] = 0x2c,
+   [BQ27XXX_REG_DCAP] = 0x3c,
+   [BQ27XXX_REG_AP] = 0x22,
+   BQ27XXX_DM_REG_ROWS,
};
 
 static enum power_supply_property bq27000_props[] = {
@@ -718,6 +738,25 @@ static enum power_supply_property bq27z561_props[] = {
POWER_SUPPLY_PROP_MANUFACTURER,
 };
 
+static enum power_supply_property bq28z610_props[] = {
+   POWER_SUPPLY_PROP_STATUS,
+   POWER_SUPPLY_PROP_PRESENT,
+   POWER_SUPPLY_PROP_VOLTAGE_NOW,
+   POWER_SUPPLY_PROP_CURRENT_NOW,
+   POWER_SUPPLY_PROP_CAPACITY,
+   POWER_SUPPLY_PROP_CAPACITY_LEVEL,
+   POWER_SUPPLY_PROP_TEMP,
+   POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
+   POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
+   POWER_SUPPLY_PROP_TECHNOLOGY,
+   POWER_SUPPLY_PROP_CHARGE_FULL,
+   POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
+   POWER_SUPPLY_PROP_CYCLE_COUNT,
+   POWER_SUPPLY_PROP_POWER_AVG,
+   POWER_SUPPLY_PROP_HEALTH,
+   POWER_SUPPLY_PROP_MANUFACTURER,
+};
+
 struct bq27xxx_dm_reg {
u8 subclass_id;
u8 offset;
@@ -814,6 +853,7 @@ static struct bq27xxx_dm_reg bq27621_dm_regs[] = {
 #endif
 
 #define bq27z561_dm_regs 0
+#define bq28z610_dm_regs 0
 
 #define BQ27XXX_O_ZERO 0x0001
 #define BQ27XXX_O_OTDC 0x0002 /* has OTC/OTD overtemperature flags */
@@ -866,6 +906,7 @@ static struct {
[BQ27441]   = BQ27XXX_DATA(bq27441,   0x80008000, BQ27XXX_O_UTOT | 
BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
[BQ27621]   = BQ27XXX_DATA(bq27621,   0x80008000, BQ27XXX_O_UTOT | 
BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
[BQ27Z561]  = BQ27XXX_DATA(bq27z561,   0 , BQ27Z561_O_BITS),
+   [BQ28Z610]  = BQ27XXX_DATA(bq28z610,  0 , BQ27Z561_O_BITS),
 };
 
 static DEFINE_MUTEX(bq27xxx_list_lock);
diff --git a/drivers/power/supply/bq27xxx_battery_i2c.c 
b/drivers/power/supply/bq27xxx_battery_i2c.c
index 15f4e75786ab..ab02456d69e5 100644
--- a/drivers/power/supply/bq27xxx_battery_i2c.c
+++ b/drivers/power/supply/bq27xxx_battery_i2c.c
@@ -254,6 +254,7 @@ static const struct i2c_device_id bq27xxx_i2c_id_table[] = {
{ "bq27441", BQ27441 },
{ "bq27621", BQ27621 },
{ "bq27z561", BQ27Z561 },
+   { "bq28z610", BQ28Z610 },
{},
 };
 MODULE_DEVICE_TABLE(i2c, bq27xxx_i2c_id_table);
@@ -288,6 +289,7 @@ static const struct of_device_id 
bq27xxx_battery_i2c_of_match_table[] = {
{ .compatible = "ti,bq27441" },
{ .compatible = "ti,bq27621" },
{ .compatible = "ti,bq27z561" },
+   { .compatible = "ti,bq28z610" },
{},
 };
 MODULE_DEVICE_TABLE(of, bq27xxx_battery_i2c_of_match_table);
diff --git a/include/linux/power/bq27xxx_battery.h 
b/include/linux/power/bq27xxx_battery.h
index 1f6ea5d5063d..987d9652aa4e 100644
--- a/include/linux/power/bq27xxx_battery.h
+++ b/include/linux/power/bq27xxx_battery.h
@@ -31,6 +31,7 @@ enum bq27xxx_chip {
BQ27441,

[PATCH 00/17] Add BLK_CTRL support for i.MX8MP

2020-07-29 Thread Abel Vesa
The BLK_CTRL according to HW design is basically the wrapper of the entire
function specific group of IPs and holds GPRs that usually cannot be placed
into one specific IP from that group. Some of these GPRs are used to control
some clocks, other some resets, others some very specific function that does
not fit into clocks or resets. Since the clocks are registered using the i.MX
clock subsystem API, the driver is placed into the clock subsystem, but it
also registers the resets. For the other functionalities that other GPRs might
have, the syscon is used.

Abel Vesa (17):
  dt-bindings: clocks: imx8mp: Rename audiomix ids clocks to
audio_blk_ctrl
  dt-bindings: reset: imx8mp: Add audio blk_ctrl reset IDs
  dt-bindings: clock: imx8mp: Add ids for the audio shared gate
  dt-bindings: clock: imx8mp: Add media blk_ctrl clock IDs
  dt-bindings: reset: imx8mp: Add media blk_ctrl reset IDs
  dt-bindings: clock: imx8mp: Add hdmi blk_ctrl clock IDs
  dt-bindings: reset: imx8mp: Add hdmi blk_ctrl reset IDs
  clk: imx8mp: Add audio shared gate
  arm64: dts: Remove imx-hdmimix-reset header file
  Documentation: bindings: clk: Add bindings for i.MX BLK_CTRL
  clk: imx: Add blk_ctrl combo driver
  clk: imx8mp: Add audio blk_ctrl clocks and resets
  clk: imx8mp: Add hdmi blk_ctrl clocks and resets
  clk: imx8mp: Add media blk_ctrl clocks and resets
  arm64: dts: imx8mp: Add audio_blk_ctrl node
  arm64: dts: imx8mp: Add media_blk_ctrl node
  arm64: dts: imx8mp: Add hdmi_blk_ctrl node

 .../bindings/clock/fsl,imx-blk-ctrl.yaml   |  55 
 arch/arm64/boot/dts/freescale/imx8mp.dtsi  |  44 +++
 drivers/clk/imx/Makefile   |   2 +-
 drivers/clk/imx/clk-blk-ctrl.c | 330 +
 drivers/clk/imx/clk-blk-ctrl.h |  81 +
 drivers/clk/imx/clk-imx8mp.c   | 281 +-
 include/dt-bindings/clock/imx8mp-clock.h   | 200 +
 include/dt-bindings/reset/imx8mp-reset.h   |  45 +++
 8 files changed, 975 insertions(+), 63 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/clock/fsl,imx-blk-ctrl.yaml
 create mode 100644 drivers/clk/imx/clk-blk-ctrl.c
 create mode 100644 drivers/clk/imx/clk-blk-ctrl.h

-- 
2.7.4



[PATCH 13/17] clk: imx8mp: Add hdmi blk_ctrl clocks and resets

2020-07-29 Thread Abel Vesa
Add hdmi blk_ctrl clocks and resets in the i.MX8MP clock
driver to be picked up by the clk-blk-ctrl driver.

Signed-off-by: Abel Vesa 
---
 drivers/clk/imx/clk-blk-ctrl.c |  4 +++
 drivers/clk/imx/clk-imx8mp.c   | 63 ++
 2 files changed, 67 insertions(+)

diff --git a/drivers/clk/imx/clk-blk-ctrl.c b/drivers/clk/imx/clk-blk-ctrl.c
index 67cf223..cee7298 100644
--- a/drivers/clk/imx/clk-blk-ctrl.c
+++ b/drivers/clk/imx/clk-blk-ctrl.c
@@ -307,6 +307,10 @@ static const struct of_device_id imx_blk_ctrl_of_match[] = 
{
.compatible = "fsl,imx8mp-audio-blk-ctrl",
.data = &imx8mp_audio_blk_ctrl_dev_data
},
+   {
+   .compatible = "fsl,imx8mp-hdmi-blk-ctrl",
+   .data = &imx8mp_hdmi_blk_ctrl_dev_data
+   },
{ /* Sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, imx_blk_ctrl_of_match);
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 00e7f5e..6b0f4ef 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -66,6 +66,61 @@ static const char * const imx_pdm_sels[] = {"pdm_root", 
"sai_pll_div2", "dummy",
 static const char * const imx_sai_pll_ref_sels[] = {"osc_24m", "dummy", 
"dummy", "dummy", };
 static const char * const imx_sai_pll_bypass_sels[] = {"sai_pll", 
"sai_pll_ref_sel", };
 
+static const char * const imx_hdmi_phy_clks_sels[] = {"hdmi_glb_24m", "dummy", 
};
+static const char * const imx_lcdif_clks_sels[] = {"dummy", "hdmi_glb_pix", };
+static const char * const imx_hdmi_pipe_clks_sels[] = {"dummy", 
"hdmi_glb_pix", };
+
+static struct imx_blk_ctrl_hw imx8mp_hdmi_blk_ctrl_hws[] = {
+   /* clocks */
+   IMX_BLK_CTRL_CLK_GATE("hdmi_glb_apb", 
IMX8MP_CLK_HDMI_BLK_CTRL_GLOBAL_APB_CLK, 0x40, 0, "hdmi_apb"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_glb_b", 
IMX8MP_CLK_HDMI_BLK_CTRL_GLOBAL_B_CLK, 0x40, 1, "hdmi_axi"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_glb_ref_266m", 
IMX8MP_CLK_HDMI_BLK_CTRL_GLOBAL_REF266M_CLK, 0x40, 2, "hdmi_ref_266m"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_glb_24m", 
IMX8MP_CLK_HDMI_BLK_CTRL_GLOBAL_XTAL24M_CLK, 0x40, 4, "hdmi_24m"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_glb_32k", 
IMX8MP_CLK_HDMI_BLK_CTRL_GLOBAL_XTAL32K_CLK, 0x40, 5, "osc_32k"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_glb_pix", 
IMX8MP_CLK_HDMI_BLK_CTRL_GLOBAL_TX_PIX_CLK, 0x40, 7, "hdmi_phy"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_irq_steer", 
IMX8MP_CLK_HDMI_BLK_CTRL_IRQS_STEER_CLK, 0x40, 9, "hdmi_glb_apb"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_noc", 
IMX8MP_CLK_HDMI_BLK_CTRL_NOC_HDMI_CLK, 0x40, 10, "hdmi_glb_apb"),
+   IMX_BLK_CTRL_CLK_GATE("hdcp_noc", 
IMX8MP_CLK_HDMI_BLK_CTRL_NOC_HDCP_CLK, 0x40, 11,  "hdmi_glb_apb"),
+   IMX_BLK_CTRL_CLK_GATE("lcdif3_apb", 
IMX8MP_CLK_HDMI_BLK_CTRL_LCDIF_APB_CLK, 0x40, 16, "hdmi_glb_apb"),
+   IMX_BLK_CTRL_CLK_GATE("lcdif3_b", IMX8MP_CLK_HDMI_BLK_CTRL_LCDIF_B_CLK, 
0x40, 17, "hdmi_glb_b"),
+   IMX_BLK_CTRL_CLK_GATE("lcdif3_pdi", 
IMX8MP_CLK_HDMI_BLK_CTRL_LCDIF_PDI_CLK, 0x40, 18, "hdmi_glb_apb"),
+   IMX_BLK_CTRL_CLK_GATE("lcdif3_pxl", 
IMX8MP_CLK_HDMI_BLK_CTRL_LCDIF_PIX_CLK, 0x40, 19, "hdmi_glb_pix"),
+   IMX_BLK_CTRL_CLK_GATE("lcdif3_spu", 
IMX8MP_CLK_HDMI_BLK_CTRL_LCDIF_SPU_CLK, 0x40, 20, "hdmi_glb_apb"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_fdcc_ref", 
IMX8MP_CLK_HDMI_BLK_CTRL_FDCC_REF_CLK, 0x50, 2, "hdmi_fdcc_tst"),
+   IMX_BLK_CTRL_CLK_GATE("hrv_mwr_apb", 
IMX8MP_CLK_HDMI_BLK_CTRL_HRV_MWR_APB_CLK, 0x50, 3, "hdmi_glb_apb"),
+   IMX_BLK_CTRL_CLK_GATE("hrv_mwr_b", 
IMX8MP_CLK_HDMI_BLK_CTRL_HRV_MWR_B_CLK, 0x50, 4, "hdmi_glb_axi"),
+   IMX_BLK_CTRL_CLK_GATE("hrv_mwr_cea", 
IMX8MP_CLK_HDMI_BLK_CTRL_HRV_MWR_CEA_CLK, 0x50, 5, "hdmi_glb_apb"),
+   IMX_BLK_CTRL_CLK_GATE("vsfd_cea", 
IMX8MP_CLK_HDMI_BLK_CTRL_VSFD_CEA_CLK, 0x50, 6, "hdmi_glb_apb"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_tx_hpi", 
IMX8MP_CLK_HDMI_BLK_CTRL_TX_HPI_CLK, 0x50, 13, "hdmi_glb_apb"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_tx_apb", 
IMX8MP_CLK_HDMI_BLK_CTRL_TX_APB_CLK, 0x50, 14, "hdmi_glb_apb"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_cec", IMX8MP_CLK_HDMI_BLK_CTRL_TX_CEC_CLK, 
0x50, 15, "hdmi_glb_32k"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_esm", IMX8MP_CLK_HDMI_BLK_CTRL_TX_ESM_CLK, 
0x50, 16, "hdmi_glb_ref_266m"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_tx_gpa", 
IMX8MP_CLK_HDMI_BLK_CTRL_TX_GPA_CLK, 0x50, 17, "hdmi_glb_apb"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_tx_pix", 
IMX8MP_CLK_HDMI_BLK_CTRL_TX_PIXEL_CLK, 0x50, 18, "hdmi_glb_pix"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_tx_sfr", 
IMX8MP_CLK_HDMI_BLK_CTRL_TX_SFR_CLK, 0x50, 19, "hdmi_glb_apb"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_tx_skp", 
IMX8MP_CLK_HDMI_BLK_CTRL_TX_SKP_CLK, 0x50, 20, "hdmi_glb_apb"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_tx_prep", 
IMX8MP_CLK_HDMI_BLK_CTRL_TX_PREP_CLK, 0x50, 21, "hdmi_glb_apb"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_phy_apb", 
IMX8MP_CLK_HDMI_BLK_CTRL_TX_PHY_APB_CLK, 0x50, 22, "hdmi_glb_apb"),
+   IMX_BLK_CTRL_CLK_GATE("hdmi_phy_int", 
IMX8MP_CLK_HDMI_BLK_

[PATCH 05/17] dt-bindings: reset: imx8mp: Add media blk_ctrl reset IDs

2020-07-29 Thread Abel Vesa
These will be used by the imx8mp for blk-ctrl driver.

Signed-off-by: Abel Vesa 
---
 include/dt-bindings/reset/imx8mp-reset.h | 28 
 1 file changed, 28 insertions(+)

diff --git a/include/dt-bindings/reset/imx8mp-reset.h 
b/include/dt-bindings/reset/imx8mp-reset.h
index fca0c9bff..13e56dd 100644
--- a/include/dt-bindings/reset/imx8mp-reset.h
+++ b/include/dt-bindings/reset/imx8mp-reset.h
@@ -52,4 +52,32 @@
 
 #define IMX8MP_AUDIO_BLK_CTRL_RESET_NUM2
 
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_MIPI_DSI_PCLK  0
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_MIPI_DSI_CLKREF1
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_MIPI_CSI_PCLK  2
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_MIPI_CSI_ACLK  3
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_LCDIF_PIXEL4
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_LCDIF_APB  5
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_ISI_PROC   6
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_ISI_APB7
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_BUS_BLK8
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_MIPI_CSI2_PCLK 9
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_MIPI_CSI2_ACLK 10
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_LCDIF2_PIXEL   11
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_LCDIF2_APB 12
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_ISP1_COR   13
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_ISP1_AXI   14
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_ISP1_AHB   15
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_ISP0_COR   16
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_ISP0_AXI   17
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_ISP0_AHB   18
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_DWE_COR19
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_DWE_AXI20
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_DWE_AHB21
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_MIPI_DSI2  22
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_LCDIF_AXI  23
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_LCDIF2_AXI 24
+
+#define IMX8MP_MEDIA_BLK_CTRL_RESET_NUM25
+
 #endif
-- 
2.7.4



[PATCH 01/17] dt-bindings: clocks: imx8mp: Rename audiomix ids clocks to audio_blk_ctrl

2020-07-29 Thread Abel Vesa
In the reference manual the actual name is Audio BLK_CTRL.
Lets make it more obvious here by renaming from audiomix to audio_blk_ctrl.

Signed-off-by: Abel Vesa 
---
 include/dt-bindings/clock/imx8mp-clock.h | 120 +++
 1 file changed, 60 insertions(+), 60 deletions(-)

diff --git a/include/dt-bindings/clock/imx8mp-clock.h 
b/include/dt-bindings/clock/imx8mp-clock.h
index 7a23f28..6008f32 100644
--- a/include/dt-bindings/clock/imx8mp-clock.h
+++ b/include/dt-bindings/clock/imx8mp-clock.h
@@ -324,66 +324,66 @@
 
 #define IMX8MP_CLK_END 313
 
-#define IMX8MP_CLK_AUDIOMIX_SAI1_IPG   0
-#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1
-#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2 2
-#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK3 3
-#define IMX8MP_CLK_AUDIOMIX_SAI2_IPG   4
-#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1 5
-#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2 6
-#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK3 7
-#define IMX8MP_CLK_AUDIOMIX_SAI3_IPG   8
-#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1 9
-#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2 10
-#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK3 11
-#define IMX8MP_CLK_AUDIOMIX_SAI5_IPG   12
-#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1 13
-#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2 14
-#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK3 15
-#define IMX8MP_CLK_AUDIOMIX_SAI6_IPG   16
-#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1 17
-#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2 18
-#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK3 19
-#define IMX8MP_CLK_AUDIOMIX_SAI7_IPG   20
-#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1 21
-#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2 22
-#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK3 23
-#define IMX8MP_CLK_AUDIOMIX_ASRC_IPG   24
-#define IMX8MP_CLK_AUDIOMIX_PDM_IPG25
-#define IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT 26
-#define IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT 27
-#define IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT 28
-#define IMX8MP_CLK_AUDIOMIX_DSP_ROOT   29
-#define IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT30
-#define IMX8MP_CLK_AUDIOMIX_EARC_IPG   31
-#define IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG 32
-#define IMX8MP_CLK_AUDIOMIX_AUD2HTX_IPG33
-#define IMX8MP_CLK_AUDIOMIX_EDMA_ROOT  34
-#define IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT35
-#define IMX8MP_CLK_AUDIOMIX_MU2_ROOT   36
-#define IMX8MP_CLK_AUDIOMIX_MU3_ROOT   37
-#define IMX8MP_CLK_AUDIOMIX_EARC_PHY   38
-#define IMX8MP_CLK_AUDIOMIX_PDM_ROOT   39
-#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1_SEL 40
-#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2_SEL 41
-#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1_SEL 42
-#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2_SEL 43
-#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1_SEL 44
-#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2_SEL 45
-#define IMX8MP_CLK_AUDIOMIX_SAI4_MCLK1_SEL 46
-#define IMX8MP_CLK_AUDIOMIX_SAI4_MCLK2_SEL 47
-#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1_SEL 48
-#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2_SEL 49
-#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1_SEL 50
-#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2_SEL 51
-#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1_SEL 52
-#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2_SEL 53
-#define IMX8MP_CLK_AUDIOMIX_PDM_SEL54
-#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_REF_SEL55
-#define IMX8MP_CLK_AUDIOMIX_SAI_PLL56
-#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS 57
-#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT58
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI1_IPG 0
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI1_MCLK1   1
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI1_MCLK2   2
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI1_MCLK3   3
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI2_IPG 4
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI2_MCLK1   5
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI2_MCLK2   6
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI2_MCLK3   7
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_IPG 8
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK1   9
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK2   10
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK3   11
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI5_IPG 12
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI5_MCLK1   13
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI5_MCLK2   14
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI5_MCLK3   15
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI6_IPG 16
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI6_MCLK1   17
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI6_MCLK2   18
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI6_MCLK3   19
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI7_IPG 20
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI7_MCLK1   21
+#define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI7_MCLK2   22
+#define IMX8MP_CLK_AUD

[PATCH 02/17] dt-bindings: reset: imx8mp: Add audio blk_ctrl reset IDs

2020-07-29 Thread Abel Vesa
These will be used by the imx8mp for blk-ctrl driver.

Signed-off-by: Abel Vesa 
---
 include/dt-bindings/reset/imx8mp-reset.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/include/dt-bindings/reset/imx8mp-reset.h 
b/include/dt-bindings/reset/imx8mp-reset.h
index 2e8c910..fca0c9bff 100644
--- a/include/dt-bindings/reset/imx8mp-reset.h
+++ b/include/dt-bindings/reset/imx8mp-reset.h
@@ -47,4 +47,9 @@
 
 #define IMX8MP_RESET_NUM   38
 
+#define IMX8MP_AUDIO_BLK_CTRL_EARC_RESET   0
+#define IMX8MP_AUDIO_BLK_CTRL_EARC_PHY_RESET   1
+
+#define IMX8MP_AUDIO_BLK_CTRL_RESET_NUM2
+
 #endif
-- 
2.7.4



[PATCH 16/17] arm64: dts: imx8mp: Add media_blk_ctrl node

2020-07-29 Thread Abel Vesa
Some of the features of the media_ctrl will be used by some
different drivers in a way those drivers will know best, so adding the
syscon compatible we allow those to do just that. Only the resets
and the clocks are registered bit the clk-blk-ctrl driver.

Signed-off-by: Abel Vesa 
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 17 +
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi 
b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index b985875..172c548 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -736,6 +736,23 @@
};
};
 
+   aips4: bus@32c0 {
+   compatible = "simple-bus";
+   reg = <0x32c0 0x40>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   media_blk_ctrl: media-blk-ctrl@32ec {
+   compatible = "fsl,imx8mp-media-blk-ctrl", 
"syscon";
+   reg = <0x32ec 0x1>;
+   power-domains = <&mediamix_pd>;
+
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+   };
+   };
+
aips5: bus@30c0 {
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x30c0 0x40>;
-- 
2.7.4



[PATCH 06/17] dt-bindings: clock: imx8mp: Add hdmi blk_ctrl clock IDs

2020-07-29 Thread Abel Vesa
These will be used by the imx8mp for blk-ctrl driver.

Signed-off-by: Abel Vesa 
---
 include/dt-bindings/clock/imx8mp-clock.h | 40 
 1 file changed, 40 insertions(+)

diff --git a/include/dt-bindings/clock/imx8mp-clock.h 
b/include/dt-bindings/clock/imx8mp-clock.h
index bb465a7..6b90831 100644
--- a/include/dt-bindings/clock/imx8mp-clock.h
+++ b/include/dt-bindings/clock/imx8mp-clock.h
@@ -396,6 +396,46 @@
 
 #define IMX8MP_CLK_AUDIO_BLK_CTRL_END  59
 
+#define IMX8MP_CLK_HDMI_BLK_CTRL_GLOBAL_APB_CLK0
+#define IMX8MP_CLK_HDMI_BLK_CTRL_GLOBAL_B_CLK  1
+#define IMX8MP_CLK_HDMI_BLK_CTRL_GLOBAL_REF266M_CLK2
+#define IMX8MP_CLK_HDMI_BLK_CTRL_GLOBAL_XTAL24M_CLK3
+#define IMX8MP_CLK_HDMI_BLK_CTRL_GLOBAL_XTAL32K_CLK4
+#define IMX8MP_CLK_HDMI_BLK_CTRL_GLOBAL_TX_PIX_CLK 5
+#define IMX8MP_CLK_HDMI_BLK_CTRL_IRQS_STEER_CLK6
+#define IMX8MP_CLK_HDMI_BLK_CTRL_NOC_HDMI_CLK  7
+#define IMX8MP_CLK_HDMI_BLK_CTRL_NOC_HDCP_CLK  8
+#define IMX8MP_CLK_HDMI_BLK_CTRL_LCDIF_APB_CLK 9
+#define IMX8MP_CLK_HDMI_BLK_CTRL_LCDIF_B_CLK   10
+#define IMX8MP_CLK_HDMI_BLK_CTRL_LCDIF_PDI_CLK 11
+#define IMX8MP_CLK_HDMI_BLK_CTRL_LCDIF_PIX_CLK 12
+#define IMX8MP_CLK_HDMI_BLK_CTRL_LCDIF_SPU_CLK 13
+#define IMX8MP_CLK_HDMI_BLK_CTRL_FDCC_REF_CLK  14
+#define IMX8MP_CLK_HDMI_BLK_CTRL_HRV_MWR_APB_CLK   15
+#define IMX8MP_CLK_HDMI_BLK_CTRL_HRV_MWR_B_CLK 16
+#define IMX8MP_CLK_HDMI_BLK_CTRL_HRV_MWR_CEA_CLK   17
+#define IMX8MP_CLK_HDMI_BLK_CTRL_VSFD_CEA_CLK  18
+#define IMX8MP_CLK_HDMI_BLK_CTRL_TX_HPI_CLK19
+#define IMX8MP_CLK_HDMI_BLK_CTRL_TX_APB_CLK20
+#define IMX8MP_CLK_HDMI_BLK_CTRL_TX_CEC_CLK21
+#define IMX8MP_CLK_HDMI_BLK_CTRL_TX_ESM_CLK22
+#define IMX8MP_CLK_HDMI_BLK_CTRL_TX_GPA_CLK23
+#define IMX8MP_CLK_HDMI_BLK_CTRL_TX_PIXEL_CLK  24
+#define IMX8MP_CLK_HDMI_BLK_CTRL_TX_SFR_CLK25
+#define IMX8MP_CLK_HDMI_BLK_CTRL_TX_SKP_CLK26
+#define IMX8MP_CLK_HDMI_BLK_CTRL_TX_PREP_CLK   27
+#define IMX8MP_CLK_HDMI_BLK_CTRL_TX_PHY_APB_CLK28
+#define IMX8MP_CLK_HDMI_BLK_CTRL_TX_PHY_INT_CLK29
+#define IMX8MP_CLK_HDMI_BLK_CTRL_TX_SEC_MEM_CLK30
+#define IMX8MP_CLK_HDMI_BLK_CTRL_TX_TRNG_SKP_CLK   31
+#define IMX8MP_CLK_HDMI_BLK_CTRL_TX_VID_LINK_PIX_CLK   32
+#define IMX8MP_CLK_HDMI_BLK_CTRL_TX_TRNG_APB_CLK   33
+#define IMX8MP_CLK_HDMI_BLK_CTRL_HTXPHY_CLK_SEL34
+#define IMX8MP_CLK_HDMI_BLK_CTRL_LCDIF_CLK_SEL 35
+#define IMX8MP_CLK_HDMI_BLK_CTRL_TX_PIPE_CLK_SEL   36
+
+#define IMX8MP_CLK_HDMI_BLK_CTRL_END   37
+
 #define IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_DSI_PCLK0
 #define IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_DSI_CLKREF  1
 #define IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_CSI_PCLK2
-- 
2.7.4



[PATCH 04/17] dt-bindings: clock: imx8mp: Add media blk_ctrl clock IDs

2020-07-29 Thread Abel Vesa
These will be used by the imx8mp for blk-ctrl driver.

Signed-off-by: Abel Vesa 
---
 include/dt-bindings/clock/imx8mp-clock.h | 28 
 1 file changed, 28 insertions(+)

diff --git a/include/dt-bindings/clock/imx8mp-clock.h 
b/include/dt-bindings/clock/imx8mp-clock.h
index 78ebe8e..bb465a7 100644
--- a/include/dt-bindings/clock/imx8mp-clock.h
+++ b/include/dt-bindings/clock/imx8mp-clock.h
@@ -396,4 +396,32 @@
 
 #define IMX8MP_CLK_AUDIO_BLK_CTRL_END  59
 
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_DSI_PCLK0
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_DSI_CLKREF  1
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_CSI_PCLK2
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_CSI_ACLK3
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_LCDIF_PIXEL  4
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_LCDIF_APB5
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_ISI_PROC 6
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_ISI_APB  7
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_BUS_BLK  8
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_CSI2_PCLK   9
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_CSI2_ACLK   10
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_LCDIF2_PIXEL 11
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_LCDIF2_APB   12
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_ISP1_COR 13
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_ISP1_AXI 14
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_ISP1_AHB 15
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_ISP0_COR 16
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_ISP0_AXI 17
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_ISP0_AHB 18
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_DWE_COR  19
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_DWE_AXI  20
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_DWE_AHB  21
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_DSI222
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_LCDIF_AXI23
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_LCDIF2_AXI   24
+
+#define IMX8MP_CLK_MEDIA_BLK_CTRL_END  25
+
 #endif
-- 
2.7.4



[PATCH 15/17] arm64: dts: imx8mp: Add audio_blk_ctrl node

2020-07-29 Thread Abel Vesa
Some of the features of the audio_ctrl will be used by some
different drivers in a way those drivers will know best, so adding the
syscon compatible we allow those to do just that. Only the resets
and the clocks are registered bit the clk-blk-ctrl driver.

Signed-off-by: Abel Vesa 
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 17 +
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi 
b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index daa1769..b985875 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -736,6 +736,23 @@
};
};
 
+   aips5: bus@30c0 {
+   compatible = "fsl,aips-bus", "simple-bus";
+   reg = <0x30c0 0x40>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   audio_blk_ctrl: audio-blk-ctrl@30e2 {
+   compatible = "fsl,imx8mp-audio-blk-ctrl", 
"syscon";
+   reg = <0x30e2 0x50C>;
+   power-domains = <&audiomix_pd>;
+
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+   };
+   };
+
gic: interrupt-controller@3880 {
compatible = "arm,gic-v3";
reg = <0x3880 0x1>,
-- 
2.7.4



[PATCH 14/17] clk: imx8mp: Add media blk_ctrl clocks and resets

2020-07-29 Thread Abel Vesa
Add media blk_ctrl clocks and resets in the i.MX8MP clock
driver to be picked up by the clk-blk-ctrl driver.

Signed-off-by: Abel Vesa 
---
 drivers/clk/imx/clk-blk-ctrl.c |  4 +++
 drivers/clk/imx/clk-imx8mp.c   | 68 ++
 2 files changed, 72 insertions(+)

diff --git a/drivers/clk/imx/clk-blk-ctrl.c b/drivers/clk/imx/clk-blk-ctrl.c
index cee7298..81fc91c 100644
--- a/drivers/clk/imx/clk-blk-ctrl.c
+++ b/drivers/clk/imx/clk-blk-ctrl.c
@@ -308,6 +308,10 @@ static const struct of_device_id imx_blk_ctrl_of_match[] = 
{
.data = &imx8mp_audio_blk_ctrl_dev_data
},
{
+   .compatible = "fsl,imx8mp-media-blk-ctrl",
+   .data = &imx8mp_media_blk_ctrl_dev_data
+   },
+   {
.compatible = "fsl,imx8mp-hdmi-blk-ctrl",
.data = &imx8mp_hdmi_blk_ctrl_dev_data
},
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 6b0f4ef..8553032 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -121,6 +121,62 @@ static struct imx_blk_ctrl_hw imx8mp_hdmi_blk_ctrl_hws[] = 
{
IMX_BLK_CTRL_RESET_MASK(IMX8MP_HDMI_BLK_CTRL_LCDIF_RESET, 0x20, 4, 0x3),
 };
 
+static struct imx_blk_ctrl_hw imx8mp_media_blk_ctrl_hws[] = {
+   /* clocks */
+   IMX_BLK_CTRL_CLK_GATE("mipi_dsi_pclk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_DSI_PCLK, 0x4, 0, "media_apb_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("mipi_dsi_clkref", 
IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_DSI_CLKREF, 0x4, 1, "media_mipi_phy1_ref"),
+   IMX_BLK_CTRL_CLK_GATE("mipi_csi_pclk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_CSI_PCLK, 0x4, 2, "media_apb_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("mipi_csi_aclk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_CSI_ACLK, 0x4, 3, "media_cam1_pix_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("lcdif_pixel_clk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_LCDIF_PIXEL, 0x4, 4, "media_disp1_pix_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("lcdif_apb_clk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_LCDIF_APB, 0x4, 5, "media_apb_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("isi_proc_clk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_ISI_PROC, 0x4, 6, "media_axi_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("isi_apb_clk", IMX8MP_CLK_MEDIA_BLK_CTRL_ISI_APB, 
0x4, 7, "media_apb_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("bus_blk_clk", IMX8MP_CLK_MEDIA_BLK_CTRL_BUS_BLK, 
0x4, 8, "media_axi_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("mipi_csi2_pclk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_CSI2_PCLK, 0x4, 9, "media_apb_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("mipi_csi2_aclk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_CSI2_ACLK, 0x4, 10, "media_cam2_pix_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("lcdif2_pixel_clk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_LCDIF2_PIXEL, 0x4, 11, "media_disp2_pix_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("lcdif2_apb_clk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_LCDIF2_APB, 0x4, 12, "media_apb_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("isp1_cor_clk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_ISP1_COR, 0x4, 13, "media_isp_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("isp1_axi_clk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_ISP1_AXI, 0x4, 14, "media_axi_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("isp1_ahb_clk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_ISP1_AHB, 0x4, 15, "media_apb_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("isp0_cor_clk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_ISP0_COR, 0x4, 16, "media_isp_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("isp0_axi_clk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_ISP0_AXI, 0x4, 17, "media_axi_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("isp0_ahb_clk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_ISP0_AHB, 0x4, 18, "media_apb_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("dwe_cor_clk", IMX8MP_CLK_MEDIA_BLK_CTRL_DWE_COR, 
0x4, 19, "media_axi_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("dwe_axi_clk", IMX8MP_CLK_MEDIA_BLK_CTRL_DWE_AXI, 
0x4, 20, "media_axi_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("dwe_ahb_clk", IMX8MP_CLK_MEDIA_BLK_CTRL_DWE_AHB, 
0x4, 21, "media_apb_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("mipi_dsi2_clk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_DSI2, 0x4, 22, "media_mipi_phy1_ref"),
+   IMX_BLK_CTRL_CLK_GATE("lcdif_axi_clk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_LCDIF_AXI, 0x4, 23, "media_axi_root_clk"),
+   IMX_BLK_CTRL_CLK_GATE("lcdif2_axi_clk", 
IMX8MP_CLK_MEDIA_BLK_CTRL_LCDIF2_AXI, 0x4, 24, "media_axi_root_clk"),
+
+   /* resets */
+   IMX_BLK_CTRL_RESET(IMX8MP_MEDIA_BLK_CTRL_RESET_MIPI_DSI_PCLK, 0, 0),
+   IMX_BLK_CTRL_RESET(IMX8MP_MEDIA_BLK_CTRL_RESET_MIPI_DSI_CLKREF, 0, 1),
+   IMX_BLK_CTRL_RESET(IMX8MP_MEDIA_BLK_CTRL_RESET_MIPI_CSI_PCLK, 0, 2),
+   IMX_BLK_CTRL_RESET(IMX8MP_MEDIA_BLK_CTRL_RESET_MIPI_CSI_ACLK, 0, 3),
+   IMX_BLK_CTRL_RESET(IMX8MP_MEDIA_BLK_CTRL_RESET_LCDIF_PIXEL, 0, 4),
+   IMX_BLK_CTRL_RESET(IMX8MP_MEDIA_BLK_CTRL_RESET_LCDIF_APB, 0, 5),
+   IMX_BLK_CTRL_RESET(IMX8MP_MEDIA_BLK_CTRL_RESET_ISI_PROC, 0, 6),
+   IMX_BLK_CTRL_RESET(IMX8MP_MEDIA_BLK_CTRL_RESET_ISI_APB, 0, 7),
+   IMX_BLK_CTRL_RESET(IMX8MP_MEDIA_BLK_CTRL_RESET_BUS_BLK, 0, 8),
+   IMX_BLK_CTRL_RESET(I

[PATCH 09/17] arm64: dts: Remove imx-hdmimix-reset header file

2020-07-29 Thread Abel Vesa
The hdmi BLK_CTRL ids have been moved to imx8mp-reset.h

Signed-off-by: Abel Vesa 
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi 
b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 9de2aa1..daa1769 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -4,6 +4,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
-- 
2.7.4



[PATCH 08/17] clk: imx8mp: Add audio shared gate

2020-07-29 Thread Abel Vesa
According to the RM, the CCGR101 is shared for the following root clocks:
- AUDIO_AHB_CLK_ROOT
- AUDIO_AXI_CLK_ROOT
- SAI2_CLK_ROOT
- SAI3_CLK_ROOT
- SAI5_CLK_ROOT
- SAI6_CLK_ROOT
- SAI7_CLK_ROOT
- PDM_CLK_ROOT

Signed-off-by: Abel Vesa 
---
 drivers/clk/imx/clk-imx8mp.c | 12 +++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index ca74771..462c558 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -17,6 +17,7 @@
 
 static u32 share_count_nand;
 static u32 share_count_media;
+static u32 share_count_audio;
 
 static const char * const pll_ref_sels[] = { "osc_24m", "dummy", "dummy", 
"dummy", };
 static const char * const audio_pll1_bypass_sels[] = {"audio_pll1", 
"audio_pll1_ref_sel", };
@@ -731,7 +732,16 @@ static int imx8mp_clocks_probe(struct platform_device 
*pdev)
hws[IMX8MP_CLK_HDMI_ROOT] = imx_clk_hw_gate4("hdmi_root_clk", 
"hdmi_axi", ccm_base + 0x45f0, 0);
hws[IMX8MP_CLK_TSENSOR_ROOT] = imx_clk_hw_gate4("tsensor_root_clk", 
"ipg_root", ccm_base + 0x4620, 0);
hws[IMX8MP_CLK_VPU_ROOT] = imx_clk_hw_gate4("vpu_root_clk", "vpu_bus", 
ccm_base + 0x4630, 0);
-   hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate4("audio_root_clk", 
"ipg_root", ccm_base + 0x4650, 0);
+
+   hws[IMX8MP_CLK_AUDIO_AHB_ROOT] = 
imx_clk_hw_gate2_shared2("audio_ahb_root", "audio_ahb", ccm_base + 0x4650, 0, 
&share_count_audio);
+   hws[IMX8MP_CLK_AUDIO_AXI_ROOT] = 
imx_clk_hw_gate2_shared2("audio_axi_root", "audio_axi", ccm_base + 0x4650, 0, 
&share_count_audio);
+   hws[IMX8MP_CLK_SAI1_ROOT] = imx_clk_hw_gate2_shared2("sai1_root", 
"sai1", ccm_base + 0x4650, 0, &share_count_audio);
+   hws[IMX8MP_CLK_SAI2_ROOT] = imx_clk_hw_gate2_shared2("sai2_root", 
"sai2", ccm_base + 0x4650, 0, &share_count_audio);
+   hws[IMX8MP_CLK_SAI3_ROOT] = imx_clk_hw_gate2_shared2("sai3_root", 
"sai3", ccm_base + 0x4650, 0, &share_count_audio);
+   hws[IMX8MP_CLK_SAI5_ROOT] = imx_clk_hw_gate2_shared2("sai5_root", 
"sai5", ccm_base + 0x4650, 0, &share_count_audio);
+   hws[IMX8MP_CLK_SAI6_ROOT] = imx_clk_hw_gate2_shared2("sai6_root", 
"sai6", ccm_base + 0x4650, 0, &share_count_audio);
+   hws[IMX8MP_CLK_SAI7_ROOT] = imx_clk_hw_gate2_shared2("sai7_root", 
"sai7", ccm_base + 0x4650, 0, &share_count_audio);
+   hws[IMX8MP_CLK_PDM_ROOT] = imx_clk_hw_gate2_shared2("pdm_root", "pdm", 
ccm_base + 0x4650, 0, &share_count_audio);
 
hws[IMX8MP_CLK_ARM] = imx_clk_hw_cpu("arm", "arm_a53_core",
 hws[IMX8MP_CLK_A53_CORE]->clk,
-- 
2.7.4



[PATCH 07/17] dt-bindings: reset: imx8mp: Add hdmi blk_ctrl reset IDs

2020-07-29 Thread Abel Vesa
These will be used imx8mp for blk-ctrl driver.

Signed-off-by: Abel Vesa 
---
 include/dt-bindings/reset/imx8mp-reset.h | 12 
 1 file changed, 12 insertions(+)

diff --git a/include/dt-bindings/reset/imx8mp-reset.h 
b/include/dt-bindings/reset/imx8mp-reset.h
index 13e56dd..c1ca79c 100644
--- a/include/dt-bindings/reset/imx8mp-reset.h
+++ b/include/dt-bindings/reset/imx8mp-reset.h
@@ -80,4 +80,16 @@
 
 #define IMX8MP_MEDIA_BLK_CTRL_RESET_NUM25
 
+#define IMX8MP_HDMI_BLK_CTRL_HDMI_TX_RESET 0
+#define IMX8MP_HDMI_BLK_CTRL_HDMI_PHY_RESET1
+#define IMX8MP_HDMI_BLK_CTRL_HDMI_PAI_RESET2
+#define IMX8MP_HDMI_BLK_CTRL_HDMI_PVI_RESET3
+#define IMX8MP_HDMI_BLK_CTRL_HDMI_TRNG_RESET   4
+#define IMX8MP_HDMI_BLK_CTRL_IRQ_STEER_RESET   5
+#define IMX8MP_HDMI_BLK_CTRL_HDMI_HDCP_RESET   6
+#define IMX8MP_HDMI_BLK_CTRL_LCDIF_RESET   7
+
+#define IMX8MP_HDMI_BLK_CTRL_RESET_NUM 8
+
+
 #endif
-- 
2.7.4



[PATCH 11/17] clk: imx: Add blk_ctrl combo driver

2020-07-29 Thread Abel Vesa
On i.MX8MP, there is a new type of IP which is called BLK_CTRL in
RM and usually is comprised of some GPRs that are considered too
generic to be part of any dedicated IP from that specific subsystem.

In general, some of the GPRs have some clock bits, some have reset bits,
so in order to be able to use the imx clock API, this needs to be
in a clock driver. From there it can use the reset controller API and
leave the rest to the syscon.

This driver is intended to work with the following BLK_CTRL IPs found in
i.MX8MP (but it might be reused by the future i.MX platforms that
have this kind of IP in their design):
 - Audio
 - Media
 - HDMI

Signed-off-by: Abel Vesa 
---
 drivers/clk/imx/Makefile   |   2 +-
 drivers/clk/imx/clk-blk-ctrl.c | 318 +
 drivers/clk/imx/clk-blk-ctrl.h |  81 +++
 3 files changed, 400 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/imx/clk-blk-ctrl.c
 create mode 100644 drivers/clk/imx/clk-blk-ctrl.h

diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
index 928f874c..7afe1df 100644
--- a/drivers/clk/imx/Makefile
+++ b/drivers/clk/imx/Makefile
@@ -27,7 +27,7 @@ obj-$(CONFIG_MXC_CLK_SCU) += \
 
 obj-$(CONFIG_CLK_IMX8MM) += clk-imx8mm.o
 obj-$(CONFIG_CLK_IMX8MN) += clk-imx8mn.o
-obj-$(CONFIG_CLK_IMX8MP) += clk-imx8mp.o
+obj-$(CONFIG_CLK_IMX8MP) += clk-imx8mp.o clk-blk-ctrl.o
 obj-$(CONFIG_CLK_IMX8MQ) += clk-imx8mq.o
 obj-$(CONFIG_CLK_IMX8QXP) += clk-imx8qxp.o clk-imx8qxp-lpcg.o
 
diff --git a/drivers/clk/imx/clk-blk-ctrl.c b/drivers/clk/imx/clk-blk-ctrl.c
new file mode 100644
index ..a46e674
--- /dev/null
+++ b/drivers/clk/imx/clk-blk-ctrl.c
@@ -0,0 +1,318 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2020 NXP.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "clk.h"
+#include "clk-blk-ctrl.h"
+
+struct reset_hw {
+   u32 offset;
+   u32 shift;
+   u32 mask;
+};
+
+struct pm_safekeep_info {
+   uint32_t *regs_values;
+   uint32_t *regs_offsets;
+   uint32_t regs_num;
+};
+
+struct imx_blk_ctrl_drvdata {
+   void __iomem *base;
+   struct reset_controller_dev rcdev;
+   struct reset_hw *rst_hws;
+   struct pm_safekeep_info pm_info;
+
+   spinlock_t lock;
+};
+
+static int imx_blk_ctrl_reset_set(struct reset_controller_dev *rcdev,
+ unsigned long id, bool assert)
+{
+   struct imx_blk_ctrl_drvdata *drvdata = container_of(rcdev,
+   struct imx_blk_ctrl_drvdata, rcdev);
+   unsigned int offset = drvdata->rst_hws[id].offset;
+   unsigned int shift = drvdata->rst_hws[id].shift;
+   unsigned int mask = drvdata->rst_hws[id].mask;
+   void __iomem *reg_addr = drvdata->base + offset;
+   unsigned long flags;
+   u32 reg;
+
+   if (assert) {
+   pm_runtime_get_sync(rcdev->dev);
+   spin_lock_irqsave(&drvdata->lock, flags);
+   reg = readl(reg_addr);
+   writel(reg & ~(mask << shift), reg_addr);
+   spin_unlock_irqrestore(&drvdata->lock, flags);
+   } else {
+   spin_lock_irqsave(&drvdata->lock, flags);
+   reg = readl(reg_addr);
+   writel(reg | (mask << shift), reg_addr);
+   spin_unlock_irqrestore(&drvdata->lock, flags);
+   pm_runtime_put(rcdev->dev);
+   }
+
+   return 0;
+}
+
+static int imx_blk_ctrl_reset_reset(struct reset_controller_dev *rcdev,
+  unsigned long id)
+{
+   imx_blk_ctrl_reset_set(rcdev, id, true);
+   return imx_blk_ctrl_reset_set(rcdev, id, false);
+}
+
+static int imx_blk_ctrl_reset_assert(struct reset_controller_dev *rcdev,
+  unsigned long id)
+{
+   return imx_blk_ctrl_reset_set(rcdev, id, true);
+}
+
+static int imx_blk_ctrl_reset_deassert(struct reset_controller_dev *rcdev,
+unsigned long id)
+{
+   return imx_blk_ctrl_reset_set(rcdev, id, false);
+}
+
+static const struct reset_control_ops imx_blk_ctrl_reset_ops = {
+   .reset  = imx_blk_ctrl_reset_reset,
+   .assert = imx_blk_ctrl_reset_assert,
+   .deassert   = imx_blk_ctrl_reset_deassert,
+};
+
+static int imx_blk_ctrl_register_reset_controller(struct device *dev)
+{
+   struct imx_blk_ctrl_drvdata *drvdata = dev_get_drvdata(dev);
+   const struct imx_blk_ctrl_dev_data *dev_data = 
of_device_get_match_data(dev);
+   struct reset_hw *hws;
+   int max = dev_data->resets_max;
+   int i;
+
+   spin_lock_init(&drvdata->lock);
+
+   drvdata->rcdev.owner = THIS_MODULE;
+   drvdata->rcdev.nr_resets = max;
+   drvdata->rcdev.ops   = &imx_blk_ctrl_reset_ops;
+   drvdata->rcdev.of_node   = dev->of_node;
+   drvdata->rcdev.dev   = dev;

[PATCH 10/17] Documentation: bindings: clk: Add bindings for i.MX BLK_CTRL

2020-07-29 Thread Abel Vesa
Document the i.MX BLK_CTRL with its devicetree properties.

Signed-off-by: Abel Vesa 
---
 .../bindings/clock/fsl,imx-blk-ctrl.yaml   | 55 ++
 1 file changed, 55 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/clock/fsl,imx-blk-ctrl.yaml

diff --git a/Documentation/devicetree/bindings/clock/fsl,imx-blk-ctrl.yaml 
b/Documentation/devicetree/bindings/clock/fsl,imx-blk-ctrl.yaml
new file mode 100644
index ..036d3d3
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/fsl,imx-blk-ctrl.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: (GPL-2.0-only)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/fsl,imx-blk-ctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX BLK_CTRL
+
+description: |
+  i.MX BLK_CTRL is a conglomerate of different GPRs that are
+  dedicated to a specific subsystem. Because it usually contains
+  clocks amongst other things, it needs access to the i.MX clocks
+  API. All the other functionalities it provides can work just fine
+  from the clock subsystem tree.
+
+maintainers:
+  - Abel Vesa 
+
+properties:
+  reg:
+maxItems: 1
+
+  compatible:
+items:
+  - const: fsl,imx8mp-blk-ctrl
+  - const: syscon
+
+  power-domains:
+maxItems: 1
+
+  '#clock-cells':
+const: 1
+
+  '#reset-cells':
+const: 1
+
+required:
+  - compatible
+  - reg
+  - power-domains
+  - '#clock-cells'
+  - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+audio-blk-ctrl: blk-ctrl@30e2 {
+   compatible = "fsl,imx8mp-blk-ctrl", "syscon";
+   reg = <0x30e2 0x1>;
+   power-domains = <&audiomix_pd>;
+
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+};
-- 
2.7.4



[PATCH 17/17] arm64: dts: imx8mp: Add hdmi_blk_ctrl node

2020-07-29 Thread Abel Vesa
Some of the features of the hdmi_ctrl will be used by some
different drivers in a way those drivers will know best, so adding the
syscon compatible we allow those to do just that. Only the resets
and the clocks are registered bit the clk-blk-ctrl driver.

Signed-off-by: Abel Vesa 
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi 
b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 172c548..5a76c4d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -751,6 +751,15 @@
#clock-cells = <1>;
#reset-cells = <1>;
};
+
+   hdmi_blk_ctrl: hdmi-blk-ctrl@32fc {
+   compatible = "fsl,imx8mp-hdmi-blk-ctrl", 
"syscon";
+   reg = <0x32fc 0x1000>;
+   power-domains = <&hdmimix_pd>;
+
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+   };
};
 
aips5: bus@30c0 {
-- 
2.7.4



[PATCH 12/17] clk: imx8mp: Add audio blk_ctrl clocks and resets

2020-07-29 Thread Abel Vesa
Add audio blk_ctrl clocks and resets in the i.MX8MP clock
driver to be picked up by the clk-blk-ctrl driver.

Signed-off-by: Abel Vesa 
---
 drivers/clk/imx/clk-blk-ctrl.c |   4 ++
 drivers/clk/imx/clk-imx8mp.c   | 138 +
 2 files changed, 142 insertions(+)

diff --git a/drivers/clk/imx/clk-blk-ctrl.c b/drivers/clk/imx/clk-blk-ctrl.c
index a46e674..67cf223 100644
--- a/drivers/clk/imx/clk-blk-ctrl.c
+++ b/drivers/clk/imx/clk-blk-ctrl.c
@@ -303,6 +303,10 @@ static const struct dev_pm_ops imx_blk_ctrl_pm_ops = {
 };
 
 static const struct of_device_id imx_blk_ctrl_of_match[] = {
+   {
+   .compatible = "fsl,imx8mp-audio-blk-ctrl",
+   .data = &imx8mp_audio_blk_ctrl_dev_data
+   },
{ /* Sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, imx_blk_ctrl_of_match);
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 462c558..00e7f5e 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -4,6 +4,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -14,11 +15,148 @@
 #include 
 
 #include "clk.h"
+#include "clk-blk-ctrl.h"
+
+#defineIMX_AUDIO_BLK_CTRL_CLKEN0   0x0
+#defineIMX_AUDIO_BLK_CTRL_CLKEN1   0x4
+#defineIMX_AUDIO_BLK_CTRL_EARC 0x200
+#defineIMX_AUDIO_BLK_CTRL_SAI1_MCLK_SEL0x300
+#defineIMX_AUDIO_BLK_CTRL_SAI2_MCLK_SEL0x304
+#defineIMX_AUDIO_BLK_CTRL_SAI3_MCLK_SEL0x308
+#defineIMX_AUDIO_BLK_CTRL_SAI5_MCLK_SEL0x30C
+#defineIMX_AUDIO_BLK_CTRL_SAI6_MCLK_SEL0x310
+#defineIMX_AUDIO_BLK_CTRL_SAI7_MCLK_SEL0x314
+#defineIMX_AUDIO_BLK_CTRL_PDM_CLK  0x318
+#defineIMX_AUDIO_BLK_CTRL_SAI_PLL_GNRL_CTL 0x400
+#defineIMX_AUDIO_BLK_CTRL_SAI_PLL_FDIVL_CTL0   0x404
+#defineIMX_AUDIO_BLK_CTRL_SAI_PLL_FDIVL_CTL1   0x408
+#defineIMX_AUDIO_BLK_CTRL_SAI_PLL_SSCG_CTL 0x40C
+#defineIMX_AUDIO_BLK_CTRL_SAI_PLL_MNIT_CTL 0x410
+#defineIMX_AUDIO_BLK_CTRL_IPG_LP_CTRL  0x504
+
+#define IMX_MEDIA_BLK_CTRL_SFT_RSTN0x0
+#define IMX_MEDIA_BLK_CTRL_CLK_EN  0x4
 
 static u32 share_count_nand;
 static u32 share_count_media;
 static u32 share_count_audio;
 
+static int shared_count_pdm;
+
+static const struct imx_pll14xx_rate_table imx_blk_ctrl_sai_pll_tbl[] = {
+   PLL_1443X_RATE(65000U, 325, 3, 2, 0),
+};
+
+static const struct imx_pll14xx_clk imx_blk_ctrl_sai_pll = {
+   .type = PLL_1443X,
+   .rate_table = imx_blk_ctrl_sai_pll_tbl,
+};
+
+static const char * const imx_sai_mclk2_sels[] = {"sai1_root", "sai2_root", 
"sai3_root", "dummy",
+  "sai5_root", "sai6_root", 
"sai7_root", "sai1_mclk",
+  "sai2_mclk", "sai3_mclk", "dummy",
+  "sai5_mclk", "sai6_mclk", 
"sai7_mclk", "spdif1_ext_clk"};
+static const char * const imx_sai1_mclk1_sels[] = {"sai1_root", "sai1_mclk", };
+static const char * const imx_sai2_mclk1_sels[] = {"sai2_root", "sai2_mclk", };
+static const char * const imx_sai3_mclk1_sels[] = {"sai3_root", "sai3_mclk", };
+static const char * const imx_sai5_mclk1_sels[] = {"sai5_root", "sai5_mclk", };
+static const char * const imx_sai6_mclk1_sels[] = {"sai6_root", "sai6_mclk", };
+static const char * const imx_sai7_mclk1_sels[] = {"sai7_root", "sai7_mclk", };
+static const char * const imx_pdm_sels[] = {"pdm_root", "sai_pll_div2", 
"dummy", "dummy" };
+static const char * const imx_sai_pll_ref_sels[] = {"osc_24m", "dummy", 
"dummy", "dummy", };
+static const char * const imx_sai_pll_bypass_sels[] = {"sai_pll", 
"sai_pll_ref_sel", };
+
+static struct imx_blk_ctrl_hw imx8mp_audio_blk_ctrl_hws[] = {
+   /* clocks */
+   IMX_BLK_CTRL_CLK_MUX("sai_pll_ref_sel", 
IMX8MP_CLK_AUDIO_BLK_CTRL_SAI_PLL_REF_SEL, 0x400, 0, 2, imx_sai_pll_ref_sels),
+   IMX_BLK_CTRL_CLK_PLL14XX("sai_pll", IMX8MP_CLK_AUDIO_BLK_CTRL_SAI_PLL, 
0x400, "sai_pll_ref_sel", &imx_blk_ctrl_sai_pll),
+   IMX_BLK_CTRL_CLK_MUX_FLAGS("sai_pll_bypass", 
IMX8MP_CLK_AUDIO_BLK_CTRL_SAI_PLL_BYPASS, 0x400, 4, 1, imx_sai_pll_bypass_sels, 
CLK_SET_RATE_PARENT),
+   IMX_BLK_CTRL_CLK_GATE("sai_pll_out", 
IMX8MP_CLK_AUDIO_BLK_CTRL_SAI_PLL_OUT, 0x400, 13, "sai_pll_bypass"),
+   IMX_BLK_CTRL_CLK_MUX_FLAGS("sai1_mclk1_sel", 
IMX8MP_CLK_AUDIO_BLK_CTRL_SAI1_MCLK1_SEL, 0x300, 0, 1, imx_sai1_mclk1_sels, 
CLK_SET_RATE_PARENT),
+   IMX_BLK_CTRL_CLK_MUX("sai1_mclk2_sel", 
IMX8MP_CLK_AUDIO_BLK_CTRL_SAI1_MCLK2_SEL, 0x300, 1, 4, imx_sai_mclk2_sels),
+   IMX_BLK_CTRL_CLK_MUX_FLAGS("sai2_mclk1_sel", 
IMX8MP_CLK_AUDIO_BLK_CTRL_SAI2_MCLK1_SEL, 0x304, 0, 1, imx_sai2_mclk1_sels, 
CLK_SET_RATE_PARENT),
+   IMX_BLK_CTRL_CLK_MUX("sai2_mclk2_sel", 
IMX8MP_CLK_AUDIO_BLK_CTRL_SAI2_MCLK2_SEL, 0x304, 1, 4, imx_sai_mclk2_sels),
+   IMX_BLK_CTRL_

[PATCH 03/17] dt-bindings: clock: imx8mp: Add ids for the audio shared gate

2020-07-29 Thread Abel Vesa
All these IDs are for one single HW gate (CCGR101) that is shared
between these root clocks.

Signed-off-by: Abel Vesa 
---
 include/dt-bindings/clock/imx8mp-clock.h | 12 +++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/include/dt-bindings/clock/imx8mp-clock.h 
b/include/dt-bindings/clock/imx8mp-clock.h
index 6008f32..78ebe8e 100644
--- a/include/dt-bindings/clock/imx8mp-clock.h
+++ b/include/dt-bindings/clock/imx8mp-clock.h
@@ -322,7 +322,17 @@
 #define IMX8MP_CLK_HSIO_AXI311
 #define IMX8MP_CLK_MEDIA_ISP   312
 
-#define IMX8MP_CLK_END 313
+#define IMX8MP_CLK_AUDIO_AHB_ROOT  313
+#define IMX8MP_CLK_AUDIO_AXI_ROOT  314
+#define IMX8MP_CLK_SAI1_ROOT   315
+#define IMX8MP_CLK_SAI2_ROOT   316
+#define IMX8MP_CLK_SAI3_ROOT   317
+#define IMX8MP_CLK_SAI5_ROOT   318
+#define IMX8MP_CLK_SAI6_ROOT   319
+#define IMX8MP_CLK_SAI7_ROOT   320
+#define IMX8MP_CLK_PDM_ROOT321
+
+#define IMX8MP_CLK_END 322
 
 #define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI1_IPG 0
 #define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI1_MCLK1   1
-- 
2.7.4



[PATCH] test_power: Fix battery_current initial value

2020-07-29 Thread lh lin
From: LH Lin 

Since default battery_status is POWER_SUPPLY_STATUS_DISCHARGING,
we should change default battery_current to a negative value.

Signed-off-by: LH Lin 
---
 drivers/power/supply/test_power.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/power/supply/test_power.c 
b/drivers/power/supply/test_power.c
index 65c23ef6408d..4f29f0f096f5 100644
--- a/drivers/power/supply/test_power.c
+++ b/drivers/power/supply/test_power.c
@@ -34,7 +34,7 @@ static int battery_technology = 
POWER_SUPPLY_TECHNOLOGY_LION;
 static int battery_capacity= 50;
 static int battery_voltage = 3300;
 static int battery_charge_counter  = -1000;
-static int battery_current = 1600;
+static int battery_current = -1600;
 
 static bool module_initialized;
 
-- 
2.18.0


Re: [PATCH v2 1/9] dt-bindings: arm: mstar: Add binding details for mstar,pmsleep

2020-07-29 Thread Arnd Bergmann
On Wed, Jul 29, 2020 at 11:14 AM Daniel Palmer  wrote:
> On Wed, 29 Jul 2020 at 04:18, Rob Herring  wrote:
>
> > > +properties:
> > > +  compatible:
> > > +oneOf:
> > > +  - items:
> > > + - enum:
> > > + - mstar,pmsleep
> >
> > Needs to be SoC specific. Random collections of bits are never
> > 'standard' from one SoC to the next.
>
> I don't have a manual for any of the chips so I can't say for sure but
> so far all of the chips in this group (ARMv7 based MStar/Sigmastar)
> has the same layout for the registers i.e. the reset register,
> the resume address registers are at the same place for all of them.
>
> Does calling it "mstar,pmsleepv7" make more sense? I'm not sure what
> to call it really.

Use the name of the oldest chip you know that supports it in there,
such as "mstar,msc313-pmsleep" if this one is specific to msc313.

   Arnd


Re: [greybus-dev] [PATCH][next] greybus: Use fallthrough pseudo-keyword

2020-07-29 Thread Alex Elder
On 7/29/20 5:51 AM, Viresh Kumar wrote:
> On 28-07-20, 17:37, Alex Elder wrote:
>> On 7/27/20 1:32 PM, Gustavo A. R. Silva wrote:
>>> Replace the existing /* fall through */ comments and its variants with
>>> the new pseudo-keyword macro fallthrough[1].
>>>
>>> [1] 
>>> https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through
>>
>> Thanks for the patch.  It looks good, but it raises
>> another question I'd like discussion on.
>>
>> It seems that Johan likes default (or final) cases in
>> switch statements without a "break" statement.  Viresh
>> and Bryan appear to be fond of this too.
>>
>> It's pedantic, but I don't like that.  Am I wrong?
>>   --> Johan/Viresh/Bryan would you please comment?
> 
> I am not fond of them as they aren't required for the working of the code. It 
> is
> a bit like using an empty return statement for a routine with void return 
> type,
> though it surely adds some consistency to the switch case.

I understand this perspective, and it's exactly why I wanted
to have a conversation about it (rather than just saying it
should be fixed).  As similar example, I don't like unnecessary
parentheses, but sometimes it's a good idea to have them.

Thanks.

-Alex

> But if people really feel it must be there, then its fine :)
> 



Re: [PATCH 15/17] arm64: dts: imx8mp: Add audio_blk_ctrl node

2020-07-29 Thread Abel Vesa
On 20-07-29 15:08:01, Abel Vesa wrote:
> Some of the features of the audio_ctrl will be used by some
> different drivers in a way those drivers will know best, so adding the
> syscon compatible we allow those to do just that. Only the resets
> and the clocks are registered bit the clk-blk-ctrl driver.
> 
> Signed-off-by: Abel Vesa 
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 17 +
>  1 file changed, 17 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi 
> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index daa1769..b985875 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -736,6 +736,23 @@
>   };
>   };
>  
> + aips5: bus@30c0 {
> + compatible = "fsl,aips-bus", "simple-bus";
> + reg = <0x30c0 0x40>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + audio_blk_ctrl: audio-blk-ctrl@30e2 {
> + compatible = "fsl,imx8mp-audio-blk-ctrl", 
> "syscon";
> + reg = <0x30e2 0x50C>;
> + power-domains = <&audiomix_pd>;

I forget to remote the power-domains property.

Will remove in the next version.

> +
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + };
> + };
> +
>   gic: interrupt-controller@3880 {
>   compatible = "arm,gic-v3";
>   reg = <0x3880 0x1>,
> -- 
> 2.7.4
> 


Re: [PATCH V4] Softirq:avoid large sched delay from the pending softirqs

2020-07-29 Thread Thomas Gleixner
Qian,

jun qian  writes:
> On Mon, Jul 27, 2020 at 11:41 PM Thomas Gleixner  wrote:
>> > + or_softirq_pending(pending << (vec_nr + 1));
>>
>> To or the value interrupts need to be disabled because otherwise you can
>> lose a bit when an interrupt happens in the middle of the RMW operation
>> and raises a softirq which is not in @pending and not in the per CPU
>> local softirq pending storage.
>>
> I can't understand the problem described above, could you explain in
> detail.

Oring a value to a memory location is a Read Modify Write (RMW)
operation.

x |= a;

translates to pseudo code:

R1 =  x  // Load content of memory location x into register R1
R1 |= a  // Or value a on R1
x = R1   // Write back result

So assume:

   x = 0
   a = 1

   R1 = x  --> R1 == 0
   R1 |= a --> R1 == 1

interrupt sets bit 1 in x   --> x == 0x02

   x = R1  --> x == 1

So you lost the set bit 1, right? Not really what you want.

>> There is another problem. Assume bit 0 and 1 are pending when the
>> processing starts. Now it breaks out after bit 0 has been handled and
>> stores back bit 1 as pending. Before ksoftirqd runs bit 0 gets raised
>> again. ksoftirqd runs and handles bit 0, which takes more than the
>> timeout. As a result the bit 0 processing can starve all other softirqs.
>>
> May I use a percpu val to record the order of processing softirq, by the order
> val, when it is in ksoftirqd we can process the pending softirq in order. In 
> the
> scenario you described above, before ksoftirqd runs, bit 0 gets raised again,
> ksoftirqd runs and handles bit 1 by the percpu val. just like a ring.

Yes, you need something to save information about the not-processed
bits. Keeping track of which bit to process next works, but whether
that's going to result in efficient and simple code is a different
question.

Thanks,

tglx



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