[Intel-wired-lan] [tnguy-net-queue:dev-queue] BUILD SUCCESS be7e33aeb956df663e655255b73ac97434398909

2023-10-22 Thread kernel test robot
tree/branch: 
https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue.git dev-queue
branch HEAD: be7e33aeb956df663e655255b73ac97434398909  i40e: Fix wrong check 
for I40E_TXR_FLAGS_WB_ON_ITR

elapsed time: 2282m

configs tested: 147
configs skipped: 2

The following configs have been built successfully.
More configs may be tested in the coming days.

tested configs:
alpha allnoconfig   gcc  
alphaallyesconfig   gcc  
alpha   defconfig   gcc  
arc  allmodconfig   gcc  
arc   allnoconfig   gcc  
arc  allyesconfig   gcc  
arc defconfig   gcc  
arc   randconfig-001-20231021   gcc  
arc   randconfig-001-20231022   gcc  
arm  allmodconfig   gcc  
arm   allnoconfig   gcc  
arm  allyesconfig   gcc  
arm am200epdkit_defconfig   clang
arm defconfig   gcc  
arm   randconfig-001-20231022   gcc  
arm socfpga_defconfig   clang
arm   tegra_defconfig   gcc  
arm64allmodconfig   gcc  
arm64 allnoconfig   gcc  
arm64allyesconfig   gcc  
arm64   defconfig   gcc  
csky allmodconfig   gcc  
csky  allnoconfig   gcc  
csky allyesconfig   gcc  
cskydefconfig   gcc  
i386 allmodconfig   gcc  
i386  allnoconfig   gcc  
i386 allyesconfig   gcc  
i386 buildonly-randconfig-001-20231022   gcc  
i386 buildonly-randconfig-002-20231022   gcc  
i386 buildonly-randconfig-003-20231022   gcc  
i386 buildonly-randconfig-004-20231022   gcc  
i386 buildonly-randconfig-005-20231022   gcc  
i386 buildonly-randconfig-006-20231022   gcc  
i386defconfig   gcc  
i386  randconfig-001-20231022   gcc  
i386  randconfig-002-20231022   gcc  
i386  randconfig-003-20231022   gcc  
i386  randconfig-004-20231022   gcc  
i386  randconfig-005-20231022   gcc  
i386  randconfig-006-20231022   gcc  
i386  randconfig-011-20231022   gcc  
i386  randconfig-012-20231022   gcc  
i386  randconfig-013-20231022   gcc  
i386  randconfig-014-20231022   gcc  
i386  randconfig-015-20231022   gcc  
i386  randconfig-016-20231022   gcc  
loongarchallmodconfig   gcc  
loongarch allnoconfig   gcc  
loongarchallyesconfig   gcc  
loongarch   defconfig   gcc  
loongarch randconfig-001-20231021   gcc  
loongarch randconfig-001-20231022   gcc  
m68k allmodconfig   gcc  
m68k  allnoconfig   gcc  
m68k allyesconfig   gcc  
m68kdefconfig   gcc  
m68k   m5249evb_defconfig   gcc  
microblaze   allmodconfig   gcc  
microblazeallnoconfig   gcc  
microblaze   allyesconfig   gcc  
microblaze  defconfig   gcc  
mips allmodconfig   gcc  
mips  allnoconfig   gcc  
mips allyesconfig   gcc  
mips  ath25_defconfig   clang
mips  fuloong2e_defconfig   gcc  
mipsmalta_qemu_32r6_defconfig   clang
nios2allmodconfig   gcc  
nios2 allnoconfig   gcc  
nios2allyesconfig   gcc  
nios2   defconfig   gcc  
openrisc allmodconfig   gcc  
openrisc  allnoconfig   gcc  
openrisc allyesconfig   gcc  
openriscdefconfig   gcc  
parisc   allmodconfig   gcc  
pariscallnoconfig   gcc  
parisc   allyesconfig   gcc  
parisc  defconfig   gcc  
parisc64defconfig   gcc  
powerpc  allmodconfig   gcc  
powerpc   allnoconfig   gcc  
powerpc  allyesconfig   gcc  
powerpc   lite5200b_defconfig   clang
powerpc

Re: [Intel-wired-lan] [PATCH iwl-next 2/2] igc: Add support for PTP .getcyclesx64()

2023-10-22 Thread naamax.meir

On 9/22/2023 04:40, Vinicius Costa Gomes wrote:

Add support for using Timer 1 (i225/i226 have 4 timer registers) as a
free-running clock (the "cycles" clock) in addition to Timer 0 (the
default, "adjustable clock"). The objective is to allow taprio/etf
offloading to coexist with PTP vclocks.

Besides the implementation of .getcyclesx64() for i225/i226, to keep
timestamping working when vclocks are in use, we also need to add
support for TX and RX timestamping using the free running timer, when
the requesting socket is bound to a vclock.

On the RX side, i225/i226 can be configured to store the values of two
timers in the received packet metadata area, so it's a matter of
configuring the right registers and retrieving the right timestamp.

The TX is a bit more involved because the hardware stores a single
timestamp (with the selected timer in the TX descriptor) into one of
the timestamp registers.

Note some changes at how the timestamps are done for RX, the
conversion and adjustment of timestamps are now done closer to the
consumption of the timestamp instead of near the reception.

Signed-off-by: Vinicius Costa Gomes 
---
  drivers/net/ethernet/intel/igc/igc.h | 21 ++-
  drivers/net/ethernet/intel/igc/igc_base.h|  4 ++
  drivers/net/ethernet/intel/igc/igc_defines.h |  2 +
  drivers/net/ethernet/intel/igc/igc_main.c| 55 
  drivers/net/ethernet/intel/igc/igc_ptp.c | 50 +++--
  drivers/net/ethernet/intel/igc/igc_regs.h|  5 +++
  6 files changed, 101 insertions(+), 36 deletions(-)


Tested-by: Naama Meir 
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Re: [Intel-wired-lan] [PATCH iwl-next v4] ice: read internal temperature sensor

2023-10-22 Thread Guenter Roeck

On 10/16/23 03:29, Konrad Knitter wrote:

Since 4.30 firmware exposes internal thermal sensor reading via admin
queue commands. Expose those readouts via hwmon API when supported.

Driver provides current reading from HW as well as device specific
thresholds for thermal alarm (Warning, Critical, Fatal) events.

$ sensors

Output
=
ice-pci-b100
Adapter: PCI adapter
temp1:+62.0°C  (high = +95.0°C, crit = +105.0°C)
(emerg = +115.0°C)

Co-developed-by: Marcin Domagala 
Signed-off-by: Marcin Domagala 
Co-developed-by: Eric Joyner 
Signed-off-by: Eric Joyner 
Reviewed-by: Marcin Szycik 
Reviewed-by: Przemek Kitszel 
Signed-off-by: Konrad Knitter 
---
v4: added dependency config_hwmon, cleanups



Have yo tried to compile this with CONFIG_ICE=y and CONFIG_HWMON=m ?

Guenter


v3: add SPDX identification to ice_hwmon files
v2: fix formmating issues, added hwmon maintainers to Cc
---
  drivers/net/ethernet/intel/ice/Makefile   |   1 +
  drivers/net/ethernet/intel/ice/ice.h  |   1 +
  .../net/ethernet/intel/ice/ice_adminq_cmd.h   |  28 
  drivers/net/ethernet/intel/ice/ice_common.c   |  56 +++-
  drivers/net/ethernet/intel/ice/ice_common.h   |   2 +
  drivers/net/ethernet/intel/ice/ice_hwmon.c| 126 ++
  drivers/net/ethernet/intel/ice/ice_hwmon.h|  15 +++
  drivers/net/ethernet/intel/ice/ice_main.c |   5 +
  drivers/net/ethernet/intel/ice/ice_type.h |   4 +
  9 files changed, 237 insertions(+), 1 deletion(-)
  create mode 100644 drivers/net/ethernet/intel/ice/ice_hwmon.c
  create mode 100644 drivers/net/ethernet/intel/ice/ice_hwmon.h

diff --git a/drivers/net/ethernet/intel/ice/Makefile 
b/drivers/net/ethernet/intel/ice/Makefile
index 8757bec23fb3..c6072080e548 100644
--- a/drivers/net/ethernet/intel/ice/Makefile
+++ b/drivers/net/ethernet/intel/ice/Makefile
@@ -51,3 +51,4 @@ ice-$(CONFIG_RFS_ACCEL) += ice_arfs.o
  ice-$(CONFIG_XDP_SOCKETS) += ice_xsk.o
  ice-$(CONFIG_ICE_SWITCHDEV) += ice_eswitch.o ice_eswitch_br.o
  ice-$(CONFIG_GNSS) += ice_gnss.o
+ice-$(CONFIG_HWMON) += ice_hwmon.o
diff --git a/drivers/net/ethernet/intel/ice/ice.h 
b/drivers/net/ethernet/intel/ice/ice.h
index ad5614d4449c..61d26be502b2 100644
--- a/drivers/net/ethernet/intel/ice/ice.h
+++ b/drivers/net/ethernet/intel/ice/ice.h
@@ -650,6 +650,7 @@ struct ice_pf {
  #define ICE_MAX_VF_AGG_NODES  32
struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES];
struct ice_dplls dplls;
+   struct device *hwmon_dev;
  };
  
  extern struct workqueue_struct *ice_lag_wq;

diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h 
b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
index 1202abfb9eb3..de2e6508f330 100644
--- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
@@ -117,6 +117,7 @@ struct ice_aqc_list_caps_elem {
  #define ICE_AQC_CAPS_NET_VER  0x004C
  #define ICE_AQC_CAPS_PENDING_NET_VER  0x004D
  #define ICE_AQC_CAPS_RDMA 0x0051
+#define ICE_AQC_CAPS_SENSOR_READING0x0067
  #define ICE_AQC_CAPS_PCIE_RESET_AVOIDANCE 0x0076
  #define ICE_AQC_CAPS_POST_UPDATE_RESET_RESTRICT   0x0077
  #define ICE_AQC_CAPS_NVM_MGMT 0x0080
@@ -1393,6 +1394,30 @@ struct ice_aqc_get_phy_rec_clk_out {
__le16 node_handle;
  };
  
+/* Get sensor reading (direct 0x0632) */

+struct ice_aqc_get_sensor_reading {
+   u8 sensor;
+   u8 format;
+   u8 reserved[6];
+   __le32 addr_high;
+   __le32 addr_low;
+};
+
+/* Get sensor reading response (direct 0x0632) */
+struct ice_aqc_get_sensor_reading_resp {
+   union {
+   u8 raw[8];
+   /* Output data for sensor 0x00, format 0x00 */
+   struct _packed {
+   s8 temp;
+   u8 temp_warning_threshold;
+   u8 temp_critical_threshold;
+   u8 temp_fatal_threshold;
+   u8 reserved[4];
+   } s0f0;
+   } data;
+};
+
  struct ice_aqc_link_topo_params {
u8 lport_num;
u8 lport_num_valid;
@@ -2438,6 +2463,8 @@ struct ice_aq_desc {
struct ice_aqc_restart_an restart_an;
struct ice_aqc_set_phy_rec_clk_out set_phy_rec_clk_out;
struct ice_aqc_get_phy_rec_clk_out get_phy_rec_clk_out;
+   struct ice_aqc_get_sensor_reading get_sensor_reading;
+   struct ice_aqc_get_sensor_reading_resp get_sensor_reading_resp;
struct ice_aqc_gpio read_write_gpio;
struct ice_aqc_sff_eeprom read_write_sff_param;
struct ice_aqc_set_port_id_led set_port_id_led;
@@ -2617,6 +2644,7 @@ enum ice_adminq_opc {
ice_aqc_opc_set_mac_lb  = 0x0620,
ice_aqc_opc_set_phy_rec_clk_out   

[Intel-wired-lan] [PATCH v2 RESEND] i40e: add an error code check in i40e_vsi_setup

2023-10-22 Thread Su Hui
check the value of 'ret' after calling 'i40e_vsi_config_rss'.

Signed-off-by: Su Hui 
Reviewed-by: Dan Carpenter 
---
Resend to hit the intel0wired-lan list.

 drivers/net/ethernet/intel/i40e/i40e_main.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c 
b/drivers/net/ethernet/intel/i40e/i40e_main.c
index de7fd43dc11c..4904bc8f5777 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
@@ -14567,9 +14567,13 @@ struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 
type,
if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
(vsi->type == I40E_VSI_VMDQ2)) {
ret = i40e_vsi_config_rss(vsi);
+   if (ret)
+   goto err_config;
}
return vsi;
 
+err_config:
+   i40e_vsi_clear_rings(vsi);
 err_rings:
i40e_vsi_free_q_vectors(vsi);
 err_msix:
-- 
2.30.2

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Re: [Intel-wired-lan] [PATCH v2] i40e: add an error code check in i40e_vsi_setup

2023-10-22 Thread Su Hui

On 2023/10/21 05:09, Jacob Keller wrote:



On 10/19/2023 11:56 PM, Dan Carpenter wrote:

On Fri, Oct 20, 2023 at 10:43:09AM +0800, Su Hui wrote:

check the value of 'ret' after calling 'i40e_vsi_config_rss'.

Signed-off-by: Su Hui 
---
v2:
- call i40e_vsi_clear_rings() to free rings(thank dan carpenter for
   pointing out this).

Looks okay now.

Reviewed-by: Dan Carpenter 

regards,
dan carpenter



For some reason this patch doesn't appear to have hit the
intel-wired-lan list and is thus not being recorded in patchwork for IWL.

Su Hui, would you mind please re-sending this so that it gets picked up
by patchwork? Otherwise I'm afraid that it might get lost inbetween when
Tony returns from vacation.


Sorry for the late reply, I have already resent it[1].

Su Hui

[1] https://lore.kernel.org/all/20231023012024.18757-1-su...@nfschina.com/


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