Re: [Intel-gfx] [PATCH v2 1/3] drm/i915: Reorder hpd init vs. display resume
On Wed, Oct 07, 2020 at 06:15:47PM -0400, Lyude Paul wrote:
> On Wed, 2020-10-07 at 22:22 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Currently we call .hpd_irq_setup() directly just before display
> > resume, and follow it with another call via intel_hpd_init()
> > just afterwards. Assuming the hpd pins are marked as enabled
> > during the open-coded call these two things do exactly the
> > same thing (ie. enable HPD interrupts). Which even makes sense
> > since we definitely need working HPD interrupts for MST sideband
> > during the display resume.
> >
> > So let's nuke the open-coded call and move the intel_hpd_init()
> > call earlier. However we need to leave the poll_init_work stuff
> > behind after the display resume as that will trigger display
> > detection while we're resuming. We don't want that trampling over
> > the display resume process. To make this a bit more symmetric
> > we turn this into a intel_hpd_poll_{enable,disable}() pair.
> > So we end up with the following transformation:
> > intel_hpd_poll_init() -> intel_hpd_poll_enable()
> > lone intel_hpd_init() -> intel_hpd_init()+intel_hpd_poll_disable()
> > .hpd_irq_setup()+resume+intel_hpd_init() ->
> > intel_hpd_init()+resume+intel_hpd_poll_disable()
> >
> > If we really would like to prevent all *long* HPD processing during
> > display resume we'd need some kind of software mechanism to simply
> > ignore all long HPDs. Currently we appear to have that just for
> > fbdev via ifbdev->hpd_suspended. Since we aren't exploding left and
> > right all the time I guess that's mostly sufficient.
> >
> > For a bit of history on this, we first got a mechanism to block
> > hotplug processing during suspend in commit 15239099d7a7 ("drm/i915:
> > enable irqs earlier when resuming") on account of moving the irq enable
> > earlier. This then got removed in commit 50c3dc970a09 ("drm/fb-helper:
> > Fix hpd vs. initial config races") because the fdev initial config
> > got pushed to a later point. The second ad-hoc hpd_irq_setup() for
> > resume was added in commit 0e32b39ceed6 ("drm/i915: add DP 1.2 MST
> > support (v0.7)") to be able to do MST sideband during the resume.
> > And finally we got a partial resurrection of the hpd blocking
> > mechanism in commit e8a8fedd57fd ("drm/i915: Block fbdev HPD
> > processing during suspend"), but this time it only prevent fbdev
> > from handling hpd while resuming.
> >
> > v2: Leave the poll_init_work behind
> >
> > Cc: Lyude Paul
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 9 ++--
> > .../drm/i915/display/intel_display_power.c| 3 +-
> > drivers/gpu/drm/i915/display/intel_hotplug.c | 42 ++-
> > drivers/gpu/drm/i915/display/intel_hotplug.h | 3 +-
> > drivers/gpu/drm/i915/i915_drv.c | 23 --
> > 5 files changed, 46 insertions(+), 34 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index 907e1d155443..0d5607ae97c4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -5036,18 +5036,15 @@ void intel_finish_reset(struct drm_i915_private
> > *dev_priv)
> > intel_pps_unlock_regs_wa(dev_priv);
> > intel_modeset_init_hw(dev_priv);
> > intel_init_clock_gating(dev_priv);
> > -
> > - spin_lock_irq(&dev_priv->irq_lock);
> > - if (dev_priv->display.hpd_irq_setup)
> > - dev_priv->display.hpd_irq_setup(dev_priv);
> > - spin_unlock_irq(&dev_priv->irq_lock);
> > + intel_hpd_init(dev_priv);
> > + intel_hpd_poll_disable(dev_priv);
> >
> > ret = __intel_display_resume(dev, state, ctx);
> > if (ret)
> > drm_err(&dev_priv->drm,
> > "Restoring old state failed with %i\n", ret);
> >
> > - intel_hpd_init(dev_priv);
> > + intel_hpd_poll_disable(dev_priv);
>
> Looks like you're calling intel_hpd_poll_disable() twice here, is this
> intentional?
No, just a failure to follow my own rules. Thanks for spotting it.
--
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Re: [Intel-gfx] [PATCH 03/20] drm/i915: Add PORT_TCn aliases to enum port
On Wed, Oct 07, 2020 at 03:28:48PM -0700, Lucas De Marchi wrote:
> On Tue, Oct 06, 2020 at 05:33:32PM +0300, Ville Syrjälä wrote:
> >diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> >b/drivers/gpu/drm/i915/display/intel_display.h
> >index 8c93253cbd95..a39be3c9e0cf 100644
> >--- a/drivers/gpu/drm/i915/display/intel_display.h
> >+++ b/drivers/gpu/drm/i915/display/intel_display.h
> >@@ -207,6 +207,14 @@ enum port {
> > PORT_H,
> > PORT_I,
> >
> >+/* tgl+ */
> >+PORT_TC1 = PORT_D,
>
> ICL also uses TC ports but there PORT_TC1 would be PORT_C. Just ignore
> that and only add the aliases for tgl+ or should we also add for ICL to
> avoid confusion?
The spec still uses the DDI C-F names on icl for the TC DDIs.
My idea here is to match the spec terminology.
However, it's going to get annoying in the future because some
of the TC DDIs revert back to alphabetic names in the future,
and in a way that doesn't match the original alphabetic names.
Not quite sure how to deal with that. Probably more aliases,
but this time with a platform specific suffix :(
>
> Lucas De Marchi
>
> >+PORT_TC2,
> >+PORT_TC3,
> >+PORT_TC4,
> >+PORT_TC5,
> >+PORT_TC6,
> >+
> > I915_MAX_PORTS
> > };
> >
> >--
> >2.26.2
> >
> >___
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> >Intel-gfx@lists.freedesktop.org
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Re: [Intel-gfx] [PATCH 05/20] drm/i915: Introduce AUX_CH_USBCn
On Wed, Oct 07, 2020 at 03:51:11PM -0700, Lucas De Marchi wrote:
> On Tue, Oct 06, 2020 at 05:33:34PM +0300, Ville Syrjälä wrote:
> >From: Ville Syrjälä
> >
> >Just like with the DDIs tgl+ renamed the AUX CHs to reflect
> >the type of the DDI. Let's add the aliasing enum values for
> >the type-C AUX CHs.
> >
> >Signed-off-by: Ville Syrjälä
> >---
> > drivers/gpu/drm/i915/display/intel_display.h | 8 +++
> > drivers/gpu/drm/i915/display/intel_dp.c | 53 ++--
> > 2 files changed, 58 insertions(+), 3 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> >b/drivers/gpu/drm/i915/display/intel_display.h
> >index a39be3c9e0cf..cba876721ea0 100644
> >--- a/drivers/gpu/drm/i915/display/intel_display.h
> >+++ b/drivers/gpu/drm/i915/display/intel_display.h
> >@@ -290,6 +290,14 @@ enum aux_ch {
> > AUX_CH_G,
> > AUX_CH_H,
> > AUX_CH_I,
> >+
> >+/* tgl+ */
> >+AUX_CH_USBC1 = AUX_CH_D,
> >+AUX_CH_USBC2,
> >+AUX_CH_USBC3,
> >+AUX_CH_USBC4,
> >+AUX_CH_USBC5,
> >+AUX_CH_USBC6,
> > };
> >
> > #define aux_ch_name(a) ((a) + 'A')
> >diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> >b/drivers/gpu/drm/i915/display/intel_dp.c
> >index 239016dcd544..a73c354c920e 100644
> >--- a/drivers/gpu/drm/i915/display/intel_dp.c
> >+++ b/drivers/gpu/drm/i915/display/intel_dp.c
> >@@ -1792,7 +1792,6 @@ static i915_reg_t skl_aux_ctl_reg(struct intel_dp
> >*intel_dp)
> > case AUX_CH_D:
> > case AUX_CH_E:
> > case AUX_CH_F:
> >-case AUX_CH_G:
> > return DP_AUX_CH_CTL(aux_ch);
> > default:
> > MISSING_CASE(aux_ch);
> >@@ -1813,7 +1812,52 @@ static i915_reg_t skl_aux_data_reg(struct intel_dp
> >*intel_dp, int index)
> > case AUX_CH_D:
> > case AUX_CH_E:
> > case AUX_CH_F:
> >-case AUX_CH_G:
> >+return DP_AUX_CH_DATA(aux_ch, index);
> >+default:
> >+MISSING_CASE(aux_ch);
> >+return DP_AUX_CH_DATA(AUX_CH_A, index);
> >+}
> >+}
> >+
> >+static i915_reg_t tgl_aux_ctl_reg(struct intel_dp *intel_dp)
> >+{
> >+struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> >+struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> >+enum aux_ch aux_ch = dig_port->aux_ch;
> >+
> >+switch (aux_ch) {
> >+case AUX_CH_A:
> >+case AUX_CH_B:
> >+case AUX_CH_C:
> >+case AUX_CH_USBC1:
> >+case AUX_CH_USBC2:
> >+case AUX_CH_USBC3:
> >+case AUX_CH_USBC4:
> >+case AUX_CH_USBC5:
> >+case AUX_CH_USBC6:
> >+return DP_AUX_CH_CTL(aux_ch);
> >+default:
> >+MISSING_CASE(aux_ch);
> >+return DP_AUX_CH_CTL(AUX_CH_A);
> >+}
> >+}
> >+
> >+static i915_reg_t tgl_aux_data_reg(struct intel_dp *intel_dp, int index)
> >+{
> >+struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> >+struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> >+enum aux_ch aux_ch = dig_port->aux_ch;
> >+
> >+switch (aux_ch) {
> >+case AUX_CH_A:
> >+case AUX_CH_B:
> >+case AUX_CH_C:
> >+case AUX_CH_USBC1:
> >+case AUX_CH_USBC2:
> >+case AUX_CH_USBC3:
> >+case AUX_CH_USBC4:
> >+case AUX_CH_USBC5:
> >+case AUX_CH_USBC6:
> > return DP_AUX_CH_DATA(aux_ch, index);
> > default:
> > MISSING_CASE(aux_ch);
> >@@ -1834,7 +1878,10 @@ intel_dp_aux_init(struct intel_dp *intel_dp)
> > struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > struct intel_encoder *encoder = &dig_port->base;
> >
> >-if (INTEL_GEN(dev_priv) >= 9) {
> >+if (INTEL_GEN(dev_priv) >= 12) {
> >+intel_dp->aux_ch_ctl_reg = tgl_aux_ctl_reg;
>
> why is this even a function pointer rather than just the reg? AFAICS it
> only depends on dig_port->aux_ch that is initialized in intel_ddi_init()
Just for consistency with .aux_ch_data_reg() I guess. Can't remember
a more specific reason at least.
>
> but could be orthogonal to the change here.
>
>
> Reviewed-by: Lucas De Marchi
>
> Lucas De Marchi
>
> >+intel_dp->aux_ch_data_reg = tgl_aux_data_reg;
> >+} else if (INTEL_GEN(dev_priv) >= 9) {
> > intel_dp->aux_ch_ctl_reg = skl_aux_ctl_reg;
> > intel_dp->aux_ch_data_reg = skl_aux_data_reg;
> > } else if (HAS_PCH_SPLIT(dev_priv)) {
> >--
> >2.26.2
> >
> >___
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Re: [Intel-gfx] [PATCH 07/20] drm/i915: Use AUX_CH_USBCn for the RKL VBT AUX CH setup
On Wed, Oct 07, 2020 at 04:11:45PM -0700, Lucas De Marchi wrote: > On Tue, Oct 06, 2020 at 05:33:36PM +0300, Ville Syrjälä wrote: > >From: Ville Syrjälä > > > >As with the VBT DVO port, RKL uses PHY based mapping for the > >VBT AUX CH. Adjust the code to use the new AUX_USBCn names > >and add a comment to explain the situation. > > > >Signed-off-by: Ville Syrjälä > >--- > > drivers/gpu/drm/i915/display/intel_bios.c | 8 ++-- > > 1 file changed, 6 insertions(+), 2 deletions(-) > > > >diff --git a/drivers/gpu/drm/i915/display/intel_bios.c > >b/drivers/gpu/drm/i915/display/intel_bios.c > >index 179029c3d3d5..77c86f51c36d 100644 > >--- a/drivers/gpu/drm/i915/display/intel_bios.c > >+++ b/drivers/gpu/drm/i915/display/intel_bios.c > >@@ -2636,10 +2636,14 @@ enum aux_ch intel_bios_port_aux_ch(struct > >drm_i915_private *dev_priv, > > aux_ch = AUX_CH_B; > > break; > > case DP_AUX_C: > >-aux_ch = IS_ROCKETLAKE(dev_priv) ? AUX_CH_D : AUX_CH_C; > >+/* > >+ * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D > >+ * map to DDI A,B,TC1,TC2 respectively. > > This will conflict with DG1 that was just merged and use the same > mapping as RKL. Change here LGTM. Aye. I'm still pondering how to make this VBT port stuf not suck so badly. I guess some kind of platform dependent i915->VBT enum mapping function(s) could work, but not sure. > > Reviewed-by: Lucas De Marchi > > Lucas De Marchi > > >+ */ > >+aux_ch = IS_ROCKETLAKE(dev_priv) ? AUX_CH_USBC1 : AUX_CH_C; > > break; > > case DP_AUX_D: > >-aux_ch = IS_ROCKETLAKE(dev_priv) ? AUX_CH_E : AUX_CH_D; > >+aux_ch = IS_ROCKETLAKE(dev_priv) ? AUX_CH_USBC2 : AUX_CH_D; > > break; > > case DP_AUX_E: > > aux_ch = AUX_CH_E; > >-- > >2.26.2 > > > >___ > >Intel-gfx mailing list > >Intel-gfx@lists.freedesktop.org > >https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 05/20] drm/i915: Introduce AUX_CH_USBCn
On Thu, Oct 08, 2020 at 11:40:28AM +0300, Ville Syrjälä wrote:
On Wed, Oct 07, 2020 at 03:51:11PM -0700, Lucas De Marchi wrote:
On Tue, Oct 06, 2020 at 05:33:34PM +0300, Ville Syrjälä wrote:
>From: Ville Syrjälä
>
>Just like with the DDIs tgl+ renamed the AUX CHs to reflect
>the type of the DDI. Let's add the aliasing enum values for
>the type-C AUX CHs.
>
>Signed-off-by: Ville Syrjälä
>---
> drivers/gpu/drm/i915/display/intel_display.h | 8 +++
> drivers/gpu/drm/i915/display/intel_dp.c | 53 ++--
> 2 files changed, 58 insertions(+), 3 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display.h
b/drivers/gpu/drm/i915/display/intel_display.h
>index a39be3c9e0cf..cba876721ea0 100644
>--- a/drivers/gpu/drm/i915/display/intel_display.h
>+++ b/drivers/gpu/drm/i915/display/intel_display.h
>@@ -290,6 +290,14 @@ enum aux_ch {
>AUX_CH_G,
>AUX_CH_H,
>AUX_CH_I,
>+
>+ /* tgl+ */
>+ AUX_CH_USBC1 = AUX_CH_D,
>+ AUX_CH_USBC2,
>+ AUX_CH_USBC3,
>+ AUX_CH_USBC4,
>+ AUX_CH_USBC5,
>+ AUX_CH_USBC6,
> };
>
> #define aux_ch_name(a) ((a) + 'A')
>diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
>index 239016dcd544..a73c354c920e 100644
>--- a/drivers/gpu/drm/i915/display/intel_dp.c
>+++ b/drivers/gpu/drm/i915/display/intel_dp.c
>@@ -1792,7 +1792,6 @@ static i915_reg_t skl_aux_ctl_reg(struct intel_dp
*intel_dp)
>case AUX_CH_D:
>case AUX_CH_E:
>case AUX_CH_F:
>- case AUX_CH_G:
>return DP_AUX_CH_CTL(aux_ch);
>default:
>MISSING_CASE(aux_ch);
>@@ -1813,7 +1812,52 @@ static i915_reg_t skl_aux_data_reg(struct intel_dp
*intel_dp, int index)
>case AUX_CH_D:
>case AUX_CH_E:
>case AUX_CH_F:
>- case AUX_CH_G:
>+ return DP_AUX_CH_DATA(aux_ch, index);
>+ default:
>+ MISSING_CASE(aux_ch);
>+ return DP_AUX_CH_DATA(AUX_CH_A, index);
>+ }
>+}
>+
>+static i915_reg_t tgl_aux_ctl_reg(struct intel_dp *intel_dp)
>+{
>+ struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>+ struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>+ enum aux_ch aux_ch = dig_port->aux_ch;
>+
>+ switch (aux_ch) {
>+ case AUX_CH_A:
>+ case AUX_CH_B:
>+ case AUX_CH_C:
>+ case AUX_CH_USBC1:
>+ case AUX_CH_USBC2:
>+ case AUX_CH_USBC3:
>+ case AUX_CH_USBC4:
>+ case AUX_CH_USBC5:
>+ case AUX_CH_USBC6:
>+ return DP_AUX_CH_CTL(aux_ch);
>+ default:
>+ MISSING_CASE(aux_ch);
>+ return DP_AUX_CH_CTL(AUX_CH_A);
>+ }
>+}
>+
>+static i915_reg_t tgl_aux_data_reg(struct intel_dp *intel_dp, int index)
>+{
>+ struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>+ struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>+ enum aux_ch aux_ch = dig_port->aux_ch;
>+
>+ switch (aux_ch) {
>+ case AUX_CH_A:
>+ case AUX_CH_B:
>+ case AUX_CH_C:
>+ case AUX_CH_USBC1:
>+ case AUX_CH_USBC2:
>+ case AUX_CH_USBC3:
>+ case AUX_CH_USBC4:
>+ case AUX_CH_USBC5:
>+ case AUX_CH_USBC6:
>return DP_AUX_CH_DATA(aux_ch, index);
>default:
>MISSING_CASE(aux_ch);
>@@ -1834,7 +1878,10 @@ intel_dp_aux_init(struct intel_dp *intel_dp)
>struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>struct intel_encoder *encoder = &dig_port->base;
>
>- if (INTEL_GEN(dev_priv) >= 9) {
>+ if (INTEL_GEN(dev_priv) >= 12) {
>+ intel_dp->aux_ch_ctl_reg = tgl_aux_ctl_reg;
why is this even a function pointer rather than just the reg? AFAICS it
only depends on dig_port->aux_ch that is initialized in intel_ddi_init()
Just for consistency with .aux_ch_data_reg() I guess. Can't remember
a more specific reason at least.
even that may be overkill since all the users just use index to
do `+ index * 4`
Lucas De Marchi
but could be orthogonal to the change here.
Reviewed-by: Lucas De Marchi
Lucas De Marchi
>+ intel_dp->aux_ch_data_reg = tgl_aux_data_reg;
>+ } else if (INTEL_GEN(dev_priv) >= 9) {
>intel_dp->aux_ch_ctl_reg = skl_aux_ctl_reg;
>intel_dp->aux_ch_data_reg = skl_aux_data_reg;
>} else if (HAS_PCH_SPLIT(dev_priv)) {
>--
>2.26.2
>
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Re: [Intel-gfx] [PATCH] drm/fb-helper: Add locking to sysrq handling
Hi
Am 07.10.20 um 15:30 schrieb Daniel Vetter:
> We didn't take the kernel_fb_helper_lock mutex, which protects that
> code. While at it, simplify the code
> - inline the function (originally shared with kgdb I think)
> - drop the error tracking and all the complications
> - drop the pointless early out, it served nothing
>
> Signed-off-by: Daniel Vetter
> Cc: Maarten Lankhorst
> Cc: Maxime Ripard
> Cc: Thomas Zimmermann
> Cc: David Airlie
> Cc: Daniel Vetter
> ---
> drivers/gpu/drm/drm_fb_helper.c | 26 +-
> 1 file changed, 5 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
> index 8697554ccd41..c2f72bb6afb1 100644
> --- a/drivers/gpu/drm/drm_fb_helper.c
> +++ b/drivers/gpu/drm/drm_fb_helper.c
> @@ -281,18 +281,12 @@ int drm_fb_helper_restore_fbdev_mode_unlocked(struct
> drm_fb_helper *fb_helper)
> EXPORT_SYMBOL(drm_fb_helper_restore_fbdev_mode_unlocked);
>
> #ifdef CONFIG_MAGIC_SYSRQ
> -/*
> - * restore fbcon display for all kms driver's using this helper, used for
> sysrq
> - * and panic handling.
> - */
> -static bool drm_fb_helper_force_kernel_mode(void)
> +/* emergency restore, don't bother with error reporting */
> +static void drm_fb_helper_restore_work_fn(struct work_struct *ignored)
> {
> - bool ret, error = false;
> struct drm_fb_helper *helper;
>
> - if (list_empty(&kernel_fb_helper_list))
> - return false;
> -
> + mutex_lock(&kernel_fb_helper_lock);
> list_for_each_entry(helper, &kernel_fb_helper_list, kernel_fb_list) {
> struct drm_device *dev = helper->dev;
>
> @@ -300,22 +294,12 @@ static bool drm_fb_helper_force_kernel_mode(void)
> continue;
>
> mutex_lock(&helper->lock);
> - ret = drm_client_modeset_commit_locked(&helper->client);
> - if (ret)
> - error = true;
> + drm_client_modeset_commit_locked(&helper->client);
> mutex_unlock(&helper->lock);
> }
> - return error;
> + mutex_unlock(&kernel_fb_helper_lock);
> }
>
> -static void drm_fb_helper_restore_work_fn(struct work_struct *ignored)
> -{
> - bool ret;
> -
> - ret = drm_fb_helper_force_kernel_mode();
> - if (ret == true)
> - DRM_ERROR("Failed to restore crtc configuration\n");
Is there a specific reason for removing that warning? Even if it doesn't
show up on screen, is it not helpful in the kernel's log?
In any case, the rest looks good.
Acked-by: Thomas Zimmermann
Best regards
Thomas
> -}
> static DECLARE_WORK(drm_fb_helper_restore_work,
> drm_fb_helper_restore_work_fn);
>
> static void drm_fb_helper_sysrq(int dummy1)
>
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer
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Re: [Intel-gfx] [PATCH] drm/fb-helper: Add locking to sysrq handling
On Thu, Oct 8, 2020 at 11:22 AM Thomas Zimmermann wrote:
>
> Hi
>
> Am 07.10.20 um 15:30 schrieb Daniel Vetter:
> > We didn't take the kernel_fb_helper_lock mutex, which protects that
> > code. While at it, simplify the code
> > - inline the function (originally shared with kgdb I think)
> > - drop the error tracking and all the complications
> > - drop the pointless early out, it served nothing
> >
> > Signed-off-by: Daniel Vetter
> > Cc: Maarten Lankhorst
> > Cc: Maxime Ripard
> > Cc: Thomas Zimmermann
> > Cc: David Airlie
> > Cc: Daniel Vetter
> > ---
> > drivers/gpu/drm/drm_fb_helper.c | 26 +-
> > 1 file changed, 5 insertions(+), 21 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_fb_helper.c
> > b/drivers/gpu/drm/drm_fb_helper.c
> > index 8697554ccd41..c2f72bb6afb1 100644
> > --- a/drivers/gpu/drm/drm_fb_helper.c
> > +++ b/drivers/gpu/drm/drm_fb_helper.c
> > @@ -281,18 +281,12 @@ int drm_fb_helper_restore_fbdev_mode_unlocked(struct
> > drm_fb_helper *fb_helper)
> > EXPORT_SYMBOL(drm_fb_helper_restore_fbdev_mode_unlocked);
> >
> > #ifdef CONFIG_MAGIC_SYSRQ
> > -/*
> > - * restore fbcon display for all kms driver's using this helper, used for
> > sysrq
> > - * and panic handling.
> > - */
> > -static bool drm_fb_helper_force_kernel_mode(void)
> > +/* emergency restore, don't bother with error reporting */
> > +static void drm_fb_helper_restore_work_fn(struct work_struct *ignored)
> > {
> > - bool ret, error = false;
> > struct drm_fb_helper *helper;
> >
> > - if (list_empty(&kernel_fb_helper_list))
> > - return false;
> > -
> > + mutex_lock(&kernel_fb_helper_lock);
> > list_for_each_entry(helper, &kernel_fb_helper_list, kernel_fb_list) {
> > struct drm_device *dev = helper->dev;
> >
> > @@ -300,22 +294,12 @@ static bool drm_fb_helper_force_kernel_mode(void)
> > continue;
> >
> > mutex_lock(&helper->lock);
> > - ret = drm_client_modeset_commit_locked(&helper->client);
> > - if (ret)
> > - error = true;
> > + drm_client_modeset_commit_locked(&helper->client);
> > mutex_unlock(&helper->lock);
> > }
> > - return error;
> > + mutex_unlock(&kernel_fb_helper_lock);
> > }
> >
> > -static void drm_fb_helper_restore_work_fn(struct work_struct *ignored)
> > -{
> > - bool ret;
> > -
> > - ret = drm_fb_helper_force_kernel_mode();
> > - if (ret == true)
> > - DRM_ERROR("Failed to restore crtc configuration\n");
>
> Is there a specific reason for removing that warning? Even if it doesn't
> show up on screen, is it not helpful in the kernel's log?
I just found it really unhelpful, if you're trying to force-show
fbcon, what's the point if it doesn't work out? The user will notice.
Also, if we're really in a dire situation where you want this, in my
experience there's a bunch of random other reasons why this can fail,
mostly when the work we have to schedule for locking reasons never
runs. So it's also unreliable.
> In any case, the rest looks good.
>
> Acked-by: Thomas Zimmermann
Thanks for taking a look, I'll apply it.
-Daniel
>
> Best regards
> Thomas
>
> > -}
> > static DECLARE_WORK(drm_fb_helper_restore_work,
> > drm_fb_helper_restore_work_fn);
> >
> > static void drm_fb_helper_sysrq(int dummy1)
> >
>
> --
> Thomas Zimmermann
> Graphics Driver Developer
> SUSE Software Solutions Germany GmbH
> Maxfeldstr. 5, 90409 Nürnberg, Germany
> (HRB 36809, AG Nürnberg)
> Geschäftsführer: Felix Imendörffer
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [Intel-gfx] [PATCH 2/2] drm/atomic: debug output for EBUSY
On Tue, Sep 29, 2020 at 04:48:39PM +0100, Daniel Stone wrote: > Hi, > > On Fri, 25 Sep 2020 at 09:46, Daniel Vetter wrote: > > Hopefully we'll have the drm crash recorder RSN, but meanwhile > > compositors would like to know a bit better why they get an EBUSY. > > Thanks a lot, this is super helpful! Both patches are: > Reviewed-by: Daniel Stone Ok, both patches queued up for 5.11, let's see what gives :-) -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2] drm/i915: Exclude low pages (128KiB) of stolen from use
The GPU is trashing the low pages of its reserved memory upon reset. If
we are using this memory for ringbuffers, then we will dutiful resubmit
the trashed rings after the reset causing further resets, and worse. We
must exclude this range from our own use. The value of 128KiB was found
by empirical measurement on gen9.
Signed-off-by: Chris Wilson
Cc: sta...@vger.kernel.org
---
v2 comes with a selftest to see how widespread the issue is
---
drivers/gpu/drm/i915/Kconfig.debug | 1 +
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 5 +-
drivers/gpu/drm/i915/gt/selftest_reset.c | 141 +
3 files changed, 145 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.debug
b/drivers/gpu/drm/i915/Kconfig.debug
index 206882e154bc..0fb7fd0ef717 100644
--- a/drivers/gpu/drm/i915/Kconfig.debug
+++ b/drivers/gpu/drm/i915/Kconfig.debug
@@ -162,6 +162,7 @@ config DRM_I915_SELFTEST
select DRM_EXPORT_FOR_TESTS if m
select FAULT_INJECTION
select PRIME_NUMBERS
+ select CRC32
help
Choose this option to allow the driver to perform selftests upon
loading; also requires the i915.selftest=1 module parameter. To
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index 0be5e8683337..c0cc2a972a11 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -53,8 +53,9 @@ int i915_gem_stolen_insert_node(struct drm_i915_private *i915,
struct drm_mm_node *node, u64 size,
unsigned alignment)
{
- return i915_gem_stolen_insert_node_in_range(i915, node, size,
- alignment, 0, U64_MAX);
+ return i915_gem_stolen_insert_node_in_range(i915, node,
+ size, alignment,
+ SZ_128K, U64_MAX);
}
void i915_gem_stolen_remove_node(struct drm_i915_private *i915,
diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c
b/drivers/gpu/drm/i915/gt/selftest_reset.c
index 35406ecdf0b2..f73f132e57c4 100644
--- a/drivers/gpu/drm/i915/gt/selftest_reset.c
+++ b/drivers/gpu/drm/i915/gt/selftest_reset.c
@@ -3,9 +3,149 @@
* Copyright © 2018 Intel Corporation
*/
+#include
+
+#include "i915_memcpy.h"
#include "i915_selftest.h"
#include "selftests/igt_reset.h"
#include "selftests/igt_atomic.h"
+#include "selftests/igt_spinner.h"
+
+static int igt_reset_stolen(void *arg)
+{
+ struct intel_gt *gt = arg;
+ struct i915_ggtt *ggtt = >->i915->ggtt;
+ struct resource *dsm = >->i915->dsm;
+ resource_size_t num_pages, page, max, count;
+ struct intel_engine_cs *engine;
+ intel_wakeref_t wakeref;
+ enum intel_engine_id id;
+ struct igt_spinner spin;
+ u32 seed, *crc;
+ void *tmp;
+ int err;
+
+ if (!drm_mm_node_allocated(&ggtt->error_capture))
+ return 0;
+
+ num_pages = resource_size(dsm) >> PAGE_SHIFT;
+ if (!num_pages)
+ return 0;
+
+ crc = kmalloc_array(num_pages, sizeof(u32), GFP_KERNEL);
+ if (!crc)
+ return -ENOMEM;
+
+ tmp = kmalloc(PAGE_SIZE, GFP_KERNEL);
+ if (!tmp) {
+ err = -ENOMEM;
+ goto err_crc;
+ }
+
+ igt_global_reset_lock(gt);
+ wakeref = intel_runtime_pm_get(gt->uncore->rpm);
+
+ err = igt_spinner_init(&spin, gt);
+ if (err)
+ goto err_lock;
+
+ for_each_engine(engine, gt, id) {
+ struct i915_request *rq;
+
+ intel_engine_pm_get(engine);
+
+ rq = igt_spinner_create_request(&spin,
+ engine->kernel_context,
+ MI_ARB_CHECK);
+ i915_request_add(rq);
+
+ intel_engine_pm_put(engine);
+ }
+
+ seed = 0;
+ for (page = 0; page < num_pages; page++) {
+ dma_addr_t dma;
+ void __iomem *s;
+ void *in;
+
+ dma = (dma_addr_t)dsm->start + (page << PAGE_SHIFT);
+
+ ggtt->vm.insert_page(&ggtt->vm, dma,
+ggtt->error_capture.start,
+I915_CACHE_NONE, 0);
+ mb();
+
+ s = io_mapping_map_wc(&ggtt->iomap,
+ ggtt->error_capture.start,
+ PAGE_SIZE);
+
+ in = s;
+ if (i915_memcpy_from_wc(tmp, s, PAGE_SIZE))
+ in = tmp;
+ seed = crc32_le(seed, in, PAGE_SIZE);
+
+ io_mapping_unmap(s);
+
+ crc[page] = seed;
+ }
+ mb();
+ ggtt->vm.clear_range(&ggtt->vm, ggtt->error_capture.start, PAGE_SIZE);
+
+ intel_gt_re
Re: [Intel-gfx] [PATCH v2] drm/i915: Exclude low pages (128KiB) of stolen from use
On Thu, Oct 08, 2020 at 10:54:36AM +0100, Chris Wilson wrote:
> The GPU is trashing the low pages of its reserved memory upon reset. If
> we are using this memory for ringbuffers, then we will dutiful resubmit
> the trashed rings after the reset causing further resets, and worse. We
> must exclude this range from our own use. The value of 128KiB was found
> by empirical measurement on gen9.
>
> Signed-off-by: Chris Wilson
> Cc: sta...@vger.kernel.org
> ---
> v2 comes with a selftest to see how widespread the issue is
Do we need something to make sure FBC isn't scribbling into
stolen during the test?
> ---
> drivers/gpu/drm/i915/Kconfig.debug | 1 +
> drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 5 +-
> drivers/gpu/drm/i915/gt/selftest_reset.c | 141 +
> 3 files changed, 145 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/Kconfig.debug
> b/drivers/gpu/drm/i915/Kconfig.debug
> index 206882e154bc..0fb7fd0ef717 100644
> --- a/drivers/gpu/drm/i915/Kconfig.debug
> +++ b/drivers/gpu/drm/i915/Kconfig.debug
> @@ -162,6 +162,7 @@ config DRM_I915_SELFTEST
> select DRM_EXPORT_FOR_TESTS if m
> select FAULT_INJECTION
> select PRIME_NUMBERS
> + select CRC32
> help
> Choose this option to allow the driver to perform selftests upon
> loading; also requires the i915.selftest=1 module parameter. To
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> index 0be5e8683337..c0cc2a972a11 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> @@ -53,8 +53,9 @@ int i915_gem_stolen_insert_node(struct drm_i915_private
> *i915,
> struct drm_mm_node *node, u64 size,
> unsigned alignment)
> {
> - return i915_gem_stolen_insert_node_in_range(i915, node, size,
> - alignment, 0, U64_MAX);
> + return i915_gem_stolen_insert_node_in_range(i915, node,
> + size, alignment,
> + SZ_128K, U64_MAX);
> }
>
> void i915_gem_stolen_remove_node(struct drm_i915_private *i915,
> diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c
> b/drivers/gpu/drm/i915/gt/selftest_reset.c
> index 35406ecdf0b2..f73f132e57c4 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_reset.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_reset.c
> @@ -3,9 +3,149 @@
> * Copyright © 2018 Intel Corporation
> */
>
> +#include
> +
> +#include "i915_memcpy.h"
> #include "i915_selftest.h"
> #include "selftests/igt_reset.h"
> #include "selftests/igt_atomic.h"
> +#include "selftests/igt_spinner.h"
> +
> +static int igt_reset_stolen(void *arg)
> +{
> + struct intel_gt *gt = arg;
> + struct i915_ggtt *ggtt = >->i915->ggtt;
> + struct resource *dsm = >->i915->dsm;
> + resource_size_t num_pages, page, max, count;
> + struct intel_engine_cs *engine;
> + intel_wakeref_t wakeref;
> + enum intel_engine_id id;
> + struct igt_spinner spin;
> + u32 seed, *crc;
> + void *tmp;
> + int err;
> +
> + if (!drm_mm_node_allocated(&ggtt->error_capture))
> + return 0;
> +
> + num_pages = resource_size(dsm) >> PAGE_SHIFT;
> + if (!num_pages)
> + return 0;
> +
> + crc = kmalloc_array(num_pages, sizeof(u32), GFP_KERNEL);
> + if (!crc)
> + return -ENOMEM;
> +
> + tmp = kmalloc(PAGE_SIZE, GFP_KERNEL);
> + if (!tmp) {
> + err = -ENOMEM;
> + goto err_crc;
> + }
> +
> + igt_global_reset_lock(gt);
> + wakeref = intel_runtime_pm_get(gt->uncore->rpm);
> +
> + err = igt_spinner_init(&spin, gt);
> + if (err)
> + goto err_lock;
> +
> + for_each_engine(engine, gt, id) {
> + struct i915_request *rq;
> +
> + intel_engine_pm_get(engine);
> +
> + rq = igt_spinner_create_request(&spin,
> + engine->kernel_context,
> + MI_ARB_CHECK);
> + i915_request_add(rq);
> +
> + intel_engine_pm_put(engine);
> + }
> +
> + seed = 0;
> + for (page = 0; page < num_pages; page++) {
> + dma_addr_t dma;
> + void __iomem *s;
> + void *in;
> +
> + dma = (dma_addr_t)dsm->start + (page << PAGE_SHIFT);
> +
> + ggtt->vm.insert_page(&ggtt->vm, dma,
> + ggtt->error_capture.start,
> + I915_CACHE_NONE, 0);
> + mb();
> +
> + s = io_mapping_map_wc(&ggtt->iomap,
> + ggtt->error_capture.start,
> + PAGE_SIZE);
> +
> + in = s;
> + if (i915_memcpy_from_wc(tmp, s, PAGE_SIZE))
> +
Re: [Intel-gfx] [PATCH v2] drm/i915: Exclude low pages (128KiB) of stolen from use
Quoting Ville Syrjälä (2020-10-08 11:04:22) > On Thu, Oct 08, 2020 at 10:54:36AM +0100, Chris Wilson wrote: > > The GPU is trashing the low pages of its reserved memory upon reset. If > > we are using this memory for ringbuffers, then we will dutiful resubmit > > the trashed rings after the reset causing further resets, and worse. We > > must exclude this range from our own use. The value of 128KiB was found > > by empirical measurement on gen9. > > > > Signed-off-by: Chris Wilson > > Cc: sta...@vger.kernel.org > > --- > > v2 comes with a selftest to see how widespread the issue is > > Do we need something to make sure FBC isn't scribbling into > stolen during the test? igt runs the tests with disable_display=1, that is still being honoured right? I did think about looking up the address to see if the drm_mm_node is in use to try and filter out such users. For starters, I just want to confirm that CI is seeing what I'm seeing. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/3] drm/i915: Skip aux plane stuff when there is no aux plane
From: Ville Syrjälä
when the hardware isn't going to use the aux plane there's no
real point in dealing with the relevant hardware restrictions.
So let's just skip all that when not necessary.
We can now also remove the offset=~0xfff behaviour for unused
color planes. Let's just zero out everyting so as to not leave
stale garbage behind to confuse people debugging the code.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 14 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 6 +++---
2 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 44fd7059838f..34ba34f84b2a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2001,13 +2001,17 @@ static int ccs_to_main_plane(const struct
drm_framebuffer *fb, int ccs_plane)
return ccs_plane - fb->format->num_planes / 2;
}
-/* Return either the main plane's CCS or - if not a CCS FB - UV plane */
int intel_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane)
{
+ struct drm_i915_private *i915 = to_i915(fb->dev);
+
if (is_ccs_modifier(fb->modifier))
return main_to_ccs_plane(fb, main_plane);
-
- return 1;
+ else if (INTEL_GEN(i915) < 11 &&
+intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier))
+ return 1;
+ else
+ return 0;
}
bool
@@ -3933,7 +3937,7 @@ static int skl_check_main_surface(struct
intel_plane_state *plane_state)
* main surface offset, and it must be non-negative. Make
* sure that is what we will get.
*/
- if (offset > aux_offset)
+ if (aux_plane && offset > aux_offset)
offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state,
0,
offset, aux_offset &
~(alignment - 1));
@@ -4131,7 +4135,7 @@ int skl_check_plane_surface(struct intel_plane_state
*plane_state)
}
for (i = fb->format->num_planes; i <
ARRAY_SIZE(plane_state->color_plane); i++) {
- plane_state->color_plane[i].offset = ~0xfff;
+ plane_state->color_plane[i].offset = 0;
plane_state->color_plane[i].x = 0;
plane_state->color_plane[i].y = 0;
}
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c
b/drivers/gpu/drm/i915/display/intel_sprite.c
index 2da11ab6343c..bf8c82a2b213 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -656,7 +656,6 @@ skl_program_plane(struct intel_plane *plane,
const struct drm_framebuffer *fb = plane_state->hw.fb;
int aux_plane = intel_main_to_aux_plane(fb, color_plane);
u32 aux_dist = plane_state->color_plane[aux_plane].offset - surf_addr;
- u32 aux_stride = skl_plane_stride(plane_state, aux_plane);
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
u32 x = plane_state->color_plane[color_plane].x;
@@ -691,6 +690,9 @@ skl_program_plane(struct intel_plane *plane,
crtc_y = 0;
}
+ if (INTEL_GEN(dev_priv) < 12 && aux_plane)
+ aux_dist |= skl_plane_stride(plane_state, aux_plane);
+
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id), stride);
@@ -699,8 +701,6 @@ skl_program_plane(struct intel_plane *plane,
intel_de_write_fw(dev_priv, PLANE_SIZE(pipe, plane_id),
(src_h << 16) | src_w);
- if (INTEL_GEN(dev_priv) < 12)
- aux_dist |= aux_stride;
intel_de_write_fw(dev_priv, PLANE_AUX_DIST(pipe, plane_id), aux_dist);
if (icl_is_hdr_plane(dev_priv, plane_id))
--
2.26.2
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[Intel-gfx] [PATCH 3/3] drm/i915: s/int/u32/ for aux_offset/alignment
From: Ville Syrjälä
ggtt offsets/alignments are u32 everywhere else. Don't use
a signed int for them here.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 34ba34f84b2a..fe482ca721f8 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4026,8 +4026,8 @@ static int skl_check_nv12_aux_surface(struct
intel_plane_state *plane_state)
if (is_ccs_modifier(fb->modifier)) {
int ccs_plane = main_to_ccs_plane(fb, uv_plane);
- int aux_offset = plane_state->color_plane[ccs_plane].offset;
- int alignment = intel_surf_alignment(fb, uv_plane);
+ u32 aux_offset = plane_state->color_plane[ccs_plane].offset;
+ u32 alignment = intel_surf_alignment(fb, uv_plane);
if (offset > aux_offset)
offset = intel_plane_adjust_aligned_offset(&x, &y,
--
2.26.2
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[Intel-gfx] [PATCH 1/3] drm/i915: Set all unused color plane offsets to ~0xfff again
From: Ville Syrjälä
When the number of potential color planes grew to 4 we stopped
setting all unused color plane offsets to ~0xfff. The code
still tries to do this, but actually does nothing since the
loop limits are bogus.
skl_check_main_surface() actually depends on this ~0xfff
behaviour as it will make sure to move the main surface
offset below the aux surface offset because the hardware
AUX_DIST must be a non-negative value [1], and for simplicity
it doesn't bother checking if the AUX plane is actually
needed or not. So currently it may end up shuffling the
main surface around based on some stale leftover AUX offset.
The skl+ plane code also just blindly calculates the AUX_DIST
whether or not the AUX plane is actually needed by the hw or
not, and that too will now potentially use some stale AUX
surface offset in the calculation. Would seem nicer to
guarantee a consistent non-negative AUX_DIST always.
So bring back the original ~0xfff offset behaviour for
unused color planes. Though it doesn't seem super likely
that this inconsistency would cause any real issues.
Cc: Dhinakaran Pandiyan
Cc: Lucas De Marchi
Cc: Imre Deak
Cc: Radhakrishna Sripada
Fixes: 2dfbf9d2873a ("drm/i915/tgl: Gen-12 display can decompress surfaces
compressed by the media engine")
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 17 +
1 file changed, 5 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 907e1d155443..44fd7059838f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4104,8 +4104,7 @@ static int skl_check_ccs_aux_surface(struct
intel_plane_state *plane_state)
int skl_check_plane_surface(struct intel_plane_state *plane_state)
{
const struct drm_framebuffer *fb = plane_state->hw.fb;
- int ret;
- bool needs_aux = false;
+ int ret, i;
ret = intel_plane_compute_gtt(plane_state);
if (ret)
@@ -4119,7 +4118,6 @@ int skl_check_plane_surface(struct intel_plane_state
*plane_state)
* it.
*/
if (is_ccs_modifier(fb->modifier)) {
- needs_aux = true;
ret = skl_check_ccs_aux_surface(plane_state);
if (ret)
return ret;
@@ -4127,20 +4125,15 @@ int skl_check_plane_surface(struct intel_plane_state
*plane_state)
if (intel_format_info_is_yuv_semiplanar(fb->format,
fb->modifier)) {
- needs_aux = true;
ret = skl_check_nv12_aux_surface(plane_state);
if (ret)
return ret;
}
- if (!needs_aux) {
- int i;
-
- for (i = 1; i < fb->format->num_planes; i++) {
- plane_state->color_plane[i].offset = ~0xfff;
- plane_state->color_plane[i].x = 0;
- plane_state->color_plane[i].y = 0;
- }
+ for (i = fb->format->num_planes; i <
ARRAY_SIZE(plane_state->color_plane); i++) {
+ plane_state->color_plane[i].offset = ~0xfff;
+ plane_state->color_plane[i].x = 0;
+ plane_state->color_plane[i].y = 0;
}
ret = skl_check_main_surface(plane_state);
--
2.26.2
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Re: [Intel-gfx] [PATCH v2] drm/i915: Exclude low pages (128KiB) of stolen from use
On Thu, Oct 08, 2020 at 11:12:37AM +0100, Chris Wilson wrote: > Quoting Ville Syrjälä (2020-10-08 11:04:22) > > On Thu, Oct 08, 2020 at 10:54:36AM +0100, Chris Wilson wrote: > > > The GPU is trashing the low pages of its reserved memory upon reset. If > > > we are using this memory for ringbuffers, then we will dutiful resubmit > > > the trashed rings after the reset causing further resets, and worse. We > > > must exclude this range from our own use. The value of 128KiB was found > > > by empirical measurement on gen9. > > > > > > Signed-off-by: Chris Wilson > > > Cc: sta...@vger.kernel.org > > > --- > > > v2 comes with a selftest to see how widespread the issue is > > > > Do we need something to make sure FBC isn't scribbling into > > stolen during the test? > > igt runs the tests with disable_display=1, that is still being honoured > right? It just marks all connectors as disconnected now. If coming straight from boot presumaly whatever the BIOS lit up could still be on at that point. Though I guess we would have typically done a module reload for this? rmmod should shut things down IIRC. Also wouldn't think the BIOS would even enables FBC. > > I did think about looking up the address to see if the drm_mm_node is in > use to try and filter out such users. For starters, I just want to > confirm that CI is seeing what I'm seeing. > -Chris -- Ville Syrjälä Intel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/gem: Poison stolen pages before use
When allocating objects from stolen, memset() the backing store to
POISON_INUSE (0x5a) to help identify any uninitialised use of a stolen
object.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 33 ++
1 file changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index 0be5e8683337..4c2869c0a802 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -572,6 +572,38 @@ static const struct drm_i915_gem_object_ops
i915_gem_object_stolen_ops = {
.release = i915_gem_object_release_stolen,
};
+static void dbg_poison(struct drm_i915_gem_object *obj)
+{
+#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)
+ struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ struct i915_ggtt *ggtt = &i915->ggtt;
+ struct sgt_iter iter;
+ dma_addr_t addr;
+
+ if (!drm_mm_node_allocated(&ggtt->error_capture))
+ return;
+
+ mutex_lock(&ggtt->error_mutex);
+ for_each_sgt_daddr(addr, iter, obj->mm.pages) {
+ void __iomem *s;
+
+ ggtt->vm.insert_page(&ggtt->vm, addr,
+ggtt->error_capture.start,
+I915_CACHE_NONE, 0);
+ mb();
+
+ s = io_mapping_map_wc(&ggtt->iomap,
+ ggtt->error_capture.start,
+ PAGE_SIZE);
+ memset(s, POISON_INUSE, PAGE_SIZE);
+ io_mapping_unmap(s);
+ }
+ mb();
+ ggtt->vm.clear_range(&ggtt->vm, ggtt->error_capture.start, PAGE_SIZE);
+ mutex_unlock(&ggtt->error_mutex);
+#endif
+}
+
static struct drm_i915_gem_object *
__i915_gem_object_create_stolen(struct intel_memory_region *mem,
struct drm_mm_node *stolen)
@@ -598,6 +630,7 @@ __i915_gem_object_create_stolen(struct intel_memory_region
*mem,
goto cleanup;
i915_gem_object_init_memory_region(obj, mem, 0);
+ dbg_poison(obj);
return obj;
--
2.20.1
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Re: [Intel-gfx] [v7 01/10] drm/i915/display: Add HDR Capability detection for LSPCON
On Tue, Oct 06, 2020 at 06:36:45PM +0530, Uma Shankar wrote:
> LSPCON firmware exposes HDR capability through LPCON_CAPABILITIES
> DPCD register. LSPCON implementations capable of supporting
> HDR set HDR_CAPABILITY bit in LSPCON_CAPABILITIES to 1. This patch
> reads the same, detects the HDR capability and adds this to
> intel_lspcon struct.
>
> v2: Addressed Jani Nikula's review comment and fixed the HDR
> capability detection logic
>
> Signed-off-by: Uma Shankar
> ---
> .../drm/i915/display/intel_display_types.h| 1 +
> drivers/gpu/drm/i915/display/intel_lspcon.c | 30 +++
> 2 files changed, 31 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index d5dc18cb8c39..fb8cfc0981d6 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1398,6 +1398,7 @@ struct intel_lspcon {
> bool active;
> enum drm_lspcon_mode mode;
> enum lspcon_vendor vendor;
> + bool hdr_supported;
> };
>
> struct intel_digital_port {
> diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
> b/drivers/gpu/drm/i915/display/intel_lspcon.c
> index ee95fc353a56..f92962195698 100644
> --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> @@ -35,6 +35,8 @@
> #define LSPCON_VENDOR_PARADE_OUI 0x001CF8
> #define LSPCON_VENDOR_MCA_OUI 0x0060AD
>
> +#define DPCD_MCA_LSPCON_HDR_STATUS 0x70003
> +
> /* AUX addresses to write MCA AVI IF */
> #define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0
> #define LSPCON_MCA_AVI_IF_CTRL 0x5DF
> @@ -104,6 +106,32 @@ static bool lspcon_detect_vendor(struct intel_lspcon
> *lspcon)
> return true;
> }
>
> +static void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon)
> +{
> + struct intel_digital_port *intel_dig_port =
> + container_of(lspcon, struct intel_digital_port, lspcon);
s/intel_dig_port/dig_port/ to conform with
commit 7801f3b792b0 ("drm/i915/display: prefer dig_port to reference
intel_digital_port")
> + struct drm_device *dev = intel_dig_port->base.base.dev;
> + struct intel_dp *dp = lspcon_to_intel_dp(lspcon);
> + u8 hdr_caps;
> + int ret;
> +
> + /* Enable HDR for MCA based LSPCON devices */
> + if (lspcon->vendor == LSPCON_VENDOR_MCA)
> + ret = drm_dp_dpcd_read(&dp->aux, DPCD_MCA_LSPCON_HDR_STATUS,
> +&hdr_caps, 1);
> + else
> + return;
> +
> + if (ret < 0) {
> + drm_dbg_kms(dev, "hdr capability detection failed\n");
> + lspcon->hdr_supported = false;
> + return;
> + } else if (hdr_caps & 0x1) {
> + drm_dbg_kms(dev, "lspcon capable of HDR\n");
> + lspcon->hdr_supported = true;
> + }
> +}
> +
> static enum drm_lspcon_mode lspcon_get_current_mode(struct intel_lspcon
> *lspcon)
> {
> enum drm_lspcon_mode current_mode;
> @@ -554,6 +582,8 @@ static bool lspcon_init(struct intel_digital_port
> *dig_port)
> return false;
> }
>
> + lspcon_detect_hdr_capability(lspcon);
> +
This is now too late since we do this after registering the connector.
Need to move this to the init stage, but lspcon detection requires hpd
detection logic to be enabled, so once I get the hpd init order sorted
we need to do this after intel_hpd_init() but before the connector
is registered. Hmm, maybe we can actually do it from connector's
.late_register() hook?
> connector->ycbcr_420_allowed = true;
> lspcon->active = true;
> DRM_DEBUG_KMS("Success: LSPCON init\n");
> --
> 2.26.2
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH v5 3/3] drm/i915/display: Program PSR2 selective fetch registers
Looks good to me.
Reviewed-by: Gwan-gyeong Mun
On Wed, 2020-10-07 at 12:52 -0700, José Roberto de Souza wrote:
> Another step towards PSR2 selective fetch, here programming plane
> selective fetch registers and MAN_TRK_CTL enabling selective fetch
> but
> for now it is fetching the whole area of the planes.
> The damaged area calculation will come as next and final step.
>
> v2:
> - removed warn on when no plane is visible in state
> - removed calculations using plane damaged area in
> intel_psr2_program_plane_sel_fetch()
>
> v3:
> - do not shift 16 positions the plane dst coordinates, only src is
> shifted
>
> v4:
> - only setting PLANE_SEL_FETCH_CTL_ENABLE and MCURSOR_MODE in
> PLANE_SEL_FETCH_CTL
>
> v5:
> - not masking bits for cursor
>
> BSpec: 55229
> Cc: Gwan-gyeong Mun
> Cc: Ville Syrjälä
> Signed-off-by: José Roberto de Souza
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 10 +-
> drivers/gpu/drm/i915/display/intel_psr.c | 117
> ++-
> drivers/gpu/drm/i915/display/intel_psr.h | 10 +-
> drivers/gpu/drm/i915/display/intel_sprite.c | 3 +
> 4 files changed, 131 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 907e1d155443..8b80e03694e2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -11872,6 +11872,9 @@ static void i9xx_update_cursor(struct
> intel_plane *plane,
> if (INTEL_GEN(dev_priv) >= 9)
> skl_write_cursor_wm(plane, crtc_state);
>
> + if (!needs_modeset(crtc_state))
> + intel_psr2_program_plane_sel_fetch(plane, crtc_state,
> plane_state, 0);
> +
> if (plane->cursor.base != base ||
> plane->cursor.size != fbc_ctl ||
> plane->cursor.cntl != cntl) {
> @@ -12883,8 +12886,11 @@ static int intel_crtc_atomic_check(struct
> intel_atomic_state *state,
>
> }
>
> - if (!mode_changed)
> - intel_psr2_sel_fetch_update(state, crtc);
> + if (!mode_changed) {
> + ret = intel_psr2_sel_fetch_update(state, crtc);
> + if (ret)
> + return ret;
> + }
>
> return 0;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 02f74b0ddec1..a591a475f148 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1166,6 +1166,38 @@ static void psr_force_hw_tracking_exit(struct
> drm_i915_private *dev_priv)
> intel_psr_exit(dev_priv);
> }
>
> +void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane,
> + const struct intel_crtc_state
> *crtc_state,
> + const struct intel_plane_state
> *plane_state,
> + int color_plane)
> +{
> + struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> + enum pipe pipe = plane->pipe;
> + u32 val;
> +
> + if (!crtc_state->enable_psr2_sel_fetch)
> + return;
> +
> + val = plane_state ? plane_state->ctl : 0;
> + val &= plane->id == PLANE_CURSOR ? val :
> PLANE_SEL_FETCH_CTL_ENABLE;
> + intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane-
> >id), val);
> + if (!val || plane->id == PLANE_CURSOR)
> + return;
> +
> + val = plane_state->uapi.dst.y1 << 16 | plane_state-
> >uapi.dst.x1;
> + intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_POS(pipe, plane-
> >id), val);
> +
> + val = plane_state->color_plane[color_plane].y << 16;
> + val |= plane_state->color_plane[color_plane].x;
> + intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_OFFSET(pipe, plane-
> >id),
> + val);
> +
> + /* Sizes are 0 based */
> + val = ((drm_rect_height(&plane_state->uapi.src) >> 16) - 1) <<
> 16;
> + val |= (drm_rect_width(&plane_state->uapi.src) >> 16) - 1;
> + intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_SIZE(pipe, plane-
> >id), val);
> +}
> +
> void intel_psr2_program_trans_man_trk_ctl(const struct
> intel_crtc_state *crtc_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> @@ -1180,16 +1212,91 @@ void
> intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state
> *crtc_st
> crtc_state->psr2_man_track_ctl);
> }
>
> -void intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> - struct intel_crtc *crtc)
> +static void psr2_man_trk_ctl_calc(struct intel_crtc_state
> *crtc_state,
> + struct drm_rect *clip, bool
> full_update)
> +{
> + u32 val = PSR2_MAN_TRK_CTL_ENABLE;
> +
> + if (full_update) {
> + val |= PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME;
> + goto exit;
> + }
> +
> + if (clip->y1 == -1)
> + goto exit;
> +
> + val |= PSR
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for rm/i915: Add support for LTTPR non-transparent link training mode
== Series Details == Series: rm/i915: Add support for LTTPR non-transparent link training mode URL : https://patchwork.freedesktop.org/series/82449/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1019:47:expected unsigned int [addressable] [usertype] ulClockParams +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1019:47:got restricted __le32 [usertype] +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1019:47: warning: incorrect type in assignment (different base types) +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1028:50: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1029:49: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1037:47: warning: too many warnings +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:184:44: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:283:14: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:320:14: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:323:14: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:326:14: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:329:18: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:330:26: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:338:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:340:38: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:342:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:346:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:348:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:353:33: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:367:43: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:369:38: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:374:67: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:375:53: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:378:66: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:389:80: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:395:57: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:402:69: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:403:53: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:406:66: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:414:66: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:423:69: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:424:69: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:473:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:476:45: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:477:45: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:484:54: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:52:28: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:531:35: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:53:29: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:533:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:54:26: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:55:27: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:56:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:57:26: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:577:21: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:581:25: warning: cast to restricted __le32 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:58:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:583:21: warning: cast to restricted __le32 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:586:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:590:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:59:26: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:598:21: warning: c
Re: [Intel-gfx] [v7 04/10] drm/i915/display: Enable BT2020 for HDR on LSPCON devices
On Tue, Oct 06, 2020 at 06:36:48PM +0530, Uma Shankar wrote:
> Enable Colorspace as BT2020 if driving HDR content.Sending Colorimetry
> data for HDR using AVI infoframe. LSPCON firmware expects this and though
> SOC drives DP, for HDMI panel AVI infoframe is sent to the LSPCON device
> which transfers the same to HDMI sink.
>
> v2: Dropped state managed in drm core as per Jani Nikula's suggestion.
>
> v3: Aligned colorimetry handling for lspcon as per compute_avi_infoframes,
> as suggested by Ville.
>
> Signed-off-by: Uma Shankar
> ---
> drivers/gpu/drm/i915/display/intel_lspcon.c | 25 -
> 1 file changed, 19 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
> b/drivers/gpu/drm/i915/display/intel_lspcon.c
> index 440d2b3c2212..9ffa36797daf 100644
> --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> @@ -534,12 +534,25 @@ void lspcon_set_infoframes(struct intel_encoder
> *encoder,
> frame.avi.colorspace = HDMI_COLORSPACE_RGB;
> }
>
> - drm_hdmi_avi_infoframe_quant_range(&frame.avi,
> -conn_state->connector,
> -adjusted_mode,
> -crtc_state->limited_color_range ?
> -HDMI_QUANTIZATION_RANGE_LIMITED :
> -HDMI_QUANTIZATION_RANGE_FULL);
> + drm_hdmi_avi_infoframe_colorspace(&frame.avi, conn_state);
That seems to be a missing part from
commit 9d1bb6f0222c ("drm/i915/dp: Attach colorspace property")
Also looks like
commit 2f146b78d5a9 ("drm/i915: Attach colorspace property and enable modeset")
added a bogus lspcon check into intel_hdmi_add_properties(). That should
be nuked.
Hmm. This whole thing seems like a total snafu. Since we use
AVI IF for lspcon it should follow the HDMI colorimetry stuff, but
now it uses some kind of mix of both HDMI and DP. We need to sort this
out somehow...
> +
> + /* nonsense combination */
> + drm_WARN_ON(encoder->base.dev, crtc_state->limited_color_range &&
> + crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB);
> +
> + if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB) {
> + drm_hdmi_avi_infoframe_quant_range(&frame.avi,
> +conn_state->connector,
> +adjusted_mode,
> +
> crtc_state->limited_color_range ?
> +
> HDMI_QUANTIZATION_RANGE_LIMITED :
> +
> HDMI_QUANTIZATION_RANGE_FULL);
> + } else {
> + frame.avi.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
> + frame.avi.ycc_quantization_range =
> HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
> + }
This part looks OK.
> +
> + drm_hdmi_avi_infoframe_content_type(&frame.avi, conn_state);
I don't think we have that property attached to the connector.
Probably want a separte patch to add both the prop and this thing.
>
> ret = hdmi_infoframe_pack(&frame, buf, sizeof(buf));
> if (ret < 0) {
> --
> 2.26.2
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [v7 01/10] drm/i915/display: Add HDR Capability detection for LSPCON
> -Original Message-
> From: Ville Syrjälä
> Sent: Thursday, October 8, 2020 4:25 PM
> To: Shankar, Uma
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [v7 01/10] drm/i915/display: Add HDR Capability detection for
> LSPCON
>
> On Tue, Oct 06, 2020 at 06:36:45PM +0530, Uma Shankar wrote:
> > LSPCON firmware exposes HDR capability through LPCON_CAPABILITIES DPCD
> > register. LSPCON implementations capable of supporting HDR set
> > HDR_CAPABILITY bit in LSPCON_CAPABILITIES to 1. This patch reads the
> > same, detects the HDR capability and adds this to intel_lspcon struct.
> >
> > v2: Addressed Jani Nikula's review comment and fixed the HDR
> > capability detection logic
> >
> > Signed-off-by: Uma Shankar
> > ---
> > .../drm/i915/display/intel_display_types.h| 1 +
> > drivers/gpu/drm/i915/display/intel_lspcon.c | 30 +++
> > 2 files changed, 31 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index d5dc18cb8c39..fb8cfc0981d6 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1398,6 +1398,7 @@ struct intel_lspcon {
> > bool active;
> > enum drm_lspcon_mode mode;
> > enum lspcon_vendor vendor;
> > + bool hdr_supported;
> > };
> >
> > struct intel_digital_port {
> > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > index ee95fc353a56..f92962195698 100644
> > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > @@ -35,6 +35,8 @@
> > #define LSPCON_VENDOR_PARADE_OUI 0x001CF8 #define
> > LSPCON_VENDOR_MCA_OUI 0x0060AD
> >
> > +#define DPCD_MCA_LSPCON_HDR_STATUS 0x70003
> > +
> > /* AUX addresses to write MCA AVI IF */ #define
> > LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0 #define
> LSPCON_MCA_AVI_IF_CTRL
> > 0x5DF @@ -104,6 +106,32 @@ static bool lspcon_detect_vendor(struct
> > intel_lspcon *lspcon)
> > return true;
> > }
> >
> > +static void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon)
> > +{
> > + struct intel_digital_port *intel_dig_port =
> > + container_of(lspcon, struct intel_digital_port, lspcon);
>
> s/intel_dig_port/dig_port/ to conform with commit 7801f3b792b0
> ("drm/i915/display: prefer dig_port to reference intel_digital_port")
>
> > + struct drm_device *dev = intel_dig_port->base.base.dev;
> > + struct intel_dp *dp = lspcon_to_intel_dp(lspcon);
> > + u8 hdr_caps;
> > + int ret;
> > +
> > + /* Enable HDR for MCA based LSPCON devices */
> > + if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > + ret = drm_dp_dpcd_read(&dp->aux,
> DPCD_MCA_LSPCON_HDR_STATUS,
> > + &hdr_caps, 1);
> > + else
> > + return;
> > +
> > + if (ret < 0) {
> > + drm_dbg_kms(dev, "hdr capability detection failed\n");
> > + lspcon->hdr_supported = false;
> > + return;
> > + } else if (hdr_caps & 0x1) {
> > + drm_dbg_kms(dev, "lspcon capable of HDR\n");
> > + lspcon->hdr_supported = true;
> > + }
> > +}
> > +
> > static enum drm_lspcon_mode lspcon_get_current_mode(struct
> > intel_lspcon *lspcon) {
> > enum drm_lspcon_mode current_mode;
> > @@ -554,6 +582,8 @@ static bool lspcon_init(struct intel_digital_port
> *dig_port)
> > return false;
> > }
> >
> > + lspcon_detect_hdr_capability(lspcon);
> > +
>
> This is now too late since we do this after registering the connector.
> Need to move this to the init stage, but lspcon detection requires hpd
> detection
> logic to be enabled, so once I get the hpd init order sorted we need to do
> this
> after intel_hpd_init() but before the connector is registered. Hmm, maybe we
> can actually do it from connector's
> .late_register() hook?
I am actually calling it from ddi_init itself in patch 3 assuming its just the
one hardware which is
having issues (not sure if this a limitation for LSPCON generically). So if
detection is successful
register HDR else let it not get enabled. It doesn't sound good though but was
not getting any better
ideas ☹.
I think late_register may work out for us.
Regards,
Uma Shankar
>
> > connector->ycbcr_420_allowed = true;
> > lspcon->active = true;
> > DRM_DEBUG_KMS("Success: LSPCON init\n");
> > --
> > 2.26.2
>
> --
> Ville Syrjälä
> Intel
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[Intel-gfx] ✓ Fi.CI.BAT: success for rm/i915: Add support for LTTPR non-transparent link training mode
== Series Details ==
Series: rm/i915: Add support for LTTPR non-transparent link training mode
URL : https://patchwork.freedesktop.org/series/82449/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9111 -> Patchwork_18649
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18649/index.html
Known issues
Here are the changes found in Patchwork_18649 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- fi-icl-u2: [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9111/fi-icl-u2/igt@kms_cursor_leg...@basic-flip-after-cursor-legacy.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18649/fi-icl-u2/igt@kms_cursor_leg...@basic-flip-after-cursor-legacy.html
Possible fixes
* igt@i915_module_load@reload:
- {fi-tgl-dsi}: [DMESG-WARN][3] ([i915#1982] / [k.org#205379]) ->
[PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9111/fi-tgl-dsi/igt@i915_module_l...@reload.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18649/fi-tgl-dsi/igt@i915_module_l...@reload.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- {fi-kbl-7560u}: [DMESG-WARN][5] ([i915#1982]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9111/fi-kbl-7560u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18649/fi-kbl-7560u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[k.org#205379]: https://bugzilla.kernel.org/show_bug.cgi?id=205379
Participating hosts (15 -> 12)
--
Missing(3): fi-byt-clapper fi-byt-squawks fi-bsw-cyan
Build changes
-
* Linux: CI_DRM_9111 -> Patchwork_18649
CI-20190529: 20190529
CI_DRM_9111: 4ebfe1a6dfa98f91aeec86210071e9d9034ffbef @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5804: a15f8da169c7ab32db77aca7ae2b26c616c9edef @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18649: ee8d45620ced3e902c213edf318978000d9aaff2 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
ee8d45620ced drm/i915: Switch to LTTPR non-transparent mode link training
7ec77b9c6f99 drm/i915: Switch to LTTPR transparent mode link training
ca33f1b792a8 drm/dp: Add LTTPR helpers
c4ae6b256abb drm/i915: Factor out a helper to disable the DPCD training pattern
fa491d23f8b9 drm/i915: Simplify the link training functions
bb57cb8f0950 drm/i915: Fix DP link training pattern mask
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18649/index.html
___
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev2)
== Series Details == Series: series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev2) URL : https://patchwork.freedesktop.org/series/82417/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9bfa4d97c74e drm/i915: Reorder hpd init vs. display resume -:26: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #26: .hpd_irq_setup()+resume+intel_hpd_init() -> intel_hpd_init()+resume+intel_hpd_poll_disable() -:166: WARNING:TYPO_SPELLING: 'seperate' may be misspelled - perhaps 'separate'? #166: FILE: drivers/gpu/drm/i915/display/intel_hotplug.c:693: + * dev->mode_config.mutex, we do the actual hotplug enabling in a seperate total: 0 errors, 2 warnings, 0 checks, 168 lines checked f5532005bb88 drm/i915: Do drm_mode_config_reset() after HPD init 2bcc60547bc5 drm/i915: Refactor .hpd_irq_setup() calls a bit ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev2)
== Series Details ==
Series: series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display
resume (rev2)
URL : https://patchwork.freedesktop.org/series/82417/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9111 -> Patchwork_18650
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18650/index.html
Known issues
Here are the changes found in Patchwork_18650 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
- fi-icl-u2: [PASS][1] -> [DMESG-WARN][2] ([i915#1982]) +1 similar
issue
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9111/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@c-edp1.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18650/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@c-edp1.html
Possible fixes
* igt@i915_module_load@reload:
- {fi-tgl-dsi}: [DMESG-WARN][3] ([i915#1982] / [k.org#205379]) ->
[PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9111/fi-tgl-dsi/igt@i915_module_l...@reload.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18650/fi-tgl-dsi/igt@i915_module_l...@reload.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: [DMESG-WARN][5] ([i915#1982]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9111/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18650/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[k.org#205379]: https://bugzilla.kernel.org/show_bug.cgi?id=205379
Participating hosts (15 -> 12)
--
Missing(3): fi-byt-clapper fi-byt-squawks fi-bsw-cyan
Build changes
-
* Linux: CI_DRM_9111 -> Patchwork_18650
CI-20190529: 20190529
CI_DRM_9111: 4ebfe1a6dfa98f91aeec86210071e9d9034ffbef @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5804: a15f8da169c7ab32db77aca7ae2b26c616c9edef @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18650: 2bcc60547bc5b60392c3d6040c702e4fa5363c76 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
2bcc60547bc5 drm/i915: Refactor .hpd_irq_setup() calls a bit
f5532005bb88 drm/i915: Do drm_mode_config_reset() after HPD init
9bfa4d97c74e drm/i915: Reorder hpd init vs. display resume
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18650/index.html
___
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[Intel-gfx] [PATCH v3] drm/i915: Exclude low pages (128KiB) of stolen from use
The GPU is trashing the low pages of its reserved memory upon reset. If
we are using this memory for ringbuffers, then we will dutiful resubmit
the trashed rings after the reset causing further resets, and worse. We
must exclude this range from our own use. The value of 128KiB was found
by empirical measurement (and included as a selftest) on gen9.
Signed-off-by: Chris Wilson
Cc: sta...@vger.kernel.org
---
drivers/gpu/drm/i915/Kconfig.debug | 1 +
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 6 +-
drivers/gpu/drm/i915/gem/i915_gem_stolen.h | 2 +
drivers/gpu/drm/i915/gt/selftest_reset.c | 192 +
4 files changed, 199 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.debug
b/drivers/gpu/drm/i915/Kconfig.debug
index 206882e154bc..0fb7fd0ef717 100644
--- a/drivers/gpu/drm/i915/Kconfig.debug
+++ b/drivers/gpu/drm/i915/Kconfig.debug
@@ -162,6 +162,7 @@ config DRM_I915_SELFTEST
select DRM_EXPORT_FOR_TESTS if m
select FAULT_INJECTION
select PRIME_NUMBERS
+ select CRC32
help
Choose this option to allow the driver to perform selftests upon
loading; also requires the i915.selftest=1 module parameter. To
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index 4c2869c0a802..637738609d33 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -53,8 +53,10 @@ int i915_gem_stolen_insert_node(struct drm_i915_private
*i915,
struct drm_mm_node *node, u64 size,
unsigned alignment)
{
- return i915_gem_stolen_insert_node_in_range(i915, node, size,
- alignment, 0, U64_MAX);
+ return i915_gem_stolen_insert_node_in_range(i915, node,
+ size, alignment,
+ I915_GEM_STOLEN_BIAS,
+ U64_MAX);
}
void i915_gem_stolen_remove_node(struct drm_i915_private *i915,
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.h
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.h
index e15c0adad8af..61e028063f9f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.h
@@ -30,4 +30,6 @@ i915_gem_object_create_stolen_for_preallocated(struct
drm_i915_private *dev_priv
resource_size_t stolen_offset,
resource_size_t size);
+#define I915_GEM_STOLEN_BIAS SZ_128K
+
#endif /* __I915_GEM_STOLEN_H__ */
diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c
b/drivers/gpu/drm/i915/gt/selftest_reset.c
index 35406ecdf0b2..cf2b2078ca20 100644
--- a/drivers/gpu/drm/i915/gt/selftest_reset.c
+++ b/drivers/gpu/drm/i915/gt/selftest_reset.c
@@ -3,9 +3,199 @@
* Copyright © 2018 Intel Corporation
*/
+#include
+
+#include "gem/i915_gem_stolen.h"
+
+#include "i915_memcpy.h"
#include "i915_selftest.h"
#include "selftests/igt_reset.h"
#include "selftests/igt_atomic.h"
+#include "selftests/igt_spinner.h"
+
+static int
+__igt_reset_stolen(struct intel_gt *gt,
+ intel_engine_mask_t mask,
+ const char *msg)
+{
+ struct i915_ggtt *ggtt = >->i915->ggtt;
+ const struct resource *dsm = >->i915->dsm;
+ resource_size_t num_pages, page, max, count;
+ struct intel_engine_cs *engine;
+ intel_wakeref_t wakeref;
+ enum intel_engine_id id;
+ struct igt_spinner spin;
+ void *tmp;
+ u32 *crc;
+ int err;
+
+ if (!drm_mm_node_allocated(&ggtt->error_capture))
+ return 0;
+
+ num_pages = resource_size(dsm) >> PAGE_SHIFT;
+ if (!num_pages)
+ return 0;
+
+ crc = kmalloc_array(num_pages, sizeof(u32), GFP_KERNEL);
+ if (!crc)
+ return -ENOMEM;
+
+ tmp = kmalloc(PAGE_SIZE, GFP_KERNEL);
+ if (!tmp) {
+ err = -ENOMEM;
+ goto err_crc;
+ }
+
+ igt_global_reset_lock(gt);
+ wakeref = intel_runtime_pm_get(gt->uncore->rpm);
+
+ err = igt_spinner_init(&spin, gt);
+ if (err)
+ goto err_lock;
+
+ for_each_engine(engine, gt, id) {
+ struct intel_context *ce;
+ struct i915_request *rq;
+
+ if (!(mask & engine->mask))
+ continue;
+
+ ce = intel_context_create(engine);
+ if (IS_ERR(ce)) {
+ err = PTR_ERR(ce);
+ goto err_spin;
+ }
+ rq = igt_spinner_create_request(&spin, ce, 0xc3c3c3c3);
+ intel_context_put(ce);
+ if (IS_ERR(rq)) {
+ err = PTR_ERR(rq);
+ goto err_spin;
+ }
+
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch
== Series Details ==
Series: series starting with [v5,1/3] drm/i915/display: Ignore
IGNORE_PSR2_HW_TRACKING for platforms without sel fetch
URL : https://patchwork.freedesktop.org/series/82453/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9111 -> Patchwork_18651
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18651/index.html
Known issues
Here are the changes found in Patchwork_18651 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_cursor_legacy@basic-flip-before-cursor-atomic:
- fi-icl-u2: [PASS][1] -> [DMESG-WARN][2] ([i915#1982]) +1 similar
issue
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9111/fi-icl-u2/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18651/fi-icl-u2/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html
Possible fixes
* igt@i915_module_load@reload:
- {fi-tgl-dsi}: [DMESG-WARN][3] ([i915#1982] / [k.org#205379]) ->
[PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9111/fi-tgl-dsi/igt@i915_module_l...@reload.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18651/fi-tgl-dsi/igt@i915_module_l...@reload.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-bsw-kefka: [DMESG-WARN][5] ([i915#1982]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9111/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18651/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
- {fi-kbl-7560u}: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9111/fi-kbl-7560u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18651/fi-kbl-7560u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[k.org#205379]: https://bugzilla.kernel.org/show_bug.cgi?id=205379
Participating hosts (15 -> 12)
--
Missing(3): fi-byt-clapper fi-byt-squawks fi-bsw-cyan
Build changes
-
* Linux: CI_DRM_9111 -> Patchwork_18651
CI-20190529: 20190529
CI_DRM_9111: 4ebfe1a6dfa98f91aeec86210071e9d9034ffbef @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5804: a15f8da169c7ab32db77aca7ae2b26c616c9edef @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18651: 6f7010709e3f520533f76630867209ab0ce47831 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6f7010709e3f drm/i915/display: Program PSR2 selective fetch registers
24a43e1b58bc drm/i915/display: Check PSR parameter and flag only in state
compute phase
68815aafbaa6 drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms
without sel fetch
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18651/index.html
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Set all unused color plane offsets to ~0xfff again
== Series Details ==
Series: series starting with [1/3] drm/i915: Set all unused color plane offsets
to ~0xfff again
URL : https://patchwork.freedesktop.org/series/82462/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9111 -> Patchwork_18652
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18652/index.html
Known issues
Here are the changes found in Patchwork_18652 that come from known issues:
### IGT changes ###
Possible fixes
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-bsw-kefka: [DMESG-WARN][1] ([i915#1982]) -> [PASS][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9111/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18652/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
- {fi-kbl-7560u}: [DMESG-WARN][3] ([i915#1982]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9111/fi-kbl-7560u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18652/fi-kbl-7560u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (15 -> 12)
--
Missing(3): fi-byt-clapper fi-byt-squawks fi-bsw-cyan
Build changes
-
* Linux: CI_DRM_9111 -> Patchwork_18652
CI-20190529: 20190529
CI_DRM_9111: 4ebfe1a6dfa98f91aeec86210071e9d9034ffbef @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5804: a15f8da169c7ab32db77aca7ae2b26c616c9edef @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18652: de26426f487aea9dfa38be2d572d0adc801bcb8b @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
de26426f487a drm/i915: s/int/u32/ for aux_offset/alignment
4130378fe0f9 drm/i915: Skip aux plane stuff when there is no aux plane
65786c29a840 drm/i915: Set all unused color plane offsets to ~0xfff again
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18652/index.html
___
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Re: [Intel-gfx] [PATCH] drm/i915/gem: Poison stolen pages before use
Chris Wilson writes:
> When allocating objects from stolen, memset() the backing store to
> POISON_INUSE (0x5a) to help identify any uninitialised use of a stolen
> object.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 33 ++
> 1 file changed, 33 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> index 0be5e8683337..4c2869c0a802 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> @@ -572,6 +572,38 @@ static const struct drm_i915_gem_object_ops
> i915_gem_object_stolen_ops = {
> .release = i915_gem_object_release_stolen,
> };
>
> +static void dbg_poison(struct drm_i915_gem_object *obj)
> +{
> +#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)
> + struct drm_i915_private *i915 = to_i915(obj->base.dev);
> + struct i915_ggtt *ggtt = &i915->ggtt;
> + struct sgt_iter iter;
> + dma_addr_t addr;
> +
> + if (!drm_mm_node_allocated(&ggtt->error_capture))
> + return;
> +
> + mutex_lock(&ggtt->error_mutex);
> + for_each_sgt_daddr(addr, iter, obj->mm.pages) {
> + void __iomem *s;
> +
> + ggtt->vm.insert_page(&ggtt->vm, addr,
> + ggtt->error_capture.start,
> + I915_CACHE_NONE, 0);
> + mb();
> +
> + s = io_mapping_map_wc(&ggtt->iomap,
> + ggtt->error_capture.start,
> + PAGE_SIZE);
> + memset(s, POISON_INUSE, PAGE_SIZE);
> + io_mapping_unmap(s);
> + }
> + mb();
> + ggtt->vm.clear_range(&ggtt->vm, ggtt->error_capture.start, PAGE_SIZE);
> + mutex_unlock(&ggtt->error_mutex);
> +#endif
> +}
> +
> static struct drm_i915_gem_object *
> __i915_gem_object_create_stolen(struct intel_memory_region *mem,
> struct drm_mm_node *stolen)
> @@ -598,6 +630,7 @@ __i915_gem_object_create_stolen(struct
> intel_memory_region *mem,
> goto cleanup;
>
> i915_gem_object_init_memory_region(obj, mem, 0);
> + dbg_poison(obj);
>
> return obj;
>
> --
> 2.20.1
>
> ___
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/3] drm/i915: Set all unused color plane offsets to ~0xfff again
On Thu, Oct 08, 2020 at 01:16:06PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> When the number of potential color planes grew to 4 we stopped
> setting all unused color plane offsets to ~0xfff. The code
> still tries to do this, but actually does nothing since the
> loop limits are bogus.
>
> skl_check_main_surface() actually depends on this ~0xfff
> behaviour as it will make sure to move the main surface
> offset below the aux surface offset because the hardware
> AUX_DIST must be a non-negative value [1], and for simplicity
> it doesn't bother checking if the AUX plane is actually
> needed or not. So currently it may end up shuffling the
> main surface around based on some stale leftover AUX offset.
>
> The skl+ plane code also just blindly calculates the AUX_DIST
> whether or not the AUX plane is actually needed by the hw or
> not, and that too will now potentially use some stale AUX
> surface offset in the calculation. Would seem nicer to
> guarantee a consistent non-negative AUX_DIST always.
>
> So bring back the original ~0xfff offset behaviour for
> unused color planes. Though it doesn't seem super likely
> that this inconsistency would cause any real issues.
>
> Cc: Dhinakaran Pandiyan
> Cc: Lucas De Marchi
> Cc: Imre Deak
> Cc: Radhakrishna Sripada
> Fixes: 2dfbf9d2873a ("drm/i915/tgl: Gen-12 display can decompress surfaces
> compressed by the media engine")
> Signed-off-by: Ville Syrjälä
Arg. Yes skl_check_main_surface() adjusts now the address needlessly.
The fix looks ok to me:
Reviewed-by: Imre Deak
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 17 +
> 1 file changed, 5 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 907e1d155443..44fd7059838f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4104,8 +4104,7 @@ static int skl_check_ccs_aux_surface(struct
> intel_plane_state *plane_state)
> int skl_check_plane_surface(struct intel_plane_state *plane_state)
> {
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> - int ret;
> - bool needs_aux = false;
> + int ret, i;
>
> ret = intel_plane_compute_gtt(plane_state);
> if (ret)
> @@ -4119,7 +4118,6 @@ int skl_check_plane_surface(struct intel_plane_state
> *plane_state)
>* it.
>*/
> if (is_ccs_modifier(fb->modifier)) {
> - needs_aux = true;
> ret = skl_check_ccs_aux_surface(plane_state);
> if (ret)
> return ret;
> @@ -4127,20 +4125,15 @@ int skl_check_plane_surface(struct intel_plane_state
> *plane_state)
>
> if (intel_format_info_is_yuv_semiplanar(fb->format,
> fb->modifier)) {
> - needs_aux = true;
> ret = skl_check_nv12_aux_surface(plane_state);
> if (ret)
> return ret;
> }
>
> - if (!needs_aux) {
> - int i;
> -
> - for (i = 1; i < fb->format->num_planes; i++) {
> - plane_state->color_plane[i].offset = ~0xfff;
> - plane_state->color_plane[i].x = 0;
> - plane_state->color_plane[i].y = 0;
> - }
> + for (i = fb->format->num_planes; i <
> ARRAY_SIZE(plane_state->color_plane); i++) {
> + plane_state->color_plane[i].offset = ~0xfff;
> + plane_state->color_plane[i].x = 0;
> + plane_state->color_plane[i].y = 0;
> }
>
> ret = skl_check_main_surface(plane_state);
> --
> 2.26.2
>
___
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Re: [Intel-gfx] [PATCH 2/3] drm/i915: Skip aux plane stuff when there is no aux plane
On Thu, Oct 08, 2020 at 01:16:07PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> when the hardware isn't going to use the aux plane there's no
> real point in dealing with the relevant hardware restrictions.
> So let's just skip all that when not necessary.
>
> We can now also remove the offset=~0xfff behaviour for unused
> color planes. Let's just zero out everyting so as to not leave
> stale garbage behind to confuse people debugging the code.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Imre Deak
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 14 +-
> drivers/gpu/drm/i915/display/intel_sprite.c | 6 +++---
> 2 files changed, 12 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 44fd7059838f..34ba34f84b2a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2001,13 +2001,17 @@ static int ccs_to_main_plane(const struct
> drm_framebuffer *fb, int ccs_plane)
> return ccs_plane - fb->format->num_planes / 2;
> }
>
> -/* Return either the main plane's CCS or - if not a CCS FB - UV plane */
> int intel_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane)
> {
> + struct drm_i915_private *i915 = to_i915(fb->dev);
> +
> if (is_ccs_modifier(fb->modifier))
> return main_to_ccs_plane(fb, main_plane);
> -
> - return 1;
> + else if (INTEL_GEN(i915) < 11 &&
> + intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier))
> + return 1;
> + else
> + return 0;
> }
>
> bool
> @@ -3933,7 +3937,7 @@ static int skl_check_main_surface(struct
> intel_plane_state *plane_state)
>* main surface offset, and it must be non-negative. Make
>* sure that is what we will get.
>*/
> - if (offset > aux_offset)
> + if (aux_plane && offset > aux_offset)
> offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state,
> 0,
> offset, aux_offset &
> ~(alignment - 1));
>
> @@ -4131,7 +4135,7 @@ int skl_check_plane_surface(struct intel_plane_state
> *plane_state)
> }
>
> for (i = fb->format->num_planes; i <
> ARRAY_SIZE(plane_state->color_plane); i++) {
> - plane_state->color_plane[i].offset = ~0xfff;
> + plane_state->color_plane[i].offset = 0;
> plane_state->color_plane[i].x = 0;
> plane_state->color_plane[i].y = 0;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c
> b/drivers/gpu/drm/i915/display/intel_sprite.c
> index 2da11ab6343c..bf8c82a2b213 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -656,7 +656,6 @@ skl_program_plane(struct intel_plane *plane,
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> int aux_plane = intel_main_to_aux_plane(fb, color_plane);
> u32 aux_dist = plane_state->color_plane[aux_plane].offset - surf_addr;
> - u32 aux_stride = skl_plane_stride(plane_state, aux_plane);
> int crtc_x = plane_state->uapi.dst.x1;
> int crtc_y = plane_state->uapi.dst.y1;
> u32 x = plane_state->color_plane[color_plane].x;
> @@ -691,6 +690,9 @@ skl_program_plane(struct intel_plane *plane,
> crtc_y = 0;
> }
>
> + if (INTEL_GEN(dev_priv) < 12 && aux_plane)
> + aux_dist |= skl_plane_stride(plane_state, aux_plane);
> +
> spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id), stride);
> @@ -699,8 +701,6 @@ skl_program_plane(struct intel_plane *plane,
> intel_de_write_fw(dev_priv, PLANE_SIZE(pipe, plane_id),
> (src_h << 16) | src_w);
>
> - if (INTEL_GEN(dev_priv) < 12)
> - aux_dist |= aux_stride;
> intel_de_write_fw(dev_priv, PLANE_AUX_DIST(pipe, plane_id), aux_dist);
>
> if (icl_is_hdr_plane(dev_priv, plane_id))
> --
> 2.26.2
>
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Re: [Intel-gfx] [PATCH 3/3] drm/i915: s/int/u32/ for aux_offset/alignment
On Thu, Oct 08, 2020 at 01:16:08PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> ggtt offsets/alignments are u32 everywhere else. Don't use
> a signed int for them here.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Imre Deak
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 34ba34f84b2a..fe482ca721f8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4026,8 +4026,8 @@ static int skl_check_nv12_aux_surface(struct
> intel_plane_state *plane_state)
>
> if (is_ccs_modifier(fb->modifier)) {
> int ccs_plane = main_to_ccs_plane(fb, uv_plane);
> - int aux_offset = plane_state->color_plane[ccs_plane].offset;
> - int alignment = intel_surf_alignment(fb, uv_plane);
> + u32 aux_offset = plane_state->color_plane[ccs_plane].offset;
> + u32 alignment = intel_surf_alignment(fb, uv_plane);
>
> if (offset > aux_offset)
> offset = intel_plane_adjust_aligned_offset(&x, &y,
> --
> 2.26.2
>
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gem: Poison stolen pages before use
== Series Details == Series: drm/i915/gem: Poison stolen pages before use URL : https://patchwork.freedesktop.org/series/82463/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5dcceb34889a drm/i915/gem: Poison stolen pages before use -:39: WARNING:MEMORY_BARRIER: memory barrier without comment #39: FILE: drivers/gpu/drm/i915/gem/i915_gem_stolen.c:593: + mb(); -:47: WARNING:MEMORY_BARRIER: memory barrier without comment #47: FILE: drivers/gpu/drm/i915/gem/i915_gem_stolen.c:601: + mb(); total: 0 errors, 2 warnings, 0 checks, 45 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gem: Poison stolen pages before use
== Series Details == Series: drm/i915/gem: Poison stolen pages before use URL : https://patchwork.freedesktop.org/series/82463/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/gem/i915_gem_stolen.c:598:24:expected void *s +drivers/gpu/drm/i915/gem/i915_gem_stolen.c:598:24:got void [noderef] __iomem *[assigned] s +drivers/gpu/drm/i915/gem/i915_gem_stolen.c:598:24: warning: incorrect type in argument 1 (different address spaces) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Poison stolen pages before use
== Series Details ==
Series: drm/i915/gem: Poison stolen pages before use
URL : https://patchwork.freedesktop.org/series/82463/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18653
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/index.html
Known issues
Here are the changes found in Patchwork_18653 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_module_load@reload:
- fi-tgl-u2: [PASS][1] -> [DMESG-WARN][2] ([i915#1982] /
[k.org#205379])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-tgl-u2/igt@i915_module_l...@reload.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/fi-tgl-u2/igt@i915_module_l...@reload.html
* igt@i915_selftest@live@execlists:
- fi-apl-guc: [PASS][3] -> [INCOMPLETE][4] ([i915#1635])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-apl-guc/igt@i915_selftest@l...@execlists.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/fi-apl-guc/igt@i915_selftest@l...@execlists.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-bsw-kefka: [PASS][5] -> [DMESG-WARN][6] ([i915#1982])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
Possible fixes
* {igt@core_hotunplug@unbind-rebind}:
- fi-icl-y: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
* igt@gem_exec_suspend@basic-s3:
- fi-skl-lmem:[INCOMPLETE][9] ([i915#198]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
* igt@kms_busy@basic@flip:
- {fi-tgl-dsi}: [DMESG-WARN][11] ([i915#1982]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
- fi-kbl-x1275: [DMESG-WARN][13] ([i915#62] / [i915#92] / [i915#95])
-> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-icl-u2: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@vgem_basic@unload:
- fi-skl-guc: [DMESG-WARN][17] ([i915#2203]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-guc/igt@vgem_ba...@unload.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/fi-skl-guc/igt@vgem_ba...@unload.html
- fi-kbl-x1275: [DMESG-WARN][19] ([i915#62] / [i915#92]) -> [PASS][20]
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@vgem_ba...@unload.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/fi-kbl-x1275/igt@vgem_ba...@unload.html
Warnings
* igt@gem_exec_suspend@basic-s0:
- fi-kbl-x1275: [DMESG-WARN][21] ([i915#62] / [i915#92]) ->
[DMESG-WARN][22] ([i915#62] / [i915#92] / [i915#95]) +3 similar issues
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@gem_exec_susp...@basic-s0.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/fi-kbl-x1275/igt@gem_exec_susp...@basic-s0.html
* igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275: [DMESG-FAIL][23] ([i915#62]) -> [DMESG-FAIL][24]
([i915#62] / [i915#95])
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-kbl-x1275: [DMESG-WARN][25] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][26] ([i915#62] / [i915#92]) +6 similar issues
[25]:
https://intel-gfx-ci.01.org/tree/drm-
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Exclude low pages (128KiB) of stolen from use (rev3)
== Series Details == Series: drm/i915: Exclude low pages (128KiB) of stolen from use (rev3) URL : https://patchwork.freedesktop.org/series/82443/ State : warning == Summary == $ dim checkpatch origin/drm-tip b386647f0366 drm/i915: Exclude low pages (128KiB) of stolen from use -:142: WARNING:MEMORY_BARRIER: memory barrier without comment #142: FILE: drivers/gpu/drm/i915/gt/selftest_reset.c:85: + mb(); -:160: WARNING:MEMORY_BARRIER: memory barrier without comment #160: FILE: drivers/gpu/drm/i915/gt/selftest_reset.c:103: + mb(); -:183: WARNING:MEMORY_BARRIER: memory barrier without comment #183: FILE: drivers/gpu/drm/i915/gt/selftest_reset.c:126: + mb(); -:207: WARNING:MEMORY_BARRIER: memory barrier without comment #207: FILE: drivers/gpu/drm/i915/gt/selftest_reset.c:150: + mb(); -:249: ERROR:SPACING: spaces required around that '=' (ctx:WxV) #249: FILE: drivers/gpu/drm/i915/gt/selftest_reset.c:192: + err =__igt_reset_stolen(gt, engine->mask, engine->name); ^ total: 1 errors, 4 warnings, 0 checks, 232 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Exclude low pages (128KiB) of stolen from use (rev3)
== Series Details == Series: drm/i915: Exclude low pages (128KiB) of stolen from use (rev3) URL : https://patchwork.freedesktop.org/series/82443/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +drivers/gpu/drm/i915/gt/selftest_reset.c:132:20:expected void *in +drivers/gpu/drm/i915/gt/selftest_reset.c:132:20:got void [noderef] __iomem *[assigned] s +drivers/gpu/drm/i915/gt/selftest_reset.c:132:20: warning: incorrect type in assignment (different address spaces) +drivers/gpu/drm/i915/gt/selftest_reset.c:133:46:expected void const *src +drivers/gpu/drm/i915/gt/selftest_reset.c:133:46:got void [noderef] __iomem *[assigned] s +drivers/gpu/drm/i915/gt/selftest_reset.c:133:46: warning: incorrect type in argument 2 (different address spaces) +drivers/gpu/drm/i915/gt/selftest_reset.c:94:34:expected unsigned int [usertype] *s +drivers/gpu/drm/i915/gt/selftest_reset.c:94:34:got void [noderef] __iomem *[assigned] s +drivers/gpu/drm/i915/gt/selftest_reset.c:94:34: warning: incorrect type in argument 1 (different address spaces) +drivers/gpu/drm/i915/gt/selftest_reset.c:96:20:expected void *in +drivers/gpu/drm/i915/gt/selftest_reset.c:96:20:got void [noderef] __iomem *[assigned] s +drivers/gpu/drm/i915/gt/selftest_reset.c:96:20: warning: incorrect type in assignment (different address spaces) +drivers/gpu/drm/i915/gt/selftest_reset.c:97:46:expected void const *src +drivers/gpu/drm/i915/gt/selftest_reset.c:97:46:got void [noderef] __iomem *[assigned] s +drivers/gpu/drm/i915/gt/selftest_reset.c:97:46: warning: incorrect type in argument 2 (different address spaces) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Exclude low pages (128KiB) of stolen from use (rev3)
== Series Details ==
Series: drm/i915: Exclude low pages (128KiB) of stolen from use (rev3)
URL : https://patchwork.freedesktop.org/series/82443/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18654
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_18654 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_18654, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18654/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_18654:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live@gt_heartbeat:
- fi-tgl-u2: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-tgl-u2/igt@i915_selftest@live@gt_heartbeat.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18654/fi-tgl-u2/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@reset:
- fi-bwr-2160:[PASS][3] -> [DMESG-FAIL][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-bwr-2160/igt@i915_selftest@l...@reset.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18654/fi-bwr-2160/igt@i915_selftest@l...@reset.html
- fi-gdg-551: [PASS][5] -> [DMESG-FAIL][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-gdg-551/igt@i915_selftest@l...@reset.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18654/fi-gdg-551/igt@i915_selftest@l...@reset.html
- fi-snb-2520m: [PASS][7] -> [INCOMPLETE][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-snb-2520m/igt@i915_selftest@l...@reset.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18654/fi-snb-2520m/igt@i915_selftest@l...@reset.html
Known issues
Here are the changes found in Patchwork_18654 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@reset:
- fi-snb-2600:[PASS][9] -> [INCOMPLETE][10] ([i915#82])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-snb-2600/igt@i915_selftest@l...@reset.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18654/fi-snb-2600/igt@i915_selftest@l...@reset.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7500u: [PASS][11] -> [DMESG-WARN][12] ([i915#2203])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-7500u/igt@kms_chamel...@common-hpd-after-suspend.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18654/fi-kbl-7500u/igt@kms_chamel...@common-hpd-after-suspend.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-legacy:
- fi-icl-u2: [PASS][13] -> [DMESG-WARN][14] ([i915#1982])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_cursor_leg...@basic-flip-before-cursor-legacy.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18654/fi-icl-u2/igt@kms_cursor_leg...@basic-flip-before-cursor-legacy.html
Possible fixes
* {igt@core_hotunplug@unbind-rebind}:
- fi-icl-y: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18654/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
* igt@gem_exec_suspend@basic-s3:
- fi-skl-lmem:[INCOMPLETE][17] ([i915#198]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18654/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: [DMESG-WARN][19] ([i915#1982]) -> [PASS][20]
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18654/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
* igt@kms_busy@basic@flip:
- {fi-tgl-dsi}: [DMESG-WARN][21] ([i915#1982]) -> [PASS][22]
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18654/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
- fi-kbl-x1275: [DMESG-WARN][23] ([i915#62] / [i915#92] / [i915#95])
-> [PASS][24]
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18654/fi-kbl-x1275/igt@kms_busy@ba...@fli
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: Set all unused color plane offsets to ~0xfff again (rev2)
== Series Details ==
Series: series starting with [1/3] drm/i915: Set all unused color plane offsets
to ~0xfff again (rev2)
URL : https://patchwork.freedesktop.org/series/82462/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18655
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_18655 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_18655, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18655/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_18655:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live@gt_heartbeat:
- fi-tgl-u2: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-tgl-u2/igt@i915_selftest@live@gt_heartbeat.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18655/fi-tgl-u2/igt@i915_selftest@live@gt_heartbeat.html
Known issues
Here are the changes found in Patchwork_18655 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
- fi-icl-u2: [PASS][3] -> [DMESG-WARN][4] ([i915#1982]) +1 similar
issue
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@c-edp1.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18655/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@c-edp1.html
Possible fixes
* igt@gem_exec_suspend@basic-s3:
- fi-skl-lmem:[INCOMPLETE][5] ([i915#198]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18655/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
* igt@kms_busy@basic@flip:
- {fi-tgl-dsi}: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18655/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
- fi-kbl-x1275: [DMESG-WARN][9] ([i915#62] / [i915#92] / [i915#95])
-> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18655/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- {fi-kbl-7560u}: [DMESG-WARN][11] ([i915#1982]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-7560u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18655/fi-kbl-7560u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
- fi-icl-u2: [DMESG-WARN][13] ([i915#1982]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18655/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@vgem_basic@unload:
- fi-skl-guc: [DMESG-WARN][15] ([i915#2203]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-guc/igt@vgem_ba...@unload.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18655/fi-skl-guc/igt@vgem_ba...@unload.html
Warnings
* igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275: [DMESG-FAIL][17] ([i915#62]) -> [DMESG-FAIL][18]
([i915#62] / [i915#95])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18655/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
* igt@kms_force_connector_basic@force-edid:
- fi-kbl-x1275: [DMESG-WARN][19] ([i915#62] / [i915#92]) ->
[DMESG-WARN][20] ([i915#62] / [i915#92] / [i915#95]) +2 similar issues
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_force_connector_ba...@force-edid.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18655/fi-kbl-x1275/igt@kms_force_connector_ba...@force-edid.html
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-kbl-x1275: [DMESG-WARN][21] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][22] ([i915#62] / [i915#92]) +4 similar issues
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_force_connector_ba...@prune-stale-modes.html
[2
Re: [Intel-gfx] [PATCH 1/2] drm/i915/dpcd_bl: Skip testing control capability with force DPCD quirk
On Thu, 2020-10-08 at 10:32 +0800, Kai-Heng Feng wrote:
> Hi Lyude,
>
> > On Oct 8, 2020, at 05:53, Lyude Paul wrote:
> >
> > Hi! I thought this patch rang a bell, we actually already had some
> > discussion
> > about this since there's a couple of other systems this was causing issues
> > for.
> > Unfortunately it never seems like that patch got sent out. Satadru?
> >
> > (if I don't hear back from them soon, I'll just send out a patch for this
> > myself)
> >
> > JFYI - the proper fix here is to just drop the
> > DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP check from the code entirely. As
> > long as
> > the backlight supports AUX_SET_CAP, that should be enough for us to control
> > it.
>
> Does the proper fix include dropping DP_QUIRK_FORCE_DPCD_BACKLIGHT entirely?\
Not yet - we need someone to help with reviewing my Intel HDR backlight
interface patches before we can drop that. I was just talking about dropping the
check where we don't enable the DPCD backlight if it claims to support
DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP
>
> Kai-Heng
>
> >
> > On Wed, 2020-10-07 at 14:58 +0800, Kai-Heng Feng wrote:
> > > HP DreamColor panel needs to be controlled via AUX interface. However,
> > > it has both DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP and
> > > DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP set, so it fails to pass
> > > intel_dp_aux_display_control_capable() test.
> > >
> > > Skip the test if the panel has force DPCD quirk.
> > >
> > > Signed-off-by: Kai-Heng Feng
> > > ---
> > > drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 10 ++
> > > 1 file changed, 6 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > > index acbd7eb66cbe..acf2e1c65290 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > > @@ -347,9 +347,13 @@ int intel_dp_aux_init_backlight_funcs(struct
> > > intel_connector *intel_connector)
> > > struct intel_panel *panel = &intel_connector->panel;
> > > struct intel_dp *intel_dp = enc_to_intel_dp(intel_connector->encoder);
> > > struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> > > + bool force_dpcd;
> > > +
> > > + force_dpcd = drm_dp_has_quirk(&intel_dp->desc, intel_dp->edid_quirks,
> > > + DP_QUIRK_FORCE_DPCD_BACKLIGHT);
> > >
> > > if (i915->params.enable_dpcd_backlight == 0 ||
> > > - !intel_dp_aux_display_control_capable(intel_connector))
> > > + (!force_dpcd &&
> > > !intel_dp_aux_display_control_capable(intel_connector)))
> > > return -ENODEV;
> > >
> > > /*
> > > @@ -358,9 +362,7 @@ int intel_dp_aux_init_backlight_funcs(struct
> > > intel_connector *intel_connector)
> > >*/
> > > if (i915->vbt.backlight.type !=
> > > INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE &&
> > > - i915->params.enable_dpcd_backlight != 1 &&
> > > - !drm_dp_has_quirk(&intel_dp->desc, intel_dp->edid_quirks,
> > > - DP_QUIRK_FORCE_DPCD_BACKLIGHT)) {
> > > + i915->params.enable_dpcd_backlight != 1 && !force_dpcd) {
> > > drm_info(&i915->drm,
> > >"Panel advertises DPCD backlight support, but "
> > >"VBT disagrees. If your backlight controls "
> > --
> > Sincerely,
> > Lyude Paul (she/her)
> > Software Engineer at Red Hat
--
Sincerely,
Lyude Paul (she/her)
Software Engineer at Red Hat
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 4/6] drm/dp: Add LTTPR helpers
Hi Dave et all,
On Wed, Oct 07, 2020 at 08:09:15PM +0300, Imre Deak wrote:
> Add the helpers and register definitions needed to read out the common
> and per-PHY LTTPR capabilities and perform link training in the LTTPR
> non-transparent mode.
>
> v2:
> - Add drm_dp_dpcd_read_phy_link_status() and DP_PHY_LTTPR() here instead
> of adding these to i915. (Ville)
> v3:
> - Use memmove() to convert LTTPR to DPRX link status format. (Ville)
>
> Cc: dri-de...@lists.freedesktop.org
> Cc: Ville Syrjälä
> Reviewed-by: Ville Syrjälä
> Signed-off-by: Imre Deak
Is it ok to merge this patch via drm-intel-next-queued? If so could
someone Ack it?
Thanks,
Imre
> ---
> drivers/gpu/drm/drm_dp_helper.c | 232 +++-
> include/drm/drm_dp_helper.h | 62 +
> 2 files changed, 290 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
> index 478dd51f738d..79732402336d 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -150,11 +150,8 @@ void drm_dp_link_train_clock_recovery_delay(const u8
> dpcd[DP_RECEIVER_CAP_SIZE])
> }
> EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
>
> -void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
> +static void __drm_dp_link_train_channel_eq_delay(unsigned long rd_interval)
> {
> - unsigned long rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
> - DP_TRAINING_AUX_RD_MASK;
> -
> if (rd_interval > 4)
> DRM_DEBUG_KMS("AUX interval %lu, out of range (max 4)\n",
> rd_interval);
> @@ -166,8 +163,35 @@ void drm_dp_link_train_channel_eq_delay(const u8
> dpcd[DP_RECEIVER_CAP_SIZE])
>
> usleep_range(rd_interval, rd_interval * 2);
> }
> +
> +void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
> +{
> + __drm_dp_link_train_channel_eq_delay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
> + DP_TRAINING_AUX_RD_MASK);
> +}
> EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
>
> +void drm_dp_lttpr_link_train_clock_recovery_delay(void)
> +{
> + usleep_range(100, 200);
> +}
> +EXPORT_SYMBOL(drm_dp_lttpr_link_train_clock_recovery_delay);
> +
> +static u8 dp_lttpr_phy_cap(const u8 phy_cap[DP_LTTPR_PHY_CAP_SIZE], int r)
> +{
> + return phy_cap[r - DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1];
> +}
> +
> +void drm_dp_lttpr_link_train_channel_eq_delay(const u8
> phy_cap[DP_LTTPR_PHY_CAP_SIZE])
> +{
> + u8 interval = dp_lttpr_phy_cap(phy_cap,
> +
> DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1) &
> + DP_TRAINING_AUX_RD_MASK;
> +
> + __drm_dp_link_train_channel_eq_delay(interval);
> +}
> +EXPORT_SYMBOL(drm_dp_lttpr_link_train_channel_eq_delay);
> +
> u8 drm_dp_link_rate_to_bw_code(int link_rate)
> {
> /* Spec says link_bw = link_rate / 0.27Gbps */
> @@ -363,6 +387,59 @@ int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
> }
> EXPORT_SYMBOL(drm_dp_dpcd_read_link_status);
>
> +/**
> + * drm_dp_dpcd_read_phy_link_status - get the link status information for a
> DP PHY
> + * @aux: DisplayPort AUX channel
> + * @dp_phy: the DP PHY to get the link status for
> + * @link_status: buffer to return the status in
> + *
> + * Fetch the AUX DPCD registers for the DPRX or an LTTPR PHY link status. The
> + * layout of the returned @link_status matches the DPCD register layout of
> the
> + * DPRX PHY link status.
> + *
> + * Returns 0 if the information was read successfully or a negative error
> code
> + * on failure.
> + */
> +int drm_dp_dpcd_read_phy_link_status(struct drm_dp_aux *aux,
> + enum drm_dp_phy dp_phy,
> + u8 link_status[DP_LINK_STATUS_SIZE])
> +{
> + int ret;
> +
> + if (dp_phy == DP_PHY_DPRX) {
> + ret = drm_dp_dpcd_read(aux,
> +DP_LANE0_1_STATUS,
> +link_status,
> +DP_LINK_STATUS_SIZE);
> +
> + if (ret < 0)
> + return ret;
> +
> + WARN_ON(ret != DP_LINK_STATUS_SIZE);
> +
> + return 0;
> + }
> +
> + ret = drm_dp_dpcd_read(aux,
> +DP_LANE0_1_STATUS_PHY_REPEATER(dp_phy),
> +link_status,
> +DP_LINK_STATUS_SIZE - 1);
> +
> + if (ret < 0)
> + return ret;
> +
> + WARN_ON(ret != DP_LINK_STATUS_SIZE - 1);
> +
> + /* Convert the LTTPR to the sink PHY link status layout */
> + memmove(&link_status[DP_SINK_STATUS - DP_LANE0_1_STATUS + 1],
> + &link_status[DP_SINK_STATUS - DP_LANE0_1_STATUS],
> + DP_LINK_STATUS_SIZE - (DP_SINK_STATUS - DP_LANE0_1_STATUS) - 1);
> + link_status[DP_SINK_STATUS - DP_LANE0_1_STATUS] = 0;
>
Re: [Intel-gfx] [PATCH v3 4/6] drm/dp: Add LTTPR helpers
Acked-by: Lyude Paul
On Thu, 2020-10-08 at 19:46 +0300, Imre Deak wrote:
> Hi Dave et all,
>
> On Wed, Oct 07, 2020 at 08:09:15PM +0300, Imre Deak wrote:
> > Add the helpers and register definitions needed to read out the common
> > and per-PHY LTTPR capabilities and perform link training in the LTTPR
> > non-transparent mode.
> >
> > v2:
> > - Add drm_dp_dpcd_read_phy_link_status() and DP_PHY_LTTPR() here instead
> > of adding these to i915. (Ville)
> > v3:
> > - Use memmove() to convert LTTPR to DPRX link status format. (Ville)
> >
> > Cc: dri-de...@lists.freedesktop.org
> > Cc: Ville Syrjälä
> > Reviewed-by: Ville Syrjälä
> > Signed-off-by: Imre Deak
>
> Is it ok to merge this patch via drm-intel-next-queued? If so could
> someone Ack it?
>
> Thanks,
> Imre
>
> > ---
> > drivers/gpu/drm/drm_dp_helper.c | 232 +++-
> > include/drm/drm_dp_helper.h | 62 +
> > 2 files changed, 290 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_dp_helper.c
> > b/drivers/gpu/drm/drm_dp_helper.c
> > index 478dd51f738d..79732402336d 100644
> > --- a/drivers/gpu/drm/drm_dp_helper.c
> > +++ b/drivers/gpu/drm/drm_dp_helper.c
> > @@ -150,11 +150,8 @@ void drm_dp_link_train_clock_recovery_delay(const u8
> > dpcd[DP_RECEIVER_CAP_SIZE])
> > }
> > EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
> >
> > -void drm_dp_link_train_channel_eq_delay(const u8
> > dpcd[DP_RECEIVER_CAP_SIZE])
> > +static void __drm_dp_link_train_channel_eq_delay(unsigned long rd_interval)
> > {
> > - unsigned long rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
> > -DP_TRAINING_AUX_RD_MASK;
> > -
> > if (rd_interval > 4)
> > DRM_DEBUG_KMS("AUX interval %lu, out of range (max 4)\n",
> > rd_interval);
> > @@ -166,8 +163,35 @@ void drm_dp_link_train_channel_eq_delay(const u8
> > dpcd[DP_RECEIVER_CAP_SIZE])
> >
> > usleep_range(rd_interval, rd_interval * 2);
> > }
> > +
> > +void drm_dp_link_train_channel_eq_delay(const u8
> > dpcd[DP_RECEIVER_CAP_SIZE])
> > +{
> > + __drm_dp_link_train_channel_eq_delay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
> > +DP_TRAINING_AUX_RD_MASK);
> > +}
> > EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
> >
> > +void drm_dp_lttpr_link_train_clock_recovery_delay(void)
> > +{
> > + usleep_range(100, 200);
> > +}
> > +EXPORT_SYMBOL(drm_dp_lttpr_link_train_clock_recovery_delay);
> > +
> > +static u8 dp_lttpr_phy_cap(const u8 phy_cap[DP_LTTPR_PHY_CAP_SIZE], int r)
> > +{
> > + return phy_cap[r - DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1];
> > +}
> > +
> > +void drm_dp_lttpr_link_train_channel_eq_delay(const u8
> > phy_cap[DP_LTTPR_PHY_CAP_SIZE])
> > +{
> > + u8 interval = dp_lttpr_phy_cap(phy_cap,
> > + DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1
> > ) &
> > + DP_TRAINING_AUX_RD_MASK;
> > +
> > + __drm_dp_link_train_channel_eq_delay(interval);
> > +}
> > +EXPORT_SYMBOL(drm_dp_lttpr_link_train_channel_eq_delay);
> > +
> > u8 drm_dp_link_rate_to_bw_code(int link_rate)
> > {
> > /* Spec says link_bw = link_rate / 0.27Gbps */
> > @@ -363,6 +387,59 @@ int drm_dp_dpcd_read_link_status(struct drm_dp_aux
> > *aux,
> > }
> > EXPORT_SYMBOL(drm_dp_dpcd_read_link_status);
> >
> > +/**
> > + * drm_dp_dpcd_read_phy_link_status - get the link status information for a
> > DP PHY
> > + * @aux: DisplayPort AUX channel
> > + * @dp_phy: the DP PHY to get the link status for
> > + * @link_status: buffer to return the status in
> > + *
> > + * Fetch the AUX DPCD registers for the DPRX or an LTTPR PHY link status.
> > The
> > + * layout of the returned @link_status matches the DPCD register layout of
> > the
> > + * DPRX PHY link status.
> > + *
> > + * Returns 0 if the information was read successfully or a negative error
> > code
> > + * on failure.
> > + */
> > +int drm_dp_dpcd_read_phy_link_status(struct drm_dp_aux *aux,
> > +enum drm_dp_phy dp_phy,
> > +u8 link_status[DP_LINK_STATUS_SIZE])
> > +{
> > + int ret;
> > +
> > + if (dp_phy == DP_PHY_DPRX) {
> > + ret = drm_dp_dpcd_read(aux,
> > + DP_LANE0_1_STATUS,
> > + link_status,
> > + DP_LINK_STATUS_SIZE);
> > +
> > + if (ret < 0)
> > + return ret;
> > +
> > + WARN_ON(ret != DP_LINK_STATUS_SIZE);
> > +
> > + return 0;
> > + }
> > +
> > + ret = drm_dp_dpcd_read(aux,
> > + DP_LANE0_1_STATUS_PHY_REPEATER(dp_phy),
> > + link_status,
> > + DP_LINK_STATUS_SIZE - 1);
> > +
> > + if (ret < 0)
> > + return ret;
> > +
> > + WARN_ON(ret != DP_LINK_STATUS_SIZE - 1);
> > +
> > + /* Convert the LTTPR to the sink P
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev2)
== Series Details ==
Series: series starting with [v5,1/3] drm/i915/display: Ignore
IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev2)
URL : https://patchwork.freedesktop.org/series/82453/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18656
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_18656 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_18656, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_18656:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live@gt_heartbeat:
- fi-tgl-u2: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-tgl-u2/igt@i915_selftest@live@gt_heartbeat.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-tgl-u2/igt@i915_selftest@live@gt_heartbeat.html
Known issues
Here are the changes found in Patchwork_18656 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@execlists:
- fi-apl-guc: [PASS][3] -> [INCOMPLETE][4] ([i915#1635])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-apl-guc/igt@i915_selftest@l...@execlists.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-apl-guc/igt@i915_selftest@l...@execlists.html
* igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1:
- fi-icl-u2: [PASS][5] -> [DMESG-WARN][6] ([i915#1982])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@b-edp1.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@b-edp1.html
Possible fixes
* {igt@core_hotunplug@unbind-rebind}:
- fi-icl-y: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
* igt@gem_exec_suspend@basic-s3:
- fi-skl-lmem:[INCOMPLETE][9] ([i915#198]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
* igt@kms_busy@basic@flip:
- {fi-tgl-dsi}: [DMESG-WARN][11] ([i915#1982]) -> [PASS][12] +1
similar issue
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- {fi-kbl-7560u}: [DMESG-WARN][13] ([i915#1982]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-7560u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-kbl-7560u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
- fi-icl-u2: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@vgem_basic@unload:
- fi-skl-guc: [DMESG-WARN][17] ([i915#2203]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-guc/igt@vgem_ba...@unload.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-skl-guc/igt@vgem_ba...@unload.html
Warnings
* igt@kms_force_connector_basic@force-edid:
- fi-kbl-x1275: [DMESG-WARN][19] ([i915#62] / [i915#92]) ->
[DMESG-WARN][20] ([i915#62] / [i915#92] / [i915#95]) +5 similar issues
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_force_connector_ba...@force-edid.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-kbl-x1275/igt@kms_force_connector_ba...@force-edid.html
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-kbl-x1275: [DMESG-WARN][21] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][22] ([i915#62] / [i915#92]) +4 similar issues
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_force_connector_ba...@p
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev3)
== Series Details == Series: series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev3) URL : https://patchwork.freedesktop.org/series/82417/ State : warning == Summary == $ dim checkpatch origin/drm-tip f5192fdf6756 drm/i915: Reorder hpd init vs. display resume -:26: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #26: .hpd_irq_setup()+resume+intel_hpd_init() -> intel_hpd_init()+resume+intel_hpd_poll_disable() -:166: WARNING:TYPO_SPELLING: 'seperate' may be misspelled - perhaps 'separate'? #166: FILE: drivers/gpu/drm/i915/display/intel_hotplug.c:693: + * dev->mode_config.mutex, we do the actual hotplug enabling in a seperate total: 0 errors, 2 warnings, 0 checks, 168 lines checked d3ea7f9670c6 drm/i915: Do drm_mode_config_reset() after HPD init 90e7c6ff4798 drm/i915: Refactor .hpd_irq_setup() calls a bit ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915/dpcd_bl: Skip testing control capability with force DPCD quirk
oh hold on, I misspoke. Here's the patch I was thinking of:
https://patchwork.freedesktop.org/series/82041/
On Thu, 2020-10-08 at 10:32 +0800, Kai-Heng Feng wrote:
> Hi Lyude,
>
> > On Oct 8, 2020, at 05:53, Lyude Paul wrote:
> >
> > Hi! I thought this patch rang a bell, we actually already had some
> > discussion
> > about this since there's a couple of other systems this was causing issues
> > for.
> > Unfortunately it never seems like that patch got sent out. Satadru?
> >
> > (if I don't hear back from them soon, I'll just send out a patch for this
> > myself)
> >
> > JFYI - the proper fix here is to just drop the
> > DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP check from the code entirely. As
> > long as
> > the backlight supports AUX_SET_CAP, that should be enough for us to control
> > it.
>
> Does the proper fix include dropping DP_QUIRK_FORCE_DPCD_BACKLIGHT entirely?
>
> Kai-Heng
>
> >
> > On Wed, 2020-10-07 at 14:58 +0800, Kai-Heng Feng wrote:
> > > HP DreamColor panel needs to be controlled via AUX interface. However,
> > > it has both DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP and
> > > DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP set, so it fails to pass
> > > intel_dp_aux_display_control_capable() test.
> > >
> > > Skip the test if the panel has force DPCD quirk.
> > >
> > > Signed-off-by: Kai-Heng Feng
> > > ---
> > > drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 10 ++
> > > 1 file changed, 6 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > > index acbd7eb66cbe..acf2e1c65290 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > > @@ -347,9 +347,13 @@ int intel_dp_aux_init_backlight_funcs(struct
> > > intel_connector *intel_connector)
> > > struct intel_panel *panel = &intel_connector->panel;
> > > struct intel_dp *intel_dp = enc_to_intel_dp(intel_connector->encoder);
> > > struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> > > + bool force_dpcd;
> > > +
> > > + force_dpcd = drm_dp_has_quirk(&intel_dp->desc, intel_dp->edid_quirks,
> > > + DP_QUIRK_FORCE_DPCD_BACKLIGHT);
> > >
> > > if (i915->params.enable_dpcd_backlight == 0 ||
> > > - !intel_dp_aux_display_control_capable(intel_connector))
> > > + (!force_dpcd &&
> > > !intel_dp_aux_display_control_capable(intel_connector)))
> > > return -ENODEV;
> > >
> > > /*
> > > @@ -358,9 +362,7 @@ int intel_dp_aux_init_backlight_funcs(struct
> > > intel_connector *intel_connector)
> > >*/
> > > if (i915->vbt.backlight.type !=
> > > INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE &&
> > > - i915->params.enable_dpcd_backlight != 1 &&
> > > - !drm_dp_has_quirk(&intel_dp->desc, intel_dp->edid_quirks,
> > > - DP_QUIRK_FORCE_DPCD_BACKLIGHT)) {
> > > + i915->params.enable_dpcd_backlight != 1 && !force_dpcd) {
> > > drm_info(&i915->drm,
> > >"Panel advertises DPCD backlight support, but "
> > >"VBT disagrees. If your backlight controls "
> > --
> > Sincerely,
> > Lyude Paul (she/her)
> > Software Engineer at Red Hat
--
Sincerely,
Lyude Paul (she/her)
Software Engineer at Red Hat
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev3)
== Series Details ==
Series: series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display
resume (rev3)
URL : https://patchwork.freedesktop.org/series/82417/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18657
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/index.html
Known issues
Here are the changes found in Patchwork_18657 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-byt-j1900: [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-byt-j1900/igt@i915_pm_...@basic-pci-d3-state.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/fi-byt-j1900/igt@i915_pm_...@basic-pci-d3-state.html
Possible fixes
* {igt@core_hotunplug@unbind-rebind}:
- fi-icl-y: [DMESG-WARN][3] ([i915#1982]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
* igt@gem_exec_suspend@basic-s3:
- fi-skl-lmem:[INCOMPLETE][5] ([i915#198]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
* igt@kms_busy@basic@flip:
- {fi-tgl-dsi}: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
- fi-kbl-x1275: [DMESG-WARN][9] ([i915#62] / [i915#92] / [i915#95])
-> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-icl-u2: [DMESG-WARN][11] ([i915#1982]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@vgem_basic@unload:
- fi-skl-guc: [DMESG-WARN][13] ([i915#2203]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-guc/igt@vgem_ba...@unload.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/fi-skl-guc/igt@vgem_ba...@unload.html
- fi-kbl-x1275: [DMESG-WARN][15] ([i915#62] / [i915#92]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@vgem_ba...@unload.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/fi-kbl-x1275/igt@vgem_ba...@unload.html
Warnings
* igt@gem_exec_suspend@basic-s0:
- fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92]) ->
[DMESG-WARN][18] ([i915#1982] / [i915#62] / [i915#92])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@gem_exec_susp...@basic-s0.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/fi-kbl-x1275/igt@gem_exec_susp...@basic-s0.html
* igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275: [DMESG-FAIL][19] ([i915#62]) -> [DMESG-FAIL][20]
([i915#62] / [i915#95])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
* igt@kms_flip@basic-flip-vs-modeset@a-dp1:
- fi-kbl-x1275: [DMESG-WARN][21] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][22] ([i915#62] / [i915#92]) +5 similar issues
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-mode...@a-dp1.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-mode...@a-dp1.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- fi-kbl-x1275: [DMESG-WARN][23] ([i915#62] / [i915#92]) ->
[DMESG-WARN][24] ([i915#62] / [i915#92] / [i915#95]) +5 similar issues
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/fi-kbl-x1275/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
{name}: This element is suppressed. This means it
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for rm/i915: Add support for LTTPR non-transparent link training mode (rev2)
== Series Details == Series: rm/i915: Add support for LTTPR non-transparent link training mode (rev2) URL : https://patchwork.freedesktop.org/series/82449/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1019:47:expected unsigned int [addressable] [usertype] ulClockParams +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1019:47:got restricted __le32 [usertype] +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1019:47: warning: incorrect type in assignment (different base types) +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1028:50: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1029:49: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1037:47: warning: too many warnings +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:184:44: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:283:14: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:320:14: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:323:14: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:326:14: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:329:18: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:330:26: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:338:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:340:38: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:342:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:346:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:348:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:353:33: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:367:43: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:369:38: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:374:67: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:375:53: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:378:66: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:389:80: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:395:57: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:402:69: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:403:53: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:406:66: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:414:66: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:423:69: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:424:69: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:473:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:476:45: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:477:45: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:484:54: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:52:28: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:531:35: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:53:29: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:533:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:54:26: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:55:27: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:56:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:57:26: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:577:21: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:581:25: warning: cast to restricted __le32 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:58:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:583:21: warning: cast to restricted __le32 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:586:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:590:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:59:26: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:598:21: war
[Intel-gfx] [PATCH] drm/i915: Verify the captured request is still active
Since the state we try and capture from the request is only stable while
active (once the request is completed it may be retired, and unpin/free
the logical state) double check the request has not yet completed.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gpu_error.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 2d0c4b8d9e3c..fd676ed72dab 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1369,6 +1369,9 @@ intel_engine_coredump_add_request(struct
intel_engine_coredump *ee,
{
struct intel_engine_capture_vma *vma = NULL;
+ if (i915_request_completed(rq))
+ return NULL;
+
ee->simulated |= record_context(&ee->context, rq);
if (ee->simulated)
return NULL;
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for rm/i915: Add support for LTTPR non-transparent link training mode (rev2)
== Series Details ==
Series: rm/i915: Add support for LTTPR non-transparent link training mode (rev2)
URL : https://patchwork.freedesktop.org/series/82449/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18658
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/index.html
Known issues
Here are the changes found in Patchwork_18658 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_pm_rpm@module-reload:
- fi-byt-j1900: [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-byt-j1900/igt@i915_pm_...@module-reload.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/fi-byt-j1900/igt@i915_pm_...@module-reload.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-bsw-kefka: [PASS][3] -> [DMESG-WARN][4] ([i915#1982])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
- fi-icl-u2: [PASS][5] -> [DMESG-WARN][6] ([i915#1982])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@c-edp1.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@c-edp1.html
Possible fixes
* {igt@core_hotunplug@unbind-rebind}:
- fi-icl-y: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
* igt@gem_exec_suspend@basic-s3:
- fi-skl-lmem:[INCOMPLETE][9] ([i915#198]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: [DMESG-WARN][11] ([i915#1982]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
* igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275: [DMESG-FAIL][13] ([i915#62]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-icl-u2: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@kms_flip@basic-flip-vs-modeset@b-dp1:
- fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92]) ->
[PASS][18] +32 similar issues
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-mode...@b-dp1.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-mode...@b-dp1.html
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-kbl-x1275: [DMESG-WARN][19] ([i915#62] / [i915#92] / [i915#95])
-> [PASS][20] +11 similar issues
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_force_connector_ba...@prune-stale-modes.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/fi-kbl-x1275/igt@kms_force_connector_ba...@prune-stale-modes.html
* igt@vgem_basic@unload:
- fi-skl-guc: [DMESG-WARN][21] ([i915#2203]) -> [PASS][22]
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-guc/igt@vgem_ba...@unload.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/fi-skl-guc/igt@vgem_ba...@unload.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
[i915#62]: https://gitlab.f
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3)
== Series Details ==
Series: series starting with [v5,1/3] drm/i915/display: Ignore
IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3)
URL : https://patchwork.freedesktop.org/series/82453/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18659
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/index.html
Known issues
Here are the changes found in Patchwork_18659 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- fi-icl-u2: [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-icl-u2/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
Possible fixes
* {igt@core_hotunplug@unbind-rebind}:
- fi-icl-y: [DMESG-WARN][3] ([i915#1982]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
* igt@gem_exec_suspend@basic-s3:
- fi-skl-lmem:[INCOMPLETE][5] ([i915#198]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
* igt@kms_busy@basic@flip:
- {fi-tgl-dsi}: [DMESG-WARN][9] ([i915#1982]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
- fi-kbl-x1275: [DMESG-WARN][11] ([i915#62] / [i915#92] / [i915#95])
-> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- {fi-kbl-7560u}: [DMESG-WARN][13] ([i915#1982]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-7560u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-kbl-7560u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
- fi-icl-u2: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@vgem_basic@unload:
- fi-skl-guc: [DMESG-WARN][17] ([i915#2203]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-guc/igt@vgem_ba...@unload.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-skl-guc/igt@vgem_ba...@unload.html
- fi-kbl-x1275: [DMESG-WARN][19] ([i915#62] / [i915#92]) -> [PASS][20]
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@vgem_ba...@unload.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-kbl-x1275/igt@vgem_ba...@unload.html
Warnings
* igt@gem_exec_suspend@basic-s3:
- fi-kbl-x1275: [DMESG-WARN][21] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][22] ([i915#1982] / [i915#62] / [i915#92] / [i915#95])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@gem_exec_susp...@basic-s3.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-kbl-x1275/igt@gem_exec_susp...@basic-s3.html
* igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275: [DMESG-FAIL][23] ([i915#62]) -> [DMESG-FAIL][24]
([i915#62] / [i915#95])
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-kbl-x1275: [DMESG-WARN][25] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][26] ([i91
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gem: Poison stolen pages before use
== Series Details ==
Series: drm/i915/gem: Poison stolen pages before use
URL : https://patchwork.freedesktop.org/series/82463/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9113_full -> Patchwork_18653_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_18653_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_18653_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_18653_full:
### IGT changes ###
Possible regressions
* igt@kms_flip@2x-plain-flip-fb-recreate@ac-vga1-hdmi-a1:
- shard-hsw: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-hsw6/igt@kms_flip@2x-plain-flip-fb-recre...@ac-vga1-hdmi-a1.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/shard-hsw6/igt@kms_flip@2x-plain-flip-fb-recre...@ac-vga1-hdmi-a1.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_exec_capture@pi@vcs0}:
- shard-glk: NOTRUN -> [INCOMPLETE][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/shard-glk6/igt@gem_exec_capture@p...@vcs0.html
Known issues
Here are the changes found in Patchwork_18653_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_gttfill@engines@rcs0:
- shard-glk: [PASS][4] -> [DMESG-WARN][5] ([i915#118] / [i915#95])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk7/igt@gem_exec_gttfill@engi...@rcs0.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/shard-glk8/igt@gem_exec_gttfill@engi...@rcs0.html
* igt@gem_userptr_blits@unsync-unmap-cycles:
- shard-skl: [PASS][6] -> [TIMEOUT][7] ([i915#2424])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@gem_userptr_bl...@unsync-unmap-cycles.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/shard-skl6/igt@gem_userptr_bl...@unsync-unmap-cycles.html
* igt@i915_pm_dc@dc6-psr:
- shard-skl: [PASS][8] -> [FAIL][9] ([i915#454])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@i915_pm...@dc6-psr.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/shard-skl6/igt@i915_pm...@dc6-psr.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-hsw: [PASS][10] -> [WARN][11] ([i915#1519])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-hsw2/igt@i915_pm_rc6_reside...@rc6-idle.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/shard-hsw8/igt@i915_pm_rc6_reside...@rc6-idle.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-kbl: [PASS][12] -> [DMESG-WARN][13] ([i915#180]) +3
similar issues
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl4/igt@kms_cursor_...@pipe-c-cursor-suspend.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/shard-kbl4/igt@kms_cursor_...@pipe-c-cursor-suspend.html
* igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled:
- shard-apl: [PASS][14] -> [DMESG-WARN][15] ([i915#1635] /
[i915#1982])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-apl4/igt@kms_draw_...@draw-method-xrgb2101010-render-xtiled.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/shard-apl6/igt@kms_draw_...@draw-method-xrgb2101010-render-xtiled.html
* igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1:
- shard-skl: [PASS][16] -> [DMESG-WARN][17] ([i915#1982]) +4
similar issues
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-edp1.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/shard-skl3/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-edp1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-skl: [PASS][18] -> [FAIL][19] ([i915#79]) +2 similar issues
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interrupti...@b-edp1.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/shard-skl8/igt@kms_flip@flip-vs-expired-vblank-interrupti...@b-edp1.html
* igt@kms_flip@flip-vs-suspend@a-dp1:
- shard-kbl: [PASS][20] -> [INCOMPLETE][21] ([i915#155])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl7/igt@kms_flip@flip-vs-susp...@a-dp1.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18653/shard-kbl2/igt@kms_flip@f
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev3)
== Series Details == Series: series starting with [v2,1/3] drm/i915: Reorder hpd init vs. display resume (rev3) URL : https://patchwork.freedesktop.org/series/82417/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9113_full -> Patchwork_18657_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_18657_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_18657_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_18657_full: ### IGT changes ### Possible regressions * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup@uc: - shard-hsw: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-hsw8/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-...@uc.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/shard-hsw6/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-...@uc.html * igt@gem_wait@write-wait@vcs0: - shard-snb: NOTRUN -> [FAIL][3] +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/shard-snb7/igt@gem_wait@write-w...@vcs0.html Known issues Here are the changes found in Patchwork_18657_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_gttfill@engines@rcs0: - shard-glk: [PASS][4] -> [DMESG-WARN][5] ([i915#118] / [i915#95]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk7/igt@gem_exec_gttfill@engi...@rcs0.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/shard-glk6/igt@gem_exec_gttfill@engi...@rcs0.html * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup@wc: - shard-hsw: [PASS][6] -> [FAIL][7] ([i915#1888]) +1 similar issue [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-hsw8/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-...@wc.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/shard-hsw6/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-...@wc.html * igt@gem_userptr_blits@unsync-unmap-cycles: - shard-skl: [PASS][8] -> [TIMEOUT][9] ([i915#2424]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@gem_userptr_bl...@unsync-unmap-cycles.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/shard-skl1/igt@gem_userptr_bl...@unsync-unmap-cycles.html * igt@gen9_exec_parse@allowed-single: - shard-skl: [PASS][10] -> [DMESG-WARN][11] ([i915#1436] / [i915#716]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl2/igt@gen9_exec_pa...@allowed-single.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/shard-skl7/igt@gen9_exec_pa...@allowed-single.html * igt@i915_pm_dc@dc6-psr: - shard-skl: [PASS][12] -> [FAIL][13] ([i915#454]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@i915_pm...@dc6-psr.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/shard-skl1/igt@i915_pm...@dc6-psr.html * igt@kms_cursor_edge_walk@pipe-b-64x64-left-edge: - shard-glk: [PASS][14] -> [DMESG-WARN][15] ([i915#1982]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk6/igt@kms_cursor_edge_w...@pipe-b-64x64-left-edge.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/shard-glk1/igt@kms_cursor_edge_w...@pipe-b-64x64-left-edge.html * igt@kms_flip@2x-flip-vs-panning@ab-vga1-hdmi-a1: - shard-hsw: [PASS][16] -> [DMESG-WARN][17] ([i915#1982]) +1 similar issue [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-hsw2/igt@kms_flip@2x-flip-vs-pann...@ab-vga1-hdmi-a1.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/shard-hsw6/igt@kms_flip@2x-flip-vs-pann...@ab-vga1-hdmi-a1.html * igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1: - shard-skl: [PASS][18] -> [DMESG-WARN][19] ([i915#1982]) +3 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-edp1.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/shard-skl7/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-edp1.html * igt@kms_flip@flip-vs-suspend@a-dp1: - shard-kbl: [PASS][20] -> [INCOMPLETE][21] ([i915#155]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl7/igt@kms_flip@flip-vs-susp...@a-dp1.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18657/shard-kbl2/igt@kms_flip@flip-vs-susp...@a-dp1.html * igt@kms_flip@flip-vs-s
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Verify the captured request is still active
== Series Details ==
Series: drm/i915: Verify the captured request is still active
URL : https://patchwork.freedesktop.org/series/82478/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18660
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/index.html
Known issues
Here are the changes found in Patchwork_18660 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-bsw-kefka: [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
Possible fixes
* {igt@core_hotunplug@unbind-rebind}:
- fi-icl-y: [DMESG-WARN][3] ([i915#1982]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
* igt@gem_exec_suspend@basic-s3:
- fi-skl-lmem:[INCOMPLETE][5] ([i915#198]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-icl-u2: [DMESG-WARN][9] ([i915#1982]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@vgem_basic@unload:
- fi-kbl-x1275: [DMESG-WARN][11] ([i915#62] / [i915#92]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@vgem_ba...@unload.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/fi-kbl-x1275/igt@vgem_ba...@unload.html
Warnings
* igt@i915_pm_rpm@module-reload:
- fi-kbl-guc: [DMESG-WARN][13] ([i915#2203]) -> [DMESG-FAIL][14]
([i915#2203])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-guc/igt@i915_pm_...@module-reload.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/fi-kbl-guc/igt@i915_pm_...@module-reload.html
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-kbl-x1275: [DMESG-WARN][15] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][16] ([i915#62] / [i915#92]) +6 similar issues
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_force_connector_ba...@prune-stale-modes.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/fi-kbl-x1275/igt@kms_force_connector_ba...@prune-stale-modes.html
* igt@prime_vgem@basic-fence-flip:
- fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92]) ->
[DMESG-WARN][18] ([i915#62] / [i915#92] / [i915#95]) +2 similar issues
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@prime_v...@basic-fence-flip.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/fi-kbl-x1275/igt@prime_v...@basic-fence-flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (45 -> 39)
--
Additional (1): fi-cfl-8109u
Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan
fi-ctg-p8600 fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_9113 -> Patchwork_18660
CI-20190529: 20190529
CI_DRM_9113: 412ff15f2b9a97bd0ab32f562ecb7efc84837881 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5805: 9ce50ffed89a46fa1bc98ee2cfe2271c49801
[Intel-gfx] PR - DG1 DMC v2.02
Sending PR for DG1 DMC for our CI to install DG1 DMC. The following changes since commit 58d41d0facca2478d3e45f6321224361519aee96: ice: Add comms package file for Intel E800 series driver (2020-10-05 08:09:03 -0400) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-firmware dg1_dmc_v2_02 for you to fetch changes up to a140ef3eb3746aba2c897db16e02ffb5ffa9e7a2: i915: Add DG1 DMC v2.02 (2020-10-08 12:13:33 -0700) Anusha Srivatsa (1): i915: Add DG1 DMC v2.02 WHENCE | 2 ++ i915/dg1_dmc_ver2_02.bin | Bin 0 -> 16624 bytes 2 files changed, 2 insertions(+) create mode 100644 i915/dg1_dmc_ver2_02.bin Thanks, Anusha ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for rm/i915: Add support for LTTPR non-transparent link training mode (rev2)
== Series Details ==
Series: rm/i915: Add support for LTTPR non-transparent link training mode (rev2)
URL : https://patchwork.freedesktop.org/series/82449/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9113_full -> Patchwork_18658_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_18658_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_exec_capture@pi@vcs0}:
- shard-skl: NOTRUN -> [INCOMPLETE][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-skl9/igt@gem_exec_capture@p...@vcs0.html
Known issues
Here are the changes found in Patchwork_18658_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s0:
- shard-iclb: [PASS][2] -> [INCOMPLETE][3] ([i915#1090] /
[i915#1185])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-iclb2/igt@gem_exec_susp...@basic-s0.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-iclb3/igt@gem_exec_susp...@basic-s0.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [PASS][4] -> [SKIP][5] ([i915#2190])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-tglb7/igt@gem_huc_c...@huc-copy.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-tglb6/igt@gem_huc_c...@huc-copy.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup@wc:
- shard-hsw: [PASS][6] -> [FAIL][7] ([i915#1888]) +1 similar issue
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-hsw8/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-...@wc.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-hsw2/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-...@wc.html
* igt@i915_pm_dc@dc6-psr:
- shard-skl: [PASS][8] -> [FAIL][9] ([i915#454])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@i915_pm...@dc6-psr.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-skl10/igt@i915_pm...@dc6-psr.html
* igt@kms_cursor_legacy@cursor-vs-flip-toggle:
- shard-hsw: [PASS][10] -> [FAIL][11] ([i915#2370])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-hsw2/igt@kms_cursor_leg...@cursor-vs-flip-toggle.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-hsw8/igt@kms_cursor_leg...@cursor-vs-flip-toggle.html
* igt@kms_draw_crc@draw-method-rgb565-render-untiled:
- shard-skl: [PASS][12] -> [FAIL][13] ([i915#52] / [i915#54])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl2/igt@kms_draw_...@draw-method-rgb565-render-untiled.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-skl8/igt@kms_draw_...@draw-method-rgb565-render-untiled.html
* igt@kms_draw_crc@draw-method-xrgb2101010-pwrite-untiled:
- shard-snb: [PASS][14] -> [SKIP][15] ([fdo#109271])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-snb4/igt@kms_draw_...@draw-method-xrgb2101010-pwrite-untiled.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-snb2/igt@kms_draw_...@draw-method-xrgb2101010-pwrite-untiled.html
* igt@kms_flip@flip-vs-blocking-wf-vblank@a-dp1:
- shard-kbl: [PASS][16] -> [DMESG-WARN][17] ([i915#1982]) +1
similar issue
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl1/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-dp1.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-kbl6/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-dp1.html
* igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1:
- shard-skl: [PASS][18] -> [DMESG-WARN][19] ([i915#1982]) +5
similar issues
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-edp1.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-skl5/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-edp1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-skl: [PASS][20] -> [FAIL][21] ([i915#79])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interrupti...@c-edp1.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interrupti...@c-edp1.html
* igt@kms_flip@flip-vs-suspend@a-dp1:
- shard-kbl: [PASS][22] -> [INCOMPLETE][23] ([i915#155])
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl7/igt@kms_flip@flip-vs-susp...@a-dp1.html
[23]:
ht
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3)
== Series Details == Series: series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3) URL : https://patchwork.freedesktop.org/series/82453/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113_full -> Patchwork_18659_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_18659_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_gttfill@engines@rcs0: - shard-glk: [PASS][1] -> [DMESG-WARN][2] ([i915#118] / [i915#95]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk7/igt@gem_exec_gttfill@engi...@rcs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-glk4/igt@gem_exec_gttfill@engi...@rcs0.html * igt@gem_huc_copy@huc-copy: - shard-tglb: [PASS][3] -> [SKIP][4] ([i915#2190]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-tglb7/igt@gem_huc_c...@huc-copy.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-tglb6/igt@gem_huc_c...@huc-copy.html * igt@i915_pm_dc@dc6-psr: - shard-skl: [PASS][5] -> [FAIL][6] ([i915#454]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@i915_pm...@dc6-psr.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl1/igt@i915_pm...@dc6-psr.html * igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1: - shard-skl: [PASS][7] -> [DMESG-WARN][8] ([i915#1982]) +4 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-edp1.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl10/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-edp1.html * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1: - shard-kbl: [PASS][9] -> [DMESG-WARN][10] ([i915#180]) +3 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl6/igt@kms_flip@flip-vs-suspend-interrupti...@a-dp1.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-kbl7/igt@kms_flip@flip-vs-suspend-interrupti...@a-dp1.html * igt@kms_flip@flip-vs-suspend@a-dp1: - shard-kbl: [PASS][11] -> [INCOMPLETE][12] ([i915#155]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl7/igt@kms_flip@flip-vs-susp...@a-dp1.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-kbl6/igt@kms_flip@flip-vs-susp...@a-dp1.html * igt@kms_frontbuffer_tracking@fbc-stridechange: - shard-tglb: [PASS][13] -> [DMESG-WARN][14] ([i915#1982]) +4 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-tglb1/igt@kms_frontbuffer_track...@fbc-stridechange.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-tglb2/igt@kms_frontbuffer_track...@fbc-stridechange.html - shard-glk: [PASS][15] -> [DMESG-WARN][16] ([i915#1982]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk5/igt@kms_frontbuffer_track...@fbc-stridechange.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-glk8/igt@kms_frontbuffer_track...@fbc-stridechange.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [PASS][17] -> [FAIL][18] ([i915#1188]) +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl2/igt@kms_...@bpc-switch-dpms.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl4/igt@kms_...@bpc-switch-dpms.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: - shard-skl: [PASS][19] -> [INCOMPLETE][20] ([i915#198]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl8/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-c.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl2/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-c.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [PASS][21] -> [FAIL][22] ([fdo#108145] / [i915#265]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl5/igt@kms_plane_alpha_bl...@pipe-c-coverage-7efc.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl7/igt@kms_plane_alpha_bl...@pipe-c-coverage-7efc.html * igt@kms_psr@psr2_cursor_plane_move: - shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109441]) +2 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-iclb5/igt@kms_psr@psr2_cursor_plane_move.html * igt@kms_setmode@basic: - shard-glk: [PASS][25] -> [FAIL][26] ([i915#31]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DR
[Intel-gfx] [PATCH v3 2/3] drm/i915/vbt: Update the version and expected size of BDB_GENERAL_DEFINITIONS map
This will remove the "Expected child device config size for VBT
version 235 not known" debug message seen in TGL, although this is not
fixing anything it good to keep our VBT parser updated.
Reviewed-by: Matt Roper
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/display/intel_bios.c
index b4d99d0bf696..0a309645fe06 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1917,7 +1917,7 @@ parse_general_definitions(struct drm_i915_private
*dev_priv,
expected_size = 37;
} else if (bdb->version <= 215) {
expected_size = 38;
- } else if (bdb->version <= 229) {
+ } else if (bdb->version <= 237) {
expected_size = 39;
} else {
expected_size = sizeof(*child);
--
2.28.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 1/3] drm/i915/vbt: Fix backlight parsing for VBT 234+
Child min_brightness is obsolete from VBT 234+, instead the new
min_brightness field in the main structure should be used.
This new field is 16 bits wide, so backlight_precision_bits is needed
to check if value needs to be scaled down but it is only available in
VBT 236+ so working around it by using the also new backlight_level
in the main struct.
v2:
- missed that backlight_data->level is also obsolete
v3:
- s/backlight/brightness to better match specification
- using u16 to specify brightness level instead of a u32 : 16
BSpec: 20149
Reviewed-by: Matt Roper
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_bios.c | 30 +--
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 12 ++--
2 files changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/display/intel_bios.c
index 5804eb9faf24..b4d99d0bf696 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -425,6 +425,7 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv,
const struct bdb_lfp_backlight_data *backlight_data;
const struct lfp_backlight_data_entry *entry;
int panel_type = dev_priv->vbt.panel_type;
+ u16 level;
backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
if (!backlight_data)
@@ -459,14 +460,39 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv,
dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
- dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
+
+ if (bdb->version >= 234) {
+ u16 min_level;
+ bool scale;
+
+ level = backlight_data->brightness_level[panel_type].level;
+ min_level =
backlight_data->brightness_min_level[panel_type].level;
+
+ if (bdb->version >= 236)
+ scale =
backlight_data->brightness_precision_bits[panel_type] == 16;
+ else
+ scale = level > 255;
+
+ if (scale)
+ min_level = min_level / 255;
+
+ if (min_level > 255) {
+ drm_warn(&dev_priv->drm, "Brightness min level >
255\n");
+ level = 255;
+ }
+ dev_priv->vbt.backlight.min_brightness = min_level;
+ } else {
+ level = backlight_data->level[panel_type];
+ dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
+ }
+
drm_dbg_kms(&dev_priv->drm,
"VBT backlight PWM modulation frequency %u Hz, "
"active %s, min brightness %u, level %u, controller %u\n",
dev_priv->vbt.backlight.pwm_freq_hz,
dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
dev_priv->vbt.backlight.min_brightness,
- backlight_data->level[panel_type],
+ level,
dev_priv->vbt.backlight.controller);
}
diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index 54bcc6a6947c..5df23e1848a6 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -782,7 +782,7 @@ struct lfp_backlight_data_entry {
u8 active_low_pwm:1;
u8 obsolete1:5;
u16 pwm_freq_hz;
- u8 min_brightness;
+ u8 min_brightness; /* Obsolete from 234+ */
u8 obsolete2;
u8 obsolete3;
} __packed;
@@ -792,11 +792,19 @@ struct lfp_backlight_control_method {
u8 controller:4;
} __packed;
+struct lfp_brightness_level {
+ u16 level;
+ u16 reserved;
+} __packed;
+
struct bdb_lfp_backlight_data {
u8 entry_size;
struct lfp_backlight_data_entry data[16];
- u8 level[16];
+ u8 level[16]; /* Obsolete from 234+ */
struct lfp_backlight_control_method backlight_control[16];
+ struct lfp_brightness_level brightness_level[16]; /* 234+
*/
+ struct lfp_brightness_level brightness_min_level[16]; /* 234+ */
+ u8 brightness_precision_bits[16];
/* 236+ */
} __packed;
/*
--
2.28.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 3/3] drm/i915/vbt: Add VRR VBT toggle
This will be used in future but already adding to VBT so we are
updated with VBT changes.
Reviewed-by: Matt Roper
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index 5df23e1848a6..49b4b5fca941 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -835,6 +835,7 @@ struct bdb_lfp_power {
u16 lace_enabled_status;
struct agressiveness_profile_entry aggressivenes[16];
u16 hobl; /* 232+ */
+ u16 vrr_feature_enabled; /* 233+ */
} __packed;
/*
--
2.28.0
___
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Verify the captured request is still active
== Series Details ==
Series: drm/i915: Verify the captured request is still active
URL : https://patchwork.freedesktop.org/series/82478/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9113_full -> Patchwork_18660_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_18660_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_exec_capture@pi@vcs0}:
- shard-tglb: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-tglb6/igt@gem_exec_capture@p...@vcs0.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/shard-tglb6/igt@gem_exec_capture@p...@vcs0.html
Known issues
Here are the changes found in Patchwork_18660_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_gttfill@engines@rcs0:
- shard-glk: [PASS][3] -> [DMESG-WARN][4] ([i915#118] / [i915#95])
+1 similar issue
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk7/igt@gem_exec_gttfill@engi...@rcs0.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/shard-glk4/igt@gem_exec_gttfill@engi...@rcs0.html
* igt@gem_userptr_blits@unsync-unmap-cycles:
- shard-skl: [PASS][5] -> [TIMEOUT][6] ([i915#2424])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@gem_userptr_bl...@unsync-unmap-cycles.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/shard-skl2/igt@gem_userptr_bl...@unsync-unmap-cycles.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [PASS][7] -> [DMESG-WARN][8] ([i915#1436] /
[i915#716])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl2/igt@gen9_exec_pa...@allowed-single.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/shard-skl3/igt@gen9_exec_pa...@allowed-single.html
* igt@i915_pm_dc@dc6-psr:
- shard-skl: [PASS][9] -> [FAIL][10] ([i915#454])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@i915_pm...@dc6-psr.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/shard-skl2/igt@i915_pm...@dc6-psr.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][11] -> [FAIL][12] ([i915#79])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank-interrupti...@ac-hdmi-a1-hdmi-a2.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank-interrupti...@ac-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-blocking-wf-vblank@a-dp1:
- shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#1982])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl1/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-dp1.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/shard-kbl7/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-dp1.html
* igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1:
- shard-skl: [PASS][15] -> [DMESG-WARN][16] ([i915#1982]) +5
similar issues
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-edp1.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/shard-skl4/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +2
similar issues
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl6/igt@kms_flip@flip-vs-suspend-interrupti...@a-dp1.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/shard-kbl7/igt@kms_flip@flip-vs-suspend-interrupti...@a-dp1.html
* igt@kms_flip@flip-vs-suspend@a-dp1:
- shard-kbl: [PASS][19] -> [INCOMPLETE][20] ([i915#155])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl7/igt@kms_flip@flip-vs-susp...@a-dp1.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/shard-kbl4/igt@kms_flip@flip-vs-susp...@a-dp1.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-snb: [PASS][21] -> [SKIP][22] ([fdo#109271]) +4 similar
issues
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-snb6/igt@kms_frontbuffer_track...@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18660/shard-snb6/igt@kms_frontbuffer_track...@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-wc:
- shard-glk:
Re: [Intel-gfx] [PATCH 1/2] drm/i915/dpcd_bl: Skip testing control capability with force DPCD quirk
Kevin Chowski said he would be geting to working on upstreaming a version
of that which was in the ChromeOS tree here:
https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2344844
when I last spoke to hi
(This was two weeks ago.)
Kevin - do you have any input on this?
Satadru
On Thu, Oct 8, 2020 at 1:07 PM Lyude Paul wrote:
> oh hold on, I misspoke. Here's the patch I was thinking of:
>
> https://patchwork.freedesktop.org/series/82041/
>
> On Thu, 2020-10-08 at 10:32 +0800, Kai-Heng Feng wrote:
> > Hi Lyude,
> >
> > > On Oct 8, 2020, at 05:53, Lyude Paul wrote:
> > >
> > > Hi! I thought this patch rang a bell, we actually already had some
> > > discussion
> > > about this since there's a couple of other systems this was causing
> issues
> > > for.
> > > Unfortunately it never seems like that patch got sent out. Satadru?
> > >
> > > (if I don't hear back from them soon, I'll just send out a patch for
> this
> > > myself)
> > >
> > > JFYI - the proper fix here is to just drop the
> > > DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP check from the code entirely.
> As
> > > long as
> > > the backlight supports AUX_SET_CAP, that should be enough for us to
> control
> > > it.
> >
> > Does the proper fix include dropping DP_QUIRK_FORCE_DPCD_BACKLIGHT
> entirely?
> >
> > Kai-Heng
> >
> > >
> > > On Wed, 2020-10-07 at 14:58 +0800, Kai-Heng Feng wrote:
> > > > HP DreamColor panel needs to be controlled via AUX interface.
> However,
> > > > it has both DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP and
> > > > DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP set, so it fails to pass
> > > > intel_dp_aux_display_control_capable() test.
> > > >
> > > > Skip the test if the panel has force DPCD quirk.
> > > >
> > > > Signed-off-by: Kai-Heng Feng
> > > > ---
> > > > drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 10 ++
> > > > 1 file changed, 6 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > > > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > > > index acbd7eb66cbe..acf2e1c65290 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > > > @@ -347,9 +347,13 @@ int intel_dp_aux_init_backlight_funcs(struct
> > > > intel_connector *intel_connector)
> > > > struct intel_panel *panel = &intel_connector->panel;
> > > > struct intel_dp *intel_dp =
> enc_to_intel_dp(intel_connector->encoder);
> > > > struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> > > > + bool force_dpcd;
> > > > +
> > > > + force_dpcd = drm_dp_has_quirk(&intel_dp->desc,
> intel_dp->edid_quirks,
> > > > + DP_QUIRK_FORCE_DPCD_BACKLIGHT);
> > > >
> > > > if (i915->params.enable_dpcd_backlight == 0 ||
> > > > - !intel_dp_aux_display_control_capable(intel_connector))
> > > > + (!force_dpcd &&
> > > > !intel_dp_aux_display_control_capable(intel_connector)))
> > > > return -ENODEV;
> > > >
> > > > /*
> > > > @@ -358,9 +362,7 @@ int intel_dp_aux_init_backlight_funcs(struct
> > > > intel_connector *intel_connector)
> > > >*/
> > > > if (i915->vbt.backlight.type !=
> > > > INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE &&
> > > > - i915->params.enable_dpcd_backlight != 1 &&
> > > > - !drm_dp_has_quirk(&intel_dp->desc, intel_dp->edid_quirks,
> > > > - DP_QUIRK_FORCE_DPCD_BACKLIGHT)) {
> > > > + i915->params.enable_dpcd_backlight != 1 && !force_dpcd) {
> > > > drm_info(&i915->drm,
> > > >"Panel advertises DPCD backlight support, but "
> > > >"VBT disagrees. If your backlight controls "
> > > --
> > > Sincerely,
> > > Lyude Paul (she/her)
> > > Software Engineer at Red Hat
> --
> Sincerely,
> Lyude Paul (she/her)
> Software Engineer at Red Hat
>
>
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[Intel-gfx] [PATCH v10 03/11] drm/i915: Add hw.pipe_mode to allow bigjoiner pipe/transcoder split
From: Maarten Lankhorst
With bigjoiner, there will be 2 pipes driving 2 halfs of 1 transcoder,
because of this, we need a pipe_mode for various calculations, including
for example watermarks, plane clipping, etc.
v6:
* renaming in separate function, only pipe_mode here (Ville)
* Add description (Maarten)
v5:
* Rebase (Manasi)
v4:
* Manual rebase (Manasi)
v3:
* Change state to crtc_state, fix rebase err (Manasi)
v2:
* Manual Rebase (Manasi)
Signed-off-by: Maarten Lankhorst
Signed-off-by: Manasi Navare
Reviewed-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_display.c | 40 +-
.../drm/i915/display/intel_display_types.h| 11 ++-
drivers/gpu/drm/i915/intel_pm.c | 76 +--
3 files changed, 69 insertions(+), 58 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 9274ffa6e03a..723766b1eae3 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6166,18 +6166,16 @@ skl_update_scaler(struct intel_crtc_state *crtc_state,
bool force_detach,
static int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state)
{
- const struct drm_display_mode *adjusted_mode =
- &crtc_state->hw.adjusted_mode;
+ const struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode;
int width, height;
if (crtc_state->pch_pfit.enabled) {
width = drm_rect_width(&crtc_state->pch_pfit.dst);
height = drm_rect_height(&crtc_state->pch_pfit.dst);
} else {
- width = adjusted_mode->crtc_hdisplay;
- height = adjusted_mode->crtc_vdisplay;
+ width = pipe_mode->crtc_hdisplay;
+ height = pipe_mode->crtc_vdisplay;
}
-
return skl_update_scaler(crtc_state, !crtc_state->hw.active,
SKL_CRTC_INDEX,
&crtc_state->scaler_state.scaler_id,
@@ -8085,7 +8083,7 @@ static bool intel_crtc_supports_double_wide(const struct
intel_crtc *crtc)
static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *crtc_state)
{
- u32 pixel_rate = crtc_state->hw.adjusted_mode.crtc_clock;
+ u32 pixel_rate = crtc_state->hw.pipe_mode.crtc_clock;
unsigned int pipe_w, pipe_h, pfit_w, pfit_h;
/*
@@ -8122,7 +8120,7 @@ static void intel_crtc_compute_pixel_rate(struct
intel_crtc_state *crtc_state)
if (HAS_GMCH(dev_priv))
/* FIXME calculate proper pipe pixel rate for GMCH pfit */
crtc_state->pixel_rate =
- crtc_state->hw.adjusted_mode.crtc_clock;
+ crtc_state->hw.pipe_mode.crtc_clock;
else
crtc_state->pixel_rate =
ilk_pipe_pixel_rate(crtc_state);
@@ -8132,7 +8130,7 @@ static int intel_crtc_compute_config(struct intel_crtc
*crtc,
struct intel_crtc_state *pipe_config)
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- const struct drm_display_mode *adjusted_mode =
&pipe_config->hw.adjusted_mode;
+ const struct drm_display_mode *pipe_mode = &pipe_config->hw.pipe_mode;
int clock_limit = dev_priv->max_dotclk_freq;
if (INTEL_GEN(dev_priv) < 4) {
@@ -8143,16 +8141,16 @@ static int intel_crtc_compute_config(struct intel_crtc
*crtc,
* is > 90% of the (display) core speed.
*/
if (intel_crtc_supports_double_wide(crtc) &&
- adjusted_mode->crtc_clock > clock_limit) {
+ pipe_mode->crtc_clock > clock_limit) {
clock_limit = dev_priv->max_dotclk_freq;
pipe_config->double_wide = true;
}
}
- if (adjusted_mode->crtc_clock > clock_limit) {
+ if (pipe_mode->crtc_clock > clock_limit) {
drm_dbg_kms(&dev_priv->drm,
"requested pixel clock (%d kHz) too high (max: %d
kHz, double wide: %s)\n",
- adjusted_mode->crtc_clock, clock_limit,
+ pipe_mode->crtc_clock, clock_limit,
yesno(pipe_config->double_wide));
return -EINVAL;
}
@@ -8195,7 +8193,7 @@ static int intel_crtc_compute_config(struct intel_crtc
*crtc,
* WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.
*/
if ((INTEL_GEN(dev_priv) > 4 || IS_G4X(dev_priv)) &&
- adjusted_mode->crtc_hsync_start == adjusted_mode->crtc_hdisplay)
+ pipe_mode->crtc_hsync_start == pipe_mode->crtc_hdisplay)
return -EINVAL;
intel_crtc_compute_pixel_rate(pipe_config);
@@ -12719,15 +12717,15 @@ static bool c8_planes_changed(const struct
intel_crtc_state *new_crtc_state)
static u16 hsw_linetime_wm(const struct intel_c
[Intel-gfx] [PATCH v10 05/11] drm/i915: Try to make bigjoiner work in atomic check
From: Maarten Lankhorst
When the clock is higher than the dotclock, try with 2 pipes enabled.
If we can enable 2, then we will go into big joiner mode, and steal
the adjacent crtc.
This only links the crtc's in software, no hardware or plane
programming is done yet. Blobs are also copied from the master's
crtc_state, so it doesn't depend at commit time on the other
crtc_state.
v4:
* Fixes in intel_crtc_compute_config (Ville)
v3:
* Manual Rebase (Manasi)
Changes since v1:
- Rename pipe timings to transcoder timings, as they are now different.
Changes since v2:
- Rework bigjoiner checks; always disable slave when recalculating
master. No need to have a separate bigjoiner pass any more.
- Use pipe_mode instead of transcoder_mode, to clean up the code.
Signed-off-by: Maarten Lankhorst
Signed-off-by: Manasi Navare
---
drivers/gpu/drm/i915/display/intel_atomic.c | 9 +-
drivers/gpu/drm/i915/display/intel_atomic.h | 3 +-
drivers/gpu/drm/i915/display/intel_display.c | 202 --
.../drm/i915/display/intel_display_types.h| 9 +
drivers/gpu/drm/i915/display/intel_dp.c | 22 +-
5 files changed, 211 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c
b/drivers/gpu/drm/i915/display/intel_atomic.c
index 86be032bcf96..e243ce97b534 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -270,14 +270,15 @@ void intel_crtc_free_hw_state(struct intel_crtc_state
*crtc_state)
intel_crtc_put_color_blobs(crtc_state);
}
-void intel_crtc_copy_color_blobs(struct intel_crtc_state *crtc_state)
+void intel_crtc_copy_color_blobs(struct intel_crtc_state *crtc_state,
+const struct intel_crtc_state *from_crtc_state)
{
drm_property_replace_blob(&crtc_state->hw.degamma_lut,
- crtc_state->uapi.degamma_lut);
+ from_crtc_state->uapi.degamma_lut);
drm_property_replace_blob(&crtc_state->hw.gamma_lut,
- crtc_state->uapi.gamma_lut);
+ from_crtc_state->uapi.gamma_lut);
drm_property_replace_blob(&crtc_state->hw.ctm,
- crtc_state->uapi.ctm);
+ from_crtc_state->uapi.ctm);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.h
b/drivers/gpu/drm/i915/display/intel_atomic.h
index 285de07011dc..62a3365ed5e6 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic.h
@@ -43,7 +43,8 @@ struct drm_crtc_state *intel_crtc_duplicate_state(struct
drm_crtc *crtc);
void intel_crtc_destroy_state(struct drm_crtc *crtc,
struct drm_crtc_state *state);
void intel_crtc_free_hw_state(struct intel_crtc_state *crtc_state);
-void intel_crtc_copy_color_blobs(struct intel_crtc_state *crtc_state);
+void intel_crtc_copy_color_blobs(struct intel_crtc_state *crtc_state,
+const struct intel_crtc_state
*from_crtc_state);
struct drm_atomic_state *intel_atomic_state_alloc(struct drm_device *dev);
void intel_atomic_state_free(struct drm_atomic_state *state);
void intel_atomic_state_clear(struct drm_atomic_state *state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index cc540c7b7dcd..37b56f4c2401 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8130,9 +8130,24 @@ static int intel_crtc_compute_config(struct intel_crtc
*crtc,
struct intel_crtc_state *pipe_config)
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- const struct drm_display_mode *pipe_mode = &pipe_config->hw.pipe_mode;
+ struct drm_display_mode *pipe_mode = &pipe_config->hw.pipe_mode;
int clock_limit = dev_priv->max_dotclk_freq;
+ *pipe_mode = pipe_config->hw.adjusted_mode;
+
+ /* Adjust pipe_mode for bigjoiner, with half the horizontal mode */
+ if (pipe_config->bigjoiner) {
+ pipe_mode->crtc_clock /= 2;
+ pipe_mode->crtc_hdisplay /= 2;
+ pipe_mode->crtc_hblank_start /= 2;
+ pipe_mode->crtc_hblank_end /= 2;
+ pipe_mode->crtc_hsync_start /= 2;
+ pipe_mode->crtc_hsync_end /= 2;
+ pipe_mode->crtc_htotal /= 2;
+ pipe_mode->crtc_hskew /= 2;
+ pipe_config->pipe_src_w /= 2;
+ }
+
if (INTEL_GEN(dev_priv) < 4) {
clock_limit = dev_priv->max_cdclk_freq * 9 / 10;
@@ -8193,7 +8208,7 @@ static int intel_crtc_compute_config(struct intel_crtc
*crtc,
* WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.
*/
if ((INTEL_GEN(dev_priv) > 4 || IS_G4X(dev_priv)) &&
- pipe_mode->crtc_
[Intel-gfx] [PATCH v10 01/11] HAX to make DSC work on the icelake test system
From: Maarten Lankhorst
DSC is available on the display emulator, but not set in DPCD.
Override the entries to allow bigjoiner testing.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_dp_helper.c | 4 ++--
include/drm/drm_dp_helper.h | 1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 478dd51f738d..7f355c1c49c0 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -1987,7 +1987,7 @@ u8 drm_dp_dsc_sink_max_slice_count(const u8
dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],
if (slice_cap1 & DP_DSC_4_PER_DP_DSC_SINK)
return 4;
if (slice_cap1 & DP_DSC_2_PER_DP_DSC_SINK)
- return 2;
+ return 4;
if (slice_cap1 & DP_DSC_1_PER_DP_DSC_SINK)
return 1;
} else {
@@ -2011,7 +2011,7 @@ u8 drm_dp_dsc_sink_max_slice_count(const u8
dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],
if (slice_cap1 & DP_DSC_4_PER_DP_DSC_SINK)
return 4;
if (slice_cap1 & DP_DSC_2_PER_DP_DSC_SINK)
- return 2;
+ return 4;
if (slice_cap1 & DP_DSC_1_PER_DP_DSC_SINK)
return 1;
}
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 159191c1ae75..1eeffb670ad9 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -1502,6 +1502,7 @@ int drm_dp_dsc_sink_supported_input_bpcs(const u8
dsc_dpc[DP_DSC_RECEIVER_CAP_SI
static inline bool
drm_dp_sink_supports_dsc(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
{
+ return dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT];
return dsc_dpcd[DP_DSC_SUPPORT - DP_DSC_SUPPORT] &
DP_DSC_DECOMPRESSION_IS_SUPPORTED;
}
--
2.19.1
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[Intel-gfx] [PATCH v10 02/11] drm/i915/display: Rename pipe_timings to transcoder_timings
No functional changes in this patch.
With Bigjoiner, there are 2 pipes driving 2 halfs of 1
transcoder. The transcoder_mode has the full timings, and is used
for configuring the transcoder with the intended mode after
joining the 2 halves.
To clear the confusion, we rename intel_set_pipe_timings to
intel_set_transcoder_timings
v2:
* Split the renaming into separate patch (Ville)
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Signed-off-by: Manasi Navare
Reviewed-by: Animesh Manna
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 22 ++--
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 907e1d155443..9274ffa6e03a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -154,7 +154,7 @@ static void ilk_pch_clock_get(struct intel_crtc *crtc,
static int intel_framebuffer_init(struct intel_framebuffer *ifb,
struct drm_i915_gem_object *obj,
struct drm_mode_fb_cmd2 *mode_cmd);
-static void intel_set_pipe_timings(const struct intel_crtc_state *crtc_state);
+static void intel_set_transcoder_timings(const struct intel_crtc_state
*crtc_state);
static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state);
static void intel_cpu_transcoder_set_m_n(const struct intel_crtc_state
*crtc_state,
const struct intel_link_m_n *m_n,
@@ -7003,7 +7003,7 @@ static void ilk_crtc_enable(struct intel_atomic_state
*state,
if (intel_crtc_has_dp_encoder(new_crtc_state))
intel_dp_set_m_n(new_crtc_state, M1_N1);
- intel_set_pipe_timings(new_crtc_state);
+ intel_set_transcoder_timings(new_crtc_state);
intel_set_pipe_src_size(new_crtc_state);
if (new_crtc_state->has_pch_encoder)
@@ -7148,7 +7148,7 @@ static void hsw_crtc_enable(struct intel_atomic_state
*state,
intel_encoders_pre_enable(state, crtc);
if (!transcoder_is_dsi(cpu_transcoder))
- intel_set_pipe_timings(new_crtc_state);
+ intel_set_transcoder_timings(new_crtc_state);
intel_set_pipe_src_size(new_crtc_state);
@@ -7543,7 +7543,7 @@ static void valleyview_crtc_enable(struct
intel_atomic_state *state,
if (intel_crtc_has_dp_encoder(new_crtc_state))
intel_dp_set_m_n(new_crtc_state, M1_N1);
- intel_set_pipe_timings(new_crtc_state);
+ intel_set_transcoder_timings(new_crtc_state);
intel_set_pipe_src_size(new_crtc_state);
if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) {
@@ -7611,7 +7611,7 @@ static void i9xx_crtc_enable(struct intel_atomic_state
*state,
if (intel_crtc_has_dp_encoder(new_crtc_state))
intel_dp_set_m_n(new_crtc_state, M1_N1);
- intel_set_pipe_timings(new_crtc_state);
+ intel_set_transcoder_timings(new_crtc_state);
intel_set_pipe_src_size(new_crtc_state);
i9xx_set_pipeconf(new_crtc_state);
@@ -8865,7 +8865,7 @@ static void i8xx_compute_dpll(struct intel_crtc *crtc,
crtc_state->dpll_hw_state.dpll = dpll;
}
-static void intel_set_pipe_timings(const struct intel_crtc_state *crtc_state)
+static void intel_set_transcoder_timings(const struct intel_crtc_state
*crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -8951,8 +8951,8 @@ static bool intel_pipe_is_interlaced(const struct
intel_crtc_state *crtc_state)
return intel_de_read(dev_priv, PIPECONF(cpu_transcoder)) &
PIPECONF_INTERLACE_MASK;
}
-static void intel_get_pipe_timings(struct intel_crtc *crtc,
- struct intel_crtc_state *pipe_config)
+static void intel_get_transcoder_timings(struct intel_crtc *crtc,
+struct intel_crtc_state *pipe_config)
{
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
@@ -9575,7 +9575,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
if (INTEL_GEN(dev_priv) < 4)
pipe_config->double_wide = tmp & PIPECONF_DOUBLE_WIDE;
- intel_get_pipe_timings(crtc, pipe_config);
+ intel_get_transcoder_timings(crtc, pipe_config);
intel_get_pipe_src_size(crtc, pipe_config);
i9xx_get_pfit_config(pipe_config);
@@ -10856,7 +10856,7 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
pipe_config->pixel_multiplier = 1;
}
- intel_get_pipe_timings(crtc, pipe_config);
+ intel_get_transcoder_timings(crtc, pipe_config);
intel_get_pipe_src_size(crtc, pipe_config);
ilk_get_pfit_config(pipe_config);
@@ -11273,7 +11273,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
[Intel-gfx] [PATCH v10 11/11] drm/i915: Add debugfs dumping for bigjoiner, v3.
From: Maarten Lankhorst
Dump debugfs and planar links as well, this will make it easier to debug
when things go wrong.
v4:
* Rebase
Changes since v1:
- Report planar slaves as such, now that we have the plane_state switch.
Changes since v2:
- Rebase on top of the new plane format dumping
Signed-off-by: Maarten Lankhorst
Signed-off-by: Manasi Navare
---
.../drm/i915/display/intel_display_debugfs.c | 29 ++-
1 file changed, 28 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 0bf31f9a8af5..2760e132582d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -750,6 +750,17 @@ static void plane_rotation(char *buf, size_t bufsize,
unsigned int rotation)
rotation);
}
+static const char *plane_visibility(const struct intel_plane_state
*plane_state)
+{
+ if (plane_state->uapi.visible)
+ return "visible";
+
+ if (plane_state->planar_slave)
+ return "planar-slave";
+
+ return "hidden";
+}
+
static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane
*plane)
{
const struct intel_plane_state *plane_state =
@@ -768,12 +779,22 @@ static void intel_plane_uapi_info(struct seq_file *m,
struct intel_plane *plane)
plane_rotation(rot_str, sizeof(rot_str),
plane_state->uapi.rotation);
- seq_printf(m, "\t\tuapi: fb=%d,%s,%dx%d, src=" DRM_RECT_FP_FMT ", dst="
DRM_RECT_FMT ", rotation=%s\n",
+ seq_printf(m, "\t\tuapi: fb=%d,%s,%dx%d, visible=%s, src="
DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n",
fb ? fb->base.id : 0, fb ? format_name.str : "n/a",
fb ? fb->width : 0, fb ? fb->height : 0,
+ plane_visibility(plane_state),
DRM_RECT_FP_ARG(&src),
DRM_RECT_ARG(&dst),
rot_str);
+
+ if (plane_state->planar_linked_plane)
+ seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n",
+ plane_state->planar_linked_plane->base.base.id,
plane_state->planar_linked_plane->base.name,
+ plane_state->planar_slave ? "slave" : "master");
+ if (plane_state->bigjoiner_plane)
+ seq_printf(m, "\t\tbigjoiner: Linked to [PLANE:%d:%s] as a
%s\n",
+ plane_state->bigjoiner_plane->base.base.id,
plane_state->bigjoiner_plane->base.name,
+ plane_state->bigjoiner_slave ? "slave" : "master");
}
static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane)
@@ -869,6 +890,12 @@ static void intel_crtc_info(struct seq_file *m, struct
intel_crtc *crtc)
intel_scaler_info(m, crtc);
}
+ if (crtc_state->bigjoiner)
+ seq_printf(m, "\tLinked to [CRTC:%d:%s] as a %s\n",
+ crtc_state->bigjoiner_linked_crtc->base.base.id,
+ crtc_state->bigjoiner_linked_crtc->base.name,
+ crtc_state->bigjoiner_slave ? "slave" : "master");
+
for_each_intel_encoder_mask(&dev_priv->drm, encoder,
crtc_state->uapi.encoder_mask)
intel_encoder_info(m, crtc, encoder);
--
2.19.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v10 09/11] drm/i915: Add bigjoiner aware plane clipping checks
From: Maarten Lankhorst
We need to look at hw.fb for the framebuffer, and add the translation
for the slave_plane_state. With these changes we set the correct
rectangle on the bigjoiner slave, and don't set incorrect
src/dst/visibility on the slave plane.
v2:
* Manual rebase (Manasi)
Signed-off-by: Maarten Lankhorst
Signed-off-by: Manasi Navare
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 60 +++
.../gpu/drm/i915/display/intel_atomic_plane.h | 4 ++
drivers/gpu/drm/i915/display/intel_display.c | 19 +++---
drivers/gpu/drm/i915/display/intel_sprite.c | 21 +++
4 files changed, 80 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index a8f1fd85a6c0..09cb3adc36da 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -267,6 +267,9 @@ void intel_plane_copy_uapi_to_hw_state(const struct
intel_crtc_state *crtc_state
plane_state->hw.rotation = from_plane_state->uapi.rotation;
plane_state->hw.color_encoding = from_plane_state->uapi.color_encoding;
plane_state->hw.color_range = from_plane_state->uapi.color_range;
+
+ plane_state->uapi.src = drm_plane_state_src(&from_plane_state->uapi);
+ plane_state->uapi.dst = drm_plane_state_dest(&from_plane_state->uapi);
}
void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
@@ -519,6 +522,63 @@ void i9xx_update_planes_on_crtc(struct intel_atomic_state
*state,
}
}
+int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
+ struct intel_crtc_state *crtc_state,
+ int min_scale, int max_scale,
+ bool can_position)
+{
+ struct drm_framebuffer *fb = plane_state->hw.fb;
+ struct drm_rect *src = &plane_state->uapi.src;
+ struct drm_rect *dst = &plane_state->uapi.dst;
+ unsigned int rotation = plane_state->uapi.rotation;
+ struct drm_rect clip = {};
+ int hscale, vscale;
+
+ if (!fb) {
+ plane_state->uapi.visible = false;
+ return 0;
+ }
+
+ drm_rect_rotate(src, fb->width << 16, fb->height << 16, rotation);
+
+ /* Check scaling */
+ hscale = drm_rect_calc_hscale(src, dst, min_scale, max_scale);
+ vscale = drm_rect_calc_vscale(src, dst, min_scale, max_scale);
+ if (hscale < 0 || vscale < 0) {
+ DRM_DEBUG_KMS("Invalid scaling of plane\n");
+ drm_rect_debug_print("src: ", src, true);
+ drm_rect_debug_print("dst: ", dst, false);
+ return -ERANGE;
+ }
+
+ if (crtc_state->hw.enable) {
+ clip.x2 = crtc_state->pipe_src_w;
+ clip.y2 = crtc_state->pipe_src_h;
+ }
+
+ /* right side of the image is on the slave crtc, adjust dst to match */
+ if (crtc_state->bigjoiner_slave)
+ drm_rect_translate(dst, -crtc_state->pipe_src_w, 0);
+
+ /*
+* FIXME: This might need further adjustment for seamless scaling
+* with phase information, for the 2p2 and 2p1 scenarios.
+*/
+ plane_state->uapi.visible = drm_rect_clip_scaled(src, dst, &clip);
+
+ drm_rect_rotate_inv(src, fb->width << 16, fb->height << 16, rotation);
+
+ if (!can_position && plane_state->uapi.visible &&
+ !drm_rect_equals(dst, &clip)) {
+ DRM_DEBUG_KMS("Plane must cover entire CRTC\n");
+ drm_rect_debug_print("dst: ", dst, false);
+ drm_rect_debug_print("clip: ", &clip, false);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
.prepare_fb = intel_prepare_plane_fb,
.cleanup_fb = intel_cleanup_plane_fb,
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
index c2a1e7c86e6c..d0a599d00ecd 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
@@ -53,6 +53,10 @@ int intel_plane_atomic_calc_changes(const struct
intel_crtc_state *old_crtc_stat
int intel_plane_calc_min_cdclk(struct intel_atomic_state *state,
struct intel_plane *plane,
bool *need_cdclk_calc);
+int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
+ struct intel_crtc_state *crtc_state,
+ int min_scale, int max_scale,
+ bool can_position);
void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915
[Intel-gfx] [PATCH v10 07/11] drm/i915: Make hardware readout work on i915.
From: Maarten Lankhorst
Unfortunately I have no way to test this, but it should be correct
if the bios sets up bigjoiner in a sane way.
Skip iterating over bigjoiner slaves, only the master has the state we
care about.
Add the width of the bigjoiner slave to the reconstructed fb.
Hide the bigjoiner slave to userspace, and double the mode on bigjoiner
master.
And last, disable bigjoiner slave from primary if reconstruction fails.
v2:
* Manual Rebase (Manasi)
Signed-off-by: Maarten Lankhorst
Signed-off-by: Manasi Navare
---
drivers/gpu/drm/i915/display/intel_display.c | 64 +++-
1 file changed, 62 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index faf8bf757bed..aa981aa4f6a1 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3619,6 +3619,8 @@ intel_find_initial_plane_obj(struct intel_crtc
*intel_crtc,
struct intel_plane *intel_plane = to_intel_plane(primary);
struct intel_plane_state *intel_state =
to_intel_plane_state(plane_state);
+struct intel_crtc_state *crtc_state =
+to_intel_crtc_state(intel_crtc->base.state);
struct drm_framebuffer *fb;
struct i915_vma *vma;
@@ -3641,7 +3643,7 @@ intel_find_initial_plane_obj(struct intel_crtc
*intel_crtc,
if (c == &intel_crtc->base)
continue;
- if (!to_intel_crtc(c)->active)
+ if (!to_intel_crtc_state(c->state)->uapi.active)
continue;
state = to_intel_plane_state(c->primary->state);
@@ -3663,6 +3665,11 @@ intel_find_initial_plane_obj(struct intel_crtc
*intel_crtc,
* pretend the BIOS never had it enabled.
*/
intel_plane_disable_noatomic(intel_crtc, intel_plane);
+ if (crtc_state->bigjoiner) {
+ struct intel_crtc *slave =
+ crtc_state->bigjoiner_linked_crtc;
+ intel_plane_disable_noatomic(slave,
to_intel_plane(slave->base.primary));
+ }
return;
@@ -10687,6 +10694,7 @@ static void
skl_get_initial_plane_config(struct intel_crtc *crtc,
struct intel_initial_plane_config *plane_config)
{
+ struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_plane *plane = to_intel_plane(crtc->base.primary);
@@ -10795,6 +10803,18 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
fb->height = ((val >> 16) & 0x) + 1;
fb->width = ((val >> 0) & 0x) + 1;
+ /* add bigjoiner slave as well, if the fb stretches both */
+ if (crtc_state->bigjoiner) {
+ enum pipe bigjoiner_pipe =
crtc_state->bigjoiner_linked_crtc->pipe;
+
+ if (fb->width == crtc_state->pipe_src_w &&
+ (intel_de_read(dev_priv, PLANE_SURF(pipe, plane_id)) &
0xf000) == plane_config->base) {
+ val = intel_de_read(dev_priv,
PLANE_SIZE(bigjoiner_pipe, plane_id));
+ fb->height += ((val >> 16) & 0xfff) + 1;
+ fb->width += ((val >> 0) & 0x1fff) + 1;
+ }
+ }
+
val = intel_de_read(dev_priv, PLANE_STRIDE(pipe, plane_id));
stride_mult = skl_plane_stride_mult(fb, 0, DRM_MODE_ROTATE_0);
fb->pitches[0] = (val & 0x3ff) * stride_mult;
@@ -18793,7 +18813,8 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc,
/* Adjust the state of the output pipe according to whether we
* have active connectors/encoders. */
- if (crtc_state->hw.active && !intel_crtc_has_encoders(crtc))
+ if (crtc_state->hw.active && !intel_crtc_has_encoders(crtc) &&
+ !crtc_state->bigjoiner_slave)
intel_crtc_disable_noatomic(crtc, ctx);
if (crtc_state->hw.active || HAS_GMCH(dev_priv)) {
@@ -19072,6 +19093,9 @@ static void intel_modeset_readout_hw_state(struct
drm_device *dev)
struct intel_plane *plane;
int min_cdclk = 0;
+ if (crtc_state->bigjoiner_slave)
+ continue;
+
if (crtc_state->hw.active) {
struct drm_display_mode mode;
@@ -19096,6 +19120,9 @@ static void intel_modeset_readout_hw_state(struct
drm_device *dev)
mode.hdisplay = crtc_state->pipe_src_w;
mode.vdisplay = crtc_state->pipe_src_h;
+ if (crtc_state->bigjoiner)
+ mode.hdisplay *= 2;
+
intel_crtc_compute_pixel_rate(crtc_state);
intel_crtc_update_active_timings(crtc_state);
@@ -19146,6 +19173,39 @@ static void intel_modeset_readout_hw_state(st
[Intel-gfx] [PATCH v10 06/11] drm/i915: Enable big joiner support in enable and disable sequences.
From: Maarten Lankhorst
Make vdsc work when no output is enabled. The big joiner needs VDSC
on the slave, so enable it and set the appropriate bits.
Also update timestamping constants, because slave crtc's are not
updated in drm_atomic_helper_update_legacy_modeset_state().
This should be enough to bring up CRTC's in a big joiner configuration,
without any plane configuration on the second pipe yet.
HOWEVER, we still bring up the crtc's in the wrong order. We need to
make sure that the master crtc is brought up after the slave crtc.
This is done correctly later in this series.
The next steps are to enable planes correctly, and make sure we enable
and update both master and slave in the correct order.
v2:
* Manual rebase (Manasi)
v3:
* Rebase (Manasi)
v4:
* Rebase (Manasi)
v5:
* Get dsc power domain in ddi_init (Manasi)
v6:
* Remove dsc power put from dsc_disable (Maarten)
v7:
* Rebase (Manasi)
v8:
* Rebase (Manasi)
v9:
* Rebase (Manasi)
Signed-off-by: Maarten Lankhorst
Signed-off-by: Manasi Navare
---
drivers/gpu/drm/i915/display/icl_dsi.c| 2 -
drivers/gpu/drm/i915/display/intel_ddi.c | 68 ++-
drivers/gpu/drm/i915/display/intel_display.c | 392 --
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 6 +-
drivers/gpu/drm/i915/display/intel_vdsc.c | 201 -
drivers/gpu/drm/i915/display/intel_vdsc.h | 7 +-
7 files changed, 421 insertions(+), 256 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index 4400e83f783f..be8756816650 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1492,8 +1492,6 @@ static void gen11_dsi_get_config(struct intel_encoder
*encoder,
struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
- intel_dsc_get_config(encoder, pipe_config);
-
/* FIXME: adapt icl_ddi_clock_get() for DSI and use that? */
pipe_config->port_clock = intel_dpll_get_freq(i915,
pipe_config->shared_dpll);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index bbd5f04dc140..6b2c09effbdd 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -28,6 +28,7 @@
#include
#include "i915_drv.h"
+#include "i915_trace.h"
#include "intel_audio.h"
#include "intel_combo_phy.h"
#include "intel_connector.h"
@@ -2217,12 +2218,6 @@ static void intel_ddi_get_power_domains(struct
intel_encoder *encoder,
intel_display_power_get(dev_priv,
intel_ddi_main_link_aux_domain(dig_port));
- /*
-* VDSC power is needed when DSC is enabled
-*/
- if (crtc_state->dsc.compression_enable)
- intel_display_power_get(dev_priv,
- intel_dsc_power_domain(crtc_state));
}
void intel_ddi_enable_pipe_clock(struct intel_encoder *encoder,
@@ -3507,7 +3502,8 @@ static void tgl_ddi_pre_enable_dp(struct
intel_atomic_state *state,
/* 7.l Configure and enable FEC if needed */
intel_ddi_enable_fec(encoder, crtc_state);
- intel_dsc_enable(encoder, crtc_state);
+ if (!crtc_state->bigjoiner)
+ intel_dsc_enable(encoder, crtc_state);
}
static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
@@ -3579,7 +3575,8 @@ static void hsw_ddi_pre_enable_dp(struct
intel_atomic_state *state,
if (!is_mst)
intel_ddi_enable_pipe_clock(encoder, crtc_state);
- intel_dsc_enable(encoder, crtc_state);
+ if (!crtc_state->bigjoiner)
+ intel_dsc_enable(encoder, crtc_state);
}
static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
@@ -3828,6 +3825,21 @@ static void intel_ddi_post_disable(struct
intel_atomic_state *state,
ilk_pfit_disable(old_crtc_state);
}
+ if (old_crtc_state->bigjoiner_linked_crtc) {
+ struct intel_atomic_state *state =
+ to_intel_atomic_state(old_crtc_state->uapi.state);
+ struct intel_crtc *slave =
+ old_crtc_state->bigjoiner_linked_crtc;
+ const struct intel_crtc_state *old_slave_crtc_state =
+ intel_atomic_get_old_crtc_state(state, slave);
+
+ intel_crtc_vblank_off(old_slave_crtc_state);
+ trace_intel_pipe_disable(slave);
+
+ intel_dsc_disable(old_slave_crtc_state);
+ skl_scaler_disable(old_slave_crtc_state);
+ }
+
/*
* When called from DP MST code:
* - old_conn_state will be NULL
@@ -4044,7 +4056,8 @@ static void intel_enable_ddi(struct intel_atomic_state
*state,
{
drm_WARN_ON(
[Intel-gfx] [PATCH v10 10/11] drm/i915: Ensure correct master/slave enable/disable sequence
From: Maarten Lankhorst
Enabling is done in a special sequence and so should plane updates
be. Ideally the end user never notices the second pipe is used.
This way ideally everything will be tear free, and updates are
really atomic as userspace expects it.
This uses generic modeset_enables() calls like trans port sync
but still has special handling for disable since for slave we
should not disable things like encoder, plls that are not enabled
for slave.
v3:
* Fixes in enable and disable sequence from testing (Manasi)
v2:
* Manual Rebase (Manasi)
* Refactoring on intel_update_crtc and enable_crtc and removing
special trans_port_sync_update (Manasi)
Signed-off-by: Maarten Lankhorst
Signed-off-by: Manasi Navare
---
drivers/gpu/drm/i915/display/intel_display.c | 55 ++--
drivers/gpu/drm/i915/display/intel_sprite.c | 5 +-
2 files changed, 43 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 357cc2bce300..101ddd0b48ab 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15878,6 +15878,9 @@ static void intel_enable_crtc(struct intel_atomic_state
*state,
dev_priv->display.crtc_enable(state, crtc);
+ if (new_crtc_state->bigjoiner_slave)
+ return;
+
/* vblanks work again, re-enable pipe CRC. */
intel_crtc_enable_pipe_crc(crtc);
}
@@ -15914,9 +15917,7 @@ static void intel_update_crtc(struct intel_atomic_state
*state,
commit_pipe_config(state, crtc);
- if (new_crtc_state->bigjoiner) {
- /* Not supported yet */
- } else if (INTEL_GEN(dev_priv) >= 9)
+ if (INTEL_GEN(dev_priv) >= 9)
skl_update_planes_on_crtc(state, crtc);
else
i9xx_update_planes_on_crtc(state, crtc);
@@ -15945,9 +15946,17 @@ static void intel_old_crtc_state_disables(struct
intel_atomic_state *state,
drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
intel_crtc_disable_planes(state, crtc);
- if (old_crtc_state->bigjoiner)
+
+ /*
+* We still need special handling for disabling bigjoiner master
+* and slaves since for slave we do not have encoder or plls
+* so we dont need to disable those.
+*/
+ if (old_crtc_state->bigjoiner) {
intel_crtc_disable_planes(state,
old_crtc_state->bigjoiner_linked_crtc);
+ old_crtc_state->bigjoiner_linked_crtc->active = false;
+ }
/*
* We need to disable pipe CRC before disabling the pipe,
@@ -15977,7 +15986,7 @@ static void intel_commit_modeset_disables(struct
intel_atomic_state *state)
/* Only disable port sync and MST slaves */
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
- if (!needs_modeset(new_crtc_state) ||
old_crtc_state->bigjoiner_slave)
+ if (!needs_modeset(new_crtc_state) || old_crtc_state->bigjoiner)
continue;
if (!old_crtc_state->hw.active)
@@ -16040,6 +16049,7 @@ static void skl_commit_modeset_enables(struct
intel_atomic_state *state)
struct intel_crtc *crtc;
struct intel_crtc_state *old_crtc_state, *new_crtc_state;
struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
+ struct skl_ddb_entry new_entries[I915_MAX_PIPES] = {};
u8 update_pipes = 0, modeset_pipes = 0;
int i;
@@ -16056,6 +16066,14 @@ static void skl_commit_modeset_enables(struct
intel_atomic_state *state)
} else {
modeset_pipes |= BIT(pipe);
}
+
+ new_entries[i] = new_crtc_state->wm.skl.ddb;
+
+ /* ignore allocations for crtc's that have been turned off
during modeset. */
+ if (needs_modeset(new_crtc_state))
+ continue;
+
+ entries[i] = old_crtc_state->wm.skl.ddb;
}
/*
@@ -16071,28 +16089,28 @@ static void skl_commit_modeset_enables(struct
intel_atomic_state *state)
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
enum pipe pipe = crtc->pipe;
+ bool ddb_changed;
if ((update_pipes & BIT(pipe)) == 0)
continue;
- if
(skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
+ if (skl_ddb_allocation_overlaps(&new_entries[pipe],
entries,
I915_MAX_PIPES, pipe))
continue;
- entries[pipe] = new_crtc_state->wm.skl.ddb;
+ ddb_changed
[Intel-gfx] [PATCH v10 04/11] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3.
From: Maarten Lankhorst
Small changes to intel_dp_mode_valid(), allow listing modes that
can only be supported in the bigjoiner configuration, which is
not supported yet.
eDP does not support bigjoiner, so do not expose bigjoiner only
modes on the eDP port.
v7:
* Add can_bigjoiner() helper (Ville)
* Pass bigjoiner to plane_size validation (Ville)
v6:
* Rebase after dp_downstream mode valid changes (Manasi)
v5:
* Increase max plane width to support 8K with bigjoiner (Maarten)
v4:
* Rebase (Manasi)
Changes since v1:
- Disallow bigjoiner on eDP.
Changes since v2:
- Rename intel_dp_downstream_max_dotclock to intel_dp_max_dotclock,
and split off the downstream and source checking to its own function.
(Ville)
v3:
* Rebase (Manasi)
Signed-off-by: Manasi Navare
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_display.c | 5 +-
drivers/gpu/drm/i915/display/intel_display.h | 3 +-
drivers/gpu/drm/i915/display/intel_dp.c | 126 +++
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
drivers/gpu/drm/i915/display/intel_dsi.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdmi.c| 2 +-
6 files changed, 111 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 723766b1eae3..cc540c7b7dcd 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -17642,7 +17642,8 @@ intel_mode_valid(struct drm_device *dev,
enum drm_mode_status
intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
- const struct drm_display_mode *mode)
+ const struct drm_display_mode *mode,
+ bool bigjoiner)
{
int plane_width_max, plane_height_max;
@@ -17659,7 +17660,7 @@ intel_mode_valid_max_plane_size(struct drm_i915_private
*dev_priv,
* too big for that.
*/
if (INTEL_GEN(dev_priv) >= 11) {
- plane_width_max = 5120;
+ plane_width_max = 5120 << bigjoiner;
plane_height_max = 4320;
} else {
plane_width_max = 5120;
diff --git a/drivers/gpu/drm/i915/display/intel_display.h
b/drivers/gpu/drm/i915/display/intel_display.h
index d10b7c8cde3f..3d860a9da8fe 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -496,7 +496,8 @@ u32 intel_plane_fb_max_stride(struct drm_i915_private
*dev_priv,
bool intel_plane_can_remap(const struct intel_plane_state *plane_state);
enum drm_mode_status
intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
- const struct drm_display_mode *mode);
+ const struct drm_display_mode *mode,
+ bool bigjoiner);
enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port);
bool is_trans_port_sync_mode(const struct intel_crtc_state *state);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 8a522edd7386..af2ff425e5d5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -247,6 +247,29 @@ intel_dp_max_data_rate(int max_link_clock, int max_lanes)
return max_link_clock * max_lanes;
}
+static int source_max_dotclock(struct intel_dp *intel_dp, bool allow_bigjoiner)
+{
+ struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+ struct intel_encoder *encoder = &intel_dig_port->base;
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+
+ if (allow_bigjoiner && INTEL_GEN(dev_priv) >= 11 &&
!intel_dp_is_edp(intel_dp))
+ return 2 * dev_priv->max_dotclk_freq;
+
+ return dev_priv->max_dotclk_freq;
+}
+
+static int
+intel_dp_max_dotclock(struct intel_dp *intel_dp, bool allow_bigjoiner)
+{
+ int max_dotclk = source_max_dotclock(intel_dp, allow_bigjoiner);
+
+ if (intel_dp->dfp.max_dotclock)
+ return min(max_dotclk, intel_dp->dfp.max_dotclock);
+
+ return max_dotclk;
+}
+
static int cnl_max_source_rate(struct intel_dp *intel_dp)
{
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
@@ -512,7 +535,8 @@ small_joiner_ram_size_bits(struct drm_i915_private *i915)
static u16 intel_dp_dsc_get_output_bpp(struct drm_i915_private *i915,
u32 link_clock, u32 lane_count,
- u32 mode_clock, u32 mode_hdisplay)
+ u32 mode_clock, u32 mode_hdisplay,
+ bool bigjoiner)
{
u32 bits_per_pixel, max_bpp_small_joiner_ram;
int i;
@@ -530,6 +554,10 @@ static u16 intel_dp_dsc_get_output_bpp(struct
drm_i915_private *i915,
/* Small Joiner Check: output bpp <= joiner RAM (bits) / Horiz.
[Intel-gfx] [PATCH v10 08/11] drm/i915: Link planes in a bigjoiner configuration, v3.
From: Maarten Lankhorst
Make sure that when a plane is set in a bigjoiner mode, we will add
their counterpart to the atomic state as well. This will allow us to
make sure all state is available when planes are checked.
Because of the funny interactions with bigjoiner and planar YUV
formats, we may end up adding a lot of planes, so we have to keep
iterating until we no longer add any planes.
Also fix the atomic intel plane iterator, so things watermarks start
working automagically.
v6:
* Fix from_plane_state assignments (Manasi)
v5:
* Rebase after adding sagv support (Manasi)
v4:
* Manual rebase (Manasi)
Changes since v1:
- Rebase on top of plane_state split, cleaning up the code a lot.
- Make intel_atomic_crtc_state_for_each_plane_state() bigjoiner capable.
- Add iter macro to intel_atomic_crtc_state_for_each_plane_state() to
keep iteration working.
Changes since v2:
- Add icl_(un)set_bigjoiner_plane_links, to make it more clear where
links are made and broken.
Signed-off-by: Maarten Lankhorst
Signed-off-by: Manasi Navare
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 53 -
.../gpu/drm/i915/display/intel_atomic_plane.h | 3 +-
drivers/gpu/drm/i915/display/intel_display.c | 207 --
drivers/gpu/drm/i915/display/intel_display.h | 20 +-
.../drm/i915/display/intel_display_types.h| 11 +
drivers/gpu/drm/i915/intel_pm.c | 20 +-
6 files changed, 274 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 6bd8e6cdd477..a8f1fd85a6c0 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -246,12 +246,17 @@ static void intel_plane_clear_hw_state(struct
intel_plane_state *plane_state)
memset(&plane_state->hw, 0, sizeof(plane_state->hw));
}
-void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
+void intel_plane_copy_uapi_to_hw_state(const struct intel_crtc_state
*crtc_state,
+ struct intel_plane_state *plane_state,
const struct intel_plane_state
*from_plane_state)
{
intel_plane_clear_hw_state(plane_state);
- plane_state->hw.crtc = from_plane_state->uapi.crtc;
+ if (from_plane_state->uapi.crtc)
+ plane_state->hw.crtc = crtc_state->uapi.crtc;
+ else
+ plane_state->hw.crtc = NULL;
+
plane_state->hw.fb = from_plane_state->uapi.fb;
if (plane_state->hw.fb)
drm_framebuffer_get(plane_state->hw.fb);
@@ -319,15 +324,36 @@ int intel_plane_atomic_check_with_state(const struct
intel_crtc_state *old_crtc_
}
static struct intel_crtc *
-get_crtc_from_states(const struct intel_plane_state *old_plane_state,
+get_crtc_from_states(struct intel_atomic_state *state,
+const struct intel_plane_state *old_plane_state,
const struct intel_plane_state *new_plane_state)
{
+ struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
+
if (new_plane_state->uapi.crtc)
return to_intel_crtc(new_plane_state->uapi.crtc);
if (old_plane_state->uapi.crtc)
return to_intel_crtc(old_plane_state->uapi.crtc);
+ if (new_plane_state->bigjoiner_slave) {
+ const struct intel_plane_state *new_master_plane_state =
+ intel_atomic_get_new_plane_state(state,
new_plane_state->bigjoiner_plane);
+
+ /* need to use uapi here, new_master_plane_state might not be
copied to hw yet */
+ if (new_master_plane_state->uapi.crtc)
+ return intel_get_crtc_for_pipe(dev_priv, plane->pipe);
+ }
+
+ if (old_plane_state->bigjoiner_slave) {
+ const struct intel_plane_state *old_master_plane_state =
+ intel_atomic_get_old_plane_state(state,
old_plane_state->bigjoiner_plane);
+
+ if (old_master_plane_state->uapi.crtc)
+ return intel_get_crtc_for_pipe(dev_priv, plane->pipe);
+ }
+
return NULL;
}
@@ -338,18 +364,33 @@ int intel_plane_atomic_check(struct intel_atomic_state
*state,
intel_atomic_get_new_plane_state(state, plane);
const struct intel_plane_state *old_plane_state =
intel_atomic_get_old_plane_state(state, plane);
+ const struct intel_plane_state *new_master_plane_state;
struct intel_crtc *crtc =
- get_crtc_from_states(old_plane_state, new_plane_state);
+ get_crtc_from_states(state, old_plane_state,
+new_plane_state);
const struct intel_crtc_state *old_crtc_state;
struct intel_crtc_state *new_crtc_state;
- intel_plane_copy_uapi_to_hw_state(
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/3] drm/i915/vbt: Fix backlight parsing for VBT 234+
== Series Details ==
Series: series starting with [v3,1/3] drm/i915/vbt: Fix backlight parsing for
VBT 234+
URL : https://patchwork.freedesktop.org/series/82482/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18661
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/index.html
Known issues
Here are the changes found in Patchwork_18661 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_module_load@reload:
- fi-apl-guc: [PASS][1] -> [DMESG-WARN][2] ([i915#1635] /
[i915#1982]) +1 similar issue
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-apl-guc/igt@i915_module_l...@reload.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/fi-apl-guc/igt@i915_module_l...@reload.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-bsw-kefka: [PASS][3] -> [DMESG-WARN][4] ([i915#1982])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
- fi-icl-u2: [PASS][5] -> [DMESG-WARN][6] ([i915#1982])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@c-edp1.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@c-edp1.html
Possible fixes
* {igt@core_hotunplug@unbind-rebind}:
- fi-icl-y: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
* igt@gem_exec_suspend@basic-s3:
- fi-skl-lmem:[INCOMPLETE][9] ([i915#198]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: [DMESG-WARN][11] ([i915#1982]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
* igt@kms_busy@basic@flip:
- {fi-tgl-dsi}: [DMESG-WARN][13] ([i915#1982]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-bsw-n3050: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-bsw-n3050/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/fi-bsw-n3050/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
- {fi-kbl-7560u}: [DMESG-WARN][17] ([i915#1982]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-7560u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/fi-kbl-7560u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
- fi-icl-u2: [DMESG-WARN][19] ([i915#1982]) -> [PASS][20]
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
Warnings
* igt@gem_exec_suspend@basic-s0:
- fi-kbl-x1275: [DMESG-WARN][21] ([i915#62] / [i915#92]) ->
[DMESG-WARN][22] ([i915#1982] / [i915#62] / [i915#92] / [i915#95])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@gem_exec_susp...@basic-s0.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/fi-kbl-x1275/igt@gem_exec_susp...@basic-s0.html
* igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275: [DMESG-FAIL][23] ([i915#62]) -> [DMESG-FAIL][24]
([i915#62] / [i915#95])
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
* igt@km
[Intel-gfx] [PATCH i-g-t] prime_vgem: Check that we wrap the vgem mmap with userptr
This came up in a discussion about importing virtio dma-buf, which are
themselves plain shmemfs objects and so not only backed by struct pages,
but wrappable by userptr. vgem share the same properties and so should
serve as a useful proxy for testing.
Signed-off-by: Chris Wilson
Cc: "Graunke, Kenneth W" ,
Cc: "Lahtinen, Joonas"
Cc: "Kondapally, Kalyan"
---
tests/intel-ci/fast-feedback.testlist | 1 +
tests/prime_vgem.c| 42 +++
2 files changed, 43 insertions(+)
diff --git a/tests/intel-ci/fast-feedback.testlist
b/tests/intel-ci/fast-feedback.testlist
index aa2eb3295..982d25834 100644
--- a/tests/intel-ci/fast-feedback.testlist
+++ b/tests/intel-ci/fast-feedback.testlist
@@ -143,6 +143,7 @@ igt@prime_vgem@basic-fence-read
igt@prime_vgem@basic-gtt
igt@prime_vgem@basic-read
igt@prime_vgem@basic-write
+igt@prime_vgem@basic-userptr
igt@vgem_basic@setversion
igt@vgem_basic@create
igt@vgem_basic@debugfs
diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
index 38e2026aa..425bba8fb 100644
--- a/tests/prime_vgem.c
+++ b/tests/prime_vgem.c
@@ -287,6 +287,45 @@ static void test_write(int vgem, int i915)
munmap(ptr, scratch.size);
}
+static uint32_t batch_create(int i915)
+{
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ uint32_t handle;
+
+ handle = gem_create(i915, 4096);
+ gem_write(i915, handle, 0, &bbe, sizeof(bbe));
+
+ return handle;
+}
+
+static void test_userptr(int vgem, int i915)
+{
+ struct vgem_bo scratch;
+ struct drm_i915_gem_exec_object2 obj[2] = {};
+ struct drm_i915_gem_execbuffer2 execbuf = {
+ .buffers_ptr = to_user_pointer(obj),
+ .buffer_count = ARRAY_SIZE(obj),
+ };
+ uint32_t *ptr;
+
+ scratch.width = 1024;
+ scratch.height = 1024;
+ scratch.bpp = 32;
+ vgem_create(vgem, &scratch);
+
+ ptr = vgem_mmap(vgem, &scratch, PROT_WRITE);
+ gem_close(vgem, scratch.handle);
+
+ gem_userptr(i915, (uint32_t *)ptr, scratch.size, 0, 0, &obj[0].handle);
+ obj[1].handle = batch_create(i915);
+
+ gem_execbuf(i915, &execbuf);
+ gem_close(i915, obj[1].handle);
+ gem_close(i915, obj[0].handle);
+
+ munmap(ptr, scratch.size);
+}
+
static void test_gtt(int vgem, int i915)
{
struct vgem_bo scratch;
@@ -1038,6 +1077,9 @@ igt_main
igt_subtest("basic-write")
test_write(vgem, i915);
+ igt_subtest("basic-userptr")
+ test_userptr(vgem, i915);
+
igt_subtest("basic-gtt") {
gem_require_mappable_ggtt(i915);
test_gtt(vgem, i915);
--
2.28.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v10,01/11] HAX to make DSC work on the icelake test system
== Series Details ==
Series: series starting with [v10,01/11] HAX to make DSC work on the icelake
test system
URL : https://patchwork.freedesktop.org/series/82483/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
999aa92a11f0 HAX to make DSC work on the icelake test system
870138d57034 drm/i915/display: Rename pipe_timings to transcoder_timings
-:11: WARNING:TYPO_SPELLING: 'halfs' may be misspelled - perhaps 'halves'?
#11:
With Bigjoiner, there are 2 pipes driving 2 halfs of 1
total: 0 errors, 1 warnings, 0 checks, 82 lines checked
d7eab67d7a38 drm/i915: Add hw.pipe_mode to allow bigjoiner pipe/transcoder split
-:7: WARNING:TYPO_SPELLING: 'halfs' may be misspelled - perhaps 'halves'?
#7:
With bigjoiner, there will be 2 pipes driving 2 halfs of 1 transcoder,
-:134: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#134: FILE: drivers/gpu/drm/i915/display/intel_display.c:13355:
+ crtc_state->hw.pipe_mode = crtc_state->hw.adjusted_mode =
crtc_state->uapi.adjusted_mode;
total: 0 errors, 1 warnings, 1 checks, 364 lines checked
03231e226425 drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3.
0f128ffd6e7b drm/i915: Try to make bigjoiner work in atomic check
-:145: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#145: FILE: drivers/gpu/drm/i915/display/intel_display.c:13367:
+
crtc_state->bigjoiner_linked_crtc);
-:205: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#205: FILE: drivers/gpu/drm/i915/display/intel_display.c:13438:
+ crtc_state->nv12_planes = crtc_state->c8_planes =
crtc_state->update_planes = 0;
-:300: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#300: FILE: drivers/gpu/drm/i915/display/intel_display.c:15045:
+ slave = new_crtc_state->bigjoiner_linked_crtc =
-:334: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#334: FILE: drivers/gpu/drm/i915/display/intel_display.c:15079:
+ slave_crtc_state->bigjoiner = master_crtc_state->bigjoiner =
false;
-:335: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#335: FILE: drivers/gpu/drm/i915/display/intel_display.c:15080:
+ slave_crtc_state->bigjoiner_slave =
master_crtc_state->bigjoiner_slave = false;
-:336: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#336: FILE: drivers/gpu/drm/i915/display/intel_display.c:15081:
+ slave_crtc_state->bigjoiner_linked_crtc =
master_crtc_state->bigjoiner_linked_crtc = NULL;
-:336: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#336: FILE: drivers/gpu/drm/i915/display/intel_display.c:15081:
+ slave_crtc_state->bigjoiner_linked_crtc =
master_crtc_state->bigjoiner_linked_crtc = NULL;
-:391: WARNING:BRACES: braces {} are not necessary for any arm of this statement
#391: FILE: drivers/gpu/drm/i915/display/intel_display.c:15615:
+ if (new_crtc_state->bigjoiner) {
[...]
+ } else if (INTEL_GEN(dev_priv) >= 9)
[...]
else
[...]
total: 0 errors, 3 warnings, 5 checks, 403 lines checked
8b2c9eaf5fbf drm/i915: Enable big joiner support in enable and disable
sequences.
-:186: WARNING:LONG_LINE_COMMENT: line length of 106 exceeds 100 columns
#186: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:4534:
+ /* Our own transcoder needs to be disabled when reading it in
intel_ddi_read_func_ctl() */
-:188: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#188: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:4536:
+ pipe_config->cpu_transcoder = (enum
transcoder)pipe_config->bigjoiner_linked_crtc->pipe;
-:839: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#839: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:841:
+#define PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE (1<<1) /* bigjoiner slave,
partial readout */
^
total: 0 errors, 2 warnings, 1 checks, 1033 lines checked
9bf5d4cad324 drm/i915: Make hardware readout work on i915.
-:33: WARNING:TABSTOP: Statements should start on a tabstop
#33: FILE: drivers/gpu/drm/i915/display/intel_display.c:3622:
+struct intel_crtc_state *crtc_state =
-:76: WARNING:LONG_LINE: line length of 111 exceeds 100 columns
#76: FILE: drivers/gpu/drm/i915/display/intel_display.c:10811:
+ (intel_de_read(dev_priv, PLANE_SURF(pipe, plane_id)) &
0xf000) == plane_config->base) {
total: 0 errors, 2 warnings, 0 checks, 118 lines checked
6f55653a6e1f drm/i915: Link planes in a bigjoiner configuration, v3.
-:206: ERROR:CODE_INDENT: code indent should use tabs where possible
#206: FILE: drivers/gpu/drm/i915/display/intel_display.c:12752:
+ * Setup and teardown the new bigjoiner plane mappings.$
-:207: ERROR:CODE_INDENT: code indent should use tabs where possible
#207: FILE: drivers/gpu/drm/i915/display/intel_display.c:12753:
+ */$
-:292:
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v10,01/11] HAX to make DSC work on the icelake test system
== Series Details == Series: series starting with [v10,01/11] HAX to make DSC work on the icelake test system URL : https://patchwork.freedesktop.org/series/82483/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1019:47:expected unsigned int [addressable] [usertype] ulClockParams +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1019:47:got restricted __le32 [usertype] +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1019:47: warning: incorrect type in assignment (different base types) +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1028:50: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1029:49: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1037:47: warning: too many warnings +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:184:44: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:283:14: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:320:14: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:323:14: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:326:14: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:329:18: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:330:26: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:338:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:340:38: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:342:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:346:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:348:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:353:33: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:367:43: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:369:38: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:374:67: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:375:53: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:378:66: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:389:80: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:395:57: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:402:69: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:403:53: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:406:66: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:414:66: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:423:69: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:424:69: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:473:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:476:45: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:477:45: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:484:54: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:52:28: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:531:35: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:53:29: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:533:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:54:26: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:55:27: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:56:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:57:26: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:577:21: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:581:25: warning: cast to restricted __le32 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:58:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:583:21: warning: cast to restricted __le32 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:586:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:590:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:59:26: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:
[Intel-gfx] [PATCH i-g-t v2] prime_vgem: Check that we wrap the vgem mmap with userptr
This came up in a discussion about importing virtio dma-buf, which are
themselves plain shmemfs objects and so not only backed by struct pages,
but wrappable by userptr. vgem share the same properties and so should
serve as a useful proxy for testing.
Signed-off-by: Chris Wilson
Cc: "Graunke, Kenneth W" ,
Cc: "Lahtinen, Joonas"
Cc: "Kondapally, Kalyan"
---
v2: Reuse the imported vgem as the batch, to truly test whether we
acquire the right pages.
---
tests/intel-ci/fast-feedback.testlist | 1 +
tests/prime_vgem.c| 29 +++
2 files changed, 30 insertions(+)
diff --git a/tests/intel-ci/fast-feedback.testlist
b/tests/intel-ci/fast-feedback.testlist
index aa2eb3295..982d25834 100644
--- a/tests/intel-ci/fast-feedback.testlist
+++ b/tests/intel-ci/fast-feedback.testlist
@@ -143,6 +143,7 @@ igt@prime_vgem@basic-fence-read
igt@prime_vgem@basic-gtt
igt@prime_vgem@basic-read
igt@prime_vgem@basic-write
+igt@prime_vgem@basic-userptr
igt@vgem_basic@setversion
igt@vgem_basic@create
igt@vgem_basic@debugfs
diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
index 38e2026aa..3a39657e4 100644
--- a/tests/prime_vgem.c
+++ b/tests/prime_vgem.c
@@ -287,6 +287,32 @@ static void test_write(int vgem, int i915)
munmap(ptr, scratch.size);
}
+static void test_userptr(int vgem, int i915)
+{
+ struct vgem_bo scratch;
+ struct drm_i915_gem_exec_object2 obj = {};
+ struct drm_i915_gem_execbuffer2 execbuf = {
+ .buffers_ptr = to_user_pointer(&obj),
+ .buffer_count = 1,
+ };
+ uint32_t *ptr;
+
+ scratch.width = 1024;
+ scratch.height = 1024;
+ scratch.bpp = 32;
+ vgem_create(vgem, &scratch);
+
+ ptr = vgem_mmap(vgem, &scratch, PROT_WRITE);
+ gem_close(vgem, scratch.handle);
+ *ptr = MI_BATCH_BUFFER_END;
+
+ gem_userptr(i915, ptr, scratch.size, 0, 0, &obj.handle);
+ gem_execbuf(i915, &execbuf);
+ gem_close(i915, obj.handle);
+
+ munmap(ptr, scratch.size);
+}
+
static void test_gtt(int vgem, int i915)
{
struct vgem_bo scratch;
@@ -1038,6 +1064,9 @@ igt_main
igt_subtest("basic-write")
test_write(vgem, i915);
+ igt_subtest("basic-userptr")
+ test_userptr(vgem, i915);
+
igt_subtest("basic-gtt") {
gem_require_mappable_ggtt(i915);
test_gtt(vgem, i915);
--
2.28.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH][next] drm/i915/display: Use fallthrough pseudo-keyword
In order to enable -Wimplicit-fallthrough for Clang[1], replace the
existing /* fall through */ comments with the new pseudo-keyword
macro fallthrough[2].
[1] https://git.kernel.org/linus/e2079e93f562c7f7a030eb7642017ee5eabaaa10
[2]
https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through
Signed-off-by: Gustavo A. R. Silva
---
drivers/gpu/drm/i915/display/intel_ddi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 4d06178cd76c..2941051ac3e1 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1090,7 +1090,7 @@ ehl_get_combo_buf_trans(struct intel_encoder *encoder,
int type, int rate,
return icl_combo_phy_ddi_translations_edp_hbr2;
}
}
- /* fall through */
+ fallthrough;
default:
/* All combo DP and eDP ports that do not support low_vswing */
*n_entries = ARRAY_SIZE(ehl_combo_phy_ddi_translations_dp);
@@ -1126,7 +1126,7 @@ tgl_get_combo_buf_trans(struct intel_encoder *encoder,
int type, int rate,
*n_entries =
ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr2);
return icl_combo_phy_ddi_translations_edp_hbr2;
}
- /* fall through */
+ fallthrough;
default:
/* All combo DP and eDP ports that do not support low_vswing */
if (rate > 27) {
--
2.27.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v10,01/11] HAX to make DSC work on the icelake test system
== Series Details ==
Series: series starting with [v10,01/11] HAX to make DSC work on the icelake
test system
URL : https://patchwork.freedesktop.org/series/82483/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18662
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/index.html
Known issues
Here are the changes found in Patchwork_18662 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_pm_rpm@module-reload:
- fi-bsw-n3050: [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-bsw-n3050/igt@i915_pm_...@module-reload.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/fi-bsw-n3050/igt@i915_pm_...@module-reload.html
- fi-bxt-dsi: [PASS][3] -> [DMESG-WARN][4] ([i915#1635] /
[i915#1982])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-bxt-dsi/igt@i915_pm_...@module-reload.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/fi-bxt-dsi/igt@i915_pm_...@module-reload.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-icl-u2: [PASS][5] -> [DMESG-WARN][6] ([i915#1982])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
Possible fixes
* {igt@core_hotunplug@unbind-rebind}:
- fi-icl-y: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/fi-icl-y/igt@core_hotunp...@unbind-rebind.html
* igt@gem_exec_suspend@basic-s3:
- fi-skl-lmem:[INCOMPLETE][9] ([i915#198]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/fi-skl-lmem/igt@gem_exec_susp...@basic-s3.html
* igt@kms_busy@basic@flip:
- fi-kbl-x1275: [DMESG-WARN][11] ([i915#62] / [i915#92] / [i915#95])
-> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-bsw-n3050: [DMESG-WARN][13] ([i915#1982]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-bsw-n3050/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/fi-bsw-n3050/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@vgem_basic@unload:
- fi-skl-guc: [DMESG-WARN][15] ([i915#2203]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-guc/igt@vgem_ba...@unload.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/fi-skl-guc/igt@vgem_ba...@unload.html
Warnings
* igt@gem_exec_suspend@basic-s0:
- fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92]) ->
[DMESG-WARN][18] ([i915#62] / [i915#92] / [i915#95]) +2 similar issues
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@gem_exec_susp...@basic-s0.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/fi-kbl-x1275/igt@gem_exec_susp...@basic-s0.html
* igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275: [DMESG-FAIL][19] ([i915#62]) -> [SKIP][20]
([fdo#109271])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-kbl-x1275: [DMESG-WARN][21] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][22] ([i915#62] / [i915#92]) +6 similar issues
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_force_connector_ba...@prune-stale-modes.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/fi-kbl-x1275/igt@kms_force_connector_ba...@prune-stale-modes.html
* igt@vgem_basic@unload:
- fi-kbl-x1275: [DMESG-WARN][23] ([i915#62] / [i915#92]) ->
[DMESG-WARN][24] ([i915#95])
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@vgem_ba...@unload.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/fi-kbl-x1275/igt@vgem_ba...@unload.html
{name}: This element is sup
[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/display: Use fallthrough pseudo-keyword
== Series Details == Series: drm/i915/display: Use fallthrough pseudo-keyword URL : https://patchwork.freedesktop.org/series/82486/ State : failure == Summary == Applying: drm/i915/display: Use fallthrough pseudo-keyword Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/display/intel_ddi.c Falling back to patching base and 3-way merge... Auto-merging drivers/gpu/drm/i915/display/intel_ddi.c CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/display/intel_ddi.c error: Failed to merge in the changes. hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0001 drm/i915/display: Use fallthrough pseudo-keyword When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v3] prime_vgem: Check that we wrap the vgem mmap with userptr
This came up in a discussion about importing virtio dma-buf, which are
themselves plain shmemfs objects and so not only backed by struct pages,
but wrappable by userptr. vgem share the same properties and so should
serve as a useful proxy for testing.
Signed-off-by: Chris Wilson
Cc: "Graunke, Kenneth W" ,
Cc: "Lahtinen, Joonas"
Cc: "Kondapally, Kalyan"
---
tests/intel-ci/fast-feedback.testlist | 1 +
tests/prime_vgem.c| 31 +++
2 files changed, 32 insertions(+)
diff --git a/tests/intel-ci/fast-feedback.testlist
b/tests/intel-ci/fast-feedback.testlist
index aa2eb3295..982d25834 100644
--- a/tests/intel-ci/fast-feedback.testlist
+++ b/tests/intel-ci/fast-feedback.testlist
@@ -143,6 +143,7 @@ igt@prime_vgem@basic-fence-read
igt@prime_vgem@basic-gtt
igt@prime_vgem@basic-read
igt@prime_vgem@basic-write
+igt@prime_vgem@basic-userptr
igt@vgem_basic@setversion
igt@vgem_basic@create
igt@vgem_basic@debugfs
diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
index 38e2026aa..bc74d6844 100644
--- a/tests/prime_vgem.c
+++ b/tests/prime_vgem.c
@@ -287,6 +287,34 @@ static void test_write(int vgem, int i915)
munmap(ptr, scratch.size);
}
+static void test_userptr(int vgem, int i915)
+{
+ struct vgem_bo scratch;
+ struct drm_i915_gem_exec_object2 obj = {};
+ struct drm_i915_gem_execbuffer2 execbuf = {
+ .buffers_ptr = to_user_pointer(&obj),
+ .buffer_count = 1,
+ };
+ uint32_t *ptr;
+
+ scratch.width = 1024;
+ scratch.height = 1024;
+ scratch.bpp = 32;
+ vgem_create(vgem, &scratch);
+
+ ptr = vgem_mmap(vgem, &scratch, PROT_WRITE);
+ gem_close(vgem, scratch.handle);
+ *ptr = MI_BATCH_BUFFER_END;
+
+ gem_userptr(i915, ptr, scratch.size, 0, 0, &obj.handle);
+ gem_set_caching(i915, obj.handle, I915_CACHING_NONE); /* for exec */
+
+ gem_execbuf(i915, &execbuf);
+ gem_close(i915, obj.handle);
+
+ munmap(ptr, scratch.size);
+}
+
static void test_gtt(int vgem, int i915)
{
struct vgem_bo scratch;
@@ -1038,6 +1066,9 @@ igt_main
igt_subtest("basic-write")
test_write(vgem, i915);
+ igt_subtest("basic-userptr")
+ test_userptr(vgem, i915);
+
igt_subtest("basic-gtt") {
gem_require_mappable_ggtt(i915);
test_gtt(vgem, i915);
--
2.28.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v3,1/3] drm/i915/vbt: Fix backlight parsing for VBT 234+
== Series Details == Series: series starting with [v3,1/3] drm/i915/vbt: Fix backlight parsing for VBT 234+ URL : https://patchwork.freedesktop.org/series/82482/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113_full -> Patchwork_18661_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_18661_full that come from known issues: ### IGT changes ### Issues hit * igt@gen9_exec_parse@allowed-single: - shard-skl: [PASS][1] -> [DMESG-WARN][2] ([i915#1436] / [i915#716]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl2/igt@gen9_exec_pa...@allowed-single.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/shard-skl8/igt@gen9_exec_pa...@allowed-single.html * igt@i915_module_load@reload: - shard-hsw: [PASS][3] -> [DMESG-WARN][4] ([i915#1982]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-hsw2/igt@i915_module_l...@reload.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/shard-hsw8/igt@i915_module_l...@reload.html * igt@i915_pm_dc@dc6-psr: - shard-skl: [PASS][5] -> [FAIL][6] ([i915#454]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@i915_pm...@dc6-psr.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/shard-skl6/igt@i915_pm...@dc6-psr.html * igt@i915_suspend@fence-restore-untiled: - shard-skl: [PASS][7] -> [INCOMPLETE][8] ([i915#198]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl4/igt@i915_susp...@fence-restore-untiled.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/shard-skl2/igt@i915_susp...@fence-restore-untiled.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: - shard-glk: [PASS][9] -> [FAIL][10] ([i915#72]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk4/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/shard-glk2/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html * igt@kms_flip@flip-vs-blocking-wf-vblank@a-dp1: - shard-kbl: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl1/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-dp1.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/shard-kbl1/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-dp1.html * igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1: - shard-skl: [PASS][13] -> [DMESG-WARN][14] ([i915#1982]) +5 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-edp1.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/shard-skl10/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-edp1.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a1: - shard-glk: [PASS][15] -> [FAIL][16] ([i915#79]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk5/igt@kms_flip@flip-vs-expired-vblank-interrupti...@c-hdmi-a1.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/shard-glk8/igt@kms_flip@flip-vs-expired-vblank-interrupti...@c-hdmi-a1.html * igt@kms_flip@flip-vs-expired-vblank@a-edp1: - shard-skl: [PASS][17] -> [FAIL][18] ([i915#79]) +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl3/igt@kms_flip@flip-vs-expired-vbl...@a-edp1.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/shard-skl9/igt@kms_flip@flip-vs-expired-vbl...@a-edp1.html * igt@kms_flip@flip-vs-suspend@a-dp1: - shard-kbl: [PASS][19] -> [INCOMPLETE][20] ([i915#155]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl7/igt@kms_flip@flip-vs-susp...@a-dp1.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/shard-kbl2/igt@kms_flip@flip-vs-susp...@a-dp1.html * igt@kms_frontbuffer_tracking@fbc-stridechange: - shard-tglb: [PASS][21] -> [DMESG-WARN][22] ([i915#1982]) +2 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-tglb1/igt@kms_frontbuffer_track...@fbc-stridechange.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/shard-tglb2/igt@kms_frontbuffer_track...@fbc-stridechange.html - shard-glk: [PASS][23] -> [DMESG-WARN][24] ([i915#1982]) +1 similar issue [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk5/igt@kms_frontbuffer_track...@fbc-stridechange.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18661/shard-glk8/igt@kms_frontbuffer_track...@fbc-stridechange.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [PASS][25] ->
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v10,01/11] HAX to make DSC work on the icelake test system
== Series Details == Series: series starting with [v10,01/11] HAX to make DSC work on the icelake test system URL : https://patchwork.freedesktop.org/series/82483/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113_full -> Patchwork_18662_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_18662_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_huc_copy@huc-copy: - shard-tglb: [PASS][1] -> [SKIP][2] ([i915#2190]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-tglb7/igt@gem_huc_c...@huc-copy.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/shard-tglb6/igt@gem_huc_c...@huc-copy.html * igt@gem_tiled_pread_pwrite: - shard-iclb: [PASS][3] -> [DMESG-WARN][4] ([i915#1982]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-iclb8/igt@gem_tiled_pread_pwrite.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/shard-iclb2/igt@gem_tiled_pread_pwrite.html * igt@gen9_exec_parse@allowed-all: - shard-skl: [PASS][5] -> [DMESG-WARN][6] ([i915#1436] / [i915#716]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl5/igt@gen9_exec_pa...@allowed-all.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/shard-skl2/igt@gen9_exec_pa...@allowed-all.html * igt@i915_pm_dc@dc6-psr: - shard-skl: [PASS][7] -> [FAIL][8] ([i915#454]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@i915_pm...@dc6-psr.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/shard-skl10/igt@i915_pm...@dc6-psr.html * igt@kms_cursor_edge_walk@pipe-b-128x128-bottom-edge: - shard-kbl: [PASS][9] -> [DMESG-WARN][10] ([i915#1982]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl1/igt@kms_cursor_edge_w...@pipe-b-128x128-bottom-edge.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/shard-kbl6/igt@kms_cursor_edge_w...@pipe-b-128x128-bottom-edge.html * igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-atomic: - shard-glk: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) +2 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk9/igt@kms_cursor_leg...@flip-vs-cursor-busy-crc-atomic.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/shard-glk8/igt@kms_cursor_leg...@flip-vs-cursor-busy-crc-atomic.html * igt@kms_cursor_legacy@pipe-c-torture-bo: - shard-tglb: [PASS][13] -> [DMESG-WARN][14] ([i915#128]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-tglb8/igt@kms_cursor_leg...@pipe-c-torture-bo.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/shard-tglb8/igt@kms_cursor_leg...@pipe-c-torture-bo.html * igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1: - shard-skl: [PASS][15] -> [DMESG-WARN][16] ([i915#1982]) +3 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-edp1.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/shard-skl4/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-edp1.html * igt@kms_flip@flip-vs-expired-vblank@b-edp1: - shard-skl: [PASS][17] -> [FAIL][18] ([i915#79]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl3/igt@kms_flip@flip-vs-expired-vbl...@b-edp1.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/shard-skl5/igt@kms_flip@flip-vs-expired-vbl...@b-edp1.html * igt@kms_flip@flip-vs-suspend@a-dp1: - shard-kbl: [PASS][19] -> [INCOMPLETE][20] ([i915#155]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl7/igt@kms_flip@flip-vs-susp...@a-dp1.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/shard-kbl1/igt@kms_flip@flip-vs-susp...@a-dp1.html * igt@kms_flip@flip-vs-suspend@b-edp1: - shard-skl: [PASS][21] -> [INCOMPLETE][22] ([i915#198]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl1/igt@kms_flip@flip-vs-susp...@b-edp1.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/shard-skl7/igt@kms_flip@flip-vs-susp...@b-edp1.html * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc: - shard-tglb: [PASS][23] -> [DMESG-WARN][24] ([i915#1982]) +2 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-tglb5/igt@kms_frontbuffer_track...@fbcpsr-rgb565-draw-mmap-wc.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18662/shard-tglb2/igt@kms_frontbuffer_track...@fbcpsr-rgb565-draw-mmap-wc.html * igt@kms_hdr@bpc-switch-suspend: - shard-skl: [PASS][25] -> [FAIL][26] ([i915#1188]) +1 similar issue [25]:
