[committed] hppa: Fix memory barrier patterns for pre PA8800 processors
Since 2005, it was assumed in the Linux kernel that all PA 2.0 processors
supported the ldcw cacheable hint and that natural alignment could be used
for ldcw,co. However, I recently fired up an old A500 machine with PA8600
processors and found that 16-byte alignment was needed for ldcw,co on it.
As far as I can tell, only PA8800 and PA8900 processors support the
cacheable hint.
This change revises the memory barrier patterns. We alway use ldcw,co
when comp[iling for PA 2.0 but we disable the -mcoherent-ldcw option
by default. As a result, the 16-byte aligned patterns are now the default.
This is safer but slightly less efficient.
Dave
---
Fix memory barrier patterns for pre PA8800 processors
2023-09-29 John David Anglin
* config/pa/pa.md (memory_barrier): Revise comment.
(memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
* config/pa/pa.opt (coherent-ldcw): Change default to disabled.
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index f603591447d..4f85991e6bd 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -10739,10 +10739,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
;; generating PA 1.x code even though all PA 1.x systems are strongly ordered.
;; When barriers are needed, we use a strongly ordered ldcw instruction as
-;; the barrier. Most PA 2.0 targets are cache coherent. In that case, we
-;; can use the coherent cache control hint and avoid aligning the ldcw
-;; address. In spite of its description, it is not clear that the sync
-;; instruction works as a barrier.
+;; the barrier. All PA 2.0 targets accept the "co" cache control hint but
+;; only PA8800 and PA8900 processors implement the cacheable hint. In
+;; that case, we can avoid aligning the ldcw address. In spite of its
+;; description, it is not clear that the sync instruction works as a barrier.
(define_expand "memory_barrier"
[(parallel
@@ -10772,7 +10772,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
(unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))
(clobber (match_operand 1 "pmode_register_operand" "=&r"))]
"TARGET_64BIT"
- "ldo 15(%%sp),%1\n\tdepd %%r0,63,3,%1\n\tldcw 0(%1),%1"
+ "ldo 15(%%sp),%1\n\tdepd %%r0,63,3,%1\n\tldcw,co 0(%1),%1"
[(set_attr "type" "binary")
(set_attr "length" "12")])
@@ -10781,6 +10781,6 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
(unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))
(clobber (match_operand 1 "pmode_register_operand" "=&r"))]
""
- "ldo 15(%%sp),%1\n\t{dep|depw} %%r0,31,3,%1\n\tldcw 0(%1),%1"
+ "ldo 15(%%sp),%1\n\t{dep|depw} %%r0,31,3,%1\n\t{ldcw|ldcw,co} 0(%1),%1"
[(set_attr "type" "binary")
(set_attr "length" "12")])
diff --git a/gcc/config/pa/pa.opt b/gcc/config/pa/pa.opt
index dd358f2f26a..573edcea338 100644
--- a/gcc/config/pa/pa.opt
+++ b/gcc/config/pa/pa.opt
@@ -50,7 +50,7 @@ Target Mask(CALLER_COPIES)
Caller copies function arguments passed by hidden reference.
mcoherent-ldcw
-Target Var(TARGET_COHERENT_LDCW) Init(1)
+Target Var(TARGET_COHERENT_LDCW) Init(0)
Use ldcw/ldcd coherent cache-control hint.
mdisable-fpregs
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[committed] Increase timeout factor for hppa*-*-* in gcc.dg/long_branch.c
Committed to trunk.
Dave
---
Increase timeout factor for hppa*-*-* in gcc.dg/long_branch.c
2023-10-02 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.dg/long_branch.c: Increase timeout factor for hppa*-*-*.
diff --git a/gcc/testsuite/gcc.dg/long_branch.c
b/gcc/testsuite/gcc.dg/long_branch.c
index c1ac24f5116..ba80ab3d15b 100644
--- a/gcc/testsuite/gcc.dg/long_branch.c
+++ b/gcc/testsuite/gcc.dg/long_branch.c
@@ -1,7 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O2 -fno-reorder-blocks" } */
/* { dg-skip-if "limited code space" { pdp11-*-* } } */
-/* { dg-timeout-factor 2.0 { target hppa*-*-* } } */
+/* { dg-timeout-factor 4.0 { target hppa*-*-* } } */
void abort ();
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[committed] Require target lra in gcc.dg/pr108095.c
Committed to trunk.
Dave
---
Require target lra in gcc.dg/pr108095.c
2023-10-02 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.dg/pr108095.c: Require target lra.
diff --git a/gcc/testsuite/gcc.dg/pr108095.c b/gcc/testsuite/gcc.dg/pr108095.c
index fb76caae72e..0a487cf614a 100644
--- a/gcc/testsuite/gcc.dg/pr108095.c
+++ b/gcc/testsuite/gcc.dg/pr108095.c
@@ -1,5 +1,5 @@
/* PR tree-optimization/108095 */
-/* { dg-do compile } */
+/* { dg-do compile { target lra } } */
/* { dg-options "-Os -g" } */
int v;
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[committed] Add hppa*-*-* to dg-error targets at line 5 in gfortran.dg/pr95690.f90
Committed to trunk.
Dave
---
Add hppa*-*-* to dg-error targets at line 5
2023-10-02 John David Anglin
gcc/testsuite/ChangeLog:
* gfortran.dg/pr95690.f90: Add hppa*-*-* to dg-error targets at line 5.
diff --git a/gcc/testsuite/gfortran.dg/pr95690.f90
b/gcc/testsuite/gfortran.dg/pr95690.f90
index 47a5df9e894..1432937438a 100644
--- a/gcc/testsuite/gfortran.dg/pr95690.f90
+++ b/gcc/testsuite/gfortran.dg/pr95690.f90
@@ -2,8 +2,8 @@
module m
contains
subroutine s
- print *, (erfc) ! { dg-error "not a floating constant" "" { target
i?86-*-* x86_64-*-* sparc*-*-* cris-*-* } }
- end ! { dg-error "not a floating constant" "" { target { ! "i?86-*-*
x86_64-*-* sparc*-*-* cris-*-*" } } }
+ print *, (erfc) ! { dg-error "not a floating constant" "" { target
i?86-*-* x86_64-*-* sparc*-*-* cris-*-* hppa*-*-* } }
+ end ! { dg-error "not a floating constant" "" { target { ! "i?86-*-*
x86_64-*-* sparc*-*-* cris-*-* hppa*-*-*" } } }
function erfc()
end
end
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[committed] hppa: Delete MALLOC_ABI_ALIGNMENT define from pa32-linux.h
In spite of what the comment says, the MALLOC_ALIGNMENT in glibc for 32-bit hppa-linux has always been 8, not 16. There is no reason to increase it as the old linux threads implementation has been removed. So, we can use default in pa.h. Dave --- Delete MALLOC_ABI_ALIGNMENT define from pa32-linux.h 2023-10-05 John David Anglin * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete. diff --git a/gcc/config/pa/pa32-linux.h b/gcc/config/pa/pa32-linux.h index bdd13ce492e..f48e45374f4 100644 --- a/gcc/config/pa/pa32-linux.h +++ b/gcc/config/pa/pa32-linux.h @@ -68,11 +68,6 @@ call_ ## FUNC (void) \ #undef WCHAR_TYPE_SIZE #define WCHAR_TYPE_SIZE BITS_PER_WORD -/* POSIX types such as pthread_mutex_t require 16-byte alignment to retain - layout compatibility with the original linux thread implementation. */ -#undef MALLOC_ABI_ALIGNMENT -#define MALLOC_ABI_ALIGNMENT 128 - /* Place jump tables in the text section except when generating non-PIC code. When generating non-PIC code, the relocations needed to load the address of the jump table result in a text label in the final executable signature.asc Description: PGP signature
Re: [PATCH 00/11] (v2) Mitigation against unsafe data speculation (CVE-2017-5753)
On 2018-07-27 5:37 AM, Richard Earnshaw wrote: Port Maintainers: You need to decide what action is required for your port to handle speculative execution, even if that action is to use the trivial no-speculation on this architecture. You must also consider whether or not a furture implementation of your architecture might need to deal with this in making that decision. On hppa, I think we should go with the hook that assumes there is no speculative execution. Nominally, there is branch prediction and speculative execution; but the spectre test program was not able to successfully access memory on my rp3440. As far as I know, the details of speculative execution on PA-RISC are not public. Jeff would know best. Dave -- John David Anglin dave.ang...@bell.net
[committed] Move non-PIC jump table to rodata on 32-bit linux
The attached patch fixes a problem noted by Helge Deller. When a
non-PIC jump table is
placed in the text section, the local label marking the head of the
table ends up in the
unwind data. This is due to the R_PARISC_DIR21L and R_PARISC_DIR14R
relocations needed
to load the address of the table. This breaks the unwind data.
On the 32-bit Linux target, we can simply put non-PIC jump tables in
rodata. This has the
added benefit that it shortens the text section and avoids potential
issues in calculating
branch distances.
We should also do this for the HP-UX SOM target. However, this requires
deferring the output
of branch tables to final.
When generating PIC code, the references are relative and the label is
removed by the assembler.
Tested change on hppa-unknown-linux-gnu. Committed change to active
branches.
Dave
--
John David Anglin dave.ang...@bell.net
2018-07-29 John David Anglin
* config/pa/pa.c (pa_output_addr_vec): Align address table.
* config/pa/pa.h (JUMP_TABLES_IN_TEXT_SECTION): Revise comment.
* config/pa/pa32-linux.h (JUMP_TABLES_IN_TEXT_SECTION): Define.
Index: config/pa/pa.c
===
--- config/pa/pa.c (revision 263009)
+++ config/pa/pa.c (working copy)
@@ -10680,6 +10680,8 @@
{
int idx, vlen = XVECLEN (body, 0);
+ if (!TARGET_SOM)
+fputs ("\t.align 4\n", asm_out_file);
targetm.asm_out.internal_label (asm_out_file, "L", CODE_LABEL_NUMBER (lab));
if (TARGET_GAS)
fputs ("\t.begin_brtab\n", asm_out_file);
Index: config/pa/pa.h
===
--- config/pa/pa.h (revision 263009)
+++ config/pa/pa.h (working copy)
@@ -1143,22 +1143,24 @@
#define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
pa_output_ascii ((FILE), (P), (SIZE))
-/* Jump tables are always placed in the text section. Technically, it
- is possible to put them in the readonly data section. This has the
- benefit of getting the table out of .text and reducing branch lengths
- as a result.
+/* Jump tables are always placed in the text section. We have to do
+ this for the HP-UX SOM target as we can't switch sections in the
+ middle of a function.
- The downside is that an additional insn (addil) is needed to access
+ On ELF targets, it is possible to put them in the readonly-data section.
+ This would get the table out of .text and reduce branch lengths.
+
+ A downside is that an additional insn (addil) is needed to access
the table when generating PIC code. The address difference table
- also has to use 32-bit pc-relative relocations. Currently, GAS does
- not support these relocations, although it is easily modified to do
- this operation.
+ also has to use 32-bit pc-relative relocations.
The table entries need to look like "$L1+(.+8-$L0)-$PIC_pcrel$0"
when using ELF GAS. A simple difference can be used when using
- SOM GAS or the HP assembler. The final downside is GDB complains
- about the nesting of the label for the table when debugging. */
+ the HP assembler.
+ The final downside is GDB complains about the nesting of the label
+ for the table. */
+
#define JUMP_TABLES_IN_TEXT_SECTION 1
/* This is how to output an element of a case-vector that is absolute. */
Index: config/pa/pa32-linux.h
===
--- config/pa/pa32-linux.h (revision 263009)
+++ config/pa/pa32-linux.h (working copy)
@@ -67,3 +67,12 @@
layout compatibility with the original linux thread implementation. */
#undef MALLOC_ABI_ALIGNMENT
#define MALLOC_ABI_ALIGNMENT 128
+
+/* Place jump tables in the text section except when generating non-PIC
+ code. When generating non-PIC code, the relocations needed to load the
+ address of the jump table result in a text label in the final executable
+ if the jump table is placed in the text section. This breaks the unwind
+ data for the function. Thus, the jump table needs to be placed in
+ rodata when generating non-PIC code. */
+#undef JUMP_TABLES_IN_TEXT_SECTION
+#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
[committed] hppa: Modify TLS patterns to provide both 32 and 64-bit support
Tested on hppa-unknown-linux-gnu and hppa64-hp-hpux11.11.
Committed to trunk.
Dave
---
hppa: Modify TLS patterns to provide both 32 and 64-bit support.
2023-07-15 John David Anglin
gcc/ChangeLog:
* config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
R27_REGNUM.
(tgd_load): Restrict to !TARGET_64BIT. Use register constants.
(tld_load): Likewise.
(tgd_load_pic): Change to expander.
(tld_load_pic, tld_offset_load, tp_load): Likewise.
(tie_load_pic, tle_load): Likewise.
(tgd_load_picsi, tgd_load_picdi): New.
(tld_load_picsi, tld_load_picdi): New.
(tld_offset_load): New.
(tp_load): New.
(tie_load_picsi, tie_load_picdi): New.
(tle_load): New.
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index 726e12768f8..f603591447d 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -108,6 +108,14 @@
(MAX_17BIT_OFFSET 262100) ; 17-bit branch
])
+;; Register numbers
+
+(define_constants
+ [(R1_REGNUM 1)
+ (R19_REGNUM 19)
+ (R27_REGNUM 27)
+ ])
+
;; Mode and code iterators
;; This mode iterator allows :P to be used for patterns that operate on
@@ -10262,9 +10270,9 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
(define_insn "tgd_load"
[(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(match_operand 1 "tgd_symbolic_operand" "")] UNSPEC_TLSGD))
- (clobber (reg:SI 1))
- (use (reg:SI 27))]
- ""
+ (clobber (reg:SI R1_REGNUM))
+ (use (reg:SI R27_REGNUM))]
+ "!TARGET_64BIT"
"*
{
return \"addil LR'%1-$tls_gdidx$,%%r27\;ldo RR'%1-$tls_gdidx$(%%r1),%0\";
@@ -10272,12 +10280,25 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
[(set_attr "type" "multi")
(set_attr "length" "8")])
-(define_insn "tgd_load_pic"
+(define_expand "tgd_load_pic"
+ [(set (match_operand 0 "register_operand")
+ (unspec [(match_operand 1 "tgd_symbolic_operand")] UNSPEC_TLSGD_PIC))
+ (clobber (reg R1_REGNUM))]
+ ""
+{
+ if (TARGET_64BIT)
+emit_insn (gen_tgd_load_picdi (operands[0], operands[1]));
+ else
+emit_insn (gen_tgd_load_picsi (operands[0], operands[1]));
+ DONE;
+})
+
+(define_insn "tgd_load_picsi"
[(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(match_operand 1 "tgd_symbolic_operand" "")]
UNSPEC_TLSGD_PIC))
- (clobber (reg:SI 1))
- (use (reg:SI 19))]
- ""
+ (clobber (reg:SI R1_REGNUM))
+ (use (reg:SI R19_REGNUM))]
+ "!TARGET_64BIT"
"*
{
return \"addil LT'%1-$tls_gdidx$,%%r19\;ldo RT'%1-$tls_gdidx$(%%r1),%0\";
@@ -10285,12 +10306,25 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
[(set_attr "type" "multi")
(set_attr "length" "8")])
+(define_insn "tgd_load_picdi"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (unspec:DI [(match_operand 1 "tgd_symbolic_operand" "")]
UNSPEC_TLSGD_PIC))
+ (clobber (reg:DI R1_REGNUM))
+ (use (reg:DI R27_REGNUM))]
+ "TARGET_64BIT"
+ "*
+{
+ return \"addil LT'%1-$tls_gdidx$,%%r27\;ldo RT'%1-$tls_gdidx$(%%r1),%0\";
+}"
+ [(set_attr "type" "multi")
+ (set_attr "length" "8")])
+
(define_insn "tld_load"
[(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(match_operand 1 "tld_symbolic_operand" "")] UNSPEC_TLSLDM))
- (clobber (reg:SI 1))
- (use (reg:SI 27))]
- ""
+ (clobber (reg:SI R1_REGNUM))
+ (use (reg:SI R27_REGNUM))]
+ "!TARGET_64BIT"
"*
{
return \"addil LR'%1-$tls_ldidx$,%%r27\;ldo RR'%1-$tls_ldidx$(%%r1),%0\";
@@ -10298,12 +10332,25 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
[(set_attr "type" "multi")
(set_attr "length" "8")])
-(define_insn "tld_load_pic"
+(define_expand "tld_load_pic"
+ [(set (match_operand 0 "register_operand")
+ (unspec [(match_operand 1 "tld_symbolic_operand")] UNSPEC_TLSLDM_PIC))
+ (clobber (reg R1_REGNUM))]
+ ""
+{
+ if (TARGET_64BIT)
+emit_insn (gen_tld_load_picdi (operands[0], operands[1]));
+ else
+emit_insn (gen_tld_load_picsi (operands[0], operands[1]));
+ DONE;
+})
+
+(define_insn "tld_load_picsi"
[(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(match_operand 1 "tld_symbolic_operand" "")]
UNSPEC_TLSLDM_PIC))
- (clobber (reg:SI 1))
- (use (reg:SI 19))]
- ""
+ (clobber (reg:SI R1_REGNUM))
+ (use (reg:SI R19_REGNUM))]
+ "!TARGET_64BIT&q
[PATCH] Use strtol instead of std::stoi in gensupport.cc
Tested on trunk with hppa64-hp-hpux11.11. Okay? Dave --- Use strtol instead of std::stoi [PR110646] Implementation of std::stoi was overlooked on hppa-hpux, so use strtol instead. 2023-07-19 John David Anglin gcc/ChangeLog: PR bootstrap/110646 * gensupport.cc(class conlist): Use strtol instead of std::stoi. diff --git a/gcc/gensupport.cc b/gcc/gensupport.cc index 959d1d9c83c..87bcf5ee441 100644 --- a/gcc/gensupport.cc +++ b/gcc/gensupport.cc @@ -640,7 +640,7 @@ public: name.assign (ns, len); if (numeric) - idx = std::stoi (name); + idx = strtol (name.c_str (), (char **)NULL, 10); } /* Adds a character to the end of the string. */ signature.asc Description: PGP signature
[committed] Require target lra in gcc.c-torture/compile/asmgoto-6.c
The asmgoto feature requires LRA support.
Committed to trunk. Tested on hppa64-hp-hpux11.11.
Dave
---
Require target lra in gcc.c-torture/compile/asmgoto-6.c
2023-07-21 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.c-torture/compile/asmgoto-6.c: Require target lra.
diff --git a/gcc/testsuite/gcc.c-torture/compile/asmgoto-6.c
b/gcc/testsuite/gcc.c-torture/compile/asmgoto-6.c
index 0652bd4e4e1..6799b83c20a 100644
--- a/gcc/testsuite/gcc.c-torture/compile/asmgoto-6.c
+++ b/gcc/testsuite/gcc.c-torture/compile/asmgoto-6.c
@@ -1,5 +1,5 @@
-/* { dg-do compile } */
+/* { dg-do compile { target lra } } */
/* PR middle-end/110420 */
/* PR middle-end/103979 */
/* PR middle-end/98619 */
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Re: [PATCH] Use strtol instead of std::stoi in gensupport.cc
Ping. On 2023-07-19 2:59 p.m., John David Anglin wrote: Tested on trunk with hppa64-hp-hpux11.11. Okay? Dave --- Use strtol instead of std::stoi [PR110646] Implementation of std::stoi was overlooked on hppa-hpux, so use strtol instead. 2023-07-19 John David Anglin gcc/ChangeLog: PR bootstrap/110646 * gensupport.cc(class conlist): Use strtol instead of std::stoi. diff --git a/gcc/gensupport.cc b/gcc/gensupport.cc index 959d1d9c83c..87bcf5ee441 100644 --- a/gcc/gensupport.cc +++ b/gcc/gensupport.cc @@ -640,7 +640,7 @@ public: name.assign (ns, len); if (numeric) - idx = std::stoi (name); + idx = strtol (name.c_str (), (char **)NULL, 10); } /* Adds a character to the end of the string. */ -- John David Anglin dave.ang...@bell.net
[committed] hppa: Enable generation of GNU stack notes on Linux
I think we have waited long enough for everone to switch to a kernel build with VDSO support. Committed to trunk. Dave --- Enable generation of GNU stack notes on Linux 2023-11-06 John David Anglin * config/pa/pa-linux.h (NEED_INDICATE_EXEC_STACK): Define to 1. diff --git a/gcc/config/pa/pa-linux.h b/gcc/config/pa/pa-linux.h index d38f68b1fa5..96c54765ddb 100644 --- a/gcc/config/pa/pa-linux.h +++ b/gcc/config/pa/pa-linux.h @@ -144,8 +144,7 @@ along with GCC; see the file COPYING3. If not see #define HAVE_sync_compare_and_swapsi 1 #define HAVE_sync_compare_and_swapdi 1 -/* It's not possible to enable GNU_stack notes since the kernel needs - an executable stack for signal returns and syscall restarts. */ +/* Enable GNU stack notes. */ #undef NEED_INDICATE_EXEC_STACK -#define NEED_INDICATE_EXEC_STACK 0 +#define NEED_INDICATE_EXEC_STACK 1 signature.asc Description: PGP signature
[committed] hppa: Fix typo in PA 2.0 trampoline template
Noticed in glibc testsuite. Committed to active branches.
Dave
---
hppa: Fix typo in PA 2.0 trampoline template
2023-11-06 John David Anglin
* config/pa/pa.cc (pa_asm_trampoline_template): Fix typo.
diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc
index 2e906cff7ff..218c48b4ae0 100644
--- a/gcc/config/pa/pa.cc
+++ b/gcc/config/pa/pa.cc
@@ -10401,7 +10401,7 @@ pa_asm_trampoline_template (FILE *f)
fputs ("\tldw 0(%r22),%r21\n", f);
fputs ("\tldw 4(%r22),%r19\n", f);
fputs ("\tbve (%r21)\n", f);
- fputs ("\tldw 52(%r1),%r29\n", f);
+ fputs ("\tldw 52(%r20),%r29\n", f);
fputs ("\t.word 0\n", f);
fputs ("\t.word 0\n", f);
fputs ("\t.word 0\n", f);
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[committed] hppa: Add clear_cache expander
Tested on hppa-unknown-linux-gnu and hppa64-hp-hpux11.11.
Committed to trunk.
Dave
---
Add clear_cache expander.
2023-05-17 John David Anglin
gcc/ChangeLog:
* config/pa/pa.md (clear_cache): New.
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index 7b7d7f776c7..726e12768f8 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -9940,6 +9940,23 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
[(set_attr "type" "multi")
(set_attr "length" "52")])
+(define_expand "clear_cache"
+ [(match_operand 0 "pmode_register_operand")
+ (match_operand 1 "pmode_register_operand")]
+ ""
+{
+ rtx line_length = gen_reg_rtx (Pmode);
+
+ emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE));
+ if (TARGET_64BIT)
+emit_insn (gen_icacheflushdi (operands[0], operands[1], line_length,
+ gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));
+ else
+emit_insn (gen_icacheflushsi (operands[0], operands[1], line_length,
+ gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));
+ DONE;
+})
+
;; An out-of-line prologue.
(define_insn "outline_prologue_call"
[(unspec_volatile [(const_int 0)] UNSPECV_OPC)
signature.asc
Description: PGP signature
[committed] hppa: Add mi_thunk support for vcalls
The attached change adds mi_thunk support for vcalls on hppa. Tested on
hppa-unknown-linux-gnu,
hppa2.0w-hp-hpux11.11 and hppa64-hp-hpux11.11. Committed to trunk and gcc-10.
Dave
--
John David Anglin dave.ang...@bell.net
Add mi_thunk support for vcalls on hppa.
gcc/ChangeLog:
PR target/85074
* config/pa/pa.c (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Define as
hook_bool_const_tree_hwi_hwi_const_tree_true.
(pa_asm_output_mi_thunk): Add support for nonzero vcall_offset.
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 3921b5c98de..d7fcd11e504 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -293,7 +293,7 @@ static size_t n_deferred_plabels = 0;
#undef TARGET_ASM_OUTPUT_MI_THUNK
#define TARGET_ASM_OUTPUT_MI_THUNK pa_asm_output_mi_thunk
#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
-#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
+#define TARGET_ASM_CAN_OUTPUT_MI_THUNK
hook_bool_const_tree_hwi_hwi_const_tree_true
#undef TARGET_ASM_FILE_END
#define TARGET_ASM_FILE_END pa_file_end
@@ -8461,12 +8461,15 @@ pa_is_function_label_plus_const (rtx op)
&& GET_CODE (XEXP (op, 1)) == CONST_INT);
}
-/* Output assembly code for a thunk to FUNCTION. */
+/* Output the assembler code for a thunk function. THUNK_DECL is the
+ declaration for the thunk function itself, FUNCTION is the decl for
+ the target function. DELTA is an immediate constant offset to be
+ added to THIS. If VCALL_OFFSET is nonzero, the word at
+ *(*this + vcall_offset) should be added to THIS. */
static void
pa_asm_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta,
- HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
- tree function)
+ HOST_WIDE_INT vcall_offset, tree function)
{
const char *fnname = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (thunk_fndecl));
static unsigned int current_thunk_number;
@@ -8482,201 +8485,386 @@ pa_asm_output_mi_thunk (FILE *file, tree
thunk_fndecl, HOST_WIDE_INT delta,
assemble_start_function (thunk_fndecl, fnname);
final_start_function (emit_barrier (), file, 1);
- /* Output the thunk. We know that the function is in the same
- translation unit (i.e., the same space) as the thunk, and that
- thunks are output after their method. Thus, we don't need an
- external branch to reach the function. With SOM and GAS,
- functions and thunks are effectively in different sections.
- Thus, we can always use a IA-relative branch and the linker
- will add a long branch stub if necessary.
-
- However, we have to be careful when generating PIC code on the
- SOM port to ensure that the sequence does not transfer to an
- import stub for the target function as this could clobber the
- return value saved at SP-24. This would also apply to the
- 32-bit linux port if the multi-space model is implemented. */
- if ((!TARGET_LONG_CALLS && TARGET_SOM && !TARGET_PORTABLE_RUNTIME
- && !(flag_pic && TREE_PUBLIC (function))
- && (TARGET_GAS || last_address < 262132))
- || (!TARGET_LONG_CALLS && !TARGET_SOM && !TARGET_PORTABLE_RUNTIME
- && ((targetm_common.have_named_sections
- && DECL_SECTION_NAME (thunk_fndecl) != NULL
- /* The GNU 64-bit linker has rather poor stub management.
- So, we use a long branch from thunks that aren't in
- the same section as the target function. */
- && ((!TARGET_64BIT
- && (DECL_SECTION_NAME (thunk_fndecl)
- != DECL_SECTION_NAME (function)))
- || ((DECL_SECTION_NAME (thunk_fndecl)
- == DECL_SECTION_NAME (function))
- && last_address < 262132)))
- /* In this case, we need to be able to reach the start of
-the stub table even though the function is likely closer
-and can be jumped to directly. */
- || (targetm_common.have_named_sections
- && DECL_SECTION_NAME (thunk_fndecl) == NULL
- && DECL_SECTION_NAME (function) == NULL
- && total_code_bytes < MAX_PCREL17F_OFFSET)
- /* Likewise. */
- || (!targetm_common.have_named_sections
- && total_code_bytes < MAX_PCREL17F_OFFSET
-{
- if (!val_14)
- output_asm_insn ("addil L'%2,%%r26", xoperands);
-
- output_asm_insn ("b %0", xoperands);
-
- if (val_14)
- {
- output_asm_insn ("ldo %2(%%r26),%%r26", xoperands);
- nbytes += 8;
+ if (!vcall_offset)
+{
+ /* Output the thunk. We know that the function is in the same
+translation unit (i.e., the sa
[committed] Fix ada build on hpux
Tested on hppa2.0w-hp-hpux11.11. Committed to trunk. Dave Define STAGE1_LIBS to link against libcl.a in stage1 on hpux. 2021-08-19 Arnaud Charlet PR ada/101924 gcc/ada/ChangeLog: * gcc-interface/Make-lang.in (STAGE1_LIBS): Define on hpux. diff --git a/gcc/ada/gcc-interface/Make-lang.in b/gcc/ada/gcc-interface/Make-lang.in index b68081ed065..765654fc36b 100644 --- a/gcc/ada/gcc-interface/Make-lang.in +++ b/gcc/ada/gcc-interface/Make-lang.in @@ -85,6 +85,10 @@ ifeq ($(strip $(filter-out linux%,$(host_os))),) STAGE1_LIBS=-ldl endif +ifeq ($(strip $(filter-out hpux%,$(host_os))),) + STAGE1_LIBS=/usr/lib/libcl.a +endif + ifeq ($(STAGE1),True) ADA_INCLUDES=$(COMMON_ADA_INCLUDES) adalib=$(dir $(shell $(CC) -print-libgcc-file-name))adalib
[committed] hppa: Don't warn when alignment of global common data exceeds maximum alignment
On 32-bit hppa*-hpux*, global common data is used for one-only support. The
warning in
pa_asm_output_aligned_common() causes numerous tests in the libstdc++-v3 to
fail due to
excess errors.
The only code that requires more alignment is the ldcw semaphore instruction,
so I believe
we don't need the warning.
Tested on hppa2.0w-hp-hpux11.11 and hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
Don't warn when alignment of global common data exceeds maximum alignment.
2021-08-21 John David Anglin
gcc/ChangeLog:
* config/pa/pa.c (pa_asm_output_aligned_common): Remove warning.
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 46194ba395d..06143023b46 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -9080,9 +9080,7 @@ pa_asm_output_aligned_common (FILE *stream,
max_common_align = TARGET_64BIT ? 128 : (size >= 4096 ? 256 : 64);
if (align > max_common_align)
{
- warning (0, "alignment (%u) for %s exceeds maximum alignment "
- "for global common data. Using %u",
- align / BITS_PER_UNIT, name, max_common_align / BITS_PER_UNIT);
+ /* Alignment exceeds maximum alignment for global common data. */
align = max_common_align;
}
[committed] hppa: Don't build libgcc_stub.a on hppa[12]*-*-hpux11*
libgcc_stub.a is not needed on hppa[12]*-*-hpux11*, so don't build it. Tested on hppa2.0w-hp-hpux11.11. Committed to trunk. Dave --- Don't build libgcc_stub.a on hppa[12]*-*-hpux11*. 2021-08-21 John David Anglin libgcc/ChangeLog: * config.host: Remove extra_parts from hppa[12]*-*-hpux11* case. diff --git a/libgcc/config.host b/libgcc/config.host index 8ca7a00082a..8b636743c63 100644 --- a/libgcc/config.host +++ b/libgcc/config.host @@ -667,7 +667,6 @@ hppa[12]*-*-hpux11*) tmake_file="$tmake_file pa/t-slibgcc-dwarf-ver" fi tmake_file="$tmake_file pa/t-slibgcc-hpux t-slibgcc-hpux" - extra_parts="libgcc_stub.a" md_unwind_header=pa/hpux-unwind.h ;; hppa*-*-openbsd*)
[committed] hppa: Fix libgfortran build on hppa*-hp-hpux[01]*
The following change fixes the build of libgfortran on hppa*-hp-hpux[01]*.
Tested on hppa64-hp-hpux11.11 and hppa2.0w-hp-hpux11.11. Committed to trunk.
Dave
---
Fix libgfortran build on hppa*-hp-hpux[01]*
Add include hack to define PRIdPTR, PRIiPTR, PRIoPTR, PRIuPTR, PRIxPTR
and PRIXPTR in inttypes.h.
2021-08-30 John David Anglin
fixincludes/ChangeLog:
* inclhack.def (hpux_c99_inttypes5): New hack to define PRIdPTR, etc.
* fixincl.x: Regenerate.
* tests/base/inttypes.h: Update.
diff --git a/fixincludes/inclhack.def b/fixincludes/inclhack.def
index b7ad6982e96..46e3b8c993a 100644
--- a/fixincludes/inclhack.def
+++ b/fixincludes/inclhack.def
@@ -2668,6 +2668,34 @@ fix = {
"#define SCNxMAX SCNx32\n";
};
+/*
+ * Fix missing PRIdPTR defines in inttypes.h
+ */
+fix = {
+hackname = hpux_c99_inttypes5;
+mach = "hppa*-hp-hpux11.[01]*";
+files = inttypes.h;
+select= "#ifndef[ \t]_KERNEL[ \t]*\n";
+c_fix = format;
+c_fix_arg = "#ifndef __LP64__\n"
+ "#define PRIdPTR\t\tPRId32\n"
+ "#define PRIiPTR\t\tPRIi32\n"
+ "#define PRIoPTR\t\tPRIo32\n"
+ "#define PRIuPTR\t\tPRIu32\n"
+ "#define PRIxPTR\t\tPRIx32\n"
+ "#define PRIXPTR\t\tPRIX32\n"
+ "#else\n"
+ "#define PRIdPTR\t\tPRId64\n"
+ "#define PRIiPTR\t\tPRIi64\n"
+ "#define PRIoPTR\t\tPRIo64\n"
+ "#define PRIuPTR\t\tPRIu64\n"
+ "#define PRIxPTR\t\tPRIx64\n"
+ "#define PRIXPTR\t\tPRIX64\n"
+ "#endif\n\n"
+ "#ifndef _KERNEL\n";
+test_text = "#ifndef _KERNEL\n";
+};
+
/*
* Fix hpux broken ctype macros
*/
diff --git a/fixincludes/tests/base/inttypes.h
b/fixincludes/tests/base/inttypes.h
index 144ea6596e8..9c1f93eb736 100644
--- a/fixincludes/tests/base/inttypes.h
+++ b/fixincludes/tests/base/inttypes.h
@@ -42,3 +42,25 @@
#define SCNuMAX SCNu32
#endif /* HPUX_C99_INTTYPES4_CHECK */
+
+
+#if defined( HPUX_C99_INTTYPES5_CHECK )
+#ifndef __LP64__
+#define PRIdPTRPRId32
+#define PRIiPTRPRIi32
+#define PRIoPTRPRIo32
+#define PRIuPTRPRIu32
+#define PRIxPTRPRIx32
+#define PRIXPTRPRIX32
+#else
+#define PRIdPTRPRId64
+#define PRIiPTRPRIi64
+#define PRIoPTRPRIo64
+#define PRIuPTRPRIu64
+#define PRIxPTRPRIx64
+#define PRIXPTRPRIX64
+#endif
+
+#ifndef _KERNEL
+
+#endif /* HPUX_C99_INTTYPES5_CHECK */
Re: [PATCH] hppa: Improve expansion of ashldi3 when !TARGET_64BIT
Committed.
Regards,
Dave
On 2020-08-22 7:24 p.m., Roger Sayle wrote:
> Hi Dave,
> I actually think using plus_xor_ior operator is useful. It means that if
> combine,
> inlining or some other RTL simplification generates these variants, these
> forms
> will still be recognized by the backend. It's more typing, but the compiler
> produces
> better code.
>
> Here's what I have so far, but please feel free to modify anything. I'll
> leave the
> rest to you.
>
> With this patch:
>
> unsigned long long rotl4(unsigned long long x)
> {
> return (x<<4) | (x>>60);
> }
>
> unsigned long long rotr4(unsigned long long x)
> {
> return (x<<60) | (x>>4);
> }
>
> which previously generated:
>
> rotl4:depd,z %r26,59,60,%r28
> extrd,u %r26,3,4,%r26
> bve (%r2)
> or %r26,%r28,%r28
>
> rotr4:extrd,u %r26,59,60,%r28
> depd,z %r26,3,4,%r26
> bve (%r2)
> or %r26,%r28,%r28
>
> now produces:
>
> rotl4:bve (%r2)
> shrpd %r26,%r26,60,%r28
>
> rotr4:bve (%r2)
> shrpd %r26,%r26,4,%r28
>
>
> I'm guessing this is very similar to what you were thinking (or what I
> described previously).
>
> Many thanks again for trying out these patches/suggestions for me.
>
> Best regards,
> Roger
> --
>
> -Original Message-
> From: John David Anglin
> Sent: 22 August 2020 23:09
> To: Roger Sayle ; 'GCC Patches'
>
> Cc: 'Jeff Law'
> Subject: Re: [PATCH] hppa: Improve expansion of ashldi3 when !TARGET_64BIT
>
> On 2020-08-22 12:01 p.m., Roger Sayle wrote:
>> I suspect that the issue with the 64-bit patterns is that the second
>> variant of pa.md's define_insn "shrpdi4" is unlikely ever to match as
>> (minus:DI (const_int 64) x) is never "canonical" when x is itself a
>> CONST_INT. Splitting this define_insn into two (or three see below)
>> separate forms; the first as it currently is and the second (as you
>> suggest) with
>> "TARGET_64BIT
>>&& INTVAL (operands[3]) + INTVAL (operands[4]) == 64"
>> should do the trick.
> I will go ahead and add the basic patterns. It seems it would be best if I
> avoid using the "plus_xor_ior_operator". It also seems the 32-bit patterns
> should avoid it.
>> My first impression was that the DImode shrpd instructions would be
>> most useful for implementing TI mode shifts, but that TI mode isn't
>> supported by hppa64. But then I noticed that the more immediate
>> benefit would be in supporting rotrdi3 and rotldi3 on TARGET_64BIT
>> that currently don't have expanders nor insns defined. Here GCC
>> currently generates three instructions where a single shrpd would be
>> optimal.
> It turns out we now need to support TI mode and __int128 for libgomp. The
> hppa64-hpux target won't boot without it. I had just added a change to
> support TI mode but it's untested.
>
> Regards,
> Dave
>
> --
> John David Anglin dave.ang...@bell.net
>
--
John David Anglin dave.ang...@bell.net
Re: [PATCH] hppa64: Improve hppa_rtx_costs for DImode shifts by constants.
Hi Roger, On 2020-09-07 3:59 p.m., Roger Sayle wrote: > 2020-09-07 Roger Sayle > > gcc/ChangeLog > * config/pa/pa.c (hppa_rtx_costs) [ASHIFT, ASHIFTRT, LSHIFTRT]: > Provide accurate costs for DImode shifts of integer constants. I committed this change. However, it doesn't fix PR middle-end/87256 on hppa64. Regards, Dave -- John David Anglin dave.ang...@bell.net
[PATCH] hppa: Fix linkage with -nodefaultlibs option
This change fixes the spec file handling for -nodefaultlibs on hppa. This
fixes the testsuite fails for
g++.dg/abi/pure-virtual1.C. It moves the necessary library additions to
ENDFILE_SPEC defines.
On hppa64-hpux, we need to link against libgcc_stub.a in final executables
whenever the user requires
start files. The milli.a library normally should always be added with GNU ld
but we don't have a way
to do that anymore. So, we now add it when we need start files. HP ld adds it
automatically.
On hppa-linux, we need to link against libgcc.a whenever start files are needed
to provide $$dyncall
and __canonicalize_funcptr_for_compare. These are used in the start files.
Tested on hppa64-hp-hpux11.11 and hppa-unknown-linux-gnu with no observed
regressions.
Committed to trunk and gcc-10.
Dave
diff --git a/gcc/config/pa/pa-hpux11.h b/gcc/config/pa/pa-hpux11.h
index 794bf8e2964..28207202e42 100644
--- a/gcc/config/pa/pa-hpux11.h
+++ b/gcc/config/pa/pa-hpux11.h
@@ -154,11 +154,6 @@ along with GCC; see the file COPYING3. If not see
%{!mt:%{!pthread:-a shared -lc -a archive\
%{shared:%{mt|pthread:-lpthread}}"
-/* The libgcc_stub.a library needs to come last. */
-#undef LINK_GCC_C_SEQUENCE_SPEC
-#define LINK_GCC_C_SEQUENCE_SPEC \
- "%G %{!nolibc:%L} %G %{!nostdlib:%{!nodefaultlibs:%{!shared:-lgcc_stub}}}"
-
#undef STARTFILE_SPEC
#define STARTFILE_SPEC \
"%{!shared:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}} \
diff --git a/gcc/config/pa/pa32-linux.h b/gcc/config/pa/pa32-linux.h
index f271bbf51a2..970722ad528 100644
--- a/gcc/config/pa/pa32-linux.h
+++ b/gcc/config/pa/pa32-linux.h
@@ -57,6 +57,11 @@ call_ ## FUNC (void) \
}
#endif
+/* We need to link against libgcc.a for __canonicalize_funcptr_for_compare
+ and $$dyncall. */
+#undef ENDFILE_SPEC
+#define ENDFILE_SPEC GNU_USER_TARGET_ENDFILE_SPEC "libgcc.a%s"
+
#undef WCHAR_TYPE
#define WCHAR_TYPE "long int"
diff --git a/gcc/config/pa/pa64-hpux.h b/gcc/config/pa/pa64-hpux.h
index c7d127f76ac..096aa4bd4ee 100644
--- a/gcc/config/pa/pa64-hpux.h
+++ b/gcc/config/pa/pa64-hpux.h
@@ -103,12 +103,6 @@ along with GCC; see the file COPYING3. If not see
%{shared:%{mt|pthread:-lpthread}}"
#endif
-/* The libgcc_stub.a and milli.a libraries need to come last. */
-#undef LINK_GCC_C_SEQUENCE_SPEC
-#define LINK_GCC_C_SEQUENCE_SPEC "\
- %G %{!nolibc:%L} %G %{!nostdlib:%{!nodefaultlibs:%{!shared:-lgcc_stub}\
- milli.a%s}}"
-
/* Under hpux11, the normal location of the `ld' and `as' programs is the
/usr/ccs/bin directory. */
@@ -335,8 +329,12 @@ do {
\
%{static:crtbeginT%O%s} %{!static:%{!shared:crtbegin%O%s} \
%{shared:crtbeginS%O%s}}"
#endif
+
+/* The libgcc_stub.a and milli.a libraries must come last. We need
+ to link with these libraries whenever start files are needed. */
#undef ENDFILE_SPEC
-#define ENDFILE_SPEC "%{!shared:crtend%O%s} %{shared:crtendS%O%s}"
+#define ENDFILE_SPEC \
+ "%{!shared:crtend%O%s libgcc_stub.a%s} %{shared:crtendS%O%s} milli.a%s"
/* Since HP uses the .init and .fini sections for array initializers
and finalizers, we need different defines for INIT_SECTION_ASM_OP
[COMMITTED] hpux: New include hack to fix declarations of _DINFINITY, _SINFINITY and _SQNAN
The declarations of _DINFINITY, _SINFINITY and _SQNAN need to be constant
expressions.
Committed to trunk.
Dave
---
2022-02-27 John David Anglin
fixincludes/ChangeLog:
* inclhack.def (hpux_math_constexpr): New hack.
* fixincl.x: Regenerate.
* tests/base/math.h: Update.
diff --git a/fixincludes/inclhack.def b/fixincludes/inclhack.def
index 8400d0c696b..7605ac89aa2 100644
--- a/fixincludes/inclhack.def
+++ b/fixincludes/inclhack.def
@@ -2282,6 +2282,24 @@ fix = {
" }\n";
};
+/*
+ * This hack fixes the declarations of _DINFINITY, _SINFINITY and _SQNAN.
+ */
+fix = {
+hackname = hpux_math_constexpr;
+mach = "*-hp-hpux11*";
+files = math.h;
+sed = "s@^[ \t]*extern[ \t]*const[ \t]*double[ \t]*_DINFINITY;"
+ "[ \t]*$@# define _DINFINITY (__builtin_inf ())@";
+sed = "s@^[ \t]*extern[ \t]*const[ \t]*float[ \t]*_SINFINITY;"
+ "[ \t]*$@#define _SINFINITY (__builtin_inff ())@";
+sed = "s@^[ \t]*extern[ \t]*const[ \t]*float[ \t]*_SQNAN;"
+ "[ \t]*$@#define _SQNAN (__builtin_nanf (\\\"\\\"))@";
+test_text = " extern const double _DINFINITY;\n"
+ " extern const float _SINFINITY;\n"
+ " extern const float _SQNAN;";
+};
+
/*
* Fix hpux 10.X missing ctype declarations 1
*/
diff --git a/fixincludes/tests/base/math.h b/fixincludes/tests/base/math.h
index 7525fd82ecf..29b67579748 100644
--- a/fixincludes/tests/base/math.h
+++ b/fixincludes/tests/base/math.h
@@ -57,6 +57,13 @@
#endif /* HPUX11_CPP_POW_INLINE_CHECK */
+#if defined( HPUX_MATH_CONSTEXPR_CHECK )
+# define _DINFINITY (__builtin_inf ())
+#define _SINFINITY (__builtin_inff ())
+#define _SQNAN (__builtin_nanf (""))
+#endif /* HPUX_MATH_CONSTEXPR_CHECK */
+
+
#if defined( HPUX11_FABSF_CHECK )
#ifdef _PA_RISC
#ifndef __cplusplus
signature.asc
Description: PGP signature
[committed] hppa: Fix typo in t-dimode
This patch fixes a typo in t-dimode. This caused __lshrdi3 to be dropped from libgcc. Tested by build on hppa64-linux-gnu. Committed to trunk and gcc-11. Dave --- Fix typo in t-dimode 2021-11-27 John David Anglin libgcc/ChangeLog: * config/pa/t-dimode (lib2difuncs): Fix typo. diff --git a/libgcc/config/pa/t-dimode b/libgcc/config/pa/t-dimode index 1344e937644..19252a6e6b1 100644 --- a/libgcc/config/pa/t-dimode +++ b/libgcc/config/pa/t-dimode @@ -1,5 +1,5 @@ # Extra DImode libgcc2 functions to build. -lib2difuncs = _muldi3 _negdi2 _lshrdi _ashldi3 _ashrdi3 _cmpdi2 _ucmpdi2 +lib2difuncs = _muldi3 _negdi2 _lshrdi3 _ashldi3 _ashrdi3 _cmpdi2 _ucmpdi2 # Build lib2difuncs. lib2difuncs-o = $(patsubst %,%_di$(objext),$(lib2difuncs))
Re: [PATCH] 32-bit PA-RISC with HP-UX: remove deprecated ports
On 2022-08-26 3:15 a.m., Martin Liška wrote: fixincludes/ChangeLog: * configure: Regenerate. * inclhack.def: Remove patterns for deprecated ports. * fixincl.x: Regenerate. There are problems with the fixincludes changes. These break build on hppa64-hpux11. configure:4015: checking whether we are cross compiling configure:4023: /home/dave/gnu/gcc/objdir64/./gcc/xgcc -B/home/dave/gnu/gcc/objd ir64/./gcc/ -B/opt/gnu64/gcc/gcc-12/hppa64-hp-hpux11.11/bin/ -B/opt/gnu64/gcc/gc c-12/hppa64-hp-hpux11.11/lib/ -isystem /opt/gnu64/gcc/gcc-12/hppa64-hp-hpux11.11 /include -isystem /opt/gnu64/gcc/gcc-12/hppa64-hp-hpux11.11/sys-include -fno-c hecking -o conftest -g -O2 conftest.c >&5 In file included from /home/dave/gnu/gcc/objdir64/gcc/include-fixed/stdio.h:21, from conftest.c:11: /home/dave/gnu/gcc/objdir64/gcc/include-fixed/stdio.h:608:59: error: unknown type name 'va_list' 608 | extern int vsnprintf(char *, __size_t, const char *, __va__list); | ^~ /home/dave/gnu/gcc/objdir64/gcc/include-fixed/stdio.h:116:1: note: 'va_list' is defined in header ''; did you forget to '#include '? 115 | # include Some hpux11 specific hacks are removed. Some non system specific hpux hacks are also removed. One can't trust comments or hacknames to infer applicability. Dave -- John David Anglin dave.ang...@bell.net
Re: [PATCH] 32-bit PA-RISC with HP-UX: remove deprecated ports
On 2022-08-26 3:15 a.m., Martin Liška wrote: Removes the deprecated ports. If I'm correct all hpux9,hpux10 should be removed as they only provide 32-bit targets. On the contrary, hpux11 supports hppa64 that we still do support. It is my understanding that the 32-bit hppa hpux targets were deprecated because they don't support ELF and the DWARF debug format (.stabs is to be removed). Some of the changes to libtool.m4 affect the 32-bit ia64 hpux target. As far as I know, it supports ELF and the DWARF debug format. Possibly, the removal of ia64-hpux should be considered but I think it's a separate issue. Ready to be installed? Thanks, Martin ChangeLog: * config.rpath: Delete hpux9 and hpux10. * configure: Regenerate. * configure.ac: Delete hpux9 and hpux10. * libgo/config/libtool.m4: Ignore 32-bit hpux targets. * libgo/configure: Regenerate. * libtool.m4: Delete hpux9 and hpux10. The libtool.m4 files are from GNU libtool. I don't think these files should be changed. Dave -- John David Anglin dave.ang...@bell.net
Re: [PATCH] 32-bit PA-RISC with HP-UX: remove deprecated ports
On 2022-08-29 10:06 a.m., Martin Liška wrote: Thanks for the feedback, can you please check the updated version of the patch? hppa64-hp-hpux11.11 built successfully with the updated patch: https://gcc.gnu.org/pipermail/gcc-testresults/2022-August/767508.html Dave -- John David Anglin dave.ang...@bell.net
Re: [PATCH] 32-bit PA-RISC with HP-UX: remove deprecated ports
On 2022-08-29 10:06 a.m., Martin Liška wrote: Thanks for the feedback, can you please check the updated version of the patch? The changes to the libffi directory are not necessary and incorrect. libffi is a separate project. Dave -- John David Anglin dave.ang...@bell.net
Re: [PATCH] 32-bit PA-RISC with HP-UX: remove deprecated ports
On 2022-08-29 10:06 a.m., Martin Liška wrote:
Thanks for the feedback, can you please check the updated version of the patch?
@@ -353,9 +347,6 @@ proc check_weak_available { } {
# return 1 if weak undefined symbols are supported.
proc check_effective_target_weak_undefined { } {
- if { [istarget hppa*-*-hpux*] } {
- return 0
- }
This code needs to be retained for hppa64.
@@ -562,7 +553,6 @@ proc check_effective_target_trampolines { } {
if { [istarget avr-*-*]
|| [istarget msp430-*-*]
|| [istarget nvptx-*-*]
- || [istarget hppa2.0w-hp-hpux11.23]
|| [istarget hppa64-hp-hpux11.23]
|| [istarget pru-*-*]
|| [istarget bpf-*-*] } {
The above looks odd. As far as I know, support for trampolines doesn't depend
in any way on hpux11.23.
I suspect the hppa64 line can be removed as well.
@@ -1,4 +0,0 @@
-# The ada virtual array implementation requires that indexing be disabled on
-# hosts such as hpux that use a segmented memory architecture. Both the c
-# and ada files need to be compiled with this option for correct operation.
-ADA_CFLAGS = -mdisable-indexing -D_X_HPUX10
diff --git a/config/mmap.m4 b/config/mmap.m4
index fba0d9d3657..53e5215d833 100644
--- a/config/mmap.m4
+++ b/config/mmap.m4
@@ -42,7 +42,7 @@ else
# Systems known to be in this category are Windows (all variants),
# VMS, and Darwin.
case "$host_os" in
- *vms* | cygwin* | pe | mingw* | darwin* | ultrix* | hpux10* | hpux11.00)
+ *vms* | cygwin* | pe | mingw* | darwin* | ultrix* | hpux11.00)
gcc_cv_func_mmap_dev_zero=no ;;
*)
gcc_cv_func_mmap_dev_zero=yes;;
Strictly, all hpux versions up to and including hpux11.00 don't have /dev/zero.
Dave
--
John David Anglin dave.ang...@bell.net
Re: [PATCH] 32-bit PA-RISC with HP-UX: remove deprecated ports
On 2022-08-30 8:13 p.m., Jeff Law wrote: On 8/28/2022 10:34 AM, John David Anglin wrote: On 2022-08-26 3:15 a.m., Martin Liška wrote: Removes the deprecated ports. If I'm correct all hpux9,hpux10 should be removed as they only provide 32-bit targets. On the contrary, hpux11 supports hppa64 that we still do support. It is my understanding that the 32-bit hppa hpux targets were deprecated because they don't support ELF and the DWARF debug format (.stabs is to be removed). Some of the changes to libtool.m4 affect the 32-bit ia64 hpux target. As far as I know, it supports ELF and the DWARF debug format. If someone really cared, they could support dwarf on the 32bit PA SOM targets -- but I'm not going to lose any sleep over 32bit PA SOM:-) Yes. I thought about working on it. However, although 32bit hppa-hpux lives on in qemu, my main focus is linux. I also had to shutdown my dedicated hpux machine. Dave -- John David Anglin dave.ang...@bell.net
Re: [PATCH][V3] 32-bit PA-RISC with HP-UX: remove deprecated ports
On 2022-08-31 11:35 a.m., Jeff Law wrote: It looks like you removed the pa-bsd and pa-osf targets too. Those were so niche that I doubt anyone else would notice. That should be okay. I have never heard of anyone building these. There is no config for these in config.gcc. hppa*-*-openbsd* and hppa*-*-netbsd* are still somewhat used. Dave -- John David Anglin dave.ang...@bell.net
Re: [PATCH][V3] 32-bit PA-RISC with HP-UX: remove deprecated ports
On 2022-08-31 3:21 a.m., Martin Liška wrote: Sending v3 of the patch that includes John's comments. Ready to be installed? Okay. Dave -- John David Anglin dave.ang...@bell.net
[committed] pa: Update libstdc++-v3 baseline symbols for hppa-linux
Committed to trunk. Dave -- 2019-10-26 John David Anglin * config/abi/post/hppa-linux-gnu/baseline_symbols.txt: Update. Index: config/abi/post/hppa-linux-gnu/baseline_symbols.txt === --- config/abi/post/hppa-linux-gnu/baseline_symbols.txt (revision 277363) +++ config/abi/post/hppa-linux-gnu/baseline_symbols.txt (working copy) @@ -112,6 +112,7 @@ FUNC:_ZN11__gnu_debug19_Safe_sequence_base18_M_detach_singularEv@@GLIBCXX_3.4 FUNC:_ZN11__gnu_debug19_Safe_sequence_base22_M_revalidate_singularEv@@GLIBCXX_3.4 FUNC:_ZN11__gnu_debug19_Safe_sequence_base7_M_swapERS0_@@GLIBCXX_3.4 +FUNC:_ZN11__gnu_debug25_Safe_local_iterator_base16_M_attach_singleEPNS_19_Safe_sequence_baseEb@@GLIBCXX_3.4.26 FUNC:_ZN11__gnu_debug25_Safe_local_iterator_base9_M_attachEPNS_19_Safe_sequence_baseEb@@GLIBCXX_3.4.17 FUNC:_ZN11__gnu_debug25_Safe_local_iterator_base9_M_detachEv@@GLIBCXX_3.4.17 FUNC:_ZN11__gnu_debug30_Safe_unordered_container_base13_M_detach_allEv@@GLIBCXX_3.4.17 @@ -261,6 +262,7 @@ FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE8capacityEv@@GLIBCXX_3.4 FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE8max_sizeEv@@GLIBCXX_3.4 FUNC:_ZNKSbIwSt11char_traitsIwESaIwEE9_M_ibeginEv@@GLIBCXX_3.4 +FUNC:_ZNKSbIwSt11char_traitsIwESaIwEEcvSt17basic_string_viewIwS0_EEv@@GLIBCXX_3.4.26 FUNC:_ZNKSbIwSt11char_traitsIwESaIwEEixEj@@GLIBCXX_3.4 FUNC:_ZNKSi6gcountEv@@GLIBCXX_3.4 FUNC:_ZNKSi6sentrycvbEv@@GLIBCXX_3.4 @@ -328,9 +330,66 @@ FUNC:_ZNKSs8capacityEv@@GLIBCXX_3.4 FUNC:_ZNKSs8max_sizeEv@@GLIBCXX_3.4 FUNC:_ZNKSs9_M_ibeginEv@@GLIBCXX_3.4 +FUNC:_ZNKSscvSt17basic_string_viewIcSt11char_traitsIcEEEv@@GLIBCXX_3.4.26 FUNC:_ZNKSsixEj@@GLIBCXX_3.4 FUNC:_ZNKSt10bad_typeid4whatEv@@GLIBCXX_3.4.9 FUNC:_ZNKSt10error_code23default_error_conditionEv@@GLIBCXX_3.4.11 +FUNC:_ZNKSt10filesystem16filesystem_error4whatEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem16filesystem_error5path1Ev@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem16filesystem_error5path2Ev@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem18directory_iteratordeEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem28recursive_directory_iterator17recursion_pendingEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem28recursive_directory_iterator5depthEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem28recursive_directory_iterator7optionsEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem28recursive_directory_iteratordeEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path11parent_pathEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path12has_filenameEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path13has_root_nameEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path13has_root_pathEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path13relative_pathEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path14root_directoryEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path15has_parent_pathEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path16lexically_normalEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path17_M_find_extensionEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path17has_relative_pathEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path18has_root_directoryEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path18lexically_relativeERKS0_@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path19lexically_proximateERKS0_@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path5_List13_Impl_deleterclEPNS1_5_ImplE@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path5_List3endEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path5_List5beginEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path7compareERKS0_@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path7compareESt17basic_string_viewIcSt11char_traitsIcEE@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path9root_nameEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem4path9root_pathEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem7__cxx1116filesystem_error4whatEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem7__cxx1116filesystem_error5path1Ev@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem7__cxx1116filesystem_error5path2Ev@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem7__cxx1118directory_iteratordeEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem7__cxx1128recursive_directory_iterator17recursion_pendingEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem7__cxx1128recursive_directory_iterator5depthEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem7__cxx1128recursive_directory_iterator7optionsEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem7__cxx1128recursive_directory_iteratordeEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem7__cxx114path11parent_pathEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem7__cxx114path12has_filenameEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem7__cxx114path13has_root_nameEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem7__cxx114path13has_root_pathEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem7__cxx114path13relative_pathEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem7__cxx114path14root_directoryEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem7__cxx114path15has_parent_pathEv@@GLIBCXX_3.4.26 +FUNC:_ZNKSt10filesystem7__cxx114path16lexically_normalEv@@GLIBCXX_3.4.26 +FUNC
[committed] pa: Revise memory barriers to use strongly ordered ldcw instruction
This change revises the memory barrier patterns to use the ldcw instruction
instead of
the sync instruction. The sync instruction performs better and I have more
confidence
in it than sync.
We use a location just above the top of the stack for these operations. The
stack address
is aligned to a 16-byte boundary if the system is not coherent.
I have added two new options. The first is the -mcoherent-ldcw option. The
majority of
PA 2.0 system have coherent caches and as a result the coherent ldcw completer
can be used.
In that case, the ldcw address doesn't require 16-byte alignment. We set the
default to
-mcoherent-ldcw.
The second option is the -mordered option. Although all PA 1.x systems have
ordered memory
accesses, PA 2.0 systems are weakly ordered. Since PA 2.0 are now prevalent,
we set the
default to -mno-ordered. For ordered systems, we fall back to just a compiler
memory barrier.
I believe acquire and release fences can be defined in a similar way using an
ordered load
and an ordered store, respectively.
Tested on hppa-unknown-linux-gnu, hppa2.0w-hp-hpux11.11 and hppa64-hp-hpux11.11.
Committed to trunk.
Dave
2019-11-07 John David Anglin
* config/pa/pa.md (memory_barrier): Revise to use ldcw barriers.
Enhance comment.
(memory_barrier_coherent, memory_barrier_64, memory_barrier_32): New
insn patterns using ldcw instruction.
(memory_barrier): Remove insn pattern using sync instruction.
* config/pa/pa.opt (coherent-ldcw): New option.
(ordered): New option.
Index: config/pa/pa.md
===
--- config/pa/pa.md (revision 277870)
+++ config/pa/pa.md (working copy)
@@ -10086,23 +10086,55 @@
(set_attr "length" "4,16")])
;; PA 2.0 hardware supports out-of-order execution of loads and stores, so
-;; we need a memory barrier to enforce program order for memory references.
-;; Since we want PA 1.x code to be PA 2.0 compatible, we also need the
-;; barrier when generating PA 1.x code.
+;; we need memory barriers to enforce program order for memory references
+;; when the TLB and PSW O bits are not set. We assume all PA 2.0 systems
+;; are weakly ordered since neither HP-UX or Linux set the PSW O bit. Since
+;; we want PA 1.x code to be PA 2.0 compatible, we also need barriers when
+;; generating PA 1.x code even though all PA 1.x systems are strongly ordered.
+;; When barriers are needed, we use a strongly ordered ldcw instruction as
+;; the barrier. Most PA 2.0 targets are cache coherent. In that case, we
+;; can use the coherent cache control hint and avoid aligning the ldcw
+;; address. In spite of its description, it is not clear that the sync
+;; instruction works as a barrier.
+
(define_expand "memory_barrier"
- [(set (match_dup 0)
-(unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))]
+ [(parallel
+ [(set (match_dup 0) (unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))
+ (clobber (match_dup 1))])]
""
{
- operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
+ /* We don't need a barrier if the target uses ordered memory references. */
+ if (TARGET_ORDERED)
+FAIL;
+ operands[1] = gen_reg_rtx (Pmode);
+ operands[0] = gen_rtx_MEM (BLKmode, operands[1]);
MEM_VOLATILE_P (operands[0]) = 1;
})
-(define_insn "*memory_barrier"
+(define_insn "*memory_barrier_coherent"
[(set (match_operand:BLK 0 "" "")
-(unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))]
+(unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))
+ (clobber (match_operand 1 "pmode_register_operand" "=r"))]
+ "TARGET_PA_20 && TARGET_COHERENT_LDCW"
+ "ldcw,co 0(%%sp),%1"
+ [(set_attr "type" "binary")
+ (set_attr "length" "4")])
+
+(define_insn "*memory_barrier_64"
+ [(set (match_operand:BLK 0 "" "")
+(unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))
+(clobber (match_operand 1 "pmode_register_operand" "=&r"))]
+ "TARGET_64BIT"
+ "ldo 15(%%sp),%1\n\tdepd %%r0,63,3,%1\n\tldcw 0(%1),%1"
+ [(set_attr "type" "binary")
+ (set_attr "length" "12")])
+
+(define_insn "*memory_barrier_32"
+ [(set (match_operand:BLK 0 "" "")
+(unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))
+(clobber (match_operand 1 "pmode_register_operand" "=&r"))]
""
- "sync"
+ "ldo 15(%%sp),%1\n\t{dep|depw} %%r0,31,3,%1\n\tldcw 0(%1),%1"
[(set_attr "type" "binary")
- (set_attr "length" "4")])
+ (set_attr "length" "12")])
Index: config/pa/pa.opt
==
Re: [PATCH] c++: Predefine __STDCPP_THREADS__ in the compiler if thread model is not single
On 2020-11-13 1:20 p.m., Jeff Law wrote: > On 11/13/20 10:29 AM, Jakub Jelinek via Gcc-patches wrote: >> Hi! >> >> The following patch predefines __STDCPP_THREADS__ macro to 1 if c++11 or >> later and thread model (e.g. printed by gcc -v) is not single. >> There are two targets not handled by this patch, those that define >> THREAD_MODEL_SPEC. In one case - QNX - it looks just like a mistake >> to me, instead of setting thread_model=posix in config.gcc it uses >> THREAD_MODEL_SPEC macro to set it unconditionally to posix. >> The other is hpux10, which uses -threads option to decide if threads >> are enabled or not, but that option isn't really passed to the compiler. >> I think that is something that really should be solved in config/pa/ >> instead, e.g. in the config/xxx/xxx-c.c targets usually set their own >> predefined macros and it could handle this, and either pass the option >> also to the compiler, or say predefine __STDCPP_THREADS__ if _DCE_THREADS >> macro is defined already (or -D_DCE_THREADS found on the command line), >> or whatever else. >> >> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? >> >> 2020-11-13 Jakub Jelinek >> >> * c-cppbuiltin.c: Include configargs.h. >> (c_cpp_builtins): For C++11 and later if THREAD_MODEL_SPEC is not >> defined, predefine __STDCPP_THREADS__ to 1 unless thread_model is >> "single". > OK. Note that hpux10 should be considered long dead. I wouldn't let > that get in the way of anything. One could argue we should remove > hpux10 and earlier, leaving just hpux11. In principle, I agree. But there are some intereactions in the header defines and I have limited time at the moment. Regards, Dave -- John David Anglin dave.ang...@bell.net
Re: [PATCH] Fix PR libgcc/92988
On 2020-01-15 3:45 p.m., Jeff Law wrote: > On Mon, 2019-12-30 at 14:23 -0500, John David Anglin wrote: >> Tested on hppa64-hp-hpux11.11. >> >> Okay? >> >> Dave >> >> 2019-12-30 John David Anglin >> >> PR libgcc/92988 >> * crtstuff.c (__do_global_dtors_aux): Only call __cxa_finalize if >> DEFAULT_USE_CXA_ATEXIT is true. > Who is supposed to define DEFAULT_USE_CXA_ATEXIT? I can't seem to find > any references to it within GCC itself. > > I don't doubt there's a problem, I'm just not sure we've got the right > #ifdef around the code in question. It is defined by configure. In gcc/defaults.h: /* Determine whether __cxa_atexit, rather than atexit, is used to register C++ destructors for local statics and global objects. */ #ifndef DEFAULT_USE_CXA_ATEXIT #define DEFAULT_USE_CXA_ATEXIT 0 #endif Dave -- John David Anglin dave.ang...@bell.net
[committed] Add include hack to fix missing SCNuMAX defines in inttypes.h on hpux11.[01]*
In porting git trunk to hppa2.0w-hp-hpux11.11, I found that we lack defines for
SCNuMAX:
https://public-inbox.org/git/c9aa5047-7438-8f2f-985c-1c8771354...@bell.net/T/#u
This patch adds the missing defines.
Tested on hppa2.0w-hp-hpux11.11. Committed to trunk.
Dave
2020-01-25 John David Anglin
* inclhack.def (hpux_c99_inttypes4): New, add missing SCNuMAX defines.
* fixincl.x: Regenerate.
* tests/base/inttypes.h: Update for above fix.
fixincludes/inclhack.def | 15 +++
fixincludes/tests/base/inttypes.h | 9 +
2 files changed, 24 insertions(+)
diff --git a/fixincludes/inclhack.def b/fixincludes/inclhack.def
index bf136fdaa20..f58e7771e1c 100644
--- a/fixincludes/inclhack.def
+++ b/fixincludes/inclhack.def
@@ -2613,6 +2613,21 @@ fix = {
"#define UINTPTR_MAX\n";
};
+/*
+ * Fix missing SCNuMAX defines in inttypes.h
+ */
+fix = {
+hackname = hpux_c99_inttypes4;
+mach = "hppa*-hp-hpux11.[01]*";
+files = inttypes.h;
+sed = "/^[ \t]*#[ \t]*define[ \t]*SCNxMAX[ \t]*SCNx64/a\\\n"
+ "#define SCNuMAX \t SCNu64\n";
+sed = "/^[ \t]*#[ \t]*define[ \t]*SCNxMAX[ \t]*SCNx32/a\\\n"
+ "#define SCNuMAX \t SCNu32\n";
+test_text = "#define SCNxMAX SCNx64\n"
+ "#define SCNxMAX SCNx32\n";
+};
+
/*
* Fix hpux broken ctype macros
*/
diff --git a/fixincludes/tests/base/inttypes.h
b/fixincludes/tests/base/inttypes.h
index e2216832666..144ea6596e8 100644
--- a/fixincludes/tests/base/inttypes.h
+++ b/fixincludes/tests/base/inttypes.h
@@ -33,3 +33,12 @@
#endif
#endif /* HPUX_C99_INTTYPES3_CHECK */
+
+
+#if defined( HPUX_C99_INTTYPES4_CHECK )
+#define SCNxMAX SCNx64
+#define SCNuMAX SCNu64
+#define SCNxMAX SCNx32
+#define SCNuMAX SCNu32
+
+#endif /* HPUX_C99_INTTYPES4_CHECK */
[committed] Fix ICE in pa_elf_select_rtx_section
An ICE was noticed in pa_elf_select_rtx_section building googletest on
hppa-unknown-linux-gnu.
This change fixes the problem. It puts function pointer rtx's without a DECL
in .data.rel.ro.local.
Tested on hppa-unknown-linux-gnu. Committed to trunk and gcc-9 branch.
Dave
2020-01-30 John David Anglin
* config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
without a DECL in .data.rel.ro.local.
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index fb7e2ee110f..24b88304637 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -9852,7 +9852,7 @@ pa_elf_select_rtx_section (machine_mode mode, rtx x,
{
tree decl = SYMBOL_REF_DECL (x);
- if (DECL_P (decl) && DECL_COMDAT_GROUP (decl))
+ if (!decl || (DECL_P (decl) && DECL_COMDAT_GROUP (decl)))
return get_named_section (NULL, ".data.rel.ro.local", 1);
}
Re: [PATCH][v2] Always default to DWARF2_DEBUG if not specified, warn about deprecated STABS
On 2021-09-13 9:53 a.m., Jeff Law wrote: >> It is in fact also hpux11*, thus all 32bit pa configs that do not support >> DWARF (for whatever reasons). > We used embedded stabs for SOM (the native format for 32bit PA). SOM is a > variant of COFF and could easily support dwarf I would think since > it had support for fairly arbitrary sections. Hell, it was already > supporting embedded stabs as well as HP's proprietary debugging format. > > But I'd consider 32bit SOM on hpux11 dead too :-) I don't disagree but 32bit SOM still builds on hpux11: https://gcc.gnu.org/pipermail/gcc-testresults/2021-August/718130.html Suspect the change will cause a lot of warnings. There is some support for hpux10/11 in qemu but it takes a lot of work to provide the build infrastructure needed for gcc. DWARF isn't supported because we lack named sections. That could be worked around but probably the gdb versions that work on 32-bit hpux11 wouldn't support DWARF. Dave -- John David Anglin dave.ang...@bell.net
Re: [PATCH][v2] Always default to DWARF2_DEBUG if not specified, warn about deprecated STABS
On 2021-09-13 11:05 a.m., Jeff Law wrote: > > > On 9/13/2021 8:58 AM, John David Anglin wrote: >> On 2021-09-13 9:53 a.m., Jeff Law wrote: >>>> It is in fact also hpux11*, thus all 32bit pa configs that do not support >>>> DWARF (for whatever reasons). >>> We used embedded stabs for SOM (the native format for 32bit PA). SOM is a >>> variant of COFF and could easily support dwarf I would think since >>> it had support for fairly arbitrary sections. Hell, it was already >>> supporting embedded stabs as well as HP's proprietary debugging format. >>> >>> But I'd consider 32bit SOM on hpux11 dead too :-) >> I don't disagree but 32bit SOM still builds on hpux11: >> https://gcc.gnu.org/pipermail/gcc-testresults/2021-August/718130.html >> >> Suspect the change will cause a lot of warnings. > It might, but with stabs going away something needs to be done with these > legacy systems. Either they need to move into the modern world, > deal with the diagnostic or get dropped. I believe the 32-bit SOM target should be deprecated. I'm the only one maintaining it and I had some health issues earlier this year. The current versions should suffice for several years. My main interest is the Debian parisc-linux target. It's fully up to date and thousands of packages are available. Most kernels are 64-bit. Since there's no 64-bit runtime for Linux, we still need the 64-bit hpux target for 64-bit compile testing. > >> >> There is some support for hpux10/11 in qemu but it takes a lot of work to >> provide the build infrastructure needed for gcc. > I would think so. Recently had to move my build infrastructure to a "new" machine, so I'm fully aware that it's not easy. > >> >> DWARF isn't supported because we lack named sections. That could be worked >> around >> but probably the gdb versions that work on 32-bit hpux11 wouldn't support >> DWARF. > I'd be a bit surprised if that were true. dwarf support has been around a > long long time in GDB. Hell, it was around when I did the original > 64bit PA work back in the 90s. There's a chance it might work with the right section names. However dwarf 5 wouldn't be supported. That's an issue that I noticed recently. Dave -- John David Anglin dave.ang...@bell.net
Re: [PATCH][v2] Always default to DWARF2_DEBUG if not specified, warn about deprecated STABS
On 2021-09-15 2:26 a.m., Richard Biener wrote: >> I believe the 32-bit SOM target should be deprecated. I'm the only one >> maintaining it and I had some health issues earlier this year. >> The current versions should suffice for several years. > Do you think it's worth keeping the 32bit pa hpux targets for another > release but guarded with --enable-obsolete or can we remove those > configurations right away? I would choose --enable-obsolete. Currently, things more or less work except for modules. > > In the current setting configurations that do not support DWARF will > get no debug info with -g (with a warning that this happens) and > STABS debug info with -gstabs (with a warning about its deprecation). > That might not be the final outcome for GCC 12 but it's the minimal > change I'm working towards. Is there a simple way to enable -gstabs in build? Dave -- John David Anglin dave.ang...@bell.net
Re: [PATCH][v2] Always default to DWARF2_DEBUG if not specified, warn about deprecated STABS
On 2021-09-15 10:06 a.m., Richard Biener wrote: >> Is there a simple way to enable -gstabs in build? > Currently not. If we're retaining more than pdp11 with a non-DWARF > config I'm considering to allow STABS by default for those without > diagnostics for GCC 12. > > With GCC 13 we'll definitely either remove the configurations or > leave the target without any support for debug info. I tend to think targets without any support for debug information should be removed. There is some time before GCC 13. This provides a chance for the target to implement DWARF support. Dave -- John David Anglin dave.ang...@bell.net
Re: [PATCH] Obsolete hppa[12]*-*-hpux10* and hppa[12]*-*-hpux11*
On 2021-09-20 3:00 a.m., Richard Biener wrote: > As discussed, I'm going to push this (and a changes.html entry) when > it was included in a bootstrap/regtest cycle. GCC 12 still builds on hppa2.0w-hp-hpux11.11 with --enable-obsolete: https://gcc.gnu.org/pipermail/gcc-testresults/2021-September/722961.html -- John David Anglin dave.ang...@bell.net
[PATCH] Fix PR libgcc/92988
Tested on hppa64-hp-hpux11.11. Okay? Dave 2019-12-30 John David Anglin PR libgcc/92988 * crtstuff.c (__do_global_dtors_aux): Only call __cxa_finalize if DEFAULT_USE_CXA_ATEXIT is true. Index: crtstuff.c === --- crtstuff.c (revision 279736) +++ crtstuff.c (working copy) @@ -382,10 +382,12 @@ if (__builtin_expect (completed, 0)) return; +#if DEFAULT_USE_CXA_ATEXIT #ifdef CRTSTUFFS_O if (__cxa_finalize) __cxa_finalize (__dso_handle); #endif +#endif #ifdef FINI_ARRAY_SECTION_ASM_OP /* If we are using .fini_array then destructors will be run via that
[committed] Fix compilation of libgomp/target.c on hppa*-*-hpux11.*
A recent change to target.c introduced the UINTPTR_MAX define. This exposed
the fact that
defines for INTPTR_MAX and UINTPTR_MAX are incomplete, and the define for
SIZE_MAX is missing
on hpux11.11.
See:
https://community.hpe.com/t5/Languages-and-Scripting/SIZE-MAX-undefined/td-p/4798688#
The attached change fixes the INTPTR_MAX and UINTPTR_MAX defines, and adds the
SIZE_MAX define.
The defines are taken from gcc's stdint.h header file.
Tested on hppa2.0w-hp-hpux11.11 and hppa64-hp-hpux11.11.
Committed to trunk.
Dave
2019-12-30 John David Anglin
PR libgomp/93066
* inclhack.def (hpux_c99_inttypes3): Fix defines for INTPTR_MAX
and UINTPTR_MAX, and missing define for SIZE_MAX.
* fixincl.x: Regenerate.
* tests/base/inttypes.h: Update for above fix.
Index: inclhack.def
===
--- inclhack.def(revision 279736)
+++ inclhack.def(working copy)
@@ -2588,6 +2588,32 @@
};
/*
+ * Fix broken and missing defines in inttypes.h
+ */
+fix = {
+hackname = hpux_c99_inttypes3;
+mach = "hppa*-hp-hpux11*";
+files = inttypes.h;
+select= "#define[ \t]INTPTR_MAX[ \t]*\n"
+ "#define[ \t]UINTPTR_MAX[ \t]*\n";
+c_fix = format;
+c_fix_arg = "#undef SIZE_MAX\n"
+ "#define SIZE_MAX __SIZE_MAX__\n"
+ "#ifdef __INTPTR_MAX__\n"
+ "# undef INTPTR_MAX\n"
+ "# define INTPTR_MAX __INTPTR_MAX__\n"
+ "# undef INTPTR_MIN\n"
+ "# define INTPTR_MIN (-INTPTR_MAX - 1)\n"
+ "#endif\n"
+ "#ifdef __UINTPTR_MAX__\n"
+ "# undef UINTPTR_MAX\n"
+ "# define UINTPTR_MAX __UINTPTR_MAX__\n"
+ "#endif\n";
+test_text = "#define INTPTR_MAX\n"
+ "#define UINTPTR_MAX\n";
+};
+
+/*
* Fix hpux broken ctype macros
*/
fix = {
Index: tests/base/inttypes.h
===
--- tests/base/inttypes.h (revision 279736)
+++ tests/base/inttypes.h (working copy)
@@ -16,3 +16,20 @@
#define UINT32_C(__c) __CONCAT__(__c,u)
#endif /* HPUX_C99_INTTYPES_CHECK */
+
+
+#if defined( HPUX_C99_INTTYPES3_CHECK )
+#undef SIZE_MAX
+#define SIZE_MAX __SIZE_MAX__
+#ifdef __INTPTR_MAX__
+# undef INTPTR_MAX
+# define INTPTR_MAX __INTPTR_MAX__
+# undef INTPTR_MIN
+# define INTPTR_MIN (-INTPTR_MAX - 1)
+#endif
+#ifdef __UINTPTR_MAX__
+# undef UINTPTR_MAX
+# define UINTPTR_MAX __UINTPTR_MAX__
+#endif
+
+#endif /* HPUX_C99_INTTYPES3_CHECK */
Re: [PATCH] Fix PR libgcc/92988
This bug was introduced by the following change: https://gcc.gnu.org/ml/gcc-patches/2019-12/msg00766.html On 2019-12-30 2:23 p.m., John David Anglin wrote: > Tested on hppa64-hp-hpux11.11. > > Okay? > > Dave > > 2019-12-30 John David Anglin > > PR libgcc/92988 > * crtstuff.c (__do_global_dtors_aux): Only call __cxa_finalize if > DEFAULT_USE_CXA_ATEXIT is true. > > Index: crtstuff.c > === > --- crtstuff.c(revision 279736) > +++ crtstuff.c(working copy) > @@ -382,10 +382,12 @@ >if (__builtin_expect (completed, 0)) > return; > > +#if DEFAULT_USE_CXA_ATEXIT > #ifdef CRTSTUFFS_O >if (__cxa_finalize) > __cxa_finalize (__dso_handle); > #endif > +#endif > > #ifdef FINI_ARRAY_SECTION_ASM_OP >/* If we are using .fini_array then destructors will be run via that > -- John David Anglin dave.ang...@bell.net
[committed] Update libstdc++ baseline symbols for hppa-linux
Tested on hppa-unkown-linux-gnu. Committed to trunk. Dave 2020-01-01 John David Anglin * config/abi/post/hppa-linux-gnu/baseline_symbols.txt: Update. Index: config/abi/post/hppa-linux-gnu/baseline_symbols.txt === --- config/abi/post/hppa-linux-gnu/baseline_symbols.txt (revision 279815) +++ config/abi/post/hppa-linux-gnu/baseline_symbols.txt (working copy) @@ -4617,16 +4617,10 @@ OBJECT:15:_ZTSSt8numpunctIwE@@GLIBCXX_3.4 OBJECT:16:_ZNSbIwSt11char_traitsIwESaIwEE4_Rep20_S_empty_rep_storageE@@GLIBCXX_3.4 OBJECT:16:_ZNSs4_Rep20_S_empty_rep_storageE@@GLIBCXX_3.4 -OBJECT:16:_ZTIPDd@@CXXABI_1.3.4 -OBJECT:16:_ZTIPDe@@CXXABI_1.3.4 -OBJECT:16:_ZTIPDf@@CXXABI_1.3.4 OBJECT:16:_ZTIPDi@@CXXABI_1.3.3 OBJECT:16:_ZTIPDn@@CXXABI_1.3.5 OBJECT:16:_ZTIPDs@@CXXABI_1.3.3 OBJECT:16:_ZTIPDu@@CXXABI_1.3.12 -OBJECT:16:_ZTIPKDd@@CXXABI_1.3.4 -OBJECT:16:_ZTIPKDe@@CXXABI_1.3.4 -OBJECT:16:_ZTIPKDf@@CXXABI_1.3.4 OBJECT:16:_ZTIPKDi@@CXXABI_1.3.3 OBJECT:16:_ZTIPKDn@@CXXABI_1.3.5 OBJECT:16:_ZTIPKDs@@CXXABI_1.3.3 @@ -5763,9 +5757,6 @@ OBJECT:8:_ZGVNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@@GLIBCXX_3.4 OBJECT:8:_ZGVNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@@GLIBCXX_3.4 OBJECT:8:_ZGVNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@@GLIBCXX_3.4 -OBJECT:8:_ZTIDd@@CXXABI_1.3.4 -OBJECT:8:_ZTIDe@@CXXABI_1.3.4 -OBJECT:8:_ZTIDf@@CXXABI_1.3.4 OBJECT:8:_ZTIDi@@CXXABI_1.3.3 OBJECT:8:_ZTIDn@@CXXABI_1.3.5 OBJECT:8:_ZTIDs@@CXXABI_1.3.3
[committed] Fix comparison operator used for B and S integer comparisons on hppa
This fixes PR target/93111. The ICE The comparison_operator predicate is too broad and includes a couple of comparisons that aren't valid for integer comparisons on hppa. We need to use the ordered_comparison_operator predicate. Similarly, the cmpib_comparison_operator predicate misses a couple of comparisons that are valid for the cmpib patterns. Again we can use the ordered_comparison_operator predicate. Tested on hppa-unknown-linux-gnu. Committed to active branches. Dave 2020-01-01 John David Anglin PR target/93111 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of comparison_operator in B and S integer comparisons. Likewise, use ordered_comparison_operator instead of cmpib_comparison_operator in cmpib patterns. * config/pa/predicates.md (cmpib_comparison_operator): Remove. Index: config/pa/pa.md === --- config/pa/pa.md (revision 279798) +++ config/pa/pa.md (working copy) @@ -765,7 +765,7 @@ (define_insn "scc" [(set (match_operand:SI 0 "register_operand" "=r") - (match_operator:SI 3 "comparison_operator" + (match_operator:SI 3 "ordered_comparison_operator" [(match_operand:SI 1 "reg_or_0_operand" "rM") (match_operand:SI 2 "arith11_operand" "rI")]))] "" @@ -775,7 +775,7 @@ (define_insn "" [(set (match_operand:DI 0 "register_operand" "=r") - (match_operator:DI 3 "comparison_operator" + (match_operator:DI 3 "ordered_comparison_operator" [(match_operand:DI 1 "reg_or_0_operand" "rM") (match_operand:DI 2 "arith11_operand" "rI")]))] "TARGET_64BIT" @@ -785,10 +785,10 @@ (define_insn "iorscc" [(set (match_operand:SI 0 "register_operand" "=r") - (ior:SI (match_operator:SI 3 "comparison_operator" + (ior:SI (match_operator:SI 3 "ordered_comparison_operator" [(match_operand:SI 1 "reg_or_0_operand" "rM") (match_operand:SI 2 "arith11_operand" "rI")]) - (match_operator:SI 6 "comparison_operator" + (match_operator:SI 6 "ordered_comparison_operator" [(match_operand:SI 4 "reg_or_0_operand" "rM") (match_operand:SI 5 "arith11_operand" "rI")])))] "" @@ -798,10 +798,10 @@ (define_insn "" [(set (match_operand:DI 0 "register_operand" "=r") - (ior:DI (match_operator:DI 3 "comparison_operator" + (ior:DI (match_operator:DI 3 "ordered_comparison_operator" [(match_operand:DI 1 "reg_or_0_operand" "rM") (match_operand:DI 2 "arith11_operand" "rI")]) - (match_operator:DI 6 "comparison_operator" + (match_operator:DI 6 "ordered_comparison_operator" [(match_operand:DI 4 "reg_or_0_operand" "rM") (match_operand:DI 5 "arith11_operand" "rI")])))] "TARGET_64BIT" @@ -813,7 +813,7 @@ ;; from an scc insn (negscc and incscc). (define_insn "negscc" [(set (match_operand:SI 0 "register_operand" "=r") - (neg:SI (match_operator:SI 3 "comparison_operator" + (neg:SI (match_operator:SI 3 "ordered_comparison_operator" [(match_operand:SI 1 "reg_or_0_operand" "rM") (match_operand:SI 2 "arith11_operand" "rI")])))] "" @@ -823,7 +823,7 @@ (define_insn "" [(set (match_operand:DI 0 "register_operand" "=r") - (neg:DI (match_operator:DI 3 "comparison_operator" + (neg:DI (match_operator:DI 3 "ordered_comparison_operator" [(match_operand:DI 1 "reg_or_0_operand" "rM") (match_operand:DI 2 "arith11_operand" "rI")])))] "TARGET_64BIT" @@ -904,7 +904,7 @@ (define_insn "incscc" [(set (match_operand:SI 0 "register_operand" "=r,r") - (plus:SI (match_operator:SI 4 "comparison_operator" + (plus:SI (match_operator:SI 4 "ordered_comparison_operator" [(match_operand:SI 2 "register_ope
[committed] Fix placement of references to functions in COMDAT groups on hppa-linux
When I changed pa_reloc_rw_mask() to allow references to function labels to be
placed in .rodata*,
I broke the handling of references to function labels in COMDAT groups. The
linker only allows
references in .data.rel.ro.local to be ignored.
This change puts function label references back in .data.rel.ro.local when they
refer to a function
in a COMDAT group.
Tested on hppa-unknown-linux-gnu. The change fixes the build of the Debian
voronota package.
Committed to trunk and gcc-9 branch.
Dave
2020-01-01 John David Anglin
PR target/67834
* config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
COMDAT group function labels in .data.rel.ro.local section.
* config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
Index: config/pa/pa.c
===
--- config/pa/pa.c (revision 279798)
+++ config/pa/pa.c (working copy)
@@ -203,6 +203,7 @@
static bool pa_modes_tieable_p (machine_mode, machine_mode);
static bool pa_can_change_mode_class (machine_mode, machine_mode, reg_class_t);
static HOST_WIDE_INT pa_starting_frame_offset (void);
+static section* pa_elf_select_rtx_section(machine_mode, rtx, unsigned
HOST_WIDE_INT) ATTRIBUTE_UNUSED;
/* The following extra sections are only used for SOM. */
static GTY(()) section *som_readonly_data_section;
@@ -9838,6 +9839,26 @@
return data_section;
}
+/* Implement pa_elf_select_rtx_section. If X is a function label operand
+ and the function is in a COMDAT group, place the plabel reference in the
+ .data.rel.ro.local section. The linker ignores references to symbols in
+ discarded sections from this section. */
+
+static section *
+pa_elf_select_rtx_section (machine_mode mode, rtx x,
+ unsigned HOST_WIDE_INT align)
+{
+ if (function_label_operand (x, VOIDmode))
+{
+ tree decl = SYMBOL_REF_DECL (x);
+
+ if (DECL_P (decl) && DECL_COMDAT_GROUP (decl))
+ return get_named_section (NULL, ".data.rel.ro.local", 1);
+}
+
+ return default_elf_select_rtx_section (mode, x, align);
+}
+
/* Implement pa_reloc_rw_mask. */
static int
Index: config/pa/pa32-linux.h
===
--- config/pa/pa32-linux.h (revision 279798)
+++ config/pa/pa32-linux.h (working copy)
@@ -76,3 +76,8 @@
rodata when generating non-PIC code. */
#undef JUMP_TABLES_IN_TEXT_SECTION
#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
+
+/* We need to override default selection to put references to functions
+ in COMDAT groups in .data.rel.ro.local. */
+#undef TARGET_ASM_SELECT_RTX_SECTION
+#define TARGET_ASM_SELECT_RTX_SECTION pa_elf_select_rtx_section
Re: [committed] Fix comparison operator used for B and S integer comparisons on hppa
On 2020-01-01 4:11 p.m., John David Anglin wrote: > This fixes PR target/93111. The ICE > > The comparison_operator predicate is too broad and includes a couple of > comparisons > that aren't valid for integer comparisons on hppa. We need to use the > ordered_comparison_operator > predicate. > > Similarly, the cmpib_comparison_operator predicate misses a couple of > comparisons that are valid > for the cmpib patterns. Again we can use the ordered_comparison_operator > predicate. > > Tested on hppa-unknown-linux-gnu. Committed to active branches. Unfortunately, the cmpib_comparison_operator changes broke 64-bit gcc and linux builds. I missed that the patterns using the cmpib_comparison_operator only apply to double word comparisons. The following change reverts this portion of the previous change. Tested on hppa64-hp-hpux11.11 and linux-unknown-linux-gnu. Committed to active branches. Dave 2020-01-06 John David Anglin * config/pa/pa.md: Revert change to use ordered_comparison_operator instead of cmpib_comparison_operator in cmpib patterns. * config/pa/predicates.md (cmpib_comparison_operator): Revert removal of cmpib_comparison_operator. Revise comment. Index: config/pa/pa.md === --- config/pa/pa.md (revision 279888) +++ config/pa/pa.md (working copy) @@ -1524,7 +1524,7 @@ (define_insn "" [(set (pc) (if_then_else -(match_operator 3 "ordered_comparison_operator" +(match_operator 3 "cmpib_comparison_operator" [(match_operand:DI 1 "reg_or_0_operand" "rM") (match_operand:DI 2 "arith5_operand" "rL")]) (label_ref (match_operand 0 "" "")) @@ -1553,7 +1553,7 @@ (define_insn "" [(set (pc) (if_then_else -(match_operator 3 "ordered_comparison_operator" +(match_operator 3 "cmpib_comparison_operator" [(match_operand:DI 1 "reg_or_0_operand" "rM") (match_operand:DI 2 "arith5_operand" "rL")]) (pc) Index: config/pa/predicates.md === --- config/pa/predicates.md (revision 279888) +++ config/pa/predicates.md (working copy) @@ -662,6 +662,12 @@ (and (match_code "symbol_ref") (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC"))) +;; True iff OP is an operator suitable for use in a double-word cmpib +;; instruction. + +(define_predicate "cmpib_comparison_operator" + (match_code "eq,ne,lt,le,leu,gt,gtu,ge")) + ;; True iff OP is an operator suitable for use in a movb instruction. (define_predicate "movb_comparison_operator"
[committed] hppa: Move PREFERRED_DEBUGGING_TYPE define in pa64-hpux.h to pa.h
The D language build on hppa64 does not include pa64-hpux.h. It only includes
pa.h. As
a result PREFERRED_DEBUGGING_TYPE was not defined. This caused a build error
when defaults.h
was included.
The include issue might affect other defines but so far I haven't noticed any
problems.
Tested on hppa64-hp-hpux11.11.
Committed to trunk.
Dave
---
Move PREFERRED_DEBUGGING_TYPE define in pa64-hpux.h to pa.h
This fixes D language build on hppa64-hpux11.
2021-11-05 John David Anglin
gcc/ChangeLog:
* config/pa/pa.h (PREFERRED_DEBUGGING_TYPE): Define to DWARF2_DEBUG.
* config/pa/pa64-hpux.h (PREFERRED_DEBUGGING_TYPE): Remove define.
diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h
index 7a313d617b0..96815ec69cb 100644
--- a/gcc/config/pa/pa.h
+++ b/gcc/config/pa/pa.h
@@ -136,6 +136,9 @@ extern unsigned long total_code_bytes;
by default. */
#define DEFAULT_GDB_EXTENSIONS 1
+/* Select dwarf2 as the preferred debug format. */
+#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
+
/* This used to be zero (no max length), but big enums and such can
cause huge strings which killed gas.
diff --git a/gcc/config/pa/pa64-hpux.h b/gcc/config/pa/pa64-hpux.h
index c25bc38ba64..3ee97a418a2 100644
--- a/gcc/config/pa/pa64-hpux.h
+++ b/gcc/config/pa/pa64-hpux.h
@@ -266,7 +266,6 @@ do {
\
/* It looks like DWARF2 will be the easiest debug format to handle on this
platform. */
#define DWARF2_DEBUGGING_INFO 1
-#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
/* This target uses the ELF object file format. */
#define OBJECT_FORMAT_ELF
[committed] hppa: Support TI mode and soft float on PA64
Without TImode support on hppa64, it is necessary to disable building libgomp
with fortran.
Previously, we didn't support TImode because we need both DImode and TImode
divmod routines
from libgcc. The standard build only builds one of the two. This is nominally
determined
by MIN_UNITS_PER_WORD. I created a makefile fragment to build the needed
DImode routines.
Since the alignment requirements for TImode are not defined, I just assumed the
standard
alignment and calling convention for a structure containing a pair of 64-bit
words.
I also added softfp support based on early mips float format and hppa glibc
exception support.
Tested on hppa64-hp-hpux11.11 and hppa64-unknown-linux-gnu.
Committed on trunk and gcc-11.
Dave
---
Support TI mode and soft float on PA64
This change implements TI mode on PA64. Various new patterns are
added to pa.md. The libgcc build needed modification to build both
DI and TI routines. We also need various softfp routines to
convert to and from TImode.
I added full softfp for the -msoft-float option. At the moment,
this doesn't completely eliminate all use of the floating-point
co-processor. For this, libgcc needs to be built with -msoft-mult.
The floating-point exception support also needs a soft option.
2021-11-05 John David Anglin
PR libgomp/96661
gcc/ChangeLog:
* config/pa/pa-modes.def: Add OImode integer type.
* config/pa/pa.c (pa_scalar_mode_supported_p): Allow TImode
for TARGET_64BIT.
* config/pa/pa.h (MIN_UNITS_PER_WORD) Define to MIN_UNITS_PER_WORD
to UNITS_PER_WORD if IN_LIBGCC2.
* config/pa/pa.md (addti3, addvti3, subti3, subvti3, negti2,
negvti2, ashlti3, shrpd_internal): New patterns.
Change some multi instruction types to multi.
libgcc/ChangeLog:
* config.host (hppa*64*-*-linux*): Revise tmake_file.
(hppa*64*-*-hpux11*): Likewise.
* config/pa/sfp-exceptions.c: New.
* config/pa/sfp-machine.h: New.
* config/pa/t-dimode: New.
* config/pa/t-softfp-sfdftf: New.
diff --git a/gcc/config/pa/pa-modes.def b/gcc/config/pa/pa-modes.def
index 769de66f6b6..6020233c171 100644
--- a/gcc/config/pa/pa-modes.def
+++ b/gcc/config/pa/pa-modes.def
@@ -30,3 +30,6 @@ FLOAT_MODE (TF, 16, mips_quad_format);
/* HPPA floating comparisons produce distinct condition codes. */
CC_MODE (CCFP);
+
+/* Mode used for signed overflow checking of TImode. */
+INT_MODE (OI, 32);
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 21b812e9be7..f22d25a4066 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -6550,18 +6550,16 @@ hppa_gimplify_va_arg_expr (tree valist, tree type,
gimple_seq *pre_p,
/* True if MODE is valid for the target. By "valid", we mean able to
be manipulated in non-trivial ways. In particular, this means all
- the arithmetic is supported.
-
- Currently, TImode is not valid as the HP 64-bit runtime documentation
- doesn't document the alignment and calling conventions for this type.
- Thus, we return false when PRECISION is 2 * BITS_PER_WORD and
- 2 * BITS_PER_WORD isn't equal LONG_LONG_TYPE_SIZE. */
+ the arithmetic is supported. */
static bool
pa_scalar_mode_supported_p (scalar_mode mode)
{
int precision = GET_MODE_PRECISION (mode);
+ if (TARGET_64BIT && mode == TImode)
+return true;
+
switch (GET_MODE_CLASS (mode))
{
case MODE_PARTIAL_INT:
diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h
index 7a313d617b0..96815ec69cb 100644
--- a/gcc/config/pa/pa.h
+++ b/gcc/config/pa/pa.h
@@ -255,11 +258,17 @@ typedef struct GTY(()) machine_function
is UNITS_PER_WORD. Otherwise, it is the constant value that is the
smallest value that UNITS_PER_WORD can have at run-time.
- FIXME: This needs to be 4 when TARGET_64BIT is true to suppress the
- building of various TImode routines in libgcc. The HP runtime
- specification doesn't provide the alignment requirements and calling
- conventions for TImode variables. */
-#define MIN_UNITS_PER_WORD 4
+ This needs to be 8 when TARGET_64BIT is true to allow building various
+ TImode routines in libgcc. However, we also need the DImode DIVMOD
+ routines because they are not currently implemented in pa.md.
+
+ The HP runtime specification doesn't provide the alignment requirements
+ and calling conventions for TImode variables. */
+#ifdef IN_LIBGCC2
+#define MIN_UNITS_PER_WORD UNITS_PER_WORD
+#else
+#define MIN_UNITS_PER_WORD 4
+#endif
/* The widest floating point format supported by the hardware. Note that
setting this influences some Ada floating point type sizes, currently
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index ea6da457fcb..f124c301b7a 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -5357,6 +5357,88 @@
[(set_attr "type" "binary,binary")
(set_attr "length" "
Re: [PATCH] pch: Add support for PCH for relocatable executables
On 2021-11-08 2:48 p.m., Jakub Jelinek wrote: Not really sure about PA or IA-64 function descriptors, are any of those allocated by the dynamic linker rather than created by the static linker? On PA, the static linker creates all function descriptors. The dynamic linker is responsible for resolving descriptors when lazy binding is used. The primary difference between 32 and 64-bit descriptors is that there can be multiple descriptors that resolve to the same function in the 32-bit run time. In the 64-bit case, there is one official procedure descriptor for each function. I guess instead of removing the c-pch.c changes we could remember there not just a function pointer, but also a data pointer and compare if both are either the same or have the same load bias and punt only if they have different bias. Though, on architecture where all function pointers would be dynamically allocated and could change any time even that wouldn't be really a reliable check. There is no call to dynamically allocate a descriptor but it is possible for code to dynamically build a descriptor. Dave -- John David Anglin dave.ang...@bell.net
[committed] libiberty: Use libiberty snprintf and vsnprintf on hppa*-*-hpux*
A recent change to gcc/c-family/c-attribs.c uses a c99 feature not supported by
most
system versions of snprintf on hppa*-*-hpux*. This change fixes the build.
Tested on hppa2.0w-hp-hpux11.11 and hppa64-hp-hpux11.11.
Committed to trunk.
libiberty/ChangeLog:
PR target/100734
* configure.ac: Use libiberty snprintf and vsnprintf on
hppa*-*-hpux*.
* configure: Regenerate.
diff --git a/libiberty/configure.ac b/libiberty/configure.ac
index 3c03f24d368..a85ff25501a 100644
--- a/libiberty/configure.ac
+++ b/libiberty/configure.ac
@@ -611,6 +611,12 @@ if test -z "${setobjs}"; then
ac_cv_func_getpagesize=yes
;;
+ hppa*-*-hpux*)
+# Replace system snprintf and vsnprintf with libiberty implementations.
+AC_LIBOBJ([snprintf])
+AC_LIBOBJ([vsnprintf])
+;;
+
*-*-mingw32*)
# Under mingw32, sys_nerr and sys_errlist exist, but they are
# macros, so the test below won't find them.
--
John David Anglin dave.ang...@bell.net
[committed] hppa: Default to dwarf version 4 on hppa64-hpux
DWARF5 is not supported by gdb on hpux, so we need to to limit version to 4.
Tested on hppa64-hp-hpux11.11. Committed to trunk and gcc-11.
Dave
---
Default to dwarf version 4 on hppa64-hpux
2021-10-01 John David Anglin
gcc/ChangeLog:
PR debug/102373
* config/pa/pa.c (pa_option_override): Default to dwarf version 4
on hppa64-hpux.
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 06143023b46..5b3ffd48f4e 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -541,6 +541,16 @@ pa_option_override (void)
write_symbols = NO_DEBUG;
}
+ if (TARGET_64BIT && TARGET_HPUX)
+{
+ /* DWARF5 is not supported by gdb. Don't emit DWARF5 unless
+specifically selected. */
+ if (!global_options_set.x_dwarf_strict)
+ dwarf_strict = 1;
+ if (!global_options_set.x_dwarf_version)
+ dwarf_version = 4;
+}
+
/* We only support the "big PIC" model now. And we always generate PIC
code when in 64bit mode. */
if (flag_pic == 1 || TARGET_64BIT)
[committed] hppa: Add support for 32-bit hppa targets in muldi3 expander
This patches patch allows inlining 64-bit hardware multiplication on 32-bit
hppa targets
instead of using __muldi3 from libgcc. This should improve performance at the
expense of
a slight increase in code size.
We need this because I am testing a change to build libgcc with software float
and integer
multiplication.
Tested on hppa2.0w-hp-hpux11.11, hppa64-hp-hpux11.11 and
hppa-unknown-linux-gnu. Committed to
all active branches.
Dave
---
Add support for 32-bit hppa targets in muldi3 expander
2021-10-13 John David Anglin
gcc/ChangeLog:
* config/pa/pa.md (muldi3): Add support for inlining 64-bit
multiplication on 32-bit PA 1.1 and 2.0 targets.
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index b314f96de35..10623dd6fdb 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -5374,32 +5374,38 @@
[(set (match_operand:DI 0 "register_operand" "")
(mult:DI (match_operand:DI 1 "register_operand" "")
(match_operand:DI 2 "register_operand" "")))]
- "TARGET_64BIT && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT"
+ "! optimize_size
+ && TARGET_PA_11
+ && ! TARGET_DISABLE_FPREGS
+ && ! TARGET_SOFT_FLOAT"
"
{
rtx low_product = gen_reg_rtx (DImode);
rtx cross_product1 = gen_reg_rtx (DImode);
rtx cross_product2 = gen_reg_rtx (DImode);
- rtx cross_scratch = gen_reg_rtx (DImode);
- rtx cross_product = gen_reg_rtx (DImode);
rtx op1l, op1r, op2l, op2r;
- rtx op1shifted, op2shifted;
-
- op1shifted = gen_reg_rtx (DImode);
- op2shifted = gen_reg_rtx (DImode);
- op1l = gen_reg_rtx (SImode);
- op1r = gen_reg_rtx (SImode);
- op2l = gen_reg_rtx (SImode);
- op2r = gen_reg_rtx (SImode);
-
- emit_move_insn (op1shifted, gen_rtx_LSHIFTRT (DImode, operands[1],
- GEN_INT (32)));
- emit_move_insn (op2shifted, gen_rtx_LSHIFTRT (DImode, operands[2],
- GEN_INT (32)));
- op1r = force_reg (SImode, gen_rtx_SUBREG (SImode, operands[1], 4));
- op2r = force_reg (SImode, gen_rtx_SUBREG (SImode, operands[2], 4));
- op1l = force_reg (SImode, gen_rtx_SUBREG (SImode, op1shifted, 4));
- op2l = force_reg (SImode, gen_rtx_SUBREG (SImode, op2shifted, 4));
+
+ if (TARGET_64BIT)
+{
+ rtx op1shifted = gen_reg_rtx (DImode);
+ rtx op2shifted = gen_reg_rtx (DImode);
+
+ emit_move_insn (op1shifted, gen_rtx_LSHIFTRT (DImode, operands[1],
+ GEN_INT (32)));
+ emit_move_insn (op2shifted, gen_rtx_LSHIFTRT (DImode, operands[2],
+ GEN_INT (32)));
+ op1r = force_reg (SImode, gen_rtx_SUBREG (SImode, operands[1], 4));
+ op2r = force_reg (SImode, gen_rtx_SUBREG (SImode, operands[2], 4));
+ op1l = force_reg (SImode, gen_rtx_SUBREG (SImode, op1shifted, 4));
+ op2l = force_reg (SImode, gen_rtx_SUBREG (SImode, op2shifted, 4));
+}
+ else
+{
+ op1r = force_reg (SImode, gen_lowpart (SImode, operands[1]));
+ op2r = force_reg (SImode, gen_lowpart (SImode, operands[2]));
+ op1l = force_reg (SImode, gen_highpart (SImode, operands[1]));
+ op2l = force_reg (SImode, gen_highpart (SImode, operands[2]));
+}
/* Emit multiplies for the cross products. */
emit_insn (gen_umulsidi3 (cross_product1, op2r, op1l));
@@ -5408,13 +5414,35 @@
/* Emit a multiply for the low sub-word. */
emit_insn (gen_umulsidi3 (low_product, copy_rtx (op2r), copy_rtx (op1r)));
- /* Sum the cross products and shift them into proper position. */
- emit_insn (gen_adddi3 (cross_scratch, cross_product1, cross_product2));
- emit_insn (gen_ashldi3 (cross_product, cross_scratch, GEN_INT (32)));
+ if (TARGET_64BIT)
+{
+ rtx cross_scratch = gen_reg_rtx (DImode);
+ rtx cross_product = gen_reg_rtx (DImode);
- /* Add the cross product to the low product and store the result
- into the output operand . */
- emit_insn (gen_adddi3 (operands[0], cross_product, low_product));
+ /* Sum the cross products and shift them into proper position. */
+ emit_insn (gen_adddi3 (cross_scratch, cross_product1, cross_product2));
+ emit_insn (gen_ashldi3 (cross_product, cross_scratch, GEN_INT (32)));
+
+ /* Add the cross product to the low product and store the result
+into the output operand . */
+ emit_insn (gen_adddi3 (operands[0], cross_product, low_product));
+}
+ else
+{
+ rtx cross_scratch = gen_reg_rtx (SImode);
+
+ /* Sum cross products. */
+ emit_move_insn (cross_scratch,
+ gen_rtx_PLUS (SImode,
+ gen_lowpart (SImode, cross_product1),
+ gen_lowpart (SImode, cross_product2)));
+ emit_move_insn (gen_lowpart (SImode, op
[committed] hppa: Fix TARGET_SOFT_FLOAT patterns in pa.md
This change fixes building libgcc with -msoft-float. Getting soft float to
work in libgcc
is still a work in progress.
Tested on hppa-unkown-linux-gnu, hppa2.0w-hp-hpux11.11 and hppa64-hp-hpux11.11.
Committed to active branches.
Dave
---
Fix TARGET_SOFT_FLOAT patterns in pa.md
2021-10-13 John David Anglin
gcc/ChangeLog:
* config/pa/pa.md (cbranchsf4): Disable if TARGET_SOFT_FLOAT.
(cbranchdf4): Likewise.
Add missing move patterns for TARGET_SOFT_FLOAT.
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index b314f96de35..ba947ab1be9 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -1383,7 +1383,7 @@
(match_operand:SF 2 "reg_or_0_operand" "")])
(label_ref (match_operand 3 "" ""))
(pc)))]
- ""
+ "! TARGET_SOFT_FLOAT"
"
{
pa_emit_bcond_fp (operands);
@@ -1398,7 +1398,7 @@
(match_operand:DF 2 "reg_or_0_operand" "")])
(label_ref (match_operand 3 "" ""))
(pc)))]
- ""
+ "! TARGET_SOFT_FLOAT"
"
{
pa_emit_bcond_fp (operands);
@@ -2236,6 +2236,29 @@
(set_attr "pa_combine_type" "addmove")
(set_attr "length" "4,4,4,4,4,4,4,4,4,4,4,4")])
+(define_insn ""
+ [(set (match_operand:SI 0 "move_dest_operand"
+ "=r,r,r,r,r,r,Q,!*q,!r")
+ (match_operand:SI 1 "move_src_operand"
+ "A,r,J,N,K,RQ,rM,!rM,!*q"))]
+ "(register_operand (operands[0], SImode)
+|| reg_or_0_operand (operands[1], SImode))
+ && TARGET_SOFT_FLOAT
+ && TARGET_64BIT"
+ "@
+ ldw RT'%A1,%0
+ copy %1,%0
+ ldi %1,%0
+ ldil L'%1,%0
+ {zdepi|depwi,z} %Z1,%0
+ ldw%M1 %1,%0
+ stw%M0 %r1,%0
+ mtsar %r1
+ {mfctl|mfctl,w} %%sar,%0"
+ [(set_attr "type" "load,move,move,move,shift,load,store,move,move")
+ (set_attr "pa_combine_type" "addmove")
+ (set_attr "length" "4,4,4,4,4,4,4,4,4")])
+
(define_insn ""
[(set (match_operand:SI 0 "indexed_memory_operand" "=R")
(match_operand:SI 1 "register_operand" "f"))]
@@ -4042,6 +4065,25 @@
(set_attr "pa_combine_type" "addmove")
(set_attr "length" "4,4,4,4,4,4,4,4,4")])
+(define_insn ""
+ [(set (match_operand:DF 0 "move_dest_operand"
+ "=!*r,*r,*r,*r,*r,Q")
+ (match_operand:DF 1 "move_src_operand"
+ "!*r,J,N,K,RQ,*rG"))]
+ "(register_operand (operands[0], DFmode)
+|| reg_or_0_operand (operands[1], DFmode))
+ && TARGET_SOFT_FLOAT && TARGET_64BIT"
+ "@
+ copy %1,%0
+ ldi %1,%0
+ ldil L'%1,%0
+ depdi,z %z1,%0
+ ldd%M1 %1,%0
+ std%M0 %r1,%0"
+ [(set_attr "type" "move,move,move,shift,load,store")
+ (set_attr "pa_combine_type" "addmove")
+ (set_attr "length" "4,4,4,4,4,4")])
+
(define_expand "movdi"
[(set (match_operand:DI 0 "general_operand" "")
@@ -4200,6 +4242,28 @@
(set_attr "pa_combine_type" "addmove")
(set_attr "length" "4,4,4,4,4,4,4,4,4,4,4,4")])
+(define_insn ""
+ [(set (match_operand:DI 0 "move_dest_operand"
+ "=r,r,r,r,r,r,Q,!*q,!r")
+ (match_operand:DI 1 "move_src_operand"
+ "A,r,J,N,K,RQ,rM,!rM,!*q"))]
+ "(register_operand (operands[0], DImode)
+|| reg_or_0_operand (operands[1], DImode))
+ && TARGET_SOFT_FLOAT && TARGET_64BIT"
+ "@
+ ldd RT'%A1,%0
+ copy %1,%0
+ ldi %1,%0
+ ldil L'%1,%0
+ depdi,z %z1,%0
+ ldd%M1 %1,%0
+ std%M0 %r1,%0
+ mtsar %r1
+ {mfctl|mfctl,w} %%sar,%0"
+ [(set_attr "type" "load,move,move,move,shift,load,store,move,move")
+ (set_attr "pa_combine_type" "addmove")
+ (set_attr "length" "4,4,4,4,4,4,4,4,4")])
+
(define_insn ""
[(set (match_operand:DI 0 "indexed_memory_operand" "=R")
(match_operand:DI 1 "register_operand" "f"))]
@@ -4405,6 +4469,23 @@
(set_attr "pa_combine_type" "addmove")
(set_attr "length" "4,4,4,4,4,4")])
+(define_insn ""
+ [(set (match_operand:SF 0 "move_dest_operand"
+ "=!*r,*r,Q")
+ (match_operand:SF 1 "reg_or_0_or_nonsymb_mem_operand"
+ "!*rG,RQ,*rG"))]
+ "(register_operand (operands[0], SFmode)
+|| reg_or_0_operand (operands[1], SFmode))
+ && TARGET_SOFT_FLOAT
+ && TARGET_64BIT"
+ "@
+ copy %r1,%0
+ ldw%M1 %1,%0
+ stw%M0 %r1,%0"
+ [(set_attr "type" "move,load,store")
+ (set_attr "pa_combine_type" "addmove")
+ (set_attr "length" "4,4,4")])
+
(define_insn ""
[(set (match_operand:SF 0 "indexed_memory_operand" "=R")
(match_operand:SF 1 "register_operand" "f"))]
[committed] hppa: Consistently use "rG" constraint for copy instruction in move patterns
Some move patterns on hppa use the "rG" constraint and some just use the "r"
constraint
for the copy instruction. This patch makes all the move patterns consistent.
It causes
a copy of register %r0 to always be used to zero a register.
There's no functional change since there are multiple ways to zero integer
registers.
Tested on hppa2.0w-hp-hpux11.11 and hppa64-hp-hpux11.11.
Committed to active branches.
Dave
---
Consistently use "rG" constraint for copy instruction in move patterns
2021-10-15 John David Anglin
gcc/ChangeLog:
* config/pa/pa.md: Consistently use "rG" constraint for copy
instruction in move patterns.
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index 13a25381b6d..5cda3b79933 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -2186,14 +2186,14 @@
[(set (match_operand:SI 0 "move_dest_operand"
"=r,r,r,r,r,r,Q,!*q,!r,!*f,*f,T,?r,?*f")
(match_operand:SI 1 "move_src_operand"
- "A,r,J,N,K,RQ,rM,!rM,!*q,!*fM,RT,*f,*f,r"))]
+ "A,rG,J,N,K,RQ,rM,!rM,!*q,!*fM,RT,*f,*f,r"))]
"(register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))
&& !TARGET_SOFT_FLOAT
&& !TARGET_64BIT"
"@
ldw RT'%A1,%0
- copy %1,%0
+ copy %r1,%0
ldi %1,%0
ldil L'%1,%0
{zdepi|depwi,z} %Z1,%0
@@ -2214,14 +2214,14 @@
[(set (match_operand:SI 0 "move_dest_operand"
"=r,r,r,r,r,r,Q,!*q,!r,!*f,*f,T")
(match_operand:SI 1 "move_src_operand"
- "A,r,J,N,K,RQ,rM,!rM,!*q,!*fM,RT,*f"))]
+ "A,rG,J,N,K,RQ,rM,!rM,!*q,!*fM,RT,*f"))]
"(register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))
&& !TARGET_SOFT_FLOAT
&& TARGET_64BIT"
"@
ldw RT'%A1,%0
- copy %1,%0
+ copy %r1,%0
ldi %1,%0
ldil L'%1,%0
{zdepi|depwi,z} %Z1,%0
@@ -2240,14 +2240,14 @@
[(set (match_operand:SI 0 "move_dest_operand"
"=r,r,r,r,r,r,Q,!*q,!r")
(match_operand:SI 1 "move_src_operand"
- "A,r,J,N,K,RQ,rM,!rM,!*q"))]
+ "A,rG,J,N,K,RQ,rM,!rM,!*q"))]
"(register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))
&& TARGET_SOFT_FLOAT
&& TARGET_64BIT"
"@
ldw RT'%A1,%0
- copy %1,%0
+ copy %r1,%0
ldi %1,%0
ldil L'%1,%0
{zdepi|depwi,z} %Z1,%0
@@ -2381,13 +2381,13 @@
[(set (match_operand:SI 0 "move_dest_operand"
"=r,r,r,r,r,r,Q,!*q,!r")
(match_operand:SI 1 "move_src_operand"
- "A,r,J,N,K,RQ,rM,!rM,!*q"))]
+ "A,rG,J,N,K,RQ,rM,!rM,!*q"))]
"(register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))
&& TARGET_SOFT_FLOAT"
"@
ldw RT'%A1,%0
- copy %1,%0
+ copy %r1,%0
ldi %1,%0
ldil L'%1,%0
{zdepi|depwi,z} %Z1,%0
@@ -2909,11 +2909,11 @@
[(set (match_operand:HI 0 "move_dest_operand"
"=r,r,r,r,r,Q,!*q,!r")
(match_operand:HI 1 "move_src_operand"
- "r,J,N,K,RQ,rM,!rM,!*q"))]
+ "rG,J,N,K,RQ,rM,!rM,!*q"))]
"(register_operand (operands[0], HImode)
|| reg_or_0_operand (operands[1], HImode))"
"@
- copy %1,%0
+ copy %r1,%0
ldi %1,%0
ldil L'%1,%0
{zdepi|depwi,z} %Z1,%0
@@ -3069,11 +3069,11 @@
[(set (match_operand:QI 0 "move_dest_operand"
"=r,r,r,r,r,Q,!*q,!r")
(match_operand:QI 1 "move_src_operand"
- "r,J,N,K,RQ,rM,!rM,!*q"))]
+ "rG,J,N,K,RQ,rM,!rM,!*q"))]
"(register_operand (operands[0], QImode)
|| reg_or_0_operand (operands[1], QImode))"
"@
- copy %1,%0
+ copy %r1,%0
ldi %1,%0
ldil L'%1,%0
{zdepi|depwi,z} %Z1,%0
@@ -4047,12 +4047,12 @@
[(set (match_operand:DF 0 "move_dest_operand"
"=!*r,*r,*r,*r,*r,Q,f,f,T")
(match_operand:DF 1 "move_src_operand"
- "!*r,J,N,K,RQ,*rG,fG,RT,f"))]
+ "!*rG,J,N,K,RQ,*rG,fG,RT,f"))]
"(register_operand (operands[0], DFmode)
|| reg_or_0_operand (operands[1], DFmode))
&& !TARGET_SOFT_FLOAT && TARGET_64BIT"
"@
- copy %1,%0
+
[committed] hppa: Don't use 'G' constraint in integer move patterns
The 'G' constraint only matches a float zero, so it will never match in integer
move patterns.
Tested on hppa-unknown-linux-gnu. Committed to active branches.
Dave
---
Don't use 'G' constraint in integer move patterns
The 'G' constraint only matches a float zero.
2021-10-24 John David Anglin
gcc/ChangeLog:
* config/pa/pa.md: Don't use 'G' constraint in integer move patterns.
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index 5cda3b79933..c1864524b38 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -2186,14 +2186,14 @@
[(set (match_operand:SI 0 "move_dest_operand"
"=r,r,r,r,r,r,Q,!*q,!r,!*f,*f,T,?r,?*f")
(match_operand:SI 1 "move_src_operand"
- "A,rG,J,N,K,RQ,rM,!rM,!*q,!*fM,RT,*f,*f,r"))]
+ "A,r,J,N,K,RQ,rM,!rM,!*q,!*fM,RT,*f,*f,r"))]
"(register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))
&& !TARGET_SOFT_FLOAT
&& !TARGET_64BIT"
"@
ldw RT'%A1,%0
- copy %r1,%0
+ copy %1,%0
ldi %1,%0
ldil L'%1,%0
{zdepi|depwi,z} %Z1,%0
@@ -2214,14 +2214,14 @@
[(set (match_operand:SI 0 "move_dest_operand"
"=r,r,r,r,r,r,Q,!*q,!r,!*f,*f,T")
(match_operand:SI 1 "move_src_operand"
- "A,rG,J,N,K,RQ,rM,!rM,!*q,!*fM,RT,*f"))]
+ "A,r,J,N,K,RQ,rM,!rM,!*q,!*fM,RT,*f"))]
"(register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))
&& !TARGET_SOFT_FLOAT
&& TARGET_64BIT"
"@
ldw RT'%A1,%0
- copy %r1,%0
+ copy %1,%0
ldi %1,%0
ldil L'%1,%0
{zdepi|depwi,z} %Z1,%0
@@ -2240,14 +2240,14 @@
[(set (match_operand:SI 0 "move_dest_operand"
"=r,r,r,r,r,r,Q,!*q,!r")
(match_operand:SI 1 "move_src_operand"
- "A,rG,J,N,K,RQ,rM,!rM,!*q"))]
+ "A,r,J,N,K,RQ,rM,!rM,!*q"))]
"(register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))
&& TARGET_SOFT_FLOAT
&& TARGET_64BIT"
"@
ldw RT'%A1,%0
- copy %r1,%0
+ copy %1,%0
ldi %1,%0
ldil L'%1,%0
{zdepi|depwi,z} %Z1,%0
@@ -2381,13 +2381,13 @@
[(set (match_operand:SI 0 "move_dest_operand"
"=r,r,r,r,r,r,Q,!*q,!r")
(match_operand:SI 1 "move_src_operand"
- "A,rG,J,N,K,RQ,rM,!rM,!*q"))]
+ "A,r,J,N,K,RQ,rM,!rM,!*q"))]
"(register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))
&& TARGET_SOFT_FLOAT"
"@
ldw RT'%A1,%0
- copy %r1,%0
+ copy %1,%0
ldi %1,%0
ldil L'%1,%0
{zdepi|depwi,z} %Z1,%0
@@ -2909,11 +2909,11 @@
[(set (match_operand:HI 0 "move_dest_operand"
"=r,r,r,r,r,Q,!*q,!r")
(match_operand:HI 1 "move_src_operand"
- "rG,J,N,K,RQ,rM,!rM,!*q"))]
+ "r,J,N,K,RQ,rM,!rM,!*q"))]
"(register_operand (operands[0], HImode)
|| reg_or_0_operand (operands[1], HImode))"
"@
- copy %r1,%0
+ copy %1,%0
ldi %1,%0
ldil L'%1,%0
{zdepi|depwi,z} %Z1,%0
@@ -3069,11 +3069,11 @@
[(set (match_operand:QI 0 "move_dest_operand"
"=r,r,r,r,r,Q,!*q,!r")
(match_operand:QI 1 "move_src_operand"
- "rG,J,N,K,RQ,rM,!rM,!*q"))]
+ "r,J,N,K,RQ,rM,!rM,!*q"))]
"(register_operand (operands[0], QImode)
|| reg_or_0_operand (operands[1], QImode))"
"@
- copy %r1,%0
+ copy %1,%0
ldi %1,%0
ldil L'%1,%0
{zdepi|depwi,z} %Z1,%0
@@ -4221,13 +4221,13 @@
[(set (match_operand:DI 0 "move_dest_operand"
"=r,r,r,r,r,r,Q,!*q,!r,!*f,*f,T")
(match_operand:DI 1 "move_src_operand"
- "A,rG,J,N,K,RQ,rM,!rM,!*q,!*fM,RT,*f"))]
+ "A,r,J,N,K,RQ,rM,!rM,!*q,!*fM,RT,*f"))]
"(register_operand (operands[0], DImode)
|| reg_or_0_operand (operands[1], DImode))
&& !TARGET_SOFT_FLOAT && TARGET_64BIT"
"@
ldd RT'%A1,%0
- copy %r1,%0
+ copy %1,%0
ldi %1,%0
ldil L'%1,%0
depdi,z %z1,%0
@@ -4246,13 +4246,13 @@
[(set (match_operand:DI 0 "move_dest_operand"
"=r,r,r,r,r,r,Q,!*q,!r")
(match_operand:DI 1 "move_src_operand"
- "A,rG,J,N,K,RQ,rM,!rM,!*q"))]
+ "A,r,J,N,K,RQ,rM,!rM,!*q"))]
"(register_operand (operands[0], DImode)
|| reg_or_0_operand (operands[1], DImode))
&& TARGET_SOFT_FLOAT && TARGET_64BIT"
"@
ldd RT'%A1,%0
- copy %r1,%0
+ copy %1,%0
ldi %1,%0
ldil L'%1,%0
depdi,z %z1,%0
[committed] hppa: Revise -mdisable-fpregs option and add new -msoft-mult option
The Linux kernel on hppa is built with -mdisable-fpregs to inhibit the use of
the floating-point
registers. However, I noticed that the 64-bit kernel was using floating-point
registers for hardware
integer multiplication (xmpyu). It turned out this was because various DImode
routines in libgcc
(e.g., __muldi3) were built with hardware integer multiplication enabled. This
turned out not to
be a problem as currently the kernel saves the floating-point registers in
syscalls, etc. But it
was the intention that the floating-point registers not be used in kernel code.
It also turned out that -mdisable-fpregs didn't disable use of the
floating-point registers as documented.
The -msoft-float option does that. What the kernel needs is an option to
disable hardware integer multiplication.
This is sufficient to avoid the use of the floating-point registers. It
appears -mdisable-fpregs was originally
intended to disable use of xmpyu but its operation got confused with time.
The attached change has been tested on hppa2.0w-hp-hpux11.11,
hppa64-hp-hpux11.11 and hppa-unknown-linux-gnu.
I also checked that libgcc can be built with -msoft-mult. It currently is not
configured to build successfully
with -msoft-float.
Committed to trunk and gcc-11 branch.
Dave
---
Revise -mdisable-fpregs option and add new -msoft-mult option
The behavior of the -mdisable-fpregs is confusing in that it doesn't
disable the use of the floating-point registers in all situations.
The -msoft-float disables the use of the floating-point registers in
all situations. The Linux kernel only needs to disable use of the
xmpyu instruction to avoid using the floating-point registers.
This change revises the -mdisable-fpregs option to disable the use of
the floating-point registers in all situations. It is now equivalent
to the -msoft-float option. A new -msoft-mult option is added to
disable use of the xmpyu instruction. The libgcc library can be
compiled with the -msoft-mult option to avoid using hardware integer
multiplication.
2021-10-24 John David Anglin
gcc/ChangeLog:
* config/pa/pa-d.c (pa_d_handle_target_float_abi): Don't check
TARGET_DISABLE_FPREGS.
* config/pa/pa.c (fix_range): Use MASK_SOFT_FLOAT instead of
MASK_DISABLE_FPREGS.
(hppa_rtx_costs): Don't check TARGET_DISABLE_FPREGS. Adjust
cost of hardware integer multiplication.
(pa_conditional_register_usage): Don't check TARGET_DISABLE_FPREGS.
* config/pa/pa.h (INT14_OK_STRICT): Likewise.
* config/pa/pa.md: Don't check TARGET_DISABLE_FPREGS. Check
TARGET_SOFT_FLOAT in patterns that use xmpyu instruction.
* config/pa/pa.opt (mdisable-fpregs): Change target mask to
SOFT_FLOAT. Revise comment.
(msoft-float): New option.
diff --git a/gcc/config/pa/pa-d.c b/gcc/config/pa/pa-d.c
index 6802738e85b..14ef8cae343 100644
--- a/gcc/config/pa/pa-d.c
+++ b/gcc/config/pa/pa-d.c
@@ -47,7 +47,7 @@ pa_d_handle_target_float_abi (void)
{
const char *abi;
- if (TARGET_DISABLE_FPREGS || TARGET_SOFT_FLOAT)
+ if (TARGET_SOFT_FLOAT)
abi = "soft";
else
abi = "hard";
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index d13021ad94a..21b812e9be7 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -497,7 +497,7 @@ fix_range (const char *const_str)
break;
if (i > FP_REG_LAST)
-target_flags |= MASK_DISABLE_FPREGS;
+target_flags |= MASK_SOFT_FLOAT;
}
/* Implement the TARGET_OPTION_OVERRIDE hook. */
@@ -1578,14 +1578,14 @@ hppa_rtx_costs (rtx x, machine_mode mode, int
outer_code,
}
else if (mode == DImode)
{
- if (TARGET_PA_11 && !TARGET_DISABLE_FPREGS && !TARGET_SOFT_FLOAT)
- *total = COSTS_N_INSNS (32);
+ if (TARGET_PA_11 && !TARGET_SOFT_FLOAT && !TARGET_SOFT_MULT)
+ *total = COSTS_N_INSNS (25);
else
*total = COSTS_N_INSNS (80);
}
else
{
- if (TARGET_PA_11 && !TARGET_DISABLE_FPREGS && !TARGET_SOFT_FLOAT)
+ if (TARGET_PA_11 && !TARGET_SOFT_FLOAT && !TARGET_SOFT_MULT)
*total = COSTS_N_INSNS (8);
else
*total = COSTS_N_INSNS (20);
@@ -10627,7 +10627,7 @@ pa_conditional_register_usage (void)
for (i = 33; i < 56; i += 2)
fixed_regs[i] = call_used_regs[i] = 1;
}
- if (TARGET_DISABLE_FPREGS || TARGET_SOFT_FLOAT)
+ if (TARGET_SOFT_FLOAT)
{
for (i = FP_REG_FIRST; i <= FP_REG_LAST; i++)
fixed_regs[i] = call_used_regs[i] = 1;
diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h
index fbb96045a51..7a313d617b0 100644
--- a/gcc/config/pa/pa.h
+++ b/gcc/config/pa/pa.h
@@ -833,7 +833,6 @@ extern int may_call_alloca;
#define INT14_OK_STRICT \
(TARGET_SOFT_FLOAT \
- || TARGET_DIS
[committed] hppa: Fix warnings building linux-atomic.c and fptr.c on hppa64-linux
This change fixes a couple of warnings observed building libgcc on hppa64-linux. The hppa64-linux target uses OPDs and doesn't require any special code to canonicalize function pointers for comparison. I removed inclusion of pa/t-linux from tmake_file and adjusted pa/t-linux64 to fix this issue. I defined types u8, u16 and u64 in linux-atomic.s to fix the type mismatch warning from linux-atomic.c. Tested on hppa-unknown-linux-gnu and hppa64-unknown-linux-gnu. Committed to active branches. Dave --- Fix warnings building linux-atomic.c and fptr.c on hppa64-linux The file fptr.c is specific to 32-bit hppa-linux and should not be included in LIB2ADD on hppa64-linux. There is a builtin type mismatch in linux-atomic.c using the type long long unsigned int for 64-bit atomic operations on hppa64-linux. 2021-10-27 John David Anglin libgcc/ChangeLog: * config.host (hppa*64*-*-linux*): Don't add pa/t-linux to tmake_file. * config/pa/linux-atomic.c: Define u8, u16 and u64 types. Use them in FETCH_AND_OP_2, OP_AND_FETCH_2, COMPARE_AND_SWAP_2, SYNC_LOCK_TEST_AND_SET_2 and SYNC_LOCK_RELEASE_1 macros. * config/pa/t-linux64 (LIB1ASMSRC): New define. (LIB1ASMFUNCS): Revise. (HOST_LIBGCC2_CFLAGS): Add "-DLINUX=1". diff --git a/libgcc/config.host b/libgcc/config.host index 6c34b13d611..85de83da766 100644 --- a/libgcc/config.host +++ b/libgcc/config.host @@ -619,7 +619,7 @@ h8300-*-linux*) tm_file="$tm_file h8300/h8300-lib.h" ;; hppa*64*-*-linux*) - tmake_file="$tmake_file pa/t-linux pa/t-linux64" + tmake_file="$tmake_file pa/t-linux64" extra_parts="crtbegin.o crtbeginS.o crtbeginT.o crtend.o crtendS.o" ;; hppa*-*-linux*) diff --git a/libgcc/config/pa/linux-atomic.c b/libgcc/config/pa/linux-atomic.c index c882b55a127..500a3652499 100644 --- a/libgcc/config/pa/linux-atomic.c +++ b/libgcc/config/pa/linux-atomic.c @@ -28,6 +28,14 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define EBUSY 16 #define ENOSYS 251 +typedef unsigned char u8; +typedef short unsigned int u16; +#ifdef __LP64__ +typedef long unsigned int u64; +#else +typedef long long unsigned int u64; +#endif + /* PA-RISC 2.0 supports out-of-order execution for loads and stores. Thus, we need to synchonize memory accesses. For more info, see: "Advanced Performance Features of the 64-bit PA-8000" by Doug Hunt. @@ -117,26 +125,26 @@ __kernel_cmpxchg2 (volatile void *mem, const void *oldval, const void *newval, return tmp; \ } -FETCH_AND_OP_2 (add, , +, long long unsigned int, 8, 3) -FETCH_AND_OP_2 (sub, , -, long long unsigned int, 8, 3) -FETCH_AND_OP_2 (or,, |, long long unsigned int, 8, 3) -FETCH_AND_OP_2 (and, , &, long long unsigned int, 8, 3) -FETCH_AND_OP_2 (xor, , ^, long long unsigned int, 8, 3) -FETCH_AND_OP_2 (nand, ~, &, long long unsigned int, 8, 3) - -FETCH_AND_OP_2 (add, , +, short unsigned int, 2, 1) -FETCH_AND_OP_2 (sub, , -, short unsigned int, 2, 1) -FETCH_AND_OP_2 (or,, |, short unsigned int, 2, 1) -FETCH_AND_OP_2 (and, , &, short unsigned int, 2, 1) -FETCH_AND_OP_2 (xor, , ^, short unsigned int, 2, 1) -FETCH_AND_OP_2 (nand, ~, &, short unsigned int, 2, 1) - -FETCH_AND_OP_2 (add, , +, unsigned char, 1, 0) -FETCH_AND_OP_2 (sub, , -, unsigned char, 1, 0) -FETCH_AND_OP_2 (or,, |, unsigned char, 1, 0) -FETCH_AND_OP_2 (and, , &, unsigned char, 1, 0) -FETCH_AND_OP_2 (xor, , ^, unsigned char, 1, 0) -FETCH_AND_OP_2 (nand, ~, &, unsigned char, 1, 0) +FETCH_AND_OP_2 (add, , +, u64, 8, 3) +FETCH_AND_OP_2 (sub, , -, u64, 8, 3) +FETCH_AND_OP_2 (or,, |, u64, 8, 3) +FETCH_AND_OP_2 (and, , &, u64, 8, 3) +FETCH_AND_OP_2 (xor, , ^, u64, 8, 3) +FETCH_AND_OP_2 (nand, ~, &, u64, 8, 3) + +FETCH_AND_OP_2 (add, , +, u16, 2, 1) +FETCH_AND_OP_2 (sub, , -, u16, 2, 1) +FETCH_AND_OP_2 (or,, |, u16, 2, 1) +FETCH_AND_OP_2 (and, , &, u16, 2, 1) +FETCH_AND_OP_2 (xor, , ^, u16, 2, 1) +FETCH_AND_OP_2 (nand, ~, &, u16, 2, 1) + +FETCH_AND_OP_2 (add, , +, u8, 1, 0) +FETCH_AND_OP_2 (sub, , -, u8, 1, 0) +FETCH_AND_OP_2 (or,, |, u8, 1, 0) +FETCH_AND_OP_2 (and, , &, u8, 1, 0) +FETCH_AND_OP_2 (xor, , ^, u8, 1, 0) +FETCH_AND_OP_2 (nand, ~, &, u8, 1, 0) #define OP_AND_FETCH_2(OP, PFX_OP, INF_OP, TYPE, WIDTH, INDEX) \ TYPE HIDDEN \ @@ -154,26 +162,26 @@ FETCH_AND_OP_2 (nand, ~, &, unsigned char, 1, 0) return PFX_OP (tmp INF_OP val);\ } -OP_AND_FETCH_2 (add, , +, long long unsigned int, 8, 3) -OP_AND_FETCH_2 (sub, , -, long long unsigned int, 8, 3) -OP_AND_FETCH_2 (or,, |, long long unsigned int, 8, 3) -OP_AND_FETCH_2 (and, , &, long long
[committed] Fix failure of asm goto tests on hppa
The following change fixes failure of gcc.dg/torture/pr100329.c and
gcc.dg/torture/pr100519.c on hppa.
Committed to trunk.
Dave
Require target lra for tests using asm goto
gcc/testsuite/ChangeLog:
* gcc.dg/torture/pr100329.c: Require target lra.
* gcc.dg/torture/pr100519.c: Likewise.
diff --git a/gcc/testsuite/gcc.dg/torture/pr100329.c
b/gcc/testsuite/gcc.dg/torture/pr100329.c
index b90700dd5f0..2a4331ba712 100644
--- a/gcc/testsuite/gcc.dg/torture/pr100329.c
+++ b/gcc/testsuite/gcc.dg/torture/pr100329.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target lra } } */
/* { dg-additional-options "--param tree-reassoc-width=2" } */
unsigned int a0;
diff --git a/gcc/testsuite/gcc.dg/torture/pr100519.c
b/gcc/testsuite/gcc.dg/torture/pr100519.c
index faf6e240e08..89dff668a97 100644
--- a/gcc/testsuite/gcc.dg/torture/pr100519.c
+++ b/gcc/testsuite/gcc.dg/torture/pr100519.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target lra } } */
/* { dg-additional-options "--param tree-reassoc-width=2" } */
unsigned int foo_a1, foo_a2;
Re: [committed] Set num_threads to 50 on 32-bit hppa in two libgomp loop tests
On 2024-02-29 6:02 p.m., Thomas Schwinge wrote: Hi! On 2024-02-01T19:20:57+, John David Anglin wrote: Tested on hppa-unknown-linux-gnu. Committed to trunk. Set num_threads to 50 on 32-bit hppa in two libgomp loop tests We support a maximum of 50 threads on 32-bit hppa. What happens if you go higher? Curious, what/why is that architectural limit of 50 threads? One gets an EAGAIN error at 51. I don't know why 50 is the architectural limit on hppa-linux. I had asked Helge previously but didn't get an answer. As far as I can tell, limit isn't set by glibc. It seems 64 is supported on all other targets. I wonder: shouldn't that cap at 50 threads happen inside libgomp, generally, instead of per test case and user code (!)? Per my understanding, OpenMP 'num_threads' specifies a *desired* number of threads; the implementation may limit that value. Sounds like a good suggestion. Dave -- John David Anglin dave.ang...@bell.net
Re: [committed] Set num_threads to 50 on 32-bit hppa in two libgomp loop tests
On 2024-03-01 3:44 a.m., Jakub Jelinek wrote: Isn't this just that you have 50 in there? No. It's okay. The problem is we run out of memory caused by a "ulimit -s 81920" statement that I had in .bashrc. The test pass with default stack allocation. clone(child_stack=0x3191040, flags=CLONE_VM|CLONE_FS|CLONE_FILES|CLONE_SIGHAND|CLONE_THREAD|CLONE_SYSVSEM|CLONE_SETTLS|CLONE_PARENT_SETTID|CLONE_CHILD_CLEARTID, parent_tid=[1108], tls=0x81918c0, child_tidptr=0x8191468) = 1108 rt_sigprocmask(SIG_SETMASK, [], NULL, 8) = 0 mmap2(NULL, 83890176, PROT_NONE, MAP_PRIVATE|MAP_ANONYMOUS|MAP_STACK, -1, 0) = -1 ENOMEM (Cannot allocate memory) Will revert change to tests. Dave -- John David Anglin dave.ang...@bell.net
[committed] hppa: Fix REG+D address support before reload
Tested on hppa-unknown-linux-gnu. Committed to trunk. Dave --- hppa: Fix REG+D address support before reload When generating PA 1.x code or code for GNU ld, floating-point accesses only support 5-bit displacements but integer accesses support 14-bit displacements. I mistakenly assumed reload could fix an invalid 14-bit displacement in a floating-point access but this is not the case. 2024-03-14 John David Anglin gcc/ChangeLog: PR target/114288 * config/pa/pa.cc (pa_legitimate_address_p): Don't allow 14-bit displacements before reload for modes that may use a floating-point load or store. diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc index 694123e37c9..129289f8e62 100644 --- a/gcc/config/pa/pa.cc +++ b/gcc/config/pa/pa.cc @@ -10968,20 +10968,15 @@ pa_legitimate_address_p (machine_mode mode, rtx x, bool strict, code_helper) /* Long 14-bit displacements always okay for these cases. */ if (INT14_OK_STRICT + || reload_completed || mode == QImode || mode == HImode) return true; - /* A secondary reload may be needed to adjust the displacement -of floating-point accesses when STRICT is nonzero. */ - if (strict) - return false; - - /* We get significantly better code if we allow long displacements -before reload for all accesses. Instructions must satisfy their -constraints after reload, so we must have an integer access. -Return true for both cases. */ - return true; + /* We have to limit displacements to those supported by +both floating-point and integer accesses as reload can't +fix invalid displacements. See PR114288. */ + return false; } if (!TARGET_DISABLE_INDEXING signature.asc Description: PGP signature
[committed] hppa: Fix complaint about non-delegitimized UNSPEC UNSPEC_TP
Tested on hppa-unknown-linux-gnu. Committed to trunk.
Dave
---
hppa: Fix complaint about non-delegitimized UNSPEC UNSPEC_TP
2024-03-17 John David Anglin
gcc/ChangeLog:
* config/pa/pa.cc (pa_delegitimize_address): Delegitimize UNSPEC_TP.
diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc
index 129289f8e62..d7666103de8 100644
--- a/gcc/config/pa/pa.cc
+++ b/gcc/config/pa/pa.cc
@@ -10707,7 +10709,13 @@ pa_trampoline_adjust_address (rtx addr)
static rtx
pa_delegitimize_address (rtx orig_x)
{
- rtx x = delegitimize_mem_from_attrs (orig_x);
+ rtx x;
+
+ if (GET_CODE (orig_x) == UNSPEC
+ && XINT (orig_x, 1) == UNSPEC_TP)
+orig_x = XVECEXP (orig_x, 0, 0);
+
+ x = delegitimize_mem_from_attrs (orig_x);
if (GET_CODE (x) == LO_SUM
&& GET_CODE (XEXP (x, 1)) == UNSPEC
signature.asc
Description: PGP signature
[committed] hppa: Improve handling of REG+D addresses when generating PA 2.0 code
Tested on hppa-unknown-linux-gnu. Committed to trunk.
Dave
---
hppa: Improve handling of REG+D addresses when generating PA 2.0 code
In looking at PR 112415, it became clear that improvements could be
made in the handling of loads and stores using REG+D addresses. A
change in 2002 conflated two issues:
1) We can't generate insns with 14-bit displacements before reload
completes when generating PA 1.x code since floating-point loads and
stores only support 5-bit offsets in PA 1.x.
2) The GNU ELF 32-bit linker lacks relocation support for PA 2.0
floating point instructions with 14-bit displacements. These
relocations affect instructions with symbolic references.
The result of the change was to block creation of PA 2.0 instructions
with 14-bit REG_D displacements for SImode, DImode, SFmode and DFmode
on the GNU linux target before reload. This was unnecessary as these
instructions don't need relocation.
This change revise the INT14_OK_STRICT define to allow creation
of instructions with 14-bit REG+D addresses before reload when
generating PA 2.0 code.
2024-03-17 John David Anglin
gcc/ChangeLog:
PR rtl-optimization/112415
* config/pa/pa.cc (pa_emit_move_sequence): Revise condition
for symbolic memory operands.
(pa_legitimate_address_p): Revise LO_SUM condition.
* config/pa/pa.h (INT14_OK_STRICT): Revise define. Move
comment about GNU linker to predicates.md.
* config/pa/predicates.md (floating_point_store_memory_operand):
Revise condition for symbolic memory operands. Update
comment.
diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc
index 129289f8e62..d7666103de8 100644
--- a/gcc/config/pa/pa.cc
+++ b/gcc/config/pa/pa.cc
@@ -2039,7 +2039,8 @@ pa_emit_move_sequence (rtx *operands, machine_mode mode,
rtx scratch_reg)
op1 = replace_equiv_address (op1, scratch_reg);
}
}
- else if ((!INT14_OK_STRICT && symbolic_memory_operand (op1, VOIDmode))
+ else if (((TARGET_ELF32 || !TARGET_PA_20)
+ && symbolic_memory_operand (op1, VOIDmode))
|| IS_LO_SUM_DLT_ADDR_P (XEXP (op1, 0))
|| IS_INDEX_ADDR_P (XEXP (op1, 0)))
{
@@ -2088,7 +2089,8 @@ pa_emit_move_sequence (rtx *operands, machine_mode mode,
rtx scratch_reg)
op0 = replace_equiv_address (op0, scratch_reg);
}
}
- else if ((!INT14_OK_STRICT && symbolic_memory_operand (op0, VOIDmode))
+ else if (((TARGET_ELF32 || !TARGET_PA_20)
+ && symbolic_memory_operand (op0, VOIDmode))
|| IS_LO_SUM_DLT_ADDR_P (XEXP (op0, 0))
|| IS_INDEX_ADDR_P (XEXP (op0, 0)))
{
@@ -11032,18 +11040,22 @@ pa_legitimate_address_p (machine_mode mode, rtx x,
bool strict, code_helper)
&& (strict ? STRICT_REG_OK_FOR_BASE_P (y)
: REG_OK_FOR_BASE_P (y)))
{
+ y = XEXP (x, 1);
+
/* Needed for -fPIC */
if (mode == Pmode
- && GET_CODE (XEXP (x, 1)) == UNSPEC)
+ && GET_CODE (y) == UNSPEC)
return true;
- if (!INT14_OK_STRICT
- && (strict || !(reload_in_progress || reload_completed))
+ /* Before reload, we need support for 14-bit floating
+point loads and stores, and associated relocations. */
+ if ((TARGET_ELF32 || !INT14_OK_STRICT)
+ && !reload_completed
&& mode != QImode
&& mode != HImode)
return false;
- if (CONSTANT_P (XEXP (x, 1)))
+ if (CONSTANT_P (y))
return true;
}
return false;
diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h
index 7abaeae269e..403f16c5cb5 100644
--- a/gcc/config/pa/pa.h
+++ b/gcc/config/pa/pa.h
@@ -828,19 +828,8 @@ extern int may_call_alloca;
/* Nonzero if 14-bit offsets can be used for all loads and stores.
This is not possible when generating PA 1.x code as floating point
- accesses only support 5-bit offsets. Note that we do not forbid
- the use of 14-bit offsets prior to reload. Instead, we use secondary
- reloads to fix REG+D memory addresses for floating-point accesses.
-
- FIXME: the GNU ELF linker clobbers the LSB of the FP register number
- in PA 2.0 floating-point insns with long displacements. This is
- because R_PARISC_DPREL14WR and other relocations like it are not
- yet supported by GNU ld. For now, we reject long displacements
- on this target. */
-
-#define INT14_OK_STRICT \
- (TARGET_SOFT_FLOAT \
- || (TARGET_PA_20 && !TARGET_ELF32 && !TARGET_ELF64))
+ accesses only support 5-bit offsets. */
+#define INT14_OK_STRICT (TARGET_SOFT_FLOAT || TARGET_PA_20)
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
and check its vali
[committed] hppa: Fix LO_SUM DLTIND14R address support in PRINT_OPERAND_ADDRESS
Tested on hppa-unknown-linux-gnu and hppa64-hp-hpux11.11. Committed
to trunk.
Dave
---
hppa: Fix LO_SUM DLTIND14R address support in PRINT_OPERAND_ADDRESS
This bug was hidden since LO_SUM DLTIND14R addresses are normally
handled by the A constraint in the move patterns.
2024-03-23 John David Anglin
gcc/ChangeLog:
* config/pa/pa.cc (pa_output_global_address): Handle
UNSPEC_DLTIND14R addresses.
* config/pa/pa.h (PRINT_OPERAND_ADDRESS): Output "RT'" for
UNSPEC_DLTIND14R address.
diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc
index d7666103de8..f9b1906efb4 100644
--- a/gcc/config/pa/pa.cc
+++ b/gcc/config/pa/pa.cc
@@ -5784,7 +5784,12 @@ pa_output_global_address (FILE *file, rtx x, int
round_constant)
if (GET_CODE (x) == HIGH)
x = XEXP (x, 0);
- if (GET_CODE (x) == SYMBOL_REF && read_only_operand (x, VOIDmode))
+ if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_DLTIND14R)
+{
+ x = XVECEXP (x, 0, 0);
+ output_addr_const (file, x);
+}
+ else if (GET_CODE (x) == SYMBOL_REF && read_only_operand (x, VOIDmode))
output_addr_const (file, x);
else if (GET_CODE (x) == SYMBOL_REF && !flag_pic)
{
diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h
index 403f16c5cb5..127a0d1966d 100644
--- a/gcc/config/pa/pa.h
+++ b/gcc/config/pa/pa.h
@@ -1247,12 +1247,15 @@ do {
\
reg_names [REGNO (XEXP (addr, 0))]); \
break; \
case LO_SUM: \
- if (!symbolic_operand (XEXP (addr, 1), VOIDmode))
\
+ if (GET_CODE (XEXP (addr, 1)) == UNSPEC \
+ && XINT (XEXP (addr, 1), 1) == UNSPEC_DLTIND14R) \
+ fputs ("RT'", FILE);\
+ else if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \
fputs ("R'", FILE); \
else if (flag_pic == 0) \
fputs ("RR'", FILE);\
else \
- fputs ("RT'", FILE);\
+ gcc_unreachable (); \
pa_output_global_address (FILE, XEXP (addr, 1), 0); \
fputs ("(", FILE); \
output_operand (XEXP (addr, 0), 0); \
signature.asc
Description: PGP signature
[committed] Fix failure of c-c++-common/analyzer/stdarg-pr111289-int.c on hpux
Fixes conflicting declarations of mode_t. Tested on hppa-unknown-linux-gnu and hppa64-hp-hpux11.11. Committed to trunk. Dave --- Fix failure of c-c++-common/analyzer/stdarg-pr111289-int.c on hpux 2024-03-28 John David Anglin gcc/testsuite/ChangeLog: PR analyzer/111289 * c-c++-common/analyzer/stdarg-pr111289-int.c: Don't include . diff --git a/gcc/testsuite/c-c++-common/analyzer/stdarg-pr111289-int.c b/gcc/testsuite/c-c++-common/analyzer/stdarg-pr111289-int.c index 33d83169c3e..8faa58c9480 100644 --- a/gcc/testsuite/c-c++-common/analyzer/stdarg-pr111289-int.c +++ b/gcc/testsuite/c-c++-common/analyzer/stdarg-pr111289-int.c @@ -1,6 +1,5 @@ #include #include -#include typedef unsigned int mode_t; signature.asc Description: PGP signature
[committed] hppa: Fix bug in atomic_storedi_1 pattern
Tested on hppa-unknown-linux-gnu. Committed to trunk.
Dave
---
hppa: Fix bug in atomic_storedi_1 pattern
The first alternative stores the floating-point status register
in the destination. It should store zero. We need to copy %fr0
to another floating-point register to initialize it to zero.
2024-02-01 John David Anglin
gcc/ChangeLog:
* config/pa/pa.md (atomic_storedi_1): Fix bug in
alternative 1.
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index 52ad0c3776d..aecdcc98b6a 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -10723,13 +10723,13 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
(define_insn "atomic_storedi_1"
[(set (mem:DI (match_operand:SI 0 "register_operand" "r,r"))
(match_operand:DI 1 "reg_or_0_operand" "M,r"))
- (clobber (match_scratch:DI 2 "=X,f"))]
+ (clobber (match_scratch:DI 2 "=f,f"))]
"!TARGET_64BIT && !TARGET_SOFT_FLOAT"
"@
- {fstds|fstd} %%fr0,0(%0)
+ fcpy,dbl %%fr0,%2\n\t{fstds|fstd} %2,0(%0)
{stws|stw} %1,-16(%%sp)\n\t{stws|stw} %R1,-12(%%sp)\n\t{fldds|fldd}
-16(%%sp),%2\n\t{fstds|fstd} %2,0(%0)"
[(set_attr "type" "move,move")
- (set_attr "length" "4,16")])
+ (set_attr "length" "8,16")])
;; PA 2.0 hardware supports out-of-order execution of loads and stores, so
;; we need memory barriers to enforce program order for memory references
signature.asc
Description: PGP signature
[committed] xfail gnat.dg/trampoline3.adb scan-assembler-not check on hppa*-*-*
Tested on hppa-unknown-linux-gnu. Committed to trunk.
Dave
---
xfail gnat.dg/trampoline3.adb scan-assembler-not check on hppa*-*-*
We still require an executable stack for trampolines on hppa*-*-*.
2024-02-01 John David Anglin
gcc/testsuite/ChangeLog:
* gnat.dg/trampoline3.adb: xfail scan-assembler-not
check on hppa*-*-*.
diff --git a/gcc/testsuite/gnat.dg/trampoline3.adb
b/gcc/testsuite/gnat.dg/trampoline3.adb
index 28057662452..10b6e5d4a41 100644
--- a/gcc/testsuite/gnat.dg/trampoline3.adb
+++ b/gcc/testsuite/gnat.dg/trampoline3.adb
@@ -19,4 +19,4 @@ begin
I := P(0);
end;
--- { dg-final { scan-assembler-not "GNU-stack.*x" } }
+-- { dg-final { scan-assembler-not "GNU-stack.*x" { xfail hppa*-*-* } } }
signature.asc
Description: PGP signature
[committed] Set num_threads to 50 on 32-bit hppa in two libgomp loop tests
Tested on hppa-unknown-linux-gnu. Committed to trunk.
Dave
---
Set num_threads to 50 on 32-bit hppa in two libgomp loop tests
We support a maximum of 50 threads on 32-bit hppa.
2024-02-01 John David Anglin
libgomp/ChangeLog:
* testsuite/libgomp.c++/loop-3.C: Set num_threads to 50
on 32-bit hppa.
* testsuite/libgomp.c/omp-loop03.c: Likewise.
diff --git a/libgomp/testsuite/libgomp.c++/loop-3.C
b/libgomp/testsuite/libgomp.c++/loop-3.C
index fa50f099f3f..3f460f114bf 100644
--- a/libgomp/testsuite/libgomp.c++/loop-3.C
+++ b/libgomp/testsuite/libgomp.c++/loop-3.C
@@ -1,3 +1,9 @@
+#if defined(__hppa__) && !defined(__LP64__)
+#define NUM_THREADS 50
+#else
+#define NUM_THREADS 64
+#endif
+
extern "C" void abort (void);
int a;
@@ -19,7 +25,7 @@ foo ()
int
main (void)
{
-#pragma omp parallel num_threads (64)
+#pragma omp parallel num_threads (NUM_THREADS)
foo ();
return 0;
diff --git a/libgomp/testsuite/libgomp.c/omp-loop03.c
b/libgomp/testsuite/libgomp.c/omp-loop03.c
index 7bb9a194331..9879981cf4a 100644
--- a/libgomp/testsuite/libgomp.c/omp-loop03.c
+++ b/libgomp/testsuite/libgomp.c/omp-loop03.c
@@ -1,3 +1,9 @@
+#if defined(__hppa__) && !defined(__LP64__)
+#define NUM_THREADS 50
+#else
+#define NUM_THREADS 64
+#endif
+
extern void abort (void);
int a;
@@ -19,7 +25,7 @@ foo ()
int
main (void)
{
-#pragma omp parallel num_threads (64)
+#pragma omp parallel num_threads (NUM_THREADS)
foo ();
return 0;
signature.asc
Description: PGP signature
[committed] hppa: Implement TARGET_ATOMIC_ASSIGN_EXPAND_FENV
Tested on hppa-unknown-linux-gnu and hppa64-hp-hpux11.11.
This is the first step in fixing PR target/59778. libatomic/fenv.c
needs fixing for hppa so exceptions are correctly raised.
Committed to trunk.
Dave
---
hppa: Implement TARGET_ATOMIC_ASSIGN_EXPAND_FENV
This change implements __builtin_get_fpsr() and __builtin_set_fpsr(x)
to get and set the floating-point status register. They are used to
implement pa_atomic_assign_expand_fenv().
2024-02-02 John David Anglin
gcc/ChangeLog:
PR target/59778
* config/pa/pa.cc (enum pa_builtins): Add PA_BUILTIN_GET_FPSR
and PA_BUILTIN_SET_FPSR builtins.
* (pa_builtins_icode): Declare.
* (def_builtin, pa_fpu_init_builtins): New.
* (pa_init_builtins): Initialize FPU builtins.
* (pa_builtin_decl, pa_expand_builtin_1): New.
* (pa_expand_builtin): Handle PA_BUILTIN_GET_FPSR and
PA_BUILTIN_SET_FPSR builtins.
* (pa_atomic_assign_expand_fenv): New.
* config/pa/pa.md (UNSPECV_GET_FPSR, UNSPECV_SET_FPSR): New
UNSPECV constants.
(get_fpsr, put_fpsr): New expanders.
(get_fpsr_32, get_fpsr_64, set_fpsr_32, set_fpsr_64): New
insn patterns.
diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc
index c58b0a0d75e..694123e37c9 100644
--- a/gcc/config/pa/pa.cc
+++ b/gcc/config/pa/pa.cc
@@ -28,6 +28,7 @@ along with GCC; see the file COPYING3. If not see
#include "target.h"
#include "rtl.h"
#include "tree.h"
+#include "gimple.h"
#include "df.h"
#include "tm_p.h"
#include "stringpool.h"
@@ -142,6 +143,7 @@ static void pa_asm_out_destructor (rtx, int);
#endif
static void pa_init_builtins (void);
static rtx pa_expand_builtin (tree, rtx, rtx, machine_mode mode, int);
+static tree pa_builtin_decl (unsigned, bool);
static rtx hppa_builtin_saveregs (void);
static void hppa_va_start (tree, rtx);
static tree hppa_gimplify_va_arg_expr (tree, tree, gimple_seq *, gimple_seq *);
@@ -205,6 +207,7 @@ static bool pa_modes_tieable_p (machine_mode, machine_mode);
static bool pa_can_change_mode_class (machine_mode, machine_mode, reg_class_t);
static HOST_WIDE_INT pa_starting_frame_offset (void);
static section* pa_elf_select_rtx_section(machine_mode, rtx, unsigned
HOST_WIDE_INT) ATTRIBUTE_UNUSED;
+static void pa_atomic_assign_expand_fenv (tree *, tree *, tree *);
/* The following extra sections are only used for SOM. */
static GTY(()) section *som_readonly_data_section;
@@ -314,9 +317,10 @@ static size_t n_deferred_plabels = 0;
#undef TARGET_INIT_BUILTINS
#define TARGET_INIT_BUILTINS pa_init_builtins
-
#undef TARGET_EXPAND_BUILTIN
#define TARGET_EXPAND_BUILTIN pa_expand_builtin
+#undef TARGET_BUILTIN_DECL
+#define TARGET_BUILTIN_DECL pa_builtin_decl
#undef TARGET_REGISTER_MOVE_COST
#define TARGET_REGISTER_MOVE_COST hppa_register_move_cost
@@ -426,6 +430,9 @@ static size_t n_deferred_plabels = 0;
#undef TARGET_HAVE_SPECULATION_SAFE_VALUE
#define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
+#undef TARGET_ATOMIC_ASSIGN_EXPAND_FENV
+#define TARGET_ATOMIC_ASSIGN_EXPAND_FENV pa_atomic_assign_expand_fenv
+
struct gcc_target targetm = TARGET_INITIALIZER;
/* Parse the -mfixed-range= option string. */
@@ -592,6 +599,10 @@ pa_option_override (void)
enum pa_builtins
{
+ /* FPU builtins. */
+ PA_BUILTIN_GET_FPSR,
+ PA_BUILTIN_SET_FPSR,
+
PA_BUILTIN_COPYSIGNQ,
PA_BUILTIN_FABSQ,
PA_BUILTIN_INFQ,
@@ -600,10 +611,48 @@ enum pa_builtins
};
static GTY(()) tree pa_builtins[(int) PA_BUILTIN_max];
+static GTY(()) enum insn_code pa_builtins_icode[(int) PA_BUILTIN_max];
+
+/* Add a PA builtin function with NAME, ICODE, CODE and TYPE. Return the
+ function decl or NULL_TREE if the builtin was not added. */
+
+static tree
+def_builtin (const char *name, enum insn_code icode, enum pa_builtins code,
+tree type)
+{
+ tree t
+= add_builtin_function (name, type, code, BUILT_IN_MD, NULL, NULL_TREE);
+
+ if (t)
+{
+ pa_builtins[code] = t;
+ pa_builtins_icode[code] = icode;
+}
+
+ return t;
+}
+
+/* Create builtin functions for FPU instructions. */
+
+static void
+pa_fpu_init_builtins (void)
+{
+ tree ftype;
+
+ ftype = build_function_type_list (unsigned_type_node, 0);
+ def_builtin ("__builtin_get_fpsr", CODE_FOR_get_fpsr,
+ PA_BUILTIN_GET_FPSR, ftype);
+ ftype = build_function_type_list (void_type_node, unsigned_type_node, 0);
+ def_builtin ("__builtin_set_fpsr", CODE_FOR_set_fpsr,
+ PA_BUILTIN_SET_FPSR, ftype);
+}
static void
pa_init_builtins (void)
{
+ if (!TARGET_SOFT_FLOAT)
+pa_fpu_init_builtins ();
+
#ifdef DONT_HAVE_FPUTC_UNLOCKED
{
tree decl = builtin_decl_explicit (BUILT_IN_PUTC_UNLOCKED);
@@ -663,6 +712,92 @@ pa_init_builtins (void)
}
}
+/* Implement TARGET_BUILTIN_DECL. */
+
+static tree
+pa_builtin_decl (unsigned i
[committed] libatomic: Provide FPU exception defines for hppa
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
libatomic: Provide FPU exception defines for hppa
The exception defines in do not match the exception bits
in the FPU status register on hppa-linux and hppa64-hpux11.11. On
linux, they match the trap enable bits. On 64-bit hpux, they match
the exception bits for IA64. The IA64 bits are in a different
order and location than HPPA. HP uses table look ups to reorder
the bits in code to test and raise exceptions.
All the architectures that I looked at just pass the FPU status
register to __atomic_feraiseexcept(). The simplest approach for
hppa is to define FE_INEXACT, etc, to match the status register
and not include .
2024-02-03 John David Anglin
libatomic/ChangeLog:
PR target/59778
* configure.tgt (hppa*): Set ARCH.
* config/pa/fenv.c: New file.
diff --git a/libatomic/config/pa/fenv.c b/libatomic/config/pa/fenv.c
new file mode 100644
index 000..232e8416ffd
--- /dev/null
+++ b/libatomic/config/pa/fenv.c
@@ -0,0 +1,74 @@
+/* Copyright (C) 2012-2024 Free Software Foundation, Inc.
+
+ This file is part of the GNU Atomic Library (libatomic).
+
+ Libatomic is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ Libatomic is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include "libatomic_i.h"
+
+#define FE_INEXACT (1<<27)
+#define FE_UNDERFLOW (1<<28)
+#define FE_OVERFLOW(1<<29)
+#define FE_DIVBYZERO (1<<30)
+#define FE_INVALID (1<<31)
+
+/* Raise the supported floating-point exceptions from EXCEPTS. Other
+ bits in EXCEPTS are ignored. */
+
+void
+__atomic_feraiseexcept (int excepts __attribute__ ((unused)))
+{
+ volatile float r __attribute__ ((unused));
+#ifdef FE_INVALID
+ if (excepts & FE_INVALID)
+ {
+volatile float zero = 0.0f;
+r = zero / zero;
+ }
+#endif
+#ifdef FE_DIVBYZERO
+ if (excepts & FE_DIVBYZERO)
+{
+ volatile float zero = 0.0f;
+ r = 1.0f / zero;
+}
+#endif
+#ifdef FE_OVERFLOW
+ if (excepts & FE_OVERFLOW)
+{
+ volatile float max = __FLT_MAX__;
+ r = max * max;
+}
+#endif
+#ifdef FE_UNDERFLOW
+ if (excepts & FE_UNDERFLOW)
+{
+ volatile float min = __FLT_MIN__;
+ r = min * min;
+}
+#endif
+#ifdef FE_INEXACT
+ if (excepts & FE_INEXACT)
+{
+ volatile float three = 3.0f;
+ r = 1.0f / three;
+}
+#endif
+}
diff --git a/libatomic/configure.tgt b/libatomic/configure.tgt
index 67a5f2dff80..4237f283fe4 100644
--- a/libatomic/configure.tgt
+++ b/libatomic/configure.tgt
@@ -36,6 +36,7 @@ case "${target_cpu}" in
XCFLAGS="${XCFLAGS} -mfp-trap-mode=sui"
ARCH=alpha
;;
+ hppa*) ARCH=pa ;;
rs6000 | powerpc*) ARCH=powerpc ;;
riscv*) ARCH=riscv ;;
sh*) ARCH=sh ;;
signature.asc
Description: PGP signature
[committed] Fix xfail for 32-bit hppa*-*-* in gcc.dg/pr84877.c
Tested on hppa-unknown-linux-gnu. Committed to trunk.
Dave
---
Fix xfail for 32-bit hppa*-*-* in gcc.dg/pr84877.c
2024-02-03 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.dg/pr84877.c: Adjust xfail parentheses.
diff --git a/gcc/testsuite/gcc.dg/pr84877.c b/gcc/testsuite/gcc.dg/pr84877.c
index 68681206e73..e82991f42dd 100644
--- a/gcc/testsuite/gcc.dg/pr84877.c
+++ b/gcc/testsuite/gcc.dg/pr84877.c
@@ -1,4 +1,4 @@
-/* { dg-do run { xfail { cris-*-* sparc*-*-* } || { { ! lp64 } && hppa*-*-* }
} } */
+/* { dg-do run { xfail { { cris-*-* sparc*-*-* } || { { ! lp64 } && hppa*-*-*
} } } } */
/* { dg-options "-O2" } */
#include
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Description: PGP signature
[committed] libgomp: Define config_path for hppa*-*-linux*
Tested on hppa-unknown-linux-gnu. Committed to trunk. Dave --- libgomp: Define config_path for hppa*-*-linux* 2024-02-11 John David Anglin libgomp/ChangeLog: PR libgomp/113843 * configure.tgt (hppa*-*-linux*): Define config_path. diff --git a/libgomp/configure.tgt b/libgomp/configure.tgt index 2cd7272fcd8..46af75f978f 100644 --- a/libgomp/configure.tgt +++ b/libgomp/configure.tgt @@ -52,6 +52,10 @@ if test x$enable_linux_futex = xyes; then config_path="linux posix" ;; +hppa*-*-linux*) + config_path="linux posix" + ;; + ia64*-*-linux*) config_path="linux/ia64 linux posix" ;; signature.asc Description: PGP signature
[committed] Fix gcc.c-torture/execute/ieee/cdivchkf.c on hpux
Tested on hppa64-hp-hpux11.11 and hppa-unknown-linux-gnu.
Committed to trunk.
Dave
---
Fix gcc.c-torture/execute/ieee/cdivchkf.c on hpux
2024-02-11 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.c-torture/execute/ieee/cdivchkf.c: Use ilogb and
__builtin_fmax instead of ilogbf and __builtin_fmaxf.
diff --git a/gcc/testsuite/gcc.c-torture/execute/ieee/cdivchkf.c
b/gcc/testsuite/gcc.c-torture/execute/ieee/cdivchkf.c
index adf1ed91dc7..86ef69f8771 100644
--- a/gcc/testsuite/gcc.c-torture/execute/ieee/cdivchkf.c
+++ b/gcc/testsuite/gcc.c-torture/execute/ieee/cdivchkf.c
@@ -8,7 +8,7 @@
extern void abort (void);
extern void exit (int);
-extern int ilogbf (float);
+extern int ilogb (double);
int match (float _Complex, float _Complex);
#define SMALL FLT_MIN
@@ -22,7 +22,8 @@ int match (float _Complex, float _Complex);
int match (float _Complex c, float _Complex z)
{
float rz, iz, rc, ic;
- float rerr, ierr, rmax;
+ float rerr, ierr;
+ double rmax;
int biterr;
rz = __real__ z;
iz = __imag__ z;
@@ -54,11 +55,11 @@ int match (float _Complex c, float _Complex z)
{
ierr = __builtin_fabsf (iz - ic) / SMALL;
}
- rmax = __builtin_fmaxf(rerr, ierr);
+ rmax = __builtin_fmax (rerr, ierr);
biterr = 0;
if ( rmax != 0.0)
{
- biterr = ilogbf (rmax) + MAXBIT + 1;
+ biterr = ilogb (rmax) + MAXBIT + 1;
}
if (biterr >= ERRLIM)
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[PATCH] libstdc++-v3: Fix cmath math declarations and stub support for hppa64-*-hpux11*
This change fixes the C99 math function support in on
hppa64-*-hpux11*.
Tested on hppa64-hp-hpux11.11 and x86_64-linux-gnu. See:
https://gcc.gnu.org/pipermail/gcc-testresults/2024-February/809158.html
https://gcc.gnu.org/pipermail/gcc-testresults/2024-February/809101.html
Okay for trunk?
Dave
---
Fix cmath math declarations and stub support for hppa64-*-hpux11*
This change fixes the following issues:
1) When the target host system doesn't support the full set of C99
functions, the stub replacements are not declared by cmath. As a
result, stub replacements do not become members of namespace std.
2) Some using statements for float and long double C99 functions
are surrounded by a _GLIBCXX_HAVE_* #ifdef. For example,
#ifdef _GLIBCXX_HAVE_ACOSF
using ::acosf;
#endif
As a result, missing float and long double functions never become
a member of std even though there is stub support for all of them.
3) Undefs for acosf, acosl, etc, are missing. Adding these should
allow PR86553 to be fixed.
4) Added AC_DEFINE statements for HAVE_CBRTF, HAVE_COPYSIGNF,
HAVE_HYPOTF, HAVE_LOG2F and HAVE_NEXTAFTERF to crossconfig.m4
for hpux host.
5) Added additional checks to linkage.m4.
6) Added stubs for missing float, double and long double C99
functions.
PR libstdc++/114101
libstdc++-v3/ChangeLog:
* config/os/hpux/os_defines.h (_GLIBCXX_USE_C99_MATH_FUNCS): Define.
(_GLIBCXX_USE_C99_MATH_TR1): Define.
(_GLIBCXX_USE_BUILTIN_FMA): Define if _PA_RISC2_0 host.
(_GLIBCXX_USE_BUILTIN_FMAF): Likewise.
* crossconfig.m4: Add AC_DEFINE statements for HAVE_CBRTF,
HAVE_COPYSIGNF, HAVE_HYPOTF, HAVE_LOG2F and HAVE_NEXTAFTERF.
* include/c_global/cmath: Add #undef statements for acosf,
acosl, etc. Add declarations for acosf, acosl, etc. Likewise,
add declarations for acoshf, acoshl, etc, for C++11.
* libstdc++-v3/include/tr1/cmath: Add declarations for acosf,
acosl, etc.
* linkage.m4: Add checks for fma, nexttoward, scalbln, tgamma,
cbrtf, copysignf, expm1f, log2f, nanf, nextafterf, nexttowardf,
expm1l, ilogbl, nanl, nextafterl, nexttowardl, scalblnl,
scalbnl.
* src/c++98/Makefile.am: Add math_stubs_double.cc to sources.
* src/c++98/math_stubs_double.cc: New file.
* src/c++98/math_stubs_float.cc (scalbnf): New stub.
(lgammaf, tgammaf, erff, erfcf, remquof, fdimf, nearbyintf,
exp2f, rintf, lrintf, llrintf, fmaxf, fminf, log1pf, truncf,
asinhf, acoshf, atanhf, scalblnf, lroundf, llroundf, roundf,
remainderf, logbf, ilogbf, expm1f, nextafterf, nexttowardf,
nanf): Likewise.
* src/c++98/math_stubs_long_double.cc (ilogbl): New stub.
(lgammal, log1pl, nanl, nearbyintl, nextafterl, nexttowardl,
scalblnl, scalbnl, tgammal): Likewise.
* configure: Regenerate.
* config.h.in: Regenerate.
* src/c++98/Makefile.in: Regenerate.
diff --git a/libstdc++-v3/config/os/hpux/os_defines.h
b/libstdc++-v3/config/os/hpux/os_defines.h
index 38c1c38af0c..9ab1af42bda 100644
--- a/libstdc++-v3/config/os/hpux/os_defines.h
+++ b/libstdc++-v3/config/os/hpux/os_defines.h
@@ -79,6 +79,18 @@ namespace std
#define _GLIBCXX_USE_LONG_LONG 1
+// Import C99 functions in in in namespace std in C++11.
+// Missing functions are handled by stubs. The fma, nexttoward, scalbln
+// and tgamma are missing in HP-UX 11. Many float variants are supported.
+#define _GLIBCXX_USE_C99_MATH_FUNCS 1
+#define _GLIBCXX_USE_C99_MATH_TR1 1
+
+#ifdef _PA_RISC2_0
+// Float and double fma are supported directly in hardware.
+#define _GLIBCXX_USE_BUILTIN_FMA 1
+#define _GLIBCXX_USE_BUILTIN_FMAF 1
+#endif
+
// HPUX on IA64 requires vtable to be 64 bit aligned even at 32 bit
// mode. We need to pad the vtable structure to achieve this.
#if !defined(_LP64) && defined (__ia64__)
diff --git a/libstdc++-v3/crossconfig.m4 b/libstdc++-v3/crossconfig.m4
index b3269cb88e0..c6b08be5df5 100644
--- a/libstdc++-v3/crossconfig.m4
+++ b/libstdc++-v3/crossconfig.m4
@@ -152,14 +152,10 @@ case "${host}" in
AC_DEFINE(HAVE_ACOSF)
AC_DEFINE(HAVE_ASINF)
AC_DEFINE(HAVE_ATANF)
+AC_DEFINE(HAVE_ATAN2F)
AC_DEFINE(HAVE_COSF)
AC_DEFINE(HAVE_COSHF)
-AC_DEFINE(HAVE_SINF)
-AC_DEFINE(HAVE_SINHF)
-AC_DEFINE(HAVE_TANF)
-AC_DEFINE(HAVE_TANHF)
AC_DEFINE(HAVE_EXPF)
-AC_DEFINE(HAVE_ATAN2F)
AC_DEFINE(HAVE_FABSF)
AC_DEFINE(HAVE_FMODF)
AC_DEFINE(HAVE_FREXPF)
@@ -167,7 +163,16 @@ case "${host}" in
AC_DEFINE(HAVE_LOG10F)
AC_DEFINE(HAVE_MODF)
AC_DEFINE(HAVE_POWF)
+AC_DEFINE(HAVE_SINF)
+AC_DEFINE(HAVE_SINHF)
AC_DEFINE(HAVE_SQRTF)
+AC_DEFINE(HAVE_TANF)
+AC_DEFINE(HAVE_TANHF)
+AC_DEFINE(HAVE_CBRTF)
+AC_DEFINE(HAVE_COPYSIGNF)
+AC_DEFINE(HAVE_HYPOTF)
+AC_DEFINE(HAVE_LOG2F)
+AC_DEFINE(HAVE_NEXTAFTERF)
# GLIBCXX_CHECK_STDLIB_SUPPORT
AC_DEFINE(HAVE_STRTOLD
[committed] hppa64: Fix fmt_f_default_field_width_3.f90 and fmt_g_default_field_width_3.f90
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
hppa64: Fix fmt_f_default_field_width_3.f90 and fmt_g_default_field_width_3.f90
The hppa*64*-*-hpux* target is not included in the set of fortran_real_16
targets because it doesn't have cosl. However, these tests don't need
cosl, etc.
2024-01-13 John David Anglin
gcc/testsuite/ChangeLog:
* gfortran.dg/fmt_f_default_field_width_3.f90: Add hppa*64*-*-hpux*
to real_16 dg-error targets.
* gfortran.dg/fmt_g_default_field_width_3.f90: Likewise.
diff --git a/gcc/testsuite/gfortran.dg/fmt_f_default_field_width_3.f90
b/gcc/testsuite/gfortran.dg/fmt_f_default_field_width_3.f90
index 3e7d8f64d43..46f271e0c60 100644
--- a/gcc/testsuite/gfortran.dg/fmt_f_default_field_width_3.f90
+++ b/gcc/testsuite/gfortran.dg/fmt_f_default_field_width_3.f90
@@ -30,6 +30,6 @@ program test
#ifdef __GFC_REAL_16__
real_16 = 4.18
-write(buffer, fmt) ':',real_16,':' ! { dg-error "Nonnegative width
required" "" { target fortran_real_16 } }
+write(buffer, fmt) ':',real_16,':' ! { dg-error "Nonnegative width
required" "" { target { fortran_real_16 || { hppa*64*-*-hpux* } } } }
#endif
end
diff --git a/gcc/testsuite/gfortran.dg/fmt_g_default_field_width_3.f90
b/gcc/testsuite/gfortran.dg/fmt_g_default_field_width_3.f90
index 95a05981941..22fe1a35d65 100644
--- a/gcc/testsuite/gfortran.dg/fmt_g_default_field_width_3.f90
+++ b/gcc/testsuite/gfortran.dg/fmt_g_default_field_width_3.f90
@@ -33,6 +33,6 @@ program test
#ifdef __GFC_REAL_16__
real_16 = 4.18
-write(buffer, fmt) ':',real_16,':' ! { dg-error "Positive width required"
"" { target fortran_real_16 } }
+write(buffer, fmt) ':',real_16,':' ! { dg-error "Positive width required"
"" { target { fortran_real_16 || { hppa*64*-*-hpux* } } } }
#endif
end
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[committed] Skip several analyzer socket tests on hppa*-*-hpux*
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
Skip several analyzer socket tests on hppa*-*-hpux*
2024-01-14 John David Anglin
gcc/testsuite/ChangeLog:
PR analyzer/113150
* c-c++-common/analyzer/fd-glibc-byte-stream-socket.c: Skip
on hppa*-*-hpux*.
* c-c++-common/analyzer/fd-manpage-getaddrinfo-client.c: Likewise.
* c-c++-common/analyzer/fd-mappage-getaddrinfo-server.c: Likewise.
* c-c++-common/analyzer/fd-symbolic-socket.c: Likewise.
* gcc.dg/analyzer/fd-glibc-byte-stream-connection-server.c: Likewise.
diff --git a/gcc/testsuite/c-c++-common/analyzer/fd-glibc-byte-stream-socket.c
b/gcc/testsuite/c-c++-common/analyzer/fd-glibc-byte-stream-socket.c
index d9666f99edd..fab8426acb9 100644
--- a/gcc/testsuite/c-c++-common/analyzer/fd-glibc-byte-stream-socket.c
+++ b/gcc/testsuite/c-c++-common/analyzer/fd-glibc-byte-stream-socket.c
@@ -1,6 +1,6 @@
/* Example from glibc manual (16.9.6). */
/* { dg-require-effective-target sockets } */
-/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-skip-if "" { hppa*-*-hpux* powerpc*-*-aix* } } */
#include
#include
diff --git
a/gcc/testsuite/c-c++-common/analyzer/fd-manpage-getaddrinfo-client.c
b/gcc/testsuite/c-c++-common/analyzer/fd-manpage-getaddrinfo-client.c
index 16da9333074..21dfe977db8 100644
--- a/gcc/testsuite/c-c++-common/analyzer/fd-manpage-getaddrinfo-client.c
+++ b/gcc/testsuite/c-c++-common/analyzer/fd-manpage-getaddrinfo-client.c
@@ -28,7 +28,7 @@ the source, must acknowledge the copyright and authors of
this work.
/* { dg-require-effective-target sockets } */
/* { dg-additional-options "-Wno-analyzer-too-complex" } */
-/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-skip-if "" { hppa*-*-hpux* powerpc*-*-aix* } } */
#include
#include
diff --git
a/gcc/testsuite/c-c++-common/analyzer/fd-mappage-getaddrinfo-server.c
b/gcc/testsuite/c-c++-common/analyzer/fd-mappage-getaddrinfo-server.c
index c02ee6ff643..2e9cec4abf0 100644
--- a/gcc/testsuite/c-c++-common/analyzer/fd-mappage-getaddrinfo-server.c
+++ b/gcc/testsuite/c-c++-common/analyzer/fd-mappage-getaddrinfo-server.c
@@ -27,7 +27,7 @@ the source, must acknowledge the copyright and authors of
this work.
*/
/* { dg-require-effective-target sockets } */
-/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-skip-if "" { hppa*-*-hpux* powerpc*-*-aix* } } */
#include
#include
diff --git a/gcc/testsuite/c-c++-common/analyzer/fd-symbolic-socket.c
b/gcc/testsuite/c-c++-common/analyzer/fd-symbolic-socket.c
index d7dc46a2d47..32264fd9701 100644
--- a/gcc/testsuite/c-c++-common/analyzer/fd-symbolic-socket.c
+++ b/gcc/testsuite/c-c++-common/analyzer/fd-symbolic-socket.c
@@ -1,5 +1,5 @@
/* { dg-require-effective-target sockets } */
-/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-skip-if "" { hppa*-*-hpux* powerpc*-*-aix* } } */
#include
#include
diff --git
a/gcc/testsuite/gcc.dg/analyzer/fd-glibc-byte-stream-connection-server.c
b/gcc/testsuite/gcc.dg/analyzer/fd-glibc-byte-stream-connection-server.c
index d8b697d323e..fcbcc740170 100644
--- a/gcc/testsuite/gcc.dg/analyzer/fd-glibc-byte-stream-connection-server.c
+++ b/gcc/testsuite/gcc.dg/analyzer/fd-glibc-byte-stream-connection-server.c
@@ -1,7 +1,7 @@
/* Example from glibc manual (16.9.7). */
/* { dg-require-effective-target sockets } */
/* { dg-additional-options "-Wno-analyzer-too-complex" } */
-/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-skip-if "" { hppa*-*-hpux* powerpc*-*-aix* } } */
#include
#include
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[committed] Fix dg-warning on hppa*64*-*-*
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
Fix dg-warning on hppa*64*-*-*
2024-01-14 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.dg/Wattributes-6.c: Fix dg-warning on hppa*64*-*-*.
diff --git a/gcc/testsuite/gcc.dg/Wattributes-6.c
b/gcc/testsuite/gcc.dg/Wattributes-6.c
index 978f3f938e9..49a085def9e 100644
--- a/gcc/testsuite/gcc.dg/Wattributes-6.c
+++ b/gcc/testsuite/gcc.dg/Wattributes-6.c
@@ -408,7 +408,7 @@ finline_hot_noret_align (int); /* { dg-warning "ignoring
attribute .warn_unused
/* { dg-note"previous declaration here" ""
{ target *-*-* } .-1 } */
inline int ATTR ((aligned (4)))
- finline_hot_noret_align (int); /* { dg-warning "ignoring attribute .aligned
\\(4\\). because it conflicts with attribute .aligned \\(8\\)." "" { target { !
{ hppa*64*-*-* } } } } */
+ finline_hot_noret_align (int); /* { dg-warning "ignoring attribute .aligned
\\(4\\). because it conflicts with attribute .aligned \\(8\\)." "" } */
inline int ATTR ((aligned (8)))
finline_hot_noret_align (int); /* { dg-note "previous declaration here" } */
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[committed] Skip several gcc.dg/builtin-dynamic-object-size tests on hppa*-*-hpux*
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
Skip several gcc.dg/builtin-dynamic-object-size tests on hppa*-*-hpux*
hppa*-*-hpux* doesn't have strdup or strndup.
2024-01-14 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.dg/builtin-dynamic-object-size-0.c: Skip on hppa*-*-hpux*.
* gcc.dg/builtin-dynamic-object-size-1.c: Likewise.
* gcc.dg/builtin-dynamic-object-size-2.c: Likewise.
* gcc.dg/builtin-dynamic-object-size-3.c: Likewise.
* gcc.dg/builtin-dynamic-object-size-4.c: Likewise.
diff --git a/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-0.c
b/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-0.c
index c3ac6230d4d..173e7c755f4 100644
--- a/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-0.c
+++ b/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-0.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O2" } */
/* { dg-require-effective-target size20plus } */
+/* { dg-skip-if "no strndup" { hppa*-*-hpux* } } */
#include "builtin-object-size-common.h"
diff --git a/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-1.c
b/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-1.c
index 8f17c8edcaf..ffa59985024 100644
--- a/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-1.c
+++ b/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-1.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O2 -Wno-stringop-overread" } */
/* { dg-require-effective-target alloca } */
+/* { dg-skip-if "no strndup" { hppa*-*-hpux* } } */
#define __builtin_object_size __builtin_dynamic_object_size
#include "builtin-object-size-1.c"
diff --git a/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-2.c
b/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-2.c
index 3677782ff1c..fff32da7aea 100644
--- a/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-2.c
+++ b/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-2.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O2 -Wno-stringop-overread" } */
/* { dg-require-effective-target alloca } */
+/* { dg-skip-if "no strndup" { hppa*-*-hpux* } } */
#define __builtin_object_size __builtin_dynamic_object_size
#include "builtin-object-size-2.c"
diff --git a/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-3.c
b/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-3.c
index 5b6987b7773..ac223d67b10 100644
--- a/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-3.c
+++ b/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-3.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O2 -Wno-stringop-overread" } */
/* { dg-require-effective-target alloca } */
+/* { dg-skip-if "no strndup" { hppa*-*-hpux* } } */
#define __builtin_object_size __builtin_dynamic_object_size
#include "builtin-object-size-3.c"
diff --git a/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-4.c
b/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-4.c
index 9d796224e96..fdf4284ae11 100644
--- a/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-4.c
+++ b/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-4.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O2 -Wno-stringop-overread" } */
/* { dg-require-effective-target alloca } */
+/* { dg-skip-if "no strndup" { hppa*-*-hpux* } } */
#define __builtin_object_size __builtin_dynamic_object_size
#include "builtin-object-size-4.c"
signature.asc
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[committed] Disable tests for strdup/strndup on __hpux__ in various builtin-object-size tests
Tested on hppa64-hp-hpux11.11. Committed to trunk. Dave --- Disable tests for strdup/strndup on __hpux__ hppa*-*-hpux* doesn't have strdup or strndup. 2024-01-14 John David Anglin gcc/testsuite/ChangeLog: * gcc.dg/builtin-object-size-1.c: Disable tests for strdup/strndup on __hpux__. * gcc.dg/builtin-object-size-2.c: Likewise. * gcc.dg/builtin-object-size-3.c: Likewise. * gcc.dg/builtin-object-size-4.c: Likewise. diff --git a/gcc/testsuite/gcc.dg/builtin-object-size-1.c b/gcc/testsuite/gcc.dg/builtin-object-size-1.c index 64c4bc4da39..4f7d4c0b370 100644 --- a/gcc/testsuite/gcc.dg/builtin-object-size-1.c +++ b/gcc/testsuite/gcc.dg/builtin-object-size-1.c @@ -621,7 +621,7 @@ test10 (void) } } -#ifndef __AVR__ /* avr has no strndup */ +#if !defined(__AVR__) && !defined(__hpux__) /* avr and hpux have no strndup */ /* Tests for strdup/strndup. */ size_t __attribute__ ((noinline)) @@ -726,7 +726,7 @@ main (void) test8 (); test9 (1); test10 (); -#ifndef __AVR__ /* avr has no strndup */ +#if !defined(__AVR__) && !defined(__hpux__) /* avr and hpux have no strndup */ test11 (); #endif DONE (); diff --git a/gcc/testsuite/gcc.dg/builtin-object-size-2.c b/gcc/testsuite/gcc.dg/builtin-object-size-2.c index da10b6b0632..37d3dcc6f56 100644 --- a/gcc/testsuite/gcc.dg/builtin-object-size-2.c +++ b/gcc/testsuite/gcc.dg/builtin-object-size-2.c @@ -536,7 +536,7 @@ test8 (unsigned cond) #endif } -#ifndef __AVR__ /* avr has no strndup */ +#if !defined(__AVR__) && !defined(__hpux__) /* avr and hpux have no strndup */ /* Tests for strdup/strndup. */ size_t __attribute__ ((noinline)) @@ -639,7 +639,7 @@ main (void) test6 (); test7 (); test8 (1); -#ifndef __AVR__ /* avr has no strndup */ +#if !defined(__AVR__) && !defined(__hpux__) /* avr and hpux have no strndup */ test9 (); #endif DONE (); diff --git a/gcc/testsuite/gcc.dg/builtin-object-size-3.c b/gcc/testsuite/gcc.dg/builtin-object-size-3.c index f23873bec38..f4d1ebf7027 100644 --- a/gcc/testsuite/gcc.dg/builtin-object-size-3.c +++ b/gcc/testsuite/gcc.dg/builtin-object-size-3.c @@ -628,7 +628,7 @@ test10 (void) } } -#ifndef __AVR__ /* avr has no strndup */ +#if !defined(__AVR__) && !defined(__hpux__) /* avr and hpux have no strndup */ /* Tests for strdup/strndup. */ size_t __attribute__ ((noinline)) @@ -734,7 +734,7 @@ main (void) test8 (); test9 (1); test10 (); -#ifndef __AVR__ /* avr has no strndup */ +#if !defined(__AVR__) && !defined(__hpux__) /* avr and hpux have no strndup */ test11 (); #endif DONE (); diff --git a/gcc/testsuite/gcc.dg/builtin-object-size-4.c b/gcc/testsuite/gcc.dg/builtin-object-size-4.c index dcb042f34b6..2887dd15042 100644 --- a/gcc/testsuite/gcc.dg/builtin-object-size-4.c +++ b/gcc/testsuite/gcc.dg/builtin-object-size-4.c @@ -509,7 +509,7 @@ test8 (unsigned cond) #endif } -#ifndef __AVR__ /* avr has no strndup */ +#if !defined(__AVR__) && !defined(__hpux__) /* avr and hpux have no strndup */ /* Tests for strdup/strndup. */ size_t __attribute__ ((noinline)) @@ -612,7 +612,7 @@ main (void) test6 (); test7 (); test8 (1); -#ifndef __AVR__ /* avr has no strndup */ +#if !defined(__AVR__) && !defined(__hpux__) /* avr and hpux have no strndup */ test9 (); #endif DONE (); signature.asc Description: PGP signature
[committed] xfail all scan-tree-dump-times checks on hppa*64*-*-* in sra-17.c and sra-18.c
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
xfail all scan-tree-dump-times checks on hppa*64*-*-* in sra-17.c and sra-18.c
2024-01-16 John David Anglin
gcc/testsuite/ChangeLog:
PR tree-optimization/91624
* gcc.dg/tree-ssa/sra-17.c: xfail all scan-tree-dump-times
checks on hppa*64*-*-*.
* gcc.dg/tree-ssa/sra-18.c: Likewise.
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sra-17.c
b/gcc/testsuite/gcc.dg/tree-ssa/sra-17.c
index b0d4811e77b..f1c74274b30 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/sra-17.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/sra-17.c
@@ -17,5 +17,5 @@ main (int argc, char **argv)
abort ();
}
-/* { dg-final { scan-tree-dump-times "Removing load: a = \\\*.?L.?C.?.?.?0;" 1
"esra" } } */
-/* { dg-final { scan-tree-dump-times "SR\[.$\]\[0-9_\]+ =
\\\*.?L.?C.?.?.?0\\\[" 4 "esra" } } */
+/* { dg-final { scan-tree-dump-times "Removing load: a = \\\*.?L.?C.?.?.?0;" 1
"esra" { xfail hppa*64*-*-* } } } */
+/* { dg-final { scan-tree-dump-times "SR\[.$\]\[0-9_\]+ =
\\\*.?L.?C.?.?.?0\\\[" 4 "esra" { xfail hppa*64*-*-* } } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sra-18.c
b/gcc/testsuite/gcc.dg/tree-ssa/sra-18.c
index 2cdeae6e9e7..3077485a8db 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/sra-18.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/sra-18.c
@@ -23,8 +23,8 @@ main (int argc, char **argv)
abort ();
}
-/* { dg-final { scan-tree-dump-times "Removing load: a = \\\*.?L.?C.?.?.?0;" 1
"esra" } } */
-/* { dg-final { scan-tree-dump-times "SR\[.$\]\[0-9_\]+ =
\\\*.?L.?C.?.?.?0\\.b\\\[0\\\]\\.f\\\[0\\\]\\.x" 1 "esra" } } */
-/* { dg-final { scan-tree-dump-times "SR\[.$\]\[0-9_\]+ =
\\\*.?L.?C.?.?.?0\\.b\\\[0\\\]\\.f\\\[1\\\]\\.x" 1 "esra" } } */
-/* { dg-final { scan-tree-dump-times "SR\[.$\]\[0-9_\]+ =
\\\*.?L.?C.?.?.?0\\.b\\\[1\\\]\\.f\\\[0\\\]\\.x" 1 "esra" } } */
-/* { dg-final { scan-tree-dump-times "SR\[.$\]\[0-9_\]+ =
\\\*.?L.?C.?.?.?0\\.b\\\[1\\\]\\.f\\\[1\\\]\\.x" 1 "esra" } } */
+/* { dg-final { scan-tree-dump-times "Removing load: a = \\\*.?L.?C.?.?.?0;" 1
"esra" { xfail hppa*64*-*-* } } } */
+/* { dg-final { scan-tree-dump-times "SR\[.$\]\[0-9_\]+ =
\\\*.?L.?C.?.?.?0\\.b\\\[0\\\]\\.f\\\[0\\\]\\.x" 1 "esra" { xfail hppa*64*-*-*
} } } */
+/* { dg-final { scan-tree-dump-times "SR\[.$\]\[0-9_\]+ =
\\\*.?L.?C.?.?.?0\\.b\\\[0\\\]\\.f\\\[1\\\]\\.x" 1 "esra" { xfail hppa*64*-*-*
} } } */
+/* { dg-final { scan-tree-dump-times "SR\[.$\]\[0-9_\]+ =
\\\*.?L.?C.?.?.?0\\.b\\\[1\\\]\\.f\\\[0\\\]\\.x" 1 "esra" { xfail hppa*64*-*-*
} } } */
+/* { dg-final { scan-tree-dump-times "SR\[.$\]\[0-9_\]+ =
\\\*.?L.?C.?.?.?0\\.b\\\[1\\\]\\.f\\\[1\\\]\\.x" 1 "esra" { xfail hppa*64*-*-*
} } } */
signature.asc
Description: PGP signature
[committed] Skip various cmp-mem-const tests on lp64 hppa*-*-*
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
Skip various cmp-mem-const tests on lp64 hppa*-*-*
Prior optimization already reduced the constant.
2024-01-16 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.dg/cmp-mem-const-3.c: Skip on lp64 hppa*-*-*.
* gcc.dg/cmp-mem-const-4.c: Likewise.
* gcc.dg/cmp-mem-const-5.c: Likewise.
* gcc.dg/cmp-mem-const-6.c: Likewise.
diff --git a/gcc/testsuite/gcc.dg/cmp-mem-const-3.c
b/gcc/testsuite/gcc.dg/cmp-mem-const-3.c
index c60ecdb4026..5469f10712e 100644
--- a/gcc/testsuite/gcc.dg/cmp-mem-const-3.c
+++ b/gcc/testsuite/gcc.dg/cmp-mem-const-3.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { lp64 && { ! sparc*-*-* } } } } */
+/* { dg-do compile { target { lp64 && { ! { sparc*-*-* hppa*-*-* } } } } } */
/* Excluding sparc since there we do not end up with a comparison of memory and
a constant which means that the optimization is not applicable. */
/* { dg-options "-O2 -fdump-rtl-combine-details" } */
diff --git a/gcc/testsuite/gcc.dg/cmp-mem-const-4.c
b/gcc/testsuite/gcc.dg/cmp-mem-const-4.c
index 7aa403d76d9..9ea094e20eb 100644
--- a/gcc/testsuite/gcc.dg/cmp-mem-const-4.c
+++ b/gcc/testsuite/gcc.dg/cmp-mem-const-4.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { lp64 && { ! sparc*-*-* } } } } */
+/* { dg-do compile { target { lp64 && { ! { sparc*-*-* hppa*-*-* } } } } } */
/* Excluding sparc since there we do not end up with a comparison of memory and
a constant which means that the optimization is not applicable. */
/* { dg-options "-O2 -fdump-rtl-combine-details" } */
diff --git a/gcc/testsuite/gcc.dg/cmp-mem-const-5.c
b/gcc/testsuite/gcc.dg/cmp-mem-const-5.c
index 4316dcb5605..5a9096ef84d 100644
--- a/gcc/testsuite/gcc.dg/cmp-mem-const-5.c
+++ b/gcc/testsuite/gcc.dg/cmp-mem-const-5.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { lp64 && { ! sparc*-*-* } } } } */
+/* { dg-do compile { target { lp64 && { ! { sparc*-*-* hppa*-*-* } } } } } */
/* Excluding sparc since there a prior optimization already reduced the
constant, i.e., nothing left for us. */
/* { dg-options "-O2 -fdump-rtl-combine-details" } */
diff --git a/gcc/testsuite/gcc.dg/cmp-mem-const-6.c
b/gcc/testsuite/gcc.dg/cmp-mem-const-6.c
index d9046af79eb..381195361e0 100644
--- a/gcc/testsuite/gcc.dg/cmp-mem-const-6.c
+++ b/gcc/testsuite/gcc.dg/cmp-mem-const-6.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { lp64 && { ! sparc*-*-* } } } } */
+/* { dg-do compile { target { lp64 && { ! { sparc*-*-* hppa*-*-* } } } } } */
/* Excluding sparc since there a prior optimization already reduced the
constant, i.e., nothing left for us. */
/* { dg-options "-O2 -fdump-rtl-combine-details" } */
signature.asc
Description: PGP signature
[committed] Require target lto in several tests
Tested on hppa64-hp-hpux11.11 with lto disabled. Committed to trunk.
Dave
---
Require target lto in several tests
2024-01-16 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.dg/c23-tag-alias-2.c: Require target lto.
* gcc.dg/c23-tag-alias-3.c: Likewise.
* gcc.dg/gnu23-tag-alias-3.c: Likewise.
* gcc.dg/scantest-lto.c: Likewise.
diff --git a/gcc/testsuite/gcc.dg/c23-tag-alias-2.c
b/gcc/testsuite/gcc.dg/c23-tag-alias-2.c
index 64ff67d8552..1a4097b629d 100644
--- a/gcc/testsuite/gcc.dg/c23-tag-alias-2.c
+++ b/gcc/testsuite/gcc.dg/c23-tag-alias-2.c
@@ -1,4 +1,4 @@
-/* { dg-do run }
+/* { dg-do run { target lto } }
* { dg-options "-std=c23 -flto -O2" }
*/
diff --git a/gcc/testsuite/gcc.dg/c23-tag-alias-3.c
b/gcc/testsuite/gcc.dg/c23-tag-alias-3.c
index b9fe6f3b407..76bc4dfcd23 100644
--- a/gcc/testsuite/gcc.dg/c23-tag-alias-3.c
+++ b/gcc/testsuite/gcc.dg/c23-tag-alias-3.c
@@ -1,4 +1,4 @@
-/* { dg-do run }
+/* { dg-do run { target lto } }
* { dg-options "-std=c23 -O2" }
*/
diff --git a/gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c
b/gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c
index c2fd4e930ef..9d7e7e11c7f 100644
--- a/gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c
+++ b/gcc/testsuite/gcc.dg/gnu23-tag-alias-3.c
@@ -1,4 +1,4 @@
-/* { dg-do run }
+/* { dg-do run { target lto } }
* { dg-options "-std=gnu23 -flto -O2" }
*/
diff --git a/gcc/testsuite/gcc.dg/scantest-lto.c
b/gcc/testsuite/gcc.dg/scantest-lto.c
index 5f8abaf77f3..46c21f20bfc 100644
--- a/gcc/testsuite/gcc.dg/scantest-lto.c
+++ b/gcc/testsuite/gcc.dg/scantest-lto.c
@@ -1,3 +1,4 @@
+/* { dg-do compile { target lto } }
/* { dg-options "-O2 -flto" } */
void foo ()
signature.asc
Description: PGP signature
[committed] xfail scan-tree-dump-not throw in g++.dg/pr99966.C on hppa*64*-*-*
Tested on hppa64-hpux11.11. Committed to trunk.
Dave
---
xfail scan-tree-dump-not throw in g++.dg/pr99966.C on hppa*64*-*-*
2024-01-16 John David Anglin
gcc/testsuite/ChangeLog:
PR tree-optimization/110794
* g++.dg/pr99966.C: xfail scan-tree-dump-not throw on hppa*64*-*-*.
diff --git a/gcc/testsuite/g++.dg/pr99966.C b/gcc/testsuite/g++.dg/pr99966.C
index 4d689822b87..d111c0acf11 100644
--- a/gcc/testsuite/g++.dg/pr99966.C
+++ b/gcc/testsuite/g++.dg/pr99966.C
@@ -20,4 +20,4 @@ uint64_t f(std::vector& data, size_t start, size_t
end){
return total;
}
-/* { dg-final { scan-tree-dump-not "throw" "vrp1"} } */
+/* { dg-final { scan-tree-dump-not "throw" "vrp1" { xfail hppa*64*-*-* } } } */
signature.asc
Description: PGP signature
[committed] Remove xfail for hppa*-*-hpux* from stdatomic-flag.c and stdatomic-flag-2.c
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
Remove xfail for hppa*-*-hpux* from stdatomic-flag.c and stdatomic-flag-2.c
Tests now pass on hppa64-hp-hpux11.11.
2024-01-16 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.dg/atomic/stdatomic-flag.c: Remove xfail.
* gcc.dg/atomic/stdatomic-flag-2.c: Likewise.
diff --git a/gcc/testsuite/gcc.dg/atomic/stdatomic-flag-2.c
b/gcc/testsuite/gcc.dg/atomic/stdatomic-flag-2.c
index aeae6b7b5ad..e4e3a6ef33d 100644
--- a/gcc/testsuite/gcc.dg/atomic/stdatomic-flag-2.c
+++ b/gcc/testsuite/gcc.dg/atomic/stdatomic-flag-2.c
@@ -1,7 +1,7 @@
/* Test atomic_flag routines for existence and execution. Out-of-line
function calls. */
/* The test needs a lockless atomic implementation. */
-/* { dg-do run { xfail hppa*-*-hpux* } } */
+/* { dg-do run } */
/* { dg-options "-std=c11 -pedantic-errors" } */
#include
diff --git a/gcc/testsuite/gcc.dg/atomic/stdatomic-flag.c
b/gcc/testsuite/gcc.dg/atomic/stdatomic-flag.c
index 515d5d8dd5a..bd28ba56c24 100644
--- a/gcc/testsuite/gcc.dg/atomic/stdatomic-flag.c
+++ b/gcc/testsuite/gcc.dg/atomic/stdatomic-flag.c
@@ -1,6 +1,6 @@
/* Test atomic_flag routines for existence and execution. */
/* The test needs a lockless atomic implementation. */
-/* { dg-do run { xfail hppa*-*-hpux* } } */
+/* { dg-do run } */
/* { dg-options "-std=c11 -pedantic-errors" } */
#include
signature.asc
Description: PGP signature
[committed] Add .data.rel.ro.local to read only sections in gcc.dg/array-quals-1.c
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
Add .data.rel.ro.local to read only sections in gcc.dg/array-quals-1.c
2024-01-16 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.dg/array-quals-1.c: Add .data.rel.ro.local to read only
sections.
diff --git a/gcc/testsuite/gcc.dg/array-quals-1.c
b/gcc/testsuite/gcc.dg/array-quals-1.c
index b9b55f774bc..e379f6121b7 100644
--- a/gcc/testsuite/gcc.dg/array-quals-1.c
+++ b/gcc/testsuite/gcc.dg/array-quals-1.c
@@ -30,23 +30,23 @@ cia d1 = { 7, 8 };
static cia e[2] = { { 1, 2 }, { 3, 4 } };
/* { dg-final { scan-assembler-symbol-section {^_?e1$}
{^\.(const|rodata|srodata|sdata)|\[RO\]} } } */
cia e1[2] = { { 1, 2 }, { 3, 4 } };
-/* { dg-final { scan-assembler-symbol-section {^_?p$}
{^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?p$}
{^\.(const|rodata|srodata|sdata|data.rel.ro.local)|\[RW\]} } } */
void *const p = &a;
-/* { dg-final { scan-assembler-symbol-section {^_?q$}
{^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?q$}
{^\.(const|rodata|srodata|sdata|data.rel.ro.local)|\[RW\]} } } */
void *const q = &b;
-/* { dg-final { scan-assembler-symbol-section {^_?r$}
{^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?r$}
{^\.(const|rodata|srodata|sdata|data.rel.ro.local)|\[RW\]} } } */
void *const r = &c;
-/* { dg-final { scan-assembler-symbol-section {^_?s$}
{^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?s$}
{^\.(const|rodata|srodata|sdata|data.rel.ro.local)|\[RW\]} } } */
void *const s = &d;
-/* { dg-final { scan-assembler-symbol-section {^_?t$}
{^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?t$}
{^\.(const|rodata|srodata|sdata|data.rel.ro.local)|\[RW\]} } } */
void *const t = &e;
-/* { dg-final { scan-assembler-symbol-section {^_?p1$}
{^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?p1$}
{^\.(const|rodata|srodata|sdata|data.rel.ro.local)|\[RW\]} } } */
void *const p1 = &a1;
-/* { dg-final { scan-assembler-symbol-section {^_?q1$}
{^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?q1$}
{^\.(const|rodata|srodata|sdata|data.rel.ro.local)|\[RW\]} } } */
void *const q1 = &b1;
-/* { dg-final { scan-assembler-symbol-section {^_?r1$}
{^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?r1$}
{^\.(const|rodata|srodata|sdata|data.rel.ro.local)|\[RW\]} } } */
void *const r1 = &c1;
-/* { dg-final { scan-assembler-symbol-section {^_?s1$}
{^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?s1$}
{^\.(const|rodata|srodata|sdata|data.rel.ro.local)|\[RW\]} } } */
void *const s1 = &d1;
-/* { dg-final { scan-assembler-symbol-section {^_?t1$}
{^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?t1$}
{^\.(const|rodata|srodata|sdata|data.rel.ro.local)|\[RW\]} } } */
void *const t1 = &e1;
signature.asc
Description: PGP signature
[committed] Skip gcc.dg/analyzer/pr94688.c on hppa*64*-*-*
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
Skip gcc.dg/analyzer/pr94688.c on hppa*64*-*-*
2024-01-19 John David Anglin
gcc/testsuite/ChangeLog:
PR analyzer/112705
* gcc.dg/analyzer/pr94688.c: Skip on hppa*64*-*-*.
diff --git a/gcc/testsuite/gcc.dg/analyzer/pr94688.c
b/gcc/testsuite/gcc.dg/analyzer/pr94688.c
index f553b8cfdad..8ea8bc3b288 100644
--- a/gcc/testsuite/gcc.dg/analyzer/pr94688.c
+++ b/gcc/testsuite/gcc.dg/analyzer/pr94688.c
@@ -1,3 +1,4 @@
+/* { dg-skip-if "PR112705" { hppa*64*-*-* } } */
int a, b;
void d();
void c()
signature.asc
Description: PGP signature
[committed] Only xfail gcc.dg/pr84877.c on 32-bit hppa*-*-*
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
Only xfail gcc.dg/pr84877.c on 32-bit hppa*-*-*
2024-01-19 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.dg/pr84877.c: Only xfail on 32-bit hppa*-*-*.
diff --git a/gcc/testsuite/gcc.dg/pr84877.c b/gcc/testsuite/gcc.dg/pr84877.c
index d1fb84763c8..68681206e73 100644
--- a/gcc/testsuite/gcc.dg/pr84877.c
+++ b/gcc/testsuite/gcc.dg/pr84877.c
@@ -1,4 +1,4 @@
-/* { dg-do run { xfail { cris-*-* hppa*-*-* sparc*-*-* } } } */
+/* { dg-do run { xfail { cris-*-* sparc*-*-* } || { { ! lp64 } && hppa*-*-* }
} } */
/* { dg-options "-O2" } */
#include
signature.asc
Description: PGP signature
[committed] Change dg-options for hpux to define _HPUX_SOURCE in gcc.dg/pthread-init-2.c
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
Change dg-options for hpux to define _HPUX_SOURCE in gcc.dg/pthread-init-2.c
Pthreads on hpux needs _HPUX_SOURCE define for id_t and spu_t types.
2024-01-19 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.dg/pthread-init-2.c: Change dg-options for hpux
to define _HPUX_SOURCE.
diff --git a/gcc/testsuite/gcc.dg/pthread-init-2.c
b/gcc/testsuite/gcc.dg/pthread-init-2.c
index d7cd66b5c02..c934fb525f9 100644
--- a/gcc/testsuite/gcc.dg/pthread-init-2.c
+++ b/gcc/testsuite/gcc.dg/pthread-init-2.c
@@ -7,7 +7,8 @@
/* { dg-do compile } */
/* { dg-require-effective-target pthread_h } */
/* { dg-options "-Wextra -Wall -ansi" } */
-/* { dg-options "-Wextra -Wall -ansi -D_POSIX_C_SOURCE=199506L" { target {
*-*-hpux* } } } */
+/* We need to define _HPUX_SOURCE on hpux11.11 for id_t and spu_t types. */
+/* { dg-options "-Wextra -Wall -ansi -D_HPUX_SOURCE" { target { *-*-hpux* } }
} */
/* { dg-options "-Wextra -Wall -ansi -D_XOPEN_SOURCE=500" { target {
powerpc-ibm-aix* } } } */
/* The definition of PTHREAD_MUTEX_INITIALIZER is missing an initializer for
mutexAttr.mutexAttrType in kernel mode for various VxWorks versions. */
signature.asc
Description: PGP signature
[committed] Limit dg-xfail-run-if for *-*-hpux11.[012]* to -O0
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
Limit dg-xfail-run-if for *-*-hpux11.[012]* to -O0
2024-01-19 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.dg/torture/pr47917.c: Limit dg-xfail-run-if for
hpux11.[012]* to -O0.
diff --git a/gcc/testsuite/gcc.dg/torture/pr47917.c
b/gcc/testsuite/gcc.dg/torture/pr47917.c
index 5724907ba1c..32c99c6a2d2 100644
--- a/gcc/testsuite/gcc.dg/torture/pr47917.c
+++ b/gcc/testsuite/gcc.dg/torture/pr47917.c
@@ -2,7 +2,7 @@
/* { dg-options "-std=c99" } */
/* { dg-options "-std=gnu99" { target *-*-hpux* } } */
/* { dg-additional-options "-D__USE_MINGW_ANSI_STDIO=1" { target *-*-mingw* }
} */
-/* { dg-xfail-run-if "non-conforming C99 snprintf" { *-*-hpux11.[012]* } } */
+/* { dg-xfail-run-if "non-conforming C99 snprintf" { *-*-hpux11.[012]* } {
"-O0" } } */
/* PR middle-end/47917 */
signature.asc
Description: PGP signature
[committed] Require target lra in gcc.dg/torture/pr110422.c
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
Require target lra in gcc.dg/torture/pr110422.c
LRA is required for asm goto.
2024-01-20 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.dg/torture/pr110422.c: Require target lra.
diff --git a/gcc/testsuite/gcc.dg/torture/pr110422.c
b/gcc/testsuite/gcc.dg/torture/pr110422.c
index 2e171a7a19e..2a653bdfce3 100644
--- a/gcc/testsuite/gcc.dg/torture/pr110422.c
+++ b/gcc/testsuite/gcc.dg/torture/pr110422.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target lra } } */
struct T { int x; };
int foo(void) {
signature.asc
Description: PGP signature
[committed] xfail scan-tree-dump-times checks on hppa*64*-*-* in gcc.dg/tree-ssa/slsr-13.c
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
xfail scan-tree-dump-times checks on hppa*64*-*-* in gcc.dg/tree-ssa/slsr-13.c
2024-01-20 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/slsr-13.c: xfail scan-tree-dump-times
checks on hppa*64*-*-*.
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/slsr-13.c
b/gcc/testsuite/gcc.dg/tree-ssa/slsr-13.c
index 4133694174c..93749d6e856 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/slsr-13.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/slsr-13.c
@@ -20,5 +20,5 @@ f (int s, int c)
return x;
}
-/* { dg-final { scan-tree-dump-times " \\* 4" 2 "optimized" } } */
-/* { dg-final { scan-tree-dump-times " \\* 5" 0 "optimized" } } */
+/* { dg-final { scan-tree-dump-times " \\* 4" 2 "optimized" {xfail
hppa*64*-*-* } } } */
+/* { dg-final { scan-tree-dump-times " \\* 5" 0 "optimized" {xfail
hppa*64*-*-* } } } */
signature.asc
Description: PGP signature
[committed] Don't run libgomp.c/simd-math-1.c on hppa*-*-hpux*
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
Don't run libgomp.c/simd-math-1.c on hppa*-*-hpux*
hppa*-*-hpux* lacks necessary math functions.
2024-01-20 John David Anglin
libgomp/ChangeLog:
* testsuite/libgomp.c/simd-math-1.c: Don't run on
hppa*-*-hpux*.
diff --git a/libgomp/testsuite/libgomp.c/simd-math-1.c
b/libgomp/testsuite/libgomp.c/simd-math-1.c
index 42a008c80fc..b30df09caf6 100644
--- a/libgomp/testsuite/libgomp.c/simd-math-1.c
+++ b/libgomp/testsuite/libgomp.c/simd-math-1.c
@@ -1,7 +1,7 @@
/* Check that the SIMD versions of math routines give the same (or
sufficiently close) results as their scalar equivalents. */
-/* { dg-do run } */
+/* { dg-do run { target { ! hppa*-*-hpux* } } } */
/* { dg-options "-O2 -ftree-vectorize -fno-math-errno" } */
/* { dg-additional-options
-foffload-options=amdgcn-amdhsa=-mstack-size=300 { target
offload_target_amdgcn } } */
/* { dg-additional-options "-DNONSTDFUNC=1" { target
nonstandard_math_functions } } */
signature.asc
Description: PGP signature
[committed] Increase timeout by 2 in libgomp.fortran/alloc-comp-3.f90 on hppa*-*-*
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
Increase timeout by 2 in libgomp.fortran/alloc-comp-3.f90 on hppa*-*-*
2024-01-20 John David Anglin
libgomp/ChangeLog:
* testsuite/libgomp.fortran/alloc-comp-3.f90: Increase
timeout by 2 on hppa*-*-*.
diff --git a/libgomp/testsuite/libgomp.fortran/alloc-comp-3.f90
b/libgomp/testsuite/libgomp.fortran/alloc-comp-3.f90
index 0185859cb26..eb418e83d9e 100644
--- a/libgomp/testsuite/libgomp.fortran/alloc-comp-3.f90
+++ b/libgomp/testsuite/libgomp.fortran/alloc-comp-3.f90
@@ -2,6 +2,7 @@
! Don't cycle by default through all options, just test -O0 and -O2,
! as this is quite large test.
! { dg-skip-if "" { ! run_expensive_tests } { "*" } { "-O0" "-O2" } }
+! { dg-timeout-factor 2.0 { target hppa*-*-* } }
module m
type dl
signature.asc
Description: PGP signature
[committed] Remove several xfails for 32-bit hppa*-*-*
Tested on hppa-unknown-linux-gnu. Committed to trunk.
Dave
---
Remove several xfails for 32-bit hppa*-*-*
These arise because 32-bit ELF targets were changed from
callee copies to caller copies.
2024-01-20 John David Anglin
gcc/testsuite/ChangeLog:
* gcc.dg/ipa/iinline-4.c: Remove dg-final xfail for
32-bit hppa*-*-*.
* gcc.dg/ipa/inline-5.c: Likewise.
* gcc.dg/ipa/ipcp-cstagg-7.c: Likewise.
* gcc.dg/tree-ssa/vector-4.c: Likewise.
diff --git a/gcc/testsuite/gcc.dg/ipa/iinline-4.c
b/gcc/testsuite/gcc.dg/ipa/iinline-4.c
index f50ffa58221..c78163dbeff 100644
--- a/gcc/testsuite/gcc.dg/ipa/iinline-4.c
+++ b/gcc/testsuite/gcc.dg/ipa/iinline-4.c
@@ -214,7 +214,7 @@ int test7 (void)
/* { dg-final { scan-ipa-dump "hooray1\[^\\n\]*inline copy in test1" "inline"
} } */
/* { dg-final { scan-ipa-dump "hooray2\[^\\n\]*inline copy in test2" "inline"
} } */
/* { dg-final { scan-ipa-dump "hooray3\[^\\n\]*inline copy in test3" "inline"
} } */
-/* { dg-final { scan-ipa-dump "hooray4\[^\\n\]*inline copy in test4" "inline"
{ xfail { { hppa*-*-* } && { ! lp64 } } } } } */
+/* { dg-final { scan-ipa-dump "hooray4\[^\\n\]*inline copy in test4" "inline"
} } */
/* { dg-final { scan-ipa-dump "hooray5\[^\\n\]*inline copy in test5" "inline"
} } */
/* { dg-final { scan-ipa-dump "hooray6\[^\\n\]*inline copy in test6" "inline"
} } */
/* { dg-final { scan-ipa-dump "hooray7\[^\\n\]*inline copy in test7" "inline"
} } */
diff --git a/gcc/testsuite/gcc.dg/ipa/inline-5.c
b/gcc/testsuite/gcc.dg/ipa/inline-5.c
index 559e258955e..390ba499d67 100644
--- a/gcc/testsuite/gcc.dg/ipa/inline-5.c
+++ b/gcc/testsuite/gcc.dg/ipa/inline-5.c
@@ -34,5 +34,5 @@ accessreference (struct a *a)
/* Will be eliminated by inlining */
}
-/* { dg-final { scan-ipa-dump-times "Will be eliminated" 4 "fnsummary" { xfail
{ { hppa*-*-* } && { ! lp64 } } } } } */
+/* { dg-final { scan-ipa-dump-times "Will be eliminated" 4 "fnsummary" } } */
/* { dg-final { scan-ipa-dump-times "50. will be eliminated" 1 "fnsummary" }
} */
diff --git a/gcc/testsuite/gcc.dg/ipa/ipcp-cstagg-7.c
b/gcc/testsuite/gcc.dg/ipa/ipcp-cstagg-7.c
index b08c420cd86..6af8bda6d8e 100644
--- a/gcc/testsuite/gcc.dg/ipa/ipcp-cstagg-7.c
+++ b/gcc/testsuite/gcc.dg/ipa/ipcp-cstagg-7.c
@@ -62,4 +62,4 @@ h (int x)
return bar (s, x);
}
-/* { dg-final { scan-ipa-dump-times "Discovered an indirect call to a known
target" 3 "cp" { xfail { hppa*-*-* && { ! lp64 } } } } } */
+/* { dg-final { scan-ipa-dump-times "Discovered an indirect call to a known
target" 3 "cp" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vector-4.c
b/gcc/testsuite/gcc.dg/tree-ssa/vector-4.c
index 00ddd2995be..982a2a47d6a 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/vector-4.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vector-4.c
@@ -10,7 +10,6 @@ v4si vs (v4si a, v4si b)
}
/* The compound literal should be placed directly in the vec_perm. */
-/* Test is xfailed on 32-bit hppa*-*-* because target-callee-copies. */
-/* { dg-final { scan-tree-dump-times "VEC_PERM_EXPR ;" 1
"gimple" { target { ! mmix-knuth-mmixware } xfail { hppa*-*-* && { ! lp64 } } }
} } */
+/* { dg-final { scan-tree-dump-times "VEC_PERM_EXPR ;" 1
"gimple" { target { ! mmix-knuth-mmixware } } } } */
/* { dg-final { scan-tree-dump-times "VEC_PERM_EXPR ;" 1 "gimple" { target mmix-knuth-mmixware } } } */
signature.asc
Description: PGP signature
[committed] Add -gno-strict-dwarf to dg-options in various btf enum tests
Tested on hppa64-hp-hpux11.11. Committed to trunk.
Dave
---
Add -gno-strict-dwarf to dg-options in various btf enum tests
The -gno-strict-dwarf option is needed to ensure enum signedness
is added to type_die.
2024-01-22 John David Anglin
gcc/testsuite/ChangeLog:
PR debug/113382
* gcc.dg/debug/btf/btf-bitfields-3.c: Add -gno-strict-dwarf
option to dg-options.
* gcc.dg/debug/btf/btf-enum-1.c: Likewise.
* gcc.dg/debug/btf/btf-enum-small.c: Likewise.
* gcc.dg/debug/btf/btf-enum64-1.c: Likewise.
diff --git a/gcc/testsuite/gcc.dg/debug/btf/btf-bitfields-3.c
b/gcc/testsuite/gcc.dg/debug/btf/btf-bitfields-3.c
index 78b8b7d49ad..08622b771e6 100644
--- a/gcc/testsuite/gcc.dg/debug/btf/btf-bitfields-3.c
+++ b/gcc/testsuite/gcc.dg/debug/btf/btf-bitfields-3.c
@@ -14,7 +14,7 @@
*/
/* { dg-do compile } */
-/* { dg-options "-O0 -gbtf -dA" } */
+/* { dg-options "-O0 -gbtf -gno-strict-dwarf -dA" } */
/* Enum with 4 members. */
/* { dg-final { scan-assembler-times "\[\t \]0x604\[\t
\]+\[^\n\]*btt_info" 1 } } */
diff --git a/gcc/testsuite/gcc.dg/debug/btf/btf-enum-1.c
b/gcc/testsuite/gcc.dg/debug/btf/btf-enum-1.c
index 021ce0345e4..7873c8837a0 100644
--- a/gcc/testsuite/gcc.dg/debug/btf/btf-enum-1.c
+++ b/gcc/testsuite/gcc.dg/debug/btf/btf-enum-1.c
@@ -1,7 +1,7 @@
/* Test BTF generation for enums. */
/* { dg-do compile } */
-/* { dg-options "-O0 -gbtf -fno-short-enums -dA" } */
+/* { dg-options "-O0 -gbtf -gno-strict-dwarf -fno-short-enums -dA" } */
/* { dg-final { scan-assembler-times "\[\t \]0x604\[\t
\]+\[^\n\]*btt_info" 1 } } */
/* { dg-final { scan-assembler-times "\[\t \]0x8603\[\t
\]+\[^\n\]*btt_info" 1 } } */
diff --git a/gcc/testsuite/gcc.dg/debug/btf/btf-enum-small.c
b/gcc/testsuite/gcc.dg/debug/btf/btf-enum-small.c
index eb8a1bd2c43..ccc92c92ba9 100644
--- a/gcc/testsuite/gcc.dg/debug/btf/btf-enum-small.c
+++ b/gcc/testsuite/gcc.dg/debug/btf/btf-enum-small.c
@@ -1,7 +1,7 @@
/* Test BTF generation for small enums. */
/* { dg-do compile } */
-/* { dg-options "-O2 -gbtf -dA" } */
+/* { dg-options "-O2 -gbtf -gno-strict-dwarf -dA" } */
/* { dg-final { scan-assembler-not "bte_value_lo32" } } */
/* { dg-final { scan-assembler-not "bte_value_hi32" } } */
diff --git a/gcc/testsuite/gcc.dg/debug/btf/btf-enum64-1.c
b/gcc/testsuite/gcc.dg/debug/btf/btf-enum64-1.c
index 5d1487c1183..3ba885af17f 100644
--- a/gcc/testsuite/gcc.dg/debug/btf/btf-enum64-1.c
+++ b/gcc/testsuite/gcc.dg/debug/btf/btf-enum64-1.c
@@ -1,7 +1,7 @@
/* Test BTF generation for 64 bits enums. */
/* { dg-do compile } */
-/* { dg-options "-O0 -gbtf -dA" } */
+/* { dg-options "-O0 -gbtf -gno-strict-dwarf -dA" } */
/* { dg-final { scan-assembler-times "\[\t \].size\[\t \]_?myenum1,\[\t \]8" 1
} } */
/* { dg-final { scan-assembler-times "\[\t \].size\[\t \]_?myenum2,\[\t \]8" 1
} } */
signature.asc
Description: PGP signature
Re: [PATCH] install: Streamline the hppa*-hp-hpux* section
Hi Gerald,
I have one comment. The only target currently supported is hppa64-hp-hpux11*.
While gas is required, only the HP ld works.
Otherwise, the change looks fine.
Dave
On 2023-12-16 8:35 p.m., Gerald Pfeifer wrote:
John, Jeff,
I suggest to streamline the hppa*-hp-hpux* installation instructions as
follows. Okay?
In fact in the following sections there is even more, and more specific
material, which would be great could you have a look at and help trim.
Gerald
>From 52149282c3a77ccda6385f06f36323c71b26491a Mon Sep 17 00:00:00 2001
From: Gerald Pfeifer
Date: Sun, 17 Dec 2023 09:33:40 +0800
Subject: [PATCH] install: Streamline the hppa*-hp-hpux* section
gcc:
PR target/69374
* doc/install.texi (Specific) : Remove a note on
GCC 4.3.
Remove details on how the HP assembler, which we document as not
working, breaks.
---
gcc/doc/install.texi | 17 -
1 file changed, 17 deletions(-)
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 5ec81098d47..70d46feabf6 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -4121,8 +4121,6 @@ longer a multiple of 2 bytes.
@end html
@anchor{hppa-hp-hpux}
@heading hppa*-hp-hpux*
-Support for HP-UX version 9 and older was discontinued in GCC 3.4.
-
We require using gas/binutils on all hppa platforms. Version 2.19 or
later is recommended.
@@ -4130,21 +4128,6 @@ It may be helpful to configure GCC with the
@uref{./configure.html#with-gnu-as,,@option{--with-gnu-as}} and
@option{--with-as=@dots{}} options to ensure that GCC can find GAS@.
-The HP assembler should not be used with GCC. It is rarely tested and may
-not work. It shouldn't be used with any languages other than C due to its
-many limitations.
-
-Specifically, @option{-g} does not work (HP-UX uses a peculiar debugging
-format which GCC does not know about). It also inserts timestamps
-into each object file it creates, causing the 3-stage comparison test to
-fail during a bootstrap. You should be able to continue by saying
-@samp{make all-host all-target} after getting the failure from @samp{make}.
-
-Various GCC features are not supported. For example, it does not support weak
-symbols or alias definitions. As a result, explicit template instantiations
-are required when using C++. This makes it difficult if not impossible to
-build many C++ applications.
-
There are two default scheduling models for instructions. These are
PROCESSOR_7100LC and PROCESSOR_8000. They are selected from the pa-risc
architecture specified for the target machine when configuring.
--
John David Anglin dave.ang...@bell.net
