Re: Use conditional internal functions in if-conversion

[Richard Biener]

On Fri, May 25, 2018 at 12:12 PM Richard Sandiford <
richard.sandif...@linaro.org> wrote:

> Richard Biener  writes:
> > On Wed, May 16, 2018 at 12:17 PM Richard Sandiford <
> > richard.sandif...@linaro.org> wrote:
> >> This patch uses IFN_COND_* to vectorise conditionally-executed,
> >> potentially-trapping arithmetic, such as most floating-point
> >> ops with -ftrapping-math.  E.g.:
> >
> >>  if (cond) { ... x = a + b; ... }
> >
> >> becomes:
> >
> >>  ...
> >>  x = IFN_COND_ADD (cond, a, b);
> >>  ...
> >
> >> When this transformation is done on its own, the value of x for
> >> !cond isn't important.
> >
> >> However, the patch also looks for the equivalent of:
> >
> >>  y = cond ? x : a;
> >
> > As generated by predicate_all_scalar_phis, right?  So this tries to
capture
> >
> >   if (cond)
> > y = a / b;
> >   else
> > y = a;
> >
> > But I think it would be more useful to represent the else value
explicitely
> > as extra operand given a constant like 0 is sth that will happen in
practice
> > and is also sth that is I think supported as a result by some targets.
> >
> > So to support the flow of current if-conversion you'd convert to
> >
> >   IFN_COND_ADD (cond, a, b, a); // or any other reasonable "default"
value
> > (target controlled?)
> >
> > and you merge that with a single-use COND_EXPR by replacing that
operand.
> >
> > If a target then cannot support the default value it needs to emit a
blend
> > afterwards.

> Yeah, that's definitely better.  I was a bit worried about the extra
> generality, but it turns out that (on SVE) having the else argument and
> getting the .md patterns to blend the input can avoid an unnecessary
> move that would be difficult to remove otherwise.

Btw, I've checked AVX512 and their masked operations either blend
into the destination or zero the masked elements.  Possibly useful
for plus reductions.

> I've committed the patches to add the else argument and the target hook
> to select the preferred else value (thanks for the reviews).  The patch
> below now uses that preferred else value if there's no ?: or if the
> else value of the ?: isn't available at the point of the conditional
> operation.

> This version also copes with:

>  if (cond) { ... x = a + b; ... }
>  y = !cond ? c : x;

> by adding a new utility function inverse_conditions_p.

interpret_as_condition_p is a bit of a layering violation in fold-const.c
since it looks at SSA_NAME_DEF_STMT.  In gimple.c we have a related
thing, mainly used by forwprop - canonicalize_cond_expr_cond which is
used to interpret a GENERIC folded thing as condition.

Do you really need the def stmt lookup?

Note that one item on my TODO list is to remove [VEC_]COND_EXPR from
gimple in favor of using a quaternary assign stmt with tcc_comparison code
so we'd have

  op0 = op1 < op2 ? op3 : op4;

that means currently valid op0 = op1 < op2; would become
a more explicit op0 = op1 < op2 ? true : false;

That means you'd for example may need to handle _1 != 0 being
feeded by _1 = _2 < _3 ? true : false;  -- or simply rely on those
to be combined.

Sooo - maybe you feel like implementing the above? ;)

> >> in which the "then" value is the result of the conditionally-executed
> >> operation and the "else" value is the first operand of that operation.
> >> This "else" value is the one guaranteed by IFN_COND_* and so we can
> >> replace y with x.
> >
> >> The patch also adds new conditional functions for multiplication
> >> and division, which previously weren't needed.  This enables an
> >> extra fully-masked reduction (of dubious value) in
gcc.dg/vect/pr53773.c.
> >
> >> Tested on aarch64-linux-gnu (with and without SVE), aarch64_be-elf
> >> and x86_64-linux-gnu.  OK to install?
> >
> > It does look like a clever way of expressing conditional execution.  It
> > seems
> > "scaling" this to more operations is a bit awkward and certainly it
would be
> > nice to see for example the division case also prototyped for AVX512 to
see
> > if it works for anything besides ARM.  Kirill CCed.

> Yeah, I think the new version should be general enough for AVX512.
> I've added a couple of gcc.dg/vect tests that are keyed off
> vect_double_cond_arith.

> Tested as before.  OK to install?

In the if-conversion part how can it be that you need
value_available_p?  Why do you delay propagating out
redundant SSA names?

It feels somewhat ugly possibly because if-conversion is implemented
like it is right now?

Thanks,
Richard.

> Richard


> 2018-05-25  Richard Sandiford  

> gcc/
>  * fold-const.h (inverse_conditions_p): Declare.
>  * fold-const.c (interpret_as_condition_p): New function.
>  (inverse_conditions_p): Likewise.
>  * match.pd: Use inverse_conditions_p.  Add folds of view_converts
>  that test the inverse condition of a conditional internal
function.
>  * internal-fn.h (vectorized_internal_fn_supported_p): Declare.
>  * internal-fn.c (internal_fn_mask_inde

Re: [PATCH] wwwdocs: Update Intel CET for GCC 8 changes

[Richard Biener]

On Fri, May 25, 2018 at 12:49 PM H.J. Lu  wrote:

> Only -fcf-protection is needed to enable Intel CET.

> OK to check in?

OK.

> H.J.
> ---
> Index: changes.html
> ===
> RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-8/changes.html,v
> retrieving revision 1.82
> diff -u -p -r1.82 changes.html
> --- changes.html17 May 2018 06:31:53 -  1.82
> +++ changes.html25 May 2018 10:46:44 -
> @@ -1138,10 +1138,7 @@ is now easier-to-read.
>   extensions.
> 
>   GCC now supports the Intel Control-flow Enforcement Technology
> -(CET) extension through -mibt, -mshstk,
> --mcet options. One of these options has to accompany the
> --fcf-protection option to enable code instrumentation
for
> -control-flow protection.
> +(CET) extension through -fcf-protectionoption.
> 
>   

Re: Implement SLP of internal functions

[Richard Biener]

On Fri, May 25, 2018 at 12:31 PM Richard Sandiford <
richard.sandif...@linaro.org> wrote:

> Richard Biener  writes:
> >> Index: gcc/tree-vect-slp.c
> >> ===
> >> --- gcc/tree-vect-slp.c 2018-05-16 11:02:46.262494712 +0100
> >> +++ gcc/tree-vect-slp.c 2018-05-16 11:12:11.873116180 +0100
> >> @@ -564,6 +564,41 @@ vect_get_and_check_slp_defs (vec_info *v
> >> return 0;
> >>   }
> >
> >> +/* Return true if call statements CALL1 and CALL2 are similar enough
> >> +   to be combined into the same SLP group.  */
> >> +
> >> +static bool
> >> +compatible_calls_p (gcall *call1, gcall *call2)
> >> +{
> >> +  unsigned int nargs = gimple_call_num_args (call1);
> >> +  if (nargs != gimple_call_num_args (call2))
> >> +return false;
> >> +
> >> +  if (gimple_call_combined_fn (call1) != gimple_call_combined_fn
(call2))
> >> +return false;
> >> +
> >> +  if (gimple_call_internal_p (call1))
> >> +{
> >> +  if (TREE_TYPE (gimple_call_lhs (call1))
> >> + != TREE_TYPE (gimple_call_lhs (call2)))
> >> +   return false;
> >> +  for (unsigned int i = 0; i < nargs; ++i)
> >> +   if (TREE_TYPE (gimple_call_arg (call1, i))
> >> +   != TREE_TYPE (gimple_call_arg (call2, i)))
> >
> > Please use types_compatible_p in these two type comparisons.

> OK.

> > Can you please add a generic vect_call_sqrtf to the main vectorizer
> > testsuite?  In fact I already see
> > gcc.dg/vect/fast-math-bb-slp-call-1.c.  Does that mean SQRT does never
> > appear as internal function before vectorization?

> Yeah, sqrt vectorisation is scalar built-in -> vector internal function.

> But this patch adds a generic type keyed off vect_double_cond_arith.
> Would that be OK instead?

Yes, that works for me.

Thanks,
Richard.

> Tested as before.

> Thanks,
> Richard


> 2018-05-25  Richard Sandiford  

> gcc/
>  * internal-fn.h (vectorizable_internal_fn_p): New function.
>  * tree-vect-slp.c (compatible_calls_p): Likewise.
>  (vect_build_slp_tree_1): Remove nops argument.  Handle calls
>  to internal functions.
>  (vect_build_slp_tree_2): Update call to vect_build_slp_tree_1.

> gcc/testsuite/
>  * gcc.dg/vect/vect-cond-arith-6.c: New test.
>  * gcc.target/aarch64/sve/cond_arith_4.c: Likewise.
>  * gcc.target/aarch64/sve/cond_arith_4_run.c: Likewise.
>  * gcc.target/aarch64/sve/cond_arith_5.c: Likewise.
>  * gcc.target/aarch64/sve/cond_arith_5_run.c: Likewise.
>  * gcc.target/aarch64/sve/slp_14.c: Likewise.
>  * gcc.target/aarch64/sve/slp_14_run.c: Likewise.

> Index: gcc/internal-fn.h
> ===
> --- gcc/internal-fn.h   2018-05-25 11:28:05.953287025 +0100
> +++ gcc/internal-fn.h   2018-05-25 11:28:06.193277781 +0100
> @@ -160,6 +160,17 @@ direct_internal_fn_p (internal_fn fn)
> return direct_internal_fn_array[fn].type0 >= -1;
>   }

> +/* Return true if FN is a direct internal function that can be
vectorized by
> +   converting the return type and all argument types to vectors of the
same
> +   number of elements.  E.g. we can vectorize an IFN_SQRT on floats as an
> +   IFN_SQRT on vectors of N floats.  */
> +
> +inline bool
> +vectorizable_internal_fn_p (internal_fn fn)
> +{
> +  return direct_internal_fn_array[fn].vectorizable;
> +}
> +
>   /* Return optab information about internal function FN.  Only meaningful
>  if direct_internal_fn_p (FN).  */

> Index: gcc/tree-vect-slp.c
> ===
> --- gcc/tree-vect-slp.c 2018-05-25 11:28:05.953287025 +0100
> +++ gcc/tree-vect-slp.c 2018-05-25 11:28:06.195277704 +0100
> @@ -565,6 +565,41 @@ vect_get_and_check_slp_defs (vec_info *v
> return 0;
>   }

> +/* Return true if call statements CALL1 and CALL2 are similar enough
> +   to be combined into the same SLP group.  */
> +
> +static bool
> +compatible_calls_p (gcall *call1, gcall *call2)
> +{
> +  unsigned int nargs = gimple_call_num_args (call1);
> +  if (nargs != gimple_call_num_args (call2))
> +return false;
> +
> +  if (gimple_call_combined_fn (call1) != gimple_call_combined_fn (call2))
> +return false;
> +
> +  if (gimple_call_internal_p (call1))
> +{
> +  if (!types_compatible_p (TREE_TYPE (gimple_call_lhs (call1)),
> +  TREE_TYPE (gimple_call_lhs (call2
> +   return false;
> +  for (unsigned int i = 0; i < nargs; ++i)
> +   if (!types_compatible_p (TREE_TYPE (gimple_call_arg (call1, i)),
> +TREE_TYPE (gimple_call_arg (call2, i
> + return false;
> +}
> +  else
> +{
> +  if (!operand_equal_p (gimple_call_fn (call1),
> +   gimple_call_fn (call2), 0))
> +   return false;
> +
> +  if (gimple_call_fntype (call1) != gimple_call_fntype (call2))
> +   return false;
> +}
> +  return

[PATCH] Print working directory only in intermediate format (PR gcov-profile/84846).

[Martin Liška]

Hi.

As requested by Eric, let's print working directory just in intermediate format:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84846#c8

gcov.exp tests works with the patch.

Ready for trunk?
Martin

gcc/ChangeLog:

2018-05-25  Martin Liska  

PR gcov-profile/84846
* gcov.c (output_lines): Print working directory only
in intermediate format.
---
 gcc/gcov.c | 2 --
 1 file changed, 2 deletions(-)


diff --git a/gcc/gcov.c b/gcc/gcov.c
index 887972a1fcd..a2a5d1c0175 100644
--- a/gcc/gcov.c
+++ b/gcc/gcov.c
@@ -2945,8 +2945,6 @@ output_lines (FILE *gcov_file, const source_info *src)
   const char *retval;
 
   fprintf (gcov_file, DEFAULT_LINE_START "Source:%s\n", src->coverage.name);
-  fprintf (gcov_file, DEFAULT_LINE_START "Working directory:%s\n",
-	   bbg_cwd);
   if (!multiple_files)
 {
   fprintf (gcov_file, DEFAULT_LINE_START "Graph:%s\n", bbg_file_name);

Re: [PATCH] Check ifunc_resolver only on FUNCTION_DECL

[H.J. Lu]

On Thu, May 24, 2018 at 04:43:25AM -0700, H.J. Lu wrote:
> Since ifunc_resolver is only valid on FUNCTION_DECL, check ifunc_resolver
> only on FUNCTION_DECL.
> 
> Please test it on Darwin.
> 
> 
> H.J.
> ---
>   PR target/85900
>   PR target/85345
>   * varasm.c (assemble_alias): Check ifunc_resolver only on
>   FUNCTION_DECL.
> ---
>  gcc/varasm.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/gcc/varasm.c b/gcc/varasm.c
> index 3bd9cbb69f0..bff43450a91 100644
> --- a/gcc/varasm.c
> +++ b/gcc/varasm.c
> @@ -5917,7 +5917,8 @@ assemble_alias (tree decl, tree target)
>  # else
>if (!DECL_WEAK (decl))
>   {
> -   if (cgraph_node::get (decl)->ifunc_resolver)
> +   if (TREE_CODE (decl) == FUNCTION_DECL
> +   && cgraph_node::get (decl)->ifunc_resolver)
>   error_at (DECL_SOURCE_LOCATION (decl),
> "ifunc is not supported in this configuration");
> else
> -- 

Please test it on Darwin.

H.J.
---
Since ifunc_resolver isn't set when an error is detected, we should
lookup ifunc attribute in this case.

PR target/85900
PR target/85345
* varasm.c (assemble_alias): Lookup ifunc attribute on error.
---
 gcc/varasm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/varasm.c b/gcc/varasm.c
index 6b9f87b203f..4d332f50270 100644
--- a/gcc/varasm.c
+++ b/gcc/varasm.c
@@ -5917,8 +5917,9 @@ assemble_alias (tree decl, tree target)
 # else
   if (!DECL_WEAK (decl))
{
+ /* NB: ifunc_resolver isn't set when an error is detected.  */
  if (TREE_CODE (decl) == FUNCTION_DECL
- && cgraph_node::get (decl)->ifunc_resolver)
+ && lookup_attribute ("ifunc", DECL_ATTRIBUTES (decl)))
error_at (DECL_SOURCE_LOCATION (decl),
  "ifunc is not supported in this configuration");
  else
-- 
2.17.0

Re: Use conditional internal functions in if-conversion

[Richard Sandiford]

Richard Biener  writes:
> On Fri, May 25, 2018 at 12:12 PM Richard Sandiford <
> richard.sandif...@linaro.org> wrote:
>
>> Richard Biener  writes:
>> > On Wed, May 16, 2018 at 12:17 PM Richard Sandiford <
>> > richard.sandif...@linaro.org> wrote:
>> >> This patch uses IFN_COND_* to vectorise conditionally-executed,
>> >> potentially-trapping arithmetic, such as most floating-point
>> >> ops with -ftrapping-math.  E.g.:
>> >
>> >>  if (cond) { ... x = a + b; ... }
>> >
>> >> becomes:
>> >
>> >>  ...
>> >>  x = IFN_COND_ADD (cond, a, b);
>> >>  ...
>> >
>> >> When this transformation is done on its own, the value of x for
>> >> !cond isn't important.
>> >
>> >> However, the patch also looks for the equivalent of:
>> >
>> >>  y = cond ? x : a;
>> >
>> > As generated by predicate_all_scalar_phis, right?  So this tries to
> capture
>> >
>> >   if (cond)
>> > y = a / b;
>> >   else
>> > y = a;
>> >
>> > But I think it would be more useful to represent the else value
> explicitely
>> > as extra operand given a constant like 0 is sth that will happen in
> practice
>> > and is also sth that is I think supported as a result by some targets.
>> >
>> > So to support the flow of current if-conversion you'd convert to
>> >
>> >   IFN_COND_ADD (cond, a, b, a); // or any other reasonable "default"
> value
>> > (target controlled?)
>> >
>> > and you merge that with a single-use COND_EXPR by replacing that
> operand.
>> >
>> > If a target then cannot support the default value it needs to emit a
> blend
>> > afterwards.
>
>> Yeah, that's definitely better.  I was a bit worried about the extra
>> generality, but it turns out that (on SVE) having the else argument and
>> getting the .md patterns to blend the input can avoid an unnecessary
>> move that would be difficult to remove otherwise.
>
> Btw, I've checked AVX512 and their masked operations either blend
> into the destination or zero the masked elements.  Possibly useful
> for plus reductions.

OK.

>> I've committed the patches to add the else argument and the target hook
>> to select the preferred else value (thanks for the reviews).  The patch
>> below now uses that preferred else value if there's no ?: or if the
>> else value of the ?: isn't available at the point of the conditional
>> operation.
>
>> This version also copes with:
>
>>  if (cond) { ... x = a + b; ... }
>>  y = !cond ? c : x;
>
>> by adding a new utility function inverse_conditions_p.
>
> interpret_as_condition_p is a bit of a layering violation in fold-const.c
> since it looks at SSA_NAME_DEF_STMT.  In gimple.c we have a related
> thing, mainly used by forwprop - canonicalize_cond_expr_cond which is
> used to interpret a GENERIC folded thing as condition.
>
> Do you really need the def stmt lookup?

Yeah, since these internal functions always take a gimple value
as input, not a comparison code.  But I can put the code elsewhere.

> Note that one item on my TODO list is to remove [VEC_]COND_EXPR from
> gimple in favor of using a quaternary assign stmt with tcc_comparison code
> so we'd have
>
>   op0 = op1 < op2 ? op3 : op4;
>
> that means currently valid op0 = op1 < op2; would become
> a more explicit op0 = op1 < op2 ? true : false;
>
> That means you'd for example may need to handle _1 != 0 being
> feeded by _1 = _2 < _3 ? true : false;  -- or simply rely on those
> to be combined.
>
> Sooo - maybe you feel like implementing the above? ;)

So is just requiring a gimple value in COND_EXPR and VEC_COND_EXPR
a non-starter?  That seems neater IMO.  (And probably replacing
them with a single code.)

I think part of the problem with the 4-way stmt is that it becomes
harder to know what canonical form to use.  E.g. should it be
canonicalised so that op4 is a constant where possible?
Or should it be canonicalised based on the condition?  I've seen
this lead to cases in which we end up inserting opposite comparisons
with the current embedded VEC_COND_EXPR stuff, whereas splitting
them out would make it more obvious that the comparison and the
select are logically two separate things.

It would also be a bit inconsistent with IFN_COND_*, since they'd
still take the result of a separate comparison, and also the older
IFN_MASK* functions.

I guess gcond would still be a plain comparison?

>> >> in which the "then" value is the result of the conditionally-executed
>> >> operation and the "else" value is the first operand of that operation.
>> >> This "else" value is the one guaranteed by IFN_COND_* and so we can
>> >> replace y with x.
>> >
>> >> The patch also adds new conditional functions for multiplication
>> >> and division, which previously weren't needed.  This enables an
>> >> extra fully-masked reduction (of dubious value) in
> gcc.dg/vect/pr53773.c.
>> >
>> >> Tested on aarch64-linux-gnu (with and without SVE), aarch64_be-elf
>> >> and x86_64-linux-gnu.  OK to install?
>> >
>> > It does look like a clever way of expressing conditional execution.  It
>> > seems
>> > "

Re: Use conditional internal functions in if-conversion

[Richard Biener]

On Fri, May 25, 2018 at 1:49 PM Richard Sandiford <
richard.sandif...@linaro.org> wrote:

> Richard Biener  writes:
> > On Fri, May 25, 2018 at 12:12 PM Richard Sandiford <
> > richard.sandif...@linaro.org> wrote:
> >
> >> Richard Biener  writes:
> >> > On Wed, May 16, 2018 at 12:17 PM Richard Sandiford <
> >> > richard.sandif...@linaro.org> wrote:
> >> >> This patch uses IFN_COND_* to vectorise conditionally-executed,
> >> >> potentially-trapping arithmetic, such as most floating-point
> >> >> ops with -ftrapping-math.  E.g.:
> >> >
> >> >>  if (cond) { ... x = a + b; ... }
> >> >
> >> >> becomes:
> >> >
> >> >>  ...
> >> >>  x = IFN_COND_ADD (cond, a, b);
> >> >>  ...
> >> >
> >> >> When this transformation is done on its own, the value of x for
> >> >> !cond isn't important.
> >> >
> >> >> However, the patch also looks for the equivalent of:
> >> >
> >> >>  y = cond ? x : a;
> >> >
> >> > As generated by predicate_all_scalar_phis, right?  So this tries to
> > capture
> >> >
> >> >   if (cond)
> >> > y = a / b;
> >> >   else
> >> > y = a;
> >> >
> >> > But I think it would be more useful to represent the else value
> > explicitely
> >> > as extra operand given a constant like 0 is sth that will happen in
> > practice
> >> > and is also sth that is I think supported as a result by some
targets.
> >> >
> >> > So to support the flow of current if-conversion you'd convert to
> >> >
> >> >   IFN_COND_ADD (cond, a, b, a); // or any other reasonable "default"
> > value
> >> > (target controlled?)
> >> >
> >> > and you merge that with a single-use COND_EXPR by replacing that
> > operand.
> >> >
> >> > If a target then cannot support the default value it needs to emit a
> > blend
> >> > afterwards.
> >
> >> Yeah, that's definitely better.  I was a bit worried about the extra
> >> generality, but it turns out that (on SVE) having the else argument and
> >> getting the .md patterns to blend the input can avoid an unnecessary
> >> move that would be difficult to remove otherwise.
> >
> > Btw, I've checked AVX512 and their masked operations either blend
> > into the destination or zero the masked elements.  Possibly useful
> > for plus reductions.

> OK.

> >> I've committed the patches to add the else argument and the target hook
> >> to select the preferred else value (thanks for the reviews).  The patch
> >> below now uses that preferred else value if there's no ?: or if the
> >> else value of the ?: isn't available at the point of the conditional
> >> operation.
> >
> >> This version also copes with:
> >
> >>  if (cond) { ... x = a + b; ... }
> >>  y = !cond ? c : x;
> >
> >> by adding a new utility function inverse_conditions_p.
> >
> > interpret_as_condition_p is a bit of a layering violation in
fold-const.c
> > since it looks at SSA_NAME_DEF_STMT.  In gimple.c we have a related
> > thing, mainly used by forwprop - canonicalize_cond_expr_cond which is
> > used to interpret a GENERIC folded thing as condition.
> >
> > Do you really need the def stmt lookup?

> Yeah, since these internal functions always take a gimple value
> as input, not a comparison code.  But I can put the code elsewhere.

> > Note that one item on my TODO list is to remove [VEC_]COND_EXPR from
> > gimple in favor of using a quaternary assign stmt with tcc_comparison
code
> > so we'd have
> >
> >   op0 = op1 < op2 ? op3 : op4;
> >
> > that means currently valid op0 = op1 < op2; would become
> > a more explicit op0 = op1 < op2 ? true : false;
> >
> > That means you'd for example may need to handle _1 != 0 being
> > feeded by _1 = _2 < _3 ? true : false;  -- or simply rely on those
> > to be combined.
> >
> > Sooo - maybe you feel like implementing the above? ;)

> So is just requiring a gimple value in COND_EXPR and VEC_COND_EXPR
> a non-starter?  That seems neater IMO.  (And probably replacing
> them with a single code.)

That's the alternative.  OTOH with the above we have a single canonical
way to compute the value of a comparison rather than two as we have now:
  _1 = _2 < _3;
vs.
  _1 = _2 < _3 ? true : false;

so I somewhat settled on that "fix" to the GENERIC expression in
our [VEC_]COND_EXPRs.   Also targets seem to like "repeated"
conditions better.

> I think part of the problem with the 4-way stmt is that it becomes
> harder to know what canonical form to use.  E.g. should it be
> canonicalised so that op4 is a constant where possible?
> Or should it be canonicalised based on the condition?

We have the same issue with COND_EXPR right now...

>   I've seen
> this lead to cases in which we end up inserting opposite comparisons
> with the current embedded VEC_COND_EXPR stuff, whereas splitting
> them out would make it more obvious that the comparison and the
> select are logically two separate things.

True, but you'd still have the choice of inverting the condition and thus
swapping the operands.

> It would also be a bit inconsistent with IFN_COND_*, since they'd
> still take the result of a separ

Re: Use conditional internal functions in if-conversion

[Richard Biener]

On Fri, May 25, 2018 at 2:02 PM Richard Biener 
wrote:

> On Fri, May 25, 2018 at 1:49 PM Richard Sandiford <
> richard.sandif...@linaro.org> wrote:

> > Richard Biener  writes:
> > > On Fri, May 25, 2018 at 12:12 PM Richard Sandiford <
> > > richard.sandif...@linaro.org> wrote:
> > >
> > >> Richard Biener  writes:
> > >> > On Wed, May 16, 2018 at 12:17 PM Richard Sandiford <
> > >> > richard.sandif...@linaro.org> wrote:
> > >> >> This patch uses IFN_COND_* to vectorise conditionally-executed,
> > >> >> potentially-trapping arithmetic, such as most floating-point
> > >> >> ops with -ftrapping-math.  E.g.:
> > >> >
> > >> >>  if (cond) { ... x = a + b; ... }
> > >> >
> > >> >> becomes:
> > >> >
> > >> >>  ...
> > >> >>  x = IFN_COND_ADD (cond, a, b);
> > >> >>  ...
> > >> >
> > >> >> When this transformation is done on its own, the value of x for
> > >> >> !cond isn't important.
> > >> >
> > >> >> However, the patch also looks for the equivalent of:
> > >> >
> > >> >>  y = cond ? x : a;
> > >> >
> > >> > As generated by predicate_all_scalar_phis, right?  So this tries to
> > > capture
> > >> >
> > >> >   if (cond)
> > >> > y = a / b;
> > >> >   else
> > >> > y = a;
> > >> >
> > >> > But I think it would be more useful to represent the else value
> > > explicitely
> > >> > as extra operand given a constant like 0 is sth that will happen in
> > > practice
> > >> > and is also sth that is I think supported as a result by some
> targets.
> > >> >
> > >> > So to support the flow of current if-conversion you'd convert to
> > >> >
> > >> >   IFN_COND_ADD (cond, a, b, a); // or any other reasonable
"default"
> > > value
> > >> > (target controlled?)
> > >> >
> > >> > and you merge that with a single-use COND_EXPR by replacing that
> > > operand.
> > >> >
> > >> > If a target then cannot support the default value it needs to emit
a
> > > blend
> > >> > afterwards.
> > >
> > >> Yeah, that's definitely better.  I was a bit worried about the extra
> > >> generality, but it turns out that (on SVE) having the else argument
and
> > >> getting the .md patterns to blend the input can avoid an unnecessary
> > >> move that would be difficult to remove otherwise.
> > >
> > > Btw, I've checked AVX512 and their masked operations either blend
> > > into the destination or zero the masked elements.  Possibly useful
> > > for plus reductions.

> > OK.

> > >> I've committed the patches to add the else argument and the target
hook
> > >> to select the preferred else value (thanks for the reviews).  The
patch
> > >> below now uses that preferred else value if there's no ?: or if the
> > >> else value of the ?: isn't available at the point of the conditional
> > >> operation.
> > >
> > >> This version also copes with:
> > >
> > >>  if (cond) { ... x = a + b; ... }
> > >>  y = !cond ? c : x;
> > >
> > >> by adding a new utility function inverse_conditions_p.
> > >
> > > interpret_as_condition_p is a bit of a layering violation in
> fold-const.c
> > > since it looks at SSA_NAME_DEF_STMT.  In gimple.c we have a related
> > > thing, mainly used by forwprop - canonicalize_cond_expr_cond which is
> > > used to interpret a GENERIC folded thing as condition.
> > >
> > > Do you really need the def stmt lookup?

> > Yeah, since these internal functions always take a gimple value
> > as input, not a comparison code.  But I can put the code elsewhere.

> > > Note that one item on my TODO list is to remove [VEC_]COND_EXPR from
> > > gimple in favor of using a quaternary assign stmt with tcc_comparison
> code
> > > so we'd have
> > >
> > >   op0 = op1 < op2 ? op3 : op4;
> > >
> > > that means currently valid op0 = op1 < op2; would become
> > > a more explicit op0 = op1 < op2 ? true : false;
> > >
> > > That means you'd for example may need to handle _1 != 0 being
> > > feeded by _1 = _2 < _3 ? true : false;  -- or simply rely on those
> > > to be combined.
> > >
> > > Sooo - maybe you feel like implementing the above? ;)

> > So is just requiring a gimple value in COND_EXPR and VEC_COND_EXPR
> > a non-starter?  That seems neater IMO.  (And probably replacing
> > them with a single code.)

> That's the alternative.  OTOH with the above we have a single canonical
> way to compute the value of a comparison rather than two as we have now:
>_1 = _2 < _3;
> vs.
>_1 = _2 < _3 ? true : false;

> so I somewhat settled on that "fix" to the GENERIC expression in
> our [VEC_]COND_EXPRs.   Also targets seem to like "repeated"
> conditions better.

So maybe we can do the gimple value requiring first and then consider
the quaternary later.  It's just about changing the verifier, gimplifier
and then
dealing with the fallout...

At least IIRC (I've done this before) this isn't too complicated if you
restrict yourself to [VEC_]COND_EXPR - I've done it including
gcond the last time...

Richard.

> > I think part of the problem with the 4-way stmt is that it becomes
> > harder to know what canonical form to use.  E.g. should

[PATCH] Enhance BB vectorization dependence analysis

[Richard Biener]

This simplifies data-ref analysis further and to make that work enhances
BB vectorization dependence analysis as a comment suggested.  I've
needed to add tbaa_p flags to some of the alias disambiguators.

Bootstrapped and tested on x86_64-unknown-linux-gnu, SPEC 2k6 build
is running right now.

Richard.

>From 7478a9f17446e7ad1355b5a060ef8a65945e5323 Mon Sep 17 00:00:00 2001
From: Richard Guenther 
Date: Fri, 25 May 2018 12:02:48 +0200
Subject: [PATCH] Use oracle in BB vectorizer dependence analysis

2018-05-25  Richard Biener  

* tree-ssa-alias.h (refs_may_alias_p): Add tbaa_p bool parameter,
defaulted to true.
(ref_maybe_used_by_stmt_p): Likewise.
(stmt_may_clobber_ref_p): Likewise.
(stmt_may_clobber_ref_p_1): Likewise.
* tree-ssa-alias.c (refs_may_alias_p): Add tbaa_p bool parameter
and pass it along.
(ref_maybe_used_by_stmt_p): Likewise.
(stmt_may_clobber_ref_p): Likewise.
(stmt_may_clobber_ref_p_1): Likewise.
* tree-vect-data-refs.c (vect_slp_analyze_node_dependences): Use
the alias oracle to disambiguate DRs with stmts DR analysis
couldn't handle.
(vect_analyze_data_refs): Do not give up on not analyzable
DRs for BB vectorization.  Remove code truncating the dataref
vector.

diff --git a/gcc/tree-ssa-alias.c b/gcc/tree-ssa-alias.c
index 5776687ea11..7b25778307f 100644
--- a/gcc/tree-ssa-alias.c
+++ b/gcc/tree-ssa-alias.c
@@ -1509,21 +1509,21 @@ refs_may_alias_p_1 (ao_ref *ref1, ao_ref *ref2, bool 
tbaa_p)
 }
 
 static bool
-refs_may_alias_p (tree ref1, ao_ref *ref2)
+refs_may_alias_p (tree ref1, ao_ref *ref2, bool tbaa_p)
 {
   ao_ref r1;
   ao_ref_init (&r1, ref1);
-  return refs_may_alias_p_1 (&r1, ref2, true);
+  return refs_may_alias_p_1 (&r1, ref2, tbaa_p);
 }
 
 bool
-refs_may_alias_p (tree ref1, tree ref2)
+refs_may_alias_p (tree ref1, tree ref2, bool tbaa_p)
 {
   ao_ref r1, r2;
   bool res;
   ao_ref_init (&r1, ref1);
   ao_ref_init (&r2, ref2);
-  res = refs_may_alias_p_1 (&r1, &r2, true);
+  res = refs_may_alias_p_1 (&r1, &r2, tbaa_p);
   if (res)
 ++alias_stats.refs_may_alias_p_may_alias;
   else
@@ -1559,7 +1559,7 @@ refs_output_dependent_p (tree store1, tree store2)
otherwise return false.  */
 
 static bool
-ref_maybe_used_by_call_p_1 (gcall *call, ao_ref *ref)
+ref_maybe_used_by_call_p_1 (gcall *call, ao_ref *ref, bool tbaa_p)
 {
   tree base, callee;
   unsigned i;
@@ -1860,7 +1860,7 @@ process_args:
{
  ao_ref r;
  ao_ref_init (&r, op);
- if (refs_may_alias_p_1 (&r, ref, true))
+ if (refs_may_alias_p_1 (&r, ref, tbaa_p))
return true;
}
 }
@@ -1869,10 +1869,10 @@ process_args:
 }
 
 static bool
-ref_maybe_used_by_call_p (gcall *call, ao_ref *ref)
+ref_maybe_used_by_call_p (gcall *call, ao_ref *ref, bool tbaa_p)
 {
   bool res;
-  res = ref_maybe_used_by_call_p_1 (call, ref);
+  res = ref_maybe_used_by_call_p_1 (call, ref, tbaa_p);
   if (res)
 ++alias_stats.ref_maybe_used_by_call_p_may_alias;
   else
@@ -1885,7 +1885,7 @@ ref_maybe_used_by_call_p (gcall *call, ao_ref *ref)
true, otherwise return false.  */
 
 bool
-ref_maybe_used_by_stmt_p (gimple *stmt, ao_ref *ref)
+ref_maybe_used_by_stmt_p (gimple *stmt, ao_ref *ref, bool tbaa_p)
 {
   if (is_gimple_assign (stmt))
 {
@@ -1901,17 +1901,17 @@ ref_maybe_used_by_stmt_p (gimple *stmt, ao_ref *ref)
  || gimple_assign_rhs_code (stmt) == CONSTRUCTOR)
return false;
 
-  return refs_may_alias_p (rhs, ref);
+  return refs_may_alias_p (rhs, ref, tbaa_p);
 }
   else if (is_gimple_call (stmt))
-return ref_maybe_used_by_call_p (as_a  (stmt), ref);
+return ref_maybe_used_by_call_p (as_a  (stmt), ref, tbaa_p);
   else if (greturn *return_stmt = dyn_cast  (stmt))
 {
   tree retval = gimple_return_retval (return_stmt);
   if (retval
  && TREE_CODE (retval) != SSA_NAME
  && !is_gimple_min_invariant (retval)
- && refs_may_alias_p (retval, ref))
+ && refs_may_alias_p (retval, ref, tbaa_p))
return true;
   /* If ref escapes the function then the return acts as a use.  */
   tree base = ao_ref_base (ref);
@@ -1929,11 +1929,11 @@ ref_maybe_used_by_stmt_p (gimple *stmt, ao_ref *ref)
 }
 
 bool
-ref_maybe_used_by_stmt_p (gimple *stmt, tree ref)
+ref_maybe_used_by_stmt_p (gimple *stmt, tree ref, bool tbaa_p)
 {
   ao_ref r;
   ao_ref_init (&r, ref);
-  return ref_maybe_used_by_stmt_p (stmt, &r);
+  return ref_maybe_used_by_stmt_p (stmt, &r, tbaa_p);
 }
 
 /* If the call in statement CALL may clobber the memory reference REF
@@ -2245,7 +2245,7 @@ call_may_clobber_ref_p (gcall *call, tree ref)
otherwise return false.  */
 
 bool
-stmt_may_clobber_ref_p_1 (gimple *stmt, ao_ref *ref)
+stmt_may_clobber_ref_p_1 (gimple *stmt, ao_ref *ref, bool tbaa_p)
 {
   if (is_gimple_call (stmt))
 {
@@ -2255,7 +2255,7 @@ stmt_may_clobber_ref_p_1 (gimple *stmt, ao_r

[PATCH] libgcc: Add support for --disable-libgcov

[Rasmus Villemoes]

When trying to build gcc 6.4.0 targeting VxWorks 5.5, I ran into libgcov
not building against the VxWorks system headers - there are multiple
issues such as

gcc-src/libgcc/../gcc/gcov-io.c:78:3: warning: implicit declaration of function 
'getpid' [-Wimplicit-function-declaration]
   s_flock.l_pid = getpid ();
   ^

gcc-src/libgcc/libgcov.c:139:9: warning: implicit declaration of function 
'access' [-Wimplicit-function-declaration]
 if (access (filename, F_OK) == -1
 ^
gcc-src/libgcc/libgcov.c:139:31: error: 'F_OK' undeclared (first use in this 
function)
 if (access (filename, F_OK) == -1
   ^
Moreover, from the gcov documentation, it would seem to be cumbersome at
best to actually use it on VxWorks. So add an option for disabling build
and install of libgcov.

It would probably be most user-friendly if the resulting compiler would
reject --coverage and -fprofile-arcs, but I couldn't find an easy way to
do that.

2018-05-25  Rasmus Villemoes  

libgcc/
* Makefile.in: Honour @enable_libgcov@
* configure.ac: Add --disable-libgcov option
* configure: Regenerate.
---
 libgcc/Makefile.in  | 8 +++-
 libgcc/configure.ac | 5 +
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/libgcc/Makefile.in b/libgcc/Makefile.in
index dd8cee99fd3..22acc15e236 100644
--- a/libgcc/Makefile.in
+++ b/libgcc/Makefile.in
@@ -36,6 +36,7 @@ SHELL = @SHELL@
 
 cpu_type = @cpu_type@
 enable_shared = @enable_shared@
+enable_libgcov = @enable_libgcov@
 double_type_size = @double_type_size@
 long_double_type_size = @long_double_type_size@
 decimal_float = @decimal_float@
@@ -941,7 +942,10 @@ libgcc.a libgcov.a libunwind.a libgcc_eh.a:
 
$(RANLIB) $@
 
-all: libgcc.a libgcov.a
+all: libgcc.a
+ifeq ($(enable_libgcov),yes)
+all: libgcov.a
+endif
 
 ifneq ($(LIBUNWIND),)
 all: libunwind.a
@@ -1164,9 +1168,11 @@ install-leaf: $(install-shared) $(install-libunwind)
$(INSTALL_DATA) libgcc.a $(DESTDIR)$(inst_libdir)/
chmod 644 $(DESTDIR)$(inst_libdir)/libgcc.a
$(RANLIB) $(DESTDIR)$(inst_libdir)/libgcc.a
+ifeq ($(enable_libgcov),yes)
$(INSTALL_DATA) libgcov.a $(DESTDIR)$(inst_libdir)/
chmod 644 $(DESTDIR)$(inst_libdir)/libgcov.a
$(RANLIB) $(DESTDIR)$(inst_libdir)/libgcov.a
+endif
 
parts="$(INSTALL_PARTS)";   \
for file in $$parts; do \
diff --git a/libgcc/configure.ac b/libgcc/configure.ac
index b59aa746afc..a878c473f3d 100644
--- a/libgcc/configure.ac
+++ b/libgcc/configure.ac
@@ -68,6 +68,11 @@ AC_ARG_ENABLE(shared,
 ], [enable_shared=yes])
 AC_SUBST(enable_shared)
 
+AC_ARG_ENABLE(libgcov,
+[  --disable-libgcov   don't provide libgcov],
+[], [enable_libgcov=yes])
+AC_SUBST(enable_libgcov)
+
 AC_ARG_ENABLE(vtable-verify,
 [  --enable-vtable-verifyEnable vtable verification feature ],
 [case "$enableval" in
-- 
2.15.1

Re: Use conditional internal functions in if-conversion

[Richard Sandiford]

Richard Biener  writes:
> On Fri, May 25, 2018 at 1:49 PM Richard Sandiford <
> richard.sandif...@linaro.org> wrote:
>
>> Richard Biener  writes:
>> > On Fri, May 25, 2018 at 12:12 PM Richard Sandiford <
>> > richard.sandif...@linaro.org> wrote:
>> >
>> >> Richard Biener  writes:
>> >> > On Wed, May 16, 2018 at 12:17 PM Richard Sandiford <
>> >> > richard.sandif...@linaro.org> wrote:
>> >> >> This patch uses IFN_COND_* to vectorise conditionally-executed,
>> >> >> potentially-trapping arithmetic, such as most floating-point
>> >> >> ops with -ftrapping-math.  E.g.:
>> >> >
>> >> >>  if (cond) { ... x = a + b; ... }
>> >> >
>> >> >> becomes:
>> >> >
>> >> >>  ...
>> >> >>  x = IFN_COND_ADD (cond, a, b);
>> >> >>  ...
>> >> >
>> >> >> When this transformation is done on its own, the value of x for
>> >> >> !cond isn't important.
>> >> >
>> >> >> However, the patch also looks for the equivalent of:
>> >> >
>> >> >>  y = cond ? x : a;
>> >> >
>> >> > As generated by predicate_all_scalar_phis, right?  So this tries to
>> > capture
>> >> >
>> >> >   if (cond)
>> >> > y = a / b;
>> >> >   else
>> >> > y = a;
>> >> >
>> >> > But I think it would be more useful to represent the else value
>> > explicitely
>> >> > as extra operand given a constant like 0 is sth that will happen in
>> > practice
>> >> > and is also sth that is I think supported as a result by some
> targets.
>> >> >
>> >> > So to support the flow of current if-conversion you'd convert to
>> >> >
>> >> >   IFN_COND_ADD (cond, a, b, a); // or any other reasonable "default"
>> > value
>> >> > (target controlled?)
>> >> >
>> >> > and you merge that with a single-use COND_EXPR by replacing that
>> > operand.
>> >> >
>> >> > If a target then cannot support the default value it needs to emit a
>> > blend
>> >> > afterwards.
>> >
>> >> Yeah, that's definitely better.  I was a bit worried about the extra
>> >> generality, but it turns out that (on SVE) having the else argument and
>> >> getting the .md patterns to blend the input can avoid an unnecessary
>> >> move that would be difficult to remove otherwise.
>> >
>> > Btw, I've checked AVX512 and their masked operations either blend
>> > into the destination or zero the masked elements.  Possibly useful
>> > for plus reductions.
>
>> OK.
>
>> >> I've committed the patches to add the else argument and the target hook
>> >> to select the preferred else value (thanks for the reviews).  The patch
>> >> below now uses that preferred else value if there's no ?: or if the
>> >> else value of the ?: isn't available at the point of the conditional
>> >> operation.
>> >
>> >> This version also copes with:
>> >
>> >>  if (cond) { ... x = a + b; ... }
>> >>  y = !cond ? c : x;
>> >
>> >> by adding a new utility function inverse_conditions_p.
>> >
>> > interpret_as_condition_p is a bit of a layering violation in
> fold-const.c
>> > since it looks at SSA_NAME_DEF_STMT.  In gimple.c we have a related
>> > thing, mainly used by forwprop - canonicalize_cond_expr_cond which is
>> > used to interpret a GENERIC folded thing as condition.
>> >
>> > Do you really need the def stmt lookup?
>
>> Yeah, since these internal functions always take a gimple value
>> as input, not a comparison code.  But I can put the code elsewhere.
>
>> > Note that one item on my TODO list is to remove [VEC_]COND_EXPR from
>> > gimple in favor of using a quaternary assign stmt with tcc_comparison
> code
>> > so we'd have
>> >
>> >   op0 = op1 < op2 ? op3 : op4;
>> >
>> > that means currently valid op0 = op1 < op2; would become
>> > a more explicit op0 = op1 < op2 ? true : false;
>> >
>> > That means you'd for example may need to handle _1 != 0 being
>> > feeded by _1 = _2 < _3 ? true : false;  -- or simply rely on those
>> > to be combined.
>> >
>> > Sooo - maybe you feel like implementing the above? ;)
>
>> So is just requiring a gimple value in COND_EXPR and VEC_COND_EXPR
>> a non-starter?  That seems neater IMO.  (And probably replacing
>> them with a single code.)
>
> That's the alternative.  OTOH with the above we have a single canonical
> way to compute the value of a comparison rather than two as we have now:
>   _1 = _2 < _3;
> vs.
>   _1 = _2 < _3 ? true : false;
>
> so I somewhat settled on that "fix" to the GENERIC expression in
> our [VEC_]COND_EXPRs.

But the second feels as redundant as x + 0 to me :-)  Booleans should
be 0 or 1 whereever they come from, whether it's directly from a
comparison, from a BIT_FIELD_REF, from a logical operation, etc.
So if we don*t fold the second to the first at the moment, that seems
like a missed opportunity.

> Also targets seem to like "repeated" conditions better.

What kinds of situation do you mean?

>> I think part of the problem with the 4-way stmt is that it becomes
>> harder to know what canonical form to use.  E.g. should it be
>> canonicalised so that op4 is a constant where possible?
>> Or should it be canonicalised based on the condition?
>
> We have the sam

Re: [PATCH][AArch64] Fix aarch64_ira_change_pseudo_allocno_class

[Wilco Dijkstra]

Richard Sandiford wrote:

> Conceptually what we're saying here is that if the given classes
> include both GENERAL_REGS and FP_REGS, we'll choose between them
> based on the mode of the register.  And that makes sense for any
> class that includes both GENERAL_REGS and FP_REGS.  We could write
> it that way if it seems better, i.e.:
>
>  if (!reg_class_subset_p (GENERAL_REGS, ...)
>  || !reg_class_subset_p (FP_REGS, ...))
>    ...
>
> That way we don't mention any union classes, and I think the meaning
> is clear in the context of eventually returning GENERAL_REGS or FP_REGS.
>
> reg_class_subset_p tests for the normal inclusive subset relation
> rather than "strict subset".

Right, checking for a subset of GENERAL_REGS and FP_REGS does make sense
and is more clear as well. It appears to behave identically, so here is the new 
version:


A recent commit removing '*' from the md files caused a large regression in 
h264ref.
It turns out aarch64_ira_change_pseudo_allocno_class is no longer effective 
after the
SVE changes, and the combination results in the regression.  This patch fixes 
it by
explicitly checking for a subset of GENERAL_REGS and FP_REGS.
Add a missing ? to aarch64_get_lane to fix a failure in the testsuite.

Passes regress, OK for commit? Since it is a regression introduced in GCC8, OK 
to
backport to GCC8?

ChangeLog:
2018-05-25  Wilco Dijkstra  

* config/aarch64/aarch64.c (aarch64_ira_change_pseudo_allocno_class):
Check for subset of GENERAL_REGS and FP_REGS.
* config/aarch64/aarch64-simd.md (aarch64_get_lane): Increase cost of 
r=w alternative.

--
diff --git a/gcc/config/aarch64/aarch64-simd.md 
b/gcc/config/aarch64/aarch64-simd.md
index 
2ebd256329c1a6a6b790d16955cbcee3feca456c..3d5fe44b53198a92afb726712c6e9dee890afe38
 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -2961,7 +2961,7 @@ (define_insn "*aarch64_get_lane_zero_extendsi"
 ;; is guaranteed so upper bits should be considered undefined.
 ;; RTL uses GCC vector extension indices throughout so flip only for assembly.
 (define_insn "aarch64_get_lane"
-  [(set (match_operand: 0 "aarch64_simd_nonimmediate_operand" "=r, w, 
Utv")
+  [(set (match_operand: 0 "aarch64_simd_nonimmediate_operand" "=?r, w, 
Utv")
(vec_select:
  (match_operand:VALL_F16 1 "register_operand" "w, w, w")
  (parallel [(match_operand:SI 2 "immediate_operand" "i, i, i")])))]
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 
47d98dfd095cdcd15908a86091cf2f8a4d6137b1..6e7722187f0f79195c8b6c43f463a3ac9aa61742
 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -1059,16 +1059,17 @@ aarch64_err_no_fpadvsimd (machine_mode mode, const char 
*msg)
 }
 
 /* Implement TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS.
-   The register allocator chooses ALL_REGS if FP_REGS and GENERAL_REGS have
-   the same cost even if ALL_REGS has a much larger cost.  ALL_REGS is also
-   used if the cost of both FP_REGS and GENERAL_REGS is lower than the memory
-   cost (in this case the best class is the lowest cost one).  Using ALL_REGS
-   irrespectively of its cost results in bad allocations with many redundant
-   int<->FP moves which are expensive on various cores.
-   To avoid this we don't allow ALL_REGS as the allocno class, but force a
-   decision between FP_REGS and GENERAL_REGS.  We use the allocno class if it
-   isn't ALL_REGS.  Similarly, use the best class if it isn't ALL_REGS.
-   Otherwise set the allocno class depending on the mode.
+   The register allocator chooses POINTER_AND_FP_REGS if FP_REGS and
+   GENERAL_REGS have the same cost - even if POINTER_AND_FP_REGS has a much
+   higher cost.  POINTER_AND_FP_REGS is also used if the cost of both FP_REGS
+   and GENERAL_REGS is lower than the memory cost (in this case the best class
+   is the lowest cost one).  Using POINTER_AND_FP_REGS irrespectively of its
+   cost results in bad allocations with many redundant int<->FP moves which
+   are expensive on various cores.
+   To avoid this we don't allow POINTER_AND_FP_REGS as the allocno class, but
+   force a decision between FP_REGS and GENERAL_REGS.  We use the allocno class
+   if it isn't POINTER_AND_FP_REGS.  Similarly, use the best class if it isn't
+   POINTER_AND_FP_REGS.  Otherwise set the allocno class depending on the mode.
The result of this is that it is no longer inefficient to have a higher
memory move cost than the register move cost.
 */
@@ -1079,10 +1080,12 @@ aarch64_ira_change_pseudo_allocno_class (int regno, 
reg_class_t allocno_class,
 {
   machine_mode mode;
 
-  if (allocno_class != ALL_REGS)
+  if (reg_class_subset_p (allocno_class, GENERAL_REGS)
+  || reg_class_subset_p (allocno_class, FP_REGS))
 return allocno_class;
 
-  if (best_class != ALL_REGS)
+  if (reg_class_subset_p (best_class, GENERAL_REGS)
+  || reg_class_subset_p (best_class, FP_REGS))
 return best_class;
 
   mode 

Re: [PATCH] gcc/configure.ac: add --disable-systemtap switch

[Eric Gallager]

On 5/24/18, Jeff Law  wrote:
> On 05/12/2018 08:00 AM, Sergei Trofimovich via gcc-patches wrote:
>> From: Sergei Trofimovich 
>>
>> Before the change systemtap probes were enabled
>> if target headers had sys/sdt.h at ./configure time.
>>
>> After the change explicitly ask to enable or disable
>> for probe support and not rely on automagic dependency
>> discovery.
> I'm not terribly concerned about the uninstalling systemtap while
> compiling gcc problem.   That seems like a package management problem on
> the distro side.
>
> 61257 does raise the issue of header file usability which is a much
> bigger concern.  c#1 indicates autoconf-2.70 introduces code which
> instead of testing for header file existence instead checks for
> usability.  So I'd rather see us moving towards making that happen
> rather than explicit enable/disable of systemtap headers/probes.
>
> jeff
>

I retracted c#1 in c#4. What autoconf-2.70 changes is how the
AC_CHECK_HEADERS macro is expanded. In current versions of autoconf,
AC_CHECK_HEADERS checks for header file usability, presence, and
existence, but allows the latter 2 to override the usability check. In
autoconf-2.70, however, AC_CHECK_HEADERS will *only* do the usability
check. However, after looking at the code in question, I found that
AC_CHECK_HEADERS is not even used here, but rather it just does `test
-f`. Thus the autoconf-2.70 changes won't automatically fix anything,
since `test -f` is at the shellcode level rather than the m4 level. So
we don't need to wait for it to be released, and probably shouldn't
anyways, considering how many years its release has been pending.

Eric

[PATCH, alpha]: Improve fix for PR83628

[Uros Bizjak]

Hello!

Attached patch improves fix for PR83628 by providing ashlsi3 pattern.
This allows combiner to remove subregs of inner DImode ashift.

2018-05-25  Uros Bizjak  

PR target/83628
* config/alpha/alpha.md (ashlsi3): New insn pattern.
(*ashlsi_se): Rename from *ashldi_se.  Define as sign
extension of SImode operation.  Use const123_operand predicate.
(*saddsi_1): Remove.
(*saddl_se_1): Ditto.
(*ssubsi_1): Ditto.
(*ssubl_se_1): Ditto.
* config/alpha/predicates.md (const123_operand): New predicate.
* config/alpha/constraints.md (P): Use IN_RANGE.

Bootstrapped and regression tested on alphaev68-linux-gnu.

Committed to mainline SVN.

Uros.
Index: alpha.md
===
--- alpha.md(revision 260675)
+++ alpha.md(working copy)
@@ -527,21 +527,6 @@
s%P2add %1,%3,%0
s%P2sub %1,%n3,%0")
 
-(define_insn_and_split "*saddsi_1"
-  [(set (match_operand:SI 0 "register_operand" "=r,r")
-   (plus:SI
-(subreg:SI
- (ashift:DI (match_operand:DI 1 "reg_not_elim_operand" "r,r")
-(match_operand:DI 2 "const23_operand" "I,I")) 0)
-(match_operand:SI 3 "sext_add_operand" "rI,O")))]
-  ""
-  "#"
-  ""
-  [(set (match_dup 0)
-   (plus:SI (ashift:SI (match_dup 1) (match_dup 2))
-(match_dup 3)))]
-  "operands[1] = gen_lowpart (SImode, operands[1]);")
-
 (define_insn "*saddl_se"
   [(set (match_operand:DI 0 "register_operand" "=r,r")
(sign_extend:DI
@@ -554,23 +539,6 @@
s%P2addl %1,%3,%0
s%P2subl %1,%n3,%0")
 
-(define_insn_and_split "*saddl_se_1"
-  [(set (match_operand:DI 0 "register_operand" "=r,r")
-   (sign_extend:DI
-(plus:SI
- (subreg:SI
-  (ashift:DI (match_operand:DI 1 "reg_not_elim_operand" "r,r")
- (match_operand:DI 2 "const23_operand" "I,I")) 0)
-(match_operand:SI 3 "sext_add_operand" "rI,O"]
-  ""
-  "#"
-  ""
-  [(set (match_dup 0)
-   (sign_extend:DI
-(plus:SI (ashift:SI (match_dup 1) (match_dup 2))
- (match_dup 3]
-  "operands[1] = gen_lowpart (SImode, operands[1]);")
-
 (define_split
   [(set (match_operand:DI 0 "register_operand")
(sign_extend:DI
@@ -660,21 +628,6 @@
   ""
   "s%P2sub %1,%3,%0")
 
-(define_insn_and_split "*ssubsi_1"
-  [(set (match_operand:SI 0 "register_operand" "=r")
-   (minus:SI
-(subreg:SI
- (ashift:DI (match_operand:DI 1 "reg_not_elim_operand" "r")
-(match_operand:DI 2 "const23_operand" "I")) 0)
-(match_operand:SI 3 "reg_or_8bit_operand" "rI")))]
-  ""
-  "#"
-  ""
-  [(set (match_dup 0)
-   (minus:SI (ashift:SI (match_dup 1) (match_dup 2))
- (match_dup 3)))]
-  "operands[1] = gen_lowpart (SImode, operands[1]);")
-
 (define_insn "*ssubl_se"
   [(set (match_operand:DI 0 "register_operand" "=r")
(sign_extend:DI
@@ -685,23 +638,6 @@
   ""
   "s%P2subl %1,%3,%0")
 
-(define_insn_and_split "*ssubl_se_1"
-  [(set (match_operand:DI 0 "register_operand" "=r")
-   (sign_extend:DI
-(minus:SI
- (subreg:SI
-  (ashift:DI (match_operand:DI 1 "reg_not_elim_operand" "r")
- (match_operand:DI 2 "const23_operand" "I")) 0)
-(match_operand:SI 3 "reg_or_8bit_operand" "rI"]
-  ""
-  "#"
-  ""
-  [(set (match_dup 0)
-   (sign_extend:DI
-(minus:SI (ashift:SI (match_dup 1) (match_dup 2))
-  (match_dup 3]
-  "operands[1] = gen_lowpart (SImode, operands[1]);")
-
 (define_insn "subv3"
   [(set (match_operand:I48MODE 0 "register_operand" "=r")
(minus:I48MODE (match_operand:I48MODE 1 "reg_or_0_operand" "rJ")
@@ -1260,13 +1196,25 @@
 }
   [(set_attr "type" "iadd,shift")])
 
-(define_insn "*ashldi_se"
+(define_insn "ashlsi3"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+   (ashift:SI (match_operand:SI 1 "reg_or_0_operand" "rJ")
+  (match_operand:SI 2 "const123_operand" "P")))]
+  ""
+{
+  if (operands[2] == const1_rtx)
+return "addl %r1,%r1,%0";
+  else
+return "s%P2addl %r1,0,%0";
+}
+  [(set_attr "type" "iadd")])
+
+(define_insn "*ashlsi_se"
   [(set (match_operand:DI 0 "register_operand" "=r")
(sign_extend:DI
-(subreg:SI (ashift:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
-  (match_operand:DI 2 "const_int_operand" "P"))
-   0)))]
-  "IN_RANGE (INTVAL (operands[2]), 1, 3)"
+(ashift:SI (match_operand:SI 1 "reg_or_0_operand" "rJ")
+   (match_operand:SI 2 "const123_operand" "P"]
+  ""
 {
   if (operands[2] == const1_rtx)
 return "addl %r1,%r1,%0";
Index: constraints.md
===
--- constraints.md  (revision 260675)
+++ constraints.md  (working copy)
@@ -82,7 +82,7 @@
 (define_constraint "P"
   "The constant 1, 2 or 3"
   (and (match_code "const_int")
-   (match_tes

Re: [RFC] fixincludes: vxworks: add hack around ioLib.h/unistd.h mutual inclusion

[Bruce Korb]

Ick. Looks like the right fix to me and it is clearly constrained to
vxworks platforms. Approved by me.

On Fri, May 25, 2018 at 1:58 AM, Rasmus Villemoes
 wrote:
> In old VxWorks headers (5.5), ioLib.h includes unistd.h via
>
> #include "unistd.h"
>
> We copy ioLib to include-fixed, with a few fixes applied. We also wrap
> unistd.h, so that fixed header contains
>
> #include_next 
>
> This means that when user-code does
>
> #include 
>
> they'll get the fixed header (as they should), and the include of
> unistd.h from that picks up the fixed header (as it
> should). Unfortunately, since "..." was used, it seems that "the
> directory in the search path after the one where the current file was
> found" for the include_next then ends up picking the include-fixed
> directory again, so the fixed unistd.h just includes itself, and not the
> system unistd.h - and at the time of the self-include, the guard macro
> is defined, so we do not end up evaluating the include_next again.
>
> Changing to an angle-include instead still makes ioLib.h pick up the
> fixed unistd.h, but since we now actually use the search path,
> include_next works as intended. [In at least VxWorks 6.3, ioLib.h does
> use <...> to include unistd.h, so this issue doesn't exist there.]
>
> There are lots of quote-includes like this in the VxWorks headers, and
> I'm slightly surprised I can't find other examples of this kind of issue
> in inclhack.def. In fact, I'd expect any #include "foo.h" in a fixed
> header where foo.h is also fixed and has an #include_next  would
> have to be changed to #include . In fact, ioLib.h itself at
> firsts seems to have the same problem with limits.h, since it also
> contains
>
> #include "limits.h"
>
> However, in that case, the include-fixed version of limits.h does
>
> #include "syslimits.h"
>
> with an comment about explicitly using "..." so that we pick up
> syslimits.h in the same directory, and _that_ file then does
>
> #include_next 
>
> which again at first hits the include-fixed version, but this time
> around we end up in the not _GCC_LIMITS_H_ branch, with
> _GCC_NEXT_LIMITS_H defined, so we hit another
>
> #include_next 
>
> and that time around limits.h was found via the include path, so we
> finally end up recursing to the system limits.h. So this round-about
> does seem to work for limits.h, but I'm wondering why that header file
> alone gets special treatment by the gcc build system.
>
> Signed-off-by: Rasmus Villemoes 
> ---
>  fixincludes/inclhack.def | 16 
>  1 file changed, 16 insertions(+)
>
> diff --git a/fixincludes/inclhack.def b/fixincludes/inclhack.def
> index d8bb17fe1a1..42c60e0c13b 100644
> --- a/fixincludes/inclhack.def
> +++ b/fixincludes/inclhack.def
> @@ -4843,6 +4843,22 @@ fix = {
>  test_text   = "extern int write ( int , char * , size_t ) ;";
>  };
>
> +/*
> + *  This hack ensures the include_next in the fixed unistd.h actually
> + *  finds the system's unistd.h and not the fixed unistd.h again.
> + */
> +fix = {
> +hackname= vxworks_iolib_include_unistd;
> +files   = ioLib.h;
> +mach= "*-*-vxworks*";
> +select  = "#include \"unistd.h\"";
> +
> +c_fix   = format;
> +c_fix_arg   = "#include ";
> +
> +test_text   = "#include \"unistd.h\"";
> +};
> +
>  /*
>   *  There are several name conflicts with C++ reserved words in X11 header
>   *  files.  These are fixed in some versions, so don't do the fixes if
> --
> 2.15.1
>

Re: [PATCH] handle local aggregate initialization in strlen (PR 83821)

[Martin Sebor]

On 05/25/2018 12:06 AM, Marc Glisse wrote:

On Thu, 24 May 2018, Martin Sebor wrote:


On 05/24/2018 03:40 PM, Marc Glisse wrote:

On Wed, 23 May 2018, Martin Sebor wrote:


On 05/23/2018 08:57 AM, Jeff Law wrote:

On 05/10/2018 04:05 PM, Marc Glisse wrote:

On Thu, 10 May 2018, Martin Sebor wrote:


Can you please comment/respond to Jeff's question below and
confirm whether my understanding of the restriction (below)
is correct?


I don't remember it at all, I really should have expanded that
comment...

The documentation of nonzero_chars seems to indicate that, unless
full_string_p, it is only a lower bound on the length of the
string, so
not suitable for this kind of alias check. I don't know if we also
have
easy access to some upper bound.

(I noticed while looking at this pass that it could probably use
POINTER_DIFF_EXPR more)

So ISTM that we'd need to guard the code that uses
si->nonzero_chars in
maybe_invalidate to also check FULL_STRING_P since it appears we're
using si->nonzero_chars as a string length.


I'm not sure I see why.  Can you explain?

Here's my explanation of the current approach.  si->nonzero_chars
is the lower bound on si's length.  maybe_invalidate() invalidates
the string length which is only necessary when something overwrites
one of the first si->nonzero_chars of the array.  It doesn't matter
whether si is nul-terminated at that point.


When you say "invalidates the string length", does that mean it only
invalidates nonzero_chars (the lower bound), or does that also determine
if you can CSE a call to strlen before and after this instruction? Your
argument only applies in the first case.


"invalidates the string length" means that maybe_invalidate(STMT)
removes the length information record for a string whose length
might be modified by STMT.

If the exact string length is known (full_string_p is true) then
its length can only be modified by writing a nul into one of
the leading nonzero_chars.  If the exact string length is not
known (i.e., full_string_p is false), then nonzero_chars is not
constant


Why couldn't nonzero_chars be constant in that case?

void f(const char*s){
  s[0]='a';
  // I know that strlen(s) is at least 1 here
}


I was responding specifically to your question about the strlen()
CSE.  Above there is no call to strlen().  What I understood you
were asking about is something like:

  int f (char *s)
  {
int n0 = strlen (s);
s[7]='a';
int n1 = strlen (s);   // can this be replaced by n0?
return n0 == n1;
  }

At the point of the assignment, nonzero_chars for s is known but
not constant and so s's strinfo is invalidated/removed.

I should correct one thing: when a non-constant string length
has been computed and stored in nonzerro_chars full_string_p
is set to true (by handle_builtin_strlen).  But because
nonzero_chars is non-constant, writing into the string at
any offset invalidates the string length (the non-constant
nonzero_chars is effectively treated as PTRDIFF_MAX).


and writes into the string are assumed to change its
length, and thus invalidate it.

But I'm not sure I understand from your brief description what
use case you have in mind.  If you have an example I'll test it.


The example may be completely off, but just to try and describe what I
am wondering about:

int f(const char*s,char*restrict t,char c){
// we know nothing about s for now.
s[0]='a'; // nonzero_chars should now be 1
strcpy(t,s);
s[2]=c; // this is after nonzero_chars
strcpy(t,s);
}

If we assume that writing to s[2] is after the end of the original
string s, we can remove one of the strcpy. But that's not a valid
transformation in general.


Above, s[0] creates strinfo for s with nonzero_chars == 1 and
full_string_p == false.  Then, after the first call to strcpy,
that same strinfo is invalidated/removed because the length of
s is unknown.  The next assignment to s[2] doesn't do anything
(in the strlen pass) because the right operand is not constant).
In the second strcpy there is no strinfo for s.



I originally wanted to see if we could CSE calls to strlen(s) before and
after the write, but the lhs of the first call to strlen would replace
nonzero_chars. And I don't know so well what we use strinfo for and thus
how dangerous it is not to invalidate it.


The pass does track non-constant strlen() results so I think
the optimization you describe should be possible.  For instance,
here it should be safe to eliminate the second strlen:

  int f (char *s)
  {
s[0] = 'a';
s[1] = 'b';
int n0 = __builtin_strlen (s);

s[0] = 'x';
int n1 = __builtin_strlen (s);

return n0 == n1;
  }

It isn't optimized today because (as I explained above) the first
strlen() replaces the constant nonzero_chars == 2 with the non-
constant result of strlen(s).

I have been thinking about enhancing the strlen pass to deal
with ranges (not just the VRP kind but ranges of string lengths).
With that, it would be possible to optimize the above because
in addition to r

Re: [ARM/FDPIC 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts

[Joseph Myers]

On Fri, 25 May 2018, Christophe Lyon wrote:

> In libtool.m4, we use uclinuxfdpiceabi in cases where ELF shared
> libraries support is required, as uclinux does not guarantee that.

To confirm: has this libtool.m4 patch gone upstream (or at least been 
submitted upstream, if not yet reviewed)?

-- 
Joseph S. Myers
jos...@codesourcery.com

Re: [PATCH] libgcc: Add support for --disable-libgcov

[Joseph Myers]

A new configure option should be documented in install.texi.

-- 
Joseph S. Myers
jos...@codesourcery.com

Re: C++ PATCHes to xvalue handling

[Sudakshina Das]

On 23/05/18 18:21, Jason Merrill wrote:

The first patch implements the adjustments from core issues 616 and
1213 to the value category of subobjects of class prvalues: they were
considered prvalues themselves, but that was kind of nonsensical.  Now
they are considered xvalues.  Along with this, I've removed the
diagnostic distinction between xvalues and prvalues when trying to use
one or the other as an lvalue; the important thing is that they are
rvalues.

The second patch corrects various issues with casts and xvalues/rvalue
references: we were treating an xvalue operand to dynamic_cast as an
lvalue, and we were objecting to casts from prvalue to rvalue
reference type.



With the second patch:
commit f7d2790049fd1e59af4b69ee12f7c101cfe4cdab
Author: jason 
Date:   Wed May 23 17:21:39 2018 +

Fix cast to rvalue reference from prvalue.

* cvt.c (diagnose_ref_binding): Handle rvalue reference.
* rtti.c (build_dynamic_cast_1): Don't try to build a reference to
non-class type.  Handle xvalue argument.
* typeck.c (build_reinterpret_cast_1): Allow cast from prvalue to
rvalue reference.
* semantics.c (finish_compound_literal): Do direct-initialization,
not cast, to initialize a reference.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@260622 
138bc75d-0d04-0410-961f-82ee72b054a4


I have observed the following failure in Spec2017 while building 
510.parest_r on aarch64-none-linux-gnu


aarch64-none-linux-gnu-g++ -c -o 
source/numerics/matrices.all_dimensions.o -DSPEC -DNDEBUG -Iinclude -I. 
-DSPEC_AUTO_SUPPRESS_OPENMP  -mcpu=cortex-a57+crypto -Ofast 
-fomit-frame-pointer -fpermissive-DSPEC_LP64 
source/numerics/matrices.all_dimensions.cc


source/numerics/matrices.all_dimensions.cc: In static member function 
'static void dealii::MatrixTools::apply_boundary_values(const 
std::map&, dealii::BlockSparseMatrix&, 
dealii::BlockVector&, dealii::BlockVector&, bool)':


source/numerics/matrices.all_dimensions.cc:469:50: error: lvalue 
required as unary '&' operand


[this_sparsity.get_rowstart_indices()[row]];

  ^

source/numerics/matrices.all_dimensions.cc:472:55: error: lvalue 
required as unary '&' operand


   [this_sparsity.get_rowstart_indices()[row]+1],

   ^

source/numerics/matrices.all_dimensions.cc:474:55: error: lvalue 
required as unary '&' operand


   [this_sparsity.get_rowstart_indices()[row+1]],

   ^

source/numerics/matrices.all_dimensions.cc:479:49: error: lvalue 
required as unary '&' operand


   [this_sparsity.get_rowstart_indices()[row]],

 ^

source/numerics/matrices.all_dimensions.cc:481:51: error: lvalue 
required as unary '&' operand


   [this_sparsity.get_rowstart_indices()[row+1]],

   ^

source/numerics/matrices.all_dimensions.cc:510:50: error: lvalue 
required as unary '&' operand


  [this_sparsity.get_rowstart_indices()[0]]);

Sudi


Tested x86_64-pc-linux-gnu, applying to trunk.

Simplify _Rb_tree instantiation

[François Dumont]

Hi

As we are at working on associative containers I'd like to propose this 
last patch to remove the copy constructible constraint on the _Compare 
functor when it is supposed to be default constructed.


This way the _Compare is built directly at its final place.

    * include/bits/stl_tree.h (_Rb_tree_impl(_Node_allocator&&)): New.
    (_Rb_tree(const allocator_type&)): Use latter.
    * include/bits/stl_map.h (map(const allocator_type&)): Likewise.
    (map(initializer_list, const allocator_type&)): Likewise.
    (map(_InputIterator, _InputIterator, const allocator_type&)): Likewise.
    * include/bits/stl_multimap.h
    (multimap(const allocator_type&)): Likewise.
    (multimap(initializer_list, const allocator_type&)):
    Likewise.
    (multimap(_InputIterator, _InputIterator, const allocator_type&)):
    Likewise.
    * include/bits/stl_set.h (set(const allocator_type&)): Likewise.
    (set(initializer_list, const allocator_type&)): Likewise.
    (set(_InputIterator, _InputIterator, const allocator_type&)): Likewise.
    * include/bits/stl_multiset.h
    (multiset(const allocator_type&)): Likewise.
    (multiset(initializer_list, const allocator_type&)):
    Likewise.
    (multiset(_InputIterator, _InputIterator, const allocator_type&)):
    Likewise.

Tested under linux x86_64.

Ok to commit ?

François

diff --git a/libstdc++-v3/include/bits/stl_map.h b/libstdc++-v3/include/bits/stl_map.h
index 773b72e..25ab25d 100644
--- a/libstdc++-v3/include/bits/stl_map.h
+++ b/libstdc++-v3/include/bits/stl_map.h
@@ -232,7 +232,7 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
   /// Allocator-extended default constructor.
   explicit
   map(const allocator_type& __a)
-  : _M_t(_Compare(), _Pair_alloc_type(__a)) { }
+  : _M_t(_Pair_alloc_type(__a)) { }
 
   /// Allocator-extended copy constructor.
   map(const map& __m, const allocator_type& __a)
@@ -246,14 +246,14 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
 
   /// Allocator-extended initialier-list constructor.
   map(initializer_list __l, const allocator_type& __a)
-  : _M_t(_Compare(), _Pair_alloc_type(__a))
+  : _M_t(_Pair_alloc_type(__a))
   { _M_t._M_insert_unique(__l.begin(), __l.end()); }
 
   /// Allocator-extended range constructor.
   template
 	map(_InputIterator __first, _InputIterator __last,
 	const allocator_type& __a)
-	: _M_t(_Compare(), _Pair_alloc_type(__a))
+	: _M_t(_Pair_alloc_type(__a))
 	{ _M_t._M_insert_unique(__first, __last); }
 #endif
 
@@ -269,7 +269,6 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*/
   template
 	map(_InputIterator __first, _InputIterator __last)
-	: _M_t()
 	{ _M_t._M_insert_unique(__first, __last); }
 
   /**
diff --git a/libstdc++-v3/include/bits/stl_multimap.h b/libstdc++-v3/include/bits/stl_multimap.h
index 9845c01..fcfea88 100644
--- a/libstdc++-v3/include/bits/stl_multimap.h
+++ b/libstdc++-v3/include/bits/stl_multimap.h
@@ -229,7 +229,7 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
   /// Allocator-extended default constructor.
   explicit
   multimap(const allocator_type& __a)
-  : _M_t(_Compare(), _Pair_alloc_type(__a)) { }
+  : _M_t(_Pair_alloc_type(__a)) { }
 
   /// Allocator-extended copy constructor.
   multimap(const multimap& __m, const allocator_type& __a)
@@ -243,14 +243,14 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
 
   /// Allocator-extended initialier-list constructor.
   multimap(initializer_list __l, const allocator_type& __a)
-  : _M_t(_Compare(), _Pair_alloc_type(__a))
+  : _M_t(_Pair_alloc_type(__a))
   { _M_t._M_insert_equal(__l.begin(), __l.end()); }
 
   /// Allocator-extended range constructor.
   template
 	multimap(_InputIterator __first, _InputIterator __last,
 		 const allocator_type& __a)
-	: _M_t(_Compare(), _Pair_alloc_type(__a))
+	: _M_t(_Pair_alloc_type(__a))
 	{ _M_t._M_insert_equal(__first, __last); }
 #endif
 
@@ -265,7 +265,6 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*/
   template
 	multimap(_InputIterator __first, _InputIterator __last)
-	: _M_t()
 	{ _M_t._M_insert_equal(__first, __last); }
 
   /**
diff --git a/libstdc++-v3/include/bits/stl_multiset.h b/libstdc++-v3/include/bits/stl_multiset.h
index 38159ab..1155e55 100644
--- a/libstdc++-v3/include/bits/stl_multiset.h
+++ b/libstdc++-v3/include/bits/stl_multiset.h
@@ -185,7 +185,6 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
*/
   template
 	multiset(_InputIterator __first, _InputIterator __last)
-	: _M_t()
 	{ _M_t._M_insert_equal(__first, __last); }
 
   /**
@@ -245,7 +244,7 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
   /// Allocator-extended default constructor.
   explicit
   multiset(const allocator_type& __a)
-  : _M_t(_Compare(), _Key_alloc_type(__a)) { }
+  : _M_t(_Key_alloc_type(__a)) { }
 
   /// Allocator-extended copy constructor.
   multiset(const multiset& __m, const allocator_type& __a)
@@ -259,14 +258,14 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
 
   /// Allo

Re: [RFC] fixincludes: vxworks: add hack around ioLib.h/unistd.h mutual inclusion

[Jeff Law]

On 05/25/2018 08:47 AM, Bruce Korb wrote:
> Ick. Looks like the right fix to me and it is clearly constrained to
> vxworks platforms. Approved by me.
Thanks.  Installed on the trunk.

jeff

Re: [PATCH] testsuite: Introduce be/le selectors

[Segher Boessenkool]

On Fri, May 25, 2018 at 10:30:58AM +0100, Richard Earnshaw (lists) wrote:
> On 24/05/18 18:28, Segher Boessenkool wrote:
> > On Wed, May 23, 2018 at 10:07:18AM +0100, Richard Earnshaw (lists) wrote:
> >> On 22/05/18 22:21, Jeff Law wrote:
> >>> On 05/21/2018 03:46 PM, Segher Boessenkool wrote:
>  This patch creates "be" and "le" selectors, which can be used by all
>  architectures, similar to ilp32 and lp64.
> > 
>  2017-05-21  Segher Boessenkool  
> 
>  gcc/testsuite/
>   * lib/target-supports.exp (check_effective_target_be): New.
>   (check_effective_target_le): New.
> >>> I think this is fine.  "be" "le" are used all over the place in gcc and
> >>> the kernel to denote big/little endian.
> >>
> >> except when el and eb are used for perversity... :-)
> > 
> > It should have been -BE and -EL, because that is what it means.  That
> > also avoids the -l/-L problem -le and -LE would have ;-)
> > 
> > (Confusing?  Yes, little-endian is confusing).
> 
> I beg to differ.  Big endian is the confusing one... :-)

I thought you said -EL is perverse.  Maybe I misunderstood!

(Sorry sorry).


Segher

Re: [C++ PATCH] Do not warn about zero-as-null when NULL is used.

[Jason Merrill]

On Thu, May 24, 2018 at 8:04 PM, Ville Voutilainen
 wrote:
> I smacked my head against conversion_null_warnings for a while,
> and then I realized that we could just stop convert_like_real from
> changing the node type for null_node.

Won't that sometimes mean that the result has the wrong type?  If we
convert NULL to short, we want the result to have type short.

Jason

Re: [PATCH] consider MIN_EXPR in get_size_range() (PR 85888)

[Martin Sebor]

On 05/25/2018 01:02 AM, Richard Biener wrote:

On Thu, May 24, 2018 at 11:22 PM Martin Sebor  wrote:


On 05/24/2018 11:15 AM, Richard Biener wrote:

On May 24, 2018 7:02:17 PM GMT+02:00, Martin Sebor 

wrote:

On 05/24/2018 03:39 AM, Richard Biener wrote:

On Thu, May 24, 2018 at 12:50 AM Martin Sebor 

wrote:



The attached patch enhances the get_size_range() function to
extract more accurate ranges out of MIN_EXPR and MAX_EXPR nodes
with SSA_NAME operand(s).  This helps -Wstringop-overflow avoid
false positives on some targets in cases like some of those
reported in bug 85623 - strncmp() warns about attribute nonstring
incorrectly in -Wstringop-overflow



When first trying to expand calls to __builtin_strncmp, most back
ends succeed even when the expansion results in a call to the

library

function.  The powerpc64 back-end, however, fails and and allows
the generic expansion to take place.  There is a subtle difference
between the two cases that shows up when examining the bound of
the strncmp call expression (the third argument): in the original
call expression (in expand_builtin_strncmp) the bound is or can be
an SSA_NAME.  But when the early expansion fails,
expand_builtin_strncmp transforms the original call expression into
a new one, substituting MIN_EXPR (bound, CST) for the bound where
CST is the constant result of strlen (STR), with STR being either
the first or second strncmp argument.  When the bound is an SSA_NAME
the subsequent attempt to determine its range from the MIN_EXPR

fails.


Hmm, wouldn't sth extracted from the attached random patch I have

lying

around be more useful in general?  That is, refactor the GENERIC
expression walk in determine_value_range_1 to sth that can be used
in the current get_range_info () interface?  Or if we don't want to

change

that to accept non-SSA names add a corresponding get_expr_range_info

()

interface.


Thanks.  It is certainly more general.  I'm just not sure how much
use the generality can be put to because...


If you do that please cut out the dominator/loop condition handling

and

refrain from the idea of looking at SSA def stmts.


...I've done that but I'm having trouble exercising the code except
for this bug.  (I've run the C testsuite but the only tests that end
up in it call it with uninteresting arguments like VAR_DECL).  Do
you have any suggestions?


Well, what builds the MIN_EXPR for your testcase? I orinigally used it

for niters analysis which deals with complex GENERIC expressions. If you
just changed get_range_info then of course callers are guarded with SSA
name checks.


In pr85888 it's built by expand_builtin_strncmp (so very late).
It doesn't seem like a good use case because of this code:



/* Expand the library call ourselves using a stabilized argument
   list to avoid re-evaluating the function's arguments twice.  */
tree fn = build_call_nofold_loc (loc, fndecl, 3, arg1, arg2, len);
gcc_assert (TREE_CODE (fn) == CALL_EXPR);
CALL_EXPR_TAILCALL (fn) = CALL_EXPR_TAILCALL (exp);
return expand_call (fn, target, target == const0_rtx);



AFAICS, the new call expression is the same as the old one, the only
difference is the LEN argument which is the MIN_EXPR.



The code was added in r72380 where the stabilization referred to
calling save_expr() on the arguments.  That code has been gone
since r242556 so I think a better/more targeted solution to fix
pr85888 than either of our approaches might be to simply call
expand_call() on the original CALL_EXPR with the original
arguments, including ARG3.



I don't fully understand the point of the save_expr() calls there
(and they're still in builtin_expand_strcmp), so if they need to
be restored then they would presumably include ARG3.  I.e.,
expand_call() would be called using ARG3 in the original SSA_NAME
form rather than the MIN_EXPR wrapper created by the function.



Attached is a patch that implements the first approach above.



If the SAVE_EXPRs are needed for some reason, it would be good
to have a test case to verify it.  I haven't been able to come
up with one (or find an existing test that fails due to their
removal) but that could very well be because my limited
understanding of what they're for (and poor testsuite coverage).



I'm also up for taking your patch and trying to make use of it
for other trees where get_range_info() is currently being called
for SSA_NAMEs only.  But it feels like a separate project from
this bug fix.


But your patch makes the whole 'len' computation after

   /* If we don't have a constant length for the first, use the length
  of the second, if we know it.  If neither string is constant length,
  use the given length argument.  We don't require a constant for
  this case; some cost analysis could be done if both are available
  but neither is constant.  For now, assume they're equally cheap,
  unless one has side effects.  If both strings have constant lengths,
  use the smaller.  */

  

Re: [C++ PATCH] Do not warn about zero-as-null when NULL is used.

[Ville Voutilainen]

On 25 May 2018 at 20:27, Jason Merrill  wrote:
> On Thu, May 24, 2018 at 8:04 PM, Ville Voutilainen
>  wrote:
>> I smacked my head against conversion_null_warnings for a while,
>> and then I realized that we could just stop convert_like_real from
>> changing the node type for null_node.
>
> Won't that sometimes mean that the result has the wrong type?  If we
> convert NULL to short, we want the result to have type short.

None of our tests revealed any regressions with the change; the change passes
the full suite. And apparently the removed code in convert_like_real doesn't
affect that; implicit and explicit conversions from NULL to short still convert
to short, and code like auto x = NULL; still converts to unsigned long.

Re: [C++ PATCH] Do not warn about zero-as-null when NULL is used.

[Ville Voutilainen]

On 25 May 2018 at 20:38, Ville Voutilainen  wrote:
> On 25 May 2018 at 20:27, Jason Merrill  wrote:
>> On Thu, May 24, 2018 at 8:04 PM, Ville Voutilainen
>>  wrote:
>>> I smacked my head against conversion_null_warnings for a while,
>>> and then I realized that we could just stop convert_like_real from
>>> changing the node type for null_node.
>>
>> Won't that sometimes mean that the result has the wrong type?  If we
>> convert NULL to short, we want the result to have type short.
>
> None of our tests revealed any regressions with the change; the change passes
> the full suite. And apparently the removed code in convert_like_real doesn't
> affect that; implicit and explicit conversions from NULL to short still 
> convert
> to short, and code like auto x = NULL; still converts to unsigned long.

As far as I can see, cp_convert_to_pointer does convert NULL to the "right" kind
of integer constant, it's just that convert_like_real doesn't do it
earlier. The earlier
conversion caused the inability to diagnose the conversion properly in
cp_convert_to_pointer,
but that earlier conversion doesn't seem to have other effects.

Re: [PATCH] consider MIN_EXPR in get_size_range() (PR 85888)

[Richard Biener]

On May 25, 2018 7:31:43 PM GMT+02:00, Martin Sebor  wrote:
>On 05/25/2018 01:02 AM, Richard Biener wrote:
>> On Thu, May 24, 2018 at 11:22 PM Martin Sebor 
>wrote:
>>
>>> On 05/24/2018 11:15 AM, Richard Biener wrote:
 On May 24, 2018 7:02:17 PM GMT+02:00, Martin Sebor
>
>> wrote:
> On 05/24/2018 03:39 AM, Richard Biener wrote:
>> On Thu, May 24, 2018 at 12:50 AM Martin Sebor 
> wrote:
>>
>>> The attached patch enhances the get_size_range() function to
>>> extract more accurate ranges out of MIN_EXPR and MAX_EXPR nodes
>>> with SSA_NAME operand(s).  This helps -Wstringop-overflow avoid
>>> false positives on some targets in cases like some of those
>>> reported in bug 85623 - strncmp() warns about attribute
>nonstring
>>> incorrectly in -Wstringop-overflow
>>
>>> When first trying to expand calls to __builtin_strncmp, most
>back
>>> ends succeed even when the expansion results in a call to the
> library
>>> function.  The powerpc64 back-end, however, fails and and allows
>>> the generic expansion to take place.  There is a subtle
>difference
>>> between the two cases that shows up when examining the bound of
>>> the strncmp call expression (the third argument): in the
>original
>>> call expression (in expand_builtin_strncmp) the bound is or can
>be
>>> an SSA_NAME.  But when the early expansion fails,
>>> expand_builtin_strncmp transforms the original call expression
>into
>>> a new one, substituting MIN_EXPR (bound, CST) for the bound
>where
>>> CST is the constant result of strlen (STR), with STR being
>either
>>> the first or second strncmp argument.  When the bound is an
>SSA_NAME
>>> the subsequent attempt to determine its range from the MIN_EXPR
> fails.
>>
>> Hmm, wouldn't sth extracted from the attached random patch I have
> lying
>> around be more useful in general?  That is, refactor the GENERIC
>> expression walk in determine_value_range_1 to sth that can be
>used
>> in the current get_range_info () interface?  Or if we don't want
>to
> change
>> that to accept non-SSA names add a corresponding
>get_expr_range_info
> ()
>> interface.
>
> Thanks.  It is certainly more general.  I'm just not sure how much
> use the generality can be put to because...
>
>> If you do that please cut out the dominator/loop condition
>handling
> and
>> refrain from the idea of looking at SSA def stmts.
>
> ...I've done that but I'm having trouble exercising the code
>except
> for this bug.  (I've run the C testsuite but the only tests that
>end
> up in it call it with uninteresting arguments like VAR_DECL).  Do
> you have any suggestions?

 Well, what builds the MIN_EXPR for your testcase? I orinigally used
>it
>> for niters analysis which deals with complex GENERIC expressions. If
>you
>> just changed get_range_info then of course callers are guarded with
>SSA
>> name checks.
>>
>>> In pr85888 it's built by expand_builtin_strncmp (so very late).
>>> It doesn't seem like a good use case because of this code:
>>
>>> /* Expand the library call ourselves using a stabilized argument
>>>list to avoid re-evaluating the function's arguments twice. 
>*/
>>> tree fn = build_call_nofold_loc (loc, fndecl, 3, arg1, arg2,
>len);
>>> gcc_assert (TREE_CODE (fn) == CALL_EXPR);
>>> CALL_EXPR_TAILCALL (fn) = CALL_EXPR_TAILCALL (exp);
>>> return expand_call (fn, target, target == const0_rtx);
>>
>>> AFAICS, the new call expression is the same as the old one, the only
>>> difference is the LEN argument which is the MIN_EXPR.
>>
>>> The code was added in r72380 where the stabilization referred to
>>> calling save_expr() on the arguments.  That code has been gone
>>> since r242556 so I think a better/more targeted solution to fix
>>> pr85888 than either of our approaches might be to simply call
>>> expand_call() on the original CALL_EXPR with the original
>>> arguments, including ARG3.
>>
>>> I don't fully understand the point of the save_expr() calls there
>>> (and they're still in builtin_expand_strcmp), so if they need to
>>> be restored then they would presumably include ARG3.  I.e.,
>>> expand_call() would be called using ARG3 in the original SSA_NAME
>>> form rather than the MIN_EXPR wrapper created by the function.
>>
>>> Attached is a patch that implements the first approach above.
>>
>>> If the SAVE_EXPRs are needed for some reason, it would be good
>>> to have a test case to verify it.  I haven't been able to come
>>> up with one (or find an existing test that fails due to their
>>> removal) but that could very well be because my limited
>>> understanding of what they're for (and poor testsuite coverage).
>>
>>> I'm also up for taking your patch and trying to make use of it
>>> for other trees where get_range_info() is currently being called
>>> for SSA_NAMEs only.  But it feels like a separate project 

Re: C++ PATCH for c++/85883, class tmpl args deduction fail with new

[Jason Merrill]

On Thu, May 24, 2018 at 4:10 PM, Marek Polacek  wrote:
> Here we were failing to deduce template arguments for a class, because the
> code in build_new only handled the case when INIT had 1 element.  That works
> for e.g. new auto (foo) or new Foo{1, 2}, but not new Foo(1, 2).  I noticed
> that it works without "new" because we simply create a tree list of the
> arguments and pass it down to do_auto_deduction (in build_functional_cast).
> do_class_deduction is prepared to receive a tree list.
>
> (Sorry if this is totally bogus.)
>
> Bootstrapped/regtested on x86_64-linux, ok for trunk?
>
> 2018-05-24  Marek Polacek  
>
> PR c++/85883
> * init.c (build_new): Handle deducing a class with new
> with more than one argument.
>
> * g++.dg/cpp1z/class-deduction55.C: New test.
> * g++.dg/cpp1z/class-deduction56.C: New test.
> * g++.dg/cpp1z/class-deduction57.C: New test.
>
> diff --git gcc/cp/init.c gcc/cp/init.c
> index 3f1e49bae21..3b175f94ecb 100644
> --- gcc/cp/init.c
> +++ gcc/cp/init.c
> @@ -3585,11 +3585,25 @@ build_new (vec **placement, tree type, 
> tree nelts,
>if (auto_node)
> {
>   tree d_init = NULL_TREE;
> - if (vec_safe_length (*init) == 1)
> + const size_t len = vec_safe_length (*init);
> + /* E.g. new auto(x) must have exactly one element, or
> +a {} initializer will have one element.  */
> + if (len == 1)
> {
>   d_init = (**init)[0];
>   d_init = resolve_nondeduced_context (d_init, complain);
> }
> + /* For the rest, e.g. new A(1, 2, 3), create a list.  */
> + else if (len > 1)
> +   {
> + unsigned int n;
> + tree t;
> + FOR_EACH_VEC_ELT (**init, n, t)
> +   {
> + t = resolve_nondeduced_context (t, complain);
> + d_init = chainon (d_init, build_tree_list (NULL_TREE, t));

Using chainon here means that for each element, we have to walk the
whole list to find the end.  See build_tree_list_vec.

Jason

Re: [PATCH] consider MIN_EXPR in get_size_range() (PR 85888)

[Martin Sebor]

On 05/25/2018 11:51 AM, Richard Biener wrote:

On May 25, 2018 7:31:43 PM GMT+02:00, Martin Sebor  wrote:

On 05/25/2018 01:02 AM, Richard Biener wrote:

On Thu, May 24, 2018 at 11:22 PM Martin Sebor 

wrote:



On 05/24/2018 11:15 AM, Richard Biener wrote:

On May 24, 2018 7:02:17 PM GMT+02:00, Martin Sebor



wrote:

On 05/24/2018 03:39 AM, Richard Biener wrote:

On Thu, May 24, 2018 at 12:50 AM Martin Sebor 

wrote:



The attached patch enhances the get_size_range() function to
extract more accurate ranges out of MIN_EXPR and MAX_EXPR nodes
with SSA_NAME operand(s).  This helps -Wstringop-overflow avoid
false positives on some targets in cases like some of those
reported in bug 85623 - strncmp() warns about attribute

nonstring

incorrectly in -Wstringop-overflow



When first trying to expand calls to __builtin_strncmp, most

back

ends succeed even when the expansion results in a call to the

library

function.  The powerpc64 back-end, however, fails and and allows
the generic expansion to take place.  There is a subtle

difference

between the two cases that shows up when examining the bound of
the strncmp call expression (the third argument): in the

original

call expression (in expand_builtin_strncmp) the bound is or can

be

an SSA_NAME.  But when the early expansion fails,
expand_builtin_strncmp transforms the original call expression

into

a new one, substituting MIN_EXPR (bound, CST) for the bound

where

CST is the constant result of strlen (STR), with STR being

either

the first or second strncmp argument.  When the bound is an

SSA_NAME

the subsequent attempt to determine its range from the MIN_EXPR

fails.


Hmm, wouldn't sth extracted from the attached random patch I have

lying

around be more useful in general?  That is, refactor the GENERIC
expression walk in determine_value_range_1 to sth that can be

used

in the current get_range_info () interface?  Or if we don't want

to

change

that to accept non-SSA names add a corresponding

get_expr_range_info

()

interface.


Thanks.  It is certainly more general.  I'm just not sure how much
use the generality can be put to because...


If you do that please cut out the dominator/loop condition

handling

and

refrain from the idea of looking at SSA def stmts.


...I've done that but I'm having trouble exercising the code

except

for this bug.  (I've run the C testsuite but the only tests that

end

up in it call it with uninteresting arguments like VAR_DECL).  Do
you have any suggestions?


Well, what builds the MIN_EXPR for your testcase? I orinigally used

it

for niters analysis which deals with complex GENERIC expressions. If

you

just changed get_range_info then of course callers are guarded with

SSA

name checks.


In pr85888 it's built by expand_builtin_strncmp (so very late).
It doesn't seem like a good use case because of this code:



/* Expand the library call ourselves using a stabilized argument
   list to avoid re-evaluating the function's arguments twice.

*/

tree fn = build_call_nofold_loc (loc, fndecl, 3, arg1, arg2,

len);

gcc_assert (TREE_CODE (fn) == CALL_EXPR);
CALL_EXPR_TAILCALL (fn) = CALL_EXPR_TAILCALL (exp);
return expand_call (fn, target, target == const0_rtx);



AFAICS, the new call expression is the same as the old one, the only
difference is the LEN argument which is the MIN_EXPR.



The code was added in r72380 where the stabilization referred to
calling save_expr() on the arguments.  That code has been gone
since r242556 so I think a better/more targeted solution to fix
pr85888 than either of our approaches might be to simply call
expand_call() on the original CALL_EXPR with the original
arguments, including ARG3.



I don't fully understand the point of the save_expr() calls there
(and they're still in builtin_expand_strcmp), so if they need to
be restored then they would presumably include ARG3.  I.e.,
expand_call() would be called using ARG3 in the original SSA_NAME
form rather than the MIN_EXPR wrapper created by the function.



Attached is a patch that implements the first approach above.



If the SAVE_EXPRs are needed for some reason, it would be good
to have a test case to verify it.  I haven't been able to come
up with one (or find an existing test that fails due to their
removal) but that could very well be because my limited
understanding of what they're for (and poor testsuite coverage).



I'm also up for taking your patch and trying to make use of it
for other trees where get_range_info() is currently being called
for SSA_NAMEs only.  But it feels like a separate project from
this bug fix.


But your patch makes the whole 'len' computation after

   /* If we don't have a constant length for the first, use the

length

  of the second, if we know it.  If neither string is constant

length,

  use the given length argument.  We don't require a constant for
  this case; some cost analysis could be done if both are

available

  but neither is cons

Re: Simplify _Rb_tree instantiation

[Ville Voutilainen]

On 25 May 2018 at 19:50, François Dumont  wrote:
> Hi
>
> As we are at working on associative containers I'd like to propose this last
> patch to remove the copy constructible constraint on the _Compare functor
> when it is supposed to be default constructed.
>
> This way the _Compare is built directly at its final place.

Why is this patch removing _Compare() calls? That changes the initialization
of _Compare from value-initialization to default-initialization, which
is a breaking change.

Re: [PATCH] PR target/85358 patch v2: Add target hook to prevent default widening

[Michael Meissner]

I redid the patch to make the target hook only apply for scalar float points,
and I removed all of the integer only subcases.

I have checked this on a little endian Power8 system, and verified that it
bootstraps correctly and there are no regressions.  I have just started an
x86_64 build.  Assuming that build has no regressions, can I check this into
GCC 9?  This bug appears in GCC 8, and I would like to back port this patch to
GCC 8 as well before GCC 8.2 goes out.

[gcc]
2018-05-25  Michael Meissner  

PR target/85358
* target.def (default_fp_widening_p): New target hook to automatic
widening betwen two floating point modes.
* optabs.c (expand_binop): Do not automatically widen a binary or
unary scalar floating point op if the backend says that the
widening should not occur.
(expand_twoval_unop): Likewise.
(expand_twoval_binop): Likewise.
(expand_unop): Likewise.
* config/rs6000/rs6000.c (TARGET_DEFAULT_FP_WIDENING_P): Define.
(rs6000_default_fp_widening_p): New target hook to prevent
automatic widening between IEEE 128-bit floating point and IBM
extended double floating point.
* doc/tm.texi (Target Hooks): Document new target hook
default_fp_widening_p.
* doc/tm.texi.in (Target Hooks): Likewise.

[gcc/testsuite]
2018-05-25  Michael Meissner  

PR target/85358
* gcc.target/powerpc/pr85358.c: New test.

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797
Index: gcc/target.def
===
--- gcc/target.def  (.../trunk) (revision 260548)
+++ gcc/target.def  (.../branches/ibm/ieee) (revision 260765)
@@ -3498,6 +3498,17 @@ If this hook allows @code{val} to have a
  hook_bool_mode_uhwi_false)
 
 DEFHOOK
+(default_fp_widening_p,
+ "Return true if GCC can automatically widen @var{mode} to @var{wider_mode}\n\
+if @var{wider_mode} supports an operation in hardware but @var{mode} does\n\
+not.  Both modes are scalar floating point modes.  The default hook always\n\
+returns true.  This hook should be used if all values in @var{mode} cannont\n\
+be represented in @var{wider_mode}, or the rounding characteristics are\n\
+different between the two modes.",
+ bool, (machine_mode wider_mode, machine_mode mode),
+ hook_bool_mode_mode_true)
+
+DEFHOOK
 (libgcc_floating_mode_supported_p,
  "Define this to return nonzero if libgcc provides support for the \n\
 floating-point mode @var{mode}, which is known to pass \n\
Index: gcc/optabs.c
===
--- gcc/optabs.c(.../trunk) (revision 260548)
+++ gcc/optabs.c(.../branches/ibm/ieee) (revision 260765)
@@ -1284,6 +1284,9 @@ expand_binop (machine_mode mode, optab b
 FOR_EACH_WIDER_MODE (wider_mode, mode)
   {
machine_mode next_mode;
+   if (SCALAR_FLOAT_MODE_P (mode)
+   && !targetm.default_fp_widening_p (wider_mode, mode))
+ continue;
if (optab_handler (binoptab, wider_mode) != CODE_FOR_nothing
|| (binoptab == smul_optab
&& GET_MODE_WIDER_MODE (wider_mode).exists (&next_mode)
@@ -1834,6 +1837,9 @@ expand_binop (machine_mode mode, optab b
   gcc_assert (!convert_optab_p (binoptab));
   FOR_EACH_WIDER_MODE (wider_mode, mode)
{
+ if (SCALAR_FLOAT_MODE_P (mode)
+ && !targetm.default_fp_widening_p (wider_mode, mode))
+   continue;
  if (optab_handler (binoptab, wider_mode)
  || (methods == OPTAB_LIB
  && optab_libfunc (binoptab, wider_mode)))
@@ -1989,6 +1995,9 @@ expand_twoval_unop (optab unoptab, rtx o
 {
   FOR_EACH_WIDER_MODE (wider_mode, mode)
{
+ if (SCALAR_FLOAT_MODE_P (mode)
+ && !targetm.default_fp_widening_p (wider_mode, mode))
+   continue;
  if (optab_handler (unoptab, wider_mode) != CODE_FOR_nothing)
{
  rtx t0 = gen_reg_rtx (wider_mode);
@@ -2070,6 +2079,9 @@ expand_twoval_binop (optab binoptab, rtx
 {
   FOR_EACH_WIDER_MODE (wider_mode, mode)
{
+ if (SCALAR_FLOAT_MODE_P (mode)
+ && !targetm.default_fp_widening_p (wider_mode, mode))
+   continue;
  if (optab_handler (binoptab, wider_mode) != CODE_FOR_nothing)
{
  rtx t0 = gen_reg_rtx (wider_mode);
@@ -2865,6 +2877,9 @@ expand_unop (machine_mode mode, optab un
   if (CLASS_HAS_WIDER_MODES_P (mclass))
 FOR_EACH_WIDER_MODE (wider_mode, mode)
   {
+   if (SCALAR_FLOAT_MODE_P (mode)
+   && !targetm.default_fp_widening_p (wider_mode, mode))
+ continue;
if (optab_handler (unoptab, wider_mode) != CODE_FOR_nothing)
  {
rtx xop0 = op0;
@@ -3032,6 +3047,9 @@ expand_unop (machine_mode mode, optab un

[PATCH, committed] Additional fix related to PR85712

[Bill Schmidt]

Hi,

While backporting https://gcc.gnu.org/ml/gcc-patches/2018-05/msg01183.html to
older release branches, I ran across a corner case that can cause an ICE.
When replace_mult_candidate replaces a candidate with a copy, it does so
in situ.  Later we may attempt to replace it again under a different
interpretation in replace_one_candidate.  This violates the assumption that
a candidate being replaced there has two operands in its RHS, causing us
to segfault when we examine the missing second operand.

Most of the time we don't see this problem, because candidates are usually
replaced completely with a new statement, leaving the old candidate orphaned
with a basic block of 0.  This allows us to detect the candidate was already
replaced, and we don't ever call replace_one_candidate for the second
interpretation.

This patch fixes the problem by taking an early exit from replace_one_candidate
when the second operand is missing; this can only happen if the candidate has
already been replaced by a copy.

Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.  I've
tested this in conjunction with the other patch for PR85712 on GCC 6, 7, and
8, also with no regressions.  On GCC 6, this fixes the problem that occurs
there on one test case.  Committed to trunk; will backport next week if all
remains well.

Thanks,
Bill


2018-05-25  Bill Schmidt  

PR tree-optimization/85712
* gimple-ssa-strength-reduction.c (replace_one_candidate): Skip if
this candidate has already been replaced in-situ by a copy.


Index: gcc/gimple-ssa-strength-reduction.c
===
--- gcc/gimple-ssa-strength-reduction.c (revision 260676)
+++ gcc/gimple-ssa-strength-reduction.c (working copy)
@@ -3662,6 +3662,11 @@ replace_one_candidate (slsr_cand_t c, unsigned i,
   orig_rhs2 = gimple_assign_rhs2 (c->cand_stmt);
   cand_incr = cand_increment (c);
 
+  /* If orig_rhs2 is NULL, we have already replaced this in situ with
+ a copy statement under another interpretation.  */
+  if (!orig_rhs2)
+return;
+
   if (dump_file && (dump_flags & TDF_DETAILS))
 {
   fputs ("Replacing: ", dump_file);

Re: Simplify _Rb_tree instantiation

[Jonathan Wakely]

On 25/05/18 21:35 +0300, Ville Voutilainen wrote:

On 25 May 2018 at 19:50, François Dumont  wrote:

Hi

As we are at working on associative containers I'd like to propose this last
patch to remove the copy constructible constraint on the _Compare functor
when it is supposed to be default constructed.


The type is required to be CopyConstructible, so copying it into place
is confirming. But avoiding that copy might be more efficient, so
seems worthwhile.


This way the _Compare is built directly at its final place.


Why is this patch removing _Compare() calls? That changes the initialization
of _Compare from value-initialization to default-initialization, which
is a breaking change.


The _Rb_tree_key_compare base class will still value-initialize it:

 _Rb_tree_key_compare()
 _GLIBCXX_NOEXCEPT_IF(
is_nothrow_default_constructible<_Key_compare>::value)
 : _M_key_compare()
 { }

Re: Simplify _Rb_tree instantiation

[Ville Voutilainen]

On 25 May 2018 at 22:16, Jonathan Wakely  wrote:
>> Why is this patch removing _Compare() calls? That changes the
>> initialization
>> of _Compare from value-initialization to default-initialization, which
>> is a breaking change.
>
>
> The _Rb_tree_key_compare base class will still value-initialize it:
>
>  _Rb_tree_key_compare()
>  _GLIBCXX_NOEXCEPT_IF(
> is_nothrow_default_constructible<_Key_compare>::value)
>  : _M_key_compare()
>  { }

Okay, no problem then.

[OpenACC] Update OpenACC data clause semantics to the 2.5 behavior

[Cesar Philippidis]

This patch updates GCC's to support OpenACC 2.5's data clause semantics. 
In OpenACC 2.5, copy, copyin and copyout all behave like their 
present_or_* counterparts in OpenACC 2.0. The patch also adds support 
for the new finalize and if_present data clauses introduced in OpenACC 
2.5. The finalize clause introduced some new reference counting behavior 
in the runtime; whereas 'acc exit data copyout' decrements the reference 
count of a variable, 'acc exit data finalize' actually removes it from 
the accelerator regardless of there are any pending references to it.

Due to the size of this patch, I had to compress it. However, despite 
the size of the patch, which is mainly due to the augmented test cases, 
it fairly noninvasive. I was originally going to include support for 
declare allocate and deallocate, but those require more extensive 
modifications to the fortran FE.

Is this patch OK for trunk? I tested with x86_64-linux with nvptx 
acceleration.

Thanks,
Cesar

2018-05-25  Chung-Lin Tang 
Thomas Schwinge 
Cesar Philippidis  

gcc/c-family/
* c-pragma.h (enum pragma_omp_clause): Add
PRAGMA_OACC_CLAUSE_{FINALIZE,IF_PRESENT}. Remove
PRAGMA_OACC_CLAUSE_PRESENT_OR_{COPY,COPYIN,COPYOUT,CREATE}.

gcc/c/
* c-parser.c (c_parser_omp_clause_name): Add support for finalize
and if_present. Make present_or_{copy,copyin,copyout,create} aliases
to their non-present_or_* counterparts. Make 'self' an alias to
PRAGMA_OACC_CLAUSE_HOST.
(c_parser_oacc_data_clause): Update GOMP mappings for
PRAGMA_OACC_CLAUSE_{COPY,COPYIN,COPYOUT,CREATE,DELETE}. Remove
PRAGMA_OACC_CLAUSE_{SELF,PRESENT_OR_*}.
(c_parser_oacc_all_clauses): Handle finalize and if_present clauses.
Remove support for present_or_* clauses.
(OACC_KERNELS_CLAUSE_MASK): Remove PRESENT_OR_* clauses.
(OACC_PARALLEL_CLAUSE_MASK): Likewise.
(OACC_DECLARE_CLAUSE_MASK): Likewise.
(OACC_DATA_CLAUSE_MASK): Likewise.
(OACC_ENTER_DATA_CLAUSE_MASK): Remove PRESENT_OR_* clauses.
(OACC_EXIT_DATA_CLAUSE_MASK): Add FINALIZE clause.
(OACC_UPDATE_CLAUSE_MASK): Remove SELF, add IF_PRESENT.
(c_parser_oacc_declare): Remove PRESENT_OR_* clauses.
* c-typeck.c (c_finish_omp_clauses): Handle IF_PRESENT and FINALIZE.

gcc/cp/
* parser.c (cp_parser_omp_clause_name): Add support for finalize
and if_present. Make present_or_{copy,copyin,copyout,create} aliases
to their non-present_or_* counterparts. Make 'self' an alias to
PRAGMA_OACC_CLAUSE_HOST.
(cp_parser_oacc_data_clause): Update GOMP mappings for
PRAGMA_OACC_CLAUSE_{COPY,COPYIN,COPYOUT,CREATE,DELETE}. Remove
PRAGMA_OACC_CLAUSE_{SELF,PRESENT_OR_*}.
(cp_parser_oacc_all_clauses): Handle finalize and if_present clauses.
Remove support for present_or_* clauses.
(OACC_KERNELS_CLAUSE_MASK): Remove PRESENT_OR_* clauses.
(OACC_PARALLEL_CLAUSE_MASK): Likewise.
(OACC_DECLARE_CLAUSE_MASK): Likewise.
(OACC_DATA_CLAUSE_MASK): Likewise.
(OACC_ENTER_DATA_CLAUSE_MASK): Remove PRESENT_OR_* clauses.
(OACC_EXIT_DATA_CLAUSE_MASK): Add FINALIZE clause.
(OACC_UPDATE_CLAUSE_MASK): Remove SELF, add IF_PRESENT.
(cp_parser_oacc_declare): Remove PRESENT_OR_* clauses.
* pt.c (tsubst_omp_clauses): Handle IF_PRESENT and FINALIZE.
* semantics.c (finish_omp_clauses): Handle IF_PRESENT and FINALIZE.

gcc/fortran/
* gfortran.h (gfc_omp_clauses): Add unsigned if_present, finalize
bitfields.
* openmp.c (enum omp_mask2): Remove OMP_CLAUSE_PRESENT_OR_*. Add
OMP_CLAUSE_{IF_PRESENT,FINALIZE}.
(gfc_match_omp_clauses): Update handling of copy, copyin, copyout,
create, deviceptr, present_of_*. Add support for finalize and
if_present.
(OACC_PARALLEL_CLAUSES): Remove PRESENT_OR_* clauses.
(OACC_KERNELS_CLAUSES): Likewise.
(OACC_DATA_CLAUSES): Likewise.
(OACC_DECLARE_CLAUSES): Likewise.
(OACC_UPDATE_CLAUSES): Add IF_PRESENT clause.
(OACC_ENTER_DATA_CLAUSES): Remove PRESENT_OR_* clauses.
(OACC_EXIT_DATA_CLAUSES): Add FINALIZE clause.
(gfc_match_oacc_declare): Update to OpenACC 2.5 semantics.
* trans-openmp.c (gfc_trans_omp_clauses): Add support for IF_PRESENT
and FINALIZE.

gcc/
* gimplify.c (gimplify_scan_omp_clauses): Add support for
OMP_CLAUSE_{IF_PRESENT,FINALIZE}.
(gimplify_adjust_omp_clauses): Likewise.
(gimplify_oacc_declare_1): Add support for GOMP_MAP_RELEASE, remove
support for GOMP_MAP_FORCE_{ALLOC,TO,FROM,TOFROM}.
(gimplify_omp_target_update): Update handling of acc update and
enter/exit data.
* omp-low.c (install_var_field): Remove unused parameter
base_pointers_restrict.
(scan_sha

Re: C++ PATCHes to xvalue handling

[Jason Merrill]

On Fri, May 25, 2018 at 12:40 PM, Sudakshina Das  wrote:
> On 23/05/18 18:21, Jason Merrill wrote:
>>
>> The first patch implements the adjustments from core issues 616 and
>> 1213 to the value category of subobjects of class prvalues: they were
>> considered prvalues themselves, but that was kind of nonsensical.  Now
>> they are considered xvalues.  Along with this, I've removed the
>> diagnostic distinction between xvalues and prvalues when trying to use
>> one or the other as an lvalue; the important thing is that they are
>> rvalues.
>>
>> The second patch corrects various issues with casts and xvalues/rvalue
>> references: we were treating an xvalue operand to dynamic_cast as an
>> lvalue, and we were objecting to casts from prvalue to rvalue
>> reference type.
>>
>
> With the second patch:
> commit f7d2790049fd1e59af4b69ee12f7c101cfe4cdab
> Author: jason 
> Date:   Wed May 23 17:21:39 2018 +
>
> Fix cast to rvalue reference from prvalue.
>
> * cvt.c (diagnose_ref_binding): Handle rvalue reference.
> * rtti.c (build_dynamic_cast_1): Don't try to build a reference to
> non-class type.  Handle xvalue argument.
> * typeck.c (build_reinterpret_cast_1): Allow cast from prvalue to
> rvalue reference.
> * semantics.c (finish_compound_literal): Do direct-initialization,
> not cast, to initialize a reference.
>
> git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@260622
> 138bc75d-0d04-0410-961f-82ee72b054a4
>
> I have observed the following failure in Spec2017 while building
> 510.parest_r on aarch64-none-linux-gnu
>
> aarch64-none-linux-gnu-g++ -c -o source/numerics/matrices.all_dimensions.o
> -DSPEC -DNDEBUG -Iinclude -I. -DSPEC_AUTO_SUPPRESS_OPENMP
> -mcpu=cortex-a57+crypto -Ofast -fomit-frame-pointer -fpermissive
> -DSPEC_LP64 source/numerics/matrices.all_dimensions.cc
>
> source/numerics/matrices.all_dimensions.cc: In static member function
> 'static void dealii::MatrixTools::apply_boundary_values(const
> std::map&, dealii::BlockSparseMatrix&,
> dealii::BlockVector&, dealii::BlockVector&, bool)':
>
> source/numerics/matrices.all_dimensions.cc:469:50: error: lvalue required as
> unary '&' operand
>
> [this_sparsity.get_rowstart_indices()[row]];
>
>   ^
>
> source/numerics/matrices.all_dimensions.cc:472:55: error: lvalue required as
> unary '&' operand
>
>[this_sparsity.get_rowstart_indices()[row]+1],
>
>^
>
> source/numerics/matrices.all_dimensions.cc:474:55: error: lvalue required as
> unary '&' operand
>
>[this_sparsity.get_rowstart_indices()[row+1]],
>
>^
>
> source/numerics/matrices.all_dimensions.cc:479:49: error: lvalue required as
> unary '&' operand
>
>[this_sparsity.get_rowstart_indices()[row]],
>
>  ^
>
> source/numerics/matrices.all_dimensions.cc:481:51: error: lvalue required as
> unary '&' operand
>
>[this_sparsity.get_rowstart_indices()[row+1]],
>
>^
>
> source/numerics/matrices.all_dimensions.cc:510:50: error: lvalue required as
> unary '&' operand
>
>   [this_sparsity.get_rowstart_indices()[0]]);
>
> Sudi

Thanks, investigating.

Jason

Re: [PATCH] consider MIN_EXPR in get_size_range() (PR 85888)

[Martin Sebor]

Attached is revision 3 of the patch incorporating your
determine_value_range function with the requested changes.

Martin
PR testsuite/85888 - New test case c-c++-common/attr-nonstring-6.c from r260541 fails with excess errors

gcc/ChangeLog:

	PR testsuite/85888
	* builtins.c (expand_builtin_strncmp): Call expand_call with
	the original CALL_EXPR since no stabilization has been done.
	* gcc/tree-ssanames.c (get_range_info): Call determine_value_range
	for arguments other than SSA_NAME.
	* calls.c (get_size_range): Call get_range_info even for non-SSA
	arguments.
	* tree-vrp.h (determine_value_range): Declared new function.
	* tree-vrp.c (determine_value_range_1, determine_value_range): New.

diff --git a/gcc/calls.c b/gcc/calls.c
index 35bcff7..f6bf3a6 100644
--- a/gcc/calls.c
+++ b/gcc/calls.c
@@ -1319,7 +1319,7 @@ get_size_range (tree exp, tree range[2], bool allow_zero /* = false */)
   wide_int min, max;
   enum value_range_type range_type;
 
-  if (TREE_CODE (exp) == SSA_NAME && integral)
+  if (integral)
 range_type = get_range_info (exp, &min, &max);
   else
 range_type = VR_VARYING;
diff --git a/gcc/tree-ssanames.c b/gcc/tree-ssanames.c
index 6cce43b..b5d257b 100644
--- a/gcc/tree-ssanames.c
+++ b/gcc/tree-ssanames.c
@@ -398,25 +398,30 @@ set_range_info (tree name, enum value_range_type range_type,
 
 
 /* Gets range information MIN, MAX and returns enum value_range_type
-   corresponding to tree ssa_name NAME.  enum value_range_type returned
-   is used to determine if MIN and MAX are valid values.  */
+   corresponding to expression EXPR.  Returned value_range_type is
+   used to determine if MIN and MAX are valid values.  */
 
 enum value_range_type
-get_range_info (const_tree name, wide_int *min, wide_int *max)
+get_range_info (const_tree expr, wide_int *min, wide_int *max)
 {
-  gcc_assert (!POINTER_TYPE_P (TREE_TYPE (name)));
+  gcc_assert (!POINTER_TYPE_P (TREE_TYPE (expr)));
   gcc_assert (min && max);
-  range_info_def *ri = SSA_NAME_RANGE_INFO (name);
+  if (TREE_CODE (expr) == SSA_NAME)
+{
+  range_info_def *ri = SSA_NAME_RANGE_INFO (expr);
 
-  /* Return VR_VARYING for SSA_NAMEs with NULL RANGE_INFO or SSA_NAMEs
- with integral types width > 2 * HOST_BITS_PER_WIDE_INT precision.  */
-  if (!ri || (GET_MODE_PRECISION (SCALAR_INT_TYPE_MODE (TREE_TYPE (name)))
-	  > 2 * HOST_BITS_PER_WIDE_INT))
-return VR_VARYING;
+  /* Return VR_VARYING for SSA_NAMEs with NULL RANGE_INFO or SSA_NAMEs
+	 with integral types width > 2 * HOST_BITS_PER_WIDE_INT precision.  */
+  if (!ri || (GET_MODE_PRECISION (SCALAR_INT_TYPE_MODE (TREE_TYPE (expr)))
+		  > 2 * HOST_BITS_PER_WIDE_INT))
+	return VR_VARYING;
+
+  *min = ri->get_min ();
+  *max = ri->get_max ();
+  return SSA_NAME_RANGE_TYPE (expr);
+}
 
-  *min = ri->get_min ();
-  *max = ri->get_max ();
-  return SSA_NAME_RANGE_TYPE (name);
+  return determine_value_range (const_cast (expr), min, max);
 }
 
 /* Set nonnull attribute to pointer NAME.  */
diff --git a/gcc/tree-vrp.c b/gcc/tree-vrp.c
index 6c482dd..1b1084b 100644
--- a/gcc/tree-vrp.c
+++ b/gcc/tree-vrp.c
@@ -7130,3 +7130,62 @@ make_pass_vrp (gcc::context *ctxt)
 {
   return new pass_vrp (ctxt);
 }
+
+
+/* Worker for determine_value_range.  */
+
+static void
+determine_value_range_1 (value_range *vr, tree expr)
+{
+  if (BINARY_CLASS_P (expr))
+{
+  value_range vr0 = VR_INITIALIZER, vr1 = VR_INITIALIZER;
+  determine_value_range_1 (&vr0, TREE_OPERAND (expr, 0));
+  determine_value_range_1 (&vr1, TREE_OPERAND (expr, 1));
+  extract_range_from_binary_expr_1 (vr, TREE_CODE (expr), TREE_TYPE (expr),
+	&vr0, &vr1);
+}
+  else if (UNARY_CLASS_P (expr))
+{
+  value_range vr0 = VR_INITIALIZER;
+  determine_value_range_1 (&vr0, TREE_OPERAND (expr, 0));
+  extract_range_from_unary_expr (vr, TREE_CODE (expr), TREE_TYPE (expr),
+ &vr0, TREE_TYPE (TREE_OPERAND (expr, 0)));
+}
+  else if (TREE_CODE (expr) == INTEGER_CST)
+set_value_range_to_value (vr, expr, NULL);
+  else
+{
+  value_range_type kind;
+  wide_int min, max;
+  /* For SSA names try to extract range info computed by VRP.  Otherwise
+	 fall back to varying.  */
+  if (TREE_CODE (expr) == SSA_NAME
+	  && INTEGRAL_TYPE_P (TREE_TYPE (expr))
+	  && (kind = get_range_info (expr, &min, &max)) != VR_VARYING)
+	set_value_range (vr, kind, wide_int_to_tree (TREE_TYPE (expr), min),
+			 wide_int_to_tree (TREE_TYPE (expr), max), NULL);
+  else
+	set_value_range_to_varying (vr);
+}
+}
+
+/* Compute a value-range for EXPR and set it in *MIN and *MAX.  Return
+   determined the range type.  */
+
+value_range_type
+determine_value_range (tree expr, wide_int *min, wide_int *max)
+{
+  value_range vr = VR_INITIALIZER;
+  determine_value_range_1 (&vr, expr);
+  if ((vr.type == VR_RANGE
+   || vr.type == VR_ANTI_RANGE)
+  && !symbolic_range_p (&vr))
+{
+  *min = wi::to_wide (vr.min);
+  *max = wi::to_wide (vr.

Re: [PATCH] tighten up -Wclass-memaccess for ctors/dtors (PR 84851)

[Martin Sebor]

(I just now noticed the first two attempts were sent to the wrong
list.  Sorry about that.)

On 05/25/2018 02:16 PM, Martin Sebor wrote:

A fix for 84851 - missing -Wclass-memaccess for a memcpy in a copy
ctor with a non-trivial member was implemented but disabled for GCC
8 but because it was late, with the expectation we would enable it
for GCC 9.  The attached removes the code that guards the full fix
to enable it.

Martin



PR c++/84851 - missing -Wclass-memaccess for a memcpy in a copy ctor with a non-trivial member

gcc/cp/ChangeLog:

	PR c++/84851
	* call.c (maybe_warn_class_memaccess): Tighten up.

gcc/testsuite/ChangeLog:

	PR c++/84851
	* g++.dg/Wclass-memaccess-4.C: Remove XFAIL.

diff --git a/gcc/cp/call.c b/gcc/cp/call.c
index 7aadd64..6a8ff6b 100644
--- a/gcc/cp/call.c
+++ b/gcc/cp/call.c
@@ -8535,15 +8535,6 @@ maybe_warn_class_memaccess (location_t loc, tree fndecl,
   bool special = same_type_ignoring_top_level_qualifiers_p (ctx, desttype);
   tree binfo = TYPE_BINFO (ctx);
 
-  /* FIXME: The following if statement is overly permissive (see
-	 bug 84851).  Remove it in GCC 9.  */
-  if (special
-	  && !BINFO_VTABLE (binfo)
-	  && !BINFO_N_BASE_BINFOS (binfo)
-	  && (DECL_CONSTRUCTOR_P (current_function_decl)
-	  || DECL_DESTRUCTOR_P (current_function_decl)))
-	return;
-
   if (special
 	  && !BINFO_VTABLE (binfo)
 	  && !first_non_trivial_field (desttype))
diff --git a/gcc/testsuite/g++.dg/Wclass-memaccess-4.C b/gcc/testsuite/g++.dg/Wclass-memaccess-4.C
index 8c33421..69b8c78 100644
--- a/gcc/testsuite/g++.dg/Wclass-memaccess-4.C
+++ b/gcc/testsuite/g++.dg/Wclass-memaccess-4.C
@@ -29,7 +29,7 @@ struct C
 
 C::C (const C &c)
 {
-  memcpy (this, &c, sizeof c);// { dg-warning "\\\[-Wclass-memaccess]" "pr84851" { xfail *-*-*} }
+  memcpy (this, &c, sizeof c);// { dg-warning "\\\[-Wclass-memaccess]" }
 }
 
 C& C::operator= (const C &c)

Re: [PATCH][Middle-end][version 3]2nd patch of PR78809 and PR83026

[Jeff Law]

On 02/07/2018 08:36 AM, Qing Zhao wrote:
> Hi, this is the 3rd version for this patch.
> 
> the main change compared with 2nd version are:
>   1. do not use “compute_objsize” to get the minimum object size per Jeff 
> and Richard’s
> comment. Instead, add a new function “determine_min_objsize” for this 
> purpose. This new
> function calls “compute_builtin_object_size” to get the minimum objsize, 
> however, due to 
> the fact that “compute_builtin_object_size” does nothing for SSA_NAME when 
> optimize > 0 (don’t
> know the exactly reason for this), inside “determine_min_objsize”, I have to 
> add  more code
> to catch up some simple SSA_NAME cases.
> 
>   2. in gimple-fold.c and tree-ssa-structalias.c, add the handling of the 
> new 
> BUILT_IN_STRCMP_EQ and BUILT_IN_STRNCMP_EQ in the same places where 
> BUILT_IN_STRCMP and BUILT_IN_STRNCMP is checked.
> 
>   3. some  format change and comments change per Jeff’s comment. 
> 
> let me know if you have any comments.
> 
> thanks a lot.
> 
> Qing
> 
> *
> 
> 2nd Patch for PR78009 
> Patch for PR83026
> 
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78809
> Inline strcmp with small constant strings
> 
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83026
> missing strlen optimization for strcmp of unequal strings
> 
> The design doc for PR78809 is at:
> https://www.mail-archive.com/gcc@gcc.gnu.org/msg83822.html
> 
> this patch is for the second part of change of PR78809 and PR83026:
> 
> B. for strncmp (s1, s2, n) (!)= 0 or strcmp (s1, s2) (!)= 0
> 
>  B.1. (PR83026) When the lengths of both arguments are constant and
>   it's a strcmp:
> * if the lengths are NOT equal, we can safely fold the call
>   to a non-zero value.
> * otherwise, do nothing now.
> 
>  B.2. (PR78809) When the length of one argument is constant, try to replace
>  the call with a __builtin_str(n)cmp_eq call where possible, i.e:
> 
>  strncmp (s, STR, C) (!)= 0 in which, s is a pointer to a string, STR is a
>  string with constant length, C is a constant.
>if (C <= strlen(STR) && sizeof_array(s) > C)
>  {
>replace this call with
>__builtin_strncmp_eq (s, STR, C) (!)= 0
>  }
>if (C > strlen(STR)
>  {
>it can be safely treated as a call to strcmp (s, STR) (!)= 0
>can handled by the following strcmp.
>  }
> 
>  strcmp (s, STR) (!)= 0 in which, s is a pointer to a string, STR is a
>  string with constant length.
>if  (sizeof_array(s) > strlen(STR))
>  {
>replace this call with
>__builtin_strcmp_eq (s, STR, strlen(STR)+1) (!)= 0
>  }
> 
>  later when expanding the new __builtin_str(n)cmp_eq calls, first expand them
>  as __builtin_memcmp_eq, if the expansion does not succeed, change them back
>  to call to __builtin_str(n)cmp.
> 
> adding test case strcmpopt_2.c and strcmpopt_4.c into gcc.dg for part B of
> PR78809 adding test case strcmpopt_3.c into gcc.dg for PR83026
> 
> bootstraped and tested on both X86 and Aarch64. no regression.
> 
> 
> gcc/ChangeLog
> 
> +2018-02-02  
> + 
> + PR middle-end/78809
> + PR middle-end/83026
> + * builtins.c (expand_builtin): Add the handling of BUILT_IN_STRCMP_EQ
> + and BUILT_IN_STRNCMP_EQ.
> + * builtins.def: Add new builtins BUILT_IN_STRCMP_EQ and
> + BUILT_IN_STRNCMP_EQ.
> + * gimple-fold.c (gimple_fold_builtin_string_compare): Add the 
> + handling of BUILTIN_IN_STRCMP_EQ and BUILT_IN_STRNCMP_EQ.
> + (gimple_fold_builtin): Likewise.
> + * tree-ssa-strlen.c (compute_string_length): New function.
> + (determine_min_obsize): New function.
> + (handle_builtin_string_cmp): New function to handle calls to
> + string compare functions.
> + (strlen_optimize_stmt): Add handling to builtin string compare
> + calls. 
> + * tree-ssa-structalias.c (find_func_aliases_for_builtin_call):
> + Add the handling of BUILT_IN_STRCMP_EQ and BUILT_IN_STRNCMP_EQ.
> + * tree.c (build_common_builtin_nodes): Add new defines of
> + BUILT_IN_STRNCMP_EQ and BUILT_IN_STRCMP_EQ.
> +
> 
> gcc/testsuite/ChangeLog
> 
> +2018-02-02  
> +
> + PR middle-end/78809
> + * gcc.dg/strcmpopt_2.c: New testcase.
> + * gcc.dg/strcmpopt_3.c: New testcase.
> +
> + PR middle-end/83026
> + * gcc.dg/strcmpopt_3.c: New testcase.
> 
> 
>
> +
> +/* Handle a call to strcmp or strncmp. When the result is ONLY used to do 
> +   equality test against zero:
> +
> +   A. When the lengths of both arguments are constant and it's a strcmp:
> +  * if the lengths are NOT equal, we can safely fold the call
> +to a non-zero value.
> +  * otherwise, do nothing now.
> +  
> +   B. When the length of one argument is constant, try to replace the call 
> with
> +   a __builtin_str(n)cmp_eq call where possible, i.e:
> +
> +   strncmp (s, STR, C) (!)= 0 in which, s is a pointer to a string, STR is a 
> +   string with const

Re: C++ PATCHes to xvalue handling

[Jason Merrill]

On Fri, May 25, 2018 at 4:08 PM, Jason Merrill  wrote:
> On Fri, May 25, 2018 at 12:40 PM, Sudakshina Das  wrote:
>> On 23/05/18 18:21, Jason Merrill wrote:
>>>
>>> The first patch implements the adjustments from core issues 616 and
>>> 1213 to the value category of subobjects of class prvalues: they were
>>> considered prvalues themselves, but that was kind of nonsensical.  Now
>>> they are considered xvalues.  Along with this, I've removed the
>>> diagnostic distinction between xvalues and prvalues when trying to use
>>> one or the other as an lvalue; the important thing is that they are
>>> rvalues.
>>>
>>> The second patch corrects various issues with casts and xvalues/rvalue
>>> references: we were treating an xvalue operand to dynamic_cast as an
>>> lvalue, and we were objecting to casts from prvalue to rvalue
>>> reference type.
>>>
>>
>> With the second patch:
>> commit f7d2790049fd1e59af4b69ee12f7c101cfe4cdab
>> Author: jason 
>> Date:   Wed May 23 17:21:39 2018 +
>>
>> Fix cast to rvalue reference from prvalue.
>>
>> * cvt.c (diagnose_ref_binding): Handle rvalue reference.
>> * rtti.c (build_dynamic_cast_1): Don't try to build a reference to
>> non-class type.  Handle xvalue argument.
>> * typeck.c (build_reinterpret_cast_1): Allow cast from prvalue to
>> rvalue reference.
>> * semantics.c (finish_compound_literal): Do direct-initialization,
>> not cast, to initialize a reference.
>>
>> git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@260622
>> 138bc75d-0d04-0410-961f-82ee72b054a4
>>
>> I have observed the following failure in Spec2017 while building
>> 510.parest_r on aarch64-none-linux-gnu
>>
>> aarch64-none-linux-gnu-g++ -c -o source/numerics/matrices.all_dimensions.o
>> -DSPEC -DNDEBUG -Iinclude -I. -DSPEC_AUTO_SUPPRESS_OPENMP
>> -mcpu=cortex-a57+crypto -Ofast -fomit-frame-pointer -fpermissive
>> -DSPEC_LP64 source/numerics/matrices.all_dimensions.cc
>>
>> source/numerics/matrices.all_dimensions.cc: In static member function
>> 'static void dealii::MatrixTools::apply_boundary_values(const
>> std::map&, dealii::BlockSparseMatrix&,
>> dealii::BlockVector&, dealii::BlockVector&, bool)':
>>
>> source/numerics/matrices.all_dimensions.cc:469:50: error: lvalue required as
>> unary '&' operand
>>
>> [this_sparsity.get_rowstart_indices()[row]];
>>
>>   ^
>>
>> source/numerics/matrices.all_dimensions.cc:472:55: error: lvalue required as
>> unary '&' operand
>>
>>[this_sparsity.get_rowstart_indices()[row]+1],
>>
>>^
>>
>> source/numerics/matrices.all_dimensions.cc:474:55: error: lvalue required as
>> unary '&' operand
>>
>>[this_sparsity.get_rowstart_indices()[row+1]],
>>
>>^
>>
>> source/numerics/matrices.all_dimensions.cc:479:49: error: lvalue required as
>> unary '&' operand
>>
>>[this_sparsity.get_rowstart_indices()[row]],
>>
>>  ^
>>
>> source/numerics/matrices.all_dimensions.cc:481:51: error: lvalue required as
>> unary '&' operand
>>
>>[this_sparsity.get_rowstart_indices()[row+1]],
>>
>>^
>>
>> source/numerics/matrices.all_dimensions.cc:510:50: error: lvalue required as
>> unary '&' operand
>>
>>   [this_sparsity.get_rowstart_indices()[0]]);
>>
>> Sudi
>
> Thanks, investigating.

Fixed thus.
commit 2c71bc15d22c4b831ff2e27ef7759de4dc78ef6c
Author: Jason Merrill 
Date:   Fri May 25 16:25:10 2018 -0400

CWG 616, 1213 - value category of subobject references.

* tree.c (lvalue_kind): Fix handling of ARRAY_REF of pointer.

diff --git a/gcc/cp/tree.c b/gcc/cp/tree.c
index 9d978160292..f21daaca1d0 100644
--- a/gcc/cp/tree.c
+++ b/gcc/cp/tree.c
@@ -95,14 +95,24 @@ lvalue_kind (const_tree ref)
 case TRY_CATCH_EXPR:
 case REALPART_EXPR:
 case IMAGPART_EXPR:
-case ARRAY_REF:
 case VIEW_CONVERT_EXPR:
-  op1_lvalue_kind = lvalue_kind (TREE_OPERAND (ref, 0));
-  if (op1_lvalue_kind == clk_class)
-	/* in the case of an array operand, the result is an lvalue if that
-	   operand is an lvalue and an xvalue otherwise */
-	op1_lvalue_kind = clk_rvalueref;
-  return op1_lvalue_kind;
+  return lvalue_kind (TREE_OPERAND (ref, 0));
+
+case ARRAY_REF:
+  {
+	tree op1 = TREE_OPERAND (ref, 0);
+	if (TREE_CODE (TREE_TYPE (op1)) == ARRAY_TYPE)
+	  {
+	op1_lvalue_kind = lvalue_kind (op1);
+	if (op1_lvalue_kind == clk_class)
+	  /* in the case of an array operand, the result is an lvalue if
+		 that operand is an lvalue and an xvalue otherwise */
+	  op1_lvalue_kind = clk_rvalueref;
+	return op1_lvalue_kind;
+	  }
+	else
+	  return clk_ordinary;
+  }
 
 case MEMBER_REF:
 case DOTSTAR_EXPR:
diff --git a/gcc/testsuite/g++.dg/template/array31.

Re: [PATCH] refine -Wstringop-truncation and -Wsizeof-pointer-memaccess for strncat of nonstrings (PR 85602)

[Martin Sebor]

Ping:
https://gcc.gnu.org/ml/gcc-patches/2018-05/msg00869.html

On 05/17/2018 08:01 PM, Martin Sebor wrote:

The -Wstringop-truncation and -Wsizeof-pointer-memaccess warnings
I added and enhanced, respectively, in GCC 8 are arguably overly
strict for source arguments declared with the nonstring attribute.

For example, -Wsizeof-pointer-memaccess triggers for the strncat
call below:

  __attribute__ ((nonstring)) char nonstr[8];
  extern char *d;
  strncat (d, nonstr, sizeof nonstr);

even though it's still a fairly common (if unsafe) idiom from
the early UNIX days (V7 from 1979 to be exact) where strncat
was introduced.  (This use case, modulo the attribute, was
reduced from coreutils.)

Simialrly, -Wstringop-truncation warns for some strcat calls that
are actually safe, such as in:

  strcpy (nonstr, "123");
  strncat (d, nonstr, 32);

To help with the adoption of the warnings and the attribute and
avoid unnecessary churn the attached patch relaxes both warnings
to accept code like this without diagnostics.

The patch doesn't add any new warnings so I'd like it considered
for GCC 8 in addition to trunk.

Thanks
Martin

C++ PATCH for c++/85815, reference to member of enclosing template

[Jason Merrill]

When we see INSTANCE->moo(), the type of INSTANCE is an opaque version
of A that has no members.  We need to recognize that it's a type
we're currently inside, and use the version we're building up when
looking for a base or member.

Tested x86_64-pc-linux-gnu, applying to trunk.
commit 675b027654850c182c8eb5b148e8164ecb2a4c4f
Author: Jason Merrill 
Date:   Thu May 24 12:31:08 2018 -0400

PR c++/85815 - reference to member of enclosing template.

* search.c (lookup_base): Use currently_open_class.
(lookup_member): Use it regardless of -fconcepts.
* parser.c (cp_parser_postfix_dot_deref_expression): Check it.

diff --git a/gcc/cp/class.c b/gcc/cp/class.c
index 25753d4c45f..c15390f4043 100644
--- a/gcc/cp/class.c
+++ b/gcc/cp/class.c
@@ -7463,8 +7463,8 @@ pop_class_stack (void)
 --current_class_stack[current_class_depth - 1].hidden;
 }
 
-/* Returns 1 if the class type currently being defined is either T or
-   a nested type of T.  Returns the type from the current_class_stack,
+/* If the class type currently being defined is either T or
+   a nested type of T, returns the type from the current_class_stack,
which might be equivalent to but not equal to T in case of
constrained partial specializations.  */
 
diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c
index d3e73488e84..c8d4e296ac3 100644
--- a/gcc/cp/parser.c
+++ b/gcc/cp/parser.c
@@ -7488,10 +7488,7 @@ cp_parser_postfix_dot_deref_expression (cp_parser *parser,
 	 access (5.2.5) outside the member function body.  */
   if (postfix_expression != current_class_ref
 	  && scope != error_mark_node
-	  && !(processing_template_decl
-	   && current_class_type
-	   && (same_type_ignoring_top_level_qualifiers_p
-		   (scope, current_class_type
+	  && !currently_open_class (scope))
 	{
 	  scope = complete_type (scope);
 	  if (!COMPLETE_TYPE_P (scope)
diff --git a/gcc/cp/search.c b/gcc/cp/search.c
index 22c0492f535..d4214d4198a 100644
--- a/gcc/cp/search.c
+++ b/gcc/cp/search.c
@@ -192,6 +192,9 @@ lookup_base (tree t, tree base, base_access access,
   else
 {
   t = complete_type (TYPE_MAIN_VARIANT (t));
+  if (dependent_type_p (t))
+	if (tree open = currently_open_class (t))
+	  t = open;
   t_binfo = TYPE_BINFO (t);
 }
 
@@ -1117,7 +1120,7 @@ lookup_member (tree xbasetype, tree name, int protect, bool want_type,
 
   /* Make sure we're looking for a member of the current instantiation in the
  right partial specialization.  */
-  if (flag_concepts && dependent_type_p (type))
+  if (dependent_type_p (type))
 if (tree t = currently_open_class (type))
   type = t;
 
diff --git a/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-dependent1.C b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-dependent1.C
new file mode 100644
index 000..6fd2bb379bf
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-dependent1.C
@@ -0,0 +1,19 @@
+// PR c++/85815
+// { dg-do compile { target c++11 } }
+
+template
+class A {
+static A* INSTANCE;
+void foobar();
+void moo() {}
+};
+
+template
+A* A::INSTANCE = nullptr;
+
+template
+void A::foobar() {
+auto x = []() {
+INSTANCE->moo();
+};
+}

[PATCH] Remove useless noinline variable (PR bootstrap/85921)

[Jakub Jelinek]

Hi!

The following variable only makes the code larger and less readable.
In addition, with some broken kernel headers that redefine noinline
it breaks bootstrap.

Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, ok for
trunk?

2018-05-25  Jakub Jelinek  

PR bootstrap/85921
* c-warn.c (diagnose_mismatched_attributes): Remove unnecessary
noinline variable to workaround broken kernel headers.

--- gcc/c-family/c-warn.c.jj2018-05-21 13:15:33.878575581 +0200
+++ gcc/c-family/c-warn.c   2018-05-25 14:28:12.151050892 +0200
@@ -2246,18 +2246,16 @@ diagnose_mismatched_attributes (tree old
   newdecl);
 
   /* Diagnose inline __attribute__ ((noinline)) which is silly.  */
-  const char *noinline = "noinline";
-
   if (DECL_DECLARED_INLINE_P (newdecl)
   && DECL_UNINLINABLE (olddecl)
-  && lookup_attribute (noinline, DECL_ATTRIBUTES (olddecl)))
+  && lookup_attribute ("noinline", DECL_ATTRIBUTES (olddecl)))
 warned |= warning (OPT_Wattributes, "inline declaration of %qD follows "
-  "declaration with attribute %qs", newdecl, noinline);
+  "declaration with attribute %", newdecl);
   else if (DECL_DECLARED_INLINE_P (olddecl)
   && DECL_UNINLINABLE (newdecl)
   && lookup_attribute ("noinline", DECL_ATTRIBUTES (newdecl)))
 warned |= warning (OPT_Wattributes, "declaration of %q+D with attribute "
-  "%qs follows inline declaration", newdecl, noinline);
+  "% follows inline declaration", newdecl);
 
   return warned;
 }

Jakub

[PATCH, committed] fix a number of pdp11 target test failures

[Paul Koning]

This fixes a number of test failures due to test cases 
that are too large for pdp11 and should be skipped.  Also
one test case that asks for alignment larger than what
pdp11 supports.

  paul


2018-05-25 Paul Koning  

* gcc.c-torture/compile/20151204.c: Skip if pdp11.
* gcc.c-torture/compile/pr55921.c: Ditto.
* gcc.c-torture/compile/pr60655-1.c: Ditto.
* gcc.c-torture/compile/vector-align-1.c: Add max alignment if pdp11.

[PATCH] Rename ufloat to floatuns and ufix_trunc to fixuns_trunc in a few patterns (PR target/85918)

[Jakub Jelinek]

Hi!

The optab is looking for floatuns2 and
fixuns_trunc2, but some of the patterns are instead called
ufloat2 or ufix_trunc2
and thus are only used from intrinsics.

We can't change all spots, in two spots we have intentionally an
floatuns2 or fixuns_trunc2 expander that
uses for AVX512+ a ufloat*/ufix* insn and in other cases something
different, but for the cases I've changed we just give up before AVX512DQ.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2018-05-25  Jakub Jelinek  

PR target/85918
* config/i386/i386.md (fixunssuffix, floatunssuffix): New code
attributes.
* config/i386/sse.md
(float2):
Rename to ...

(float2):
... this.
(float2):
Rename to ...

(float2):
... this.
(*floatv2div2sf2): Rename to ...
(*floatv2div2sf2): ... this.
(floatv2div2sf2_mask): Rename to ...
(floatv2div2sf2_mask): ... this.
(*floatv2div2sf2_mask_1): Rename to ...
(*floatv2div2sf2_mask_1): ... this.
(fix_truncv8dfv8si2): Rename
to ...
(fix_truncv8dfv8si2):
... this.

(fix_trunc2):
Rename to ...

(fix_trunc2):
... this.

(fix_trunc2):
Rename to ...

(fix_trunc2):
... this.
(fix_truncv2sfv2di2): Rename to ...
(fix_truncv2sfv2di2): ... this.
(vec_pack_ufix_trunc_): Use gen_fixuns_truncv8dfv8si2 instead of
gen_ufix_truncv8dfv8si2.
* config/i386/i386-builtin.def (__builtin_ia32_cvttpd2uqq256_mask,
__builtin_ia32_cvttpd2uqq128_mask, __builtin_ia32_cvttps2uqq256_mask,
__builtin_ia32_cvttps2uqq128_mask, __builtin_ia32_cvtuqq2ps256_mask,
__builtin_ia32_cvtuqq2ps128_mask, __builtin_ia32_cvtuqq2pd256_mask,
__builtin_ia32_cvtuqq2pd128_mask, __builtin_ia32_cvttpd2udq512_mask,
__builtin_ia32_cvtuqq2ps512_mask, __builtin_ia32_cvtuqq2pd512_mask,
__builtin_ia32_cvttps2uqq512_mask, __builtin_ia32_cvttpd2uqq512_mask):
Use fixuns instead ufix or floatuns instead ufloat in CODE_FOR_ names.

* gcc.target/i386/avx512dq-pr85918.c: New test.

--- gcc/config/i386/i386.md.jj  2018-05-25 14:34:52.339390522 +0200
+++ gcc/config/i386/i386.md 2018-05-25 20:41:43.913430614 +0200
@@ -981,10 +981,12 @@ (define_code_attr trunsuffix [(ss_trunca
 ;; Used in signed and unsigned fix.
 (define_code_iterator any_fix [fix unsigned_fix])
 (define_code_attr fixsuffix [(fix "") (unsigned_fix "u")])
+(define_code_attr fixunssuffix [(fix "") (unsigned_fix "uns")])
 
 ;; Used in signed and unsigned float.
 (define_code_iterator any_float [float unsigned_float])
 (define_code_attr floatsuffix [(float "") (unsigned_float "u")])
+(define_code_attr floatunssuffix [(float "") (unsigned_float "uns")])
 
 ;; All integer modes.
 (define_mode_iterator SWI1248x [QI HI SI DI])
--- gcc/config/i386/sse.md.jj   2018-05-25 14:35:23.122416638 +0200
+++ gcc/config/i386/sse.md  2018-05-25 20:21:41.939050655 +0200
@@ -4853,7 +4853,7 @@ (define_insn "float")])
 
-(define_insn 
"float2"
+(define_insn 
"float2"
   [(set (match_operand:VF2_AVX512VL 0 "register_operand" "=v")
(any_float:VF2_AVX512VL
  (match_operand: 1 "nonimmediate_operand" 
"")))]
@@ -4863,7 +4863,7 @@ (define_insn "float")])
 
-;; For float insn patterns
+;; For float insn patterns
 (define_mode_attr qq2pssuff
   [(V8SF "") (V4SF "{y}")])
 
@@ -4877,7 +4877,7 @@ (define_mode_attr sseintvecmode3
   [(V8SF "XI") (V4SF "OI")
(V8DF "OI") (V4DF "TI")])
 
-(define_insn 
"float2"
+(define_insn 
"float2"
   [(set (match_operand:VF1_128_256VL 0 "register_operand" "=v")
 (any_float:VF1_128_256VL
   (match_operand: 1 "nonimmediate_operand" 
"")))]
@@ -4887,7 +4887,7 @@ (define_insn "float")])
 
-(define_insn "*floatv2div2sf2"
+(define_insn "*floatv2div2sf2"
   [(set (match_operand:V4SF 0 "register_operand" "=v")
 (vec_concat:V4SF
(any_float:V2SF (match_operand:V2DI 1 "nonimmediate_operand" "vm"))
@@ -4898,7 +4898,7 @@ (define_insn "*floatv2div2s
(set_attr "prefix" "evex")
(set_attr "mode" "V4SF")])
 
-(define_insn "floatv2div2sf2_mask"
+(define_insn "floatv2div2sf2_mask"
   [(set (match_operand:V4SF 0 "register_operand" "=v")
 (vec_concat:V4SF
 (vec_merge:V2SF
@@ -4914,7 +4914,7 @@ (define_insn "floatv2div2sf
(set_attr "prefix" "evex")
(set_attr "mode" "V4SF")])
 
-(define_insn "*floatv2div2sf2_mask_1"
+(define_insn "*floatv2div2sf2_mask_1"
   [(set (match_operand:V4SF 0 "register_operand" "=v")
 (vec_concat:V4SF
(vec_merge:V2SF
@@ -5084,7 +5084,7 @@ (define_insn "ufix_notruncv2dfv2si2fix_truncv8dfv8si2"
+(define_insn "fix_truncv8dfv8si2"
   [(set (match_operand:V8SI 0 "register_operand" "=v")
(any_fix:V8SI
  (match_operand:V8DF 1 "" 
"")))]
@@ -5123,7 +5123,7 @@ (define_insn "ufix_truncv4dfv4si2fix_trunc2"
+(define_insn 
"fix_trunc2"
   [(set (match_oper

[PATCH v2] libgcc: Add support for --disable-libgcov

[Rasmus Villemoes]

When trying to build gcc 6.4.0 targeting VxWorks 5.5, I ran into libgcov
not building against the VxWorks system headers - there are multiple
issues such as

gcc-src/libgcc/../gcc/gcov-io.c:78:3: warning: implicit declaration of function 
'getpid' [-Wimplicit-function-declaration]
   s_flock.l_pid = getpid ();
   ^

gcc-src/libgcc/libgcov.c:139:9: warning: implicit declaration of function 
'access' [-Wimplicit-function-declaration]
 if (access (filename, F_OK) == -1
 ^
gcc-src/libgcc/libgcov.c:139:31: error: 'F_OK' undeclared (first use in this 
function)
 if (access (filename, F_OK) == -1
   ^
Moreover, from the gcov documentation, it would seem to be cumbersome at
best to actually use it on VxWorks. So add an option for disabling build
and install of libgcov.

It would probably be most user-friendly if the resulting compiler would
reject --coverage and -fprofile-arcs, but I couldn't find an easy way to
do that. Also, the similar --disable-libsanitizer does not make the
compiler complain about use of -fsanitize=xyz.

2018-05-25  Rasmus Villemoes  

gcc/doc/
* install.texi: Document --disable-libgcov.

libgcc/
* Makefile.in: Honour @enable_libgcov@.
* configure.ac: Add --disable-libgcov option.
* configure: Regenerate.
---
 gcc/doc/install.texi | 4 
 libgcc/Makefile.in   | 8 +++-
 libgcc/configure.ac  | 5 +
 3 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 7c5cdc762d3..cf3496d37c6 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -1673,6 +1673,10 @@ should not be built.
 Specify that the run-time libraries used by vtable verification
 should not be built.
 
+@item --disable-libgcov
+Specify that the run-time library used for coverage analysis
+should not be built.
+
 @item --with-dwarf2
 Specify that the compiler should
 use DWARF 2 debugging information as the default.
diff --git a/libgcc/Makefile.in b/libgcc/Makefile.in
index dd8cee99fd3..22acc15e236 100644
--- a/libgcc/Makefile.in
+++ b/libgcc/Makefile.in
@@ -36,6 +36,7 @@ SHELL = @SHELL@
 
 cpu_type = @cpu_type@
 enable_shared = @enable_shared@
+enable_libgcov = @enable_libgcov@
 double_type_size = @double_type_size@
 long_double_type_size = @long_double_type_size@
 decimal_float = @decimal_float@
@@ -941,7 +942,10 @@ libgcc.a libgcov.a libunwind.a libgcc_eh.a:
 
$(RANLIB) $@
 
-all: libgcc.a libgcov.a
+all: libgcc.a
+ifeq ($(enable_libgcov),yes)
+all: libgcov.a
+endif
 
 ifneq ($(LIBUNWIND),)
 all: libunwind.a
@@ -1164,9 +1168,11 @@ install-leaf: $(install-shared) $(install-libunwind)
$(INSTALL_DATA) libgcc.a $(DESTDIR)$(inst_libdir)/
chmod 644 $(DESTDIR)$(inst_libdir)/libgcc.a
$(RANLIB) $(DESTDIR)$(inst_libdir)/libgcc.a
+ifeq ($(enable_libgcov),yes)
$(INSTALL_DATA) libgcov.a $(DESTDIR)$(inst_libdir)/
chmod 644 $(DESTDIR)$(inst_libdir)/libgcov.a
$(RANLIB) $(DESTDIR)$(inst_libdir)/libgcov.a
+endif
 
parts="$(INSTALL_PARTS)";   \
for file in $$parts; do \
diff --git a/libgcc/configure.ac b/libgcc/configure.ac
index b59aa746afc..a878c473f3d 100644
--- a/libgcc/configure.ac
+++ b/libgcc/configure.ac
@@ -68,6 +68,11 @@ AC_ARG_ENABLE(shared,
 ], [enable_shared=yes])
 AC_SUBST(enable_shared)
 
+AC_ARG_ENABLE(libgcov,
+[  --disable-libgcov   don't provide libgcov],
+[], [enable_libgcov=yes])
+AC_SUBST(enable_libgcov)
+
 AC_ARG_ENABLE(vtable-verify,
 [  --enable-vtable-verifyEnable vtable verification feature ],
 [case "$enableval" in
-- 
2.15.1

Re: [PATCH] Enhance BB vectorization dependence analysis

[H.J. Lu]

On Fri, May 25, 2018 at 5:48 AM, Richard Biener  wrote:
>
> This simplifies data-ref analysis further and to make that work enhances
> BB vectorization dependence analysis as a comment suggested.  I've
> needed to add tbaa_p flags to some of the alias disambiguators.
>
> Bootstrapped and tested on x86_64-unknown-linux-gnu, SPEC 2k6 build
> is running right now.
>
> Richard.
>
> From 7478a9f17446e7ad1355b5a060ef8a65945e5323 Mon Sep 17 00:00:00 2001
> From: Richard Guenther 
> Date: Fri, 25 May 2018 12:02:48 +0200
> Subject: [PATCH] Use oracle in BB vectorizer dependence analysis
>
> 2018-05-25  Richard Biener  
>
> * tree-ssa-alias.h (refs_may_alias_p): Add tbaa_p bool parameter,
> defaulted to true.
> (ref_maybe_used_by_stmt_p): Likewise.
> (stmt_may_clobber_ref_p): Likewise.
> (stmt_may_clobber_ref_p_1): Likewise.
> * tree-ssa-alias.c (refs_may_alias_p): Add tbaa_p bool parameter
> and pass it along.
> (ref_maybe_used_by_stmt_p): Likewise.
> (stmt_may_clobber_ref_p): Likewise.
> (stmt_may_clobber_ref_p_1): Likewise.
> * tree-vect-data-refs.c (vect_slp_analyze_node_dependences): Use
> the alias oracle to disambiguate DRs with stmts DR analysis
> couldn't handle.
> (vect_analyze_data_refs): Do not give up on not analyzable
> DRs for BB vectorization.  Remove code truncating the dataref
> vector.
>

This caused:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85933

-- 
H.J.

Re: [PATCH] handle local aggregate initialization in strlen (PR 83821)

[Marc Glisse]

On Fri, 25 May 2018, Martin Sebor wrote:


Why couldn't nonzero_chars be constant in that case?

void f(const char*s){
  s[0]='a';
  // I know that strlen(s) is at least 1 here
}


I was responding specifically to your question about the strlen()
CSE.  Above there is no call to strlen().  What I understood you
were asking about is something like:

 int f (char *s)
 {
   int n0 = strlen (s);
   s[7]='a';
   int n1 = strlen (s);   // can this be replaced by n0?
   return n0 == n1;
 }


Yes, but I realized afterwards that calling strlen causes strinfo to be 
updated, replacing a non-tight nonzero_chars with the lhs of the call. So 
I need a different use of strinfo to demonstrate the issue.



The example may be completely off, but just to try and describe what I
am wondering about:

int f(const char*s,char*restrict t,char c){


The const shouldn't have been there.


// we know nothing about s for now.
s[0]='a'; // nonzero_chars should now be 1
strcpy(t,s);
s[2]=c; // this is after nonzero_chars
strcpy(t,s);
}

If we assume that writing to s[2] is after the end of the original
string s, we can remove one of the strcpy. But that's not a valid
transformation in general.


Above, s[0] creates strinfo for s with nonzero_chars == 1 and
full_string_p == false.  Then, after the first call to strcpy,
that same strinfo is invalidated/removed because the length of
s is unknown.


strcpy writes to t, which cannot alias s, so I don't see why this should 
invalidate the strinfo for s.



The next assignment to s[2] doesn't do anything
(in the strlen pass) because the right operand is not constant).


Well, it should at least invalidate stuff.


In the second strcpy there is no strinfo for s.


This was a bad example again, because we don't have the relevant 
optimization anyway (2 identical calls to strcpy(t,s) in a row are not 
simplified to a single one).



I originally wanted to see if we could CSE calls to strlen(s) before and
after the write, but the lhs of the first call to strlen would replace
nonzero_chars. And I don't know so well what we use strinfo for and thus
how dangerous it is not to invalidate it.


The pass does track non-constant strlen() results so I think
the optimization you describe should be possible.  For instance,
here it should be safe to eliminate the second strlen:

 int f (char *s)
 {
   s[0] = 'a';
   s[1] = 'b';
   int n0 = __builtin_strlen (s);

   s[0] = 'x';
   int n1 = __builtin_strlen (s);

   return n0 == n1;
 }

It isn't optimized today because (as I explained above) the first
strlen() replaces the constant nonzero_chars == 2 with the non-
constant result of strlen(s).


Let me try a completely different example

char*f(){
  char*p=__builtin_calloc(12,1);
  __builtin_memset(p+5,1,2);
  __builtin_memset(p,0,12);
  return p;
}

With your patch from 12/1 and -fno-tree-dse, this is miscompiled and 
misses the final memset.



I also still fear it may be possible to come up with a more strlen-like 
example along the lines of


s[0]='a'; // nonzero_chars=1
- do something with s that relies on its length and doesn't invalidate
s[2]='a'; // patch prevents it from invalidating
- do something else with s

where the fact that s has a different length in lines 2 and 4 is hidden by 
the patch. But maybe all the transformations are carefully written to 
avoid this problem...


--
Marc Glisse

[Committed] PR fortran/85786 testcase

[Steve Kargl]

pault accidently committed in r260414 the 2-line patchr
from comment #5 of

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85786

which fixes the PR.  I have converted the code in comment #3
into a testcase and committed to ensure that the bug
does not re-appear.  Code attached.


2018-05-25  Steven G. Kargl  

PR fortran/85786
* gfortran.dg/pr85786.f90: New test.

-- 
Steve
Index: gcc/testsuite/gfortran.dg/pr85786.f90
===
--- gcc/testsuite/gfortran.dg/pr85786.f90	(nonexistent)
+++ gcc/testsuite/gfortran.dg/pr85786.f90	(working copy)
@@ -0,0 +1,46 @@
+! { dg-do run }
+! PR fortran/85786
+program test
+
+   implicit none
+
+   type :: p2d
+  real, pointer :: p(:,:) => null()
+   end type p2d
+  
+   type :: test_cs
+  type(p2d), pointer :: v(:) => null()
+   end type test_cs
+
+   type(test_cs), pointer :: cs
+   real, allocatable, target :: e(:,:)
+
+   allocate(cs)
+   if (associated(cs) .neqv. .true.) stop 1
+
+   allocate(cs%v(2))
+   if (associated(cs%v) .neqv. .true.) stop 2
+
+   allocate(e(2,2))
+   e = 42
+
+   if (query_ptr(e, cs) .neqv. .true.) stop 3
+
+   contains
+
+  logical function query_ptr(f_ptr, cs)
+
+ real, target, intent(in) :: f_ptr(:,:)
+ type(test_cs), pointer, intent(inout) :: cs
+
+ if (associated(cs)) then
+if (associated(cs%v) .neqv. .true.) stop 4
+cs%v(2)%p => f_ptr
+if (associated(cs%v(2)%p) .neqv. .true.) stop 5
+query_ptr = associated(cs%v(2)%p, f_ptr)
+ else
+query_ptr = .false.
+ end if
+  end function query_ptr
+
+end program test

[PATCH] RISC-V: Add interrupt attribute support.

[Jim Wilson]

This adds basic interrupt attribute support to the RISC-V port.  This will
save every register before it is used, will save every temporary and argument
register and the return address register before a call, and emits a mret
instruction at the end.  I've included some docs and some testcases to verify
the support.

I've also added a few misc cleanups I noticed while writing this patch.

This was tested with riscv{32,64}-{elf,linux} cross builds and checks.  There
were no regressions.

Committed.

Jim

gcc/
* config/riscv/riscv-protos.h (riscv_epilogue_uses): New.
* config/riscv/riscv.c (struct machine_function): Add
interrupt_handler_p and attribute_checked_p fields.
(riscv_attribute_table): Add interrupt.
(riscv_interrupt_type_p): New.
(riscv_save_reg_p): Save extra regs for interrupt handler.
(riscv_use_save_libcall): Return false  for interrupt handler.
(riscv_first_stack_step): Add forward declaration.
(riscv_compute_frame_info): New local interrupt_save_t1.  Set it
for interrupt handler with large frame.  Use it for saved reg list.
(riscv_expand_prologue): Move flag_stack_usage_info support to
eliminate duplication.
(riscv_expand_epilogue): Generate mret for interrupt handler.
(riscv_epilogue_uses): New.
(riscv_can_use_return_insn): Return false for interrupt handler.
(riscv_function_ok_for_sibcall): Likewise.
(riscv_set_current_function): Add interrupt handler support.
* config/riscv/riscv.h (EPILOGUE_USES): Call riscv_epilogue_uses.
* config/riscv/riscv.md (UNSPECV_MRET): New.
(GP_REGNUM): New.
(riscv_frflags, riscv_fsflags): Use tab after opcode.
(riscv_mret): New.
* doc/extend.texi (RISC-V Function Attributes) : New.

gcc/testsuite/
* gcc.target/riscv/interrupt-1.c: New.
* gcc.target/riscv/interrupt-2.c: New.
* gcc.target/riscv/interrupt-3.c: New.
* gcc.target/riscv/interrupt-4.c: New.
* gcc.target/riscv/interrupt-5.c: New.
---
 gcc/config/riscv/riscv-protos.h  |   1 +
 gcc/config/riscv/riscv.c | 127 +++
 gcc/config/riscv/riscv.h |   2 +-
 gcc/config/riscv/riscv.md|  13 ++-
 gcc/doc/extend.texi  |   6 ++
 gcc/testsuite/gcc.target/riscv/interrupt-1.c |   8 ++
 gcc/testsuite/gcc.target/riscv/interrupt-2.c |  17 
 gcc/testsuite/gcc.target/riscv/interrupt-3.c |   9 ++
 gcc/testsuite/gcc.target/riscv/interrupt-4.c |  18 
 gcc/testsuite/gcc.target/riscv/interrupt-5.c |  16 
 10 files changed, 199 insertions(+), 18 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/interrupt-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/interrupt-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/interrupt-3.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/interrupt-4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/interrupt-5.c

diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index 0538ede77e4..a194b192a2b 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -67,6 +67,7 @@ extern rtx riscv_return_addr (int, rtx);
 extern HOST_WIDE_INT riscv_initial_elimination_offset (int, int);
 extern void riscv_expand_prologue (void);
 extern void riscv_expand_epilogue (bool);
+extern bool riscv_epilogue_uses (unsigned int);
 extern bool riscv_can_use_return_insn (void);
 extern rtx riscv_function_value (const_tree, const_tree, enum machine_mode);
 extern bool riscv_expand_block_move (rtx, rtx, rtx);
diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index 9a9d9e1befe..7ea2657d8c8 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -130,6 +130,12 @@ struct GTY(())  machine_function {
   /* True if current function is a naked function.  */
   bool naked_p;
 
+  /* True if current function is an interrupt function.  */
+  bool interrupt_handler_p;
+
+  /* True if attributes on current function have been checked.  */
+  bool attributes_checked_p;
+
   /* The current frame information, calculated by riscv_compute_frame_info.  */
   struct riscv_frame_info frame;
 };
@@ -287,6 +293,8 @@ static const struct attribute_spec riscv_attribute_table[] =
   /* The attribute telling no prologue/epilogue.  */
   { "naked",   0,  0, true, false, false, false,
 riscv_handle_fndecl_attribute, NULL },
+  /* This attribute generates prologue/epilogue for interrupt handlers.  */
+  { "interrupt", 0, 0, false, true, true, false, NULL, NULL },
 
   /* The last attribute spec is set to be NULL.  */
   { NULL,  0,  0, false, false, false, false, NULL, NULL }
@@ -2713,7 +2721,14 @@ riscv_handle_fndecl_attribute (tree *node, tree name,
   return NULL_TREE;
 }
 
-/* Return true if func is a naked function.  */
+/* Return true if funcion TYPE is an interrupt

[PATCH] vx-common.h: add #define USE_TM_CLONE_REGISTRY 0

[Rasmus Villemoes]

2018-05-26  Rasmus Villemoes  

gcc/
* config/vx-common.h (USE_TM_CLONE_REGISTRY): #define to 0.
---
 gcc/config/vx-common.h | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/gcc/config/vx-common.h b/gcc/config/vx-common.h
index 7a05b5b602a..f5c398ee4b9 100644
--- a/gcc/config/vx-common.h
+++ b/gcc/config/vx-common.h
@@ -90,3 +90,10 @@ along with GCC; see the file COPYING3.  If not see
 /* We occasionally need to distinguish between the VxWorks variants.  */
 #define VXWORKS_KIND_NORMAL  1
 #define VXWORKS_KIND_AE  2
+
+/*
+ * libitm is not supported on VxWorks. Rather than providing stub
+ * no-op _ITM_registerTMCloneTable/_ITM_deregisterTMCloneTable
+ * functions, simply prevent crtstuff from even referring to those.
+ */
+#define USE_TM_CLONE_REGISTRY 0
-- 
2.15.1

Re: [PATCH] handle local aggregate initialization in strlen (PR 83821)

[Martin Sebor]

On 05/25/2018 03:55 PM, Marc Glisse wrote:

On Fri, 25 May 2018, Martin Sebor wrote:


Why couldn't nonzero_chars be constant in that case?

void f(const char*s){
  s[0]='a';
  // I know that strlen(s) is at least 1 here
}


I was responding specifically to your question about the strlen()
CSE.  Above there is no call to strlen().  What I understood you
were asking about is something like:

 int f (char *s)
 {
   int n0 = strlen (s);
   s[7]='a';
   int n1 = strlen (s);   // can this be replaced by n0?
   return n0 == n1;
 }


Yes, but I realized afterwards that calling strlen causes strinfo to be
updated, replacing a non-tight nonzero_chars with the lhs of the call.
So I need a different use of strinfo to demonstrate the issue.


The example may be completely off, but just to try and describe what I
am wondering about:

int f(const char*s,char*restrict t,char c){


The const shouldn't have been there.


// we know nothing about s for now.
s[0]='a'; // nonzero_chars should now be 1
strcpy(t,s);
s[2]=c; // this is after nonzero_chars
strcpy(t,s);
}

If we assume that writing to s[2] is after the end of the original
string s, we can remove one of the strcpy. But that's not a valid
transformation in general.


Above, s[0] creates strinfo for s with nonzero_chars == 1 and
full_string_p == false.  Then, after the first call to strcpy,
that same strinfo is invalidated/removed because the length of
s is unknown.


strcpy writes to t, which cannot alias s, so I don't see why this should
invalidate the strinfo for s.


That might be a question for Richard.  After processing the strcpy
call statement the pass ends up calling maybe_invalidate() where
it initializes an ao_ref with the source string and calls
stmt_may_clobber_ref_p_1() to determine if the statement may
clobber the reference.  The function returns true.




The next assignment to s[2] doesn't do anything
(in the strlen pass) because the right operand is not constant).


Well, it should at least invalidate stuff.


It does without the patch, but not with it because the offset
is greater than nonzero_chars.


In the second strcpy there is no strinfo for s.


This was a bad example again, because we don't have the relevant
optimization anyway (2 identical calls to strcpy(t,s) in a row are not
simplified to a single one).


I originally wanted to see if we could CSE calls to strlen(s) before and
after the write, but the lhs of the first call to strlen would replace
nonzero_chars. And I don't know so well what we use strinfo for and thus
how dangerous it is not to invalidate it.


The pass does track non-constant strlen() results so I think
the optimization you describe should be possible.  For instance,
here it should be safe to eliminate the second strlen:

 int f (char *s)
 {
   s[0] = 'a';
   s[1] = 'b';
   int n0 = __builtin_strlen (s);

   s[0] = 'x';
   int n1 = __builtin_strlen (s);

   return n0 == n1;
 }

It isn't optimized today because (as I explained above) the first
strlen() replaces the constant nonzero_chars == 2 with the non-
constant result of strlen(s).


Let me try a completely different example

char*f(){
  char*p=__builtin_calloc(12,1);
  __builtin_memset(p+5,1,2);
  __builtin_memset(p,0,12);
  return p;
}

With your patch from 12/1 and -fno-tree-dse, this is miscompiled and
misses the final memset.


So it is.  Thanks for the example.  It looks like it's an artifact
of the second memset() call not resetting the strinfo::stmt member,
and the final memset relying on the member to see if the memory
is all zeros.  I missed/forgot about that part of the pass.


I also still fear it may be possible to come up with a more strlen-like
example along the lines of

s[0]='a'; // nonzero_chars=1
- do something with s that relies on its length and doesn't invalidate
s[2]='a'; // patch prevents it from invalidating
- do something else with s

where the fact that s has a different length in lines 2 and 4 is hidden
by the patch. But maybe all the transformations are carefully written to
avoid this problem...


Let me do some more testing once I handle the calloc issue above.
If you think of more examples please post them.  This last one was 
obviously quite helpful.


Martin

[PATCH] crtstuff.c: remove leftover declaration of _Jv_RegisterClasses

[Rasmus Villemoes]

2018-05-26  Rasmus Villemoes  

libgcc/
* crtstuff.c: Remove declaration of _Jv_RegisterClasses.
---
 libgcc/crtstuff.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/libgcc/crtstuff.c b/libgcc/crtstuff.c
index 5e894455e16..d81c527a455 100644
--- a/libgcc/crtstuff.c
+++ b/libgcc/crtstuff.c
@@ -188,9 +188,6 @@ extern void *__deregister_frame_info_bases (const void *)
 TARGET_ATTRIBUTE_WEAK;
 extern void __do_global_ctors_1 (void);
 
-/* Likewise for _Jv_RegisterClasses.  */
-extern void _Jv_RegisterClasses (void *) TARGET_ATTRIBUTE_WEAK;
-
 /* Likewise for transactional memory clone tables.  */
 extern void _ITM_registerTMCloneTable (void *, size_t) TARGET_ATTRIBUTE_WEAK;
 extern void _ITM_deregisterTMCloneTable (void *) TARGET_ATTRIBUTE_WEAK;
-- 
2.15.1

[PATCH, committed] fix a number of pdp11 target test failures

[Paul Koning]

Sorry, it's been a while, previous message was incomplete.

This fixes a number of test failures due to test cases 
that are too large for pdp11 and should be skipped.  Also
one test case that asks for alignment larger than what
pdp11 supports.

 paul


2018-05-25 Paul Koning  

* gcc.c-torture/compile/20151204.c: Skip if pdp11.
* gcc.c-torture/compile/pr55921.c: Ditto.
* gcc.c-torture/compile/pr60655-1.c: Ditto.
* gcc.c-torture/compile/vector-align-1.c: Add max alignment if pdp11.

Index: testsuite/gcc.c-torture/compile/pr55921.c
===
--- testsuite/gcc.c-torture/compile/pr55921.c   (revision 260780)
+++ testsuite/gcc.c-torture/compile/pr55921.c   (revision 260781)
@@ -1,4 +1,5 @@
 /* PR tree-optimization/55921 */
+/* { dg-skip-if "Not enough registers" { "pdp11-*-*" } } */
 
 typedef union
 {
Index: testsuite/gcc.c-torture/compile/vector-align-1.c
===
--- testsuite/gcc.c-torture/compile/vector-align-1.c(revision 260780)
+++ testsuite/gcc.c-torture/compile/vector-align-1.c(revision 260781)
@@ -2,7 +2,11 @@
 
 /* If some target has a Max alignment less than 128, please create
a #ifdef around the alignment and add your alignment.  */
+#ifdef __pdp11__
+#define alignment 2
+#else
 #define alignment 128
+#endif
 
 char x __attribute__((aligned(alignment),vector_size(2)));
 
Index: testsuite/gcc.c-torture/compile/20151204.c
===
--- testsuite/gcc.c-torture/compile/20151204.c  (revision 260780)
+++ testsuite/gcc.c-torture/compile/20151204.c  (revision 260781)
@@ -1,4 +1,4 @@
-/* { dg-skip-if "Array too big" { "avr-*-*" } } */
+/* { dg-skip-if "Array too big" { "avr-*-*" "pdp11-*-*" } } */
 
 typedef __SIZE_TYPE__ size_t;
 
Index: testsuite/gcc.c-torture/compile/pr60655-1.c
===
--- testsuite/gcc.c-torture/compile/pr60655-1.c (revision 260780)
+++ testsuite/gcc.c-torture/compile/pr60655-1.c (revision 260781)
@@ -1,4 +1,4 @@
-/* { dg-options "-fdata-sections" { target { { ! { { hppa*-*-hpux* } && { ! 
lp64 } } } && { ! nvptx-*-* } } } } */
+/* { dg-options "-fdata-sections" { target { { ! { { hppa*-*-hpux* } && { ! 
lp64 } } } && { ! "nvptx-*-* pdp11-*-*" } } } } */
 
 typedef unsigned char unit;
 typedef unit *unitptr;

Re: [PATCH] Remove useless noinline variable (PR bootstrap/85921)

[Richard Biener]

On May 25, 2018 11:03:50 PM GMT+02:00, Jakub Jelinek  wrote:
>Hi!
>
>The following variable only makes the code larger and less readable.
>In addition, with some broken kernel headers that redefine noinline
>it breaks bootstrap.
>
>Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, ok
>for
>trunk?

OK. 

Richard. 

>2018-05-25  Jakub Jelinek  
>
>   PR bootstrap/85921
>   * c-warn.c (diagnose_mismatched_attributes): Remove unnecessary
>   noinline variable to workaround broken kernel headers.
>
>--- gcc/c-family/c-warn.c.jj   2018-05-21 13:15:33.878575581 +0200
>+++ gcc/c-family/c-warn.c  2018-05-25 14:28:12.151050892 +0200
>@@ -2246,18 +2246,16 @@ diagnose_mismatched_attributes (tree old
>  newdecl);
> 
>   /* Diagnose inline __attribute__ ((noinline)) which is silly.  */
>-  const char *noinline = "noinline";
>-
>   if (DECL_DECLARED_INLINE_P (newdecl)
>   && DECL_UNINLINABLE (olddecl)
>-  && lookup_attribute (noinline, DECL_ATTRIBUTES (olddecl)))
>+  && lookup_attribute ("noinline", DECL_ATTRIBUTES (olddecl)))
>warned |= warning (OPT_Wattributes, "inline declaration of %qD follows
>"
>- "declaration with attribute %qs", newdecl, noinline);
>+ "declaration with attribute %", newdecl);
>   else if (DECL_DECLARED_INLINE_P (olddecl)
>  && DECL_UNINLINABLE (newdecl)
>  && lookup_attribute ("noinline", DECL_ATTRIBUTES (newdecl)))
>warned |= warning (OPT_Wattributes, "declaration of %q+D with attribute
>"
>- "%qs follows inline declaration", newdecl, noinline);
>+ "% follows inline declaration", newdecl);
> 
>   return warned;
> }
>
>   Jakub

Re: [PATCH] PR target/85358 patch v2: Add target hook to prevent default widening

[Richard Biener]

On May 25, 2018 8:49:47 PM GMT+02:00, Michael Meissner  
wrote:
>I redid the patch to make the target hook only apply for scalar float
>points,
>and I removed all of the integer only subcases.
>
>I have checked this on a little endian Power8 system, and verified that
>it
>bootstraps correctly and there are no regressions.  I have just started
>an
>x86_64 build.  Assuming that build has no regressions, can I check this
>into
>GCC 9?  This bug appears in GCC 8, and I would like to back port this
>patch to
>GCC 8 as well before GCC 8.2 goes out.

What happens if you hack genmodes to not claim IFmode has any wider 
relationship with other modes? 

Richard. 

>[gcc]
>2018-05-25  Michael Meissner  
>
>   PR target/85358
>   * target.def (default_fp_widening_p): New target hook to automatic
>   widening betwen two floating point modes.
>   * optabs.c (expand_binop): Do not automatically widen a binary or
>   unary scalar floating point op if the backend says that the
>   widening should not occur.
>   (expand_twoval_unop): Likewise.
>   (expand_twoval_binop): Likewise.
>   (expand_unop): Likewise.
>   * config/rs6000/rs6000.c (TARGET_DEFAULT_FP_WIDENING_P): Define.
>   (rs6000_default_fp_widening_p): New target hook to prevent
>   automatic widening between IEEE 128-bit floating point and IBM
>   extended double floating point.
>   * doc/tm.texi (Target Hooks): Document new target hook
>   default_fp_widening_p.
>   * doc/tm.texi.in (Target Hooks): Likewise.
>
>[gcc/testsuite]
>2018-05-25  Michael Meissner  
>
>   PR target/85358
>   * gcc.target/powerpc/pr85358.c: New test.

Re: [PATCH] consider MIN_EXPR in get_size_range() (PR 85888)

[Richard Biener]

On Thu, May 24, 2018 at 11:22 PM Martin Sebor  wrote:

> On 05/24/2018 11:15 AM, Richard Biener wrote:
> > On May 24, 2018 7:02:17 PM GMT+02:00, Martin Sebor 
wrote:
> >> On 05/24/2018 03:39 AM, Richard Biener wrote:
> >>> On Thu, May 24, 2018 at 12:50 AM Martin Sebor 
> >> wrote:
> >>>
>  The attached patch enhances the get_size_range() function to
>  extract more accurate ranges out of MIN_EXPR and MAX_EXPR nodes
>  with SSA_NAME operand(s).  This helps -Wstringop-overflow avoid
>  false positives on some targets in cases like some of those
>  reported in bug 85623 - strncmp() warns about attribute nonstring
>  incorrectly in -Wstringop-overflow
> >>>
>  When first trying to expand calls to __builtin_strncmp, most back
>  ends succeed even when the expansion results in a call to the
> >> library
>  function.  The powerpc64 back-end, however, fails and and allows
>  the generic expansion to take place.  There is a subtle difference
>  between the two cases that shows up when examining the bound of
>  the strncmp call expression (the third argument): in the original
>  call expression (in expand_builtin_strncmp) the bound is or can be
>  an SSA_NAME.  But when the early expansion fails,
>  expand_builtin_strncmp transforms the original call expression into
>  a new one, substituting MIN_EXPR (bound, CST) for the bound where
>  CST is the constant result of strlen (STR), with STR being either
>  the first or second strncmp argument.  When the bound is an SSA_NAME
>  the subsequent attempt to determine its range from the MIN_EXPR
> >> fails.
> >>>
> >>> Hmm, wouldn't sth extracted from the attached random patch I have
> >> lying
> >>> around be more useful in general?  That is, refactor the GENERIC
> >>> expression walk in determine_value_range_1 to sth that can be used
> >>> in the current get_range_info () interface?  Or if we don't want to
> >> change
> >>> that to accept non-SSA names add a corresponding get_expr_range_info
> >> ()
> >>> interface.
> >>
> >> Thanks.  It is certainly more general.  I'm just not sure how much
> >> use the generality can be put to because...
> >>
> >>> If you do that please cut out the dominator/loop condition handling
> >> and
> >>> refrain from the idea of looking at SSA def stmts.
> >>
> >> ...I've done that but I'm having trouble exercising the code except
> >> for this bug.  (I've run the C testsuite but the only tests that end
> >> up in it call it with uninteresting arguments like VAR_DECL).  Do
> >> you have any suggestions?
> >
> > Well, what builds the MIN_EXPR for your testcase? I orinigally used it
for niters analysis which deals with complex GENERIC expressions. If you
just changed get_range_info then of course callers are guarded with SSA
name checks.

> In pr85888 it's built by expand_builtin_strncmp (so very late).
> It doesn't seem like a good use case because of this code:

> /* Expand the library call ourselves using a stabilized argument
>list to avoid re-evaluating the function's arguments twice.  */
> tree fn = build_call_nofold_loc (loc, fndecl, 3, arg1, arg2, len);
> gcc_assert (TREE_CODE (fn) == CALL_EXPR);
> CALL_EXPR_TAILCALL (fn) = CALL_EXPR_TAILCALL (exp);
> return expand_call (fn, target, target == const0_rtx);

> AFAICS, the new call expression is the same as the old one, the only
> difference is the LEN argument which is the MIN_EXPR.

> The code was added in r72380 where the stabilization referred to
> calling save_expr() on the arguments.  That code has been gone
> since r242556 so I think a better/more targeted solution to fix
> pr85888 than either of our approaches might be to simply call
> expand_call() on the original CALL_EXPR with the original
> arguments, including ARG3.

> I don't fully understand the point of the save_expr() calls there
> (and they're still in builtin_expand_strcmp), so if they need to
> be restored then they would presumably include ARG3.  I.e.,
> expand_call() would be called using ARG3 in the original SSA_NAME
> form rather than the MIN_EXPR wrapper created by the function.

> Attached is a patch that implements the first approach above.

> If the SAVE_EXPRs are needed for some reason, it would be good
> to have a test case to verify it.  I haven't been able to come
> up with one (or find an existing test that fails due to their
> removal) but that could very well be because my limited
> understanding of what they're for (and poor testsuite coverage).

> I'm also up for taking your patch and trying to make use of it
> for other trees where get_range_info() is currently being called
> for SSA_NAMEs only.  But it feels like a separate project from
> this bug fix.

But your patch makes the whole 'len' computation after

   /* If we don't have a constant length for the first, use the length
  of the second, if we know it.  If neither string is constant length,
  use the given length argument.  We don't req

Re: [PATCH GCC][1/6]Compute type mode and register class mapping

[Richard Biener]

On Fri, May 25, 2018 at 12:55 AM Jeff Law  wrote:

> On 05/18/2018 02:40 AM, Bin.Cheng wrote:
> > On Fri, May 4, 2018 at 5:21 PM, Bin Cheng  wrote:
> >> Hi,
> >> This is the updated version patch set computing register pressure on
TREE SSA
> >> and use that information to direct other loop optimizers (predcom only
for now).
> >> This version of change is to follow Jeff's comment that we should
reuse existing
> >> tree-ssa-live.c infrastructure for live range computation, rather than
inventing
> >> another one.
> >> Jeff had another concern about exposing ira.h and low-level register
stuff in
> >> GIMPLE world.  Unfortunately I haven't got a clear solution to it.  I
found it's
> >> a bit hard to relate type/type_mode with register class and with
available regs
> >> without exposing the information, especially there are multiple
possible register
> >> classes for vector types and it's not fixed.  I am open to any
suggestions here.
> >>
> >> This is the first patch estimating the map from type mode to register
class.
> >> This one doesn't need update and it's the same as the original version
patch
> >> at https://gcc.gnu.org/ml/gcc-patches/2017-05/msg01021.html
> >>
> >> Bootstrap and test on x86_64 and AArch64 ongoing.  Any comments?
> > Hi,
> > The original version of this patch was approved by Jeff
> > @https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01808.html
> > Jeff, some new comment now or the old approval is still valid?
> > Guess your major concern is about exporting ira.h to gimple world?
> Yea, that was by far my biggest concern -- IRA is very much in the RTL
> world and exposing it into the gimple world seems like a major layering
> violation.

> So I have no inherent issues with this patch in isolation, but I may
> have issues with subsequent patches if they introduce that kind of
> layering violation.  So let's avoid installing until we have agreement
> on the full set of patches.

I guess we should make Vlad aware of this as well.

Richard.

> jeff

Re: Unreviewed patch

[Richard Biener]

On Fri, May 25, 2018 at 12:57 AM Rainer Orth 
wrote:

> The following patch has remained unreviewed for two weeks:

>  [build] Support SHF_EXCLUDE on non-x86 and with Solaris as
>  https://gcc.gnu.org/ml/gcc-patches/2018-05/msg00465.html

> Most of it falls under my Solaris maintainership, I believe, but running
> the SHF_EXCLUDE configure test on all targets and the varasm.c change
don't.

OK.

Thanks,
Richard.

>  Rainer

> --

-
> Rainer Orth, Center for Biotechnology, Bielefeld University

Re: Support fused multiply-adds in fully-masked reductions

[Richard Biener]

On Thu, May 24, 2018 at 2:17 PM Richard Sandiford <
richard.sandif...@linaro.org> wrote:

> Richard Biener  writes:
> > On Wed, May 16, 2018 at 11:26 AM Richard Sandiford <
> > richard.sandif...@linaro.org> wrote:
> >
> >> This patch adds support for fusing a conditional add or subtract
> >> with a multiplication, so that we can use fused multiply-add and
> >> multiply-subtract operations for fully-masked reductions.  E.g.
> >> for SVE we vectorise:
> >
> >>double res = 0.0;
> >>for (int i = 0; i < n; ++i)
> >>  res += x[i] * y[i];
> >
> >> using a fully-masked loop in which the loop body has the form:
> >
> >>res_1 = PHI<0(preheader), res_2(latch)>;
> >>avec = IFN_MASK_LOAD (loop_mask, a)
> >>bvec = IFN_MASK_LOAD (loop_mask, b)
> >>prod = avec * bvec;
> >>res_2 = IFN_COND_ADD (loop_mask, res_1, prod);
> >
> >> where the last statement does the equivalent of:
> >
> >>res_2 = loop_mask ? res_1 + prod : res_1;
> >
> >> (operating elementwise).  The point of the patch is to convert the last
> >> two statements into a single internal function that is the equivalent
of:
> >
> >>res_2 = loop_mask ? fma (avec, bvec, res_1) : res_1;
> >
> >> (again operating elementwise).
> >
> >> All current conditional X operations have the form "do X or don't do X
> >> to the first operand" (add/don't add to first operand, etc.).  However,
> >> the FMA optabs and functions are ordered so that the accumulator comes
> >> last.  There were two obvious ways of resolving this: break the
> >> convention for conditional operators and have "add/don't add to the
> >> final operand" or break the convention for FMA and put the accumulator
> >> first.  The patch goes for the latter, but adds _REV to make it obvious
> >> that the operands are in a different order.
> >
> > Eh.  I guess you'll do the same to SAD/DOT_PROD/WIDEN_SUM?
> >
> > That said, I don't really see the "do or not do to the first operand",
it's
> > "do or not do the operation on operands 1 to 2 (or 3)".  None of the
> > current ops modify operand 1, they all produce a new value, no?

> Yeah, neither the current functions nor these ones actually changed
> operand 1.  It was all about deciding what the "else" value should be.
> The _REV thing was a "fix" for the fact that we wanted the else value
> to be the final operand of fma.

> Of course, the real fix was to make all the IFN_COND_* functions take an
> explicit else value, as you suggested in the review of the other patch
> in the series.  So all this _REV stuff is redundant now.

> Here's an updated version based on top of the IFN_COND_FMA patch
> that I just posted.  Tested in the same way.

OK.

Thanks,
Richard.

> Thanks,
> Richard

> 2018-05-24  Richard Sandiford  
>  Alan Hayward  
>  David Sherwood  

> gcc/
>  * internal-fn.h (can_interpret_as_conditional_op_p): Declare.
>  * internal-fn.c (can_interpret_as_conditional_op_p): New function.
>  * tree-ssa-math-opts.c (convert_mult_to_fma_1): Handle conditional
>  plus and minus and convert them into IFN_COND_FMA-based sequences.
>  (convert_mult_to_fma): Handle conditional plus and minus.

> gcc/testsuite/
>  * gcc.dg/vect/vect-fma-2.c: New test.
>  * gcc.target/aarch64/sve/reduc_4.c: Likewise.
>  * gcc.target/aarch64/sve/reduc_6.c: Likewise.
>  * gcc.target/aarch64/sve/reduc_7.c: Likewise.

> Index: gcc/internal-fn.h
> ===
> --- gcc/internal-fn.h   2018-05-24 13:05:46.049605128 +0100
> +++ gcc/internal-fn.h   2018-05-24 13:08:24.643987582 +0100
> @@ -196,6 +196,9 @@ extern internal_fn get_conditional_inter
>   extern internal_fn get_conditional_internal_fn (internal_fn);
>   extern tree_code conditional_internal_fn_code (internal_fn);
>   extern internal_fn get_unconditional_internal_fn (internal_fn);
> +extern bool can_interpret_as_conditional_op_p (gimple *, tree *,
> +  tree_code *, tree (&)[3],
> +  tree *);

>   extern bool internal_load_fn_p (internal_fn);
>   extern bool internal_store_fn_p (internal_fn);
> Index: gcc/internal-fn.c
> ===
> --- gcc/internal-fn.c   2018-05-24 13:05:46.048606357 +0100
> +++ gcc/internal-fn.c   2018-05-24 13:08:24.643987582 +0100
> @@ -,6 +,62 @@ #define CASE(NAME) case IFN_COND_##NAME:
>   }
>   }

> +/* Return true if STMT can be interpreted as a conditional tree code
> +   operation of the form:
> +
> + LHS = COND ? OP (RHS1, ...) : ELSE;
> +
> +   operating elementwise if the operands are vectors.  This includes
> +   the case of an all-true COND, so that the operation always happens.
> +
> +   When returning true, set:
> +
> +   - *COND_OUT to the condition COND, or to NULL_TREE if the condition
> + is known to be all-true
> +   - *CODE_OUT to the tree code

Re: Fold VEC_COND_EXPRs to IFN_COND_* where possible

[Richard Biener]

On Thu, May 24, 2018 at 2:21 PM Richard Sandiford <
richard.sandif...@linaro.org> wrote:

> Richard Biener  writes:
> >> 2018-05-24  Richard Sandiford  
> >
> >> gcc/
> >>  * doc/sourcebuild.texi (vect_double_cond_arith: Document.
> >>  * gimple-match.h (gimple_match_op::MAX_NUM_OPS): Bump to 4.
> >>  (gimple_match_op::gimple_match_op): Add an overload for 4
> > operands.
> >>  (gimple_match_op::set_op): Likewise.
> >>  (gimple_resimplify4): Declare.
> >>  * genmatch.c (commutative_op): Handle CFN_COND_* functions.
> >
> > ^^^  you don't seem to use that and I don't see how those are
commutative
> > in operands 1 and 2 without inverting operand 0.  So w/o adjusting the
> > parsing part I think that people can write (cond_foo:c ...) and likely
> > be surprised that it isn't rejected.  It is of course required to make
:C
> > work.

> Operands 1 and 2 are the operands of the binary operation, and now
> that the else value is specified separately, the functions are
> commutative in those operands if the binary operation is commutative.
> Of course, CFN_COND_SUB shouldn't have been there, sigh...

Ah - that was what confused me ;)

> > The patch is ok if you drop this hunk for now.  You can re-introduce it
> > as followup if you make sure to make :c error on those IFNs.

> OK, thanks.  I'm happy to drop it for now.

Thanks,
Richard.


> Richard

Re: Prefer open-coding vector integer division

[Richard Biener]

On Thu, May 24, 2018 at 2:52 PM Richard Sandiford <
richard.sandif...@linaro.org> wrote:

> Richard Biener  writes:
> > On Thu, May 24, 2018 at 10:31 AM Jakub Jelinek  wrote:
> >> On Thu, May 24, 2018 at 09:21:35AM +0100, Richard Sandiford wrote:
> >> > vect_recog_divmod_pattern currently bails out if the target has
> >> > native support for integer division, but I think in practice
> >> > it's always going to be better to open-code it anyway, just as
> >> > we usually open-code scalar divisions by constants.
> >> >
> >> > I think the only currently affected target is MIPS MSA, where for:
> >
> >> Isn't powerpcspe affected too?  It has a divv2si3 pattern.

> Ah, yeah.  I forgot to update the description after you mentioned
> that on IRC, sorry.

> >> > --- gcc/tree-vect-patterns.c  2018-05-16 12:48:59.115202362 +0100
> >> > +++ gcc/tree-vect-patterns.c  2018-05-24 09:18:10.445466941 +0100
> >> > @@ -2639,7 +2639,6 @@ vect_recog_divmod_pattern (vec
> >> >enum tree_code rhs_code;
> >> >stmt_vec_info stmt_vinfo = vinfo_for_stmt (last_stmt);
> >> >vec_info *vinfo = stmt_vinfo->vinfo;
> >> > -  optab optab;
> >> >tree q;
> >> >int dummy_int, prec;
> >> >stmt_vec_info def_stmt_vinfo;
> >> > @@ -2674,17 +2673,6 @@ vect_recog_divmod_pattern (vec
> >> >if (vectype == NULL_TREE)
> >> >  return NULL;
> >> >
> >> > -  /* If the target can handle vectorized division or modulo
natively,
> >> > - don't attempt to optimize this.  */
> >> > -  optab = optab_for_tree_code (rhs_code, vectype, optab_default);
> >> > -  if (optab != unknown_optab)
> >> > -{
> >> > -  machine_mode vec_mode = TYPE_MODE (vectype);
> >> > -  int icode = (int) optab_handler (optab, vec_mode);
> >> > -  if (icode != CODE_FOR_nothing)
> >> > - return NULL;
> >> > -}
> >> > -
> >
> >> Shouldn't we instead keep it, but only do it if
> >> optimize_bb_for_size_p (gimple_bb (last_stmt)) ?
> >> I mean, a hw division is very likely shorter than what we replace it
> > with...
> >
> > Good idea.  While loops are checked for optimize_loop_nest_for_speed if
> > not forced vect BB vectorization has no such predicate.

> Like this, if it passes testing?

Looks good.

Thanks,
Richard.

> Thanks,
> Richard


> 2018-05-24  Richard Sandiford  

> gcc/
>  * tree-vect-patterns.c: Include predict.h.
>  (vect_recog_divmod_pattern): Restrict check for division support
>  to when optimizing for size.

> gcc/testsuite/
>  * gcc.dg/vect/bb-slp-div-1.c: New XFAILed test.

> Index: gcc/tree-vect-patterns.c
> ===
> *** gcc/tree-vect-patterns.c2018-05-24 13:50:21.656138942 +0100
> --- gcc/tree-vect-patterns.c2018-05-24 13:50:21.819134113 +0100
> *** vect_recog_divmod_pattern (vec
> *** 2674,2688 
>  if (vectype == NULL_TREE)
>return NULL;

> !   /* If the target can handle vectorized division or modulo natively,
> !  don't attempt to optimize this.  */
> !   optab = optab_for_tree_code (rhs_code, vectype, optab_default);
> !   if (optab != unknown_optab)
>{
> !   machine_mode vec_mode = TYPE_MODE (vectype);
> !   int icode = (int) optab_handler (optab, vec_mode);
> !   if (icode != CODE_FOR_nothing)
> !   return NULL;
>}

>  prec = TYPE_PRECISION (itype);
> --- 2674,2692 
>  if (vectype == NULL_TREE)
>return NULL;

> !   if (optimize_bb_for_size_p (gimple_bb (last_stmt)))
>{
> !   /* If the target can handle vectorized division or modulo
natively,
> !don't attempt to optimize this, since native division is likely
> !to give smaller code.  */
> !   optab = optab_for_tree_code (rhs_code, vectype, optab_default);
> !   if (optab != unknown_optab)
> !   {
> ! machine_mode vec_mode = TYPE_MODE (vectype);
> ! int icode = (int) optab_handler (optab, vec_mode);
> ! if (icode != CODE_FOR_nothing)
> !   return NULL;
> !   }
>}

>  prec = TYPE_PRECISION (itype);
> Index: gcc/testsuite/gcc.dg/vect/bb-slp-div-1.c
> ===
> *** /dev/null   2018-04-20 16:19:46.369131350 +0100
> --- gcc/testsuite/gcc.dg/vect/bb-slp-div-1.c2018-05-24
13:50:21.818134143 +0100
> ***
> *** 0 
> --- 1,19 
> + /* { dg-do compile } */
> + /* { dg-additional-options "-msve-vector-bits=256" { target aarch64_sve
} } */
> +
> + int x[8];
> +
> + void
> + f (void)
> + {
> +   x[0] /= 2;
> +   x[1] /= 3;
> +   x[2] /= 4;
> +   x[3] /= 5;
> +   x[4] /= 6;
> +   x[5] /= 7;
> +   x[6] /= 8;
> +   x[7] /= 9;
> + }
> +
> + /* { dg-final { scan-tree-dump "basic block vectorized" "slp2" { xfail
*-*-* } } } */

Re: Add IFN_COND_FMA functions

[Richard Biener]

On Thu, May 24, 2018 at 2:08 PM Richard Sandiford <
richard.sandif...@linaro.org> wrote:

> This patch adds conditional equivalents of the IFN_FMA built-in functions.
> Most of it is just a mechanical extension of the binary stuff.

> Tested on aarch64-linux-gnu (with and without SVE), aarch64_be-elf
> and x86_64-linux-gnu.  OK for the non-AArch64 bits?

OK.

Richard.

> Richard


> 2018-05-24  Richard Sandiford  

> gcc/
>  * doc/md.texi (cond_fma, cond_fms, cond_fnma, cond_fnms):
Document.
>  * optabs.def (cond_fma_optab, cond_fms_optab, cond_fnma_optab)
>  (cond_fnms_optab): New optabs.
>  * internal-fn.def (COND_FMA, COND_FMS, COND_FNMA, COND_FNMS): New
>  internal functions.
>  (FMA): Use DEF_INTERNAL_FLT_FN rather than
DEF_INTERNAL_FLT_FLOATN_FN.
>  * internal-fn.h (get_conditional_internal_fn): Declare.
>  (get_unconditional_internal_fn): Likewise.
>  * internal-fn.c (cond_ternary_direct): New macro.
>  (expand_cond_ternary_optab_fn): Likewise.
>  (direct_cond_ternary_optab_supported_p): Likewise.
>  (FOR_EACH_COND_FN_PAIR): Likewise.
>  (get_conditional_internal_fn): New function.
>  (get_unconditional_internal_fn): Likewise.
>  * gimple-match.h (gimple_match_op::MAX_NUM_OPS): Bump to 5.
>  (gimple_match_op::gimple_match_op): Add a new overload for 5
>  operands.
>  (gimple_match_op::set_op): Likewise.
>  (gimple_resimplify5): Declare.
>  * genmatch.c (decision_tree::gen): Generate simplifications for
>  5 operands.
>  * gimple-match-head.c (gimple_simplify): Define an overload for
>  5 operands.  Handle calls with 5 arguments in the top-level
overload.
>  (convert_conditional_op): Handle conversions from unconditional
>  internal functions to conditional ones.
>  (gimple_resimplify5): New function.
>  (build_call_internal): Pass a fifth operand.
>  (maybe_push_res_to_seq): Likewise.
>  (try_conditional_simplification): Try converting conditional
>  internal functions to unconditional internal functions.
>  Handle 3-operand unconditional forms.
>  * match.pd (UNCOND_TERNARY, COND_TERNARY): Operator lists.
>  Define ternary equivalents of the current rules for binary
conditional
>  internal functions.
>  * config/aarch64/aarch64.c (aarch64_preferred_else_value): Handle
>  ternary operations.
>  * config/aarch64/aarch64-sve.md (cond_)
>  (*cond_, *cond__acc): New
>  SVE_COND_FP_TERNARY patterns.
>  * config/aarch64/iterators.md (UNSPEC_COND_FMLA, UNSPEC_COND_FMLS)
>  (UNSPEC_COND_FNMLA, UNSPEC_COND_FNMLS): New unspecs.
>  (optab): Handle them.
>  (SVE_COND_FP_TERNARY): New int iterator.
>  (sve_fmla_op, sve_fmad_op): New int attributes.

> gcc/testsuite/
>  * gcc.dg/vect/vect-cond-arith-3.c: New test.
>  * gcc.target/aarch64/sve/vcond_13.c: Likewise.
>  * gcc.target/aarch64/sve/vcond_13_run.c: Likewise.
>  * gcc.target/aarch64/sve/vcond_14.c: Likewise.
>  * gcc.target/aarch64/sve/vcond_14_run.c: Likewise.
>  * gcc.target/aarch64/sve/vcond_15.c: Likewise.
>  * gcc.target/aarch64/sve/vcond_15_run.c: Likewise.
>  * gcc.target/aarch64/sve/vcond_16.c: Likewise.
>  * gcc.target/aarch64/sve/vcond_16_run.c: Likewise.

> Index: gcc/doc/md.texi
> ===
> --- gcc/doc/md.texi 2018-05-24 10:12:10.142352315 +0100
> +++ gcc/doc/md.texi 2018-05-24 13:05:46.047607587 +0100
> @@ -6386,6 +6386,23 @@ Operands 0, 2, 3 and 4 all have mode @va
>   integer if @var{m} is scalar, otherwise it has the mode returned by
>   @code{TARGET_VECTORIZE_GET_MASK_MODE}.

> +@cindex @code{cond_fma@var{mode}} instruction pattern
> +@cindex @code{cond_fms@var{mode}} instruction pattern
> +@cindex @code{cond_fnma@var{mode}} instruction pattern
> +@cindex @code{cond_fnms@var{mode}} instruction pattern
> +@item @samp{cond_fma@var{mode}}
> +@itemx @samp{cond_fms@var{mode}}
> +@itemx @samp{cond_fnma@var{mode}}
> +@itemx @samp{cond_fnms@var{mode}}
> +Like @samp{cond_add@var{m}}, except that the conditional operation
> +takes 3 operands rather than two.  For example, the vector form of
> +@samp{cond_fma@var{mode}} is equivalent to:
> +
> +@smallexample
> +for (i = 0; i < GET_MODE_NUNITS (@var{m}); i++)
> +  op0[i] = op1[i] ? fma (op2[i], op3[i], op4[i]) : op5[i];
> +@end smallexample
> +
>   @cindex @code{neg@var{mode}cc} instruction pattern
>   @item @samp{neg@var{mode}cc}
>   Similar to @samp{mov@var{mode}cc} but for conditional negation.
Conditionally
> Index: gcc/optabs.def
> ===
> --- gcc/optabs.def  2018-05-24 10:12:10.146352152 +0100
> +++ gcc/optabs.def  2018-05-24 13:05:46.049605128

[ARM/FDPIC 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture

[Christophe Lyon]

The FDPIC register is hard-coded to r9, as defined in the ABI.

We have to disable tailcall optimizations if we don't know if the
target function is in the same module. If not, we have to set r9 to
the value associated with the target module.

When generating a symbol address, we have to take into account whether
it is a pointer to data or to a function, because different
relocations are needed.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

* config/arm/arm-c.c (__FDPIC__): Define new pre-processor macro
in FDPIC mode.
* config/arm/arm-protos.h (arm_load_function_descriptor): Declare
new function.
* config/arm/arm.c (arm_option_override): Define pic register to
r9.
(arm_function_ok_for_sibcall) Disable sibcall optimization if we
have no decl or go through PLT.
(arm_load_pic_register): Handle TARGET_FDPIC.
(arm_is_segment_info_known): New function.
(arm_pic_static_addr): Add support for FDPIC.
(arm_load_function_descriptor): New function.
(arm_assemble_integer): Add support for FDPIC.
* config/arm/arm.h (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED): Define.
* config/arm/arm.md (call): Add support for FDPIC.
(call_value): Likewise.
(*restore_pic_register_after_call): New pattern.
(untyped_call): Disable if FDPIC.
(untyped_return): Likewise.
* config/arm/unspecs.md (UNSPEC_PIC_RESTORE): New.

Change-Id: Icee8484772f97ac6f3a9574df4aa4f25a8196786

diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 4471f79..90733cc 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -202,6 +202,8 @@ arm_cpu_builtins (struct cpp_reader* pfile)
   builtin_define ("__ARM_EABI__");
 }
 
+  def_or_undef_macro (pfile, "__FDPIC__", TARGET_FDPIC);
+
   def_or_undef_macro (pfile, "__ARM_ARCH_EXT_IDIV__", TARGET_IDIV);
   def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV);
 
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 8537262..edebeb7 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -134,6 +134,7 @@ extern int arm_max_const_double_inline_cost (void);
 extern int arm_const_double_inline_cost (rtx);
 extern bool arm_const_double_by_parts (rtx);
 extern bool arm_const_double_by_immediates (rtx);
+extern rtx arm_load_function_descriptor (rtx funcdesc);
 extern void arm_emit_call_insn (rtx, rtx, bool);
 bool detect_cmse_nonsecure_call (tree);
 extern const char *output_call (rtx *);
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 4a5da7e..56670e3 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3475,6 +3475,12 @@ arm_option_override (void)
   if (flag_pic && TARGET_VXWORKS_RTP)
 arm_pic_register = 9;
 
+  /* If in FDPIC mode then force arm_pic_register to be r9.  */
+  if (TARGET_FDPIC)
+{
+  arm_pic_register = 9;
+}
+
   if (arm_pic_register_string != NULL)
 {
   int pic_register = decode_reg_name (arm_pic_register_string);
@@ -7256,6 +7262,21 @@ arm_function_ok_for_sibcall (tree decl, tree exp)
   if (cfun->machine->sibcall_blocked)
 return false;
 
+  if (TARGET_FDPIC)
+{
+  /* In FDPIC, never tailcall something for which we have no decl:
+the target function could be in a different module, requiring
+a different r9 value.  */
+  if (decl == NULL)
+   return false;
+
+  /* Don't tailcall if we go through the PLT since r9 is then
+corrupted and we don't restore it for static function
+call.  */
+  if (!targetm.binds_local_p (decl))
+   return false;
+}
+
   /* Never tailcall something if we are generating code for Thumb-1.  */
   if (TARGET_THUMB1)
 return false;
@@ -7634,7 +7655,9 @@ arm_load_pic_register (unsigned long saved_regs 
ATTRIBUTE_UNUSED)
 {
   rtx l1, labelno, pic_tmp, pic_rtx, pic_reg;
 
-  if (crtl->uses_pic_offset_table == 0 || TARGET_SINGLE_PIC_BASE)
+  if (crtl->uses_pic_offset_table == 0
+  || TARGET_SINGLE_PIC_BASE
+  || TARGET_FDPIC)
 return;
 
   gcc_assert (flag_pic);
@@ -7702,28 +7725,167 @@ arm_load_pic_register (unsigned long saved_regs 
ATTRIBUTE_UNUSED)
   emit_use (pic_reg);
 }
 
+/* Try to know if the object will go in text or data segment.  */
+static bool
+arm_is_segment_info_known (rtx orig, bool *is_readonly)
+{
+  bool res = false;
+
+  *is_readonly = false;
+
+  if (GET_CODE (orig) == LABEL_REF)
+{
+  res = true;
+  *is_readonly = true;
+}
+  else if (GET_CODE (orig) == SYMBOL_REF)
+{
+  if (CONSTANT_POOL_ADDRESS_P (orig))
+   {
+ res = true;
+ *is_readonly = true;
+   }
+  else if (SYMBOL_REF_LOCAL_P (orig)
+  && !SYMBOL_REF_EXTERNAL_P (orig)
+  && SYMBOL_REF_DECL (orig)
+  && (!DECL_P (SYMBOL_REF_DECL (orig))
+  || !DECL_COMMON (SYMBOL_REF_DECL (orig
+   {
+ tree decl = SYMBOL_REF_

[ARM/FDPIC 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts

[Christophe Lyon]

The new arm-uclinuxfdpiceabi target behaves pretty much like
arm-linux-gnueabi. In order the enable the same set of features, we
have to update several configure scripts that generally match targets
like *-*-linux*: in most places, we add *-uclinux* where there is
already *-linux*, or uclinux* when there is already linux*.

In gcc/config.gcc and libgcc/config.host we use *-*-uclinuxfdpiceabi
because there is already a different behaviour for *-*uclinux* target.

In libtool.m4, we use uclinuxfdpiceabi in cases where ELF shared
libraries support is required, as uclinux does not guarantee that.

2018-XX-XX  Christophe Lyon  

* config/futex.m4: Handle *-uclinux*.
* config/tls.m4 (GCC_CHECK_TLS): Likewise.
* gcc/config.gcc: Handle *-*-uclinuxfdpiceabi.
* libatomic/configure.tgt: Handle arm*-*-uclinux*.
* libgcc/config.host: Handle *-*-uclinuxfdpiceabi.
* libitm/configure.tgt: Handle *-*-uclinux*.
* libatomic/configure: Regenerate.
* libitm/configure: Regenerate.
* libstdc++-v3/acinclude.m4: Handle uclinux*.
* libstdc++-v3/configure: Regenerate.
* libstdc++-v3/configure.host: Handle uclinux*
* libtool.m4: Handle uclinux*.

Change-Id: I6a1fdcd9847d8a82179a214612a3474c1f492916

diff --git a/config/futex.m4 b/config/futex.m4
index e95144d..4dffe15 100644
--- a/config/futex.m4
+++ b/config/futex.m4
@@ -9,7 +9,7 @@ AC_DEFUN([GCC_LINUX_FUTEX],[dnl
 GCC_ENABLE(linux-futex,default, ,[use the Linux futex system call],
   permit yes|no|default)
 case "$target" in
-  *-linux*)
+  *-linux* | *-uclinux*)
 case "$enable_linux_futex" in
   default)
# If headers don't have gettid/futex syscalls definition, then
diff --git a/config/tls.m4 b/config/tls.m4
index 4e170c8..5a8676e 100644
--- a/config/tls.m4
+++ b/config/tls.m4
@@ -76,7 +76,7 @@ AC_DEFUN([GCC_CHECK_TLS], [
  dnl Shared library options may depend on the host; this check
  dnl is only known to be needed for GNU/Linux.
  case $host in
-   *-*-linux*)
+   *-*-linux* | -*-uclinux*)
  LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
  ;;
  esac
diff --git a/gcc/config.gcc b/gcc/config.gcc
index d73e2cb..f3fdbf8 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -749,7 +749,7 @@ case ${target} in
 *-*-fuchsia*)
   native_system_header_dir=/include
   ;;
-*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | 
*-*-kopensolaris*-gnu)
+*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | 
*-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi)
   extra_options="$extra_options gnu-user.opt"
   gas=yes
   gnu_ld=yes
@@ -758,7 +758,7 @@ case ${target} in
   esac
   tmake_file="t-slibgcc"
   case $target in
-*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-kopensolaris*-gnu)
+*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-kopensolaris*-gnu  | 
*-*-uclinuxfdpiceabi)
   :;;
 *-*-gnu*)
   native_system_header_dir=/include
@@ -778,7 +778,7 @@ case ${target} in
 *-*-*android*)
   tm_defines="$tm_defines DEFAULT_LIBC=LIBC_BIONIC"
   ;;
-*-*-*uclibc*)
+*-*-*uclibc* | *-*-uclinuxfdpiceabi)
   tm_defines="$tm_defines DEFAULT_LIBC=LIBC_UCLIBC"
   ;;
 *-*-*musl*)
@@ -1130,7 +1130,7 @@ arm*-*-netbsdelf*)
tmake_file="${tmake_file} arm/t-arm"
target_cpu_cname="arm6"
;;
-arm*-*-linux-*)# ARM GNU/Linux with ELF
+arm*-*-linux-* | arm*-*-uclinuxfdpiceabi)  # ARM GNU/Linux 
with ELF
tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h 
glibc-stdint.h arm/elf.h arm/linux-gas.h arm/linux-elf.h"
extra_options="${extra_options} linux-android.opt"
case $target in
diff --git a/libatomic/configure b/libatomic/configure
index b902e2c..5b3ef8e 100755
--- a/libatomic/configure
+++ b/libatomic/configure
@@ -5819,7 +5819,7 @@ irix5* | irix6* | nonstopux*)
   ;;
 
 # This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
   lt_cv_deplibs_check_method=pass_all
   ;;
 
@@ -8305,7 +8305,7 @@ $as_echo_n "checking for $compiler option to produce 
PIC... " >&6; }
   lt_prog_compiler_static='-non_shared'
   ;;
 
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
   case $cc_basename in
   # old Intel for x86_64 which still supported -KPIC.
   ecc*)
@@ -8900,7 +8900,7 @@ _LT_EOF
   archive_expsym_cmds='sed "s,^,_," $export_symbols 
>$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs 
$compiler_flags ${wl}-h,$soname 
${wl}--retain-symbols-file,$output_objdir/$soname.expsym 
${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib'
   ;;
 
-gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu)
+gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
   

[ARM/FDPIC 07/21] [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is RO

[Christophe Lyon]

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/
* config/arm/arm.c (arm_compute_save_reg0_reg12_mask): Handle
FDPIC.
(thumb1_compute_save_core_reg_mask): Likewise.

Change-Id: Ib534cf91704cdc740867b46a8fe45fda27894562

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 56670e3..bbf8884 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -19489,7 +19489,7 @@ arm_compute_save_reg0_reg12_mask (void)
 
   /* Also save the pic base register if necessary.  */
   if (flag_pic
- && !TARGET_SINGLE_PIC_BASE
+ && !TARGET_SINGLE_PIC_BASE && !TARGET_FDPIC
  && arm_pic_register != INVALID_REGNUM
  && crtl->uses_pic_offset_table)
save_reg_mask |= 1 << PIC_OFFSET_TABLE_REGNUM;
@@ -19523,7 +19523,7 @@ arm_compute_save_reg0_reg12_mask (void)
   /* If we aren't loading the PIC register,
 don't stack it even though it may be live.  */
   if (flag_pic
- && !TARGET_SINGLE_PIC_BASE
+ && !TARGET_SINGLE_PIC_BASE && !TARGET_FDPIC
  && arm_pic_register != INVALID_REGNUM
  && (df_regs_ever_live_p (PIC_OFFSET_TABLE_REGNUM)
  || crtl->uses_pic_offset_table))
@@ -19692,7 +19692,7 @@ thumb1_compute_save_core_reg_mask (void)
 mask |= 1 << HARD_FRAME_POINTER_REGNUM;
 
   if (flag_pic
-  && !TARGET_SINGLE_PIC_BASE
+  && !TARGET_SINGLE_PIC_BASE && !TARGET_FDPIC
   && arm_pic_register != INVALID_REGNUM
   && crtl->uses_pic_offset_table)
 mask |= 1 << PIC_OFFSET_TABLE_REGNUM;
-- 
2.6.3

[ARM/FDPIC 12/21] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp

[Christophe Lyon]

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/
* config/arm/arm.c (arm_load_tp): Add FDPIC support.
* config/arm/arm.md (load_tp_soft_fdpic): New pattern.
(load_tp_soft): Disable in FDPIC mode.

Change-Id: I0a2e3466c9afb869ad8e844083ad178de014658e

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 20b8f66..80fe96f 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -8660,7 +8660,27 @@ arm_load_tp (rtx target)
 
   rtx tmp;
 
-  emit_insn (gen_load_tp_soft ());
+  if (TARGET_FDPIC)
+   {
+ rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3));
+
+ emit_insn (gen_load_tp_soft_fdpic ());
+
+ /* Restore r9.  */
+ XVECEXP (par, 0, 0)
+   = gen_rtx_UNSPEC (VOIDmode,
+ gen_rtvec (2, gen_rtx_REG (Pmode, 9),
+get_hard_reg_initial_val (Pmode, 9)),
+ UNSPEC_PIC_RESTORE);
+ XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, gen_rtx_REG (Pmode, 9));
+ XVECEXP (par, 0, 2)
+   = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 9));
+ emit_insn (par);
+   }
+  else
+   {
+ emit_insn (gen_load_tp_soft ());
+   }
 
   tmp = gen_rtx_REG (SImode, R0_REGNUM);
   emit_move_insn (target, tmp);
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 78c236c..0bd0a6b 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -11482,12 +11482,24 @@
 )
 
 ;; Doesn't clobber R1-R3.  Must use r0 for the first operand.
+(define_insn "load_tp_soft_fdpic"
+  [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS))
+   (clobber (reg:SI 9))
+   (clobber (reg:SI LR_REGNUM))
+   (clobber (reg:SI IP_REGNUM))
+   (clobber (reg:CC CC_REGNUM))]
+  "TARGET_SOFT_TP && TARGET_FDPIC"
+  "bl\\t__aeabi_read_tp\\t@ load_tp_soft"
+  [(set_attr "conds" "clob")]
+)
+
+;; Doesn't clobber R1-R3.  Must use r0 for the first operand.
 (define_insn "load_tp_soft"
   [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS))
(clobber (reg:SI LR_REGNUM))
(clobber (reg:SI IP_REGNUM))
(clobber (reg:CC CC_REGNUM))]
-  "TARGET_SOFT_TP"
+  "TARGET_SOFT_TP && !TARGET_FDPIC"
   "bl\\t__aeabi_read_tp\\t@ load_tp_soft"
   [(set_attr "conds" "clob")
(set_attr "type" "branch")]
-- 
2.6.3

[ARM/FDPIC 11/21] [ARM] FDPIC: Add support to unwind FDPIC signal frame

[Christophe Lyon]

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

libgcc/
* unwind-arm-common.inc (ARM_SET_R7_RT_SIGRETURN)
(THUMB2_SET_R7_RT_SIGRETURN, FDPIC_LDR_R12_WITH_FUNCDESC)
(FDPIC_LDR_R9_WITH_GOT, FDPIC_LDR_PC_WITH_RESTORER)
(FDPIC_FUNCDESC_OFFSET, ARM_NEW_RT_SIGFRAME_UCONTEXT)
(ARM_UCONTEXT_SIGCONTEXT, ARM_SIGCONTEXT_R0): New.
(__gnu_personality_sigframe_fdpic): New.
(get_eit_entry): Add FDPIC signal frame support.

Change-Id: I7f9527cc50665dd1a731b7badf71c319fb38bf57

diff --git a/libgcc/unwind-arm-common.inc b/libgcc/unwind-arm-common.inc
index f5415c1..80d1e88 100644
--- a/libgcc/unwind-arm-common.inc
+++ b/libgcc/unwind-arm-common.inc
@@ -30,6 +30,21 @@
 #include 
 #endif
 
+#if __FDPIC__
+/* Load r7 with rt_sigreturn value.  */
+#define ARM_SET_R7_RT_SIGRETURN0xe3a070ad
+#define THUMB2_SET_R7_RT_SIGRETURN 0x07adf04f
+/* FDPIC jump to restorer sequence.  */
+#define FDPIC_LDR_R12_WITH_FUNCDESC0xe59fc004
+#define FDPIC_LDR_R9_WITH_GOT  0xe59c9004
+#define FDPIC_LDR_PC_WITH_RESTORER 0xe59cf000
+#define FDPIC_FUNCDESC_OFFSET  12
+/* Signal frame offsets.  */
+#define ARM_NEW_RT_SIGFRAME_UCONTEXT   0x80
+#define ARM_UCONTEXT_SIGCONTEXT0x14
+#define ARM_SIGCONTEXT_R0  0xc
+#endif
+
 /* We add a prototype for abort here to avoid creating a dependency on
target headers.  */
 extern void abort (void);
@@ -195,6 +210,46 @@ search_EIT_table (const __EIT_entry * table, int nrec, _uw 
return_address)
 }
 }
 
+#if __FDPIC__
+/* FIXME: partial support (VFP not restored) but should be sufficient
+   to allow unwinding.  */
+static _Unwind_Reason_Code
+__gnu_personality_sigframe_fdpic (_Unwind_State state,
+   _Unwind_Control_Block *ucbp,
+   _Unwind_Context *context)
+{
+unsigned int sp;
+unsigned int pc;
+unsigned int funcdesc;
+unsigned int handler;
+unsigned int first_handler_instruction;
+int i;
+
+_Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &sp);
+_Unwind_VRS_Get (context, _UVRSC_CORE, R_PC, _UVRSD_UINT32, &pc);
+
+funcdesc = *(unsigned int *)(pc + FDPIC_FUNCDESC_OFFSET);
+handler = *(unsigned int *)(funcdesc);
+first_handler_instruction = *(unsigned int *)(handler & ~1);
+
+/* Adjust SP to point to the start of registers according to
+   signal type.  */
+if (first_handler_instruction == ARM_SET_R7_RT_SIGRETURN
+   || first_handler_instruction == THUMB2_SET_R7_RT_SIGRETURN)
+   sp += ARM_NEW_RT_SIGFRAME_UCONTEXT
+ + ARM_UCONTEXT_SIGCONTEXT
+ + ARM_SIGCONTEXT_R0;
+else
+   sp += ARM_UCONTEXT_SIGCONTEXT
+ + ARM_SIGCONTEXT_R0;
+/* Restore regs saved on stack by the kernel.  */
+for (i = 0; i < 16; i++)
+   _Unwind_VRS_Set (context, _UVRSC_CORE, i, _UVRSD_UINT32, sp + 4 * i);
+
+return _URC_CONTINUE_UNWIND;
+}
+#endif
+
 /* Find the exception index table eintry for the given address.
Fill in the relevant fields of the UCB.
Returns _URC_FAILURE if an error occurred, _URC_OK on success.  */
@@ -218,6 +273,24 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw 
return_address)
&nrec);
   if (!eitp)
{
+#if __FDPIC__
+ /* If we are unwinding a signal handler then perhaps we have
+reached a trampoline.  Try to detect jump to restorer
+sequence.  */
+ _uw *pc = (_uw *)((return_address+2) & ~3);
+ if (pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC
+ && pc[1] == FDPIC_LDR_R9_WITH_GOT
+ && pc[2] == FDPIC_LDR_PC_WITH_RESTORER)
+   {
+ struct funcdesc_t *funcdesc = (struct funcdesc_t *)
+   &__gnu_personality_sigframe_fdpic;
+
+ UCB_PR_ADDR (ucbp) = funcdesc->ptr;
+ UCB_PR_GOT (ucbp) = funcdesc->got;
+
+ return _URC_OK;
+   }
+#endif
  UCB_PR_ADDR (ucbp) = 0;
  return _URC_FAILURE;
}
@@ -232,6 +305,24 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw 
return_address)
 
   if (!eitp)
 {
+#if __FDPIC__
+  /* If we are unwinding a signal handler then perhaps we have
+reached a trampoline.  Try to detect jump to restorer
+sequence.  */
+  _uw *pc = (_uw *)((return_address+2) & ~3);
+  if (pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC
+ && pc[1] == FDPIC_LDR_R9_WITH_GOT
+ && pc[2] == FDPIC_LDR_PC_WITH_RESTORER)
+   {
+ struct funcdesc_t *funcdesc = (struct funcdesc_t *)
+   &__gnu_personality_sigframe_fdpic;
+
+ UCB_PR_ADDR (ucbp) = funcdesc->ptr;
+ UCB_PR_GOT (ucbp) = funcdesc->got;
+
+ return _URC_OK;
+   }
+#endif
   UCB_PR_ADDR (ucbp) = 0;
   return _URC_FAILURE;
 }
@@ -240,6 +331,24 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw 
return_address)
   /* Can this frame be unwound at all?

[ARM/FDPIC 00/21] FDPIC ARM for ARM

[Christophe Lyon]

Hello,

This patch series implements the GCC contribution of the FDPIC ABI for
ARM targets.

This ABI enables to run Linux on ARM MMU-less cores and supports
shared libraries to reduce the memory footprint.

Without MMU, text and data segments relative distances are different
from one process to another, hence the need for a dedicated FDPIC
register holding the start address of the data segment. One of the
side effects is that function pointers require two words to be
represented: the address of the code, and the data segment start
address. These two words are designated as "Function Descriptor",
hence the "FD PIC" name.

On ARM, the FDPIC register is r9 [1], and the target name is
arm-uclinuxfdpiceabi. Note that arm-uclinux exists, but uses another
ABI and the BFLAT file format; it does not support code sharing.
The -mfdpic option is enabled by default, and -mno-fdpic should be
used to build the Linux kernel.

This work was developed some time ago by STMicroelectronics, and was
presented during Linaro Connect SFO15 (September 2015). You can watch
the discussion and read the slides [2].
This presentation was related to the toolchain published on github [3],
which is based on binutils-2.22, gcc-4.7, uclibc-0.9.33.2, gdb-7.5.1
and qemu-2.3.0, and for which pre-built binaries are available [3].

The ABI itself is described in details in [1].

Our Linux kernel patches have been updated and committed by Nicolas
Pitre (Linaro) in July 2017. They are required so that the loader is
able to handle this new file type. Indeed, the ELF files are tagged
with ELFOSABI_ARM_FDPIC. This new tag has been allocated by ARM, as
well as the new relocations involved.

The binutils and QEMU patch series have been merged recently. [4][5]

To build such a toolchain, you'd also need to use my uClibc branch[6].

I am currently working on updating the patches for the remaining
toolchain components: uclibc and gdb.

This series provides support for ARM v7 architecture and has been
tested on arm-linux-gnueabi without regression, as well as
arm-uclinuxfdpiceabi, using QEMU. arm-uclinuxfdpiceabi has more
failures than arm-linux-gnueabi, but is quite functional.

GCC test results:
  arm-linux-gnueabi   arm-uclinuxfdpiceabi
GCC PASS  111743105869
GCC FAIL  1932
GCC XFAIL298   296
GCC UNRES  911 
GCC UNSUPP  5843  5506
G++ PASS  115776109442
G++ FAIL  1414
G++ XFAIL484   484
G++ UNRES  1 1
G++ UNSUPP  5289  4954
LIBSTDC++ PASS 11378 11158
LIBSTDC++ FAIL10 8
LIBSTDC++ XPASS0 5
LIBSTDC++ XFAIL   7181
LIBSTDC++ UNRES2 2
LIBSTDC++ UNSUPP 601   667

Are the GCC patches OK for inclusion in master?

Thanks,

Christophe.


[1] https://github.com/mickael-guene/fdpic_doc/blob/master/abi.txt
[2] 
http://connect.linaro.org/resource/sfo15/sfo15-406-arm-fdpic-toolset-kernel-libraries-for-cortex-m-cortex-r-mmuless-cores/
[3] https://github.com/mickael-guene/fdpic_manifest
[4] 
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=f1ac0afe481e83c9a33f247b81fa7de789edc4d9
[5] 
https://git.qemu.org/?p=qemu.git;a=commit;h=e8fa72957419c11984608062c7dcb204a6003a06
[6] 
https://git.linaro.org/people/christophe.lyon/uclibc.git/log/?h=uClibc-0.9.33.2-fdpic-upstream

Christophe Lyon (21):
  [ARM] FDPIC: Add -mfdpic option support
  [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
  [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
  [ARM] FDPIC: Add support for FDPIC for arm architecture
  [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
  [ARM] FDPIC: Add support for c++ exceptions
  [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is RO
  [ARM] FDPIC: Fix corner case of weak symbol
  [ARM] FDPIC: Add support for taking address of nested function
  [ARM] FDPIC: Implement legitimize_tls_address_fdpic
  [ARM] FDPIC: Add support to unwind FDPIC signal frame
  [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
  [ARM] FDPIC: Support unwinding across thumb2 signal trampoline
  [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
  [ARM][testsuite] FDPIC: Skip unsupported tests
  [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.
  [ARM][testsuite] FDPIC: Skip v8-m and v6-m tests that currently
produce an ICE
  [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode
  [ARM][testsuite] FDPIC: Handle *-*-uclinux*
  [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets
  [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.

 config/futex.m4|   2 +-
 config/tls.m4  |   2 +-
 gcc/config.gcc |  13 +-
 gcc/config/arm/arm-c.c 

[ARM/FDPIC 06/21] [ARM] FDPIC: Add support for c++ exceptions

[Christophe Lyon]

When restoring a function address, we also have to restore the FDPIC
register value (r9).

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/
* ginclude/unwind-arm-common.h (unwinder_cache): Add reserved5
field.

libgcc/
* config/arm/linux-atomic.c (__ARM_ARCH__): Define.
(__kernel_cmpxchg): Add FDPIC support.
(__kernel_dmb): Likewise.
(__fdpic_cmpxchg): New function.
(__fdpic_dmb): New function.
* config/arm/unwind-arm.h (gnu_Unwind_Find_got): New function.
(_Unwind_decode_typeinfo_ptr): Add FDPIC support.
* unwindo-arm-common.inc (UCB_PR_GOT): New.
(funcdesc_t): New struct.
(get_eit_entry): Add FDPIC support.
(unwind_phase2): Likewise.
(unwind_phase2_forced): Likewise.
(__gnu_Unwind_RaiseException): Likewise.
(__gnu_Unwind_Resume): Likewise.
(__gnu_Unwind_Backtrace): Likewise.
* unwind-pe.h (read_encoded_value_with_base): Likewise.

libstdc++/
* libsupc++/eh_personality.cc (get_ttype_entry): Add FDPIC
support.

Change-Id: Ic0841eb3d7bfb0b3f6d187cd52a660b8fd394d85

diff --git a/gcc/ginclude/unwind-arm-common.h b/gcc/ginclude/unwind-arm-common.h
index 8a1a919..150bd0f 100644
--- a/gcc/ginclude/unwind-arm-common.h
+++ b/gcc/ginclude/unwind-arm-common.h
@@ -91,7 +91,7 @@ extern "C" {
  _uw reserved2;  /* Personality routine address */
  _uw reserved3;  /* Saved callsite address */
  _uw reserved4;  /* Forced unwind stop arg */
- _uw reserved5;
+ _uw reserved5;  /* Personality routine GOT value in FDPIC mode.  */
}
   unwinder_cache;
   /* Propagation barrier cache (valid after phase 1): */
diff --git a/libgcc/config/arm/linux-atomic.c b/libgcc/config/arm/linux-atomic.c
index d334c58..a20ad94 100644
--- a/libgcc/config/arm/linux-atomic.c
+++ b/libgcc/config/arm/linux-atomic.c
@@ -23,13 +23,99 @@ a copy of the GCC Runtime Library Exception along with this 
program;
 see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
 .  */
 
+#if defined(__ARM_ARCH_2__)
+# define __ARM_ARCH__ 2
+#endif
+
+#if defined(__ARM_ARCH_3__)
+# define __ARM_ARCH__ 3
+#endif
+
+#if defined(__ARM_ARCH_3M__) || defined(__ARM_ARCH_4__) \
+  || defined(__ARM_ARCH_4T__)
+/* We use __ARM_ARCH__ set to 4 here, but in reality it's any processor with
+   long multiply instructions.  That includes v3M.  */
+# define __ARM_ARCH__ 4
+#endif
+
+#if defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) \
+  || defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) \
+  || defined(__ARM_ARCH_5TEJ__)
+# define __ARM_ARCH__ 5
+#endif
+
+#if defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \
+  || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) \
+  || defined(__ARM_ARCH_6ZK__) || defined(__ARM_ARCH_6T2__) \
+  || defined(__ARM_ARCH_6M__)
+# define __ARM_ARCH__ 6
+#endif
+
+#if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \
+  || defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) \
+  || defined(__ARM_ARCH_7EM__)
+# define __ARM_ARCH__ 7
+#endif
+
+#ifndef __ARM_ARCH__
+#error Unable to determine architecture.
+#endif
+
 /* Kernel helper for compare-and-exchange.  */
 typedef int (__kernel_cmpxchg_t) (int oldval, int newval, int *ptr);
+#if __FDPIC__
+#define __kernel_cmpxchg __fdpic_cmpxchg
+#else
 #define __kernel_cmpxchg (*(__kernel_cmpxchg_t *) 0x0fc0)
+#endif
 
 /* Kernel helper for memory barrier.  */
 typedef void (__kernel_dmb_t) (void);
+#if __FDPIC__
+#define __kernel_dmb __fdpic_dmb
+#else
 #define __kernel_dmb (*(__kernel_dmb_t *) 0x0fa0)
+#endif
+
+#if __FDPIC__
+static int __fdpic_cmpxchg (int oldval, int newval, int *ptr)
+{
+#if __ARM_ARCH__ < 6
+  #error architecture support not yet implemented
+  /* Use swap instruction (but is it always safe ? (interrupt?))  */
+#else
+  int result;
+
+  asm volatile ("1: ldrex r3, [%[ptr]]\n\t"
+   "subs  r3, r3, %[oldval]\n\t"
+   "itt eq\n\t"
+   "strexeq r3, %[newval], [%[ptr]]\n\t"
+   "teqeq r3, #1\n\t"
+   "it eq\n\t"
+   "beq 1b\n\t"
+   "rsbs  %[result], r3, #0\n\t"
+   : [result] "=r" (result)
+   : [oldval] "r" (oldval) , [newval] "r" (newval), [ptr] "r" (ptr)
+   : "r3");
+return result;
+#endif
+}
+
+static void __fdpic_dmb ()
+{
+#if __ARM_ARCH__ < 6
+  /* No op? Perhaps flush write buffer ?  */
+  return ;
+#else
+ #if __ARM_ARCH__ >= 7
+  asm volatile ("dmb\n\t");
+ #elif __ARM_ARCH__ == 6
+  asm volatile ("mcr p15, 0, r0, c7, c10, 5\n\t");
+ #endif
+#endif
+}
+
+#endif
 
 /* Note: we implement byte, short and int versions of atomic operations using
the above kernel helpers; see linux-atomic-64bit.c for "long long" (64-bit)
diff --git a/libgcc/config/arm/unwind-arm.h b/libgcc/config/arm/unwind-arm.h
index 9f7d3f2..a9598eb 100644
--- a/libgcc/config

[ARM/FDPIC 01/21] [ARM] FDPIC: Add -mfdpic option support

[Christophe Lyon]

2018-XX-XX  Christophe Lyon  
Mickaël Guêné  

gcc/
* config/arm/arm.opt: Add -mfdpic option.

Change-Id: Ie5c4ed7434488933de6133186da09cd3ea1291a7

diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt
index a1286a4..231c1cb 100644
--- a/gcc/config/arm/arm.opt
+++ b/gcc/config/arm/arm.opt
@@ -302,3 +302,7 @@ When linking for big-endian targets, generate a legacy BE32 
format image.
 mbranch-cost=
 Target RejectNegative Joined UInteger Var(arm_branch_cost) Init(-1)
 Cost to assume for a branch insn.
+
+mfdpic
+Target Report Mask(FDPIC)
+Enable Function Descriptor PIC mode.
-- 
2.6.3

[ARM/FDPIC 08/21] [ARM] FDPIC: Fix corner case of weak symbol

[Christophe Lyon]

When checking the address of a weak symbol in an executable, it is
mandatory to use the GOTFUNCDESC scheme so that the address==NULL
semantic is valid if the symbol is not present in the final link.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/
* config/arm/arm.c (arm_local_funcdesc_p): New function.
(legitimize_pic_address): Handle weak symbols in FDPIC mode.
(arm_assemble_integer): Likewise.

Change-Id: I3fa0b63bc0f672903f405aa72cc46052de1c0feb

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index bbf8884..025485d 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3771,6 +3771,46 @@ arm_options_perform_arch_sanity_checks (void)
 }
 }
 
+/* Test whether a local function descriptor is canonical, i.e.,
+   whether we can use GOTOFFFUNCDESC to compute the address of the
+   function.  */
+static bool
+arm_local_funcdesc_p (rtx fnx)
+{
+  tree fn;
+  enum symbol_visibility vis;
+  bool ret;
+
+  if (!TARGET_FDPIC)
+return TRUE;
+
+  if (! SYMBOL_REF_LOCAL_P (fnx))
+return FALSE;
+
+  fn = SYMBOL_REF_DECL (fnx);
+
+  if (! fn)
+return FALSE;
+
+  /* Local function declared as weak must use GOTFUNCDESC so their
+ FUNCDESC is NULL if they are not linked in.  */
+  if (DECL_WEAK(fn))
+return FALSE;
+
+  vis = DECL_VISIBILITY (fn);
+
+  if (vis == VISIBILITY_PROTECTED)
+/* Private function descriptors for protected functions are not
+   canonical.  Temporarily change the visibility to global.  */
+vis = VISIBILITY_DEFAULT;
+
+  ret = default_binds_local_p_1 (fn, flag_pic);
+
+  DECL_VISIBILITY (fn) = vis;
+
+  return ret;
+}
+
 static void
 arm_add_gc_roots (void)
 {
@@ -7488,7 +7528,9 @@ legitimize_pic_address (rtx orig, machine_mode mode, rtx 
reg)
   || (GET_CODE (orig) == SYMBOL_REF
   && SYMBOL_REF_LOCAL_P (orig)
   && (SYMBOL_REF_DECL (orig)
-  ? !DECL_WEAK (SYMBOL_REF_DECL (orig)) : 1)))
+  ? !DECL_WEAK (SYMBOL_REF_DECL (orig)) : 1)
+  && (!SYMBOL_REF_FUNCTION_P(orig)
+  || arm_local_funcdesc_p (orig
  && NEED_GOT_RELOC
  && arm_pic_data_is_text_relative)
insn = arm_pic_static_addr (orig, reg);
@@ -23072,7 +23114,9 @@ arm_assemble_integer (rtx x, unsigned int size, int 
aligned_p)
  || (GET_CODE (x) == SYMBOL_REF
  && (!SYMBOL_REF_LOCAL_P (x)
  || (SYMBOL_REF_DECL (x)
- ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0
+ ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0)
+ || (SYMBOL_REF_FUNCTION_P (x)
+ && !arm_local_funcdesc_p (x)
{
  if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
fputs ("(GOTFUNCDESC)", asm_out_file);
-- 
2.6.3

[ARM/FDPIC 09/21] [ARM] FDPIC: Add support for taking address of nested function

[Christophe Lyon]

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/
* config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC
support.
(arm_trampoline_init): Likewise.
(arm_trampoline_init): Likewise.
* config/arm/arm.h (TRAMPOLINE_SIZE): Likewise.

Change-Id: I4b5127261a9aefa0f0318f110574ec07a856aeb1

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 025485d..2434602 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3967,7 +3967,27 @@ arm_asm_trampoline_template (FILE *f)
 {
   fprintf (f, "\t.syntax unified\n");
 
-  if (TARGET_ARM)
+  if (TARGET_FDPIC)
+{
+  /* The first two words are a function descriptor to jump into
+the trampoline code just below.  */
+  if (TARGET_ARM) fprintf (f, "\t.arm\n");
+  else if (TARGET_THUMB2) fprintf (f, "\t.thumb\n");
+  else fprintf (f, "\t.code\t16\n");
+
+  assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
+  assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
+  /* Trampoline code which sets the static chain register but also
+PIC register before jumping into real code.  */
+  asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
+  STATIC_CHAIN_REGNUM, PC_REGNUM, TARGET_THUMB2?8:4);
+  asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
+  PIC_OFFSET_TABLE_REGNUM, PC_REGNUM, TARGET_THUMB2?8:4);
+  asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
+  PC_REGNUM, PC_REGNUM, TARGET_THUMB2?8:4);
+  assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
+}
+  else if (TARGET_ARM)
 {
   fprintf (f, "\t.arm\n");
   asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM, PC_REGNUM);
@@ -4008,12 +4028,37 @@ arm_trampoline_init (rtx m_tramp, tree fndecl, rtx 
chain_value)
   emit_block_move (m_tramp, assemble_trampoline_template (),
   GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
 
-  mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
-  emit_move_insn (mem, chain_value);
+  if (TARGET_FDPIC)
+{
+  rtx funcdesc = XEXP (DECL_RTL (fndecl), 0);
+  rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
+  rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4));
+  rtx trampolineCodeStart
+   = plus_constant (Pmode, XEXP (m_tramp, 0), TARGET_THUMB2 ? 9 : 8);
+
+  /* Write initial funcdesc which will jump into trampoline.  */
+  mem = adjust_address (m_tramp, SImode, 0);
+  emit_move_insn (mem, trampolineCodeStart);
+  mem = adjust_address (m_tramp, SImode, 4);
+  emit_move_insn (mem, gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM));
+  /* Setup static chain.  */
+  mem = adjust_address (m_tramp, SImode, 20);
+  emit_move_insn (mem, chain_value);
+  /* GOT + real function entry point.  */
+  mem = adjust_address (m_tramp, SImode, 24);
+  emit_move_insn (mem, gotaddr);
+  mem = adjust_address (m_tramp, SImode, 28);
+  emit_move_insn (mem, fnaddr);
+}
+  else
+{
+  mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
+  emit_move_insn (mem, chain_value);
 
-  mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
-  fnaddr = XEXP (DECL_RTL (fndecl), 0);
-  emit_move_insn (mem, fnaddr);
+  mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
+  fnaddr = XEXP (DECL_RTL (fndecl), 0);
+  emit_move_insn (mem, fnaddr);
+}
 
   a_tramp = XEXP (m_tramp, 0);
   emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"),
@@ -4027,7 +4072,9 @@ arm_trampoline_init (rtx m_tramp, tree fndecl, rtx 
chain_value)
 static rtx
 arm_trampoline_adjust_address (rtx addr)
 {
-  if (TARGET_THUMB)
+  /* For FDPIC don't fix trampoline address since it's a function
+ descriptor and not a function address.  */
+  if (TARGET_THUMB && !TARGET_FDPIC)
 addr = expand_simple_binop (Pmode, IOR, addr, const1_rtx,
NULL, 0, OPTAB_LIB_WIDEN);
   return addr;
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index e8ef439..db17ef2 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1578,7 +1578,7 @@ typedef struct
 #define INIT_EXPANDERS  arm_init_expanders ()
 
 /* Length in units of the trampoline for entering a nested function.  */
-#define TRAMPOLINE_SIZE  (TARGET_32BIT ? 16 : 20)
+#define TRAMPOLINE_SIZE  (TARGET_FDPIC ? 32 : (TARGET_32BIT ? 16 : 20))
 
 /* Alignment required for a trampoline in bits.  */
 #define TRAMPOLINE_ALIGNMENT  32
-- 
2.6.3

[ARM/FDPIC 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided

[Christophe Lyon]

In FDPIC mode, we set -fPIE unless the user provides -fno-PIE, -fpie,
-fPIC or -fpic: indeed FDPIC code is PIC, but we want to generate code
for executables rather than shared libraries by default.

We also make sure to use the --fdpic assembler option, and select the
appropriate linker emulation.

At link time, we also default to -pie, unless we are generating a
shared library or a relocatable file (-r). Note that even for static
link, we must specify the dynamic linker because the executable still
has to relocate itself at startup.

We also force 'now' binding since lazy binding is not supported.

We should also apply the same behavior for -Wl,-Ur as for -r, but I
couldn't find how to describe that in the specs fragment.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/
* config.gcc: Handle arm*-*-uclinuxfdpiceabi.
* config/arm/bpabi.h (TARGET_FDPIC_ASM_SPEC): New.
(SUBTARGET_EXTRA_ASM_SPEC): Use TARGET_FDPIC_ASM_SPEC.
* config/arm/linux-eabi.h (FDPIC_CC1_SPEC): New.
(CC1_SPEC): Use FDPIC_CC1_SPEC.
* config/arm/uclinuxfdpiceabi.h: New file.

libsanitizer/
* configure.tgt (arm*-*-uclinuxfdpiceabi): Sanitizers are
unsupported in this configuration.

Change-Id: If369e0a10bb916fd72e38f71498d3c640fa85c4c

diff --git a/gcc/config.gcc b/gcc/config.gcc
index f3fdbf8..01b81c6 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1140,6 +1140,11 @@ arm*-*-linux-* | arm*-*-uclinuxfdpiceabi)
# ARM GNU/Linux with ELF
esac
tmake_file="${tmake_file} arm/t-arm arm/t-arm-elf arm/t-bpabi 
arm/t-linux-eabi"
tm_file="$tm_file arm/bpabi.h arm/linux-eabi.h arm/aout.h 
vxworks-dummy.h arm/arm.h"
+   case $target in
+   arm*-*-uclinuxfdpiceabi)
+   tm_file="$tm_file arm/uclinuxfdpiceabi.h"
+   ;;
+   esac
# Generation of floating-point instructions requires at least ARMv5te.
if [ "$with_float" = "hard" -o "$with_float" = "softfp" ] ; then
target_cpu_cname="arm10e"
diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
index 1e3ecfb..5901154 100644
--- a/gcc/config/arm/bpabi.h
+++ b/gcc/config/arm/bpabi.h
@@ -55,6 +55,8 @@
 #define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*"\
   "|march=armv4|mcpu=fa526|mcpu=fa626:--fix-v4bx}"
 
+#define TARGET_FDPIC_ASM_SPEC  ""
+
 #define BE8_LINK_SPEC  \
   "%{!r:%{!mbe32:%:be8_linkopt(%{mlittle-endian:little}"   \
   "   %{mbig-endian:big}"  \
@@ -64,7 +66,7 @@
 /* Tell the assembler to build BPABI binaries.  */
 #undef  SUBTARGET_EXTRA_ASM_SPEC
 #define SUBTARGET_EXTRA_ASM_SPEC \
-  "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC
+  "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC 
TARGET_FDPIC_ASM_SPEC
 
 #ifndef SUBTARGET_EXTRA_LINK_SPEC
 #define SUBTARGET_EXTRA_LINK_SPEC ""
diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h
index 8585fde..4cee958 100644
--- a/gcc/config/arm/linux-eabi.h
+++ b/gcc/config/arm/linux-eabi.h
@@ -98,11 +98,14 @@
 #undef  ASAN_CC1_SPEC
 #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
 
+#define FDPIC_CC1_SPEC ""
+
 #undef  CC1_SPEC
 #define CC1_SPEC   \
-  LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC, \
+  LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " "  \
+  FDPIC_CC1_SPEC,  \
   GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " "   \
-  ANDROID_CC1_SPEC)
+  ANDROID_CC1_SPEC "" FDPIC_CC1_SPEC)
 
 #define CC1PLUS_SPEC \
   LINUX_OR_ANDROID_CC ("", ANDROID_CC1PLUS_SPEC)
diff --git a/gcc/config/arm/uclinuxfdpiceabi.h 
b/gcc/config/arm/uclinuxfdpiceabi.h
new file mode 100644
index 000..43a17de
--- /dev/null
+++ b/gcc/config/arm/uclinuxfdpiceabi.h
@@ -0,0 +1,53 @@
+/* Configuration file for ARM GNU/Linux FDPIC EABI targets.
+   Copyright (C) 2018 Free Software Foundation, Inc.
+   Contributed by STMicroelectronics.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   .  */
+
+/* On uClibc EABI GNU/Linux, we want to force -mfdpic by default,
+   which also means

[ARM/FDPIC 10/21] [ARM] FDPIC: Implement legitimize_tls_address_fdpic

[Christophe Lyon]

Support additional relocations: TLS_GD32_FDPIC, TLS_LDM32_FDPIC, and
TLS_IE32_FDPIC.

We do not support the GNU2 TLS dialect.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/
* config/arm/arm.c (tls_reloc): Add TLS_GD32_FDPIC,
TLS_LDM32_FDPIC and TLS_IE32_FDPIC.
(arm_call_tls_get_addr_fdpic): New.
(legitimize_tls_address_fdpic): New.
(legitimize_tls_address_not_fdpic): New.
(legitimize_tls_address): Add FDPIC support.
(arm_emit_tls_decoration): Likewise.

Change-Id: I4ea5034ff654540c4658d0a79fb92f70550cdf4a

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 2434602..20b8f66 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2373,9 +2373,12 @@ char arm_arch_name[] = "__ARM_ARCH_PROFILE__";
 
 enum tls_reloc {
   TLS_GD32,
+  TLS_GD32_FDPIC,
   TLS_LDM32,
+  TLS_LDM32_FDPIC,
   TLS_LDO32,
   TLS_IE32,
+  TLS_IE32_FDPIC,
   TLS_LE32,
   TLS_DESCSEQ  /* GNU scheme */
 };
@@ -8681,6 +8684,30 @@ load_tls_operand (rtx x, rtx reg)
 }
 
 static rtx_insn *
+arm_call_tls_get_addr_fdpic (rtx x, rtx reg, rtx *valuep, int reloc)
+{
+  rtx sum;
+
+  gcc_assert (reloc != TLS_DESCSEQ);
+  start_sequence ();
+
+  sum = gen_rtx_UNSPEC (Pmode,
+   gen_rtvec (2, x, GEN_INT (reloc)),
+   UNSPEC_TLS);
+  reg = load_tls_operand (sum, reg);
+  emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode, 9)));
+
+  *valuep = emit_library_call_value (get_tls_get_addr (), NULL_RTX,
+LCT_PURE, /* LCT_CONST?  */
+Pmode, reg, Pmode);
+
+  rtx_insn *insns = get_insns ();
+  end_sequence ();
+
+  return insns;
+}
+
+static rtx_insn *
 arm_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int reloc)
 {
   rtx label, labelno, sum;
@@ -8736,8 +8763,84 @@ arm_tls_descseq_addr (rtx x, rtx reg)
   return reg;
 }
 
-rtx
-legitimize_tls_address (rtx x, rtx reg)
+static rtx
+legitimize_tls_address_fdpic (rtx x, rtx reg)
+{
+rtx dest, ret, eqv, addend, sum, tp;
+rtx_insn *insns;
+unsigned int model = SYMBOL_REF_TLS_MODEL (x);
+
+switch (model)
+  {
+  case TLS_MODEL_GLOBAL_DYNAMIC:
+   if (TARGET_GNU2_TLS)
+ {
+   abort ();
+ }
+   else
+ {
+   /* Original scheme.  */
+   insns = arm_call_tls_get_addr_fdpic (x, reg, &ret, TLS_GD32_FDPIC);
+   dest = gen_reg_rtx (Pmode);
+   emit_libcall_block (insns, dest, ret, x);
+ }
+   return dest;
+   break;
+
+  case TLS_MODEL_LOCAL_DYNAMIC:
+   if (TARGET_GNU2_TLS)
+ {
+   abort ();
+ }
+   else
+ {
+   insns = arm_call_tls_get_addr_fdpic (x, reg, &ret, TLS_LDM32_FDPIC);
+   /* Attach a unique REG_EQUIV, to allow the RTL optimizers to
+  share the LDM result with other LD model accesses.  */
+   eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const1_rtx),
+ UNSPEC_TLS);
+   dest = gen_reg_rtx (Pmode);
+   emit_libcall_block (insns, dest, ret, eqv);
+
+   /* Load the addend.  */
+   addend = gen_rtx_UNSPEC (Pmode,
+gen_rtvec (2, x, GEN_INT (TLS_LDO32)),
+UNSPEC_TLS);
+   addend = force_reg (SImode, gen_rtx_CONST (SImode, addend));
+   dest = gen_rtx_PLUS (Pmode, dest, addend);
+ }
+   return dest;
+   break;
+
+  case TLS_MODEL_INITIAL_EXEC:
+   sum = gen_rtx_UNSPEC (Pmode,
+ gen_rtvec (2, x, GEN_INT (TLS_IE32_FDPIC)),
+ UNSPEC_TLS);
+   reg = load_tls_operand (sum, reg);
+   /* FIXME: optimize below? */
+   emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode, 9)));
+   emit_insn (gen_movsi (reg, gen_rtx_MEM (Pmode, reg)));
+   tp = arm_load_tp (NULL_RTX);
+
+   return gen_rtx_PLUS (Pmode, tp, reg);
+   break;
+
+  case TLS_MODEL_LOCAL_EXEC:
+   tp = arm_load_tp (NULL_RTX);
+   reg = gen_rtx_UNSPEC (Pmode,
+ gen_rtvec (2, x, GEN_INT (TLS_LE32)),
+ UNSPEC_TLS);
+   reg = force_reg (SImode, gen_rtx_CONST (SImode, reg));
+
+   return gen_rtx_PLUS (Pmode, tp, reg);
+
+  default:
+   abort ();
+  }
+}
+
+static rtx
+legitimize_tls_address_not_fdpic (rtx x, rtx reg)
 {
   rtx dest, tp, label, labelno, sum, ret, eqv, addend;
   rtx_insn *insns;
@@ -8831,6 +8934,15 @@ legitimize_tls_address (rtx x, rtx reg)
 }
 }
 
+rtx
+legitimize_tls_address (rtx x, rtx reg)
+{
+if (TARGET_FDPIC)
+   return legitimize_tls_address_fdpic (x, reg);
+else
+   return legitimize_tls_address_not_fdpic (x, reg);
+}
+
 /* Try machine-dependent ways of modifying an illegitimate address
to be legitimate.  If we find one, return the new, valid address.  */
 rtx
@@ -28022,15 +28134,24 @@ arm_emit

[ARM/FDPIC 05/21] [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation

[Christophe Lyon]

In FDPIC, we need to make sure __do_global_dtors_aux and frame_dummy
are referenced by their address, not by pointers to the function
descriptors.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

* libgcc/crtstuff.c: Add support for FDPIC.

Change-Id: Iff3aec3815e8ebd87276c0107752f00908a22100

diff --git a/libgcc/crtstuff.c b/libgcc/crtstuff.c
index 5e89445..7238d9a 100644
--- a/libgcc/crtstuff.c
+++ b/libgcc/crtstuff.c
@@ -432,9 +432,17 @@ __do_global_dtors_aux (void)
 #ifdef FINI_SECTION_ASM_OP
 CRT_CALL_STATIC_FUNCTION (FINI_SECTION_ASM_OP, __do_global_dtors_aux)
 #elif defined (FINI_ARRAY_SECTION_ASM_OP)
+#if defined(__FDPIC__)
+__asm__(
+"   .section .fini_array\n"
+"   .word __do_global_dtors_aux\n"
+);
+asm (TEXT_SECTION_ASM_OP);
+#else /* defined(__FDPIC__) */
 static func_ptr __do_global_dtors_aux_fini_array_entry[]
   __attribute__ ((__used__, section(".fini_array"), aligned(sizeof(func_ptr
   = { __do_global_dtors_aux };
+#endif /* defined(__FDPIC__) */
 #else /* !FINI_SECTION_ASM_OP && !FINI_ARRAY_SECTION_ASM_OP */
 static void __attribute__((used))
 __do_global_dtors_aux_1 (void)
@@ -476,9 +484,17 @@ frame_dummy (void)
 #ifdef __LIBGCC_INIT_SECTION_ASM_OP__
 CRT_CALL_STATIC_FUNCTION (__LIBGCC_INIT_SECTION_ASM_OP__, frame_dummy)
 #else /* defined(__LIBGCC_INIT_SECTION_ASM_OP__) */
+#if defined(__FDPIC__)
+__asm__(
+"   .section .init_array\n"
+"   .word frame_dummy\n"
+);
+asm (TEXT_SECTION_ASM_OP);
+#else /* defined(__FDPIC__) */
 static func_ptr __frame_dummy_init_array_entry[]
   __attribute__ ((__used__, section(".init_array"), aligned(sizeof(func_ptr
   = { frame_dummy };
+#endif /* defined(__FDPIC__) */
 #endif /* !defined(__LIBGCC_INIT_SECTION_ASM_OP__) */
 #endif /* USE_EH_FRAME_REGISTRY || USE_TM_CLONE_REGISTRY */
 
-- 
2.6.3

[ARM/FDPIC 15/21] [ARM][testsuite] FDPIC: Skip unsupported tests

[Christophe Lyon]

Several tests cannot work on ARM-FDPIC for various reasons: skip them,
or skip some directives.

gcc.dg/20020312-2.c: Skip since it forces -fno-pic.

gcc.target/arm/:
* Skip since r9 is clobbered by assembly code:
  20051215-1.c
  mmx-1.c
  pr61948.c
  pr77933-1.c
  pr77933-2.c

* Skip since the test forces armv5te which is not supported by FDPIC:
  pr40887.c
  pr19599.c

* Skip since FDPIC disables sibcall to external functions:
  sibcall-1.c
  tail-long-call
  vfp-longcall-apcs

* Skip size check since it's different for FDPIC:
  ivopts-2.c
  ivopts-3.c
  ivopts-4.c
  ivopts-5.c
  pr43597.c
  pr43920-2.c

* Disable assembler scanning invalid for FDPIC:
  pr45701-1.c
  pr45701-2.c
  stack-red-zone.c

* gnu2 TLS dialect is not supported by FDPIC:
  tlscall.c

* Test relies on symbols not generated in FDPIC:
  data-rel-2.c
  data-rel-3.c

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/testsuite/
* gcc.dg/20020312-2.c: Skip on arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/20051215-1.c: Likewise.
* gcc.target/arm/mmx-1.c: Likewise.
* gcc.target/arm/pr19599.c: Likewise.
* gcc.target/arm/pr40887.c: Likewise.
* gcc.target/arm/pr61948.c: Likewise.
* gcc.target/arm/pr77933-1.c: Likewise.
* gcc.target/arm/pr77933-2.c: Likewise.
* gcc.target/arm/sibcall-1.c: Likewise.
* gcc.target/arm/data-rel-2.c: Likewise.
* gcc.target/arm/data-rel-3.c: Likewise.
* gcc.target/arm/tail-long-call: Likewise.
* gcc.target/arm/tlscall.c: Likewise.
* gcc.target/arm/vfp-longcall-apcs: Likewise.
* gcc.target/arm/ivopts-2.c: Skip object-size test on
arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/ivopts-3.c: Likewise.
* gcc.target/arm/ivopts-4.c: Likewise.
* gcc.target/arm/ivopts-5.c: Likewise.
* gcc.target/arm/pr43597.c: Likewise.
* gcc.target/arm/pr43920-2.c: Likewise.
* gcc.target/arm/pr45701-1.c: Skip scan-assembler on
arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/pr45701-2.c: Likewise.
* gcc.target/arm/stack-red-zone.c: Likewise.

Change-Id: Icada7ce52537901fdac10403e7997571b7e2c509

diff --git a/gcc/testsuite/gcc.dg/20020312-2.c 
b/gcc/testsuite/gcc.dg/20020312-2.c
index f5929e0..a7758b8 100644
--- a/gcc/testsuite/gcc.dg/20020312-2.c
+++ b/gcc/testsuite/gcc.dg/20020312-2.c
@@ -8,6 +8,7 @@
 /* { dg-do run } */
 /* { dg-options "-O -fno-pic" } */
 /* { dg-require-effective-target nonlocal_goto } */
+/* { dg-skip-if "" { arm*-*-uclinuxfdpiceabi } "*" "" } */
 
 extern void abort (void);
 
diff --git a/gcc/testsuite/gcc.target/arm/20051215-1.c 
b/gcc/testsuite/gcc.target/arm/20051215-1.c
index 0519dc7..cc07693 100644
--- a/gcc/testsuite/gcc.target/arm/20051215-1.c
+++ b/gcc/testsuite/gcc.target/arm/20051215-1.c
@@ -3,6 +3,7 @@
the call would need an output reload.  */
 /* { dg-do run } */
 /* { dg-options "-O2 -fno-omit-frame-pointer" } */
+/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } 
*/
 extern void abort (void);
 typedef void (*callback) (void);
 
diff --git a/gcc/testsuite/gcc.target/arm/data-rel-2.c 
b/gcc/testsuite/gcc.target/arm/data-rel-2.c
index 6ba47d6..7d37a8c 100644
--- a/gcc/testsuite/gcc.target/arm/data-rel-2.c
+++ b/gcc/testsuite/gcc.target/arm/data-rel-2.c
@@ -1,3 +1,4 @@
+/* { dg-skip-if "Not supported in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } 
*/
 /* { dg-options "-fPIC -mno-pic-data-is-text-relative -mno-single-pic-base" } 
*/
 /* { dg-final { scan-assembler-not "j-\\(.LPIC"  } } */
 /* { dg-final { scan-assembler "_GLOBAL_OFFSET_TABLE_-\\(.LPIC" } } */
diff --git a/gcc/testsuite/gcc.target/arm/data-rel-3.c 
b/gcc/testsuite/gcc.target/arm/data-rel-3.c
index 2ce1e66..534c6c4 100644
--- a/gcc/testsuite/gcc.target/arm/data-rel-3.c
+++ b/gcc/testsuite/gcc.target/arm/data-rel-3.c
@@ -1,3 +1,4 @@
+/* { dg-skip-if "Not supported in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } 
*/
 /* { dg-options "-fPIC -mpic-data-is-text-relative" } */
 /* { dg-final { scan-assembler "j-\\(.LPIC"  } } */
 /* { dg-final { scan-assembler-not "_GLOBAL_OFFSET_TABLE_-\\(.LPIC" } } */
diff --git a/gcc/testsuite/gcc.target/arm/ivopts-2.c 
b/gcc/testsuite/gcc.target/arm/ivopts-2.c
index afe91aa..f1d5edb 100644
--- a/gcc/testsuite/gcc.target/arm/ivopts-2.c
+++ b/gcc/testsuite/gcc.target/arm/ivopts-2.c
@@ -14,4 +14,4 @@ tr4 (short array[], int n)
 
 /* { dg-final { scan-tree-dump-times "PHI 

[ARM/FDPIC 16/21] [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.

[Christophe Lyon]

In FDPIC mode, r9 is saved in addition to other registers, so update
the expected patterns accordingly.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

* gcc/testsuite/
* gcc.target/arm/interrupt-1.c: Add scan-assembler pattern for
arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/interrupt-2.c: Likewise.
* gcc.target/arm/pr70830.c: Likewise.

Change-Id: Id946b79bacc32be585c31e60a355191f104cc29e

diff --git a/gcc/testsuite/gcc.target/arm/interrupt-1.c 
b/gcc/testsuite/gcc.target/arm/interrupt-1.c
index fe94877..493763d 100644
--- a/gcc/testsuite/gcc.target/arm/interrupt-1.c
+++ b/gcc/testsuite/gcc.target/arm/interrupt-1.c
@@ -13,5 +13,7 @@ void foo ()
   bar (0);
 }
 
-/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, fp, ip, lr}" } } */
-/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, 
pc}\\^" } } */
+/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, fp, ip, lr}" { 
target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, 
pc}\\^" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, r9, fp, ip, 
lr}" { target arm*-*-uclinuxfdpiceabi } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, r9, fp, 
ip, pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */
diff --git a/gcc/testsuite/gcc.target/arm/interrupt-2.c 
b/gcc/testsuite/gcc.target/arm/interrupt-2.c
index 289eca0..5be1f16 100644
--- a/gcc/testsuite/gcc.target/arm/interrupt-2.c
+++ b/gcc/testsuite/gcc.target/arm/interrupt-2.c
@@ -15,5 +15,7 @@ void test()
   foo = 0;
 }
 
-/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, ip, lr}" } } */
-/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, 
pc}\\^" } } */
+/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, ip, lr}" { 
target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, 
pc}\\^" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, r6, r9, ip, 
lr}" { target arm*-*-uclinuxfdpiceabi } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, r6, r9, 
ip, pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */
diff --git a/gcc/testsuite/gcc.target/arm/pr70830.c 
b/gcc/testsuite/gcc.target/arm/pr70830.c
index cad903b..cd84c42 100644
--- a/gcc/testsuite/gcc.target/arm/pr70830.c
+++ b/gcc/testsuite/gcc.target/arm/pr70830.c
@@ -11,4 +11,5 @@ void __attribute__ ((interrupt ("IRQ"))) 
dm3730_IRQHandler(void)
 {
 prints("IRQ" );
 }
-/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, ip, pc}\\^" } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, ip, pc}\\^" { 
target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r9, ip, 
pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */
-- 
2.6.3

[ARM/FDPIC 19/21] [ARM][testsuite] FDPIC: Handle *-*-uclinux*

[Christophe Lyon]

Add *-*-uclinux* to tests that work on this target.

2018-XX-XX  Christophe Lyon  

gcc/testsuite/
* g++.dg/abi/forced.C: Add *-*-uclinux*.
* g++.dg/abi/guard2.C: Likewise.
* g++.dg/ext/cleanup-10.C: Likewise.
* g++.dg/ext/cleanup-11.C: Likewise.
* g++.dg/ext/cleanup-8.C: Likewise.
* g++.dg/ext/cleanup-9.C: Likewise.
* g++.dg/ext/sync-4.C: Likewise.
* g++.dg/ipa/comdat.C: Likewise.
* gcc.dg/20041106-1.c: Likewise.
* gcc.dg/cleanup-10.c: Likewise.
* gcc.dg/cleanup-11.c: Likewise.
* gcc.dg/cleanup-8.c: Likewise.
* gcc.dg/cleanup-9.c: Likewise.
* gcc.dg/fdata-sections-1.c: Likewise.
* gcc.dg/fdata-sections-2.c: Likewise.
* gcc.dg/pr39323-1.c: Likewise.
* gcc.dg/pr39323-2.c: Likewise.
* gcc.dg/pr39323-3.c: Likewise.
* gcc.dg/pr65780-1.c: Likewise.
* gcc.dg/pr65780-2.c: Likewise.
* gcc.dg/pr67338.c: Likewise.
* gcc.dg/pr78185.c: Likewise.
* gcc.dg/pr83100-1.c: Likewise.
* gcc.dg/pr83100-4.c: Likewise.
* gcc.dg/strlenopt-12g.c: Likewise.
* gcc.dg/strlenopt-14g.c: Likewise.
* gcc.dg/strlenopt-14gf.c: Likewise.
* gcc.dg/strlenopt-16g.c: Likewise.
* gcc.dg/strlenopt-17g.c: Likewise.
* gcc.dg/strlenopt-18g.c: Likewise.
* gcc.dg/strlenopt-1f.c: Likewise.
* gcc.dg/strlenopt-22g.c: Likewise.
* gcc.dg/strlenopt-2f.c: Likewise.
* gcc.dg/strlenopt-31g.c: Likewise.
* gcc.dg/strlenopt-33g.c: Likewise.
* gcc.dg/strlenopt-4g.c: Likewise.
* gcc.dg/strlenopt-4gf.c: Likewise.
* gcc.dg/strncmp-2.c: Likewise.
* gcc.dg/struct-ret-3.c: Likewise.
* gcc.dg/torture/pr69760.c: Likewise.
* gcc.target/arm/div64-unwinding.c: Likewise.
* gcc.target/arm/stack-checking.c: Likewise.
* gcc.target/arm/synchronize.c: Likewise.
* gcc.target/arm/pr66912.c: Add arm*-*-uclinuxfdpiceabi.
* lib/target-supports.exp (check_effective_target_pie): Likewise.
(check_effective_target_sync_long_long_runtime): Likewise.
(check_effective_target_sync_int_long): Likewise.
(check_effective_target_sync_char_short): Likewise.

Change-Id: I89bfea79d4490c5df0b6470def5a31d7f31ac2cc

diff --git a/gcc/testsuite/g++.dg/abi/forced.C 
b/gcc/testsuite/g++.dg/abi/forced.C
index 0e6be28..2d1ec53 100644
--- a/gcc/testsuite/g++.dg/abi/forced.C
+++ b/gcc/testsuite/g++.dg/abi/forced.C
@@ -1,4 +1,4 @@
-// { dg-do run { target *-*-linux* *-*-gnu* } }
+// { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } }
 // { dg-options "-pthread" }
 
 #include 
diff --git a/gcc/testsuite/g++.dg/abi/guard2.C 
b/gcc/testsuite/g++.dg/abi/guard2.C
index c35fa7e..74139a8 100644
--- a/gcc/testsuite/g++.dg/abi/guard2.C
+++ b/gcc/testsuite/g++.dg/abi/guard2.C
@@ -1,6 +1,6 @@
 // PR c++/41611
 // Test that the guard gets its own COMDAT group.
-// { dg-final { scan-assembler "_ZGVZN1A1fEvE1i,comdat" { target *-*-linux* 
*-*-gnu* } } }
+// { dg-final { scan-assembler "_ZGVZN1A1fEvE1i,comdat" { target *-*-linux* 
*-*-gnu* *-*-uclinux* } } }
 
 struct A {
   static int f()
diff --git a/gcc/testsuite/g++.dg/ext/cleanup-10.C 
b/gcc/testsuite/g++.dg/ext/cleanup-10.C
index 66c7b76..56aeb66 100644
--- a/gcc/testsuite/g++.dg/ext/cleanup-10.C
+++ b/gcc/testsuite/g++.dg/ext/cleanup-10.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* 
*-*-darwin[912]* } } */
+/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* 
*-*-darwin[912]* *-*-uclinux* } } */
 /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
 /* Verify that cleanups work with exception handling through signal frames
on alternate stack.  */
diff --git a/gcc/testsuite/g++.dg/ext/cleanup-11.C 
b/gcc/testsuite/g++.dg/ext/cleanup-11.C
index 6e96521..c6d3560 100644
--- a/gcc/testsuite/g++.dg/ext/cleanup-11.C
+++ b/gcc/testsuite/g++.dg/ext/cleanup-11.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* 
*-*-darwin[912]* } } */
+/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* 
*-*-darwin[912]* *-*-uclinux* } } */
 /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
 /* Verify that cleanups work with exception handling through realtime signal
frames on alternate stack.  */
diff --git a/gcc/testsuite/g++.dg/ext/cleanup-8.C 
b/gcc/testsuite/g++.dg/ext/cleanup-8.C
index ccf9bef..e99508d 100644
--- a/gcc/testsuite/g++.dg/ext/cleanup-8.C
+++ b/gcc/testsuite/g++.dg/ext/cleanup-8.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* 
*-*-darwin[912]* } } */
+/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* 
*-*-darwin[912]* *-*-uclinux* } } */
 /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
 /* Verify that cleanups work with exception

[ARM/FDPIC 14/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture

[Christophe Lyon]

Without this, when we are unwinding across a signal frame we can jump
to an even address which leads to an exception.

This is needed in __gnu_persnality_sigframe_fdpic() when restoring the
PC from the signal frame since the PC saved by the kernel has the LSB
bit set to zero.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

libgcc/
* config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle v7m
architecture.

Change-Id: Ie84de548226bcf1751e19a09e8f091fb3013ccea

diff --git a/libgcc/config/arm/unwind-arm.c b/libgcc/config/arm/unwind-arm.c
index 564e4f13..6da6e3d 100644
--- a/libgcc/config/arm/unwind-arm.c
+++ b/libgcc/config/arm/unwind-arm.c
@@ -198,6 +198,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set (_Unwind_Context 
*context,
return _UVRSR_FAILED;
 
   vrs->core.r[regno] = *(_uw *) valuep;
+#if defined(__ARM_ARCH_7M__)
+  /* Force LSB bit since we always run thumb code.  */
+  if (regno == 15)
+   vrs->core.r[regno] |= 1;
+#endif
   return _UVRSR_OK;
 
 case _UVRSC_VFP:
-- 
2.6.3

[ARM/FDPIC 17/21] [ARM][testsuite] FDPIC: Skip v8-m and v6-m tests that currently produce an ICE

[Christophe Lyon]

v6-M and v8-M are not supported currently in FDPIC mode, it's better
to skip the tests.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/testsuite/
* gcc.target/arm/atomic-comp-swap-release-acquire-3.c: Skip on
arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/atomic-op-acq_rel-3.c: Likewise.
* gcc.target/arm/atomic-op-acquire-3.c: Likewise.
* gcc.target/arm/atomic-op-char-3.c: Likewise.
* gcc.target/arm/atomic-op-consume-3.c: Likewise.
* gcc.target/arm/atomic-op-int-3.c: Likewise.
* gcc.target/arm/atomic-op-relaxed-3.c: Likewise.
* gcc.target/arm/atomic-op-release-3.c: Likewise.
* gcc.target/arm/atomic-op-seq_cst-3.c: Likewise.
* gcc.target/arm/atomic-op-short-3.c: Likewise.
* gcc.target/arm/pr65647.c: Likewise.

Change-Id: I2357be4c92b5a1a8430ae6617c7bba7bec0ea213

diff --git a/gcc/testsuite/gcc.target/arm/atomic-comp-swap-release-acquire-3.c 
b/gcc/testsuite/gcc.target/arm/atomic-comp-swap-release-acquire-3.c
index 0191f7a..81b5c3d 100644
--- a/gcc/testsuite/gcc.target/arm/atomic-comp-swap-release-acquire-3.c
+++ b/gcc/testsuite/gcc.target/arm/atomic-comp-swap-release-acquire-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } 
"*" "" } */
 /* { dg-require-effective-target arm_arch_v8m_base_ok } */
 /* { dg-options "-O2 -fno-ipa-icf" } */
 /* { dg-add-options arm_arch_v8m_base } */
diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-acq_rel-3.c 
b/gcc/testsuite/gcc.target/arm/atomic-op-acq_rel-3.c
index f2ed32d..2b03f75 100644
--- a/gcc/testsuite/gcc.target/arm/atomic-op-acq_rel-3.c
+++ b/gcc/testsuite/gcc.target/arm/atomic-op-acq_rel-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } 
"*" "" } */
 /* { dg-require-effective-target arm_arch_v8m_base_ok } */
 /* { dg-options "-O2" } */
 /* { dg-add-options arm_arch_v8m_base } */
diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-acquire-3.c 
b/gcc/testsuite/gcc.target/arm/atomic-op-acquire-3.c
index bba1c27..d315b25 100644
--- a/gcc/testsuite/gcc.target/arm/atomic-op-acquire-3.c
+++ b/gcc/testsuite/gcc.target/arm/atomic-op-acquire-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } 
"*" "" } */
 /* { dg-require-effective-target arm_arch_v8m_base_ok } */
 /* { dg-options "-O2" } */
 /* { dg-add-options arm_arch_v8m_base } */
diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-char-3.c 
b/gcc/testsuite/gcc.target/arm/atomic-op-char-3.c
index 17117ee..11e596d 100644
--- a/gcc/testsuite/gcc.target/arm/atomic-op-char-3.c
+++ b/gcc/testsuite/gcc.target/arm/atomic-op-char-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } 
"*" "" } */
 /* { dg-require-effective-target arm_arch_v8m_base_ok } */
 /* { dg-options "-O2" } */
 /* { dg-add-options arm_arch_v8m_base } */
diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-consume-3.c 
b/gcc/testsuite/gcc.target/arm/atomic-op-consume-3.c
index 8352f0c..e5da00b 100644
--- a/gcc/testsuite/gcc.target/arm/atomic-op-consume-3.c
+++ b/gcc/testsuite/gcc.target/arm/atomic-op-consume-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } 
"*" "" } */
 /* { dg-require-effective-target arm_arch_v8m_base_ok } */
 /* { dg-options "-O2" } */
 /* { dg-add-options arm_arch_v8m_base } */
diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-int-3.c 
b/gcc/testsuite/gcc.target/arm/atomic-op-int-3.c
index d4f1db3..997ab08 100644
--- a/gcc/testsuite/gcc.target/arm/atomic-op-int-3.c
+++ b/gcc/testsuite/gcc.target/arm/atomic-op-int-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } 
"*" "" } */
 /* { dg-require-effective-target arm_arch_v8m_base_ok } */
 /* { dg-options "-O2" } */
 /* { dg-add-options arm_arch_v8m_base } */
diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-relaxed-3.c 
b/gcc/testsuite/gcc.target/arm/atomic-op-relaxed-3.c
index 09b5ea9..383a48a 100644
--- a/gcc/testsuite/gcc.target/arm/atomic-op-relaxed-3.c
+++ b/gcc/testsuite/gcc.target/arm/atomic-op-relaxed-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } 
"*" "" } */
 /* { dg-require-effective-target arm_arch_v8m_base_ok } */
 /* { dg-options "-O2" } */
 /* { dg-add-options arm_arch_v8m_base } */
diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-release-3.c 
b/gcc/testsuite/gcc.target/arm/atomic-op-release-3.c
index 2b136f5..3227c75 100644
--- a/gcc/testsuite/gcc.target/arm/atomic-op-release-3.c
+++ b/gcc/testsuite/gcc.target/arm/atomic-op-release-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } 
"*" ""

[ARM/FDPIC 13/21] [ARM] FDPIC: Support unwinding across thumb2 signal trampoline

[Christophe Lyon]

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

libgcc/
* unwind-arm-common.inc (FDPIC_T2_LDR_R12_WITH_FUNCDESC)
(FDPIC_T2_LDR_R9_WITH_GOT, FDPIC_T2_LDR_PC_WITH_RESTORER): New.
(__gnu_personality_sigframe_fdpic): Support Thumb address.
(get_eit_entry): Support Thumb code.

Change-Id: I2bb8994e733e48a89c6f4e0682921186c086f8bc

diff --git a/libgcc/unwind-arm-common.inc b/libgcc/unwind-arm-common.inc
index 80d1e88..7de4033 100644
--- a/libgcc/unwind-arm-common.inc
+++ b/libgcc/unwind-arm-common.inc
@@ -38,6 +38,9 @@
 #define FDPIC_LDR_R12_WITH_FUNCDESC0xe59fc004
 #define FDPIC_LDR_R9_WITH_GOT  0xe59c9004
 #define FDPIC_LDR_PC_WITH_RESTORER 0xe59cf000
+#define FDPIC_T2_LDR_R12_WITH_FUNCDESC  0xc008f8df
+#define FDPIC_T2_LDR_R9_WITH_GOT   0x9004f8dc
+#define FDPIC_T2_LDR_PC_WITH_RESTORER   0xf000f8dc
 #define FDPIC_FUNCDESC_OFFSET  12
 /* Signal frame offsets.  */
 #define ARM_NEW_RT_SIGFRAME_UCONTEXT   0x80
@@ -228,7 +231,7 @@ __gnu_personality_sigframe_fdpic (_Unwind_State state,
 _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &sp);
 _Unwind_VRS_Get (context, _UVRSC_CORE, R_PC, _UVRSD_UINT32, &pc);
 
-funcdesc = *(unsigned int *)(pc + FDPIC_FUNCDESC_OFFSET);
+funcdesc = *(unsigned int *)((pc & ~1) + FDPIC_FUNCDESC_OFFSET);
 handler = *(unsigned int *)(funcdesc);
 first_handler_instruction = *(unsigned int *)(handler & ~1);
 
@@ -277,10 +280,13 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw 
return_address)
  /* If we are unwinding a signal handler then perhaps we have
 reached a trampoline.  Try to detect jump to restorer
 sequence.  */
- _uw *pc = (_uw *)((return_address+2) & ~3);
- if (pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC
- && pc[1] == FDPIC_LDR_R9_WITH_GOT
- && pc[2] == FDPIC_LDR_PC_WITH_RESTORER)
+ _uw *pc = (_uw *)((return_address+2) & ~1);
+ if ((pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC
+  && pc[1] == FDPIC_LDR_R9_WITH_GOT
+  && pc[2] == FDPIC_LDR_PC_WITH_RESTORER)
+ || (pc[0] == FDPIC_T2_LDR_R12_WITH_FUNCDESC
+ && pc[1] == FDPIC_T2_LDR_R9_WITH_GOT
+ && pc[2] == FDPIC_T2_LDR_PC_WITH_RESTORER))
{
  struct funcdesc_t *funcdesc = (struct funcdesc_t *)
&__gnu_personality_sigframe_fdpic;
@@ -309,13 +315,16 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw 
return_address)
   /* If we are unwinding a signal handler then perhaps we have
 reached a trampoline.  Try to detect jump to restorer
 sequence.  */
-  _uw *pc = (_uw *)((return_address+2) & ~3);
-  if (pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC
- && pc[1] == FDPIC_LDR_R9_WITH_GOT
- && pc[2] == FDPIC_LDR_PC_WITH_RESTORER)
+  _uw *pc = (_uw *)((return_address+2) & ~1);
+  if ((pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC
+  && pc[1] == FDPIC_LDR_R9_WITH_GOT
+  && pc[2] == FDPIC_LDR_PC_WITH_RESTORER)
+ || (pc[0] == FDPIC_T2_LDR_R12_WITH_FUNCDESC
+ && pc[1] == FDPIC_T2_LDR_R9_WITH_GOT
+ && pc[2] == FDPIC_T2_LDR_PC_WITH_RESTORER))
{
- struct funcdesc_t *funcdesc = (struct funcdesc_t *)
-   &__gnu_personality_sigframe_fdpic;
+ struct funcdesc_t *funcdesc
+   = (struct funcdesc_t *) &__gnu_personality_sigframe_fdpic;
 
  UCB_PR_ADDR (ucbp) = funcdesc->ptr;
  UCB_PR_GOT (ucbp) = funcdesc->got;
@@ -335,13 +344,16 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw 
return_address)
   /* If we are unwinding a signal handler then perhaps we have
 reached a trampoline.  Try to detect jump to restorer
 sequence.  */
-  _uw *pc = (_uw *)((return_address+2) & ~3);
-  if (pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC
- && pc[1] == FDPIC_LDR_R9_WITH_GOT
- && pc[2] == FDPIC_LDR_PC_WITH_RESTORER)
+  _uw *pc = (_uw *)((return_address+2) & ~1);
+  if ((pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC
+  && pc[1] == FDPIC_LDR_R9_WITH_GOT
+  && pc[2] == FDPIC_LDR_PC_WITH_RESTORER)
+ || (pc[0] == FDPIC_T2_LDR_R12_WITH_FUNCDESC
+ && pc[1] == FDPIC_T2_LDR_R9_WITH_GOT
+ && pc[2] == FDPIC_T2_LDR_PC_WITH_RESTORER))
{
- struct funcdesc_t *funcdesc = (struct funcdesc_t *)
-   &__gnu_personality_sigframe_fdpic;
+ struct funcdesc_t *funcdesc
+   = (struct funcdesc_t *) &__gnu_personality_sigframe_fdpic;
 
  UCB_PR_ADDR (ucbp) = funcdesc->ptr;
  UCB_PR_GOT (ucbp) = funcdesc->got;
-- 
2.6.3

[ARM/FDPIC 18/21] [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode

[Christophe Lyon]

Some tests fail on arm*-*-uclinuxfdpiceabi because it generates PIC
code and they don't support it: skip them. They also fail on
arm*-linux* when forcing -fPIC.

2018-XX-XX  Christophe Lyon  

gcc/testsuite/
* gcc.target/arm/eliminate.c: Accept only nonpic targets.
* g++.dg/other/anon5.C: Likewise.

Change-Id: I8efb8d356ce25b020c44a84b07f79a996dca0358

diff --git a/gcc/testsuite/g++.dg/other/anon5.C 
b/gcc/testsuite/g++.dg/other/anon5.C
index ee4601e..dadd92e 100644
--- a/gcc/testsuite/g++.dg/other/anon5.C
+++ b/gcc/testsuite/g++.dg/other/anon5.C
@@ -1,5 +1,6 @@
 // PR c++/34094
 // { dg-do link { target { ! { *-*-darwin* *-*-hpux* *-*-solaris2.* } } } }
+// { dg-require-effective-target nonpic }
 // { dg-options "-gdwarf-2" }
 // Ignore additional message on powerpc-ibm-aix
 // { dg-prune-output "obtain more information" } */
diff --git a/gcc/testsuite/gcc.target/arm/eliminate.c 
b/gcc/testsuite/gcc.target/arm/eliminate.c
index f254dd8..299d4df 100644
--- a/gcc/testsuite/gcc.target/arm/eliminate.c
+++ b/gcc/testsuite/gcc.target/arm/eliminate.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { nonpic } } } */
 /* { dg-options "-O2" }  */
 
 struct X
-- 
2.6.3

[ARM/FDPIC 20/21] [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets

[Christophe Lyon]

Some tests have the "nonpic" guard, but pass on
arm*-*-uclinuxfdpiceabi because it is in PIE mode by default. Rather
than adding this target to all these tests, add the "pie_enabled"
effective target.

2018-XX-XX  Christophe Lyon  

gcc/testsuite/
* g++.dg/cpp0x/noexcept03.C: Add pie_enabled.
* g++.dg/ipa/devirt-c-7.C: Likewise.
* g++.dg/ipa/ivinline-1.C: Likewise.
* g++.dg/ipa/ivinline-2.C: Likewise.
* g++.dg/ipa/ivinline-3.C: Likewise.
* g++.dg/ipa/ivinline-4.C: Likewise.
* g++.dg/ipa/ivinline-5.C: Likewise.
* g++.dg/ipa/ivinline-7.C: Likewise.
* g++.dg/ipa/ivinline-8.C: Likewise.
* g++.dg/ipa/ivinline-9.C: Likewise.
* g++.dg/tls/pr79288.C: Likewise.
* gcc.dg/addr_equal-1.c: Likewise.
* gcc.dg/const-1.c: Likewise.
* gcc.dg/ipa/pure-const-1.c: Likewise.
* gcc.dg/noreturn-8.c: Likewise.
* gcc.dg/pr33826.c: Likewise.
* gcc.dg/torture/ipa-pta-1.c: Likewise.
* gcc.dg/tree-ssa/alias-2.c: Likewise.
* gcc.dg/tree-ssa/ipa-split-5.c: Likewise.
* gcc.dg/tree-ssa/loadpre6.c: Likewise.
* gcc.dg/uninit-19.c: Likewise.

Change-Id: I1a0d836b892c23891f739fccdc467d0f354ab82c

diff --git a/gcc/testsuite/g++.dg/cpp0x/noexcept03.C 
b/gcc/testsuite/g++.dg/cpp0x/noexcept03.C
index 2d37867..906a44d 100644
--- a/gcc/testsuite/g++.dg/cpp0x/noexcept03.C
+++ b/gcc/testsuite/g++.dg/cpp0x/noexcept03.C
@@ -1,6 +1,6 @@
 // Runtime test for noexcept-specification.
 // { dg-options "-Wnoexcept" }
-// { dg-do run { target nonpic } }
+// { dg-do run { target { nonpic || pie_enabled } } }
 // { dg-require-effective-target c++11 }
 
 #include 
diff --git a/gcc/testsuite/g++.dg/ipa/devirt-c-7.C 
b/gcc/testsuite/g++.dg/ipa/devirt-c-7.C
index 2e76cbe..efb65c2 100644
--- a/gcc/testsuite/g++.dg/ipa/devirt-c-7.C
+++ b/gcc/testsuite/g++.dg/ipa/devirt-c-7.C
@@ -1,7 +1,6 @@
 /* Verify that ipa-cp will not get confused by placement new constructing an
object within another one when looking for dynamic type change .  */
-/* { dg-do run } */
-/* { dg-require-effective-target nonpic } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
 /* { dg-options "-O3 -Wno-attributes"  } */
 
 extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-1.C 
b/gcc/testsuite/g++.dg/ipa/ivinline-1.C
index 9b10d20..2d988bc 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-1.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-1.C
@@ -1,6 +1,6 @@
 /* Verify that simple virtual calls are inlined even without early
inlining.  */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
 /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp"  } */
 
 extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-2.C 
b/gcc/testsuite/g++.dg/ipa/ivinline-2.C
index 21cd46f..d978638 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-2.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-2.C
@@ -1,6 +1,6 @@
 /* Verify that simple virtual calls using this pointer are inlined
even without early inlining..  */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
 /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp"  } */
 
 extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-3.C 
b/gcc/testsuite/g++.dg/ipa/ivinline-3.C
index 1e24644..f756a16 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-3.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-3.C
@@ -1,6 +1,6 @@
 /* Verify that simple virtual calls on an object refrence are inlined
even without early inlining.  */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
 /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp"  } */
 
 extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-4.C 
b/gcc/testsuite/g++.dg/ipa/ivinline-4.C
index cf0d980..5fbd3ef 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-4.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-4.C
@@ -1,7 +1,7 @@
 /* Verify that simple virtual calls are inlined even without early
inlining, even when a typecast to an ancestor is involved along the
way.  */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
 /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp"  } */
 
 extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-5.C 
b/gcc/testsuite/g++.dg/ipa/ivinline-5.C
index f15ebf2..6c19907 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-5.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-5.C
@@ -1,6 +1,6 @@
 /* Verify that virtual call inlining does not pick a wrong method when
there is a user defined ancestor in an object.  */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
 /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-i

[ARM/FDPIC 21/21] [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.

[Christophe Lyon]

uclibc defines bswap_32, so use a different name in this test.

2018-XX-XX  Christophe Lyon  

gcc/testsuite/
* gcc.target/arm/pr43698.c (bswap_32): Rename as my_bswap_32.

Change-Id: I2591bd911030814331cabf97ee5cf6cf8124b4f3

diff --git a/gcc/testsuite/gcc.target/arm/pr43698.c 
b/gcc/testsuite/gcc.target/arm/pr43698.c
index 1fc497c..3b5dad0 100644
--- a/gcc/testsuite/gcc.target/arm/pr43698.c
+++ b/gcc/testsuite/gcc.target/arm/pr43698.c
@@ -6,7 +6,7 @@
 
 char do_reverse_endian = 0;
 
-#  define bswap_32(x) \
+#  define my_bswap_32(x) \
   x) & 0xff00) >> 24) | \
(((x) & 0x00ff) >>  8) | \
(((x) & 0xff00) <<  8) | \
@@ -16,7 +16,7 @@ char do_reverse_endian = 0;
   (__extension__ ({ \
   uint64_t __res; \
   if (!do_reverse_endian) {__res = (X); \
-  } else if (sizeof(X) == 4) { __res = bswap_32((X)); \
+  } else if (sizeof(X) == 4) { __res = my_bswap_32((X)); \
   } \
   __res; \
 }))
-- 
2.6.3

Re: [PATCH GCC][1/6]Compute type mode and register class mapping

[Bin.Cheng]

On Thu, May 24, 2018 at 11:55 PM, Jeff Law  wrote:
> On 05/18/2018 02:40 AM, Bin.Cheng wrote:
>> On Fri, May 4, 2018 at 5:21 PM, Bin Cheng  wrote:
>>> Hi,
>>> This is the updated version patch set computing register pressure on TREE 
>>> SSA
>>> and use that information to direct other loop optimizers (predcom only for 
>>> now).
>>> This version of change is to follow Jeff's comment that we should reuse 
>>> existing
>>> tree-ssa-live.c infrastructure for live range computation, rather than 
>>> inventing
>>> another one.
>>> Jeff had another concern about exposing ira.h and low-level register stuff 
>>> in
>>> GIMPLE world.  Unfortunately I haven't got a clear solution to it.  I found 
>>> it's
>>> a bit hard to relate type/type_mode with register class and with available 
>>> regs
>>> without exposing the information, especially there are multiple possible 
>>> register
>>> classes for vector types and it's not fixed.  I am open to any suggestions 
>>> here.
>>>
>>> This is the first patch estimating the map from type mode to register class.
>>> This one doesn't need update and it's the same as the original version patch
>>> at https://gcc.gnu.org/ml/gcc-patches/2017-05/msg01021.html
>>>
>>> Bootstrap and test on x86_64 and AArch64 ongoing.  Any comments?
>> Hi,
>> The original version of this patch was approved by Jeff
>> @https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01808.html
>> Jeff, some new comment now or the old approval is still valid?
>> Guess your major concern is about exporting ira.h to gimple world?
> Yea, that was by far my biggest concern -- IRA is very much in the RTL
> world and exposing it into the gimple world seems like a major layering
> violation.
>
> So I have no inherent issues with this patch in isolation, but I may
> have issues with subsequent patches if they introduce that kind of
> layering violation.  So let's avoid installing until we have agreement
> on the full set of patches.
Sure, in the meantime, I will think again if there is way to avoid
this shortage.

The 3rd/4th patches are pure change to current live range and
coalescing stuff which
are irrelevant to this issue, I suppose it's okay to commit that two.

Thanks,
bin
>
> jeff

[committed][AArch64] Add SVE support for integer division

[Richard Sandiford]

After the previous patch to prevent pessimisation of divisions
by constants, this patch adds support for the SVE integer division
instructions.

Tested on aarch64-linux-gnu (with and without SVE) and aarch64_be-elf.
Committed as r260712.

Richard


2018-05-25  Richard Sandiford  

gcc/
* config/aarch64/iterators.md (SVE_INT_BINARY_SD): New code iterator.
(optab, sve_int_op): Handle div and udiv.
* config/aarch64/aarch64-sve.md (3): New expander
for SVE_INT_BINARY_SD.
(*3): New insn for the same.

gcc/testsuite/
* gcc.target/aarch64/sve/div_1.c: New test.
* gcc.target/aarch64/sve/div_1_run.c: Likewise.
* gcc.target/aarch64/sve/mul_highpart_2.c: Likewise.
* gcc.target/aarch64/sve/mul_highpart_2_run.c: Likewise.

Index: gcc/config/aarch64/iterators.md
===
--- gcc/config/aarch64/iterators.md 2018-05-25 09:08:34.079950643 +0100
+++ gcc/config/aarch64/iterators.md 2018-05-25 09:28:55.825421996 +0100
@@ -1207,6 +1207,8 @@ (define_code_iterator SVE_INT_BINARY [pl
 
 (define_code_iterator SVE_INT_BINARY_REV [minus])
 
+(define_code_iterator SVE_INT_BINARY_SD [div udiv])
+
 ;; SVE integer comparisons.
 (define_code_iterator SVE_INT_CMP [lt le eq ne ge gt ltu leu geu gtu])
 
@@ -1237,6 +1239,8 @@ (define_code_attr optab [(ashift "ashl")
 (neg "neg")
 (plus "add")
 (minus "sub")
+(div "div")
+(udiv "udiv")
 (ss_plus "qadd")
 (us_plus "qadd")
 (ss_minus "qsub")
@@ -1378,6 +1382,8 @@ (define_mode_attr lconst_atomic [(QI "K"
 ;; The integer SVE instruction that implements an rtx code.
 (define_code_attr sve_int_op [(plus "add")
  (minus "sub")
+ (div "sdiv")
+ (udiv "udiv")
  (neg "neg")
  (smin "smin")
  (smax "smax")
Index: gcc/config/aarch64/aarch64-sve.md
===
--- gcc/config/aarch64/aarch64-sve.md   2018-05-25 09:08:34.077950721 +0100
+++ gcc/config/aarch64/aarch64-sve.md   2018-05-25 09:28:55.825421996 +0100
@@ -1008,6 +1008,36 @@ (define_insn "*mul3_highpart"
   "mulh\t%0., %1/m, %0., %3."
 )
 
+;; Unpredicated division.
+(define_expand "3"
+  [(set (match_operand:SVE_SDI 0 "register_operand")
+   (unspec:SVE_SDI
+ [(match_dup 3)
+  (SVE_INT_BINARY_SD:SVE_SDI
+(match_operand:SVE_SDI 1 "register_operand")
+(match_operand:SVE_SDI 2 "register_operand"))]
+ UNSPEC_MERGE_PTRUE))]
+  "TARGET_SVE"
+  {
+operands[3] = force_reg (mode, CONSTM1_RTX (mode));
+  }
+)
+
+;; Division predicated with a PTRUE.
+(define_insn "*3"
+  [(set (match_operand:SVE_SDI 0 "register_operand" "=w, w")
+   (unspec:SVE_SDI
+ [(match_operand: 1 "register_operand" "Upl, Upl")
+  (SVE_INT_BINARY_SD:SVE_SDI
+(match_operand:SVE_SDI 2 "register_operand" "0, w")
+(match_operand:SVE_SDI 3 "aarch64_sve_mul_operand" "w, 0"))]
+ UNSPEC_MERGE_PTRUE))]
+  "TARGET_SVE"
+  "@
+   \t%0., %1/m, %0., %3.
+   r\t%0., %1/m, %0., %2."
+)
+
 ;; Unpredicated NEG, NOT and POPCOUNT.
 (define_expand "2"
   [(set (match_operand:SVE_I 0 "register_operand")
Index: gcc/testsuite/gcc.target/aarch64/sve/div_1.c
===
--- /dev/null   2018-04-20 16:19:46.369131350 +0100
+++ gcc/testsuite/gcc.target/aarch64/sve/div_1.c2018-05-25 
09:28:55.826421957 +0100
@@ -0,0 +1,26 @@
+/* { dg-do assemble { target aarch64_asm_sve_ok } } */
+/* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model --save-temps" } */
+
+#include 
+
+#define DEF_LOOP(TYPE) \
+void __attribute__ ((noipa))   \
+mod_##TYPE (TYPE *restrict dst, TYPE *restrict src1,   \
+   TYPE *restrict src2, int count) \
+{  \
+  for (int i = 0; i < count; ++i)  \
+dst[i] = src1[i] / src2[i];\
+}
+
+#define TEST_ALL(T) \
+  T (int32_t) \
+  T (uint32_t) \
+  T (int64_t) \
+  T (uint64_t)
+
+TEST_ALL (DEF_LOOP)
+
+/* { dg-final { scan-assembler-times {\tsdiv\tz[0-9]+\.s, p[0-7]/m, 
z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
+/* { dg-final { scan-assembler-times {\tudiv\tz[0-9]+\.s, p[0-7]/m, 
z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
+/* { dg-final { scan-assembler-times {\tsdiv\tz[0-9]+\.d, p[0-7]/m, 
z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */
+/* { dg-final { scan-assembler-times {\tudiv\tz[0-9]+\.d, p[0-7]/m, 
z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */
Index: gcc/testsuite/gcc.target/aarch64/sve/div_1_run.c
===

[RFC] fixincludes: vxworks: add hack around ioLib.h/unistd.h mutual inclusion

[Rasmus Villemoes]

In old VxWorks headers (5.5), ioLib.h includes unistd.h via

#include "unistd.h"

We copy ioLib to include-fixed, with a few fixes applied. We also wrap
unistd.h, so that fixed header contains

#include_next 

This means that when user-code does

#include 

they'll get the fixed header (as they should), and the include of
unistd.h from that picks up the fixed header (as it
should). Unfortunately, since "..." was used, it seems that "the
directory in the search path after the one where the current file was
found" for the include_next then ends up picking the include-fixed
directory again, so the fixed unistd.h just includes itself, and not the
system unistd.h - and at the time of the self-include, the guard macro
is defined, so we do not end up evaluating the include_next again.

Changing to an angle-include instead still makes ioLib.h pick up the
fixed unistd.h, but since we now actually use the search path,
include_next works as intended. [In at least VxWorks 6.3, ioLib.h does
use <...> to include unistd.h, so this issue doesn't exist there.]

There are lots of quote-includes like this in the VxWorks headers, and
I'm slightly surprised I can't find other examples of this kind of issue
in inclhack.def. In fact, I'd expect any #include "foo.h" in a fixed
header where foo.h is also fixed and has an #include_next  would
have to be changed to #include . In fact, ioLib.h itself at
firsts seems to have the same problem with limits.h, since it also
contains

#include "limits.h"

However, in that case, the include-fixed version of limits.h does

#include "syslimits.h"

with an comment about explicitly using "..." so that we pick up
syslimits.h in the same directory, and _that_ file then does

#include_next 

which again at first hits the include-fixed version, but this time
around we end up in the not _GCC_LIMITS_H_ branch, with
_GCC_NEXT_LIMITS_H defined, so we hit another

#include_next 

and that time around limits.h was found via the include path, so we
finally end up recursing to the system limits.h. So this round-about
does seem to work for limits.h, but I'm wondering why that header file
alone gets special treatment by the gcc build system.

Signed-off-by: Rasmus Villemoes 
---
 fixincludes/inclhack.def | 16 
 1 file changed, 16 insertions(+)

diff --git a/fixincludes/inclhack.def b/fixincludes/inclhack.def
index d8bb17fe1a1..42c60e0c13b 100644
--- a/fixincludes/inclhack.def
+++ b/fixincludes/inclhack.def
@@ -4843,6 +4843,22 @@ fix = {
 test_text   = "extern int write ( int , char * , size_t ) ;";
 };
 
+/*
+ *  This hack ensures the include_next in the fixed unistd.h actually
+ *  finds the system's unistd.h and not the fixed unistd.h again.
+ */
+fix = {
+hackname= vxworks_iolib_include_unistd;
+files   = ioLib.h;
+mach= "*-*-vxworks*";
+select  = "#include \"unistd.h\"";
+
+c_fix   = format;
+c_fix_arg   = "#include ";
+
+test_text   = "#include \"unistd.h\"";
+};
+
 /*
  *  There are several name conflicts with C++ reserved words in X11 header
  *  files.  These are fixed in some versions, so don't do the fixes if
-- 
2.15.1

[Ada] Detect misplaced assertions between loop invariants

[Pierre-Marie de Rodat]

Loop invariants and loop variants should all be colocated, as defined in
SPARK RM 5.5.3(8). The code checking that rule was incorrectly accepting
pragma Assert between two loop invariants. Now fixed.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-05-25  Yannick Moy  

gcc/ada/

* sem_prag.adb (Check_Grouping): Modify test to ignore statements and
declarations not coming from source.--- gcc/ada/sem_prag.adb
+++ gcc/ada/sem_prag.adb
@@ -5979,9 +5979,14 @@ package body Sem_Prag is
   Prag := Stmt;
 
--  Skip declarations and statements generated by
-   --  the compiler during expansion.
+   --  the compiler during expansion. Note that some
+   --  source statements (e.g. pragma Assert) may have
+   --  been transformed so that they do not appear as
+   --  coming from source anymore, so we instead look
+   --  at their Original_Node.
 
-   elsif not Comes_From_Source (Stmt) then
+   elsif not Comes_From_Source (Original_Node (Stmt))
+   then
   null;
 
--  A non-pragma is separating the group from the

[Ada] Compiler loop on expression function and predicate in generic unit

[Pierre-Marie de Rodat]

This patch fixes an infinite loop in the compiler when analyzing an
expression function whose expression mentions a subtype with a static
predicate, and the context is a generic unit.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-05-25  Ed Schonberg  

gcc/ada/

* sem_ch13.adb (Build_Predicate_Functions): The predicate function
declaration is inserted into the tree and analyzed at that point, so
should not be reinserted when the body is constructed. Inside a
generic, ensure that the body is not inserted twice in the tree.

gcc/testsuite/

* gnat.dg/static_pred1.adb, gnat.dg/static_pred1.ads: New testcase.--- gcc/ada/sem_ch13.adb
+++ gcc/ada/sem_ch13.adb
@@ -8832,15 +8832,20 @@ package body Sem_Ch13 is
   Make_Simple_Return_Statement (Loc,
 Expression => Expr;
 
---  If declaration has not been analyzed yet, Insert declaration
---  before freeze node. Insert body itself after freeze node.
-
-if not Analyzed (FDecl) then
-   Insert_Before_And_Analyze (N, FDecl);
-end if;
+--  The declaration has been analyzed when created, and placed
+--  after type declaration. Insert body itself after freeze node.
 
 Insert_After_And_Analyze (N, FBody);
 
+--  within a generic unit, prevent a double analysis of the body
+--  which will not be marked analyzed yet. This will happen when
+--  the freeze node is created during the pre-analysis of an
+--  expression function.
+
+if Inside_A_Generic then
+   Set_Analyzed (FBody);
+end if;
+
 --  Static predicate functions are always side-effect free, and
 --  in most cases dynamic predicate functions are as well. Mark
 --  them as such whenever possible, so redundant predicate checks

--- /dev/null
new file mode 100644
+++ gcc/testsuite/gnat.dg/static_pred1.adb
@@ -0,0 +1,21 @@
+--  { dg-do compile }
+
+package body Static_Pred1 is
+
+   type Enum_Type is (A, B, C);
+
+   subtype Enum_Subrange is Enum_Type with Static_Predicate =>
+ Enum_Subrange in A | C;
+
+   function "not" (Kind : Enum_Subrange) return Enum_Subrange is
+ (case Kind is
+  when A => C,
+  when C => A);
+
+   procedure Dummy (Value : T) is
+  IK : Enum_Subrange := not A;
+   begin
+  null;
+   end Dummy;
+
+end Static_Pred1;

--- /dev/null
new file mode 100644
+++ gcc/testsuite/gnat.dg/static_pred1.ads
@@ -0,0 +1,5 @@
+generic
+   type T is private;
+package Static_Pred1 is
+   procedure Dummy (Value : T);
+end Static_Pred1;

[Ada] Support for C99 and C++ standard boolean types

[Pierre-Marie de Rodat]

This change the type Interfaces.C.Extensions.bool to be fully compatible
with the C99 and C++ standard boolean types by making it a fully-fledged
boolean type with convention C.

The following C+Ada program must compile quietly in LTO mode:

bool b;

struct S {};

bool foo (struct S *s) { return true; }

pragma Ada_2005;
pragma Style_Checks (Off);

with Interfaces.C; use Interfaces.C;
with Interfaces.C.Extensions;

package t_c is

   b : aliased Extensions.bool;  -- t.c:3
   pragma Import (C, b, "b");

   type S is record
  null;
   end record;
   pragma Convention (C_Pass_By_Copy, S);  -- t.c:5

   function foo (the_s : access S) return Extensions.bool;  -- t.c:7
   pragma Import (C, foo, "foo");

end t_c;

with t_c; use t_c;

procedure P_C is

  Dummy : aliased S;

begin
  b := foo (Dummy'Access);
end;

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-05-25  Eric Botcazou  

gcc/ada/

* freeze.adb (Freeze_Enumeration_Type): Do not give integer size to a
boolean type with convention C.
* libgnat/i-cexten.ads (bool): Change to boolean with convention C.
* gcc-interface/decl.c (gnat_to_gnu_entity): Add new local variable
FOREIGN and use it throughout the function.
: Set precision 1 on boolean types with foreign
convention.
: Likewise for subtypes.
: Force the size of a storage unit on empty classes.
* gcc-interface/utils.c (make_type_from_size) : Skip
boolean types with precision 1 if the size is the expected one.--- gcc/ada/freeze.adb
+++ gcc/ada/freeze.adb
@@ -6877,12 +6877,15 @@ package body Freeze is
procedure Freeze_Enumeration_Type (Typ : Entity_Id) is
begin
   --  By default, if no size clause is present, an enumeration type with
-  --  Convention C is assumed to interface to a C enum, and has integer
-  --  size. This applies to types. For subtypes, verify that its base
-  --  type has no size clause either. Treat other foreign conventions
-  --  in the same way, and also make sure alignment is set right.
+  --  Convention C is assumed to interface to a C enum and has integer
+  --  size, except for a boolean type because it is assumed to interface
+  --  to _Bool introduced in C99. This applies to types. For subtypes,
+  --  verify that its base type has no size clause either. Treat other
+  --  foreign conventions in the same way, and also make sure alignment
+  --  is set right.
 
   if Has_Foreign_Convention (Typ)
+and then not Is_Boolean_Type (Typ)
 and then not Has_Size_Clause (Typ)
 and then not Has_Size_Clause (Base_Type (Typ))
 and then Esize (Typ) < Standard_Integer_Size

--- gcc/ada/gcc-interface/decl.c
+++ gcc/ada/gcc-interface/decl.c
@@ -282,6 +282,8 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
   /* True if this entity is to be considered as imported.  */
   const bool imported_p
 = (Is_Imported (gnat_entity) && No (Address_Clause (gnat_entity)));
+  /* True if this entity has a foreign convention.  */
+  const bool foreign = Has_Foreign_Convention (gnat_entity);
   /* For a type, contains the equivalent GNAT node to be used in gigi.  */
   Entity_Id gnat_equiv_type = Empty;
   /* Temporary used to walk the GNAT tree.  */
@@ -658,8 +660,7 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 	  }
 
 	/* Get the type after elaborating the renamed object.  */
-	if (Has_Foreign_Convention (gnat_entity)
-	&& Is_Descendant_Of_Address (Underlying_Type (gnat_type)))
+	if (foreign && Is_Descendant_Of_Address (Underlying_Type (gnat_type)))
 	  gnu_type = ptr_type_node;
 	else
 	  {
@@ -1594,6 +1595,10 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 	  tree gnu_list = NULL_TREE;
 	  Entity_Id gnat_literal;
 
+	  /* Boolean types with foreign convention have precision 1.  */
+	  if (is_boolean && foreign)
+	esize = 1;
+
 	  gnu_type = make_node (is_boolean ? BOOLEAN_TYPE : ENUMERAL_TYPE);
 	  TYPE_PRECISION (gnu_type) = esize;
 	  TYPE_UNSIGNED (gnu_type) = is_unsigned;
@@ -1774,6 +1779,15 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 	  && Is_Bit_Packed_Array (Original_Array_Type (gnat_entity)))
 	esize = UI_To_Int (RM_Size (gnat_entity));
 
+  /* Boolean types with foreign convention have precision 1.  */
+  if (Is_Boolean_Type (gnat_entity) && foreign)
+	{
+	  gnu_type = make_node (BOOLEAN_TYPE);
+	  TYPE_PRECISION (gnu_type) = 1;
+	  TYPE_UNSIGNED (gnu_type) = 1;
+	  set_min_and_max_values_for_integral_type (gnu_type, 1, UNSIGNED);
+	  layout_type (gnu_type);
+	}
   /* First subtypes of Character are treated as Character; otherwise
 	 this should be an unsigned type if the base type is unsigned or
 	 if the lower bound is constant and non-negative or if the type
@@ -1783,7 +1797,7 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 	 conve

[Ada] Unbounded strings: inline Initialize and Adjust

[Pierre-Marie de Rodat]

Procedures Initialize and Adjust in the Ada.[Wide_[Wide_]]Strings.Unbounded
package are now inlined for nondispatching calls. No test available (efficiency
issue only).

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-05-25  Bob Duff  

gcc/ada/

* libgnat/a-strunb__shared.ads, libgnat/a-stwiun__shared.ads,
libgnat/a-stzunb__shared.ads: (Initialize, Adjust): Add pragma Inline.--- gcc/ada/libgnat/a-strunb__shared.ads
+++ gcc/ada/libgnat/a-strunb__shared.ads
@@ -482,6 +482,7 @@ private
overriding procedure Initialize (Object : in out Unbounded_String);
overriding procedure Adjust (Object : in out Unbounded_String);
overriding procedure Finalize   (Object : in out Unbounded_String);
+   pragma Inline (Initialize, Adjust);
 
Null_Unbounded_String : constant Unbounded_String :=
  (AF.Controlled with

--- gcc/ada/libgnat/a-stwiun__shared.ads
+++ gcc/ada/libgnat/a-stwiun__shared.ads
@@ -485,6 +485,7 @@ private
overriding procedure Initialize (Object : in out Unbounded_Wide_String);
overriding procedure Adjust (Object : in out Unbounded_Wide_String);
overriding procedure Finalize   (Object : in out Unbounded_Wide_String);
+   pragma Inline (Initialize, Adjust);
 
Null_Unbounded_Wide_String : constant Unbounded_Wide_String :=
   (AF.Controlled with

--- gcc/ada/libgnat/a-stzunb__shared.ads
+++ gcc/ada/libgnat/a-stzunb__shared.ads
@@ -503,6 +503,7 @@ private
  (Object : in out Unbounded_Wide_Wide_String);
overriding procedure Finalize
  (Object : in out Unbounded_Wide_Wide_String);
+   pragma Inline (Initialize, Adjust);
 
Null_Unbounded_Wide_Wide_String : constant Unbounded_Wide_Wide_String :=
(AF.Controlled with

[Ada] Fix handling of Loop_Entry for CodePeer/SPARK

[Pierre-Marie de Rodat]

When the applicable Assertion_Policy is Ignore for a pragma containing
an occurrence of attribute Loop_Entry, CodePeer and SPARK should still be
able to analyze the corresponding pragma. GNAT frontend was wrongly
translating X'Loop_Entry as X in the AST, as a side-effect of an
optimization only valid for compilation and not for static analysis.

This has no effect on compilation.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-05-25  Yannick Moy  

gcc/ada/

* sem_prag.adb (Check_Applicable_Policy): Deal specially with CodePeer
and GNATprove modes when applicable policy is Ignore.--- gcc/ada/sem_prag.adb
+++ gcc/ada/sem_prag.adb
@@ -28542,8 +28542,20 @@ package body Sem_Prag is
   when Name_Ignore
  | Name_Off
   =>
- Set_Is_Ignored (N, True);
- Set_Is_Checked (N, False);
+ --  In CodePeer mode and GNATprove mode, we need to
+ --  consider all assertions, unless they are
+ --  disabled. Force Is_Checked on ignored assertions, in
+ --  particular because transformations of the AST may
+ --  depend on assertions being checked (e.g. the
+ --  translation of attribute 'Loop_Entry).
+
+ if CodePeer_Mode or GNATprove_Mode then
+Set_Is_Checked (N, True);
+Set_Is_Ignored (N, False);
+ else
+Set_Is_Ignored (N, True);
+Set_Is_Checked (N, False);
+ end if;
 
   when Name_Check
  | Name_On
@@ -28573,7 +28585,8 @@ package body Sem_Prag is
   --  If there are no specific entries that matched, then we let the
   --  setting of assertions govern. Note that this provides the needed
   --  compatibility with the RM for the cases of assertion, invariant,
-  --  precondition, predicate, and postcondition.
+  --  precondition, predicate, and postcondition. Note also that
+  --  Assertions_Enabled is forced in CodePeer mode and GNATprove mode.
 
   if Assertions_Enabled then
  Set_Is_Checked (N, True);

[Ada] Make Max_Sensible_Delay uniform across all Posix targets

[Pierre-Marie de Rodat]

For instance: 6 months where Duration is 64bits.  Heretofore LynxOS was unique
in having an approximately 12 days max delay. By experimentation the actual
maximum was determined and all relevant delay and sleep procedures rewritten to
incrementally wait if necessary.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-05-25  Doug Rupp  

gcc/ada/

* libgnarl/s-osinte__aix.ads, libgnarl/s-osinte__android.ads,
libgnarl/s-osinte__darwin.ads, libgnarl/s-osinte__freebsd.ads,
libgnarl/s-osinte__hpux.ads, libgnarl/s-osinte__kfreebsd-gnu.ads,
libgnarl/s-osinte__linux.ads, libgnarl/s-osinte__lynxos178e.ads,
libgnarl/s-osinte__qnx.ads, libgnarl/s-osinte__rtems.ads
(Relative_Timed_Wait): Remove.
* libgnarl/s-tpopmo.adb (Timed_Sleep, Timed_Delay): Rewrite to allow
for incremental looping. Remove references to Rel_Time and
Relative_Timed_Wait.
* libgnat/s-osprim__posix.adb, libgnat/s-osprim__posix2008.adb
(Timed_Delay): Make separate.
* libgnat/s-optide.adb: New separate procedure.
* libgnat/s-osprim.ads (Max_System_Delay): New constant.
* libgnat/s-osprim__lynxos.ads (Max_Sensible_Delay): Set to 6 months.
(Max_System_Delay): New constant.--- gcc/ada/libgnarl/s-osinte__aix.ads
+++ gcc/ada/libgnarl/s-osinte__aix.ads
@@ -420,9 +420,6 @@ package System.OS_Interface is
   abstime : access timespec) return int;
pragma Import (C, pthread_cond_timedwait, "pthread_cond_timedwait");
 
-   Relative_Timed_Wait : constant Boolean := False;
-   --  pthread_cond_timedwait requires an absolute delay time
-
--
-- POSIX.1c  Section 13 --
--

--- gcc/ada/libgnarl/s-osinte__android.ads
+++ gcc/ada/libgnarl/s-osinte__android.ads
@@ -414,9 +414,6 @@ package System.OS_Interface is
   abstime : access timespec) return int;
pragma Import (C, pthread_cond_timedwait, "pthread_cond_timedwait");
 
-   Relative_Timed_Wait : constant Boolean := False;
-   --  pthread_cond_timedwait requires an absolute delay time
-
--
-- POSIX.1c  Section 13 --
--

--- gcc/ada/libgnarl/s-osinte__darwin.ads
+++ gcc/ada/libgnarl/s-osinte__darwin.ads
@@ -397,9 +397,6 @@ package System.OS_Interface is
   abstime : access timespec) return int;
pragma Import (C, pthread_cond_timedwait, "pthread_cond_timedwait");
 
-   Relative_Timed_Wait : constant Boolean := False;
-   --  pthread_cond_timedwait requires an absolute delay time
-
--
-- POSIX.1c  Section 13 --
--

--- gcc/ada/libgnarl/s-osinte__freebsd.ads
+++ gcc/ada/libgnarl/s-osinte__freebsd.ads
@@ -431,9 +431,6 @@ package System.OS_Interface is
   abstime : access timespec) return int;
pragma Import (C, pthread_cond_timedwait, "pthread_cond_timedwait");
 
-   Relative_Timed_Wait : constant Boolean := False;
-   --  pthread_cond_timedwait requires an absolute delay time
-
--
-- POSIX.1c  Section 13 --
--

--- gcc/ada/libgnarl/s-osinte__hpux.ads
+++ gcc/ada/libgnarl/s-osinte__hpux.ads
@@ -400,9 +400,6 @@ package System.OS_Interface is
   abstime : access timespec) return int;
pragma Import (C, pthread_cond_timedwait, "pthread_cond_timedwait");
 
-   Relative_Timed_Wait : constant Boolean := False;
-   --  pthread_cond_timedwait requires an absolute delay time
-
--
-- POSIX.1c  Section 13 --
--

--- gcc/ada/libgnarl/s-osinte__kfreebsd-gnu.ads
+++ gcc/ada/libgnarl/s-osinte__kfreebsd-gnu.ads
@@ -430,9 +430,6 @@ package System.OS_Interface is
   abstime : access timespec) return int;
pragma Import (C, pthread_cond_timedwait, "pthread_cond_timedwait");
 
-   Relative_Timed_Wait : constant Boolean := False;
-   --  pthread_cond_timedwait requires an absolute delay time
-
--
-- POSIX.1c  Section 13 --
--

--- gcc/ada/libgnarl/s-osinte__linux.ads
+++ gcc/ada/libgnarl/s-osinte__linux.ads
@@ -448,9 +448,6 @@ package System.OS_Interface is
   abstime : access timespec) return int;
pragma Import (C, pthread_cond_timedwait, "pthread_cond_timedwait");
 
-   Relative_Timed_Wait : constant Boolean := False;
-   --  pthread_cond_timedwait requires an absolute delay time
-
--
-- POSIX.1c  Section 13 --
--

--- gcc/ada/libgnarl/s-osinte__lynxos178e.ads
+++ gcc/ada/libgnarl/s-osinte__lynxos178e.ads
@@ -420,9 +420,6 @@ package System.OS_Interface is
   abstime : access timespec) return int;
pragma Import (C, pthread_cond_timedwait, "pthread_cond_timedwait");
 
-   Relative_Timed_Wait : constant Boolean := False;
-   --  pthread_cond_timedwait requires an absolute delay time
-
--
-- POSIX.1c  Section 13 --
--

[Ada] Checks on instantiations with formal derived types with interfaces

[Pierre-Marie de Rodat]

This patch implements the rule stated in RM 12.5.5 : the actual shall be
a descendant of very progenitor of the formal type.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-05-25  Ed Schonberg  

gcc/ada/

* sem_ch12.adb (Validate_Derived_Type_Instance): Verify that the actual
for a formal derived type implements all the interfaces declared for
the formal.

gcc/testsuite/

* gnat.dg/interface6.adb: New testcase.--- gcc/ada/sem_ch12.adb
+++ gcc/ada/sem_ch12.adb
@@ -12356,6 +12356,48 @@ package body Sem_Ch12 is
  Ancestor_Discr : Entity_Id;
 
   begin
+ --  Verify that the actual includes the progenitors of the formal,
+ --  if any. The formal may depend on previous formals and their
+ --  instance, so we must examine instance of interfaces if present.
+ --  The actual may be an extension of an interface, in which case
+ --  it does not appear in the interface list, so this must be
+ --  checked separately.
+ --  We omit the check if the interface is declared in an (enclosing)
+ --  generic because the interface implemented by the actual may have
+ --  the same name but a different entity. A small remaining gap ???
+
+ if Present (Interface_List (Def)) then
+if not Has_Interfaces (Act_T) then
+   Error_Msg_NE
+ ("actual must implement all interfaces of formal&",
+   Actual, A_Gen_T);
+
+else
+   declare
+  Iface : Node_Id;
+  Iface_Ent : Entity_Id;
+
+   begin
+  Iface := First (Abstract_Interface_List (A_Gen_T));
+
+  while Present (Iface) loop
+ Iface_Ent := Get_Instance_Of (Entity (Iface));
+ if not Is_Progenitor (Iface_Ent, Act_T)
+ and then not Is_Ancestor (Iface_Ent, Act_T)
+ and then Ekind (Scope (Iface_Ent)) /= E_Generic_Package
+ then
+Error_Msg_Name_1 := Chars (Act_T);
+Error_Msg_NE
+  ("Actual% must implement interface&",
+Actual,  Etype (Iface));
+ end if;
+
+ Next (Iface);
+  end loop;
+   end;
+end if;
+ end if;
+
  --  If the parent type in the generic declaration is itself a previous
  --  formal type, then it is local to the generic and absent from the
  --  analyzed generic definition. In that case the ancestor is the

--- /dev/null
new file mode 100644
+++ gcc/testsuite/gnat.dg/interface6.adb
@@ -0,0 +1,44 @@
+--  { dg-do compile }
+
+procedure Interface6 is
+
+ type TI  is interface;
+ type TI2 is interface;
+
+ type Rec_Type is tagged null record;
+
+ type Rec_Type1 is new TI
+ with
+ record
+ A : Integer;
+ end record;
+
+ type Rec_Type2 is new Rec_Type1 and TI2
+ with
+ record
+ B : Integer;
+ end record;
+
+ type Rec_Type12 is new Rec_Type1 and TI and TI2
+ with
+ record
+ C : Integer;
+ end record;
+
+ generic
+ type T is new Rec_Type1 and TI2 with private;
+ procedure Test;
+
+ procedure Test is
+ begin
+ null;
+ end Test;
+
+ procedure Test_Instance1 is new Test (T => Rec_Type);  --  { dg-error "actual must implement all interfaces of formal \"T\"" }
+ procedure Test_Instance1 is new Test (T => Rec_Type1);  -- { dg-error "Actual \"Rec_Type1\" must implement interface \"TI2\"" }
+ procedure Test_Instance2 is new Test (T => Rec_Type2);
+ procedure Test_Instance12 is new Test (T => Rec_Type12);
+
+begin
+ null;
+end Interface6;

[Ada] Spurious secondary stack depletion

[Pierre-Marie de Rodat]

This patch reimplements the secondary stack allocation logic to eliminate an
issue which causes the memory index to overflow while the stack itself uses
very little memory, thus causing a spurious Storage_Error.

The issue in details:

The total amount of memory that the secondary stack can accomodate is dictated
by System.Parameters.Size_Type which is really an Integer, giving roughly 2 GB
of storage.

The secondary stack is comprised of multiple frames which logically form a
contiguous array of memory. Each frame maintans a range over which it operates,
where

   Low  bound = Previous frame's high bound + 1
   High bound = Previous frame's high bound + Frame size

The allocation logic starts by first checking whether the current top frame
(which may not be the "last" frame in the secondary stack) has enough memory to
fit an object. If it does, then that frame is used. If it does not, the logic
then examines the subsequent frames, while carrying out the following actions:

   * If the frame is too small to fit the object, it is deleted

   * If the frame is big enough to fit the object, it is used

If all the frames were too small (and thus deleted), a new frame is added which
is big enough to fit the object.

Due to an issue with the deletion logic, the last frame would never be deleted.
Since any new frame's range is based on the previous frame's range, the new
range would keep growing, even though the secondary stack may have very few
frames in use. Eventually this growth overflows the memory index type.

The overflow of the memory index type happens only when the secondary stack
is full, and thus signals a Storage_Error. Due to the spurious growth of the
ranges, the overflow happens much faster and results in a bogus stack depleton.

The issue manifests only when each new memory request to the secondary stack is
slightly bigger than the previous memory request, thus prompring the secondary
stack to delete all its frames, and create a new one.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-05-25  Hristian Kirtchev  

gcc/ada/

* libgnat/s-secsta.adb (SS_Allocate): Reimplemented.
(SS_Allocate_Dynamic): New routine. The allocation logic is now split
into three distring cases rather than in one loop which attempts to
handle all three cases. This rewrite eliminates an issue where the last
frame of the stack cannot be freed, thus causing the memory range of a
new frame to approach the overflow point of the memory index type.
Since the overflow is logically treated as a
too-much-memory-on-the-stack scenario, it causes a bogus Storage_Error.
(SS_Allocate_Static): New routine. The routine factorizes the static
secondary stack-related code from the former SS_Allocate.

gcc/testsuite/

* gnat.dg/sec_stack2.adb: New testcase.--- gcc/ada/libgnat/s-secsta.adb
+++ gcc/ada/libgnat/s-secsta.adb
@@ -33,152 +33,358 @@ pragma Compiler_Unit_Warning;
 
 with Ada.Unchecked_Conversion;
 with Ada.Unchecked_Deallocation;
-with System.Soft_Links;
 
-package body System.Secondary_Stack is
-
-   package SSL renames System.Soft_Links;
+with System.Parameters;   use System.Parameters;
+with System.Soft_Links;   use System.Soft_Links;
+with System.Storage_Elements; use System.Storage_Elements;
 
-   use type System.Parameters.Size_Type;
+package body System.Secondary_Stack is
 
procedure Free is new Ada.Unchecked_Deallocation (Chunk_Id, Chunk_Ptr);
--  Free a dynamically allocated chunk
 
+   procedure SS_Allocate_Dynamic
+ (Stack   : SS_Stack_Ptr;
+  Mem_Request : SS_Ptr;
+  Addr: out Address);
+   pragma Inline (SS_Allocate_Dynamic);
+   --  Allocate enough space on dynamic secondary stack Stack to accommodate an
+   --  object of size Mem_Request. Addr denotes the address where the object is
+   --  to be placed.
+
+   procedure SS_Allocate_Static
+ (Stack   : SS_Stack_Ptr;
+  Mem_Request : SS_Ptr;
+  Addr: out Address);
+   pragma Inline (SS_Allocate_Static);
+   --  Allocate enough space on static secondary stack Stack to accommodate an
+   --  object of size Mem_Request. Addr denotes the address where the object is
+   --  to be placed.
+
-
-- SS_Allocate --
-
 
procedure SS_Allocate
  (Addr : out Address;
-  Storage_Size : SSE.Storage_Count)
+  Storage_Size : Storage_Count)
is
-  use type System.Storage_Elements.Storage_Count;
+  function Round_Up (Size : Storage_Count) return SS_Ptr;
+  pragma Inline (Round_Up);
+  --  Round up Size to the nearest multiple of the maximum alignment on the
+  --  target.
+
+  function Round_Up_Overflows (Size : Storage_Count) return Boolean;
+  pragma Inline (Round_Up_Overflows);
+  --  Determine whether a round up of Size to the nearest multiple of the
+  --  maximum alignment will overflow the operation.
+
+  -

[Ada] Rewrite Iterate_Call_Parameters in more assertive style

[Pierre-Marie de Rodat]

The formal and actual parameters in a subprogram call must match each other.
This is now checked with assertion (so that we can detect possible mistakes),
while the production builds have less work to do. Semantics unchanged.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-05-25  Piotr Trojanek  

gcc/ada/

* sem_util.adb (Iterate_Call_Parameters): Rewrite with extra
assertions; replace function versions of Next_Formal/Next_Actual with
their procedural versions (which are more concise).--- gcc/ada/sem_util.adb
+++ gcc/ada/sem_util.adb
@@ -17882,11 +17882,14 @@ package body Sem_Util is
   Actual : Node_Id   := First_Actual (Call);
 
begin
-  while Present (Formal) and then Present (Actual) loop
+  while Present (Formal) loop
+ pragma Assert (Present (Formal));
  Handle_Parameter (Formal, Actual);
- Formal := Next_Formal (Formal);
- Actual := Next_Actual (Actual);
+ Next_Formal (Formal);
+ Next_Actual (Actual);
   end loop;
+
+  pragma Assert (No (Actual));
end Iterate_Call_Parameters;
 
---

[Ada] Disable the creation of the main task secondary stack by the binder

[Pierre-Marie de Rodat]

Users can now specify that the binder should not create a secondary stack for
the main (environment) task through the binder switch -Q0. This is useful for
ZFP runtime users who allocate secondary stacks for their application
themselves.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-05-25  Patrick Bernardi  

gcc/ada/

* switch-b.adb (Scan_Binder_Switches): binder switch -Q accepts Natural
numbers.--- gcc/ada/switch-b.adb
+++ gcc/ada/switch-b.adb
@@ -399,7 +399,7 @@ package body Switch.B is
 end if;
 
 Ptr := Ptr + 1;
-Scan_Pos
+Scan_Nat
   (Switch_Chars, Max, Ptr,
Quantity_Of_Default_Size_Sec_Stacks, C);
 

[Ada] Crash on classwide precondition on subprogram with stub

[Pierre-Marie de Rodat]

This patch allows the compiler to handle properly a classwide precondition
on a primitive operation whose body is a stub and a separate subunit.

Executing:

   gnatmake -gnata -q check
   ./check

must yield:

   precondition violated


with Text_IO;
with Msg_Data_Block_Decoder; use Msg_Data_Block_Decoder;
procedure Check is
   Thing : T_Msg_Data_Block_Decoder;
   Value : Integer;
begin
   begin
  Value := Get_Long_Term_Corrections (Thing);
   exception
  when others => Text_IO.Put_Line ("precondition violated");
   end;
end Check;

package Msg_Data_Block_Decoder is
   pragma Preelaborate;
   type T_Msg_Data_Block_Decoder is Tagged Limited null record;

   type T_Msg_Data_Block_Decoder_Class_Access is
   access all T_Msg_Data_Block_Decoder'Class;

   function Get_Decoded_Data (This : in T_Msg_Data_Block_Decoder)
  return Integer;

   function Get_Long_Term_Corrections
 (This : in T_Msg_Data_Block_Decoder) return Integer  with
   Pre'
Class => Get_Decoded_Data (T_Msg_Data_Block_Decoder'Class (This)) = 2;

end Msg_Data_Block_Decoder;

package body Msg_Data_Block_Decoder is

   function Get_Long_Term_Corrections (This : in T_Msg_Data_Block_Decoder)
   return Integer is separate;

   function Get_Decoded_Data (This : in T_Msg_Data_Block_Decoder)
 return Integer is
   begin
 return 0;
   end Get_Decoded_Data;

end Msg_Data_Block_Decoder;

separate (Msg_Data_Block_Decoder)
function Get_Long_Term_Corrections (This : in T_Msg_Data_Block_Decoder)
   return Integer is
begin
  return 0;
end Get_Long_Term_Corrections;

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-05-25  Ed Schonberg  

gcc/ada/

* sem_ch6.adb (Analyze_Subprogram_Body_Helper): Do not create
Class_Wide_Clone_Body when analyzing a subprogram_body_stub: the clone
is created when the proper body of the stub is analyzed.
* sem_util.adb (ZBuild_Class_Wide_Clone_Body): If the subprogram body
is the proper body of a subunit, the cloned body must be inserted in
the declarative list that contains the stub.--- gcc/ada/sem_ch6.adb
+++ gcc/ada/sem_ch6.adb
@@ -3844,10 +3844,13 @@ package body Sem_Ch6 is
   --  If the subprogram has a class-wide clone, build its body as a copy
   --  of the original body, and rewrite body of original subprogram as a
   --  wrapper that calls the clone.
+  --  If N is a stub, this construction will take place when the proper
+  --  body is analyzed.
 
   if Present (Spec_Id)
 and then Present (Class_Wide_Clone (Spec_Id))
 and then (Comes_From_Source (N) or else Was_Expression_Function (N))
+and then Nkind (N) /= N_Subprogram_Body_Stub
   then
  Build_Class_Wide_Clone_Body (Spec_Id, N);
 

--- gcc/ada/sem_util.adb
+++ gcc/ada/sem_util.adb
@@ -1365,7 +1365,18 @@ package body Sem_Util is
   --  (the original primitive may have carried one).
 
   Set_Must_Override (Specification (Clone_Body), False);
-  Insert_Before (Bod, Clone_Body);
+
+  --  If the subprogram body is the proper body of a stub, insert the
+  --  subprogram after the stub, i.e. the same declarative region as
+  --  the original sugprogram.
+
+  if Nkind (Parent (Bod)) = N_Subunit then
+ Insert_After (Corresponding_Stub (Parent (Bod)), Clone_Body);
+
+  else
+ Insert_Before (Bod, Clone_Body);
+  end if;
+
   Analyze (Clone_Body);
end Build_Class_Wide_Clone_Body;
 

[Ada] Membership test of class-wide interface

[Pierre-Marie de Rodat]

The compiler rejects the use of a membership test when the left operand
is a class-wide interface type object and the right operand is not a
class-wide type.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-05-25  Javier Miranda  

gcc/ada/

* sem_res.adb (Resolve_Membership_Op): Allow the use of the membership
test when the left operand is a class-wide interface and the right
operand is not a class-wide type.
* exp_ch4.adb (Tagged_Membership): Adding support for interface as the
left operand.

gcc/testsuite/

* gnat.dg/interface7.adb: New testcase.--- gcc/ada/exp_ch4.adb
+++ gcc/ada/exp_ch4.adb
@@ -13891,7 +13891,7 @@ package body Exp_Ch4 is
   Selector_Name =>
 New_Occurrence_Of (First_Tag_Component (Left_Type), Loc));
 
-  if Is_Class_Wide_Type (Right_Type) then
+  if Is_Class_Wide_Type (Right_Type) or else Is_Interface (Left_Type) then
 
  --  No need to issue a run-time check if we statically know that the
  --  result of this membership test is always true. For example,

--- gcc/ada/sem_res.adb
+++ gcc/ada/sem_res.adb
@@ -9032,7 +9032,6 @@ package body Sem_Res is
   elsif Ada_Version >= Ada_2005
 and then Is_Class_Wide_Type (Etype (L))
 and then Is_Interface (Etype (L))
-and then Is_Class_Wide_Type (Etype (R))
 and then not Is_Interface (Etype (R))
   then
  return;

--- /dev/null
new file mode 100644
+++ gcc/testsuite/gnat.dg/interface7.adb
@@ -0,0 +1,16 @@
+--  { dg-do compile }
+
+procedure Interface7 is
+   type I_Type is interface;
+
+   type A1_Type is tagged null record;
+   type A2_Type is new A1_Type and I_Type with null record;
+
+   procedure Test (X : I_Type'Class) is
+   begin
+  if X in A2_Type then   --  Test
+ null;
+  end if;
+   end Test;
+
+begin null; end;