[gcc r16-4046] Widen-Mul: Fix typo assignment in build_and_insert_cast [PR122031]

[Pan Li via Gcc-cvs]

https://gcc.gnu.org/g:5756c9816ed4481d12480b620fb44f0cbbf1e4ad

commit r16-4046-g5756c9816ed4481d12480b620fb44f0cbbf1e4ad
Author: Pan Li 
Date:   Tue Sep 23 09:51:14 2025 +0800

Widen-Mul: Fix typo assignment in build_and_insert_cast [PR122031]

The previous fix for PR122021 introduces a typo that the assignment
to the var itself.  This PR would like to fix the typo, and sorry for
my silly mistake.

The below test suites are passed for this patch:
1. The rv64gcv fully regression tests.
2. The x86 bootstrap tests.
3. The x86 fully regression tests.

PR middle-end/122031

gcc/ChangeLog:

* tree-ssa-math-opts.cc (build_and_insert_cast): Fix the typo
of self assignment.

Signed-off-by: Pan Li 

Diff:
---
 gcc/tree-ssa-math-opts.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/tree-ssa-math-opts.cc b/gcc/tree-ssa-math-opts.cc
index 80d10d26f678..a9903b691a49 100644
--- a/gcc/tree-ssa-math-opts.cc
+++ b/gcc/tree-ssa-math-opts.cc
@@ -1658,7 +1658,7 @@ build_and_insert_cast (gimple_stmt_iterator *gsi, 
location_t loc,
  /* Aka any sign extend from small to big size */
  if (!((val_prec > rhs_prec && !unsigned_val_p && !unsigned_rhs_p)
  || (type_prec > val_prec && !unsigned_p && !unsigned_val_p)))
-   rhs = rhs;
+   rhs = cast_rhs;
}
}
 }

[gcc r16-4067] RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for mul

[Pan Li via Gcc-cvs]

https://gcc.gnu.org/g:1617b9e1bbd967959d1f0cfd428137cf1da1e34c

commit r16-4067-g1617b9e1bbd967959d1f0cfd428137cf1da1e34c
Author: Pan Li 
Date:   Fri Sep 19 14:54:48 2025 +0800

RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for mul

Add test case for both the run and asm check of mul based SAT_MUL.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_u_mul-6-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-6-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_mul-6-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-6-u8-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-6-u8-from-u64.rv64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-6-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-6-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-6-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u64.c: New test.

Signed-off-by: Pan Li 

Diff:
---
 .../gcc.target/riscv/sat/sat_u_mul-6-u16-from-u32.c  | 11 +++
 .../gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv32.c | 11 +++
 .../gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv64.c | 11 +++
 .../gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv32.c | 11 +++
 .../gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv64.c | 11 +++
 .../gcc.target/riscv/sat/sat_u_mul-6-u8-from-u16.c   | 11 +++
 .../gcc.target/riscv/sat/sat_u_mul-6-u8-from-u32.c   | 11 +++
 .../gcc.target/riscv/sat/sat_u_mul-6-u8-from-u64.rv32.c  | 11 +++
 .../gcc.target/riscv/sat/sat_u_mul-6-u8-from-u64.rv64.c  | 11 +++
 .../gcc.target/riscv/sat/sat_u_mul-run-6-u16-from-u32.c  | 16 
 .../gcc.target/riscv/sat/sat_u_mul-run-6-u16-from-u64.c  | 16 
 .../gcc.target/riscv/sat/sat_u_mul-run-6-u32-from-u64.c  | 16 
 .../gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u16.c   | 16 
 .../gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u32.c   | 16 
 .../gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u64.c   | 16 
 15 files changed, 195 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u32.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u32.c
new file mode 100644
index ..6e186a02d578
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint16_t
+#define WT uint32_t
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv32.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv32.c
new file mode 100644
index ..8c3ec20df5dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc -mabi=ilp32 -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint16_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv64.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv64.c
new file mode 100644
index ..5233bde4d7ee
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv64.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint16_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv32.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv32.c
new file mode 100644
index ..b5ed463db08a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc -mabi=ilp32 -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint32_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+/* { dg-fina

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Correction régression class_result_10.f90

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:f2dd14273480ab0145a7931e1be1bf3cfae0e935

commit f2dd14273480ab0145a7931e1be1bf3cfae0e935
Author: Mikael Morin 
Date:   Tue Sep 23 18:55:08 2025 +0200

Correction régression class_result_10.f90

Diff:
---
 gcc/fortran/trans-array.cc | 25 ++---
 gcc/fortran/trans-expr.cc  |  4 +++-
 gcc/fortran/trans.cc   | 16 +---
 gcc/fortran/trans.h|  2 +-
 4 files changed, 31 insertions(+), 16 deletions(-)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index cea098c5a94e..22db090d62d8 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -3641,7 +3641,8 @@ conv_array_index_offset (gfc_se * se, gfc_ss * ss, int 
dim, int i,
 
 
 static bool
-is_class_array_ref (tree base, gfc_expr *expr, tree *class_descr)
+is_class_array_ref (gfc_se *se, tree base, gfc_expr *expr, gfc_array_ref *ar,
+   tree *class_descr)
 {
   tree decl = NULL_TREE;
   tree tmp;
@@ -3649,6 +3650,15 @@ is_class_array_ref (tree base, gfc_expr *expr, tree 
*class_descr)
   gfc_typespec *ts;
   gfc_symbol *sym;
 
+  if (se->class_container)
+{
+  if (class_descr)
+   *class_descr = se->class_container;
+  return true;
+}
+  else if (ar && ar->type == AR_ELEMENT)
+return false;
+
   tmp = !VAR_P (base) ? gfc_get_class_from_expr (base) : NULL_TREE;
 
   if (tmp != NULL_TREE)
@@ -3714,12 +3724,13 @@ give_up:
 /* Build a scalarized array reference using the vptr 'size'.  */
 
 static bool
-build_class_array_ref (gfc_se *se, tree base, gfc_expr * expr, tree index)
+build_class_array_ref (gfc_se *se, tree base, gfc_expr * expr,
+  gfc_array_ref *ar, tree index)
 {
   tree size;
   tree decl = NULL_TREE;
 
-  if (!is_class_array_ref (base, expr, &decl))
+  if (!is_class_array_ref (se, base, expr, ar, &decl))
 return false;
 
   se->class_vptr = gfc_evaluate_now (gfc_class_vptr_get (decl), &se->pre);
@@ -3795,7 +3806,7 @@ enum gfc_array_ref_sort
 
 
 static gfc_array_ref_sort
-classify_array_ref (tree array, tree ref_base, gfc_expr *expr,
+classify_array_ref (gfc_se *se, tree array, tree ref_base, gfc_expr *expr,
gfc_array_ref *ar, bool tmp_array)
 {
   if (ar && ar->dimen == 0 && ar->codimen != 0)
@@ -3834,7 +3845,7 @@ classify_array_ref (tree array, tree ref_base, gfc_expr 
*expr,
return ARS_CLASS_PTR_ARITH;
}
 }
-  else if (is_class_array_ref (ref_base, expr, nullptr))
+  else if (is_class_array_ref (se, ref_base, expr, ar, nullptr))
 return ARS_CLASS_PTR_ARITH;
 
   if (tmp_array || non_negative_strides_array_p (array))
@@ -3848,11 +3859,11 @@ static void
 build_array_ref (gfc_se *se, tree array, tree ref_base, gfc_expr *expr,
 gfc_array_ref *ar, bool is_temp_array, tree index)
 {
-  switch (classify_array_ref (array, ref_base, expr, ar, is_temp_array))
+  switch (classify_array_ref (se, array, ref_base, expr, ar, is_temp_array))
 {
 case ARS_CLASS_PTR_ARITH:
   {
-   bool success = build_class_array_ref (se, ref_base, expr, index);
+   bool success = build_class_array_ref (se, ref_base, expr, ar, index);
gcc_assert (success);
   }
   break;
diff --git a/gcc/fortran/trans-expr.cc b/gcc/fortran/trans-expr.cc
index d6130bae5292..c2d5730a9d78 100644
--- a/gcc/fortran/trans-expr.cc
+++ b/gcc/fortran/trans-expr.cc
@@ -671,7 +671,7 @@ gfc_reset_len (stmtblock_t *block, gfc_expr *expr)
for expressions other than variables.  */
 
 tree
-gfc_get_class_from_gfc_expr (gfc_expr *e)
+gfc_get_class_from_gfc_expr (gfc_expr *e, stmtblock_t *pre_block)
 {
   gfc_expr *class_expr;
   gfc_se cse;
@@ -681,6 +681,8 @@ gfc_get_class_from_gfc_expr (gfc_expr *e)
   gfc_init_se (&cse, NULL);
   gfc_conv_expr (&cse, class_expr);
   gfc_free_expr (class_expr);
+  if (pre_block)
+gfc_add_block_to_block (pre_block, &cse.pre);
   return cse.expr;
 }
 
diff --git a/gcc/fortran/trans.cc b/gcc/fortran/trans.cc
index 66c0bf28f06b..adb8eea70198 100644
--- a/gcc/fortran/trans.cc
+++ b/gcc/fortran/trans.cc
@@ -1422,14 +1422,14 @@ gfc_add_finalizer_call (stmtblock_t *block, gfc_expr 
*expr2,
   expr->corank = CLASS_DATA (expr2->symtree->n.sym)->as->corank;
 }
 
-  stmtblock_t tmp_block;
-  gfc_start_block (&tmp_block);
-
   gfc_se final_se;
   gfc_init_se (&final_se, NULL);
   get_final_proc_ref (&final_se, expr, class_container);
   gfc_add_block_to_block (block, &final_se.pre);
 
+  stmtblock_t tmp_block;
+  gfc_start_block (&tmp_block);
+
   gfc_se size_se;
   gfc_init_se (&size_se, NULL);
   get_elem_size (&size_se, expr, class_container);
@@ -1507,8 +1507,6 @@ gfc_assignment_finalizer_call (gfc_se *lse, gfc_expr 
*expr1, bool init_flag)
   gfc_se se;
   gfc_symbol *sym = expr1->symtree->n.sym;
   gfc_ref *ref = expr1->ref;
-  stmtblock_t final_block;
-  gfc_init_block (&final_block);
   gfc_expr *finalize_expr;
   bool class_array_ref;
 
@@ -1544,6 +1542,8 @@ gfc_assignment_finalizer_call (gfc_se *lse, 

[gcc(refs/users/meissner/heads/work222-bugs)] Fix PR 118541, do not generate floating point cmoves for IEEE compares.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:b9f22ff5de18d62c0185e7b79818f7f8d8befaf2

commit b9f22ff5de18d62c0185e7b79818f7f8d8befaf2
Author: Michael Meissner 
Date:   Tue Sep 23 18:26:26 2025 -0400

Fix PR 118541, do not generate floating point cmoves for IEEE compares.

In bug PR target/118541 on power9, power10, and power11 systems, for the
function:

extern double __ieee754_acos (double);

double
__acospi (double x)
{
  double ret = __ieee754_acos (x) / 3.14;
  return __builtin_isgreater (ret, 1.0) ? 1.0 : ret;
}

GCC currently generates the following code:

Power9  Power10 and Power11
==  ===
bl __ieee754_acos   bl __ieee754_acos@notoc
nop plfd 0,.LC0@pcrel
addis 9,2,.LC2@toc@ha   xxspltidp 12,1065353216
addi 1,1,32 addi 1,1,32
lfd 0,.LC2@toc@l(9) ld 0,16(1)
addis 9,2,.LC0@toc@ha   fdiv 0,1,0
ld 0,16(1)  mtlr 0
lfd 12,.LC0@toc@l(9)xscmpgtdp 1,0,12
fdiv 0,1,0  xxsel 1,0,12,1
mtlr 0  blr
xscmpgtdp 1,0,12
xxsel 1,0,12,1
blr

This is because ifcvt.cc optimizes the conditional floating point move to 
use the
XSCMPGTDP instruction.

However, the XSCMPGTDP instruction will generate an interrupt if one of the
arguments is a signalling NaN and signalling NaNs can generate an interrupt.
The IEEE comparison functions (isgreater, etc.) require that the comparison 
not
raise an interrupt.

This patch just eliminates the generation of XSCMPEQDP, XSCMPEQQP, 
XSCMPGTDP,
XSCMPGTQP, XSCMPGEDP, and XSCMPGEQP instructions.

2025-09-23  Michael Meissner  

gcc/

PR target/118541
* config/rs6000/predicates.md (fpmask_comparison_operator): Delete
predicate.
(invert_fpmask_comparison_operator): Likewise.
* config/rs6000/rs6000.cc (rs6000_maybe_emit_fp_cmove): Delete 
function.
(have_fp_minc_maxc): Rename from have_compare_and_set_mask since we 
no
longer generate the floating point compare and set mask 
instructions,
but we also need the test for floating point min/max.
(rs6000_emit_cmove): Delete support for generating floating point
compare and set mask instructions since those instructions can raise
NaN exceptions.
* config/rs6000/rs6000.md (movcc_p9): Delete
insn.
(fpmask, SFDF iterator): Likewise.
(xxsel): Likewise.
(movcc_p10): Likewise.
(movcc_invert_p10): Likewise.
(fpmask, IEEE128 iterator): Likewise.

gcc/testsuite/

PR target/118541
* gcc.target/powerpc/p9-minmax-2.c: Remove tests for floating point
compare and mask instructions.
* gcc.target/powerpc/float128-cmove.c: Delete test.
* gcc.target/powerpc/p9-minmax-1.c: Likewise.

Diff:
---
 gcc/config/rs6000/predicates.md   |  11 --
 gcc/config/rs6000/rs6000.cc   | 108 +--
 gcc/config/rs6000/rs6000.md   | 210 ++
 gcc/testsuite/gcc.target/powerpc/float128-cmove.c |  58 --
 gcc/testsuite/gcc.target/powerpc/p9-minmax-1.c| 170 --
 gcc/testsuite/gcc.target/powerpc/p9-minmax-2.c| 175 +-
 6 files changed, 27 insertions(+), 705 deletions(-)

diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 647e89afb6a7..065cdb10e10f 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -1458,17 +1458,6 @@
   (and (match_operand 0 "branch_comparison_operator")
(match_code "ne,le,ge,leu,geu,ordered")))
 
-;; Return 1 if OP is a comparison operator suitable for floating point
-;; vector/scalar comparisons that generate a -1/0 mask.
-(define_predicate "fpmask_comparison_operator"
-  (match_code "eq,gt,ge"))
-
-;; Return 1 if OP is a comparison operator suitable for vector/scalar
-;; comparisons that generate a 0/-1 mask (i.e. the inverse of
-;; fpmask_comparison_operator).
-(define_predicate "invert_fpmask_comparison_operator"
-  (match_code "ne,unlt,unle"))
-
 ;; Return 1 if OP is a comparison operation suitable for integer vector/scalar
 ;; comparisons that generate a -1/0 mask.
 (define_predicate "vecint_comparison_operator"
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 45446fe4330d..758fd7b11ca1 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -16352,98 +16352,11 @@ rs6000_maybe_emit_max

[gcc(refs/users/meissner/heads/work222-bugs)] PR target/108958 -- simplify mtvsrdd to zero extend GPR DImode to VSX TImode

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:76d35163549a62e0dca458fe1ab7ca65d6614841

commit 76d35163549a62e0dca458fe1ab7ca65d6614841
Author: Michael Meissner 
Date:   Tue Sep 23 18:24:05 2025 -0400

PR target/108958 -- simplify mtvsrdd to zero extend GPR DImode to VSX TImode

Before this patch GCC would zero extend a DImode GPR value to TImode by 
first
zero extending the DImode value into a GPR TImode register pair, and then 
do a
MTVSRDD to move this value to a VSX register.

For example, consider the following code:

#ifndef TYPE
#define TYPE unsigned long long
#endif

void
gpr_to_vsx (TYPE x, __uint128_t *p)
{
  __uint128_t y = x;
  __asm__ (" # %x0" : "+wa" (y));
  *p = y;
}

Currently GCC generates:

gpr_to_vsx:
mr 10,3
li 11,0
mtvsrdd 0,11,10
#APP
 # 0
#NO_APP
stxv 0,0(4)
blr

I.e. the mr and li instructions create the zero extended TImode value
in a GPR, and then the mtvsrdd instruction moves both registers into a
single vector register.

Instead, GCC should generate the following code.  Since the mtvsrdd
instruction will clear the upper 64 bits if the 2nd argument is 0
(non-zero values are a GPR to put in the upper 64 bits):

gpr_to_vsx:
mtvsrdd 0,0,3
#APP
 # 0
#NO_APP
stxv 0,0(4)
blr

Originally, I posted a patch that added the zero_extendsiti2 insn.  I
got some pushback about using reload_completed in the split portion of
the define_insn_and_split.  However, this is a case where you
absolutely have to use the reload_completed test, because if you split
the code before register allocation to handle the normal, the split
insns will not be compiled to generate the appropriate mtvsrdd without
creating the TImode value in the GPR register.  I can imagine there
might be concern about favoring generating code using the vector
registers instead of using the GPR registers if the code does not
require the TImode value to be in a vector register.

I completely rewrote the patch.  This patch creates a peephole2 to
catch this case, and it eliminates creating the TImode variable.
Instead it just does the MTVSRDD instruction directly.  That way it
will not influence register allocation, and the code will only be
generated in the specific case where we need the TImode value in a
vector register.

I have built GCC with the patches in this patch set applied on both
little and big endian PowerPC systems and there were no regressions.
Can I apply this patch to GCC 16?

2025-09-23  Michael Meissner  

gcc/

PR target/108958
* config/rs6000/rs6000.md (UNSPEC_ZERO_EXTEND): New unspec.
(zero_extendsiti2 peephole2): Add a peephole2 to simplify zero
extend between DImode value in a GPR to a TImode target in a
vector register.
(zero_extendsiti2_vsx): New insn.

gcc/testsuite/

PR target/108958
* gcc.target/powerpc/pr108958.c: New test.

Diff:
---
 gcc/config/rs6000/rs6000.md | 26 
 gcc/testsuite/gcc.target/powerpc/pr108958.c | 47 +
 2 files changed, 73 insertions(+)

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 128c6c339a9e..5b20d992a720 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -173,6 +173,7 @@
UNSPEC_XXSPLTIW_CONST
UNSPEC_FMAX
UNSPEC_FMIN
+   UNSPEC_ZERO_EXTEND
   ])
 
 ;;
@@ -969,6 +970,31 @@
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
 
+;; Optimize zero_extendsiti2 from a GPR to a GPR and then moving the GPR to a
+;; VSX register
+(define_peephole2
+  [(set (match_operand:DI 0 "int_reg_operand")
+   (match_operand:DI 1 "int_reg_operand"))
+   (set (match_operand:DI 2 "int_reg_operand")
+   (const_int 0))
+   (set (match_operand:TI 3 "vsx_register_operand")
+   (match_operand:TI 4 "int_reg_operand"))]
+  "TARGET_DIRECT_MOVE_64BIT
+   && (reg_or_subregno (operands[0])
+   == reg_or_subregno (operands[4]) + !!WORDS_BIG_ENDIAN)
+   && (reg_or_subregno (operands[2])
+   == reg_or_subregno (operands[4]) + !WORDS_BIG_ENDIAN)
+   && peep2_reg_dead_p (3, operands[4])"
+  [(set (match_dup 3)
+   (unspec:TI [(match_dup 1)] UNSPEC_ZERO_EXTEND))])
+
+(define_insn "*zero_extendsiti2_vsx"
+  [(set (match_operand:TI 0 "vsx_register_operand" "=wa")
+   (unspec:TI [(match_operand:DI 1 "int_reg_operand" "r")]
+  UNSPEC_ZERO_EXTEND))]
+  "TARGET_DIRECT_MOVE_64BIT"
+  "mtvsrdd %x0,0,%

[gcc(refs/users/meissner/heads/work222-bugs)] PR 992493: Optimize splat of a V2DF/V2DI extract with constant element

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:83851d1e0e991e4f39c72125b61ad505c5d09dd8

commit 83851d1e0e991e4f39c72125b61ad505c5d09dd8
Author: Michael Meissner 
Date:   Tue Sep 23 18:22:21 2025 -0400

PR 992493: Optimize splat of a V2DF/V2DI extract with constant element

We had optimizations for splat of a vector extract for the other vector
types, but we missed having one for V2DI and V2DF.  This patch adds a
combiner insn to do this optimization.

In looking at the source, we had similar optimizations for V4SI and V4SF
extract and splats, but we missed doing V2DI/V2DF.

Without the patch for the code:

vector long long splat_dup_l_0 (vector long long v)
{
  return __builtin_vec_splats (__builtin_vec_extract (v, 0));
}

the compiler generates (on a little endian power9):

splat_dup_l_0:
mfvsrld 9,34
mtvsrdd 34,9,9
blr

Now it generates:

splat_dup_l_0:
xxpermdi 34,34,34,3
blr

2025-09-23  Michael Meissner  

gcc/

PR target/99293
* config/rs6000/vsx.md (vsx_splat_extract_): New insn.

gcc/testsuite/

PR target/99293
* gcc.target/powerpc/builtins-1.c: Adjust insn count.
* gcc.target/powerpc/pr99293.c: New test.

Diff:
---
 gcc/config/rs6000/vsx.md  | 18 ++
 gcc/testsuite/gcc.target/powerpc/builtins-1.c |  2 +-
 gcc/testsuite/gcc.target/powerpc/pr99293.c| 22 ++
 3 files changed, 41 insertions(+), 1 deletion(-)

diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 0082a36831a5..f47c4e2f7766 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -4798,6 +4798,24 @@
   "lxvdsx %x0,%y1"
   [(set_attr "type" "vecload")])
 
+;; Optimize SPLAT of an extract from a V2DF/V2DI vector with a constant element
+(define_insn "*vsx_splat_extract_"
+  [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wa")
+   (vec_duplicate:VSX_D
+(vec_select:
+ (match_operand:VSX_D 1 "vsx_register_operand" "wa")
+ (parallel [(match_operand 2 "const_0_to_1_operand" "n")]]
+  "VECTOR_MEM_VSX_P (mode)"
+{
+  int which_word = INTVAL (operands[2]);
+  if (!BYTES_BIG_ENDIAN)
+which_word = 1 - which_word;
+
+  operands[3] = GEN_INT (which_word ? 3 : 0);
+  return "xxpermdi %x0,%x1,%x1,%3";
+}
+  [(set_attr "type" "vecperm")])
+
 ;; V4SI splat support
 (define_insn "vsx_splat_v4si"
   [(set (match_operand:V4SI 0 "vsx_register_operand" "=wa,wa")
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-1.c 
b/gcc/testsuite/gcc.target/powerpc/builtins-1.c
index 8410a5fd4319..4e7e5384675f 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-1.c
@@ -1035,4 +1035,4 @@ foo156 (vector unsigned short usa)
 /* { dg-final { scan-assembler-times {\mvmrglb\M} 3 } } */
 /* { dg-final { scan-assembler-times {\mvmrgew\M} 4 } } */
 /* { dg-final { scan-assembler-times {\mvsplth|xxsplth\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mxxpermdi\M} 44 } } */
+/* { dg-final { scan-assembler-times {\mxxpermdi\M} 42 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr99293.c 
b/gcc/testsuite/gcc.target/powerpc/pr99293.c
new file mode 100644
index ..20adc1f27f65
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr99293.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target powerpc*-*-* } } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-O2 -mvsx" } */
+
+/* Test for PR 99263, which wants to do:
+   __builtin_vec_splats (__builtin_vec_extract (v, n))
+
+   where v is a V2DF or V2DI vector and n is either 0 or 1.  Previously the
+   compiler would do a direct move to the GPR registers to select the item and 
a
+   direct move from the GPR registers to do the splat.  */
+
+vector long long splat_dup_l_0 (vector long long v)
+{
+  return __builtin_vec_splats (__builtin_vec_extract (v, 0));
+}
+
+vector long long splat_dup_l_1 (vector long long v)
+{
+  return __builtin_vec_splats (__builtin_vec_extract (v, 1));
+}
+
+/* { dg-final { scan-assembler-times "xxpermdi" 2 } } */

[gcc(refs/users/meissner/heads/work222-bugs)] Update ChangeLog.*

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:7db7595b655d4b6f1801793190159478b1060022

commit 7db7595b655d4b6f1801793190159478b1060022
Author: Michael Meissner 
Date:   Tue Sep 23 18:29:07 2025 -0400

Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.bugs | 408 +
 1 file changed, 408 insertions(+)

diff --git a/gcc/ChangeLog.bugs b/gcc/ChangeLog.bugs
index 6041f1156457..ef1990c2da31 100644
--- a/gcc/ChangeLog.bugs
+++ b/gcc/ChangeLog.bugs
@@ -1,3 +1,411 @@
+ Branch work222-bugs, patch #110 
+
+Fix PR 118541, do not generate floating point cmoves for IEEE compares.
+
+In bug PR target/118541 on power9, power10, and power11 systems, for the
+function:
+
+extern double __ieee754_acos (double);
+
+double
+__acospi (double x)
+{
+  double ret = __ieee754_acos (x) / 3.14;
+  return __builtin_isgreater (ret, 1.0) ? 1.0 : ret;
+}
+
+GCC currently generates the following code:
+
+Power9  Power10 and Power11
+==  ===
+bl __ieee754_acos   bl __ieee754_acos@notoc
+nop plfd 0,.LC0@pcrel
+addis 9,2,.LC2@toc@ha   xxspltidp 12,1065353216
+addi 1,1,32 addi 1,1,32
+lfd 0,.LC2@toc@l(9) ld 0,16(1)
+addis 9,2,.LC0@toc@ha   fdiv 0,1,0
+ld 0,16(1)  mtlr 0
+lfd 12,.LC0@toc@l(9)xscmpgtdp 1,0,12
+fdiv 0,1,0  xxsel 1,0,12,1
+mtlr 0  blr
+xscmpgtdp 1,0,12
+xxsel 1,0,12,1
+blr
+
+This is because ifcvt.cc optimizes the conditional floating point move to use 
the
+XSCMPGTDP instruction.
+
+However, the XSCMPGTDP instruction will generate an interrupt if one of the
+arguments is a signalling NaN and signalling NaNs can generate an interrupt.
+The IEEE comparison functions (isgreater, etc.) require that the comparison not
+raise an interrupt.
+
+This patch just eliminates the generation of XSCMPEQDP, XSCMPEQQP, XSCMPGTDP,
+XSCMPGTQP, XSCMPGEDP, and XSCMPGEQP instructions.
+
+2025-09-23  Michael Meissner  
+
+gcc/
+
+   PR target/118541
+   * config/rs6000/predicates.md (fpmask_comparison_operator): Delete
+   predicate.
+   (invert_fpmask_comparison_operator): Likewise.
+   * config/rs6000/rs6000.cc (rs6000_maybe_emit_fp_cmove): Delete function.
+   (have_fp_minc_maxc): Rename from have_compare_and_set_mask since we no
+   longer generate the floating point compare and set mask instructions,
+   but we also need the test for floating point min/max.
+   (rs6000_emit_cmove): Delete support for generating floating point
+   compare and set mask instructions since those instructions can raise
+   NaN exceptions.
+   * config/rs6000/rs6000.md (movcc_p9): Delete
+   insn.
+   (fpmask, SFDF iterator): Likewise.
+   (xxsel): Likewise.
+   (movcc_p10): Likewise.
+   (movcc_invert_p10): Likewise.
+   (fpmask, IEEE128 iterator): Likewise.
+
+gcc/testsuite/
+
+   PR target/118541
+   * gcc.target/powerpc/p9-minmax-2.c: Remove tests for floating point
+   compare and mask instructions.
+   * gcc.target/powerpc/float128-cmove.c: Delete test.
+   * gcc.target/powerpc/p9-minmax-1.c: Likewise.
+
+ Branch work222-bugs, patch #104 
+
+PR target/120681 - allow -mcmodel=large with PC relative addressing
+
+When I implemented the pc-relative support for power10 in GCC, I
+disabled using pc-relative support for -mcmodel=large.  At the time, I
+didn't want to dig into the issues.  It is now time to allow
+-mcmodel=large to generate pc-relative code.
+
+This patch allows -mcmodel=large to use prefixed addressing on power10,
+power11, and possibly other future PowerPC processors in addition to
+the current -mcmodel=medium support.
+
+2025-09-23  Michael Meissner  
+
+gcc/
+
+   PR target/120681
+   * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Allow large
+   code model as well as medium code model.
+   * config/rs6000/rs6000.cc (rs6000_option_override_internal):
+   Likewise.
+   (rs6000_elf_declare_function_name): Don't create the
+   local/non-local labels for large code model if we are using
+   PC-relative addressing.
+
+gcc/testsuite/
+
+   PR target/120681
+   * gcc.target/powerpc/pr120681.c: New test.
+
+ Branch work222-bugs, patch #103 
+
+PR target/108958 -- simplify mtvsrdd to zero extend GPR DImode to VSX TImode
+
+Before this patch GCC would zero extend a DImode GPR value to TImode by first
+zero extending the DImode value into a GPR TImode register pair, and then do a
+MTVSRDD to move this value to a VSX register.
+
+For example, consider the following code:
+
+   #i

[gcc r16-4061] libstdc++: fix element construction in std::deque::emplace [PR118087]

[Jonathan Wakely via Libstdc++-cvs]

https://gcc.gnu.org/g:52d702d72afa0ade8edfff144b45539495e4d408

commit r16-4061-g52d702d72afa0ade8edfff144b45539495e4d408
Author: Ben Wu 
Date:   Thu Sep 18 17:25:41 2025 -0700

libstdc++: fix element construction in std::deque::emplace [PR118087]

In order to emplace a value in the middle of a deque, a temporary was
previously constructed directly with __args... in _M_emplace_aux.
This would not work since std::deque is allocator-aware and should
construct elements with _Alloc_traits::construct instead before the
element is moved.

Using the suggestion in PR118087, we can define _Temporary_value
similar to the one used in std::vector, so the temporary can be
constructed with uses-allocator construction.

PR libstdc++/118087

libstdc++-v3/ChangeLog:

* include/bits/deque.tcc: Use _Temporary_value in
_M_emplace_aux.
* include/bits/stl_deque.h: Introduce _Temporary_value.
* testsuite/23_containers/deque/modifiers/emplace/118087.cc:
New test.

Reviewed-by: Jonathan Wakely 
Signed-off-by: Ben Wu 

Diff:
---
 libstdc++-v3/include/bits/deque.tcc| 11 +-
 libstdc++-v3/include/bits/stl_deque.h  | 29 +++
 .../deque/modifiers/emplace/118087.cc  | 43 ++
 3 files changed, 81 insertions(+), 2 deletions(-)

diff --git a/libstdc++-v3/include/bits/deque.tcc 
b/libstdc++-v3/include/bits/deque.tcc
index dabb6ec53659..c15b046691ea 100644
--- a/libstdc++-v3/include/bits/deque.tcc
+++ b/libstdc++-v3/include/bits/deque.tcc
@@ -664,7 +664,10 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
   deque<_Tp, _Alloc>::
   _M_emplace_aux(iterator __pos, _Args&&... __args)
   {
-   value_type __x_copy(std::forward<_Args>(__args)...); // XXX copy
+   // We should construct this temporary while the deque is
+   // in its current state in case something in __args...
+   // depends on that state before shuffling elements around.
+   _Temporary_value __tmp(this, std::forward<_Args>(__args)...);
 #else
 typename deque<_Tp, _Alloc>::iterator
   deque<_Tp, _Alloc>::
@@ -695,7 +698,11 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
__pos = this->_M_impl._M_start + __index;
_GLIBCXX_MOVE_BACKWARD3(__pos, __back2, __back1);
  }
-   *__pos = _GLIBCXX_MOVE(__x_copy);
+#if __cplusplus >= 201103L
+   *__pos = std::move(__tmp._M_val());
+#else
+   *__pos = __x_copy;
+#endif
return __pos;
   }
 
diff --git a/libstdc++-v3/include/bits/stl_deque.h 
b/libstdc++-v3/include/bits/stl_deque.h
index 7055641ad4ea..7cc711efca8a 100644
--- a/libstdc++-v3/include/bits/stl_deque.h
+++ b/libstdc++-v3/include/bits/stl_deque.h
@@ -2163,6 +2163,35 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
   iterator
   _M_insert_aux(iterator __pos, const value_type& __x);
 #else
+  struct _Temporary_value
+  {
+   template
+ _GLIBCXX20_CONSTEXPR explicit
+ _Temporary_value(deque* __deque, _Args&&... __args) : _M_this(__deque)
+ {
+   _Alloc_traits::construct(_M_this->_M_impl, _M_ptr(),
+std::forward<_Args>(__args)...);
+ }
+
+   _GLIBCXX20_CONSTEXPR
+   ~_Temporary_value()
+   { _Alloc_traits::destroy(_M_this->_M_impl, _M_ptr()); }
+
+   _GLIBCXX20_CONSTEXPR value_type&
+   _M_val() noexcept { return __tmp_val; }
+
+  private:
+   _GLIBCXX20_CONSTEXPR _Tp*
+   _M_ptr() noexcept { return std::__addressof(__tmp_val); }
+
+   union
+   {
+ _Tp __tmp_val;
+   };
+
+   deque* _M_this;
+  };
+
   iterator
   _M_insert_aux(iterator __pos, const value_type& __x)
   { return _M_emplace_aux(__pos, __x); }
diff --git 
a/libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/118087.cc 
b/libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/118087.cc
new file mode 100644
index ..3606e8899807
--- /dev/null
+++ b/libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/118087.cc
@@ -0,0 +1,43 @@
+// { dg-do run { target c++11 } }
+
+// PR libstdc++/118087
+// std::deque::emplace does not do uses-allocator construction
+
+#include 
+#include 
+#include 
+#include 
+
+template
+using Alloc = __gnu_test::propagating_allocator;
+
+struct X
+{
+  using allocator_type = Alloc;
+  X() { }
+  X(const X&) { }
+  X(X&&) { }
+  X(const allocator_type& a) : alloc(a) { }
+  X(const X&, const allocator_type& a) : alloc(a) { }
+  X(X&&, const allocator_type& a) : alloc(a) { }
+
+  X& operator=(const X&) = default;
+
+  allocator_type alloc{-1};
+};
+
+int main()
+{
+  std::deque>> d(2, Alloc(50));
+  VERIFY(d[0].alloc.get_personality() == 50);
+  VERIFY(d[1].alloc.get_personality() == 50);
+
+  d.emplace(d.begin() + 1);
+  VERIFY(d[1].alloc.get_personality() == 50);
+
+  d.emplace_front();
+  VERIFY(d[0].alloc.get_personality() == 50);

[gcc r16-4063] libstdc++: Refactor std::philox_engine member functions

[Jonathan Wakely via Libstdc++-cvs]

https://gcc.gnu.org/g:2dc3e74b9ddbc971fdf602e71943717abcf40334

commit r16-4063-g2dc3e74b9ddbc971fdf602e71943717abcf40334
Author: Jonathan Wakely 
Date:   Mon Sep 8 21:53:33 2025 +0100

libstdc++: Refactor std::philox_engine member functions

libstdc++-v3/ChangeLog:

* include/bits/random.h: Include  instead of
. Change preprocessor checks to use internal feature
test macro.
(philox_engine): Reword doxygen comments. Use typename instead
of class in template parameter lists. Reformat and adjust
whitespace.
(philox_engine::_If_seed_seq): Replace alias template with
__is_seed_seq variable template.
(philox_engine::philox_engine(result_type)): Define inline.
(philox_engine::seed(result_type), philox_engine::set_counter)
(philox_engine::operator(), philox_engine::discard): Likewise.
(operator==): Define as defaulted.
(operator<<): Reuse widened char.
* include/bits/random.tcc: Reformat and adjust whitespace.
(philox_engine::_M_philox): Use std::array copy constructor and
std::array::fill instead of looping.
* testsuite/26_numerics/random/philox4x32.cc: Gate test on
feature test macro. Add static_assert to check typedef.
* testsuite/26_numerics/random/philox4x64.cc: Likewise.
* testsuite/26_numerics/random/philox_engine/cons/copy.cc: Add
VERIFY assertions to check copies are equal. Test different
seeds.
* testsuite/26_numerics/random/philox_engine/cons/default.cc:
Add VERIFY assertions to check construction results.
* testsuite/26_numerics/random/philox_engine/cons/seed.cc:
Likewise.
* testsuite/26_numerics/random/philox_engine/operators/equal.cc:
Also test inequality.
* testsuite/26_numerics/random/philox_engine/operators/serialize.cc:
Remove redundant include and return.
* 
testsuite/26_numerics/random/philox_engine/requirements/constants.cc:
Check values of all constants.
* 
testsuite/26_numerics/random/philox_engine/requirements/typedefs.cc:
Check typedefs are correct.
* testsuite/26_numerics/random/philox_engine/cons/119794.cc:
Removed.
* testsuite/26_numerics/random/philox_engine/cons/seed_seq.cc:
Removed.
* testsuite/26_numerics/random/philox_engine/operators/inequal.cc:
Removed.
* 
testsuite/26_numerics/random/philox_engine/requirements/constexpr_data.cc:
Removed.
* 
testsuite/26_numerics/random/philox_engine/requirements/constexpr_functions.cc:
Removed.
* testsuite/26_numerics/random/pr60037-neg.cc: Adjust dg-error
line number.

Diff:
---
 libstdc++-v3/include/bits/random.h | 264 ++-
 libstdc++-v3/include/bits/random.tcc   | 282 -
 .../testsuite/26_numerics/random/philox4x32.cc |  11 +-
 .../testsuite/26_numerics/random/philox4x64.cc |  11 +-
 .../random/philox_engine/cons/119794.cc|  39 ---
 .../26_numerics/random/philox_engine/cons/copy.cc  |  18 +-
 .../random/philox_engine/cons/default.cc   |  34 ++-
 .../26_numerics/random/philox_engine/cons/seed.cc  |  45 +++-
 .../random/philox_engine/cons/seed_seq.cc  |  24 --
 .../random/philox_engine/operators/equal.cc|  11 +-
 .../random/philox_engine/operators/inequal.cc  |  30 ---
 .../random/philox_engine/operators/serialize.cc|   7 +-
 .../random/philox_engine/requirements/constants.cc |  56 ++--
 .../philox_engine/requirements/constexpr_data.cc   |  50 
 .../requirements/constexpr_functions.cc|  41 ---
 .../random/philox_engine/requirements/typedefs.cc  |  22 +-
 .../testsuite/26_numerics/random/pr60037-neg.cc|   2 +-
 17 files changed, 387 insertions(+), 560 deletions(-)

diff --git a/libstdc++-v3/include/bits/random.h 
b/libstdc++-v3/include/bits/random.h
index e74b7bd75c03..4049a77fbf4c 100644
--- a/libstdc++-v3/include/bits/random.h
+++ b/libstdc++-v3/include/bits/random.h
@@ -32,8 +32,8 @@
 #define _RANDOM_H 1
 
 #include 
+#include 
 #include 
-#include 
 
 namespace std _GLIBCXX_VISIBILITY(default)
 {
@@ -1689,21 +1689,22 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 { return !(__lhs == __rhs); }
 #endif
 
-#if __cpp_lib_philox_engine
-
+#if __glibcxx_philox_engine // >= C++26
   /**
-   * @brief: A discrete pseudorandom number generator based off of weakened
-   * cryptographic primitives.
+   * @brief A discrete pseudorandom number generator with weak cryptographic
+   * properties
+   *
+   * This algorithm was designed to be used for highly parallel random number
+   * generation, and is capable of immensely long periods.  It provides
+   * "Crush-resistance

[gcc r16-4062] libstdc++: Implement Philox Engine (PR119794)

[Jonathan Wakely via Gcc-cvs]

https://gcc.gnu.org/g:1c06243e65561726ae4fc1060b6164d0caec2ae6

commit r16-4062-g1c06243e65561726ae4fc1060b6164d0caec2ae6
Author: 1nfocalypse <1nfocaly...@protonmail.com>
Date:   Tue Aug 5 01:37:18 2025 +

libstdc++: Implement Philox Engine (PR119794)

Conforms with errata LWG4143, LWG4153 for Philox Engine.

PR libstdc++/119794

libstdc++-v3/ChangeLog:

* include/bits/random.h (philox_engine): Define.
* include/bits/random.tcc (philox_engine): Define member
functions.
* include/bits/version.def (philox_engine): New macro.
* include/bits/version.h: Regenerated.
* include/std/random: Define __glibcxx_want_philox_engine and
include .
* testsuite/26_numerics/random/pr60037-neg.cc: Adjust dg-error
line number.
* testsuite/26_numerics/random/philox4x32.cc: New test.
* testsuite/26_numerics/random/philox4x64.cc: New test.
* testsuite/26_numerics/random/philox_engine/cons/119794.cc: New 
test.
* testsuite/26_numerics/random/philox_engine/cons/copy.cc: New test.
* testsuite/26_numerics/random/philox_engine/cons/default.cc: New 
test.
* testsuite/26_numerics/random/philox_engine/cons/seed.cc: New test.
* testsuite/26_numerics/random/philox_engine/cons/seed_seq.cc: New 
test.
* testsuite/26_numerics/random/philox_engine/operators/equal.cc: 
New test.
* testsuite/26_numerics/random/philox_engine/operators/inequal.cc: 
New test.
* 
testsuite/26_numerics/random/philox_engine/operators/serialize.cc: New test.
* 
testsuite/26_numerics/random/philox_engine/requirements/constants.cc: New test.
* 
testsuite/26_numerics/random/philox_engine/requirements/constexpr_data.cc: New 
test.
* 
testsuite/26_numerics/random/philox_engine/requirements/constexpr_functions.cc: 
New test.
* 
testsuite/26_numerics/random/philox_engine/requirements/typedefs.cc: New test.

Diff:
---
 libstdc++-v3/include/bits/random.h | 283 +
 libstdc++-v3/include/bits/random.tcc   | 191 ++
 libstdc++-v3/include/bits/version.def  |   9 +
 libstdc++-v3/include/bits/version.h|  10 +
 libstdc++-v3/include/std/random|   3 +
 .../testsuite/26_numerics/random/philox4x32.cc |  23 ++
 .../testsuite/26_numerics/random/philox4x64.cc |  23 ++
 .../random/philox_engine/cons/119794.cc|  39 +++
 .../26_numerics/random/philox_engine/cons/copy.cc  |  25 ++
 .../random/philox_engine/cons/default.cc   |  27 ++
 .../26_numerics/random/philox_engine/cons/seed.cc  |  20 ++
 .../random/philox_engine/cons/seed_seq.cc  |  24 ++
 .../random/philox_engine/operators/equal.cc|  30 +++
 .../random/philox_engine/operators/inequal.cc  |  30 +++
 .../random/philox_engine/operators/serialize.cc|  49 
 .../random/philox_engine/requirements/constants.cc |  26 ++
 .../philox_engine/requirements/constexpr_data.cc   |  50 
 .../requirements/constexpr_functions.cc|  41 +++
 .../random/philox_engine/requirements/typedefs.cc  |  26 ++
 .../testsuite/26_numerics/random/pr60037-neg.cc|   4 +-
 20 files changed, 931 insertions(+), 2 deletions(-)

diff --git a/libstdc++-v3/include/bits/random.h 
b/libstdc++-v3/include/bits/random.h
index 1fdaf51934fd..e74b7bd75c03 100644
--- a/libstdc++-v3/include/bits/random.h
+++ b/libstdc++-v3/include/bits/random.h
@@ -33,6 +33,7 @@
 
 #include 
 #include 
+#include 
 
 namespace std _GLIBCXX_VISIBILITY(default)
 {
@@ -1688,6 +1689,270 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 { return !(__lhs == __rhs); }
 #endif
 
+#if __cpp_lib_philox_engine
+
+  /**
+   * @brief: A discrete pseudorandom number generator based off of weakened
+   * cryptographic primitives.
+   *
+   * This algorithm was intended to be used for highly parallel random number
+   * generation, and is capable of immensely long periods.  It provides "Crush-
+   * resistance", denoting an ability to pass the TestU01 Suite's "Big Crush"
+   * test, demonstrating significant apparent entropy.  It is not intended for
+   * cryptographic use and should not be used for such, despite being based on
+   * cryptographic primitives.
+   *
+   * The two four-word definitions are likely the best use for this algorithm,
+   * and are given below as defaults.
+   *
+   * This algorithm was created by John Salmon, Mark Moraes, Ron Dror, and
+   * David Shaw as a product of D.E. Shaw Research.
+   *
+   * @tparam __w   Word size
+   * @tparam __n   Buffer size
+   * @tparam __r   Rounds
+   * @tparam __consts  Multiplication and round constant pack, ordered as
+   *   M_{0}, C_{0}, M_{1}, C_{1}, ... , M_{N/2-1}, C_{N/2-1}
+   *
+   * @headerfile random
+   * @since C++26
+   */
+  template
+

[gcc r16-4021] Widen-Mul: Fix mis-compile for build_and_insert_cast refinement [PR122021]

[Pan Li via Gcc-cvs]

https://gcc.gnu.org/g:7a5da9ab53a8c4b6ffe03ef569b3ffe0ef096878

commit r16-4021-g7a5da9ab53a8c4b6ffe03ef569b3ffe0ef096878
Author: Pan Li 
Date:   Mon Sep 22 14:31:41 2025 +0800

Widen-Mul: Fix mis-compile for build_and_insert_cast refinement [PR122021]

The previous refinement in build_and_insert_cast will convert 2
cast into one, aka:

uint16_t _3;

From:
int16_t _4 = (uint16_t)_3; // no-extend
int32_t _5 = (int32_t)_4   // sign-extend 16 => 32

To:
int32_t _5 = (int32_t)_3;  // zero-extend 16 => 32

That will have a problem for sign-extend, the highest bits may be all 1s
but will be loss after convert to zero-extend.  Thus, there will be more
cases if the convert has different types.  Case 1 as above and Case 2,
3, and 4 as following.

Case 2:
  int16_t _3;

  From:
  uint32_t _4 = (uint32_t)_3; // zero-extend 16 => 32
  uint64_t _5 = (uint64_t)_4; // zero-extend 32 => 64

  To:
  uint64_t _5 = (uint32_t)_3; // zero-extend 16 => 64

Case 3:
  uint8_t _3;

  From:
  uint16_t _4 = (uint16_t)_3; // zero-extend 8 => 16
  int32_t _5 = (int32_t)_4;   // zero-extend 16 => 32

  To:
  int32_t _5 = (int32_t)_3;   // zero-extend 8 => 32

Case 4:
  int8_t _3;

  From:
  int16_t _4 = (int16_t)_3;   // sign-extend 8 => 16
  uint32_t _5 = (uint32_t)_4; // zero-extend 16 => 32
  To:
  uint32_t _5 = (uint32_t)_3; // zero-extend 8 => 32

Then, we can see, there will be mis-compile if and only if there is
a cast from small to big size with sign extend.  Thus, restrict the
check and stop prop if there is sign extend cast.

The below test suites are passed for this patch:
1. The rv64gcv fully regression tests.
2. The x86 bootstrap tests.
3. The x86 fully regression tests.

PR middle-end/122021

gcc/ChangeLog:

* tree-ssa-math-opts.cc (build_and_insert_cast): Add sign-extend
check before prop.

gcc/testsuite/ChangeLog:

* gcc.target/i386/pr122021-0.c: New test.

Signed-off-by: Pan Li 

Diff:
---
 gcc/testsuite/gcc.target/i386/pr122021-0.c | 22 ++
 gcc/tree-ssa-math-opts.cc  | 18 +++---
 2 files changed, 37 insertions(+), 3 deletions(-)

diff --git a/gcc/testsuite/gcc.target/i386/pr122021-0.c 
b/gcc/testsuite/gcc.target/i386/pr122021-0.c
new file mode 100644
index ..de17734523cd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr122021-0.c
@@ -0,0 +1,22 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -m32" } */
+
+#include 
+#include 
+
+__attribute__ ((noipa)) static void
+vp9_build_inter_predictor (int a)
+{
+  int16_t row = a * 2;
+  int32_t row_w = (int)((int64_t)row * 16384 >> 14);
+
+  if (row_w != -544)
+__builtin_abort ();
+}
+
+int
+main ()
+{
+  vp9_build_inter_predictor (-272);
+  return 0;
+}
diff --git a/gcc/tree-ssa-math-opts.cc b/gcc/tree-ssa-math-opts.cc
index 344ffddd3859..80d10d26f678 100644
--- a/gcc/tree-ssa-math-opts.cc
+++ b/gcc/tree-ssa-math-opts.cc
@@ -1642,12 +1642,24 @@ build_and_insert_cast (gimple_stmt_iterator *gsi, 
location_t loc,
  && CONVERT_EXPR_CODE_P (gimple_assign_rhs_code (def)))
{
  tree cast_rhs = gimple_assign_rhs1 (def);
- unsigned rhs_prec = TYPE_PRECISION (TREE_TYPE (cast_rhs));
+ tree cast_rhs_type = TREE_TYPE (cast_rhs);
+ tree val_type = TREE_TYPE (val);
+
+ bool unsigned_p = TYPE_UNSIGNED (type);
+ bool unsigned_rhs_p = TYPE_UNSIGNED (cast_rhs_type);
+ bool unsigned_val_p = TYPE_UNSIGNED (val_type);
+
+ unsigned rhs_prec = TYPE_PRECISION (cast_rhs_type);
  unsigned type_prec = TYPE_PRECISION (type);
- unsigned val_prec = TYPE_PRECISION (TREE_TYPE (val));
+ unsigned val_prec = TYPE_PRECISION (val_type);
 
  if (type_prec >= rhs_prec && val_prec >= rhs_prec)
-   rhs = cast_rhs;
+   {
+ /* Aka any sign extend from small to big size */
+ if (!((val_prec > rhs_prec && !unsigned_val_p && !unsigned_rhs_p)
+ || (type_prec > val_prec && !unsigned_p && !unsigned_val_p)))
+   rhs = rhs;
+   }
}
 }

[gcc r16-4052] ada: New preprocessing option for emitting empty comments for deleted lines

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:56902d171735f085dac88417b9ae8c72b7ab78fa

commit r16-4052-g56902d171735f085dac88417b9ae8c72b7ab78fa
Author: Gary Dismukes 
Date:   Wed Sep 10 19:33:56 2025 +

ada: New preprocessing option for emitting empty comments for deleted lines

When integrated preprocessing is done on a source file with lines that are
filtered out, by default this can result in multiple blank lines being 
emitted,
but this can clash with the style switch -gnatyu, which will flag cases of
multiple blank lines.  A new preprocessing option "-e" is added to allow
outputting "empty" comment lines rather than blank lines (the comments 
consist
of "--!" and no other text).  This option is also available for the gnatprep
tool.  This behavior is the default when integrated preprocessing is done
without generating a ".prep" output file with -gnateG, but when -gnateG is
used, blank lines are still substituted by default for directives and 
removed
source lines (for compatibility with long-existing behavior).  The -gnateG
switch is also extended to allow appending 'b', 'c', or 'e' at the end of
the switch to force any of the replacement options ('b' => blank lines,
'c' => comments including the original source lintes, and 'e' => empty
comment lines).

gcc/ada/ChangeLog:

* doc/gnat_ugn/building_executable_programs_with_gnat.rst: Add doc
for addition of -gnateG options b, c, and e.
* doc/gnat_ugn/the_gnat_compilation_model.rst: Add doc for "-e" 
optionn
on gnatprep and integrated preprocessing. Add doc for addition of
-gnateG options b, c, and e.
* gprep.adb (Scan_Command_Line): Add 'e' to the list of allowed 
switch
letters in the string passed to GNAT.Command_Line.Getopt. Set the 
flag
Opt.Empty_Comment_Deleted_Lines to True when the "-e" switch is 
found.
(Usage): Output a switch description for the "-e" switch.
* opt.ads: Add new flag variable Empty_Comment_Deleted_Lines. Add
"GNAT" to the "GNATPREP" comment line for Comment_Deleted_Lines.
* prep.adb (Output_Line): Add handling for 
Empty_Comment_Deleted_Lines,
outputting comment lines consisting of "--!" for lines that are 
removed
in the preprocessed source file when Empty_Comment_Deleted_Lines is 
True.
* prepcomp.adb (Preproc_Data): Add Empty_Comments component 
(defaulting
to False).
(No_Preproc_Data): Add association for Empty_Comments component.
(Parse_Preprocessing_Data_File): Add handling for new switch -e.
(Prepare_To_Preprocess): Add logic for setting the new option
Empty_Comment_Deleted_Lines (and making it the default for
integrated preprocessing in the absence of other switches).
* switch-c.adb (Scan_Front_End_Switches): Add support adding a 
single
character 'b', 'c', 'e' to the "-gnateG" switch, to select any of 
the
three options for replacing deleted lines in preprocessing output 
file.
* usage.adb: Update usage info for -gnateG, to reflect the option of
appending b, c, or e to the switch.
* gnat_ugn.texi: Regenerate.

Diff:
---
 .../building_executable_programs_with_gnat.rst |  8 ++-
 .../doc/gnat_ugn/the_gnat_compilation_model.rst| 29 +++-
 gcc/ada/gnat_ugn.texi  | 48 +++--
 gcc/ada/gprep.adb  |  6 +-
 gcc/ada/opt.ads|  7 +-
 gcc/ada/prep.adb   |  7 ++
 gcc/ada/prepcomp.adb   | 78 +++---
 gcc/ada/switch-c.adb   | 40 +++
 gcc/ada/usage.adb  |  4 +-
 9 files changed, 191 insertions(+), 36 deletions(-)

diff --git a/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst 
b/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst
index fbd3202c3d65..b46f69b7d4a0 100644
--- a/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst
+++ b/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst
@@ -1608,8 +1608,12 @@ Alphabetical List of All Switches
 
 .. index:: -gnateG  (gcc)
 
-:switch:`-gnateG`
-  Save result of preprocessing in a text file.
+:switch:`-gnateG[bce]`
+  Save result of preprocessing in a text file. An optional character (b, c,
+  or e) can be appended to indicate that filtered lines are to be replaced by
+  blank lines, comment lines that include the filtered line, or empty comment
+  lines ("--!"), respectively. The default is to replace filtered lines with
+  blank lines.
 
 
 .. index:: -gnateH  (gcc)
diff --git a/gcc/ada/doc/gnat_ugn/the_gnat_compilation_model.rst 
b/gcc/ada/doc/gnat_ugn/the_gnat_compilation_model.rst
index 891886b53601..94b41b52adf2 1

[gcc r16-4056] ada: Refactor of Ultimate_Prefix

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:346b4921f994360194c4582066a52c484c2687fc

commit r16-4056-g346b4921f994360194c4582066a52c484c2687fc
Author: Denis Mazzucato 
Date:   Fri Sep 12 15:50:54 2025 +0200

ada: Refactor of Ultimate_Prefix

gcc/ada/ChangeLog:

* sem_util.adb (Ultimate_Prefix): Clean-up the loop condition by 
using
Has_prefix instead of an explicit list of node kinds.

Diff:
---
 gcc/ada/sem_util.adb | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/gcc/ada/sem_util.adb b/gcc/ada/sem_util.adb
index e6c183c5f9c3..9e2083b8383d 100644
--- a/gcc/ada/sem_util.adb
+++ b/gcc/ada/sem_util.adb
@@ -29615,11 +29615,7 @@ package body Sem_Util is
 
begin
   Pref := N;
-  while Nkind (Pref) in N_Explicit_Dereference
-  | N_Indexed_Component
-  | N_Selected_Component
-  | N_Slice
-  loop
+  while Has_Prefix (Pref) loop
  Pref := Prefix (Pref);
   end loop;

[gcc r16-4051] ada: Include finally statements in debug pretty-printing

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:bbd00cd05d390f69f2dbfa8bcac12b9ef4d63e30

commit r16-4051-gbbd00cd05d390f69f2dbfa8bcac12b9ef4d63e30
Author: Piotr Trojanek 
Date:   Wed Sep 10 19:12:22 2025 +0200

ada: Include finally statements in debug pretty-printing

Handled sequence of statements now includes optional finally statements.

gcc/ada/ChangeLog:

* sprint.adb (Sprint_Node_Actual): Print finally statements, if
present.

Diff:
---
 gcc/ada/sprint.adb | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/gcc/ada/sprint.adb b/gcc/ada/sprint.adb
index 7a9749287af8..f5caa3d1b78d 100644
--- a/gcc/ada/sprint.adb
+++ b/gcc/ada/sprint.adb
@@ -2190,6 +2190,13 @@ package body Sprint is
Indent_End;
 end if;
 
+if Present (Finally_Statements (Node)) then
+   Write_Indent_Str ("finally");
+   Indent_Begin;
+   Sprint_Node_List (Finally_Statements (Node));
+   Indent_End;
+end if;
+
 Sprint_At_End_Proc (Node);
 
  when N_Identifier =>

[gcc r16-4055] ada: Fix missing warning when child packages hide homonym units

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:be42204d1fb45c408a12090dcdda6395450a5394

commit r16-4055-gbe42204d1fb45c408a12090dcdda6395450a5394
Author: Denis Mazzucato 
Date:   Wed Aug 27 10:56:38 2025 +0200

ada: Fix missing warning when child packages hide homonym units

Improve consistency of the warning message when child units are hiding other
with'ed homonym package, regardless of the order of the context clauses.

gcc/ada/ChangeLog:

* sem_ch10.adb (Install_Siblings): Fix condition to emit warning.

Diff:
---
 gcc/ada/sem_ch10.adb | 72 +++-
 1 file changed, 38 insertions(+), 34 deletions(-)

diff --git a/gcc/ada/sem_ch10.adb b/gcc/ada/sem_ch10.adb
index ffd3eaa6bec1..cff0d71c17ce 100644
--- a/gcc/ada/sem_ch10.adb
+++ b/gcc/ada/sem_ch10.adb
@@ -176,7 +176,7 @@ package body Sem_Ch10 is
--  use-package clauses to avoid circularities when installing context.
 
procedure Install_Siblings (U_Name : Entity_Id; N : Node_Id);
-   --  In the compilation of a child unit, a child of any of the  ancestor
+   --  In the compilation of a child unit, a child of any of the ancestor
--  units is directly visible if it is visible, because the parent is in
--  an enclosing scope. Iterate over context to find child units of U_Name
--  or of some ancestor of it.
@@ -4803,9 +4803,8 @@ package body Sem_Ch10 is
--
 
procedure Install_Siblings (U_Name : Entity_Id; N : Node_Id) is
-  Item : Node_Id;
-  Id   : Entity_Id;
-  Prev : Entity_Id;
+  Item   : Node_Id;
+  Item_E : Entity_Id;
 
begin
   --  Iterate over explicit with clauses, and check whether the scope of
@@ -4836,42 +4835,46 @@ package body Sem_Ch10 is
or else Private_Present (N)
or else Nkind (Unit (N)) = N_Package_Body
  then
-Id := Entity (Name (Item));
+Item_E := Entity (Name (Item));
 
-if Is_Child_Unit (Id)
-  and then Is_Ancestor_Package (Scope (Id), U_Name)
+if Is_Child_Unit (Item_E)
+  and then Is_Ancestor_Package (Scope (Item_E), U_Name)
 then
-   Set_Is_Immediately_Visible (Id);
+   Set_Is_Immediately_Visible (Item_E);
 
--  Check for the presence of another unit in the context that
--  may be inadvertently hidden by the child.
 
-   Prev := Current_Entity (Id);
+   declare
+  Clause : Node_Id;
+  Clause_E : Entity_Id;
 
-   if Present (Prev)
- and then Is_Immediately_Visible (Prev)
- and then not Is_Child_Unit (Prev)
-   then
-  declare
- Clause : Node_Id;
+   begin
+  Clause := First (Context_Items (N));
+  while Present (Clause) loop
+ if Clause /= Item
+   and then Nkind (Clause) = N_With_Clause
+   and then not Limited_Present (Clause)
+ then
+Clause_E := Entity (Name (Clause));
 
-  begin
- Clause := First (Context_Items (N));
- while Present (Clause) loop
-if Nkind (Clause) = N_With_Clause
-  and then Entity (Name (Clause)) = Prev
+if not Is_Ancestor_Package (Clause_E, U_Name)
+  and then Chars (Clause_E) = Chars (Item_E)
+  and then not Has_Prefix (Name (Clause))
+  and then not In_Use (Clause_E)
 then
Error_Msg_NE
-  ("child unit& hides compilation unit " &
-   "with the same name??",
- Name (Item), Id);
+ ("child unit& hides compilation unit "
+  & "with the same name??",
+  Name (Item),
+  Item_E);
exit;
 end if;
+ end if;
 
-Next (Clause);
- end loop;
-  end;
-   end if;
+ Next (Clause);
+  end loop;
+   end;
 
 --  The With_Clause may be on a grandchild or one of its further
 --  descendants, which makes a child immediately visible. Examine
@@ -4879,12 +4882,12 @@ package body Sem_Ch10 is
 --  if current unit is A.C, and with_clause is on A.X.Y.Z, then X
 --  is immediately visible.
 
-elsif Is_Child_Unit (Id) then
+elsif Is_Child_Unit (Item_E) then
declare
   Par : Entity_Id;
 
begin
- 

[gcc r16-4058] ada: Fix unnesting problem related to constructors

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:54c1b58486037fc18ade54cefff7410cfbee2267

commit r16-4058-g54c1b58486037fc18ade54cefff7410cfbee2267
Author: Bob Duff 
Date:   Mon Sep 15 08:26:03 2025 -0400

ada: Fix unnesting problem related to constructors

This patch fixes a bug in unnesting, which is used by the llvm back end.

Exp_Unst relies on the Scope field of nodes to detect up-level
references. Temps created by Prepend_Constructor_Procedure_Prologue
could have an incorrect Scope, causing Exp_Unst to use an up-level
reference to an activation record to implement up-level references. That
won't work; Exp_Unst is supposed to REMOVE up-level references.
This patch corrects the Scope of such temps.

gcc/ada/ChangeLog:

* exp_ch6.adb (Prepend_Constructor_Procedure_Prologue):
Push/Pop the procedure scope, so that temps created herein
get the right Scope.

Diff:
---
 gcc/ada/exp_ch6.adb | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/exp_ch6.adb b/gcc/ada/exp_ch6.adb
index 5056b1f990fa..2a32f3a90592 100644
--- a/gcc/ada/exp_ch6.adb
+++ b/gcc/ada/exp_ch6.adb
@@ -6249,7 +6249,6 @@ package body Exp_Ch6 is
 
   procedure Prepend_Constructor_Procedure_Prologue
 (Spec_Id : Entity_Id; Body_Id : Entity_Id; L : List_Id);
-
   --  If N is the body of a constructor procedure (that is, a procedure
   --  named in a Constructor aspect specification for the type of the
   --  procedure's first parameter), then prepend and analyze the
@@ -6353,6 +6352,8 @@ package body Exp_Ch6 is
 return; -- the usual case
  end if;
 
+ Push_Scope (Spec_Id);
+
  --  Initialize the first parameter.
  --  First_Param_Type is a record type (tagged or untagged) or
  --  a type extension. If it is a type extension, then we begin by
@@ -6621,6 +6622,8 @@ package body Exp_Ch6 is
 
 Insert_List_Before_And_Analyze (First (L), Init_List);
  end;
+
+ Pop_Scope;
   end Prepend_Constructor_Procedure_Prologue;
 
   --  Local variables

[gcc r16-4032] libstdc++: Remove leftover __formatter_chrono base classes.

[Tomasz Kaminski via Libstdc++-cvs]

https://gcc.gnu.org/g:c61535ff3d6dc5af775658ba50d2b870f18cf588

commit r16-4032-gc61535ff3d6dc5af775658ba50d2b870f18cf588
Author: Tomasz Kamiński 
Date:   Tue Sep 23 07:51:18 2025 +0200

libstdc++: Remove leftover __formatter_chrono base classes.

This patch removes the __formatter_chrono<_CharT> base class from the
formatters for utc_time, gps_time, and tai_time. These formatters
are using the __formatter_duration<_CharT> member only.

libstdc++-v3/ChangeLog:

* include/bits/chrono_io.h (formatter):
(formatter, _CharT>)
(formatter, _CharT): Remove
__formatter_chrono base class.

Reviewed-by: Jonathan Wakely 
Signed-off-by: Tomasz Kamiński 

Diff:
---
 libstdc++-v3/include/bits/chrono_io.h | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/libstdc++-v3/include/bits/chrono_io.h 
b/libstdc++-v3/include/bits/chrono_io.h
index ff7e8cfe6b9f..85b2013cf704 100644
--- a/libstdc++-v3/include/bits/chrono_io.h
+++ b/libstdc++-v3/include/bits/chrono_io.h
@@ -2958,7 +2958,6 @@ namespace __format
 
   template
 struct formatter, _CharT>
-: __format::__formatter_chrono<_CharT>
 {
   constexpr typename basic_format_parse_context<_CharT>::iterator
   parse(basic_format_parse_context<_CharT>& __pc)
@@ -3003,7 +3002,6 @@ namespace __format
 
   template
 struct formatter, _CharT>
-: __format::__formatter_chrono<_CharT>
 {
   constexpr typename basic_format_parse_context<_CharT>::iterator
   parse(basic_format_parse_context<_CharT>& __pc)
@@ -3039,7 +3037,6 @@ namespace __format
 
   template
 struct formatter, _CharT>
-: __format::__formatter_chrono<_CharT>
 {
   constexpr typename basic_format_parse_context<_CharT>::iterator
   parse(basic_format_parse_context<_CharT>& __pc)

[gcc(refs/users/davidbalek/heads/flattenswitch)] Fixes merged switch creation

[David Balek via Gcc-cvs]

https://gcc.gnu.org/g:3a067ae712e98d5ead1d565ad3b3dd32dc6ac37a

commit 3a067ae712e98d5ead1d565ad3b3dd32dc6ac37a
Author: David Balek 
Date:   Tue Sep 23 14:14:26 2025 +0200

Fixes merged switch creation

Diff:
---
 gcc/gimple-flatten-switch.cc | 173 +--
 1 file changed, 84 insertions(+), 89 deletions(-)

diff --git a/gcc/gimple-flatten-switch.cc b/gcc/gimple-flatten-switch.cc
index 3d3e5c8a7695..133e87593dc8 100644
--- a/gcc/gimple-flatten-switch.cc
+++ b/gcc/gimple-flatten-switch.cc
@@ -28,27 +28,17 @@
 #include 
 #include 
 
-/* The struct holding the info about outer switch and all inner switches it
-   points to. */
+/* The struct holding the info about outer and inenr switch pair. */
 struct switch_info
 {
-  switch_info(gswitch *outer_switch, gswitch *inner_switch) :
-  m_outer_switch(outer_switch), m_inner_switches()
-  {
-m_inner_switches.create (1);
-m_inner_switches.safe_push (inner_switch);
-  }
+  switch_info (gswitch *outer_switch, gswitch *inner_switch) :
+  m_outer_switch (outer_switch), m_inner_switch (inner_switch)
+  {}
 
-  void add_inner_switch (gswitch *inner_switch);
   gswitch *m_outer_switch;
-  auto_vec m_inner_switches;
+  gswitch *m_inner_switch;
 };
 
-void
-switch_info::add_inner_switch (gswitch *inner_switch)
-{
-  m_inner_switches.safe_push(inner_switch);
-}
 
 void
 print_nested_switches (basic_block bb, gswitch *sw1, gswitch *sw2)
@@ -591,58 +581,40 @@ repair_cfg (case_informations &merged_case_infos, 
basic_block merged_switch_bb)
   make_edge (info->m_this_bb, info->m_dest_bb, 0);
 }
 
-/* Add the missing phi arguments */
-for (auto info : merged_case_infos)
-  {
-edge e = (info->m_forwarder_bb == NULL)
- ? find_edge(info->m_this_bb, info->m_dest_bb)
- : find_edge(info->m_forwarder_bb, info->m_dest_bb);
-
-for (auto item : info->m_phi_mapping)
-  {
-add_phi_arg (item.first, item.second, e, UNKNOWN_LOCATION);
-  }
-  }
+  /* Add the missing phi arguments */
+  for (auto info : merged_case_infos)
+{
+  edge e = (info->m_forwarder_bb == NULL)
+? find_edge(info->m_this_bb, info->m_dest_bb)
+: find_edge(info->m_forwarder_bb, info->m_dest_bb);
+
+  for (auto item : info->m_phi_mapping)
+add_phi_arg (item.first, item.second, e, UNKNOWN_LOCATION);
+}
 }
 
 
 /* Adjusts the outer switch to be merged switch */
 static void
-change_outer_switch_to_merged_switch (gswitch *outer,
-  case_informations &merged_case_infos)
+create_merged_switch (gswitch *outer,
+  case_informations &merged_case_infos)
 {
   gcc_assert (merged_case_infos.size () > 0);
   gcc_assert (merged_case_infos[0]->is_default ());
-  gimple_switch_set_num_labels (outer, merged_case_infos.size ());
-  for (unsigned i = 0; i < merged_case_infos.size (); ++i)
+  gimple_stmt_iterator gsi = gsi_for_stmt (outer);
+  auto_vec labels;
+  for (unsigned i = 1; i < merged_case_infos.size (); ++i)
 {
   case_info_ptr info = merged_case_infos[i];
   tree label = info->build_case ();
-  gimple_switch_set_label (outer, i, label);
+  labels.safe_push (label);
 }
-}
 
-/* Merges nested switches */
-static void
-merge_nested_switches (function *fun, switch_info *info)
-{
-  gswitch* outer = info->m_outer_switch;
-  for (gswitch* inner : info->m_inner_switches)
-{
-  case_informations outer_case_info{}, inner_case_info{};
-  outer_switch_case_informations (fun, outer, inner, outer_case_info);
-  inner_switch_case_informations (fun, inner, inner_case_info);
-
-  if (!check_if_switches_mergeable (outer_case_info, inner_case_info))
-continue;
-
-  case_informations merged_case_info{};
-  dump_function_to_file (fun->decl, stderr, TDF_DETAILS);
-  merge_case_infos (outer_case_info, inner_case_info, merged_case_info);
-  repair_cfg (merged_case_info, outer->bb);
-  change_outer_switch_to_merged_switch (outer, merged_case_info);
-  delete_basic_block (inner->bb);
-}
+  gswitch *s = gimple_build_switch (gimple_switch_index(outer),
+merged_case_infos[0]->build_case (),
+labels);
+  gsi_remove (&gsi, true);
+  gsi_insert_before (&gsi, s, GSI_NEW_STMT);
 }
 
 
@@ -666,18 +638,17 @@ bb_only_labels_and_switch (basic_block bb)
   return true;
 }
 
-/* Finds the pairs of outer and inner switches */
-static void
-find_nested_switches (hash_map *switch_in_bb,
-  basic_block bb)
+/* Finds the pair of outer and inner switch */
+static switch_info *
+find_nested_switch (basic_block bb)
 {
   gimple_stmt_iterator gsi = gsi_last_nondebug_bb(bb);
   if (gsi_end_p(gsi))
-return;
+return NULL;
 
   gswitch *outer_switch = dyn_cast(gsi_stmt(gsi));
   if (outer_switch == NULL)
-return;
+return NULL;
 
   edge e;
   edg

[gcc r16-4048] toplevel: Fix syntax issue in .editorconfig

[Richard Earnshaw via Gcc-cvs]

https://gcc.gnu.org/g:b8701893e90b7121591531faf8a72a0589f1f1d5

commit r16-4048-gb8701893e90b7121591531faf8a72a0589f1f1d5
Author: Richard Earnshaw 
Date:   Tue Sep 23 13:17:01 2025 +0100

toplevel: Fix syntax issue in .editorconfig

.editorconfig entries need to be a single filesystem glob pattern.

ChangeLog:

* .editorconfig: Fix glob patterns.

Diff:
---
 .editorconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/.editorconfig b/.editorconfig
index 9661e7e10d77..af1a28411da9 100644
--- a/.editorconfig
+++ b/.editorconfig
@@ -5,14 +5,14 @@ root = true
 end_of_line = lf
 insert_final_newline = true
 
-[*.h,*.cc]
+[*.{h,cc}]
 charset = utf-8
 indent_style = tab
 indent_size = 2
 tab_width = 8
 trim_trailing_whitespace = true
 
-[Makefile*,ChangeLog*]
+[{Makefile,ChangeLog}*]
 indent_style = tab
 indent_size = 8
 trim_trailing_whitespace = true

[gcc r16-4044] aarch64: Remove FMV beta warning.

[Alfie Richards via Gcc-cvs]

https://gcc.gnu.org/g:de60b080e3f8b105b2f69c56de3aeb996f4e81e6

commit r16-4044-gde60b080e3f8b105b2f69c56de3aeb996f4e81e6
Author: Alfie Richards 
Date:   Thu Feb 13 16:52:28 2025 +

aarch64: Remove FMV beta warning.

This patch removes the warning for target_version and target_clones in 
aarch64
as it is now spec compliant.

gcc/ChangeLog:

* config/aarch64/aarch64.cc (aarch64_process_target_version_attr):
Remove warning.
* config/aarch64/aarch64.opt: Mark -Wno-experimental-fmv-target
deprecated.
* doc/invoke.texi: Ditto.

gcc/testsuite/ChangeLog:

* g++.target/aarch64/mv-1.C: Remove option.
* g++.target/aarch64/mv-and-mvc-error1.C: Ditto.
* g++.target/aarch64/mv-and-mvc-error2.C: Ditto.
* g++.target/aarch64/mv-and-mvc-error3.C: Ditto.
* g++.target/aarch64/mv-and-mvc1.C: Ditto.
* g++.target/aarch64/mv-and-mvc2.C: Ditto.
* g++.target/aarch64/mv-and-mvc3.C: Ditto.
* g++.target/aarch64/mv-and-mvc4.C: Ditto.
* g++.target/aarch64/mv-error1.C: Ditto.
* g++.target/aarch64/mv-error2.C: Ditto.
* g++.target/aarch64/mv-error3.C: Ditto.
* g++.target/aarch64/mv-error4.C: Ditto.
* g++.target/aarch64/mv-error5.C: Ditto.
* g++.target/aarch64/mv-error6.C: Ditto.
* g++.target/aarch64/mv-error7.C: Ditto.
* g++.target/aarch64/mv-error8.C: Ditto.
* g++.target/aarch64/mv-pragma.C: Ditto.
* g++.target/aarch64/mv-symbols1.C: Ditto.
* g++.target/aarch64/mv-symbols10.C: Ditto.
* g++.target/aarch64/mv-symbols11.C: Ditto.
* g++.target/aarch64/mv-symbols12.C: Ditto.
* g++.target/aarch64/mv-symbols13.C: Ditto.
* g++.target/aarch64/mv-symbols2.C: Ditto.
* g++.target/aarch64/mv-symbols3.C: Ditto.
* g++.target/aarch64/mv-symbols4.C: Ditto.
* g++.target/aarch64/mv-symbols5.C: Ditto.
* g++.target/aarch64/mv-symbols6.C: Ditto.
* g++.target/aarch64/mv-symbols7.C: Ditto.
* g++.target/aarch64/mv-symbols8.C: Ditto.
* g++.target/aarch64/mv-symbols9.C: Ditto.
* g++.target/aarch64/mvc-error1.C: Ditto.
* g++.target/aarch64/mvc-error2.C: Ditto.
* g++.target/aarch64/mvc-symbols1.C: Ditto.
* g++.target/aarch64/mvc-symbols2.C: Ditto.
* g++.target/aarch64/mvc-symbols3.C: Ditto.
* g++.target/aarch64/mvc-symbols4.C: Ditto.
* g++.target/aarch64/mv-warning1.C: Removed.
* g++.target/aarch64/mvc-warning1.C: Removed.

Diff:
---
 gcc/config/aarch64/aarch64.cc| 9 -
 gcc/config/aarch64/aarch64.opt   | 2 +-
 gcc/doc/invoke.texi  | 5 +
 gcc/testsuite/g++.target/aarch64/mv-1.C  | 1 -
 gcc/testsuite/g++.target/aarch64/mv-and-mvc-error1.C | 1 -
 gcc/testsuite/g++.target/aarch64/mv-and-mvc-error2.C | 1 -
 gcc/testsuite/g++.target/aarch64/mv-and-mvc-error3.C | 1 -
 gcc/testsuite/g++.target/aarch64/mv-and-mvc1.C   | 1 -
 gcc/testsuite/g++.target/aarch64/mv-and-mvc2.C   | 1 -
 gcc/testsuite/g++.target/aarch64/mv-and-mvc3.C   | 1 -
 gcc/testsuite/g++.target/aarch64/mv-and-mvc4.C   | 1 -
 gcc/testsuite/g++.target/aarch64/mv-error1.C | 1 -
 gcc/testsuite/g++.target/aarch64/mv-error2.C | 1 -
 gcc/testsuite/g++.target/aarch64/mv-error3.C | 1 -
 gcc/testsuite/g++.target/aarch64/mv-error4.C | 1 -
 gcc/testsuite/g++.target/aarch64/mv-error5.C | 1 -
 gcc/testsuite/g++.target/aarch64/mv-error6.C | 1 -
 gcc/testsuite/g++.target/aarch64/mv-error7.C | 1 -
 gcc/testsuite/g++.target/aarch64/mv-error8.C | 1 -
 gcc/testsuite/g++.target/aarch64/mv-pragma.C | 1 -
 gcc/testsuite/g++.target/aarch64/mv-symbols1.C   | 1 -
 gcc/testsuite/g++.target/aarch64/mv-symbols10.C  | 1 -
 gcc/testsuite/g++.target/aarch64/mv-symbols11.C  | 1 -
 gcc/testsuite/g++.target/aarch64/mv-symbols12.C  | 1 -
 gcc/testsuite/g++.target/aarch64/mv-symbols13.C  | 1 -
 gcc/testsuite/g++.target/aarch64/mv-symbols2.C   | 1 -
 gcc/testsuite/g++.target/aarch64/mv-symbols3.C   | 1 -
 gcc/testsuite/g++.target/aarch64/mv-symbols4.C   | 1 -
 gcc/testsuite/g++.target/aarch64/mv-symbols5.C   | 1 -
 gcc/testsuite/g++.target/aarch64/mv-symbols6.C   | 1 -
 gcc/testsuite/g++.target/aarch64/mv-symbols7.C   | 1 -
 gcc/testsuite/g++.target/aarch64/mv-symbols8.C   | 1 -
 gcc/testsuite/g++.target/aarch64/mv-symbols9.C   | 1 -
 gcc/testsuite/g++.target/aarch64/mv-warning1.C   | 9 -
 gcc/testsuite/g++.target/aarch64/mvc-error1.C| 1 -
 gcc/testsuite/g++.target/aarch64/mvc-error2.C| 1 -
 gcc/testsuite/g++.target/aarch64/mvc-symbols1

[gcc r16-4041] c++: Refactor FMV frontend conflict and merging logic and hooks.

[Alfie Richards via Gcc-cvs]

https://gcc.gnu.org/g:62287200dfe0863fee96a89b58f891909a58e393

commit r16-4041-g62287200dfe0863fee96a89b58f891909a58e393
Author: Alfie Richards 
Date:   Mon Mar 24 13:20:01 2025 +

c++: Refactor FMV frontend conflict and merging logic and hooks.

This change refactors FMV handling in the frontend to allows greater
reasoning about versions in shared code.

This is needed for allowing target_clones and target_versions to be used
together in a function set, as there is then two distinct concerns when
encountering two declarations that previously were conflated:

1. Are these two declarations completely disjoint FMV declarations
(ie. the sets of versions they define have no overlap). If so, they don't
conflict so there is no need to merge and both can be pushed.
2. For two declarations that aren't completely disjoint, are they matching
and therefore mergeable. (ie. two target_clone decls that define the same 
set
of versions, or an un-annotated declaration, and a target_clones definition
containing the default version). If so, continue to the existing merging 
logic
to try to merge these and diagnose if it's not possible.
If not, then diagnose the conflicting declarations.

To do this the common_function_versions function has been renamed
disjoint_function_versions (meaning, are the version sets defined by these
two decl's completely distinct from each other).

A new hook called same_function_version is introduces taking two
string_slice's (each representing a single version) and determining if they
define the same version.

A new function, called diagnose_versioned_decls is added, which checks
if two decls (with overlapping version sets) can be merged and diagnose when
they cannot be (only in terms of the attributes, the existing logic is used 
to
detect other mergeability conflicts like redefinition).

This only effects targets with TARGET_HAS_FMV_TARGET_ATTRIBUTE set to false.
(ie. aarch64 and riscv), the existing logic for i86 and ppc is unchanged.
This also means the same function version hook is only used for aarch64 and
riscv.

gcc/ChangeLog:

* attribs.h (common_function_versions): Removed.
* attribs.cc (common_function_versions): Removed.
* config/aarch64/aarch64.cc (aarch64_common_function_versions): 
Removed.
(aarch64_same_function_versions): New function to check if two 
version
strings imply the same version.
(TARGET_OPTION_FUNCTION_VERSIONS): Removed.
(TARGET_OPTION_SAME_FUNCTION_VERSIONS): New macro.
* config/i386/i386.cc (TARGET_OPTION_FUNCTION_VERSIONS): Removed.
* config/rs6000/rs6000.cc (TARGET_OPTION_FUNCTION_VERSIONS): 
Removed.
* config/riscv/riscv.cc (riscv_same_function_versions):  New 
function
to check if two version strings imply the same version.
(riscv_common_function_versions): Removed.
(TARGET_OPTION_FUNCTION_VERSIONS): Removed.
(TARGET_OPTION_SAME_FUNCTION_VERSIONS): New macro.
* doc/tm.texi: Regenerated.
* target.def: Remove common_version hook and add 
same_function_version
hook.
* doc/tm.texi.in: Ditto.
* tree.cc (distinct_version_decls): New function.
(mergeable_version_decls): Ditto.
* tree.h (distinct_version_decls): New function.
(mergeable_version_decls): Ditto.
* hooks.h (hook_stringslice_stringslice_unreachable): New function.
* hooks.cc (hook_stringslice_stringslice_unreachable): New function.

gcc/cp/ChangeLog:

* class.cc (resolve_address_of_overloaded_function): Updated to use
dijoint_versions_decls instead of common_function_version hook.
* decl.cc (decls_match): Refacture to use disjoint_version_decls and
to pass through conflicting_version argument.
(maybe_version_functions): Updated to use
disjoint_version_decls instead of common_function_version hook.
(duplicate_decls): Add logic to handle conflicting unmergable decls
and improve diagnostics for conflicting versions.
* decl2.cc (check_classfn): Updated to use
disjoint_version_decls instead of common_function_version hook.

Diff:
---
 gcc/attribs.cc|  67 
 gcc/attribs.h |   1 -
 gcc/config/aarch64/aarch64.cc |  25 +++--
 gcc/config/i386/i386.cc   |   3 -
 gcc/config/riscv/riscv.cc |  35 +++---
 gcc/config/rs6000/rs6000.cc   |   3 -
 gcc/cp/class.cc   |   3 +-
 gcc/cp/decl.cc|   8 +-
 gcc/cp/decl2.cc   |   2 +-
 gcc/doc/tm.texi   |   9 +-
 gcc/doc/tm.texi.in|   2 +-
 gcc/hooks.cc  |   6 ++
 gcc/hooks.h   

[gcc r16-4042] fmv: Support mixing of target_clones and target_version.

[Alfie Richards via Gcc-cvs]

https://gcc.gnu.org/g:a96bd4a01354157c7b6d4d9361b52481b40177b3

commit r16-4042-ga96bd4a01354157c7b6d4d9361b52481b40177b3
Author: Alfie Richards 
Date:   Wed Aug 6 11:22:14 2025 +

fmv: Support mixing of target_clones and target_version.

Add support for a FMV set defined by a combination of target_clones and
target_version definitions.

Additionally, change is_function_default_version to consider a function
declaration annotated with target_clones containing default to be a
default version.

Lastly, add support for the case that a target_clone has all versions 
filtered
out and therefore the declaration should be removed. This is relevant as now
the default could be defined in a target_version, so a target_clones no 
longer
necessarily contains the default.

This takes advantage of refactoring done in previous patches changing how
target_clones are expanded and how conflicting decls are handled.

gcc/ChangeLog:

* attribs.cc (is_function_default_version): Update to handle
target_clones.
* cgraph.h (FOR_EACH_FUNCTION_REMOVABLE): New macro.
* multiple_target.cc (expand_target_clones): Update logic to delete
empty target_clones and modify diagnostic.
(ipa_target_clone): Update to use FOR_EACH_FUNCTION_REMOVABLE.

gcc/c-family/ChangeLog:

* c-attribs.cc: Add support for target_version and target_clone 
mixing.

gcc/testsuite/ChangeLog:

* g++.target/aarch64/mv-and-mvc1.C: New test.
* g++.target/aarch64/mv-and-mvc2.C: New test.
* g++.target/aarch64/mv-and-mvc3.C: New test.
* g++.target/aarch64/mv-and-mvc4.C: New test.

Diff:
---
 gcc/attribs.cc | 10 ++-
 gcc/c-family/c-attribs.cc  |  9 +-
 gcc/cgraph.h   |  7 +
 gcc/multiple_target.cc | 24 ---
 gcc/testsuite/g++.target/aarch64/mv-and-mvc1.C | 38 
 gcc/testsuite/g++.target/aarch64/mv-and-mvc2.C | 29 ++
 gcc/testsuite/g++.target/aarch64/mv-and-mvc3.C | 41 ++
 gcc/testsuite/g++.target/aarch64/mv-and-mvc4.C | 38 
 8 files changed, 183 insertions(+), 13 deletions(-)

diff --git a/gcc/attribs.cc b/gcc/attribs.cc
index 9efc327553f6..29b88b8d8360 100644
--- a/gcc/attribs.cc
+++ b/gcc/attribs.cc
@@ -1233,7 +1233,8 @@ make_dispatcher_decl (const tree decl)
With the target attribute semantics, returns true if the function is marked
as default with the target version.
With the target_version attribute semantics, returns true if the function
-   is either not annotated, or annotated as default.  */
+   is either not annotated, annotated as default, or is a target_clone
+   containing the default declaration.  */
 
 bool
 is_function_default_version (const tree decl)
@@ -1250,6 +1251,13 @@ is_function_default_version (const tree decl)
 }
   else
 {
+  if (lookup_attribute ("target_clones", DECL_ATTRIBUTES (decl)))
+   {
+ int num_defaults = 0;
+ get_clone_versions (decl, &num_defaults);
+ return num_defaults > 0;
+   }
+
   attr = lookup_attribute ("target_version", DECL_ATTRIBUTES (decl));
   if (!attr)
return true;
diff --git a/gcc/c-family/c-attribs.cc b/gcc/c-family/c-attribs.cc
index 6e11f74de228..df9ff9947a89 100644
--- a/gcc/c-family/c-attribs.cc
+++ b/gcc/c-family/c-attribs.cc
@@ -249,13 +249,6 @@ static const struct attribute_spec::exclusions 
attr_target_clones_exclusions[] =
   ATTR_EXCL ("always_inline", true, true, true),
   ATTR_EXCL ("target", TARGET_HAS_FMV_TARGET_ATTRIBUTE,
 TARGET_HAS_FMV_TARGET_ATTRIBUTE, TARGET_HAS_FMV_TARGET_ATTRIBUTE),
-  ATTR_EXCL ("target_version", true, true, true),
-  ATTR_EXCL (NULL, false, false, false),
-};
-
-static const struct attribute_spec::exclusions 
attr_target_version_exclusions[] =
-{
-  ATTR_EXCL ("target_clones", true, true, true),
   ATTR_EXCL (NULL, false, false, false),
 };
 
@@ -543,7 +536,7 @@ const struct attribute_spec c_common_gnu_attributes[] =
  attr_target_exclusions },
   { "target_version", 1, 1, true, false, false, false,
  handle_target_version_attribute,
- attr_target_version_exclusions },
+ NULL },
   { "target_clones",  1, -1, true, false, false, false,
  handle_target_clones_attribute,
  attr_target_clones_exclusions },
diff --git a/gcc/cgraph.h b/gcc/cgraph.h
index a7906265d7e5..b68a8df87d55 100644
--- a/gcc/cgraph.h
+++ b/gcc/cgraph.h
@@ -3124,6 +3124,13 @@ symbol_table::next_function_with_gimple_body 
(cgraph_node *node)
for ((node) = symtab->first_function (); (node); \
(n

[gcc r16-4043] aarch64: testsuite: Add diagnostic tests for Aarch64 FMV.

[Alfie Richards via Gcc-cvs]

https://gcc.gnu.org/g:1d36100bcf83625f6c8162f275c0b99363b389b2

commit r16-4043-g1d36100bcf83625f6c8162f275c0b99363b389b2
Author: Alfie Richards 
Date:   Thu Feb 13 15:59:43 2025 +

aarch64: testsuite: Add diagnostic tests for Aarch64 FMV.

Add tests covering many FMV errors for Aarch64, including
redeclaration, and mixing target_clones and target_versions.

gcc/testsuite/ChangeLog:

* g++.target/aarch64/mv-and-mvc-error1.C: New test.
* g++.target/aarch64/mv-and-mvc-error2.C: New test.
* g++.target/aarch64/mv-and-mvc-error3.C: New test.
* g++.target/aarch64/mv-error1.C: New test.
* g++.target/aarch64/mv-error2.C: New test.
* g++.target/aarch64/mv-error3.C: New test.
* g++.target/aarch64/mv-error4.C: New test.
* g++.target/aarch64/mv-error5.C: New test.
* g++.target/aarch64/mv-error6.C: New test.
* g++.target/aarch64/mv-error7.C: New test.
* g++.target/aarch64/mv-error8.C: New test.
* g++.target/aarch64/mvc-error1.C: New test.
* g++.target/aarch64/mvc-error2.C: New test.
* g++.target/aarch64/mvc-warning1.C: Modified test.

Diff:
---
 .../g++.target/aarch64/mv-and-mvc-error1.C  | 10 ++
 .../g++.target/aarch64/mv-and-mvc-error2.C  | 10 ++
 .../g++.target/aarch64/mv-and-mvc-error3.C  |  9 +
 gcc/testsuite/g++.target/aarch64/mv-error1.C| 19 +++
 gcc/testsuite/g++.target/aarch64/mv-error2.C| 10 ++
 gcc/testsuite/g++.target/aarch64/mv-error3.C| 13 +
 gcc/testsuite/g++.target/aarch64/mv-error4.C| 10 ++
 gcc/testsuite/g++.target/aarch64/mv-error5.C|  9 +
 gcc/testsuite/g++.target/aarch64/mv-error6.C| 21 +
 gcc/testsuite/g++.target/aarch64/mv-error7.C| 12 
 gcc/testsuite/g++.target/aarch64/mv-error8.C| 13 +
 gcc/testsuite/g++.target/aarch64/mvc-error1.C   | 10 ++
 gcc/testsuite/g++.target/aarch64/mvc-error2.C   | 10 ++
 gcc/testsuite/g++.target/aarch64/mvc-warning1.C | 12 ++--
 14 files changed, 166 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/g++.target/aarch64/mv-and-mvc-error1.C 
b/gcc/testsuite/g++.target/aarch64/mv-and-mvc-error1.C
new file mode 100644
index ..98c3883324ee
--- /dev/null
+++ b/gcc/testsuite/g++.target/aarch64/mv-and-mvc-error1.C
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-require-ifunc "" } */
+/* { dg-options "-O0" } */
+/* { dg-additional-options "-Wno-experimental-fmv-target" } */
+
+__attribute__ ((target_version ("dotprod"))) int
+foo () { return 3; } /* { dg-message "previous declaration of .int foo 
\\\[\\\[target_version\\(.dotprod.\\)\\\]\\\] \\(\\)." } */
+
+__attribute__ ((target_clones ("dotprod", "sve"))) int
+foo () { return 1; } /* { dg-error ".int foo 
\\\[\\\[target_clones\\(.dotprod., .sve.\\)\\\]\\\] \\(\\). conflicts for 
version .dotprod." } */
diff --git a/gcc/testsuite/g++.target/aarch64/mv-and-mvc-error2.C 
b/gcc/testsuite/g++.target/aarch64/mv-and-mvc-error2.C
new file mode 100644
index ..5eaa124f3172
--- /dev/null
+++ b/gcc/testsuite/g++.target/aarch64/mv-and-mvc-error2.C
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-require-ifunc "" } */
+/* { dg-options "-O0" } */
+/* { dg-additional-options "-Wno-experimental-fmv-target" } */
+
+__attribute__ ((target_version ("default"))) int
+foo () { return 1; } /* { dg-message "old declaration .int foo 
\\\[\\\[target_version\\(.default.\\)\\\]\\\] \\(\\)." } */
+
+__attribute__ ((target_clones ("dotprod", "sve"))) float
+foo () { return 3; } /* { dg-error "ambiguating new declaration of .float foo 
\\\[\\\[target_clones\\(.dotprod., .sve.\\)\\\]\\\] \\(\\)." } */
diff --git a/gcc/testsuite/g++.target/aarch64/mv-and-mvc-error3.C 
b/gcc/testsuite/g++.target/aarch64/mv-and-mvc-error3.C
new file mode 100644
index ..fee6dc45ee3d
--- /dev/null
+++ b/gcc/testsuite/g++.target/aarch64/mv-and-mvc-error3.C
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-require-ifunc "" } */
+/* { dg-options "-O0" } */
+/* { dg-additional-options "-Wno-experimental-fmv-target" } */
+
+float foo () { return 1; } /* { dg-message ".float foo\\(\\). previously 
defined here" } */
+
+__attribute__ ((target_clones ("default", "dotprod", "sve"))) float
+foo () { return 3; } /* { dg-error "redefinition of .float foo 
\\\[\\\[target_clones\\(.default., .dotprod., .sve.\\)\\\]\\\] \\(\\)." } */
diff --git a/gcc/testsuite/g++.target/aarch64/mv-error1.C 
b/gcc/testsuite/g++.target/aarch64/mv-error1.C
new file mode 100644
index ..806a84f0ab4e
--- /dev/null
+++ b/gcc/testsuite/g++.target/aarch64/mv-error1.C
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-require-ifunc "" } */
+/* { dg-options "-O0" } */
+/* { dg-additional-options "-Wno-experimental-fmv-targ

[gcc r16-4053] ada: Remove rtp base spec linker option pragma

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:5d3f5fde935c8df89ad8f0ce567b3f1f21694011

commit r16-4053-g5d3f5fde935c8df89ad8f0ce567b3f1f21694011
Author: Douglas B Rupp 
Date:   Thu Sep 11 10:13:35 2025 -0700

ada: Remove rtp base spec linker option pragma

Remove the linker option pragmas from vxworks7 rtp system specs,
since this is needed only with gnatmake.  The same info is contained
in gprbuild, which is the only tool that can be used for building
vxworks apps.

gcc/ada/ChangeLog:

* libgnat/system-vxworks7-aarch64-rtp-smp.ads (Linker_Options):
Remove pragma for RTP specs.
* libgnat/system-vxworks7-ppc-rtp-smp.ads: Likewise.
* libgnat/system-vxworks7-ppc64-rtp-smp.ads: Likewise.
* libgnat/system-vxworks7-x86-rtp-smp.ads: Likewise.
* libgnat/system-vxworks7-x86_64-rtp-smp.ads: Likewise.

Diff:
---
 gcc/ada/libgnat/system-vxworks7-aarch64-rtp-smp.ads | 3 ---
 gcc/ada/libgnat/system-vxworks7-ppc-rtp-smp.ads | 3 ---
 gcc/ada/libgnat/system-vxworks7-ppc64-rtp-smp.ads   | 3 ---
 gcc/ada/libgnat/system-vxworks7-x86-rtp-smp.ads | 3 ---
 gcc/ada/libgnat/system-vxworks7-x86_64-rtp-smp.ads  | 3 ---
 5 files changed, 15 deletions(-)

diff --git a/gcc/ada/libgnat/system-vxworks7-aarch64-rtp-smp.ads 
b/gcc/ada/libgnat/system-vxworks7-aarch64-rtp-smp.ads
index 1a96736cec18..7b01f8527ec9 100644
--- a/gcc/ada/libgnat/system-vxworks7-aarch64-rtp-smp.ads
+++ b/gcc/ada/libgnat/system-vxworks7-aarch64-rtp-smp.ads
@@ -120,9 +120,6 @@ package System is
 
 private
 
-   pragma Linker_Options ("--specs=vxworks7-rtp-base-link.spec");
-   --  Define the symbol wrs_rtp_base
-
type Address is mod Memory_Size;
for Address'Size use Standard'Address_Size;
 
diff --git a/gcc/ada/libgnat/system-vxworks7-ppc-rtp-smp.ads 
b/gcc/ada/libgnat/system-vxworks7-ppc-rtp-smp.ads
index 862062f8e7c5..1958e1021f6e 100644
--- a/gcc/ada/libgnat/system-vxworks7-ppc-rtp-smp.ads
+++ b/gcc/ada/libgnat/system-vxworks7-ppc-rtp-smp.ads
@@ -120,9 +120,6 @@ package System is
 
 private
 
-   pragma Linker_Options ("--specs=vxworks7-rtp-base-link.spec");
-   --  Define the symbol wrs_rtp_base
-
type Address is mod Memory_Size;
for Address'Size use Standard'Address_Size;
 
diff --git a/gcc/ada/libgnat/system-vxworks7-ppc64-rtp-smp.ads 
b/gcc/ada/libgnat/system-vxworks7-ppc64-rtp-smp.ads
index e289495b7203..f8c69d6f8855 100644
--- a/gcc/ada/libgnat/system-vxworks7-ppc64-rtp-smp.ads
+++ b/gcc/ada/libgnat/system-vxworks7-ppc64-rtp-smp.ads
@@ -120,9 +120,6 @@ package System is
 
 private
 
-   pragma Linker_Options ("--specs=vxworks7-ppc64-rtp-base-link.spec");
-   --  Define the symbol wrs_rtp_base
-
type Address is mod Memory_Size;
for Address'Size use Standard'Address_Size;
 
diff --git a/gcc/ada/libgnat/system-vxworks7-x86-rtp-smp.ads 
b/gcc/ada/libgnat/system-vxworks7-x86-rtp-smp.ads
index 9d73cee9720f..de3f68d3ebe9 100644
--- a/gcc/ada/libgnat/system-vxworks7-x86-rtp-smp.ads
+++ b/gcc/ada/libgnat/system-vxworks7-x86-rtp-smp.ads
@@ -118,9 +118,6 @@ package System is
 
 private
 
-   pragma Linker_Options ("--specs=vxworks7-x86-rtp-base-link.spec");
-   --  Define the symbol wrs_rtp_base
-
type Address is mod Memory_Size;
for Address'Size use Standard'Address_Size;
 
diff --git a/gcc/ada/libgnat/system-vxworks7-x86_64-rtp-smp.ads 
b/gcc/ada/libgnat/system-vxworks7-x86_64-rtp-smp.ads
index 3c82efd8e213..539e6bdf3017 100644
--- a/gcc/ada/libgnat/system-vxworks7-x86_64-rtp-smp.ads
+++ b/gcc/ada/libgnat/system-vxworks7-x86_64-rtp-smp.ads
@@ -118,9 +118,6 @@ package System is
 
 private
 
-   pragma Linker_Options ("--specs=vxworks7-x86_64-rtp-base-link.spec");
-   --  Define the symbol wrs_rtp_base
-
type Address is mod Memory_Size;
for Address'Size use Standard'Address_Size;

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Correction régression findloc_10.f90

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:a234e98c40ba40c9354bf0241feed4cc3b2fe4ef

commit a234e98c40ba40c9354bf0241feed4cc3b2fe4ef
Author: Mikael Morin 
Date:   Tue Sep 23 12:15:40 2025 +0200

Correction régression findloc_10.f90

Diff:
---
 gcc/fortran/trans-array.cc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 73f2f92b5733..3bf1ab6bd4e8 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -7317,8 +7317,8 @@ gfc_get_dataptr_offset (stmtblock_t *block, tree parm, 
tree desc, tree offset,
 
   /* Set the target data pointer.  */
   if (TREE_CODE (TREE_TYPE (tmp)) == POINTER_TYPE
-  && (TREE_CODE (TREE_TYPE (tmp)) == ARRAY_TYPE
- || TREE_CODE (TREE_TYPE (tmp)) == INTEGER_TYPE)
+  && (TREE_CODE (TREE_TYPE (TREE_TYPE (tmp))) == ARRAY_TYPE
+ || TREE_CODE (TREE_TYPE (TREE_TYPE (tmp))) == INTEGER_TYPE)
   && TYPE_STRING_FLAG (TREE_TYPE (TREE_TYPE (tmp
 offset = fold_convert (gfc_array_dataptr_type (desc), tmp);
   else

[gcc r16-4060] arm: mve: fix out-of range literal pool for a const_vector [PR121810]

[Richard Earnshaw via Gcc-cvs]

https://gcc.gnu.org/g:2e1c12409662c20f45b0e4dabaadff033ef674f7

commit r16-4060-g2e1c12409662c20f45b0e4dabaadff033ef674f7
Author: Richard Earnshaw 
Date:   Fri Sep 5 15:25:55 2025 +0100

arm: mve: fix out-of range literal pool for a const_vector [PR121810]

For the pattern mve_mov, the alternative that describes literal
pool support is incorrect.  This leads to compiler getting the
calculations wrong for the available distance to the next pool
fragment because the selected alternative is a shorter sequence than
the correct one.  In particular the sequence generated for a 128-bit
constant is

vldr.64  d0, Pool// Insn length 4, alternative 7 (part 1)
vldr.64  d1, Pool+8  // Insn length 4, alternative 7 (part 2)

Note that the second instruction needs 4 bytes more range than the
first because the PC has advanced by 4 bytes, but the next slot in the
pool has advanced by 8.

The fix is to move the 'Ui' constraint to the correct alternative
and to move the pool-range attributes to that alternative as well.

I've fixed a couple of other nits in this code at the same time:
- the thumb2_neg_pool_range attribute was misnamed (as neg_pool_range),
meaning it was ignored in Thumb state, which is the only time this
pattern is available.
- the load range was not a multiple of 4, which makes no sense for
an insn sequence that is a multiple of 4 bytes long.  I've rounded the
value down out of caution, but it may well have been OK with 1020 as
the forward range.

I'm not adding a testcase for this patch; the code to reproduce is
simply too complex to reliably test for a regression.

gcc/ChangeLog:
PR target/121810
* config/arm/mve.md (mve_mov): Move the Ui constraint
and pool_range attributes to the final alternative.  Fix
the forward range value and correctly name the negative
range.

Diff:
---
 gcc/config/arm/mve.md | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 8527bd753e30..96faa05908f0 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -18,8 +18,8 @@
 ;; .
 
 (define_insn "mve_mov"
-  [(set (match_operand:MVE_types 0 "nonimmediate_operand" "=w,w,r,w   , w,   
r,Ux,w")
-   (match_operand:MVE_types 1 "general_operand"  " 
w,r,w,DnDm,UxUi,r,w, Ul"))]
+  [(set (match_operand:MVE_types 0 "nonimmediate_operand" "=w,w,r,w   ,w, 
r,Ux,w")
+   (match_operand:MVE_types 1 "general_operand"  " w,r,w,DnDm,Ux,r,w, 
UlUi"))]
   "TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT"
 {
   switch (which_alternative)
@@ -56,7 +56,7 @@
  }
   }
 
-case 4:  /* [w,UxUi].  */
+case 4:  /* [w,Ux].  */
   if (mode == V2DFmode || mode == V2DImode
  || mode == TImode)
return "vldrw.u32\t%q0, %E1";
@@ -73,7 +73,7 @@
   else
return "vstr.\t%q1, %E0";
 
-case 7:  /* [w,Ul].  */
+case 7:  /* [w,UlUi].  */
return output_move_neon (operands);
 
 default:
@@ -91,8 +91,8 @@
   (symbol_ref 
"CODE_FOR_nothing")])
(set_attr "type" 
"mve_move,mve_move,mve_move,mve_move,mve_load,multiple,mve_store,mve_load")
(set_attr "length" "4,8,8,4,4,8,4,8")
-   (set_attr "thumb2_pool_range" "*,*,*,*,1018,*,*,*")
-   (set_attr "neg_pool_range" "*,*,*,*,996,*,*,*")])
+   (set_attr "thumb2_pool_range" "*,*,*,*,*,*,*,1016")
+   (set_attr "thumb2_neg_pool_range" "*,*,*,*,*,*,*,996")])
 
 ;;
 ;; [vdupq_n_u, vdupq_n_s, vdupq_n_f]

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Correction régression actual_array_subref.f90

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:7a45b25be7f84904214b22d9beb29b3c35ea5c89

commit 7a45b25be7f84904214b22d9beb29b3c35ea5c89
Author: Mikael Morin 
Date:   Tue Sep 23 15:41:01 2025 +0200

Correction régression actual_array_subref.f90

Diff:
---
 gcc/fortran/trans-array.cc | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 43d2d9825fc5..b735e3a35f2b 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -7240,6 +7240,8 @@ gfc_get_dataptr_offset (stmtblock_t *block, tree parm, 
tree desc, tree offset,
  break;
 
case REF_SUBSTRING:
+ if (TREE_CODE (TREE_TYPE (tmp)) == POINTER_TYPE)
+   tmp = build_fold_indirect_ref_loc (input_location, tmp);
  gcc_assert (TREE_CODE (TREE_TYPE (tmp)) == ARRAY_TYPE);
  gfc_init_se (&start, NULL);
  gfc_conv_expr_type (&start, ref->u.ss.start, 
gfc_charlen_type_node);

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Sauvegarde modif

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:d71f8e0b6ffa0348c3de21d6b353a71dad1ecb67

commit d71f8e0b6ffa0348c3de21d6b353a71dad1ecb67
Author: Mikael Morin 
Date:   Tue Sep 23 21:08:11 2025 +0200

Sauvegarde modif

Diff:
---
 gcc/fortran/trans-array.cc | 20 +---
 1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index bb0394f52bba..ff4751767693 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -3891,13 +3891,19 @@ build_array_ref (gfc_se *se, tree array, tree ref_base, 
gfc_expr *expr,
|| (expr && expr->ts.deferred && array
&& GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (array
  {
-   if (TREE_CODE (array) == COMPONENT_REF)
- decl = array;
-   else if (INDIRECT_REF_P (array))
- decl = TREE_OPERAND (array, 0);
-
-   if (decl == NULL_TREE)
- decl = array;
+   decl = array;
+   if (INDIRECT_REF_P (decl)
+   && !GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (decl)))
+ decl = TREE_OPERAND (decl, 0);
+
+   if (DECL_P (decl)
+   && DECL_LANG_SPECIFIC (decl)
+   && GFC_DECL_SAVED_DESCRIPTOR (decl))
+ decl = GFC_DECL_SAVED_DESCRIPTOR (decl);
+
+   if (POINTER_TYPE_P (TREE_TYPE (decl))
+   && GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (TREE_TYPE (decl
+ decl = build_fold_indirect_ref_loc (input_location, decl);
  }
 
bool non_negative_stride = is_temp_array

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Correction partielle unlimited_polymorphic_17.f90

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:30e67f9e04adcd455f4e8e301941c053989e11e7

commit 30e67f9e04adcd455f4e8e301941c053989e11e7
Author: Mikael Morin 
Date:   Tue Sep 23 19:25:38 2025 +0200

Correction partielle unlimited_polymorphic_17.f90

Diff:
---
 gcc/fortran/trans-array.cc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 22db090d62d8..bb0394f52bba 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -3776,6 +3776,9 @@ non_negative_strides_array_p (tree expr)
   if (!GFC_ARRAY_TYPE_P (type))
 return false;
 
+  if (INDIRECT_REF_P (expr))
+expr = TREE_OPERAND (expr, 0);
+
   /* If the array was originally a dummy with a descriptor, strides can be
  negative.  */
   if (DECL_P (expr)

[gcc r16-4068] libstdc++/testsuite: Unpoison 'u' on s390x in names.cc test

[Patrick Palka via Gcc-cvs]

https://gcc.gnu.org/g:e9f3138f38067664bae25947ebabc0e8fa223d43

commit r16-4068-ge9f3138f38067664bae25947ebabc0e8fa223d43
Author: Patrick Palka 
Date:   Tue Sep 23 22:41:26 2025 -0400

libstdc++/testsuite: Unpoison 'u' on s390x in names.cc test

This is the s390 counterpart to r11-7364-gd0453cf5c68b6a, and fixes the
following names.cc failure caused by a use of a poisoned identifier.
If we look at the corresponding upstream header[1] it's clear that the
problematic identifier is 'u'.

In file included from /usr/include/linux/types.h:5,
 from /usr/include/linux/sched/types.h:5,
 from /usr/include/bits/sched.h:61,
 from /usr/include/sched.h:43,
 from /usr/include/pthread.h:22,
 from 
/usr/include/c++/14/s390x-redhat-linux/bits/gthr-default.h:35,
 from 
/usr/include/c++/14/s390x-redhat-linux/bits/gthr.h:157,
 from /usr/include/c++/14/ext/atomicity.h:35,
 from /usr/include/c++/14/bits/ios_base.h:39,
 from /usr/include/c++/14/streambuf:43,
 from /usr/include/c++/14/bits/streambuf_iterator.h:35,
 from /usr/include/c++/14/iterator:66,
 from 
/usr/include/c++/14/s390x-redhat-linux/bits/stdc++.h:54,
 from 
/root/rpmbuild/BUILD/gcc-14.3.1-20250617/libstdc++-v3/testsuite/17_intro/names.cc:384:
/usr/include/asm/types.h:24: error: expected unqualified-id before '[' token
/usr/include/asm/types.h:24: error: expected ')' before '[' token

/root/rpmbuild/BUILD/gcc-14.3.1-20250617/libstdc++-v3/testsuite/17_intro/names.cc:101:
 note: to match this '('
compiler exited with status 1
FAIL: 17_intro/names.cc  -std=gnu++98 (test for excess errors)
Excess errors:
/usr/include/asm/types.h:24: error: expected unqualified-id before '[' token
/usr/include/asm/types.h:24: error: expected ')' before '[' token

[1]: 
https://github.com/torvalds/linux/blob/master/arch/s390/include/uapi/asm/types.h

libstdc++-v3/ChangeLog:

* testsuite/17_intro/names.cc: Undefine 'u' on s390*-linux.

Reviewed-by: Jonathan Wakely 

Diff:
---
 libstdc++-v3/testsuite/17_intro/names.cc | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/libstdc++-v3/testsuite/17_intro/names.cc 
b/libstdc++-v3/testsuite/17_intro/names.cc
index e94da9defb29..befb5aad2575 100644
--- a/libstdc++-v3/testsuite/17_intro/names.cc
+++ b/libstdc++-v3/testsuite/17_intro/names.cc
@@ -286,6 +286,8 @@
 //  defines fpreg_t::d and fpreg_t::f
 #undef d
 #undef f
+//  defines __vector128::u
+#undef u
 #endif
 
 #if defined (__linux__) && defined (__sparc__)