https://gcc.gnu.org/g:1617b9e1bbd967959d1f0cfd428137cf1da1e34c
commit r16-4067-g1617b9e1bbd967959d1f0cfd428137cf1da1e34c
Author: Pan Li <pan2...@intel.com>
Date: Fri Sep 19 14:54:48 2025 +0800
RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for mul
Add test case for both the run and asm check of mul based SAT_MUL.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat/sat_u_mul-6-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-6-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_mul-6-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-6-u8-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-6-u8-from-u64.rv64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-6-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-6-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-6-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u64.c: New test.
Signed-off-by: Pan Li <pan2...@intel.com>
Diff:
---
.../gcc.target/riscv/sat/sat_u_mul-6-u16-from-u32.c | 11 +++++++++++
.../gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv32.c | 11 +++++++++++
.../gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv64.c | 11 +++++++++++
.../gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv32.c | 11 +++++++++++
.../gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv64.c | 11 +++++++++++
.../gcc.target/riscv/sat/sat_u_mul-6-u8-from-u16.c | 11 +++++++++++
.../gcc.target/riscv/sat/sat_u_mul-6-u8-from-u32.c | 11 +++++++++++
.../gcc.target/riscv/sat/sat_u_mul-6-u8-from-u64.rv32.c | 11 +++++++++++
.../gcc.target/riscv/sat/sat_u_mul-6-u8-from-u64.rv64.c | 11 +++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-6-u16-from-u32.c | 16 ++++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-6-u16-from-u64.c | 16 ++++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-6-u32-from-u64.c | 16 ++++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u16.c | 16 ++++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u32.c | 16 ++++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u64.c | 16 ++++++++++++++++
15 files changed, 195 insertions(+)
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u32.c
new file mode 100644
index 000000000000..6e186a02d578
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint16_t
+#define WT uint32_t
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv32.c
new file mode 100644
index 000000000000..8c3ec20df5dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc -mabi=ilp32 -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint16_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv64.c
new file mode 100644
index 000000000000..5233bde4d7ee
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv64.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint16_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv32.c
new file mode 100644
index 000000000000..b5ed463db08a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc -mabi=ilp32 -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint32_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv64.c
new file mode 100644
index 000000000000..2cd4db505a10
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv64.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint32_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u8-from-u16.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u8-from-u16.c
new file mode 100644
index 000000000000..daf164983184
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u8-from-u16.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint8_t
+#define WT uint16_t
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u8-from-u32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u8-from-u32.c
new file mode 100644
index 000000000000..48f5d3eb22ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u8-from-u32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint8_t
+#define WT uint32_t
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u8-from-u64.rv32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u8-from-u64.rv32.c
new file mode 100644
index 000000000000..5b8af339f9cf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u8-from-u64.rv32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc -mabi=ilp32 -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint8_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u8-from-u64.rv64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u8-from-u64.rv64.c
new file mode 100644
index 000000000000..3a5e7cc43fb7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-6-u8-from-u64.rv64.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint8_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u16-from-u32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u16-from-u32.c
new file mode 100644
index 000000000000..d495ce537369
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u16-from-u32.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint16_t
+#define WT uint32_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_5_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u16-from-u64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u16-from-u64.c
new file mode 100644
index 000000000000..d663953f0894
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u16-from-u64.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint16_t
+#define WT uint64_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_5_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u32-from-u64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u32-from-u64.c
new file mode 100644
index 000000000000..5b47a3992a0f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u32-from-u64.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint32_t
+#define WT uint64_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_5_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u16.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u16.c
new file mode 100644
index 000000000000..536a2222ad43
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u16.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint8_t
+#define WT uint16_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_5_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u32.c
new file mode 100644
index 000000000000..1e778a8d5b23
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u32.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint8_t
+#define WT uint32_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_5_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u64.c
new file mode 100644
index 000000000000..98fda1986376
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u64.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint8_t
+#define WT uint64_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_5_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_5_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
