Re: [PATCH v2 07/48] dt-bindings: arm: tegra: Add binding for core power domain

2020-12-19 Thread Krzysztof Kozlowski
On Thu, Dec 17, 2020 at 09:05:57PM +0300, Dmitry Osipenko wrote:
> All NVIDIA Tegra SoCs have a core power domain where majority of hardware
> blocks reside. Add binding for the core power domain.
> 
> Signed-off-by: Dmitry Osipenko 
> ---
>  .../arm/tegra/nvidia,tegra20-core-domain.yaml | 48 +++
>  1 file changed, 48 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-core-domain.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-core-domain.yaml 
> b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-core-domain.yaml
> new file mode 100644
> index ..f3d8fd2d8371
> --- /dev/null
> +++ 
> b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-core-domain.yaml
> @@ -0,0 +1,48 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-core-domain.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NVIDIA Tegra Core Power Domain
> +
> +maintainers:
> +  - Dmitry Osipenko 
> +  - Jon Hunter 
> +  - Thierry Reding 
> +
> +properties:
> +  compatible:
> +enum:
> +  - nvidia,tegra20-core-domain
> +  - nvidia,tegra30-core-domain

The file should be in bindings/power.
Include also the power-domain.yaml schema.

> +
> +  operating-points-v2:
> +description:
> +  Should contain level, voltages and opp-supported-hw property.
> +  The supported-hw is a bitfield indicating SoC speedo or process
> +  ID mask.
> +
> +  "#power-domain-cells":
> +const: 0
> +
> +  power-supply:
> +description:
> +  Phandle to voltage regulator connected to the SoC Core power rail.
> +
> +required:
> +  - compatible
> +  - operating-points-v2
> +  - "#power-domain-cells"
> +  - power-supply
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +core-domain {

power-domain (to follow schema and devicetree spec)

Best regards,
Krzysztof


> +compatible = "nvidia,tegra20-core-domain";
> +operating-points-v2 = <&opp_table>;
> +power-supply = <®ulator>;
> +#power-domain-cells = <0>;
> +};
> -- 
> 2.29.2
> 
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Re: [PATCH v2 41/48] memory: tegra20-emc: Use devm_tegra_core_dev_init_opp_table()

2020-12-19 Thread Krzysztof Kozlowski
On Thu, Dec 17, 2020 at 09:06:31PM +0300, Dmitry Osipenko wrote:
> Use common devm_tegra_core_dev_init_opp_table() helper for the OPP table
> initialization.
> 
> Signed-off-by: Dmitry Osipenko 
> ---
>  drivers/memory/tegra/tegra20-emc.c | 57 +++---
>  1 file changed, 4 insertions(+), 53 deletions(-)

If there was no more Tegra MC work planned, this could easily go via
Tegra SoC tree. However I expect still work of your interconnect
patches, so maybe it's better to stick these in same tree.

In such case I would need a stable tag with the
devm_tegra_core_dev_init_opp_table() helper for memory controller tree.

Best regards,
Krzysztof

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Re: kernel BUG at drivers/dma-buf/dma-buf.c:LINE!

2020-12-19 Thread Dmitry Vyukov
On Sat, Dec 19, 2020 at 3:50 AM syzbot
 wrote:
>
> syzbot suspects this issue was fixed by commit:
>
> commit e722a295cf493388dae474745d30e91e1a2ec549
> Author: Greg Kroah-Hartman 
> Date:   Thu Aug 27 12:36:27 2020 +
>
> staging: ion: remove from the tree
>
> bisection log:  https://syzkaller.appspot.com/x/bisect.txt?x=17d4f13750
> start commit:   abb3438d Merge tag 'm68knommu-for-v5.9-rc3' of git://git.k..
> git tree:   upstream
> kernel config:  https://syzkaller.appspot.com/x/.config?x=978db74cb30aa994
> dashboard link: https://syzkaller.appspot.com/bug?extid=d6734079f30f7fc39021
> syz repro:  https://syzkaller.appspot.com/x/repro.syz?x=1742859690
>
> If the result looks correct, please mark the issue as fixed by replying with:
>
> #syz fix: staging: ion: remove from the tree
>
> For information about bisection process see: https://goo.gl/tpsmEJ#bisection

The reproducer opens /dev/ion

#syz fix: staging: ion: remove from the tree
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[PATCH 8455/8455] staging: rtl8188eu: core: fixed a comment format issue.

2020-12-19 Thread Daniel West
Fixed a checkpatch warning:

WARNING: Block comments use * on subsequent lines
 #4595: FILE: drivers/staging/rtl8188eu/core/rtw_mlme_ext.c:4595:
+/
+

The code is full of comments like this. Should the coding style
be inforced here, even when there is a logic to the way the code
was broken up?

Signed-off-by: Daniel West 
---
 drivers/staging/rtl8188eu/core/rtw_mlme_ext.c | 9 -
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c 
b/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c
index 8794907a39f4..adf2788a416f 100644
--- a/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c
+++ b/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c
@@ -4591,11 +4591,10 @@ void mlmeext_sta_del_event_callback(struct adapter 
*padapter)
}
 }
 
-/
-
-Following are the functions for the timer handlers
-
-*/
+/*
+ *
+ *Following are the functions for the timer handlers
+ */
 
 static u8 chk_ap_is_alive(struct adapter *padapter, struct sta_info *psta)
 {
-- 
2.25.1

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An investment company

2020-12-19 Thread Allied Group
Hello driverdev-devel@linuxdriverproject.org,


I am the investment officer of an investment company who are ready to fund 
projects in the form of debt finance. The company grant loan to both corporate 
and private entities at a low interest rate of 3% ROI per annual. The terms are 
very flexible and interesting.


Kindly revert back if you have projects that needs funding for further 
discussion and negotiation with any of the companies that will be interested to 
fund your project.


You can visit the company website:
www.alliedgroup.com.hk , 
http://www.alliedgroup.com.hk/eng/corpinfo/management.htm

Regards,


Mak Pak Hung
Executive Directors
Allied Group Investment Company
Hong Kong
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