Re: [PATCH] drm: Clean up errors in cdv_intel_dp.h
On Thu, Jan 11, 2024 at 06:56:48AM +, GuoHua Chen wrote:
Hi,
Please use the correct prefix: drm/gma500
Also, the change is made in cdv_intel_dp.c and not cdv_intel_dp.h. This
seems to be wrong in most of the patches you sent.
Please send these fixes as a series. That makes them easier to process.
> Fix the following errors reported by checkpatch:
>
> ERROR: else should follow close brace '}'
>
> Signed-off-by: GuoHua Chen
> ---
> drivers/gpu/drm/gma500/cdv_intel_dp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/gma500/cdv_intel_dp.c
> b/drivers/gpu/drm/gma500/cdv_intel_dp.c
> index 27cfeb6b470f..135a1226df1a 100644
> --- a/drivers/gpu/drm/gma500/cdv_intel_dp.c
> +++ b/drivers/gpu/drm/gma500/cdv_intel_dp.c
> @@ -735,7 +735,7 @@ cdv_intel_dp_aux_native_read(struct gma_encoder *encoder,
> if ((ack & DP_AUX_NATIVE_REPLY_MASK) ==
> DP_AUX_NATIVE_REPLY_ACK) {
> memcpy(recv, reply + 1, ret - 1);
> return ret - 1;
> - } else
> + } else
This doesn't apply. Not sure what happened here. You're removing a
trailing space but the error in your description says you need to fix
the style of an if-else statement.
-Patrik
> if ((ack & DP_AUX_NATIVE_REPLY_MASK) ==
> DP_AUX_NATIVE_REPLY_DEFER)
> udelay(100);
> else
> --
> 2.17.1
>
Re: [PATCH] drm/vmwgfx: Fix possible null pointer derefence with invalid contexts
On Wed, Jan 10, 2024 at 10:03 PM Zack Rusin wrote:
>
> vmw_context_cotable can return either an error or a null pointer and its
> usage sometimes went unchecked. Subsequent code would then try to access
> either a null pointer or an error value.
>
> The invalid dereferences were only possible with malformed userspace
> apps which never properly initialized the rendering contexts.
>
> Check the results of vmw_context_cotable to fix the invalid derefs.
>
> Thanks:
> ziming zhang(@ezrak1e) from Ant Group Light-Year Security Lab
> who was the first person to discover it.
> Niels De Graef who reported it and helped to track down the poc.
>
> Fixes: 9c079b8ce8bf ("drm/vmwgfx: Adapt execbuf to the new validation api")
> Cc: # v4.20+
> Reported-by: Niels De Graef
> Signed-off-by: Zack Rusin
> Cc: Martin Krastev
> Cc: Maaz Mombasawala
> Cc: Ian Forbes
> Cc: Broadcom internal kernel review list
>
> Cc: dri-devel@lists.freedesktop.org
> ---
> drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 14 +++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
> b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
> index 272141b6164c..4f09959d27ba 100644
> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
> @@ -447,7 +447,7 @@ static int vmw_resource_context_res_add(struct
> vmw_private *dev_priv,
> vmw_res_type(ctx) == vmw_res_dx_context) {
> for (i = 0; i < cotable_max; ++i) {
> res = vmw_context_cotable(ctx, i);
> - if (IS_ERR(res))
> + if (IS_ERR_OR_NULL(res))
> continue;
>
> ret = vmw_execbuf_res_val_add(sw_context, res,
> @@ -1266,6 +1266,8 @@ static int vmw_cmd_dx_define_query(struct vmw_private
> *dev_priv,
> return -EINVAL;
>
> cotable_res = vmw_context_cotable(ctx_node->ctx,
> SVGA_COTABLE_DXQUERY);
> + if (IS_ERR_OR_NULL(cotable_res))
> + return cotable_res ? PTR_ERR(cotable_res) : -EINVAL;
> ret = vmw_cotable_notify(cotable_res, cmd->body.queryId);
>
> return ret;
> @@ -2484,6 +2486,8 @@ static int vmw_cmd_dx_view_define(struct vmw_private
> *dev_priv,
> return ret;
>
> res = vmw_context_cotable(ctx_node->ctx,
> vmw_view_cotables[view_type]);
> + if (IS_ERR_OR_NULL(res))
> + return res ? PTR_ERR(res) : -EINVAL;
> ret = vmw_cotable_notify(res, cmd->defined_id);
> if (unlikely(ret != 0))
> return ret;
> @@ -2569,8 +2573,8 @@ static int vmw_cmd_dx_so_define(struct vmw_private
> *dev_priv,
>
> so_type = vmw_so_cmd_to_type(header->id);
> res = vmw_context_cotable(ctx_node->ctx, vmw_so_cotables[so_type]);
> - if (IS_ERR(res))
> - return PTR_ERR(res);
> + if (IS_ERR_OR_NULL(res))
> + return res ? PTR_ERR(res) : -EINVAL;
> cmd = container_of(header, typeof(*cmd), header);
> ret = vmw_cotable_notify(res, cmd->defined_id);
>
> @@ -2689,6 +2693,8 @@ static int vmw_cmd_dx_define_shader(struct vmw_private
> *dev_priv,
> return -EINVAL;
>
> res = vmw_context_cotable(ctx_node->ctx, SVGA_COTABLE_DXSHADER);
> + if (IS_ERR_OR_NULL(res))
> + return res ? PTR_ERR(res) : -EINVAL;
> ret = vmw_cotable_notify(res, cmd->body.shaderId);
> if (ret)
> return ret;
> @@ -3010,6 +3016,8 @@ static int vmw_cmd_dx_define_streamoutput(struct
> vmw_private *dev_priv,
> }
>
> res = vmw_context_cotable(ctx_node->ctx, SVGA_COTABLE_STREAMOUTPUT);
> + if (IS_ERR_OR_NULL(res))
> + return res ? PTR_ERR(res) : -EINVAL;
> ret = vmw_cotable_notify(res, cmd->body.soid);
> if (ret)
> return ret;
> --
> 2.40.1
>
LGTM
Reviewed-by: Martin Krastev
Regards,
Martin
Re: [PATCH 1/3] selftests/bpf: Update LLVM Phabricator links
On 1/9/24 2:16 PM, Nathan Chancellor wrote:
reviews.llvm.org was LLVM's Phabricator instances for code review. It
has been abandoned in favor of GitHub pull requests. While the majority
of links in the kernel sources still work because of the work Fangrui
has done turning the dynamic Phabricator instance into a static archive,
there are some issues with that work, so preemptively convert all the
links in the kernel sources to point to the commit on GitHub.
Most of the commits have the corresponding differential review link in
the commit message itself so there should not be any loss of fidelity in
the relevant information.
Additionally, fix a typo in the xdpwall.c print ("LLMV" -> "LLVM") while
in the area.
Link: https://discourse.llvm.org/t/update-on-github-pull-requests/71540/172
Signed-off-by: Nathan Chancellor
Ack with one nit below.
Acked-by: Yonghong Song
---
Cc: a...@kernel.org
Cc: dan...@iogearbox.net
Cc: and...@kernel.org
Cc: myko...@fb.com
Cc: b...@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
---
tools/testing/selftests/bpf/README.rst | 32 +++---
tools/testing/selftests/bpf/prog_tests/xdpwall.c | 2 +-
.../selftests/bpf/progs/test_core_reloc_type_id.c | 2 +-
3 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/tools/testing/selftests/bpf/README.rst
b/tools/testing/selftests/bpf/README.rst
index cb9b95702ac6..b9a493f66557 100644
--- a/tools/testing/selftests/bpf/README.rst
+++ b/tools/testing/selftests/bpf/README.rst
@@ -115,7 +115,7 @@ the insn 20 undoes map_value addition. It is currently
impossible for the
verifier to understand such speculative pointer arithmetic.
Hence `this patch`__ addresses it on the compiler side. It was committed on
llvm 12.
-__ https://reviews.llvm.org/D85570
+__
https://github.com/llvm/llvm-project/commit/ddf1864ace484035e3cde5e83b3a31ac81e059c6
The corresponding C code
@@ -165,7 +165,7 @@ This is due to a llvm BPF backend bug. `The fix`__
has been pushed to llvm 10.x release branch and will be
available in 10.0.1. The patch is available in llvm 11.0.0 trunk.
-__ https://reviews.llvm.org/D78466
+__
https://github.com/llvm/llvm-project/commit/3cb7e7bf959dcd3b8080986c62e10a75c7af43f0
bpf_verif_scale/loop6.bpf.o test failure with Clang 12
==
@@ -204,7 +204,7 @@ r5(w5) is eventually saved on stack at insn #24 for later
use.
This cause later verifier failure. The bug has been `fixed`__ in
Clang 13.
-__ https://reviews.llvm.org/D97479
+__
https://github.com/llvm/llvm-project/commit/1959ead525b8830cc8a345f45e1c3ef9902d3229
BPF CO-RE-based tests and Clang version
===
@@ -221,11 +221,11 @@ failures:
- __builtin_btf_type_id() [0_, 1_, 2_];
- __builtin_preserve_type_info(), __builtin_preserve_enum_value() [3_, 4_].
-.. _0: https://reviews.llvm.org/D74572
-.. _1: https://reviews.llvm.org/D74668
-.. _2: https://reviews.llvm.org/D85174
-.. _3: https://reviews.llvm.org/D83878
-.. _4: https://reviews.llvm.org/D83242
+.. _0:
https://github.com/llvm/llvm-project/commit/6b01b465388b204d543da3cf49efd6080db094a9
+.. _1:
https://github.com/llvm/llvm-project/commit/072cde03aaa13a2c57acf62d79876bf79aa1919f
+.. _2:
https://github.com/llvm/llvm-project/commit/00602ee7ef0bf6c68d690a2bd729c12b95c95c99
+.. _3:
https://github.com/llvm/llvm-project/commit/6d218b4adb093ff2e9764febbbc89f429412006c
+.. _4:
https://github.com/llvm/llvm-project/commit/6d6750696400e7ce988d66a1a00e1d0cb32815f8
Floating-point tests and Clang version
==
@@ -234,7 +234,7 @@ Certain selftests, e.g. core_reloc, require support for the
floating-point
types, which was introduced in `Clang 13`__. The older Clang versions will
either crash when compiling these tests, or generate an incorrect BTF.
-__ https://reviews.llvm.org/D83289
+__
https://github.com/llvm/llvm-project/commit/a7137b238a07d9399d3ae96c0b461571bd5aa8b2
Kernel function call test and Clang version
===
@@ -248,7 +248,7 @@ Without it, the error from compiling bpf selftests looks
like:
libbpf: failed to find BTF for extern 'tcp_slow_start' [25] section: -2
-__ https://reviews.llvm.org/D93563
+__
https://github.com/llvm/llvm-project/commit/886f9ff53155075bd5f1e994f17b85d1e1b7470c
btf_tag test and Clang version
==
@@ -264,8 +264,8 @@ Without them, the btf_tag selftest will be skipped and you
will observe:
# btf_tag:SKIP
-.. _0: https://reviews.llvm.org/D111588
-.. _1: https://reviews.llvm.org/D99
+.. _0:
https://github.com/llvm/llvm-project/commit/a162b67c98066218d0d00aa13b99afb95d9bb5e6
+.. _1:
https://github.com/llvm/llvm-project/commit/3466e00716e12e32fdb100e3fcfca5c2b3e8d784
Clang dependencies for static linking tests
===
@
[PATCH] drm/vmwgfx: Clean up errors in vmwgfx_so.c
Fix the following errors reported by checkpatch:
ERROR: spaces required around that '=' (ctx:VxW)
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/vmwgfx/vmwgfx_so.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_so.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_so.c
index d199e718cb2d..124e583edf11 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_so.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_so.c
@@ -527,7 +527,7 @@ const SVGACOTableType vmw_so_cotables[] = {
[vmw_so_rs] = SVGA_COTABLE_RASTERIZERSTATE,
[vmw_so_ss] = SVGA_COTABLE_SAMPLER,
[vmw_so_so] = SVGA_COTABLE_STREAMOUTPUT,
- [vmw_so_max]= SVGA_COTABLE_MAX
+ [vmw_so_max] = SVGA_COTABLE_MAX
};
--
2.17.1
[PATCH] drm/amd: Clean up errors in vega10_ip_offset.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/cyan_skillfish_ip_offset.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/cyan_skillfish_ip_offset.h
b/drivers/gpu/drm/amd/include/cyan_skillfish_ip_offset.h
index ce79e5de8ce3..1a73296a9a74 100644
--- a/drivers/gpu/drm/amd/include/cyan_skillfish_ip_offset.h
+++ b/drivers/gpu/drm/amd/include/cyan_skillfish_ip_offset.h
@@ -25,13 +25,11 @@
#define MAX_SEGMENT5
-struct IP_BASE_INSTANCE
-{
+struct IP_BASE_INSTANCE {
unsigned int segment[MAX_SEGMENT];
} __maybe_unused;
-struct IP_BASE
-{
+struct IP_BASE {
struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
} __maybe_unused;
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in navi12_ip_offset.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/navi12_ip_offset.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/navi12_ip_offset.h
b/drivers/gpu/drm/amd/include/navi12_ip_offset.h
index d8fc00478b6a..e94d80ec8d92 100644
--- a/drivers/gpu/drm/amd/include/navi12_ip_offset.h
+++ b/drivers/gpu/drm/amd/include/navi12_ip_offset.h
@@ -25,13 +25,11 @@
#define MAX_SEGMENT5
-struct IP_BASE_INSTANCE
-{
+struct IP_BASE_INSTANCE {
unsigned int segment[MAX_SEGMENT];
};
-struct IP_BASE
-{
+struct IP_BASE {
struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
} __maybe_unused;
--
2.17.1
[PATCH] drm/amd/amdgpu: Clean up errors in beige_goby_ip_offset.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/beige_goby_ip_offset.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/beige_goby_ip_offset.h
b/drivers/gpu/drm/amd/include/beige_goby_ip_offset.h
index 26044cb285d2..48542ea6882a 100644
--- a/drivers/gpu/drm/amd/include/beige_goby_ip_offset.h
+++ b/drivers/gpu/drm/amd/include/beige_goby_ip_offset.h
@@ -26,13 +26,11 @@
#define MAX_SEGMENT 6
-struct IP_BASE_INSTANCE
-{
+struct IP_BASE_INSTANCE {
unsigned int segment[MAX_SEGMENT];
};
-struct IP_BASE
-{
+struct IP_BASE {
struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
};
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in atombios.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
ERROR: space required after that close brace '}'
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/atombios.h | 74 +++---
1 file changed, 30 insertions(+), 44 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/atombios.h
b/drivers/gpu/drm/amd/include/atombios.h
index b78360a71bc9..f01a2bdad699 100644
--- a/drivers/gpu/drm/amd/include/atombios.h
+++ b/drivers/gpu/drm/amd/include/atombios.h
@@ -205,19 +205,17 @@
// And the pointer actually points to this header.
//
-typedef struct _ATOM_COMMON_TABLE_HEADER
-{
+typedef struct _ATOM_COMMON_TABLE_HEADER {
USHORT usStructureSize;
UCHAR ucTableFormatRevision; //Change it when the Parser is not backward
compatible
UCHAR ucTableContentRevision; //Change it only when the table needs to
change but the firmware
//Image can't be updated, while Driver needs
to carry the new table!
-}ATOM_COMMON_TABLE_HEADER;
+} ATOM_COMMON_TABLE_HEADER;
//
// Structure stores the ROM header.
//
-typedef struct _ATOM_ROM_HEADER
-{
+typedef struct _ATOM_ROM_HEADER {
ATOM_COMMON_TABLE_HEADER sHeader;
UCHAR uaFirmWareSignature[4];//Signature to distinguish between
Atombios and non-atombios,
//atombios should init it as "ATOM", don't
change the position
@@ -236,11 +234,10 @@ typedef struct _ATOM_ROM_HEADER
USHORT usMasterDataTableOffset; //Offest for SW to get all data table
offsets, Don't change the position
UCHAR ucExtendedFunctionCode;
UCHAR ucReserved;
-}ATOM_ROM_HEADER;
+} ATOM_ROM_HEADER;
-typedef struct _ATOM_ROM_HEADER_V2_1
-{
+typedef struct _ATOM_ROM_HEADER_V2_1 {
ATOM_COMMON_TABLE_HEADER sHeader;
UCHAR uaFirmWareSignature[4];//Signature to distinguish between
Atombios and non-atombios,
//atombios should init it as "ATOM", don't
change the position
@@ -260,7 +257,7 @@ typedef struct _ATOM_ROM_HEADER_V2_1
UCHAR ucExtendedFunctionCode;
UCHAR ucReserved;
ULONG ulPSPDirTableOffset;
-}ATOM_ROM_HEADER_V2_1;
+} ATOM_ROM_HEADER_V2_1;
//==Command Table
Portion
@@ -269,7 +266,7 @@ typedef struct _ATOM_ROM_HEADER_V2_1
//
// Structures used in Command.mtb
//
-typedef struct _ATOM_MASTER_LIST_OF_COMMAND_TABLES{
+typedef struct _ATOM_MASTER_LIST_OF_COMMAND_TABLES {
USHORT ASIC_Init; //Function Table, used by
various SW components,latest version 1.1
USHORT GetDisplaySurfaceSize; //Atomic Table, Used by Bios
when enabling HW ICON
USHORT ASIC_RegistersInit; //Atomic Table, indirectly
used by various SW components,called from ASIC_Init
@@ -351,7 +348,7 @@ typedef struct _ATOM_MASTER_LIST_OF_COMMAND_TABLES{
USHORT ProcessAuxChannelTransaction; //Function Table,only used by
Bios
USHORT DPEncoderService; //Function Table,only used by
Bios
USHORT GetVoltageInfo; //Function Table,only used by
Bios since SI
-}ATOM_MASTER_LIST_OF_COMMAND_TABLES;
+} ATOM_MASTER_LIST_OF_COMMAND_TABLES;
// For backward compatible
#define ReadEDIDFromHWAssistedI2CProcessI2cChannelTransaction
@@ -377,17 +374,15 @@ typedef struct _ATOM_MASTER_LIST_OF_COMMAND_TABLES{
#define MemoryRefreshConversion Gfx_Init
-typedef struct _ATOM_MASTER_COMMAND_TABLE
-{
+typedef struct _ATOM_MASTER_COMMAND_TABLE {
ATOM_COMMON_TABLE_HEADER sHeader;
ATOM_MASTER_LIST_OF_COMMAND_TABLES ListOfCommandTables;
-}ATOM_MASTER_COMMAND_TABLE;
+} ATOM_MASTER_COMMAND_TABLE;
//
// Structures used in every command table
//
-typedef struct _ATOM_TABLE_ATTRIBUTE
-{
+typedef struct _ATOM_TABLE_ATTRIBUTE {
#if ATOM_BIG_ENDIAN
USHORT UpdatedByUtility:1; //[15]=Table updated by utility flag
USHORT PS_SizeInBytes:7; //[14:8]=Size of parameter space in
Bytes (multiple of a dword),
@@ -397,18 +392,17 @@ typedef struct _ATOM_TABLE_ATTRIBUTE
USHORT PS_SizeInBytes:7; //[14:8]=Size of parameter space in
Bytes (multiple of a dword),
USHORT UpdatedByUtility:1; //[15]=Table updated by utility flag
#endif
-}ATOM_TABLE_ATTRIBUTE;
+} ATOM_TABLE_ATTRIBUTE;
/**
[PATCH] drm/amd: Clean up errors in sdma_v2_4.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: trailing statements should be on next line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
index 8d5d86675a7f..07e19caf2bc1 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
@@ -57,22 +57,19 @@ static void sdma_v2_4_set_irq_funcs(struct amdgpu_device
*adev);
MODULE_FIRMWARE("amdgpu/topaz_sdma.bin");
MODULE_FIRMWARE("amdgpu/topaz_sdma1.bin");
-static const u32 sdma_offsets[SDMA_MAX_INSTANCE] =
-{
+static const u32 sdma_offsets[SDMA_MAX_INSTANCE] = {
SDMA0_REGISTER_OFFSET,
SDMA1_REGISTER_OFFSET
};
-static const u32 golden_settings_iceland_a11[] =
-{
+static const u32 golden_settings_iceland_a11[] = {
mmSDMA0_CHICKEN_BITS, 0xfc910007, 0x00810007,
mmSDMA0_CLK_CTRL, 0xff000fff, 0x,
mmSDMA1_CHICKEN_BITS, 0xfc910007, 0x00810007,
mmSDMA1_CLK_CTRL, 0xff000fff, 0x,
};
-static const u32 iceland_mgcg_cgcg_init[] =
-{
+static const u32 iceland_mgcg_cgcg_init[] = {
mmSDMA0_CLK_CTRL, 0xff000ff0, 0x0100,
mmSDMA1_CLK_CTRL, 0xff000ff0, 0x0100
};
@@ -142,7 +139,8 @@ static int sdma_v2_4_init_microcode(struct amdgpu_device
*adev)
case CHIP_TOPAZ:
chip_name = "topaz";
break;
- default: BUG();
+ default:
+ BUG();
}
for (i = 0; i < adev->sdma.num_instances; i++) {
@@ -1258,8 +1256,7 @@ static void sdma_v2_4_set_vm_pte_funcs(struct
amdgpu_device *adev)
adev->vm_manager.vm_pte_num_scheds = adev->sdma.num_instances;
}
-const struct amdgpu_ip_block_version sdma_v2_4_ip_block =
-{
+const struct amdgpu_ip_block_version sdma_v2_4_ip_block = {
.type = AMD_IP_BLOCK_TYPE_SDMA,
.major = 2,
.minor = 4,
--
2.17.1
[PATCH] drm/radeon/ni_dpm: Clean up errors in ni_dpm.c
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/ni_dpm.h | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/radeon/ni_dpm.h b/drivers/gpu/drm/radeon/ni_dpm.h
index 74e301936906..4e3e7303e035 100644
--- a/drivers/gpu/drm/radeon/ni_dpm.h
+++ b/drivers/gpu/drm/radeon/ni_dpm.h
@@ -59,8 +59,7 @@ struct ni_mc_reg_table {
#define NISLANDS_MCREGISTERTABLE_FIRST_DRIVERSTATE_SLOT 2
-enum ni_dc_cac_level
-{
+enum ni_dc_cac_level {
NISLANDS_DCCAC_LEVEL_0 = 0,
NISLANDS_DCCAC_LEVEL_1,
NISLANDS_DCCAC_LEVEL_2,
@@ -72,8 +71,7 @@ enum ni_dc_cac_level
NISLANDS_DCCAC_MAX_LEVELS
};
-struct ni_leakage_coeffients
-{
+struct ni_leakage_coeffients {
u32 at;
u32 bt;
u32 av;
@@ -83,8 +81,7 @@ struct ni_leakage_coeffients
u32 t_ref;
};
-struct ni_cac_data
-{
+struct ni_cac_data {
struct ni_leakage_coeffients leakage_coefficients;
u32 i_leakage;
s32 leakage_minimum_temperature;
@@ -100,8 +97,7 @@ struct ni_cac_data
u8 lts_truncate_n;
};
-struct ni_cac_weights
-{
+struct ni_cac_weights {
u32 weight_tcp_sig0;
u32 weight_tcp_sig1;
u32 weight_ta_sig;
--
2.17.1
[PATCH] drm/radeon/dpm: Clean up errors in trinity_dpm.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/trinity_dpm.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/trinity_dpm.h
b/drivers/gpu/drm/radeon/trinity_dpm.h
index c261657750ca..431e2b68d21e 100644
--- a/drivers/gpu/drm/radeon/trinity_dpm.h
+++ b/drivers/gpu/drm/radeon/trinity_dpm.h
@@ -64,8 +64,7 @@ struct trinity_ps {
#define TRINITY_NUM_NBPSTATES 4
-struct trinity_uvd_clock_table_entry
-{
+struct trinity_uvd_clock_table_entry {
u32 vclk;
u32 dclk;
u8 vclk_did;
--
2.17.1
[PATCH] drm/radeon: Clean up errors in ni_dpm.c
Fix the following errors reported by checkpatch:
ERROR: space prohibited before that ',' (ctx:WxV)
ERROR: space required after that ',' (ctx:WxV)
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/atom-bits.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/atom-bits.h
b/drivers/gpu/drm/radeon/atom-bits.h
index e8fae5c77514..2bfd6d0ff050 100644
--- a/drivers/gpu/drm/radeon/atom-bits.h
+++ b/drivers/gpu/drm/radeon/atom-bits.h
@@ -33,7 +33,7 @@ static inline uint8_t get_u8(void *bios, int ptr)
#define CU8(ptr) get_u8(ctx->bios, (ptr))
static inline uint16_t get_u16(void *bios, int ptr)
{
-return get_u8(bios ,ptr)|(((uint16_t)get_u8(bios, ptr+1))<<8);
+return get_u8(bios, ptr)|(((uint16_t)get_u8(bios, ptr+1))<<8);
}
#define U16(ptr) get_u16(ctx->ctx->bios, (ptr))
#define CU16(ptr) get_u16(ctx->bios, (ptr))
--
2.17.1
[PATCH] drm/amd/include/sienna_cichlid_ip_offset: Clean up errors in sienna_cichlid_ip_offset.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/sienna_cichlid_ip_offset.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/sienna_cichlid_ip_offset.h
b/drivers/gpu/drm/amd/include/sienna_cichlid_ip_offset.h
index b07bc2dd895d..054790470800 100644
--- a/drivers/gpu/drm/amd/include/sienna_cichlid_ip_offset.h
+++ b/drivers/gpu/drm/amd/include/sienna_cichlid_ip_offset.h
@@ -25,13 +25,11 @@
#define MAX_SEGMENT 5
-struct IP_BASE_INSTANCE
-{
+struct IP_BASE_INSTANCE {
unsigned int segment[MAX_SEGMENT];
};
-struct IP_BASE
-{
+struct IP_BASE {
struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
} __maybe_unused;
--
2.17.1
[PATCH] drm/amd: Clean up errors in amdgpu_vkms.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
index 453a4b786cfc..8baa2e0935cc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
@@ -660,8 +660,7 @@ static const struct amd_ip_funcs amdgpu_vkms_ip_funcs = {
.set_powergating_state = amdgpu_vkms_set_powergating_state,
};
-const struct amdgpu_ip_block_version amdgpu_vkms_ip_block =
-{
+const struct amdgpu_ip_block_version amdgpu_vkms_ip_block = {
.type = AMD_IP_BLOCK_TYPE_DCE,
.major = 1,
.minor = 0,
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in kgd_pp_interface.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following enum go on the same line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/kgd_pp_interface.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
index 36a5ad8c00c5..82de10502e1b 100644
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
@@ -244,8 +244,7 @@ enum pp_df_cstate {
* @PP_PWR_LIMIT_DEFAULT: Default Power Limit
* @PP_PWR_LIMIT_MAX: Maximum Power Limit
*/
-enum pp_power_limit_level
-{
+enum pp_power_limit_level {
PP_PWR_LIMIT_MIN = -1,
PP_PWR_LIMIT_CURRENT,
PP_PWR_LIMIT_DEFAULT,
@@ -260,8 +259,7 @@ enum pp_power_limit_level
* @PP_PWR_TYPE_FAST: manages the ~10 ms moving average of APU power,
* where supported.
*/
-enum pp_power_type
-{
+enum pp_power_type {
PP_PWR_TYPE_SUSTAINED,
PP_PWR_TYPE_FAST,
};
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in displayobject.h
Fix the following errors reported by checkpatch:
ERROR: spaces required around that '=' (ctx:WxV)
ERROR: space prohibited after that open parenthesis '('
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/displayobject.h | 72 ++---
1 file changed, 36 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/displayobject.h
b/drivers/gpu/drm/amd/include/displayobject.h
index 0f9529c40496..ce0c13e4e336 100644
--- a/drivers/gpu/drm/amd/include/displayobject.h
+++ b/drivers/gpu/drm/amd/include/displayobject.h
@@ -38,20 +38,20 @@
* Display Object Type Definition
*/
enum display_object_type {
-DISPLAY_OBJECT_TYPE_NONE =0x00,
-DISPLAY_OBJECT_TYPE_GPU
=0x01,
-DISPLAY_OBJECT_TYPE_ENCODER=0x02,
-DISPLAY_OBJECT_TYPE_CONNECTOR =0x03
+DISPLAY_OBJECT_TYPE_NONE = 0x00,
+DISPLAY_OBJECT_TYPE_GPU= 0x01,
+DISPLAY_OBJECT_TYPE_ENCODER = 0x02,
+DISPLAY_OBJECT_TYPE_CONNECTOR = 0x03
};
/
* Encorder Object Type Definition
*/
enum encoder_object_type {
-ENCODER_OBJECT_ID_NONE =0x00,
-ENCODER_OBJECT_ID_INTERNAL_UNIPHY =0x01,
-ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 =0x02,
-ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 =0x03,
+ENCODER_OBJECT_ID_NONE = 0x00,
+ENCODER_OBJECT_ID_INTERNAL_UNIPHY = 0x01,
+ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 = 0x02,
+ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 = 0x03,
};
@@ -60,14 +60,14 @@ ENCODER_OBJECT_ID_INTERNAL_UNIPHY2
=0x03,
*/
enum connector_object_type {
-CONNECTOR_OBJECT_ID_NONE
=0x00,
-CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D=0x01,
-CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D =0x02,
-CONNECTOR_OBJECT_ID_HDMI_TYPE_A =0x03,
-CONNECTOR_OBJECT_ID_LVDS =0x04,
-CONNECTOR_OBJECT_ID_DISPLAYPORT =0x05,
-CONNECTOR_OBJECT_ID_eDP
=0x06,
-CONNECTOR_OBJECT_ID_OPM
=0x07
+CONNECTOR_OBJECT_ID_NONE = 0x00,
+CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D = 0x01,
+CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D = 0x02,
+CONNECTOR_OBJECT_ID_HDMI_TYPE_A = 0x03,
+CONNECTOR_OBJECT_ID_LVDS = 0x04,
+CONNECTOR_OBJECT_ID_DISPLAYPORT= 0x05,
+CONNECTOR_OBJECT_ID_eDP = 0x06,
+CONNECTOR_OBJECT_ID_OPM = 0x07
};
@@ -81,24 +81,24 @@ CONNECTOR_OBJECT_ID_OPM
=0x07
*/
enum object_enum_id {
-OBJECT_ENUM_ID1
=0x01,
-OBJECT_ENUM_ID2
=0x02,
-OBJECT_ENUM_ID3
=0x03,
-OBJECT_ENUM_ID4
=0x04,
-OBJECT_ENUM_ID5
=0x05,
-OBJECT_ENUM_ID6
=0x06
+OBJECT_ENUM_ID1 = 0x01,
+OBJECT_ENUM_ID2 = 0x02,
+OBJECT_ENUM_ID3 = 0x03,
+OBJECT_ENUM_ID4 = 0x04,
+OBJECT_ENUM_ID5= 0x05,
+OBJECT_ENUM_ID6= 0x06
};
/
*Object ID Bit definition
*/
enum object_id_bit {
-OBJECT_ID_MASK
=0x00FF,
-ENUM_ID_MASK
=0x0F00,
-OBJECT_TYPE_MASK
=0xF000,
-OBJECT_ID_SHIFT
=0x00,
-ENUM_ID_SHIFT
=0x08,
-OBJECT_TYPE_SHIFT
=0x0C
+OBJECT_ID_MASK = 0x00FF,
+ENUM_ID_MASK = 0x0F00,
+OBJECT_TYPE_MASK = 0xF000,
+OBJECT_ID_SHIFT = 0x00,
+ENUM_ID_SHIFT = 0x08,
+OBJECT_TYPE_SHIFT = 0x0C
};
@@ -106,7 +106,7 @@ OBJECT_TYPE_SHIFT
=0x0C
* GPU Object definition - Shared with BIOS
*/
enum gpu_objet_def {
-GPU_
[PATCH] drm/amd/pp: Clean up errors in dm_pp_interface.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
ERROR: space prohibited before that ',' (ctx:WxE)
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/dm_pp_interface.h | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/dm_pp_interface.h
b/drivers/gpu/drm/amd/include/dm_pp_interface.h
index 1d93a0c574c9..acd1cef61b7c 100644
--- a/drivers/gpu/drm/amd/include/dm_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/dm_pp_interface.h
@@ -27,7 +27,7 @@
#define PP_MAX_CLOCK_LEVELS 16
-enum amd_pp_display_config_type{
+enum amd_pp_display_config_type {
AMD_PP_DisplayConfigType_None = 0,
AMD_PP_DisplayConfigType_DP54 ,
AMD_PP_DisplayConfigType_DP432 ,
@@ -36,8 +36,8 @@ enum amd_pp_display_config_type{
AMD_PP_DisplayConfigType_DP243,
AMD_PP_DisplayConfigType_DP216,
AMD_PP_DisplayConfigType_DP162,
- AMD_PP_DisplayConfigType_HDMI6G ,
- AMD_PP_DisplayConfigType_HDMI297 ,
+ AMD_PP_DisplayConfigType_HDMI6G,
+ AMD_PP_DisplayConfigType_HDMI297,
AMD_PP_DisplayConfigType_HDMI162,
AMD_PP_DisplayConfigType_LVDS,
AMD_PP_DisplayConfigType_DVI,
@@ -45,8 +45,7 @@ enum amd_pp_display_config_type{
AMD_PP_DisplayConfigType_VGA
};
-struct single_display_configuration
-{
+struct single_display_configuration {
uint32_t controller_index;
uint32_t controller_id;
uint32_t signal_type;
--
2.17.1
[PATCH] drm/amd/amdgpu: Clean up errors in amdgpu_umr.h
Fix the following errors reported by checkpatch:
spaces required around that '=' (ctx:VxV)
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/amdgpu/amdgpu_umr.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umr.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_umr.h
index 107f9bb0e24f..5b27fc41ffbf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umr.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umr.h
@@ -69,12 +69,12 @@ struct amdgpu_debugfs_gprwave_data {
};
enum AMDGPU_DEBUGFS_REGS2_CMDS {
- AMDGPU_DEBUGFS_REGS2_CMD_SET_STATE=0,
+ AMDGPU_DEBUGFS_REGS2_CMD_SET_STATE = 0,
AMDGPU_DEBUGFS_REGS2_CMD_SET_STATE_V2,
};
enum AMDGPU_DEBUGFS_GPRWAVE_CMDS {
- AMDGPU_DEBUGFS_GPRWAVE_CMD_SET_STATE=0,
+ AMDGPU_DEBUGFS_GPRWAVE_CMD_SET_STATE = 0,
};
//reg2 interface
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in clearstate_si.h
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/amdgpu/clearstate_si.h | 24 --
1 file changed, 8 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/clearstate_si.h
b/drivers/gpu/drm/amd/amdgpu/clearstate_si.h
index 66e39cdb5cb0..5fd96ddd7f0f 100644
--- a/drivers/gpu/drm/amd/amdgpu/clearstate_si.h
+++ b/drivers/gpu/drm/amd/amdgpu/clearstate_si.h
@@ -21,8 +21,7 @@
*
*/
-static const u32 si_SECT_CONTEXT_def_1[] =
-{
+static const u32 si_SECT_CONTEXT_def_1[] = {
0x, // DB_RENDER_CONTROL
0x, // DB_COUNT_CONTROL
0x, // DB_DEPTH_VIEW
@@ -236,8 +235,7 @@ static const u32 si_SECT_CONTEXT_def_1[] =
0x, // PA_SC_VPORT_ZMIN_15
0x3f80, // PA_SC_VPORT_ZMAX_15
};
-static const u32 si_SECT_CONTEXT_def_2[] =
-{
+static const u32 si_SECT_CONTEXT_def_2[] = {
0x, // CP_PERFMON_CNTX_CNTL
0x, // CP_RINGID
0x, // CP_VMID
@@ -511,8 +509,7 @@ static const u32 si_SECT_CONTEXT_def_2[] =
0x, // CB_BLEND6_CONTROL
0x, // CB_BLEND7_CONTROL
};
-static const u32 si_SECT_CONTEXT_def_3[] =
-{
+static const u32 si_SECT_CONTEXT_def_3[] = {
0x, // PA_CL_POINT_X_RAD
0x, // PA_CL_POINT_Y_RAD
0x, // PA_CL_POINT_SIZE
@@ -520,8 +517,7 @@ static const u32 si_SECT_CONTEXT_def_3[] =
0x, // VGT_DMA_BASE_HI
0x, // VGT_DMA_BASE
};
-static const u32 si_SECT_CONTEXT_def_4[] =
-{
+static const u32 si_SECT_CONTEXT_def_4[] = {
0x, // DB_DEPTH_CONTROL
0x, // DB_EQAA
0x, // CB_COLOR_CONTROL
@@ -680,16 +676,13 @@ static const u32 si_SECT_CONTEXT_def_4[] =
0x, // VGT_GS_OUT_PRIM_TYPE
0x, // IA_ENHANCE
};
-static const u32 si_SECT_CONTEXT_def_5[] =
-{
+static const u32 si_SECT_CONTEXT_def_5[] = {
0x, // VGT_PRIMITIVEID_EN
};
-static const u32 si_SECT_CONTEXT_def_6[] =
-{
+static const u32 si_SECT_CONTEXT_def_6[] = {
0x, // VGT_PRIMITIVEID_RESET
};
-static const u32 si_SECT_CONTEXT_def_7[] =
-{
+static const u32 si_SECT_CONTEXT_def_7[] = {
0x, // VGT_MULTI_PRIM_IB_RESET_EN
0, // HOLE
0, // HOLE
@@ -924,8 +917,7 @@ static const u32 si_SECT_CONTEXT_def_7[] =
0x, // CB_COLOR7_CLEAR_WORD0
0x, // CB_COLOR7_CLEAR_WORD1
};
-static const struct cs_extent_def si_SECT_CONTEXT_defs[] =
-{
+static const struct cs_extent_def si_SECT_CONTEXT_defs[] = {
{si_SECT_CONTEXT_def_1, 0xa000, 212 },
{si_SECT_CONTEXT_def_2, 0xa0d8, 272 },
{si_SECT_CONTEXT_def_3, 0xa1f5, 6 },
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in amdgpu_drv.c
Fix the following errors reported by checkpatch: ERROR: do not initialise globals to 0 Signed-off-by: chenxuebing --- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 880137774b4e..86d829055418 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -592,7 +592,7 @@ module_param_named(timeout_period, amdgpu_watchdog_timer.period, uint, 0644); #ifdef CONFIG_DRM_AMDGPU_SI #if IS_ENABLED(CONFIG_DRM_RADEON) || IS_ENABLED(CONFIG_DRM_RADEON_MODULE) -int amdgpu_si_support = 0; +int amdgpu_si_support; MODULE_PARM_DESC(si_support, "SI support (1 = enabled, 0 = disabled (default))"); #else int amdgpu_si_support = 1; @@ -611,7 +611,7 @@ module_param_named(si_support, amdgpu_si_support, int, 0444); #ifdef CONFIG_DRM_AMDGPU_CIK #if IS_ENABLED(CONFIG_DRM_RADEON) || IS_ENABLED(CONFIG_DRM_RADEON_MODULE) -int amdgpu_cik_support = 0; +int amdgpu_cik_support; MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled, 0 = disabled (default))"); #else int amdgpu_cik_support = 1; -- 2.17.1
[PATCH] drm/amdgpu: Clean up errors in amdgpu.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 616b6c911767..189bf62076f3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -114,14 +114,12 @@
#define MAX_GPU_INSTANCE 64
-struct amdgpu_gpu_instance
-{
+struct amdgpu_gpu_instance {
struct amdgpu_device*adev;
int mgpu_fan_enabled;
};
-struct amdgpu_mgpu_info
-{
+struct amdgpu_mgpu_info {
struct amdgpu_gpu_instance gpu_ins[MAX_GPU_INSTANCE];
struct mutexmutex;
uint32_tnum_gpu;
@@ -140,8 +138,7 @@ enum amdgpu_ss {
AMDGPU_SS_DRV_UNLOAD
};
-struct amdgpu_watchdog_timer
-{
+struct amdgpu_watchdog_timer {
bool timeout_fatal_disable;
uint32_t period; /* maxCycles = (1 << period), the number of cycles
before a timeout */
};
--
2.17.1
[PATCH] drm/amd/display: Clean up errors in renoir_ip_offset.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/renoir_ip_offset.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/renoir_ip_offset.h
b/drivers/gpu/drm/amd/include/renoir_ip_offset.h
index 7dff85c81e5a..fa023cfdf72d 100644
--- a/drivers/gpu/drm/amd/include/renoir_ip_offset.h
+++ b/drivers/gpu/drm/amd/include/renoir_ip_offset.h
@@ -25,13 +25,11 @@
#define MAX_SEGMENT5
-struct IP_BASE_INSTANCE
-{
+struct IP_BASE_INSTANCE {
unsigned int segment[MAX_SEGMENT];
};
-struct IP_BASE
-{
+struct IP_BASE {
struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
} __maybe_unused;
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in amdgpu_rlc.c
Fix the following errors reported by checkpatch:
ERROR: space prohibited before that '++' (ctx:WxB)
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
index 35e0ae9acadc..a6b66e393a5b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
@@ -241,7 +241,7 @@ void amdgpu_gfx_rlc_setup_cp_table(struct amdgpu_device
*adev)
table_size = le32_to_cpu(hdr->jt_size);
}
- for (i = 0; i < table_size; i ++) {
+ for (i = 0; i < table_size; i++) {
dst_ptr[bo_offset + i] =
cpu_to_le32(le32_to_cpu(fw_data[table_offset +
i]));
}
--
2.17.1
[PATCH] drm/amd/include/vangogh_ip_offset: Clean up errors in vangogh_ip_offset.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/vangogh_ip_offset.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/vangogh_ip_offset.h
b/drivers/gpu/drm/amd/include/vangogh_ip_offset.h
index 691073ed780e..695d7d04dfa6 100644
--- a/drivers/gpu/drm/amd/include/vangogh_ip_offset.h
+++ b/drivers/gpu/drm/amd/include/vangogh_ip_offset.h
@@ -28,13 +28,11 @@
#define MAX_SEGMENT 6
-struct IP_BASE_INSTANCE
-{
+struct IP_BASE_INSTANCE {
unsigned int segment[MAX_SEGMENT];
};
-struct IP_BASE
-{
+struct IP_BASE {
struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
} __maybe_unused;
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in jpeg_v2_5.c
Fix the following errors reported by checkpatch:
ERROR: space required before the open parenthesis '('
ERROR: that open brace { should be on the previous line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
index e67a337457ed..99cd49ee8ef6 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
@@ -551,7 +551,7 @@ static int jpeg_v2_5_set_powergating_state(void *handle,
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
int ret;
- if(state == adev->jpeg.cur_state)
+ if (state == adev->jpeg.cur_state)
return 0;
if (state == AMD_PG_STATE_GATE)
@@ -559,7 +559,7 @@ static int jpeg_v2_5_set_powergating_state(void *handle,
else
ret = jpeg_v2_5_start(adev);
- if(!ret)
+ if (!ret)
adev->jpeg.cur_state = state;
return ret;
@@ -754,8 +754,7 @@ static void jpeg_v2_5_set_irq_funcs(struct amdgpu_device
*adev)
}
}
-const struct amdgpu_ip_block_version jpeg_v2_5_ip_block =
-{
+const struct amdgpu_ip_block_version jpeg_v2_5_ip_block = {
.type = AMD_IP_BLOCK_TYPE_JPEG,
.major = 2,
.minor = 5,
@@ -763,8 +762,7 @@ const struct amdgpu_ip_block_version jpeg_v2_5_ip_block =
.funcs = &jpeg_v2_5_ip_funcs,
};
-const struct amdgpu_ip_block_version jpeg_v2_6_ip_block =
-{
+const struct amdgpu_ip_block_version jpeg_v2_6_ip_block = {
.type = AMD_IP_BLOCK_TYPE_JPEG,
.major = 2,
.minor = 6,
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in cgs_common.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
ERROR: space required after that ',' (ctx:VxV)
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/cgs_common.h | 23 +++
1 file changed, 11 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/cgs_common.h
b/drivers/gpu/drm/amd/include/cgs_common.h
index 60a6536ff656..f40b6a03fe63 100644
--- a/drivers/gpu/drm/amd/include/cgs_common.h
+++ b/drivers/gpu/drm/amd/include/cgs_common.h
@@ -149,27 +149,26 @@ struct cgs_ops {
struct cgs_os_ops; /* To be define in OS-specific CGS header */
-struct cgs_device
-{
+struct cgs_device {
const struct cgs_ops *ops;
/* to be embedded at the start of driver private structure */
};
/* Convenience macros that make CGS indirect function calls look like
* normal function calls */
-#define CGS_CALL(func,dev,...) \
+#define CGS_CALL(func, dev, ...) \
(((struct cgs_device *)dev)->ops->func(dev, ##__VA_ARGS__))
-#define CGS_OS_CALL(func,dev,...) \
+#define CGS_OS_CALL(func, dev, ...) \
(((struct cgs_device *)dev)->os_ops->func(dev, ##__VA_ARGS__))
-#define cgs_read_register(dev,offset) \
- CGS_CALL(read_register,dev,offset)
-#define cgs_write_register(dev,offset,value) \
- CGS_CALL(write_register,dev,offset,value)
-#define cgs_read_ind_register(dev,space,index) \
- CGS_CALL(read_ind_register,dev,space,index)
-#define cgs_write_ind_register(dev,space,index,value) \
- CGS_CALL(write_ind_register,dev,space,index,value)
+#define cgs_read_register(dev, offset) \
+ CGS_CALL(read_register, dev, offset)
+#define cgs_write_register(dev, offset, value) \
+ CGS_CALL(write_register, dev, offset, value)
+#define cgs_read_ind_register(dev, space, index) \
+ CGS_CALL(read_ind_register, dev, space, index)
+#define cgs_write_ind_register(dev, space, index, value) \
+ CGS_CALL(write_ind_register, dev, space, index, value)
#define cgs_get_firmware_info(dev, type, info) \
CGS_CALL(get_firmware_info, dev, type, info)
--
2.17.1
[PATCH] drm/vmwgfx: Clean up errors in vmwgfx_msg.c
Fix the following errors reported by checkpatch:
ERROR: "foo* const bar" should be "foo * const bar"
ERROR: that open brace { should be on the previous line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/vmwgfx/vmwgfx_msg.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c
index 2651fe0ef518..b56936f95d31 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c
@@ -87,8 +87,7 @@ struct rpc_channel {
#if IS_ENABLED(CONFIG_DRM_VMWGFX_MKSSTATS)
/* Kernel mksGuestStats counter names and desciptions; same order as enum
mksstat_kern_stats_t */
-static const char* const mksstat_kern_name_desc[MKSSTAT_KERN_COUNT][2] =
-{
+static const char * const mksstat_kern_name_desc[MKSSTAT_KERN_COUNT][2] = {
{ "vmw_execbuf_ioctl", "vmw_execbuf_ioctl" },
{ "vmw_cotable_resize", "vmw_cotable_resize" },
};
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in atomfirmwareid.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following enum go on the same line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/atomfirmwareid.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/atomfirmwareid.h
b/drivers/gpu/drm/amd/include/atomfirmwareid.h
index e6256efd03ae..1ca5fe7b131b 100644
--- a/drivers/gpu/drm/amd/include/atomfirmwareid.h
+++ b/drivers/gpu/drm/amd/include/atomfirmwareid.h
@@ -28,8 +28,7 @@
#ifndef _ATOMFIRMWAREID_H_
#define _ATOMFIRMWAREID_H_
-enum atom_master_data_table_id
-{
+enum atom_master_data_table_id {
VBIOS_DATA_TBL_ID__UTILITY_PIPELINE,
VBIOS_DATA_TBL_ID__MULTIMEDIA_INF,
VBIOS_DATA_TBL_ID__FIRMWARE_INF,
@@ -51,8 +50,7 @@ enum atom_master_data_table_id
VBIOS_DATA_TBL_ID__UNDEFINED,
};
-enum atom_master_command_table_id
-{
+enum atom_master_command_table_id {
VBIOS_CMD_TBL_ID__ASIC_INIT,
VBIOS_CMD_TBL_ID__DIGX_ENCODER_CONTROL,
VBIOS_CMD_TBL_ID__SET_ENGINE_CLOCK,
--
2.17.1
[PATCH] drm/radeon/dpm: Clean up errors in sumo_dpm.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: space prohibited before that close parenthesis ')'
ERROR: spaces required around that '?' (ctx:VxW)
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/sumo_dpm.c | 18 --
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/radeon/sumo_dpm.c
b/drivers/gpu/drm/radeon/sumo_dpm.c
index d49c145db437..21d27e6235f3 100644
--- a/drivers/gpu/drm/radeon/sumo_dpm.c
+++ b/drivers/gpu/drm/radeon/sumo_dpm.c
@@ -33,8 +33,7 @@
#define SUMO_MINIMUM_ENGINE_CLOCK 800
#define BOOST_DPM_LEVEL 7
-static const u32 sumo_utc[SUMO_PM_NUMBER_OF_TC] =
-{
+static const u32 sumo_utc[SUMO_PM_NUMBER_OF_TC] = {
SUMO_UTC_DFLT_00,
SUMO_UTC_DFLT_01,
SUMO_UTC_DFLT_02,
@@ -52,8 +51,7 @@ static const u32 sumo_utc[SUMO_PM_NUMBER_OF_TC] =
SUMO_UTC_DFLT_14,
};
-static const u32 sumo_dtc[SUMO_PM_NUMBER_OF_TC] =
-{
+static const u32 sumo_dtc[SUMO_PM_NUMBER_OF_TC] = {
SUMO_DTC_DFLT_00,
SUMO_DTC_DFLT_01,
SUMO_DTC_DFLT_02,
@@ -109,11 +107,11 @@ static void sumo_mg_clockgating_enable(struct
radeon_device *rdev, bool enable)
local1 = RREG32(CG_CGTT_LOCAL_1);
if (enable) {
- WREG32(CG_CGTT_LOCAL_0, (0 & CGCG_CGTT_LOCAL0_MASK) | (local0 &
~CGCG_CGTT_LOCAL0_MASK) );
- WREG32(CG_CGTT_LOCAL_1, (0 & CGCG_CGTT_LOCAL1_MASK) | (local1 &
~CGCG_CGTT_LOCAL1_MASK) );
+ WREG32(CG_CGTT_LOCAL_0, (0 & CGCG_CGTT_LOCAL0_MASK) | (local0 &
~CGCG_CGTT_LOCAL0_MASK));
+ WREG32(CG_CGTT_LOCAL_1, (0 & CGCG_CGTT_LOCAL1_MASK) | (local1 &
~CGCG_CGTT_LOCAL1_MASK));
} else {
- WREG32(CG_CGTT_LOCAL_0, (0x & CGCG_CGTT_LOCAL0_MASK) |
(local0 & ~CGCG_CGTT_LOCAL0_MASK) );
- WREG32(CG_CGTT_LOCAL_1, (0xCFFF & CGCG_CGTT_LOCAL1_MASK) |
(local1 & ~CGCG_CGTT_LOCAL1_MASK) );
+ WREG32(CG_CGTT_LOCAL_0, (0x & CGCG_CGTT_LOCAL0_MASK) |
(local0 & ~CGCG_CGTT_LOCAL0_MASK));
+ WREG32(CG_CGTT_LOCAL_1, (0xCFFF & CGCG_CGTT_LOCAL1_MASK) |
(local1 & ~CGCG_CGTT_LOCAL1_MASK));
}
}
@@ -702,9 +700,9 @@ static void sumo_post_notify_alt_vddnb_change(struct
radeon_device *rdev,
u32 nbps1_new = 0;
if (old_ps != NULL)
- nbps1_old = (old_ps->flags &
SUMO_POWERSTATE_FLAGS_FORCE_NBPS1_STATE)? 1 : 0;
+ nbps1_old = (old_ps->flags &
SUMO_POWERSTATE_FLAGS_FORCE_NBPS1_STATE) ? 1 : 0;
- nbps1_new = (new_ps->flags & SUMO_POWERSTATE_FLAGS_FORCE_NBPS1_STATE)?
1 : 0;
+ nbps1_new = (new_ps->flags & SUMO_POWERSTATE_FLAGS_FORCE_NBPS1_STATE) ?
1 : 0;
if (nbps1_old == 0 && nbps1_new == 1)
sumo_smu_notify_alt_vddnb_change(rdev, 1, 1);
--
2.17.1
[PATCH] drm/radeon/ci_dpm: Clean up errors in ci_dpm.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: need consistent spacing around '-' (ctx:WxV)
ERROR: space required before the open parenthesis '('
ERROR: "foo* bar" should be "foo *bar"
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/ci_dpm.c | 31 +--
1 file changed, 13 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c
index b8f4dac68d85..abe9d65cc460 100644
--- a/drivers/gpu/drm/radeon/ci_dpm.c
+++ b/drivers/gpu/drm/radeon/ci_dpm.c
@@ -46,36 +46,31 @@
#define VOLTAGE_VID_OFFSET_SCALE1625
#define VOLTAGE_VID_OFFSET_SCALE2100
-static const struct ci_pt_defaults defaults_hawaii_xt =
-{
+static const struct ci_pt_defaults defaults_hawaii_xt = {
1, 0xF, 0xFD, 0x19, 5, 0x14, 0, 0xB,
{ 0x2E, 0x00, 0x00, 0x88, 0x00, 0x00, 0x72, 0x60, 0x51, 0xA7,
0x79, 0x6B, 0x90, 0xBD, 0x79 },
{ 0x217, 0x217, 0x217, 0x242, 0x242, 0x242, 0x269, 0x269, 0x269, 0x2A1,
0x2A1, 0x2A1, 0x2C9, 0x2C9, 0x2C9 }
};
-static const struct ci_pt_defaults defaults_hawaii_pro =
-{
+static const struct ci_pt_defaults defaults_hawaii_pro = {
1, 0xF, 0xFD, 0x19, 5, 0x14, 0, 0x65062,
{ 0x2E, 0x00, 0x00, 0x88, 0x00, 0x00, 0x72, 0x60, 0x51, 0xA7,
0x79, 0x6B, 0x90, 0xBD, 0x79 },
{ 0x217, 0x217, 0x217, 0x242, 0x242, 0x242, 0x269, 0x269, 0x269, 0x2A1,
0x2A1, 0x2A1, 0x2C9, 0x2C9, 0x2C9 }
};
-static const struct ci_pt_defaults defaults_bonaire_xt =
-{
+static const struct ci_pt_defaults defaults_bonaire_xt = {
1, 0xF, 0xFD, 0x19, 5, 45, 0, 0xB,
{ 0x79, 0x253, 0x25D, 0xAE, 0x72, 0x80, 0x83, 0x86, 0x6F, 0xC8,
0xC9, 0xC9, 0x2F, 0x4D, 0x61 },
{ 0x17C, 0x172, 0x180, 0x1BC, 0x1B3, 0x1BD, 0x206, 0x200, 0x203, 0x25D,
0x25A, 0x255, 0x2C3, 0x2C5, 0x2B4 }
};
-static const struct ci_pt_defaults defaults_saturn_xt =
-{
+static const struct ci_pt_defaults defaults_saturn_xt = {
1, 0xF, 0xFD, 0x19, 5, 55, 0, 0x7,
{ 0x8C, 0x247, 0x249, 0xA6, 0x80, 0x81, 0x8B, 0x89, 0x86, 0xC9,
0xCA, 0xC9, 0x4D, 0x4D, 0x4D },
{ 0x187, 0x187, 0x187, 0x1C7, 0x1C7, 0x1C7, 0x210, 0x210, 0x210, 0x266,
0x266, 0x266, 0x2C9, 0x2C9, 0x2C9 }
};
-static const struct ci_pt_config_reg didt_config_ci[] =
-{
+static const struct ci_pt_config_reg didt_config_ci[] = {
{ 0x10, 0x00ff, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
{ 0x10, 0xff00, 8, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
{ 0x10, 0x00ff, 16, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
@@ -1216,7 +1211,7 @@ static void ci_thermal_initialize(struct radeon_device
*rdev)
if (rdev->pm.fan_pulses_per_revolution) {
tmp = RREG32_SMC(CG_TACH_CTRL) & ~EDGE_PER_REV_MASK;
- tmp |= EDGE_PER_REV(rdev->pm.fan_pulses_per_revolution -1);
+ tmp |= EDGE_PER_REV(rdev->pm.fan_pulses_per_revolution - 1);
WREG32_SMC(CG_TACH_CTRL, tmp);
}
@@ -,7 +3328,7 @@ static int ci_populate_all_memory_levels(struct
radeon_device *rdev)
}
static void ci_reset_single_dpm_table(struct radeon_device *rdev,
- struct ci_single_dpm_table* dpm_table,
+ struct ci_single_dpm_table *dpm_table,
u32 count)
{
u32 i;
@@ -3343,7 +3338,7 @@ static void ci_reset_single_dpm_table(struct
radeon_device *rdev,
dpm_table->dpm_levels[i].enabled = false;
}
-static void ci_setup_pcie_table_entry(struct ci_single_dpm_table* dpm_table,
+static void ci_setup_pcie_table_entry(struct ci_single_dpm_table *dpm_table,
u32 index, u32 pcie_gen, u32 pcie_lanes)
{
dpm_table->dpm_levels[index].value = pcie_gen;
@@ -3503,7 +3498,7 @@ static int ci_find_boot_level(struct ci_single_dpm_table
*table,
u32 i;
int ret = -EINVAL;
- for(i = 0; i < table->count; i++) {
+ for (i = 0; i < table->count; i++) {
if (value == table->dpm_levels[i].value) {
*boot_level = i;
ret = 0;
@@ -4304,7 +4299,7 @@ static int ci_set_mc_special_registers(struct
radeon_device *rdev,
for (i = 0, j = table->last; i < table->last; i++) {
if (j >= SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE)
return -EINVAL;
- switch(table->mc_reg_address[i].s1 << 2) {
+ switch (table->mc_reg_address[i].s1 << 2) {
case MC_SEQ_MISC1:
temp_reg = RREG32(MC_PMG_CMD_EMRS);
table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2;
@@ -4369,7 +4364,7 @@ static bool ci_check_s0_mc_reg_index(u16 in_reg, u16
*out_reg)
{
bool result = true;
- switch(in_reg) {
+ switch (in_reg) {
case MC_SEQ
[PATCH] drm/amdgpu: Clean up errors in atom-bits.h
Fix the following errors reported by checkpatch:
ERROR: space prohibited before that ',' (ctx:WxV)
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/atom-bits.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/include/atom-bits.h
b/drivers/gpu/drm/amd/include/atom-bits.h
index e8fae5c77514..2bfd6d0ff050 100644
--- a/drivers/gpu/drm/amd/include/atom-bits.h
+++ b/drivers/gpu/drm/amd/include/atom-bits.h
@@ -33,7 +33,7 @@ static inline uint8_t get_u8(void *bios, int ptr)
#define CU8(ptr) get_u8(ctx->bios, (ptr))
static inline uint16_t get_u16(void *bios, int ptr)
{
-return get_u8(bios ,ptr)|(((uint16_t)get_u8(bios, ptr+1))<<8);
+return get_u8(bios, ptr)|(((uint16_t)get_u8(bios, ptr+1))<<8);
}
#define U16(ptr) get_u16(ctx->ctx->bios, (ptr))
#define CU16(ptr) get_u16(ctx->bios, (ptr))
--
2.17.1
[PATCH] drm/radeon: Clean up errors in radeon_atpx_handler.c
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following function definitions go on the next line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/radeon_atpx_handler.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c
b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
index 595354e3ce0b..f557535c1d7b 100644
--- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c
+++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
@@ -61,19 +61,23 @@ struct atpx_mux {
u16 mux;
} __packed;
-bool radeon_has_atpx(void) {
+bool radeon_has_atpx(void)
+{
return radeon_atpx_priv.atpx_detected;
}
-bool radeon_has_atpx_dgpu_power_cntl(void) {
+bool radeon_has_atpx_dgpu_power_cntl(void)
+{
return radeon_atpx_priv.atpx.functions.power_cntl;
}
-bool radeon_is_atpx_hybrid(void) {
+bool radeon_is_atpx_hybrid(void)
+{
return radeon_atpx_priv.atpx.is_hybrid;
}
-bool radeon_atpx_dgpu_req_power_for_displays(void) {
+bool radeon_atpx_dgpu_req_power_for_displays(void)
+{
return radeon_atpx_priv.atpx.dgpu_req_power_for_displays;
}
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in navi10_ih.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
index e64b33115848..57d04ed20357 100644
--- a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
@@ -722,8 +722,7 @@ static void navi10_ih_set_interrupt_funcs(struct
amdgpu_device *adev)
adev->irq.ih_funcs = &navi10_ih_funcs;
}
-const struct amdgpu_ip_block_version navi10_ih_ip_block =
-{
+const struct amdgpu_ip_block_version navi10_ih_ip_block = {
.type = AMD_IP_BLOCK_TYPE_IH,
.major = 5,
.minor = 0,
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in amdgpu_atomfirmware.h
Fix the following errors reported by checkpatch: ERROR: "foo* bar" should be "foo *bar" Signed-off-by: chenxuebing --- drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h index c7eb2caec65a..649b5530d8ae 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h @@ -36,7 +36,7 @@ int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev); int amdgpu_atomfirmware_get_gfx_info(struct amdgpu_device *adev); bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev); bool amdgpu_atomfirmware_sram_ecc_supported(struct amdgpu_device *adev); -bool amdgpu_atomfirmware_ras_rom_addr(struct amdgpu_device *adev, uint8_t* i2c_address); +bool amdgpu_atomfirmware_ras_rom_addr(struct amdgpu_device *adev, uint8_t *i2c_address); bool amdgpu_atomfirmware_mem_training_supported(struct amdgpu_device *adev); bool amdgpu_atomfirmware_dynamic_boot_config_supported(struct amdgpu_device *adev); int amdgpu_atomfirmware_get_fw_reserved_fb_size(struct amdgpu_device *adev); -- 2.17.1
[PATCH] drm/gma500: Clean up errors in opregion.h
Fix the following errors reported by checkpatch:
ERROR: space prohibited before that close parenthesis ')'
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/gma500/opregion.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/gma500/opregion.c
b/drivers/gpu/drm/gma500/opregion.c
index 0c271072af63..ff6632826376 100644
--- a/drivers/gpu/drm/gma500/opregion.c
+++ b/drivers/gpu/drm/gma500/opregion.c
@@ -211,7 +211,7 @@ void psb_intel_opregion_enable_asle(struct drm_device *dev)
struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
struct opregion_asle *asle = dev_priv->opregion.asle;
- if (asle && system_opregion ) {
+ if (asle && system_opregion) {
/* Don't do this on Medfield or other non PC like devices, they
use the bit for something different altogether */
gma_enable_pipestat(dev_priv, 0, PIPE_LEGACY_BLC_EVENT_ENABLE);
--
2.17.1
[PATCH] gma500: Clean up errors in psb_intel_sdvo_regs.h
Fix the following errors reported by checkpatch:
ERROR: space required after that close brace '}'
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/gma500/psb_intel_sdvo_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/gma500/psb_intel_sdvo_regs.h
b/drivers/gpu/drm/gma500/psb_intel_sdvo_regs.h
index 600e79744d68..e358a6b1bcce 100644
--- a/drivers/gpu/drm/gma500/psb_intel_sdvo_regs.h
+++ b/drivers/gpu/drm/gma500/psb_intel_sdvo_regs.h
@@ -666,7 +666,7 @@ struct psb_intel_sdvo_enhancement_limits_reply {
#define SDVO_CMD_SET_TV_LUMA_FILTER0x79
struct psb_intel_sdvo_enhancements_arg {
u16 value;
-}__attribute__((packed));
+} __attribute__((packed));
#define SDVO_CMD_GET_DOT_CRAWL 0x70
#define SDVO_CMD_SET_DOT_CRAWL 0x71
--
2.17.1
[PATCH] drm/amd/include/navi14_ip_offset: Clean up errors in navi14_ip_offset.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/navi14_ip_offset.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/navi14_ip_offset.h
b/drivers/gpu/drm/amd/include/navi14_ip_offset.h
index c39ef651adc6..508011288dea 100644
--- a/drivers/gpu/drm/amd/include/navi14_ip_offset.h
+++ b/drivers/gpu/drm/amd/include/navi14_ip_offset.h
@@ -25,13 +25,11 @@
#define MAX_SEGMENT5
-struct IP_BASE_INSTANCE
-{
+struct IP_BASE_INSTANCE {
unsigned int segment[MAX_SEGMENT];
};
-struct IP_BASE
-{
+struct IP_BASE {
struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
} __maybe_unused;
--
2.17.1
[PATCH] drm/radeon: Clean up errors in si_dpm.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
ERROR: open brace '{' following enum go on the same line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/si_dpm.h | 21 +++--
1 file changed, 7 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/radeon/si_dpm.h b/drivers/gpu/drm/radeon/si_dpm.h
index aa857906ef93..4887edebd348 100644
--- a/drivers/gpu/drm/radeon/si_dpm.h
+++ b/drivers/gpu/drm/radeon/si_dpm.h
@@ -26,15 +26,13 @@
#include "ni_dpm.h"
#include "sislands_smc.h"
-enum si_cac_config_reg_type
-{
+enum si_cac_config_reg_type {
SISLANDS_CACCONFIG_MMR = 0,
SISLANDS_CACCONFIG_CGIND,
SISLANDS_CACCONFIG_MAX
};
-struct si_cac_config_reg
-{
+struct si_cac_config_reg {
u32 offset;
u32 mask;
u32 shift;
@@ -42,8 +40,7 @@ struct si_cac_config_reg
enum si_cac_config_reg_type type;
};
-struct si_powertune_data
-{
+struct si_powertune_data {
u32 cac_window;
u32 l2_lta_window_size_default;
u8 lts_truncate_default;
@@ -56,8 +53,7 @@ struct si_powertune_data
bool enable_powertune_by_default;
};
-struct si_dyn_powertune_data
-{
+struct si_dyn_powertune_data {
u32 cac_leakage;
s32 leakage_minimum_temperature;
u32 wintime;
@@ -68,8 +64,7 @@ struct si_dyn_powertune_data
bool disable_uvd_powertune;
};
-struct si_dte_data
-{
+struct si_dte_data {
u32 tau[SMC_SISLANDS_DTE_MAX_FILTER_STAGES];
u32 r[SMC_SISLANDS_DTE_MAX_FILTER_STAGES];
u32 k;
@@ -122,8 +117,7 @@ struct si_mc_reg_table {
#define SISLANDS_MCREGISTERTABLE_ULV_SLOT 2
#define SISLANDS_MCREGISTERTABLE_FIRST_DRIVERSTATE_SLOT 3
-struct si_leakage_voltage_entry
-{
+struct si_leakage_voltage_entry {
u16 voltage;
u16 leakage_index;
};
@@ -131,8 +125,7 @@ struct si_leakage_voltage_entry
#define SISLANDS_LEAKAGE_INDEX0 0xff01
#define SISLANDS_MAX_LEAKAGE_COUNT 4
-struct si_leakage_voltage
-{
+struct si_leakage_voltage {
u16 count;
struct si_leakage_voltage_entry entries[SISLANDS_MAX_LEAKAGE_COUNT];
};
--
2.17.1
[PATCH] drm/radeon: Clean up errors in smu7_discrete.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/smu7_discrete.h | 51 +-
1 file changed, 17 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/radeon/smu7_discrete.h
b/drivers/gpu/drm/radeon/smu7_discrete.h
index 0b0b404ff091..1f63cbbd6515 100644
--- a/drivers/gpu/drm/radeon/smu7_discrete.h
+++ b/drivers/gpu/drm/radeon/smu7_discrete.h
@@ -35,8 +35,7 @@
#define SMU7_NUM_GPU_TES 1
#define SMU7_NUM_NON_TES 2
-struct SMU7_SoftRegisters
-{
+struct SMU7_SoftRegisters {
uint32_tRefClockFrequency;
uint32_tPmTimerP;
uint32_tFeatureEnables;
@@ -89,8 +88,7 @@ struct SMU7_SoftRegisters
typedef struct SMU7_SoftRegisters SMU7_SoftRegisters;
-struct SMU7_Discrete_VoltageLevel
-{
+struct SMU7_Discrete_VoltageLevel {
uint16_tVoltage;
uint16_tStdVoltageHiSidd;
uint16_tStdVoltageLoSidd;
@@ -100,8 +98,7 @@ struct SMU7_Discrete_VoltageLevel
typedef struct SMU7_Discrete_VoltageLevel SMU7_Discrete_VoltageLevel;
-struct SMU7_Discrete_GraphicsLevel
-{
+struct SMU7_Discrete_GraphicsLevel {
uint32_tFlags;
uint32_tMinVddc;
uint32_tMinVddcPhases;
@@ -131,8 +128,7 @@ struct SMU7_Discrete_GraphicsLevel
typedef struct SMU7_Discrete_GraphicsLevel SMU7_Discrete_GraphicsLevel;
-struct SMU7_Discrete_ACPILevel
-{
+struct SMU7_Discrete_ACPILevel {
uint32_tFlags;
uint32_tMinVddc;
uint32_tMinVddcPhases;
@@ -153,8 +149,7 @@ struct SMU7_Discrete_ACPILevel
typedef struct SMU7_Discrete_ACPILevel SMU7_Discrete_ACPILevel;
-struct SMU7_Discrete_Ulv
-{
+struct SMU7_Discrete_Ulv {
uint32_tCcPwrDynRm;
uint32_tCcPwrDynRm1;
uint16_tVddcOffset;
@@ -165,8 +160,7 @@ struct SMU7_Discrete_Ulv
typedef struct SMU7_Discrete_Ulv SMU7_Discrete_Ulv;
-struct SMU7_Discrete_MemoryLevel
-{
+struct SMU7_Discrete_MemoryLevel {
uint32_tMinVddc;
uint32_tMinVddcPhases;
uint32_tMinVddci;
@@ -206,8 +200,7 @@ struct SMU7_Discrete_MemoryLevel
typedef struct SMU7_Discrete_MemoryLevel SMU7_Discrete_MemoryLevel;
-struct SMU7_Discrete_LinkLevel
-{
+struct SMU7_Discrete_LinkLevel {
uint8_t PcieGenSpeed;
uint8_t PcieLaneCount;
uint8_t EnabledForActivity;
@@ -220,8 +213,7 @@ struct SMU7_Discrete_LinkLevel
typedef struct SMU7_Discrete_LinkLevel SMU7_Discrete_LinkLevel;
-struct SMU7_Discrete_MCArbDramTimingTableEntry
-{
+struct SMU7_Discrete_MCArbDramTimingTableEntry {
uint32_t McArbDramTiming;
uint32_t McArbDramTiming2;
uint8_t McArbBurstTime;
@@ -230,15 +222,13 @@ struct SMU7_Discrete_MCArbDramTimingTableEntry
typedef struct SMU7_Discrete_MCArbDramTimingTableEntry
SMU7_Discrete_MCArbDramTimingTableEntry;
-struct SMU7_Discrete_MCArbDramTimingTable
-{
+struct SMU7_Discrete_MCArbDramTimingTable {
SMU7_Discrete_MCArbDramTimingTableEntry
entries[SMU__NUM_SCLK_DPM_STATE][SMU__NUM_MCLK_DPM_LEVELS];
};
typedef struct SMU7_Discrete_MCArbDramTimingTable
SMU7_Discrete_MCArbDramTimingTable;
-struct SMU7_Discrete_UvdLevel
-{
+struct SMU7_Discrete_UvdLevel {
uint32_t VclkFrequency;
uint32_t DclkFrequency;
uint16_t MinVddc;
@@ -250,8 +240,7 @@ struct SMU7_Discrete_UvdLevel
typedef struct SMU7_Discrete_UvdLevel SMU7_Discrete_UvdLevel;
-struct SMU7_Discrete_ExtClkLevel
-{
+struct SMU7_Discrete_ExtClkLevel {
uint32_t Frequency;
uint16_t MinVoltage;
uint8_t MinPhases;
@@ -260,8 +249,7 @@ struct SMU7_Discrete_ExtClkLevel
typedef struct SMU7_Discrete_ExtClkLevel SMU7_Discrete_ExtClkLevel;
-struct SMU7_Discrete_StateInfo
-{
+struct SMU7_Discrete_StateInfo {
uint32_t SclkFrequency;
uint32_t MclkFrequency;
uint32_t VclkFrequency;
@@ -285,8 +273,7 @@ struct SMU7_Discrete_StateInfo
typedef struct SMU7_Discrete_StateInfo SMU7_Discrete_StateInfo;
-struct SMU7_Discrete_DpmTable
-{
+struct SMU7_Discrete_DpmTable {
SMU7_PIDController GraphicsPIDController;
SMU7_PIDController MemoryPIDController;
SMU7_PIDController LinkPIDController;
@@ -406,23 +393,20 @@ typedef struct SMU7_Discrete_DpmTable
SMU7_Discrete_DpmTable;
#define SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE 16
#define SMU7_DISCRETE_MC_REGISTER_ARRAY_SET_COUNT SMU7_MAX_LEVELS_MEMORY
-struct SMU7_Discrete_MCRegisterAddress
-{
+struct SMU7_Discrete_MCRegisterAddress {
uint16_t s0;
uint16_t s1;
};
typedef struct SMU7_Discrete_MCRegisterAddress SMU7_Discrete_MCRegisterAddress;
-struct SMU7_Discrete_MCRegisterSet
-{
+struct SMU7_Discrete_MCRegisterSet {
uint32_t value[SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE];
};
typedef struct SMU7_Discrete_MCRegisterSet SMU7_Discrete_MCRegisterSet;
-struct SMU7_Discrete_MCRegisters
-{
+struct SMU7_Discrete_MCRegisters {
uint8_t last
[PATCH] drm/radeon/trinity_dpm: Clean up errors in trinity_dpm.c
Fix the following errors reported by checkpatch:
ERROR: space required before the open parenthesis '('
ERROR: space prohibited before that close parenthesis ')'
ERROR: that open brace { should be on the previous line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/trinity_dpm.c | 22 +-
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/radeon/trinity_dpm.c
b/drivers/gpu/drm/radeon/trinity_dpm.c
index ef1cc7bad20a..b9a2c7ccc881 100644
--- a/drivers/gpu/drm/radeon/trinity_dpm.c
+++ b/drivers/gpu/drm/radeon/trinity_dpm.c
@@ -39,8 +39,7 @@
#ifndef TRINITY_MGCG_SEQUENCE
#define TRINITY_MGCG_SEQUENCE 100
-static const u32 trinity_mgcg_shls_default[] =
-{
+static const u32 trinity_mgcg_shls_default[] = {
/* Register, Value, Mask */
0x802c, 0xc000, 0x,
0x3fc4, 0xc000, 0x,
@@ -122,8 +121,7 @@ static const u32 trinity_mgcg_shls_default[] =
#ifndef TRINITY_SYSLS_SEQUENCE
#define TRINITY_SYSLS_SEQUENCE 100
-static const u32 trinity_sysls_disable[] =
-{
+static const u32 trinity_sysls_disable[] = {
/* Register, Value, Mask */
0xd0c0, 0x, 0x,
0xd8c0, 0x, 0x,
@@ -146,8 +144,7 @@ static const u32 trinity_sysls_disable[] =
0x6dfc, 0x007f, 0x
};
-static const u32 trinity_sysls_enable[] =
-{
+static const u32 trinity_sysls_enable[] = {
/* Register, Value, Mask */
0x55e8, 0x0001, 0x,
0xd0bc, 0x0100, 0x,
@@ -169,8 +166,7 @@ static const u32 trinity_sysls_enable[] =
};
#endif
-static const u32 trinity_override_mgpg_sequences[] =
-{
+static const u32 trinity_override_mgpg_sequences[] = {
/* Register, Value */
0x0200, 0xE030032C,
0x0204, 0x0FFF,
@@ -366,9 +362,9 @@ static void trinity_mg_clockgating_enable(struct
radeon_device *rdev,
local1 = RREG32_CG(CG_CGTT_LOCAL_1);
WREG32_CG(CG_CGTT_LOCAL_0,
- (0x0038 & CGCG_CGTT_LOCAL0_MASK) | (local0 &
~CGCG_CGTT_LOCAL0_MASK) );
+ (0x0038 & CGCG_CGTT_LOCAL0_MASK) | (local0 &
~CGCG_CGTT_LOCAL0_MASK));
WREG32_CG(CG_CGTT_LOCAL_1,
- (0x0E00 & CGCG_CGTT_LOCAL1_MASK) | (local1 &
~CGCG_CGTT_LOCAL1_MASK) );
+ (0x0E00 & CGCG_CGTT_LOCAL1_MASK) | (local1 &
~CGCG_CGTT_LOCAL1_MASK));
WREG32(CGTS_SM_CTRL_REG, CGTS_SM_CTRL_REG_ENABLE);
} else {
@@ -378,9 +374,9 @@ static void trinity_mg_clockgating_enable(struct
radeon_device *rdev,
local1 = RREG32_CG(CG_CGTT_LOCAL_1);
WREG32_CG(CG_CGTT_LOCAL_0,
- CGCG_CGTT_LOCAL0_MASK | (local0 &
~CGCG_CGTT_LOCAL0_MASK) );
+ CGCG_CGTT_LOCAL0_MASK | (local0 &
~CGCG_CGTT_LOCAL0_MASK));
WREG32_CG(CG_CGTT_LOCAL_1,
- CGCG_CGTT_LOCAL1_MASK | (local1 &
~CGCG_CGTT_LOCAL1_MASK) );
+ CGCG_CGTT_LOCAL1_MASK | (local1 &
~CGCG_CGTT_LOCAL1_MASK));
}
}
@@ -1434,7 +1430,7 @@ static void trinity_adjust_uvd_state(struct radeon_device
*rdev,
if (pi->uvd_dpm && r600_is_uvd_state(rps->class, rps->class2)) {
high_index = trinity_get_uvd_clock_index(rdev, rps);
- switch(high_index) {
+ switch (high_index) {
case 3:
case 2:
low_index = 1;
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in amdgpu_ib.c
Fix the following errors reported by checkpatch:
ERROR: do not use assignment in if condition
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 6aa3b1d845ab..440e7aa45c66 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -191,9 +191,9 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned
int num_ibs,
}
need_ctx_switch = ring->current_ctx != fence_ctx;
+ tmp = amdgpu_sync_get_fence(&job->explicit_sync);
if (ring->funcs->emit_pipeline_sync && job &&
- ((tmp = amdgpu_sync_get_fence(&job->explicit_sync)) ||
-(amdgpu_sriov_vf(adev) && need_ctx_switch) ||
+ (tmp || (amdgpu_sriov_vf(adev) && need_ctx_switch) ||
amdgpu_vm_need_pipeline_sync(ring, job))) {
need_pipe_sync = true;
--
2.17.1
[PATCH] drm/radeon: Clean up errors in radeon_audio.c
Fix the following errors reported by checkpatch:
ERROR: "foo* bar" should be "foo *bar"
ERROR: that open brace { should be on the previous line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/radeon_audio.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_audio.c
b/drivers/gpu/drm/radeon/radeon_audio.c
index 91b58fbc2be7..74753bb26d33 100644
--- a/drivers/gpu/drm/radeon/radeon_audio.c
+++ b/drivers/gpu/drm/radeon/radeon_audio.c
@@ -37,15 +37,14 @@
void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
u8 enable_mask);
-struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev);
-struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev);
+struct r600_audio_pin *r600_audio_get_pin(struct radeon_device *rdev);
+struct r600_audio_pin *dce6_audio_get_pin(struct radeon_device *rdev);
static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
struct drm_display_mode *mode);
static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
struct drm_display_mode *mode);
-static const u32 pin_offsets[7] =
-{
+static const u32 pin_offsets[7] = {
(0x5e00 - 0x5e00),
(0x5e18 - 0x5e00),
(0x5e30 - 0x5e00),
@@ -361,7 +360,7 @@ static void radeon_audio_write_latency_fields(struct
drm_encoder *encoder,
radeon_encoder->audio->write_latency_fields(encoder, connector,
mode);
}
-struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder)
+struct r600_audio_pin *radeon_audio_get_pin(struct drm_encoder *encoder)
{
struct radeon_device *rdev = encoder->dev->dev_private;
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
@@ -528,7 +527,7 @@ static void radeon_audio_calc_cts(unsigned int clock, int
*CTS, int *N, int freq
*N, *CTS, freq);
}
-static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock)
+static const struct radeon_hdmi_acr *radeon_audio_acr(unsigned int clock)
{
static struct radeon_hdmi_acr res;
u8 i;
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in gfx_v9_4.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c
index bc8416afb62c..f53b379d8971 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c
@@ -970,8 +970,9 @@ static void gfx_v9_4_reset_ras_error_count(struct
amdgpu_device *adev)
WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_INDEX, 255);
}
-static const struct soc15_reg_entry gfx_v9_4_ea_err_status_regs =
- { SOC15_REG_ENTRY(GC, 0, mmGCEA_ERR_STATUS), 0, 1, 32 };
+static const struct soc15_reg_entry gfx_v9_4_ea_err_status_regs = {
+ SOC15_REG_ENTRY(GC, 0, mmGCEA_ERR_STATUS), 0, 1, 32
+};
static void gfx_v9_4_query_ras_error_status(struct amdgpu_device *adev)
{
--
2.17.1
[PATCH] drm: Clean up errors in drm_dp_helper.h
Fix the following errors reported by checkpatch: ERROR: space prohibited before open square bracket '[' Signed-off-by: chenxuebing --- drivers/gpu/drm/display/drm_dp_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c index b1ca3a1100da..2704bf703040 100644 --- a/drivers/gpu/drm/display/drm_dp_helper.c +++ b/drivers/gpu/drm/display/drm_dp_helper.c @@ -2133,7 +2133,7 @@ void drm_dp_aux_unregister(struct drm_dp_aux *aux) } EXPORT_SYMBOL(drm_dp_aux_unregister); -#define PSR_SETUP_TIME(x) [DP_PSR_SETUP_TIME_ ## x >> DP_PSR_SETUP_TIME_SHIFT] = (x) +#define PSR_SETUP_TIME(x)[DP_PSR_SETUP_TIME_ ## x >> DP_PSR_SETUP_TIME_SHIFT] = (x) /** * drm_dp_psr_setup_time() - PSR setup in time usec -- 2.17.1
[PATCH] drm/amd/include/vega10_ip_offset:Clean up errors in vega10_ip_offset.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following enum go on the same line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/vega10_ip_offset.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/vega10_ip_offset.h
b/drivers/gpu/drm/amd/include/vega10_ip_offset.h
index 3a22a5d16919..1e1ca69f21f7 100644
--- a/drivers/gpu/drm/amd/include/vega10_ip_offset.h
+++ b/drivers/gpu/drm/amd/include/vega10_ip_offset.h
@@ -24,13 +24,11 @@
#define MAX_INSTANCE 5
#define MAX_SEGMENT5
-struct IP_BASE_INSTANCE
-{
+struct IP_BASE_INSTANCE {
unsigned int segment[MAX_SEGMENT];
};
-struct IP_BASE
-{
+struct IP_BASE {
struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
};
--
2.17.1
[PATCH] drm/radeon: Clean up errors in ni.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: trailing statements should be on next line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/ni.c | 21 -
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 927e5f42e97d..6f231a740ba5 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -66,8 +66,7 @@ void tn_smc_wreg(struct radeon_device *rdev, u32 reg, u32 v)
spin_unlock_irqrestore(&rdev->smc_idx_lock, flags);
}
-static const u32 tn_rlc_save_restore_register_list[] =
-{
+static const u32 tn_rlc_save_restore_register_list[] = {
0x98fc,
0x98f0,
0x9834,
@@ -216,8 +215,7 @@ MODULE_FIRMWARE("radeon/ARUBA_me.bin");
MODULE_FIRMWARE("radeon/ARUBA_rlc.bin");
-static const u32 cayman_golden_registers2[] =
-{
+static const u32 cayman_golden_registers2[] = {
0x3e5c, 0x, 0x,
0x3e48, 0x, 0x,
0x3e4c, 0x, 0x,
@@ -226,8 +224,7 @@ static const u32 cayman_golden_registers2[] =
0x3e60, 0x, 0x
};
-static const u32 cayman_golden_registers[] =
-{
+static const u32 cayman_golden_registers[] = {
0x5eb4, 0x, 0x0002,
0x5e78, 0x8f311ff1, 0x001000f0,
0x3f90, 0x, 0xff00,
@@ -267,16 +264,14 @@ static const u32 cayman_golden_registers[] =
0x8974, 0x, 0x
};
-static const u32 dvst_golden_registers2[] =
-{
+static const u32 dvst_golden_registers2[] = {
0x8f8, 0x, 0,
0x8fc, 0x0038, 0,
0x8f8, 0x, 1,
0x8fc, 0x0e00, 0
};
-static const u32 dvst_golden_registers[] =
-{
+static const u32 dvst_golden_registers[] = {
0x690, 0x3fff3fff, 0x20c00033,
0x918c, 0x0fff0fff, 0x00010006,
0x91a8, 0x0fff0fff, 0x00010006,
@@ -333,8 +328,7 @@ static const u32 dvst_golden_registers[] =
0x8974, 0x, 0x
};
-static const u32 scrapper_golden_registers[] =
-{
+static const u32 scrapper_golden_registers[] = {
0x690, 0x3fff3fff, 0x20c00033,
0x918c, 0x0fff0fff, 0x00010006,
0x918c, 0x0fff0fff, 0x00010006,
@@ -754,7 +748,8 @@ int ni_init_microcode(struct radeon_device *rdev)
rlc_req_size = ARUBA_RLC_UCODE_SIZE * 4;
mc_req_size = 0;
break;
- default: BUG();
+ default:
+ BUG();
}
DRM_INFO("Loading %s Microcode\n", chip_name);
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in discovery.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
ERROR: "foo* bar" should be "foo *bar"
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/discovery.h | 32 +
1 file changed, 11 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/discovery.h
b/drivers/gpu/drm/amd/include/discovery.h
index 7a9d473d0917..4a8b9eabcf03 100644
--- a/drivers/gpu/drm/amd/include/discovery.h
+++ b/drivers/gpu/drm/amd/include/discovery.h
@@ -32,8 +32,7 @@
#define VCN_INFO_TABLE_ID 0x004E4356
#define MALL_INFO_TABLE_ID 0x4C4C414D
-typedef enum
-{
+typedef enum {
IP_DISCOVERY = 0,
GC,
HARVEST_INFO,
@@ -45,16 +44,14 @@ typedef enum
#pragma pack(1)
-typedef struct table_info
-{
+typedef struct table_info {
uint16_t offset; /* Byte offset */
uint16_t checksum; /* Byte sum of the table */
uint16_t size; /* Table size */
uint16_t padding;
} table_info;
-typedef struct binary_header
-{
+typedef struct binary_header {
/* psp structure should go at the top of this structure */
uint32_t binary_signature; /* 0x7, 0x14, 0x21, 0x28 */
uint16_t version_major;
@@ -64,15 +61,13 @@ typedef struct binary_header
table_info table_list[TOTAL_TABLES];
} binary_header;
-typedef struct die_info
-{
+typedef struct die_info {
uint16_t die_id;
uint16_t die_offset; /* Points to the corresponding die_header
structure */
} die_info;
-typedef struct ip_discovery_header
-{
+typedef struct ip_discovery_header {
uint32_t signature;/* Table Signature */
uint16_t version; /* Table Version */
uint16_t size; /* Table Size */
@@ -89,8 +84,7 @@ typedef struct ip_discovery_header
};
} ip_discovery_header;
-typedef struct ip
-{
+typedef struct ip {
uint16_t hw_id; /* Hardware ID */
uint8_t number_instance; /* instance of the IP */
uint8_t num_base_address; /* Number of Base Addresses */
@@ -107,8 +101,7 @@ typedef struct ip
uint32_t base_address[]; /* variable number of Addresses */
} ip;
-typedef struct ip_v3
-{
+typedef struct ip_v3 {
uint16_t hw_id; /* Hardware ID */
uint8_t instance_number;/* Instance number for the IP */
uint8_t num_base_address; /* Number of base addresses*/
@@ -145,15 +138,13 @@ typedef struct ip_v4 {
} __packed;
} ip_v4;
-typedef struct die_header
-{
+typedef struct die_header {
uint16_t die_id;
uint16_t num_ips;
} die_header;
-typedef struct ip_structure
-{
- ip_discovery_header* header;
+typedef struct ip_structure {
+ ip_discovery_header *header;
struct die
{
die_header *die_header;
@@ -357,8 +348,7 @@ struct vcn_info_header {
uint32_t size_bytes; /* size of the entire header+data in bytes */
};
-struct vcn_instance_info_v1_0
-{
+struct vcn_instance_info_v1_0 {
uint32_t instance_num; /* VCN IP instance number. 0 - VCN0; 1 - VCN1
etc*/
union _fuse_data {
struct {
--
2.17.1
[PATCH] drm/radeon/r100: Clean up errors in r100.c
Fix the following errors reported by checkpatch:
ERROR: spaces required around that '+=' (ctx:VxV)o
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/r100.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index cfeca2694d5f..86b8b770af19 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -1327,7 +1327,7 @@ int r100_packet3_load_vbpntr(struct radeon_cs_parser *p,
return -EINVAL;
}
track->num_arrays = c;
- for (i = 0; i < (c - 1); i+=2, idx+=3) {
+ for (i = 0; i < (c - 1); i += 2, idx += 3) {
r = radeon_cs_packet_next_reloc(p, &reloc, 0);
if (r) {
DRM_ERROR("No reloc for packet3 %d\n",
--
2.17.1
[PATCH] drm/radeon/rv770: Clean up errors in rv770_dpm.c
Fix the following errors reported by checkpatch:
ERROR: space prohibited before that close parenthesis ')'
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/rv770_dpm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/rv770_dpm.c
b/drivers/gpu/drm/radeon/rv770_dpm.c
index ef2f1a048cfe..e3e1f6833f12 100644
--- a/drivers/gpu/drm/radeon/rv770_dpm.c
+++ b/drivers/gpu/drm/radeon/rv770_dpm.c
@@ -1010,7 +1010,7 @@ int rv770_populate_initial_mvdd_value(struct
radeon_device *rdev,
struct rv7xx_power_info *pi = rv770_get_pi(rdev);
if ((pi->s0_vid_lower_smio_cntl & pi->mvdd_mask_low) ==
-(pi->mvdd_low_smio[MVDD_LOW_INDEX] & pi->mvdd_mask_low) ) {
+(pi->mvdd_low_smio[MVDD_LOW_INDEX] & pi->mvdd_mask_low)) {
voltage->index = MVDD_LOW_INDEX;
voltage->value = cpu_to_be16(MVDD_LOW_VALUE);
} else {
@@ -1260,7 +1260,7 @@ static int rv770_construct_vddc_table(struct
radeon_device *rdev)
pi->vddc_mask_low = gpio_mask;
if (i > 0) {
if ((pi->vddc_table[i].low_smio !=
-pi->vddc_table[i - 1].low_smio ) ||
+pi->vddc_table[i - 1].low_smio) ||
(pi->vddc_table[i].high_smio !=
pi->vddc_table[i - 1].high_smio))
vddc_index++;
--
2.17.1
[PATCH] drm/sti: Clean up errors in sti_hda.c
Fix the following errors reported by checkpatch:
ERROR: space prohibited before that ',' (ctx:WxW)
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/sti/sti_hda.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sti/sti_hda.c b/drivers/gpu/drm/sti/sti_hda.c
index 6ee35612a14e..1079ac0732c5 100644
--- a/drivers/gpu/drm/sti/sti_hda.c
+++ b/drivers/gpu/drm/sti/sti_hda.c
@@ -486,7 +486,7 @@ static void sti_hda_pre_enable(struct drm_bridge *bridge)
hda_write(hda, SCALE_CTRL_CR_DFLT, HDA_ANA_SCALE_CTRL_CR);
/* Configure sampler */
- hda_write(hda , src_filter_y, HDA_ANA_SRC_Y_CFG);
+ hda_write(hda, src_filter_y, HDA_ANA_SRC_Y_CFG);
hda_write(hda, src_filter_c, HDA_ANA_SRC_C_CFG);
for (i = 0; i < SAMPLER_COEF_NB; i++) {
hda_write(hda, coef_y[i], HDA_COEFF_Y_PH1_TAP123 + i * 4);
--
2.17.1
[PATCH] drm/sti: Clean up errors in sti_mixer.c
Fix the following errors reported by checkpatch: ERROR: do not initialise statics to 0x00 Signed-off-by: GuoHua Chen --- drivers/gpu/drm/sti/sti_mixer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/sti/sti_mixer.c b/drivers/gpu/drm/sti/sti_mixer.c index 7e5f14646625..6628c7f78868 100644 --- a/drivers/gpu/drm/sti/sti_mixer.c +++ b/drivers/gpu/drm/sti/sti_mixer.c @@ -16,7 +16,7 @@ #include "sti_vtg.h" /* Module parameter to set the background color of the mixer */ -static unsigned int bkg_color = 0x00; +static unsigned int bkg_color; MODULE_PARM_DESC(bkgcolor, "Value of the background color 0xRRGGBB"); module_param_named(bkgcolor, bkg_color, int, 0644); -- 2.17.1
[PATCH] drm/amdgpu: Clean up errors in v10_structs.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/v10_structs.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/v10_structs.h
b/drivers/gpu/drm/amd/include/v10_structs.h
index c0e98a98a641..58002a83d1df 100644
--- a/drivers/gpu/drm/amd/include/v10_structs.h
+++ b/drivers/gpu/drm/amd/include/v10_structs.h
@@ -24,8 +24,7 @@
#ifndef V10_STRUCTS_H_
#define V10_STRUCTS_H_
-struct v10_gfx_mqd
-{
+struct v10_gfx_mqd {
uint32_t reserved_0; // offset: 0 (0x0)
uint32_t reserved_1; // offset: 1 (0x1)
uint32_t reserved_2; // offset: 2 (0x2)
--
2.17.1
[PATCH] drm/amd/include: Clean up errors in arct_ip_offset.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/arct_ip_offset.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/arct_ip_offset.h
b/drivers/gpu/drm/amd/include/arct_ip_offset.h
index af1c46991429..7dd876f7df74 100644
--- a/drivers/gpu/drm/amd/include/arct_ip_offset.h
+++ b/drivers/gpu/drm/amd/include/arct_ip_offset.h
@@ -25,13 +25,11 @@
#define MAX_SEGMENT 6
-struct IP_BASE_INSTANCE
-{
+struct IP_BASE_INSTANCE {
unsigned int segment[MAX_SEGMENT];
} __maybe_unused;
-struct IP_BASE
-{
+struct IP_BASE {
struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
} __maybe_unused;
--
2.17.1
[PATCH] drm/radeon: Clean up errors in radeon_asic.c
Fix the following errors reported by checkpatch: ERROR: spaces required around that '||' (ctx:VxE) Signed-off-by: GuoHua Chen --- drivers/gpu/drm/radeon/radeon_asic.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 802b5af19261..b5a0109b2e2c 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c @@ -2400,10 +2400,10 @@ int radeon_asic_init(struct radeon_device *rdev) case CHIP_RS880: rdev->asic = &rs780_asic; /* 760G/780V/880V don't have UVD */ - if ((rdev->pdev->device == 0x9616)|| - (rdev->pdev->device == 0x9611)|| - (rdev->pdev->device == 0x9613)|| - (rdev->pdev->device == 0x9711)|| + if ((rdev->pdev->device == 0x9616) || + (rdev->pdev->device == 0x9611) || + (rdev->pdev->device == 0x9613) || + (rdev->pdev->device == 0x9711) || (rdev->pdev->device == 0x9713)) rdev->has_uvd = false; else -- 2.17.1
[PATCH] drm/radeon/btc_dpm: Clean up errors in btc_dpm.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: space required before the open parenthesis '('
ERROR: spaces required around that '+=' (ctx:VxV)
ERROR: spaces required around that '=' (ctx:VxW)
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/btc_dpm.c | 90 +++-
1 file changed, 31 insertions(+), 59 deletions(-)
diff --git a/drivers/gpu/drm/radeon/btc_dpm.c b/drivers/gpu/drm/radeon/btc_dpm.c
index 4e64ed38c439..70931b04bbac 100644
--- a/drivers/gpu/drm/radeon/btc_dpm.c
+++ b/drivers/gpu/drm/radeon/btc_dpm.c
@@ -53,8 +53,7 @@
extern int ni_mc_load_microcode(struct radeon_device *rdev);
//* BARTS **//
-static const u32 barts_cgcg_cgls_default[] =
-{
+static const u32 barts_cgcg_cgls_default[] = {
/* Register, Value, Mask bits */
0x08f8, 0x0010, 0x,
0x08fc, 0x, 0x,
@@ -107,8 +106,7 @@ static const u32 barts_cgcg_cgls_default[] =
};
#define BARTS_CGCG_CGLS_DEFAULT_LENGTH sizeof(barts_cgcg_cgls_default) / (3 *
sizeof(u32))
-static const u32 barts_cgcg_cgls_disable[] =
-{
+static const u32 barts_cgcg_cgls_disable[] = {
0x08f8, 0x0010, 0x,
0x08fc, 0x, 0x,
0x08f8, 0x0011, 0x,
@@ -162,8 +160,7 @@ static const u32 barts_cgcg_cgls_disable[] =
};
#define BARTS_CGCG_CGLS_DISABLE_LENGTH sizeof(barts_cgcg_cgls_disable) / (3 *
sizeof(u32))
-static const u32 barts_cgcg_cgls_enable[] =
-{
+static const u32 barts_cgcg_cgls_enable[] = {
/* 0xc124, 0x8418, 0x0018, */
0x0644, 0x000f7892, 0x001f4080,
0x08f8, 0x0010, 0x,
@@ -217,8 +214,7 @@ static const u32 barts_cgcg_cgls_enable[] =
};
#define BARTS_CGCG_CGLS_ENABLE_LENGTH sizeof(barts_cgcg_cgls_enable) / (3 *
sizeof(u32))
-static const u32 barts_mgcg_default[] =
-{
+static const u32 barts_mgcg_default[] = {
0x802c, 0xc000, 0x,
0x5448, 0x0100, 0x,
0x55e4, 0x00600100, 0x,
@@ -366,8 +362,7 @@ static const u32 barts_mgcg_default[] =
};
#define BARTS_MGCG_DEFAULT_LENGTH sizeof(barts_mgcg_default) / (3 *
sizeof(u32))
-static const u32 barts_mgcg_disable[] =
-{
+static const u32 barts_mgcg_disable[] = {
0x802c, 0xc000, 0x,
0x08f8, 0x, 0x,
0x08fc, 0x, 0x,
@@ -381,8 +376,7 @@ static const u32 barts_mgcg_disable[] =
};
#define BARTS_MGCG_DISABLE_LENGTH sizeof(barts_mgcg_disable) / (3 *
sizeof(u32))
-static const u32 barts_mgcg_enable[] =
-{
+static const u32 barts_mgcg_enable[] = {
0x802c, 0xc000, 0x,
0x08f8, 0x, 0x,
0x08fc, 0x, 0x,
@@ -397,8 +391,7 @@ static const u32 barts_mgcg_enable[] =
#define BARTS_MGCG_ENABLE_LENGTH sizeof(barts_mgcg_enable) / (3 * sizeof(u32))
//* CAICOS **//
-static const u32 caicos_cgcg_cgls_default[] =
-{
+static const u32 caicos_cgcg_cgls_default[] = {
0x08f8, 0x0010, 0x,
0x08fc, 0x, 0x,
0x08f8, 0x0011, 0x,
@@ -450,8 +443,7 @@ static const u32 caicos_cgcg_cgls_default[] =
};
#define CAICOS_CGCG_CGLS_DEFAULT_LENGTH sizeof(caicos_cgcg_cgls_default) / (3
* sizeof(u32))
-static const u32 caicos_cgcg_cgls_disable[] =
-{
+static const u32 caicos_cgcg_cgls_disable[] = {
0x08f8, 0x0010, 0x,
0x08fc, 0x, 0x,
0x08f8, 0x0011, 0x,
@@ -505,8 +497,7 @@ static const u32 caicos_cgcg_cgls_disable[] =
};
#define CAICOS_CGCG_CGLS_DISABLE_LENGTH sizeof(caicos_cgcg_cgls_disable) / (3
* sizeof(u32))
-static const u32 caicos_cgcg_cgls_enable[] =
-{
+static const u32 caicos_cgcg_cgls_enable[] = {
/* 0xc124, 0x8418, 0x0018, */
0x0644, 0x000f7892, 0x001f4080,
0x08f8, 0x0010, 0x,
@@ -560,8 +551,7 @@ static const u32 caicos_cgcg_cgls_enable[] =
};
#define CAICOS_CGCG_CGLS_ENABLE_LENGTH sizeof(caicos_cgcg_cgls_enable) / (3 *
sizeof(u32))
-static const u32 caicos_mgcg_default[] =
-{
+static const u32 caicos_mgcg_default[] = {
0x802c, 0xc000, 0x,
0x5448, 0x0100, 0x,
0x55e4, 0x00600100, 0x,
@@ -640,8 +630,7 @@ static const u32 caicos_mgcg_default[] =
};
#define CAICOS_MGCG_DEFAULT_LENGTH sizeof(caicos_mgcg_default) / (3 *
sizeof(u32))
-static const u32 caicos_mgcg_disable[] =
-{
+static const u32 caicos_mgcg_disable[] = {
0x802c, 0xc000, 0x,
0x08f8, 0x, 0x,
0x08fc, 0x, 0x,
@@ -655,8 +644,7 @@ static const u32 caicos_mgcg_disable[] =
};
#define CAICOS_MGCG_DISABLE_LENGTH sizeof(caicos_mgcg_disable) / (3 *
sizeof(u32))
-static con
[PATCH] drm/radeon: Clean up errors in uvd_v1_0.c
Fix the following errors reported by checkpatch: ERROR: "(foo*)" should be "(foo *)" Signed-off-by: GuoHua Chen --- drivers/gpu/drm/radeon/uvd_v1_0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/radeon/uvd_v1_0.c b/drivers/gpu/drm/radeon/uvd_v1_0.c index 58557c2263a7..5684639d20a6 100644 --- a/drivers/gpu/drm/radeon/uvd_v1_0.c +++ b/drivers/gpu/drm/radeon/uvd_v1_0.c @@ -142,7 +142,7 @@ int uvd_v1_0_resume(struct radeon_device *rdev) addr = (rdev->uvd.gpu_addr >> 32) & 0xFF; WREG32(UVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1 << 31)); - WREG32(UVD_FW_START, *((uint32_t*)rdev->uvd.cpu_addr)); + WREG32(UVD_FW_START, *((uint32_t *)rdev->uvd.cpu_addr)); return 0; } -- 2.17.1
[PATCH] drm/edid: Clean up errors in drm_edid.h
Fix the following errors reported by checkpatch: ERROR: do not use assignment in if condition Signed-off-by: chenxuebing --- drivers/gpu/drm/drm_edid.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 69c68804023f..9bcaf76f10fc 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -3611,7 +3611,8 @@ static bool mode_in_range(const struct drm_display_mode *mode, if (!mode_in_vsync_range(mode, edid, t)) return false; - if ((max_clock = range_pixel_clock(edid, t))) + max_clock = range_pixel_clock(edid, t); + if (max_clock) if (mode->clock > max_clock) return false; -- 2.17.1
Re: [PATCH V2 1/2] dt-bindings: phy: add binding for the i.MX8MP HDMI PHY
Hi Adam, there is already a V3 by Lucas available here[1]. I just noticed that the new PLL config has some common registers and is therefore smaller, most likely there are other changes too. Thanks for picking this up again, regards Benjamin [1] https://lore.kernel.org/linux-arm-kernel/20230906184211.1857585-2-l.st...@pengutronix.de/
[PATCH] drm/amdgpu: Clean up errors in umc_v6_0.c
Fix the following errors reported by checkpatch:
ERROR: space required after that ',' (ctx:VxV)
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/amdgpu/umc_v6_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/umc_v6_0.c
index 0d6b50528d76..97fa88ed770c 100644
--- a/drivers/gpu/drm/amd/amdgpu/umc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v6_0.c
@@ -25,7 +25,7 @@
static void umc_v6_0_init_registers(struct amdgpu_device *adev)
{
- unsigned i,j;
+ unsigned i, j;
for (i = 0; i < 4; i++)
for (j = 0; j < 4; j++)
--
2.17.1
[PATCH] drm/radeon: Clean up errors in radeon_display.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: space prohibited before that ',' (ctx:WxW)
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/radeon_display.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_display.c
b/drivers/gpu/drm/radeon/radeon_display.c
index a44f78bdd4e5..94dc4f92587f 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -1365,8 +1365,8 @@ static const struct drm_prop_enum_list
radeon_tmds_pll_enum_list[] = {
{ 1, "bios" },
};
-static const struct drm_prop_enum_list radeon_tv_std_enum_list[] =
-{ { TV_STD_NTSC, "ntsc" },
+static const struct drm_prop_enum_list radeon_tv_std_enum_list[] = {
+ { TV_STD_NTSC, "ntsc" },
{ TV_STD_PAL, "pal" },
{ TV_STD_PAL_M, "pal-m" },
{ TV_STD_PAL_60, "pal-60" },
@@ -1376,25 +1376,25 @@ static const struct drm_prop_enum_list
radeon_tv_std_enum_list[] =
{ TV_STD_SECAM, "secam" },
};
-static const struct drm_prop_enum_list radeon_underscan_enum_list[] ={
+static const struct drm_prop_enum_list radeon_underscan_enum_list[] = {
{ UNDERSCAN_OFF, "off" },
{ UNDERSCAN_ON, "on" },
{ UNDERSCAN_AUTO, "auto" },
};
-static const struct drm_prop_enum_list radeon_audio_enum_list[] ={
+static const struct drm_prop_enum_list radeon_audio_enum_list[] = {
{ RADEON_AUDIO_DISABLE, "off" },
{ RADEON_AUDIO_ENABLE, "on" },
{ RADEON_AUDIO_AUTO, "auto" },
};
/* XXX support different dither options? spatial, temporal, both, etc. */
-static const struct drm_prop_enum_list radeon_dither_enum_list[] ={
+static const struct drm_prop_enum_list radeon_dither_enum_list[] = {
{ RADEON_FMT_DITHER_DISABLE, "off" },
{ RADEON_FMT_DITHER_ENABLE, "on" },
};
-static const struct drm_prop_enum_list radeon_output_csc_enum_list[] ={
+static const struct drm_prop_enum_list radeon_output_csc_enum_list[] = {
{ RADEON_OUTPUT_CSC_BYPASS, "bypass" },
{ RADEON_OUTPUT_CSC_TVRGB, "tvrgb" },
{ RADEON_OUTPUT_CSC_YCBCR601, "ycbcr601" },
--
2.17.1
[PATCH] drm/radeon: Clean up errors in si_dpm.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/si_dpm.c | 132 +++-
1 file changed, 44 insertions(+), 88 deletions(-)
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index fbf968e3f6d7..9deb91970d4d 100644
--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -46,8 +46,7 @@
#define SCLK_MIN_DEEPSLEEP_FREQ 1350
-static const struct si_cac_config_reg cac_weights_tahiti[] =
-{
+static const struct si_cac_config_reg cac_weights_tahiti[] = {
{ 0x0, 0x, 0, 0xc, SISLANDS_CACCONFIG_CGIND },
{ 0x0, 0x, 16, 0x0, SISLANDS_CACCONFIG_CGIND },
{ 0x1, 0x, 0, 0x101, SISLANDS_CACCONFIG_CGIND },
@@ -111,8 +110,7 @@ static const struct si_cac_config_reg cac_weights_tahiti[] =
{ 0x }
};
-static const struct si_cac_config_reg lcac_tahiti[] =
-{
+static const struct si_cac_config_reg lcac_tahiti[] = {
{ 0x143, 0x0001fffe, 1, 0x3, SISLANDS_CACCONFIG_CGIND },
{ 0x143, 0x0001, 0, 0x1, SISLANDS_CACCONFIG_CGIND },
{ 0x146, 0x0001fffe, 1, 0x3, SISLANDS_CACCONFIG_CGIND },
@@ -203,13 +201,11 @@ static const struct si_cac_config_reg lcac_tahiti[] =
};
-static const struct si_cac_config_reg cac_override_tahiti[] =
-{
+static const struct si_cac_config_reg cac_override_tahiti[] = {
{ 0x }
};
-static const struct si_powertune_data powertune_data_tahiti =
-{
+static const struct si_powertune_data powertune_data_tahiti = {
((1 << 16) | 27027),
6,
0,
@@ -239,8 +235,7 @@ static const struct si_powertune_data powertune_data_tahiti
=
true
};
-static const struct si_dte_data dte_data_tahiti =
-{
+static const struct si_dte_data dte_data_tahiti = {
{ 1159409, 0, 0, 0, 0 },
{ 777, 0, 0, 0, 0 },
2,
@@ -257,8 +252,7 @@ static const struct si_dte_data dte_data_tahiti =
false
};
-static const struct si_dte_data dte_data_tahiti_pro =
-{
+static const struct si_dte_data dte_data_tahiti_pro = {
{ 0x1E8480, 0x3D0900, 0x989680, 0x2625A00, 0x0 },
{ 0x0, 0x0, 0x0, 0x0, 0x0 },
5,
@@ -275,8 +269,7 @@ static const struct si_dte_data dte_data_tahiti_pro =
true
};
-static const struct si_dte_data dte_data_new_zealand =
-{
+static const struct si_dte_data dte_data_new_zealand = {
{ 0x1E8480, 0x3D0900, 0x989680, 0x2625A00, 0 },
{ 0x29B, 0x3E9, 0x537, 0x7D2, 0 },
0x5,
@@ -293,8 +286,7 @@ static const struct si_dte_data dte_data_new_zealand =
true
};
-static const struct si_dte_data dte_data_aruba_pro =
-{
+static const struct si_dte_data dte_data_aruba_pro = {
{ 0x1E8480, 0x3D0900, 0x989680, 0x2625A00, 0x0 },
{ 0x0, 0x0, 0x0, 0x0, 0x0 },
5,
@@ -311,8 +303,7 @@ static const struct si_dte_data dte_data_aruba_pro =
true
};
-static const struct si_dte_data dte_data_malta =
-{
+static const struct si_dte_data dte_data_malta = {
{ 0x1E8480, 0x3D0900, 0x989680, 0x2625A00, 0x0 },
{ 0x0, 0x0, 0x0, 0x0, 0x0 },
5,
@@ -329,8 +320,7 @@ static const struct si_dte_data dte_data_malta =
true
};
-static struct si_cac_config_reg cac_weights_pitcairn[] =
-{
+static struct si_cac_config_reg cac_weights_pitcairn[] = {
{ 0x0, 0x, 0, 0x8a, SISLANDS_CACCONFIG_CGIND },
{ 0x0, 0x, 16, 0x0, SISLANDS_CACCONFIG_CGIND },
{ 0x1, 0x, 0, 0x0, SISLANDS_CACCONFIG_CGIND },
@@ -394,8 +384,7 @@ static struct si_cac_config_reg cac_weights_pitcairn[] =
{ 0x }
};
-static const struct si_cac_config_reg lcac_pitcairn[] =
-{
+static const struct si_cac_config_reg lcac_pitcairn[] = {
{ 0x98, 0x0001fffe, 1, 0x2, SISLANDS_CACCONFIG_CGIND },
{ 0x98, 0x0001, 0, 0x1, SISLANDS_CACCONFIG_CGIND },
{ 0x104, 0x0001fffe, 1, 0x2, SISLANDS_CACCONFIG_CGIND },
@@ -485,13 +474,11 @@ static const struct si_cac_config_reg lcac_pitcairn[] =
{ 0x }
};
-static const struct si_cac_config_reg cac_override_pitcairn[] =
-{
+static const struct si_cac_config_reg cac_override_pitcairn[] = {
{ 0x }
};
-static const struct si_powertune_data powertune_data_pitcairn =
-{
+static const struct si_powertune_data powertune_data_pitcairn = {
((1 << 16) | 27027),
5,
0,
@@ -521,8 +508,7 @@ static const struct si_powertune_data
powertune_data_pitcairn =
true
};
-static const struct si_dte_data dte_data_pitcairn =
-{
+static const struct si_dte_data dte_data_pitcairn = {
{ 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0 },
0,
@@ -539,8 +525,7 @@ static const struct si_dte_data dte_data_pitcairn =
false
};
-static const struct si_dte_data dte_data_curacao_xt =
-{
+static const struct si_dte_data dte_data_curacao_xt = {
{ 0x1E848
[PATCH] drm/radeon: Clean up errors in r600_dpm.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following enum go on the same line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/r600_dpm.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r600_dpm.h
b/drivers/gpu/drm/radeon/r600_dpm.h
index 6e4d22ed2a00..5c2513c84c48 100644
--- a/drivers/gpu/drm/radeon/r600_dpm.h
+++ b/drivers/gpu/drm/radeon/r600_dpm.h
@@ -119,8 +119,7 @@ enum r600_display_watermark {
R600_DISPLAY_WATERMARK_HIGH = 1,
};
-enum r600_display_gap
-{
+enum r600_display_gap {
R600_PM_DISPLAY_GAP_VBLANK_OR_WM = 0,
R600_PM_DISPLAY_GAP_VBLANK = 1,
R600_PM_DISPLAY_GAP_WATERMARK= 2,
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in clearstate_gfx9.h
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/amdgpu/clearstate_gfx9.h | 27 +++-
1 file changed, 9 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/clearstate_gfx9.h
b/drivers/gpu/drm/amd/amdgpu/clearstate_gfx9.h
index 567a904804bc..9c85ca6358c1 100644
--- a/drivers/gpu/drm/amd/amdgpu/clearstate_gfx9.h
+++ b/drivers/gpu/drm/amd/amdgpu/clearstate_gfx9.h
@@ -21,8 +21,7 @@
*
*/
-static const unsigned int gfx9_SECT_CONTEXT_def_1[] =
-{
+static const unsigned int gfx9_SECT_CONTEXT_def_1[] = {
0x, // DB_RENDER_CONTROL
0x, // DB_COUNT_CONTROL
0x, // DB_DEPTH_VIEW
@@ -236,8 +235,7 @@ static const unsigned int gfx9_SECT_CONTEXT_def_1[] =
0x, // PA_SC_VPORT_ZMIN_15
0x3f80, // PA_SC_VPORT_ZMAX_15
};
-static const unsigned int gfx9_SECT_CONTEXT_def_2[] =
-{
+static const unsigned int gfx9_SECT_CONTEXT_def_2[] = {
0x, // PA_SC_SCREEN_EXTENT_CONTROL
0x, // PA_SC_TILE_STEERING_OVERRIDE
0x, // CP_PERFMON_CNTX_CNTL
@@ -521,15 +519,13 @@ static const unsigned int gfx9_SECT_CONTEXT_def_2[] =
0x, // CB_MRT6_EPITCH
0x, // CB_MRT7_EPITCH
};
-static const unsigned int gfx9_SECT_CONTEXT_def_3[] =
-{
+static const unsigned int gfx9_SECT_CONTEXT_def_3[] = {
0x, // PA_CL_POINT_X_RAD
0x, // PA_CL_POINT_Y_RAD
0x, // PA_CL_POINT_SIZE
0x, // PA_CL_POINT_CULL_RAD
};
-static const unsigned int gfx9_SECT_CONTEXT_def_4[] =
-{
+static const unsigned int gfx9_SECT_CONTEXT_def_4[] = {
0x, // DB_DEPTH_CONTROL
0x, // DB_EQAA
0x, // CB_COLOR_CONTROL
@@ -688,17 +684,14 @@ static const unsigned int gfx9_SECT_CONTEXT_def_4[] =
0x, // VGT_GS_OUT_PRIM_TYPE
0x, // IA_ENHANCE
};
-static const unsigned int gfx9_SECT_CONTEXT_def_5[] =
-{
+static const unsigned int gfx9_SECT_CONTEXT_def_5[] = {
0x, // WD_ENHANCE
0x, // VGT_PRIMITIVEID_EN
};
-static const unsigned int gfx9_SECT_CONTEXT_def_6[] =
-{
+static const unsigned int gfx9_SECT_CONTEXT_def_6[] = {
0x, // VGT_PRIMITIVEID_RESET
};
-static const unsigned int gfx9_SECT_CONTEXT_def_7[] =
-{
+static const unsigned int gfx9_SECT_CONTEXT_def_7[] = {
0x, // VGT_GS_MAX_PRIMS_PER_SUBGROUP
0x, // VGT_DRAW_PAYLOAD_CNTL
0, // HOLE
@@ -766,8 +759,7 @@ static const unsigned int gfx9_SECT_CONTEXT_def_7[] =
0x, // VGT_STRMOUT_CONFIG
0x, // VGT_STRMOUT_BUFFER_CONFIG
};
-static const unsigned int gfx9_SECT_CONTEXT_def_8[] =
-{
+static const unsigned int gfx9_SECT_CONTEXT_def_8[] = {
0x, // PA_SC_CENTROID_PRIORITY_0
0x, // PA_SC_CENTROID_PRIORITY_1
0x1000, // PA_SC_LINE_CNTL
@@ -924,8 +916,7 @@ static const unsigned int gfx9_SECT_CONTEXT_def_8[] =
0x, // CB_COLOR7_DCC_BASE
0x, // CB_COLOR7_DCC_BASE_EXT
};
-static const struct cs_extent_def gfx9_SECT_CONTEXT_defs[] =
-{
+static const struct cs_extent_def gfx9_SECT_CONTEXT_defs[] = {
{gfx9_SECT_CONTEXT_def_1, 0xa000, 212 },
{gfx9_SECT_CONTEXT_def_2, 0xa0d6, 282 },
{gfx9_SECT_CONTEXT_def_3, 0xa1f5, 4 },
--
2.17.1
[PATCH] drm/radeon: Clean up errors in rv6xx_dpm.h
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/atombios_crtc.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c
b/drivers/gpu/drm/radeon/atombios_crtc.c
index ade13173921b..ecebebe2e7a6 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -213,8 +213,7 @@ static void atombios_enable_crtc_memreq(struct drm_crtc
*crtc, int state)
atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t
*)&args);
}
-static const u32 vga_control_regs[6] =
-{
+static const u32 vga_control_regs[6] = {
AVIVO_D1VGA_CONTROL,
AVIVO_D2VGA_CONTROL,
EVERGREEN_D3VGA_CONTROL,
--
2.17.1
[PATCH] drm/gma500: Clean up errors in oaktrail_lvds.h
Fix the following errors reported by checkpatch:
ERROR: space prohibited after that open parenthesis '('
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/gma500/oaktrail_lvds.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/gma500/oaktrail_lvds.c
b/drivers/gpu/drm/gma500/oaktrail_lvds.c
index d974d0c60d2a..62490a49c1ba 100644
--- a/drivers/gpu/drm/gma500/oaktrail_lvds.c
+++ b/drivers/gpu/drm/gma500/oaktrail_lvds.c
@@ -126,7 +126,7 @@ static void oaktrail_lvds_mode_set(struct drm_encoder
*encoder,
return;
}
- drm_object_property_get_value( &connector->base,
+ drm_object_property_get_value(&connector->base,
dev->mode_config.scaling_mode_property, &v);
drm_connector_list_iter_end(&conn_iter);
--
2.17.1
[PATCH] drm/radeon: Clean up errors in radeon_audio.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/radeon_audio.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_audio.h
b/drivers/gpu/drm/radeon/radeon_audio.h
index dacaaa007051..a073dadd0638 100644
--- a/drivers/gpu/drm/radeon/radeon_audio.h
+++ b/drivers/gpu/drm/radeon/radeon_audio.h
@@ -34,8 +34,7 @@ struct cea_sad;
#define WREG32_ENDPOINT(block, reg, v) \
radeon_audio_endpoint_wreg(rdev, (block), (reg), (v))
-struct radeon_audio_basic_funcs
-{
+struct radeon_audio_basic_funcs {
u32 (*endpoint_rreg)(struct radeon_device *rdev, u32 offset, u32 reg);
void (*endpoint_wreg)(struct radeon_device *rdev,
u32 offset, u32 reg, u32 v);
@@ -43,8 +42,7 @@ struct radeon_audio_basic_funcs
struct r600_audio_pin *pin, u8 enable_mask);
};
-struct radeon_audio_funcs
-{
+struct radeon_audio_funcs {
void (*select_pin)(struct drm_encoder *encoder);
struct r600_audio_pin* (*get_pin)(struct radeon_device *rdev);
void (*write_latency_fields)(struct drm_encoder *encoder,
--
2.17.1
[PATCH] drm: Clean up errors in drm_dp_mst_topology.h
Fix the following errors reported by checkpatch:
ERROR: space prohibited before open square bracket '['
Signed-off-by: chenxuebing
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c
b/drivers/gpu/drm/display/drm_dp_mst_topology.c
index bd6c24d4213c..a4a24ec11b80 100644
--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
@@ -100,7 +100,7 @@ static bool drm_dp_mst_port_downstream_of_branch(struct
drm_dp_mst_port *port,
#define DBG_PREFIX "[dp_mst]"
-#define DP_STR(x) [DP_ ## x] = #x
+#define DP_STR(x)[DP_ ## x] = #x
static const char *drm_dp_mst_req_type_str(u8 req_type)
{
@@ -131,7 +131,7 @@ static const char *drm_dp_mst_req_type_str(u8 req_type)
}
#undef DP_STR
-#define DP_STR(x) [DP_NAK_ ## x] = #x
+#define DP_STR(x)[DP_NAK_ ## x] = #x
static const char *drm_dp_mst_nak_reason_str(u8 nak_reason)
{
@@ -156,7 +156,7 @@ static const char *drm_dp_mst_nak_reason_str(u8 nak_reason)
}
#undef DP_STR
-#define DP_STR(x) [DRM_DP_SIDEBAND_TX_ ## x] = #x
+#define DP_STR(x)[DRM_DP_SIDEBAND_TX_ ## x] = #x
static const char *drm_dp_mst_sideband_tx_state_str(int state)
{
--
2.17.1
[PATCH] drm/radeon: Clean up errors in trinity_dpm.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: space prohibited before that ',' (ctx:WxW)
ERROR: need consistent spacing around '-' (ctx:WxV)
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/kv_dpm.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c
index f7735da07feb..55dbf450bd9c 100644
--- a/drivers/gpu/drm/radeon/kv_dpm.c
+++ b/drivers/gpu/drm/radeon/kv_dpm.c
@@ -64,8 +64,7 @@ extern void cik_exit_rlc_safe_mode(struct radeon_device
*rdev);
extern void cik_update_cg(struct radeon_device *rdev,
u32 block, bool enable);
-static const struct kv_pt_config_reg didt_config_kv[] =
-{
+static const struct kv_pt_config_reg didt_config_kv[] = {
{ 0x10, 0x00ff, 0, 0x0, KV_CONFIGREG_DIDT_IND },
{ 0x10, 0xff00, 8, 0x0, KV_CONFIGREG_DIDT_IND },
{ 0x10, 0x00ff, 16, 0x0, KV_CONFIGREG_DIDT_IND },
@@ -931,9 +930,9 @@ static void kv_calculate_dfs_bypass_settings(struct
radeon_device *rdev)
pi->graphics_level[i].ClkBypassCntl = 2;
else if
(kv_get_clock_difference(table->entries[i].clk, 26600) < 200)
pi->graphics_level[i].ClkBypassCntl = 7;
- else if
(kv_get_clock_difference(table->entries[i].clk , 2) < 200)
+ else if
(kv_get_clock_difference(table->entries[i].clk, 2) < 200)
pi->graphics_level[i].ClkBypassCntl = 6;
- else if
(kv_get_clock_difference(table->entries[i].clk , 1) < 200)
+ else if
(kv_get_clock_difference(table->entries[i].clk, 1) < 200)
pi->graphics_level[i].ClkBypassCntl = 8;
else
pi->graphics_level[i].ClkBypassCntl = 0;
@@ -1577,7 +1576,7 @@ static void kv_set_valid_clock_range(struct radeon_device
*rdev,
if ((new_ps->levels[0].sclk -
table->entries[pi->highest_valid].sclk_frequency) >
(table->entries[pi->lowest_valid].sclk_frequency -
-new_ps->levels[new_ps->num_levels -1].sclk))
+new_ps->levels[new_ps->num_levels - 1].sclk))
pi->highest_valid = pi->lowest_valid;
else
pi->lowest_valid = pi->highest_valid;
--
2.17.1
[PATCH] drm/gma500: Clean up errors in psb_intel_sdvo.h
Fix the following errors reported by checkpatch:
ERROR: "foo * bar" should be "foo *bar"
ERROR: "(foo*)" should be "(foo *)"
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/gma500/psb_intel_sdvo.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/gma500/psb_intel_sdvo.c
b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
index e4f914deceba..86802c274e5b 100644
--- a/drivers/gpu/drm/gma500/psb_intel_sdvo.c
+++ b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
@@ -451,7 +451,7 @@ static const char *cmd_status_names[] = {
static bool psb_intel_sdvo_write_cmd(struct psb_intel_sdvo *psb_intel_sdvo, u8
cmd,
const void *args, int args_len)
{
- u8 buf[MAX_ARG_LEN*2 + 2], status;
+ u8 buf[MAX_ARG_LEN * 2 + 2], status;
struct i2c_msg msgs[MAX_ARG_LEN + 3];
int i, ret;
@@ -466,16 +466,16 @@ static bool psb_intel_sdvo_write_cmd(struct
psb_intel_sdvo *psb_intel_sdvo, u8 c
msgs[i].addr = psb_intel_sdvo->slave_addr;
msgs[i].flags = 0;
msgs[i].len = 2;
- msgs[i].buf = buf + 2 *i;
- buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
- buf[2*i + 1] = ((u8*)args)[i];
+ msgs[i].buf = buf + 2 * i;
+ buf[2 * i + 0] = SDVO_I2C_ARG_0 - i;
+ buf[2 * i + 1] = ((u8 *)args)[i];
}
msgs[i].addr = psb_intel_sdvo->slave_addr;
msgs[i].flags = 0;
msgs[i].len = 2;
- msgs[i].buf = buf + 2*i;
- buf[2*i + 0] = SDVO_I2C_OPCODE;
- buf[2*i + 1] = cmd;
+ msgs[i].buf = buf + 2 * i;
+ buf[2 * i + 0] = SDVO_I2C_OPCODE;
+ buf[2 * i + 1] = cmd;
/* the following two are to read the response */
status = SDVO_I2C_CMD_STATUS;
@@ -798,7 +798,7 @@ static void psb_intel_sdvo_get_dtd_from_mode(struct
psb_intel_sdvo_dtd *dtd,
dtd->part2.reserved = 0;
}
-static void psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
+static void psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode *mode,
const struct psb_intel_sdvo_dtd *dtd)
{
mode->hdisplay = dtd->part1.h_active;
--
2.17.1
[PATCH] drm/vmwgfx: Clean up errors in vmwgfx_streamoutput.c
Fix the following errors reported by checkpatch:
ERROR: space prohibited before that close parenthesis ')'
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/vmwgfx/vmwgfx_streamoutput.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_streamoutput.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_streamoutput.c
index edcc40659038..3daff9537bf8 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_streamoutput.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_streamoutput.c
@@ -96,7 +96,7 @@ static int vmw_dx_streamoutput_unscrub(struct vmw_resource
*res)
SVGA3dCmdDXBindStreamOutput body;
} *cmd;
- if (!list_empty(&so->cotable_head) || !so->committed )
+ if (!list_empty(&so->cotable_head) || !so->committed)
return 0;
cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), so->ctx->id);
@@ -363,6 +363,6 @@ void vmw_dx_streamoutput_cotable_list_scrub(struct
vmw_private *dev_priv,
list_for_each_entry_safe(entry, next, list, cotable_head) {
WARN_ON(vmw_dx_streamoutput_scrub(&entry->res));
if (!readback)
- entry->committed =false;
+ entry->committed = false;
}
}
--
2.17.1
[PATCH] drm/amd/include/vega20_ip_offset: Clean up errors in vega20_ip_offset.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
ERROR: spaces required around that '=' (ctx:WxV)
Signed-off-by: chenxuebing
---
.../gpu/drm/amd/include/vega20_ip_offset.h| 78 +--
1 file changed, 38 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/vega20_ip_offset.h
b/drivers/gpu/drm/amd/include/vega20_ip_offset.h
index 1deb68f3d334..92cf2d9e767f 100644
--- a/drivers/gpu/drm/amd/include/vega20_ip_offset.h
+++ b/drivers/gpu/drm/amd/include/vega20_ip_offset.h
@@ -25,139 +25,137 @@
#define MAX_SEGMENT6
-struct IP_BASE_INSTANCE
-{
+struct IP_BASE_INSTANCE {
unsigned int segment[MAX_SEGMENT];
};
-struct IP_BASE
-{
+struct IP_BASE {
struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
} __maybe_unused;
-static const struct IP_BASE ATHUB_BASE={ { { { 0x0C20, 0, 0,
0, 0, 0 } },
+static const struct IP_BASE ATHUB_BASE = { { { { 0x0C20, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } } } };
+static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0x00016E00,
0x00017000, 0x00017200, 0x0001B000, 0x0001B200 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } } } };
-static const struct IP_BASE CLK_BASE={ { { { 0x00016C00,
0x00016E00, 0x00017000, 0x00017200, 0x0001B000, 0x0001B200 } },
+static const struct IP_BASE DCE_BASE = { { { { 0x0012, 0x00C0,
0x34C0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } } } };
+static const struct IP_BASE DF_BASE = { { { { 0x7000, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } } } };
+static const struct IP_BASE FUSE_BASE = { { { { 0x00017400, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } } } };
-static const struct IP_BASE DCE_BASE={ { { { 0x0012,
0x00C0, 0x34C0, 0, 0, 0 } },
+static const struct IP_BASE GC_BASE = { { { { 0x2000, 0xA000, 0, 0, 0,
0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } } } };
-static const struct IP_BASE DF_BASE={ { { { 0x7000, 0, 0, 0,
0, 0 } },
+static const struct IP_BASE HDP_BASE = { { { { 0x0F20, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } } } };
-static const struct IP_BASE FUSE_BASE={ { { { 0x00017400, 0, 0, 0,
0, 0 } },
+static const struct IP_BASE MMHUB_BASE = { { { { 0x0001A000, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } } } };
-static const struct IP_BASE GC_BASE={ { { { 0x2000,
0xA000, 0, 0, 0, 0 } },
+static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0, 0, 0, 0, 0 } },
[PATCH] drm/amdgpu: Clean up errors in amdgpu_gmc.c
Fix the following errors reported by checkpatch: ERROR: need consistent spacing around '-' (ctx:WxV) Signed-off-by: chenxuebing --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c index d2f273d77e59..a5d2cda33266 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c @@ -52,7 +52,7 @@ int amdgpu_gmc_pdb0_alloc(struct amdgpu_device *adev) struct amdgpu_bo_param bp; u64 vram_size = adev->gmc.xgmi.node_segment_size * adev->gmc.xgmi.num_physical_nodes; uint32_t pde0_page_shift = adev->gmc.vmid0_page_table_block_size + 21; - uint32_t npdes = (vram_size + (1ULL << pde0_page_shift) -1) >> pde0_page_shift; + uint32_t npdes = (vram_size + (1ULL << pde0_page_shift) - 1) >> pde0_page_shift; memset(&bp, 0, sizeof(bp)); bp.size = PAGE_ALIGN((npdes + 1) * 8); -- 2.17.1
[PATCH] drm/gma500: Clean up errors in intel_gmbus.h
Fix the following errors reported by checkpatch:
ERROR: space prohibited after that '!' (ctx:BxW)
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/gma500/intel_gmbus.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/gma500/intel_gmbus.c
b/drivers/gpu/drm/gma500/intel_gmbus.c
index aa45509859f2..769e47480e11 100644
--- a/drivers/gpu/drm/gma500/intel_gmbus.c
+++ b/drivers/gpu/drm/gma500/intel_gmbus.c
@@ -39,7 +39,7 @@
#define _wait_for(COND, MS, W) ({ \
unsigned long timeout__ = jiffies + msecs_to_jiffies(MS); \
int ret__ = 0; \
- while (! (COND)) { \
+ while (!(COND)) { \
if (time_after(jiffies, timeout__)) { \
ret__ = -ETIMEDOUT; \
break; \
--
2.17.1
[PATCH] drm/radeon/kms: Clean up errors in rv6xx_dpm.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/rv6xx_dpm.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/rv6xx_dpm.h
b/drivers/gpu/drm/radeon/rv6xx_dpm.h
index 8035d53ebea6..020c0dc8361d 100644
--- a/drivers/gpu/drm/radeon/rv6xx_dpm.h
+++ b/drivers/gpu/drm/radeon/rv6xx_dpm.h
@@ -28,8 +28,7 @@
#include "r600_dpm.h"
/* Represents a single SCLK step. */
-struct rv6xx_sclk_stepping
-{
+struct rv6xx_sclk_stepping {
u32 vco_frequency;
u32 post_divider;
};
--
2.17.1
[PATCH] drm: Clean up errors in cdv_intel_dp.h
Fix the following errors reported by checkpatch:
ERROR: else should follow close brace '}'
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/gma500/cdv_intel_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/gma500/cdv_intel_dp.c
b/drivers/gpu/drm/gma500/cdv_intel_dp.c
index 27cfeb6b470f..135a1226df1a 100644
--- a/drivers/gpu/drm/gma500/cdv_intel_dp.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_dp.c
@@ -735,7 +735,7 @@ cdv_intel_dp_aux_native_read(struct gma_encoder *encoder,
if ((ack & DP_AUX_NATIVE_REPLY_MASK) ==
DP_AUX_NATIVE_REPLY_ACK) {
memcpy(recv, reply + 1, ret - 1);
return ret - 1;
- } else
+ } else
if ((ack & DP_AUX_NATIVE_REPLY_MASK) ==
DP_AUX_NATIVE_REPLY_DEFER)
udelay(100);
else
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in displayobject.h
Fix the following errors reported by checkpatch:
ERROR: spaces required around that '=' (ctx:WxV)
ERROR: space prohibited after that open parenthesis '('
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/displayobject.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/include/displayobject.h
b/drivers/gpu/drm/amd/include/displayobject.h
index ddbfe122b2dc..0f9529c40496 100644
--- a/drivers/gpu/drm/amd/include/displayobject.h
+++ b/drivers/gpu/drm/amd/include/displayobject.h
@@ -159,7 +159,7 @@ CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 =
(DISPLAY_OBJECT_TYPE_CONNECTOR << OBJECT_
OBJECT_ENUM_ID1 <<
ENUM_ID_SHIFT |\
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT),
-CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2 =(DISPLAY_OBJECT_TYPE_CONNECTOR <<
OBJECT_TYPE_SHIFT |\
+CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2 = (DISPLAY_OBJECT_TYPE_CONNECTOR <<
OBJECT_TYPE_SHIFT |\
OBJECT_ENUM_ID2 <<
ENUM_ID_SHIFT |\
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT),
--
2.17.1
[PATCH] drm/radeon: Clean up errors in rv770_smc.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
ERROR: open brace '{' following union go on the same line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/rv770_smc.h | 27 +--
1 file changed, 9 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/radeon/rv770_smc.h
b/drivers/gpu/drm/radeon/rv770_smc.h
index 3b2c963c4880..d8e8f70135f2 100644
--- a/drivers/gpu/drm/radeon/rv770_smc.h
+++ b/drivers/gpu/drm/radeon/rv770_smc.h
@@ -31,8 +31,7 @@
#define RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE3
-struct RV770_SMC_SCLK_VALUE
-{
+struct RV770_SMC_SCLK_VALUE {
uint32_tvCG_SPLL_FUNC_CNTL;
uint32_tvCG_SPLL_FUNC_CNTL_2;
uint32_tvCG_SPLL_FUNC_CNTL_3;
@@ -43,8 +42,7 @@ struct RV770_SMC_SCLK_VALUE
typedef struct RV770_SMC_SCLK_VALUE RV770_SMC_SCLK_VALUE;
-struct RV770_SMC_MCLK_VALUE
-{
+struct RV770_SMC_MCLK_VALUE {
uint32_tvMPLL_AD_FUNC_CNTL;
uint32_tvMPLL_AD_FUNC_CNTL_2;
uint32_tvMPLL_DQ_FUNC_CNTL;
@@ -59,8 +57,7 @@ struct RV770_SMC_MCLK_VALUE
typedef struct RV770_SMC_MCLK_VALUE RV770_SMC_MCLK_VALUE;
-struct RV730_SMC_MCLK_VALUE
-{
+struct RV730_SMC_MCLK_VALUE {
uint32_tvMCLK_PWRMGT_CNTL;
uint32_tvDLL_CNTL;
uint32_tvMPLL_FUNC_CNTL;
@@ -73,8 +70,7 @@ struct RV730_SMC_MCLK_VALUE
typedef struct RV730_SMC_MCLK_VALUE RV730_SMC_MCLK_VALUE;
-struct RV770_SMC_VOLTAGE_VALUE
-{
+struct RV770_SMC_VOLTAGE_VALUE {
uint16_t value;
uint8_t index;
uint8_t padding;
@@ -82,16 +78,14 @@ struct RV770_SMC_VOLTAGE_VALUE
typedef struct RV770_SMC_VOLTAGE_VALUE RV770_SMC_VOLTAGE_VALUE;
-union RV7XX_SMC_MCLK_VALUE
-{
+union RV7XX_SMC_MCLK_VALUE {
RV770_SMC_MCLK_VALUEmclk770;
RV730_SMC_MCLK_VALUEmclk730;
};
typedef union RV7XX_SMC_MCLK_VALUE RV7XX_SMC_MCLK_VALUE,
*LPRV7XX_SMC_MCLK_VALUE;
-struct RV770_SMC_HW_PERFORMANCE_LEVEL
-{
+struct RV770_SMC_HW_PERFORMANCE_LEVEL {
uint8_t arbValue;
union{
uint8_t seqValue;
@@ -126,8 +120,7 @@ struct RV770_SMC_HW_PERFORMANCE_LEVEL
typedef struct RV770_SMC_HW_PERFORMANCE_LEVEL RV770_SMC_HW_PERFORMANCE_LEVEL;
-struct RV770_SMC_SWSTATE
-{
+struct RV770_SMC_SWSTATE {
uint8_t flags;
uint8_t padding1;
uint8_t padding2;
@@ -142,8 +135,7 @@ typedef struct RV770_SMC_SWSTATE RV770_SMC_SWSTATE;
#define RV770_SMC_VOLTAGEMASK_VDDCI 2
#define RV770_SMC_VOLTAGEMASK_MAX 4
-struct RV770_SMC_VOLTAGEMASKTABLE
-{
+struct RV770_SMC_VOLTAGEMASKTABLE {
uint8_t highMask[RV770_SMC_VOLTAGEMASK_MAX];
uint32_t lowMask[RV770_SMC_VOLTAGEMASK_MAX];
};
@@ -152,8 +144,7 @@ typedef struct RV770_SMC_VOLTAGEMASKTABLE
RV770_SMC_VOLTAGEMASKTABLE;
#define MAX_NO_VREG_STEPS 32
-struct RV770_SMC_STATETABLE
-{
+struct RV770_SMC_STATETABLE {
uint8_t thermalProtectType;
uint8_t systemFlags;
uint8_t maxVDDCIndexInPPTable;
--
2.17.1
[PATCH] drm/radeon: Clean up errors in rs600.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/rs600.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 8cf87a0a2b2a..5c162778899b 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -54,8 +54,7 @@
static void rs600_gpu_init(struct radeon_device *rdev);
int rs600_mc_wait_for_idle(struct radeon_device *rdev);
-static const u32 crtc_offsets[2] =
-{
+static const u32 crtc_offsets[2] = {
0,
AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL
};
--
2.17.1
[PATCH] drm/radeon: Clean up errors in r600.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/r600.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index a17b95eec65f..b5e97d95a19f 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -99,8 +99,7 @@ MODULE_FIRMWARE("radeon/SUMO_me.bin");
MODULE_FIRMWARE("radeon/SUMO2_pfp.bin");
MODULE_FIRMWARE("radeon/SUMO2_me.bin");
-static const u32 crtc_offsets[2] =
-{
+static const u32 crtc_offsets[2] = {
0,
AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL
};
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in dimgrey_cavefish_ip_offset.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: chenxuebing
---
drivers/gpu/drm/amd/include/dimgrey_cavefish_ip_offset.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/dimgrey_cavefish_ip_offset.h
b/drivers/gpu/drm/amd/include/dimgrey_cavefish_ip_offset.h
index f84996a73de9..53cb4296df88 100644
--- a/drivers/gpu/drm/amd/include/dimgrey_cavefish_ip_offset.h
+++ b/drivers/gpu/drm/amd/include/dimgrey_cavefish_ip_offset.h
@@ -25,13 +25,11 @@
#define MAX_SEGMENT 6
-struct IP_BASE_INSTANCE
-{
+struct IP_BASE_INSTANCE {
unsigned int segment[MAX_SEGMENT];
};
-struct IP_BASE
-{
+struct IP_BASE {
struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
} __maybe_unused;
--
2.17.1
[PATCH] drm/radeon: Clean up errors in rs400.c
Fix the following errors reported by checkpatch:
ERROR: space required before the open parenthesis '('
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/rs400.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index 922a29e58880..d7f552d441ab 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -86,7 +86,7 @@ int rs400_gart_init(struct radeon_device *rdev)
return 0;
}
/* Check gart size */
- switch(rdev->mc.gtt_size / (1024 * 1024)) {
+ switch (rdev->mc.gtt_size / (1024 * 1024)) {
case 32:
case 64:
case 128:
@@ -116,7 +116,7 @@ int rs400_gart_enable(struct radeon_device *rdev)
tmp |= RS690_DIS_OUT_OF_PCI_GART_ACCESS;
WREG32_MC(RS690_AIC_CTRL_SCRATCH, tmp);
/* Check gart size */
- switch(rdev->mc.gtt_size / (1024 * 1024)) {
+ switch (rdev->mc.gtt_size / (1024 * 1024)) {
case 32:
size_reg = RS480_VA_SIZE_32MB;
break;
--
2.17.1
[PATCH] drm/radeon: Clean up errors in evergreen.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: spaces required around that '&=' (ctx:WxO)
ERROR: space required before that '~' (ctx:OxV)
ERROR: space prohibited before that close parenthesis ')'
ERROR: space required after that ',' (ctx:WxO)
ERROR: space required before that '&' (ctx:OxV)
ERROR: need consistent spacing around '*' (ctx:VxW)
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/evergreen.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c
b/drivers/gpu/drm/radeon/evergreen.c
index a424b86008b8..c634dc28e6c3 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -2514,8 +2514,7 @@ static void evergreen_agp_enable(struct radeon_device
*rdev)
WREG32(VM_CONTEXT1_CNTL, 0);
}
-static const unsigned ni_dig_offsets[] =
-{
+static const unsigned ni_dig_offsets[] = {
NI_DIG0_REGISTER_OFFSET,
NI_DIG1_REGISTER_OFFSET,
NI_DIG2_REGISTER_OFFSET,
@@ -2524,8 +2523,7 @@ static const unsigned ni_dig_offsets[] =
NI_DIG5_REGISTER_OFFSET
};
-static const unsigned ni_tx_offsets[] =
-{
+static const unsigned ni_tx_offsets[] = {
NI_DCIO_UNIPHY0_UNIPHY_TX_CONTROL1,
NI_DCIO_UNIPHY1_UNIPHY_TX_CONTROL1,
NI_DCIO_UNIPHY2_UNIPHY_TX_CONTROL1,
@@ -2534,8 +2532,7 @@ static const unsigned ni_tx_offsets[] =
NI_DCIO_UNIPHY5_UNIPHY_TX_CONTROL1
};
-static const unsigned evergreen_dp_offsets[] =
-{
+static const unsigned evergreen_dp_offsets[] = {
EVERGREEN_DP0_REGISTER_OFFSET,
EVERGREEN_DP1_REGISTER_OFFSET,
EVERGREEN_DP2_REGISTER_OFFSET,
@@ -2544,8 +2541,7 @@ static const unsigned evergreen_dp_offsets[] =
EVERGREEN_DP5_REGISTER_OFFSET
};
-static const unsigned evergreen_disp_int_status[] =
-{
+static const unsigned evergreen_disp_int_status[] = {
DISP_INTERRUPT_STATUS,
DISP_INTERRUPT_STATUS_CONTINUE,
DISP_INTERRUPT_STATUS_CONTINUE2,
@@ -2643,7 +2639,7 @@ static void evergreen_blank_dp_output(struct
radeon_device *rdev,
return;
}
- stream_ctrl &=~EVERGREEN_DP_VID_STREAM_CNTL_ENABLE;
+ stream_ctrl &= ~EVERGREEN_DP_VID_STREAM_CNTL_ENABLE;
WREG32(EVERGREEN_DP_VID_STREAM_CNTL +
evergreen_dp_offsets[dig_fe], stream_ctrl);
@@ -2655,7 +2651,7 @@ static void evergreen_blank_dp_output(struct
radeon_device *rdev,
stream_ctrl = RREG32(EVERGREEN_DP_VID_STREAM_CNTL +
evergreen_dp_offsets[dig_fe]);
}
- if (counter >= 32 )
+ if (counter >= 32)
DRM_ERROR("counter exceeds %d\n", counter);
fifo_ctrl = RREG32(EVERGREEN_DP_STEER_FIFO +
evergreen_dp_offsets[dig_fe]);
@@ -2716,7 +2712,7 @@ void evergreen_mc_stop(struct radeon_device *rdev, struct
evergreen_mc_save *sav
/*for now we do it this manually*/
/**/
if (ASIC_IS_DCE5(rdev) &&
- evergreen_is_dp_sst_stream_enabled(rdev, i
,&dig_fe))
+ evergreen_is_dp_sst_stream_enabled(rdev, i,
&dig_fe))
evergreen_blank_dp_output(rdev, dig_fe);
/*we could remove 6 lines below*/
/* XXX this is a hack to avoid strange behavior with
EFI on certain systems */
@@ -3597,7 +3593,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
sq_lds_resource_mgmt = RREG32(SQ_LDS_RESOURCE_MGMT);
- sq_gpr_resource_mgmt_1 = NUM_PS_GPRS((rdev->config.evergreen.max_gprs -
(4 * 2))* 12 / 32);
+ sq_gpr_resource_mgmt_1 = NUM_PS_GPRS((rdev->config.evergreen.max_gprs -
(4 * 2)) * 12 / 32);
sq_gpr_resource_mgmt_1 |= NUM_VS_GPRS((rdev->config.evergreen.max_gprs
- (4 * 2)) * 6 / 32);
sq_gpr_resource_mgmt_1 |= NUM_CLAUSE_TEMP_GPRS(4);
sq_gpr_resource_mgmt_2 = NUM_GS_GPRS((rdev->config.evergreen.max_gprs -
(4 * 2)) * 4 / 32);
--
2.17.1
[PATCH] doc: admin-guide/kernel-parameters: remove useless comment
This comment about DRM drivers has been there since the first git commit. It simply doesn't belong in kernel-parameters; remove it. Signed-off-by: Vegard Nossum --- Documentation/admin-guide/kernel-parameters.rst | 5 - 1 file changed, 5 deletions(-) diff --git a/Documentation/admin-guide/kernel-parameters.rst b/Documentation/admin-guide/kernel-parameters.rst index 102937bc8443..4410384596a9 100644 --- a/Documentation/admin-guide/kernel-parameters.rst +++ b/Documentation/admin-guide/kernel-parameters.rst @@ -218,8 +218,3 @@ bytes respectively. Such letter suffixes can also be entirely omitted: .. include:: kernel-parameters.txt :literal: - -Todo - - - Add more DRM drivers. -- 2.34.1
Re: [PATCH 1/1] drm/virtio: Implement device_attach
On 2024/1/10 18:21, Daniel Vetter wrote:
> On Wed, Jan 10, 2024 at 05:56:28PM +0800, Julia Zhang wrote:
>> drm_gem_map_attach() requires drm_gem_object_funcs.get_sg_table to be
>> implemented, or else return ENOSYS. Virtio has no get_sg_table
>> implemented for vram object. To fix this, add a new device_attach to
>> call drm_gem_map_attach() for shmem object and return 0 for vram object
>> instead of calling drm_gem_map_attach for both of these two kinds of
>> object.
>>
>> Signed-off-by: Julia Zhang
>> ---
>> drivers/gpu/drm/virtio/virtgpu_prime.c | 14 +-
>> 1 file changed, 13 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/virtio/virtgpu_prime.c
>> b/drivers/gpu/drm/virtio/virtgpu_prime.c
>> index 44425f20d91a..f0b0ff6f3813 100644
>> --- a/drivers/gpu/drm/virtio/virtgpu_prime.c
>> +++ b/drivers/gpu/drm/virtio/virtgpu_prime.c
>> @@ -71,6 +71,18 @@ static void virtgpu_gem_unmap_dma_buf(struct
>> dma_buf_attachment *attach,
>> drm_gem_unmap_dma_buf(attach, sgt, dir);
>> }
>>
>> +static int virtgpu_gem_device_attach(struct dma_buf *dma_buf,
>> + struct dma_buf_attachment *attach)
>> +{
>> +struct drm_gem_object *obj = attach->dmabuf->priv;
>> +struct virtio_gpu_object *bo = gem_to_virtio_gpu_obj(obj);
>> +
>> +if (virtio_gpu_is_vram(bo))
>> +return 0;
>
> You need to reject attach here because these vram buffer objects cannot be
> used by any other driver. In that case dma_buf_attach _must_ fail, not
> silently succeed.
>
Do you mean these vram buffer objects should not be imported by other drivers?
> Because if it silently succeeds then the subsequent dma_buf_map_attachment
> will blow up because you don't have the ->get_sg_table hook implemented.
>
I saw only this call stack would call ->get_sg_table:
#0 ->get_sg_table
#1 drm_gem_map_dma_buf
#2 virtgpu_gem_map_dma_buf
#3 __map_dma_buf
#4 dma_buf_dynamic_attach
#5 amdgpu_gem_prime_import
this stack is for shmem object and it requires ->get_sg_table get implemented.
But for vram object, __map_dma_buf will call like this:
#0 sg_alloc_table
#1 virtio_gpu_vram_map_dma_buf
#2 virtgpu_gem_map_dma_buf
#3 __map_dma_buf
#4 dma_buf_dynamic_attach
#5 amdgpu_gem_prime_import
which will not call ->get_sg_table but alloc a sg table instead and fill it
from the vram object.
Before __map_dma_buf, the call stack of virtgpu_gem_device_attach is:
#0 virtgpu_gem_device_attach
#1 virtio_dma_buf_attach
#2 dma_buf_dynamic_attach
#3 amdgpu_gem_prime_import
So my problem is that to realize dGPU prime feature on VM, I actually want
dma_buf_attach succeed
for vram object so that passthrough dGPU can import these vram objects and blit
data to it.
If here return -EBUSY, then amdgpu_gem_prime_import will fail and the whole
feature will fail.
> Per the documentation the error code for this case must be -EBUSY, see the
> section for the attach hook here:
>
> https://dri.freedesktop.org/docs/drm/driver-api/dma-buf.html#c.dma_buf_ops
>
> Since you're looking into this area, please make sure there's not other
> similar mistake in virtio code.
>
> Also can you please make a kerneldoc patch for struct virtio_dma_buf_ops
> to improve the documentation there? I think it would be good to move those
> to the inline style and then at least put a kernel-doc hyperlink to struct
> dma_buf_ops.attach and mention that attach must fail for non-shareable
> buffers.
>
> In general the virtio_dma_buf kerneldoc seems to be on the "too minimal,
> explains nothing" side of things :-/
OK, let me take a look and try to do it.
Regards,
Julia
>
> Cheers, Sima
>
>> +
>> +return drm_gem_map_attach(dma_buf, attach);
>> +}
>> +
>> static const struct virtio_dma_buf_ops virtgpu_dmabuf_ops = {
>> .ops = {
>> .cache_sgt_mapping = true,
>> @@ -83,7 +95,7 @@ static const struct virtio_dma_buf_ops virtgpu_dmabuf_ops
>> = {
>> .vmap = drm_gem_dmabuf_vmap,
>> .vunmap = drm_gem_dmabuf_vunmap,
>> },
>> -.device_attach = drm_gem_map_attach,
>> +.device_attach = virtgpu_gem_device_attach,
>> .get_uuid = virtgpu_virtio_get_uuid,
>> };
>>
>> --
>> 2.34.1
>>
>
[PATCH] gpu/drm/radeon: Clean up errors in evergreen.c
Fix the following errors reported by checkpatch:
ERROR: space prohibited after that open parenthesis '('
ERROR: space prohibited before that close parenthesis ')'
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/r300_reg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/r300_reg.h
b/drivers/gpu/drm/radeon/r300_reg.h
index 9d341cff63ee..d776f929d5c3 100644
--- a/drivers/gpu/drm/radeon/r300_reg.h
+++ b/drivers/gpu/drm/radeon/r300_reg.h
@@ -825,7 +825,7 @@
# define R300_TX_MIN_FILTER_ANISO_LINEAR (0 << 13)
# define R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST (1 << 13)
# define R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR (2 << 13)
-# define R300_TX_MIN_FILTER_MASK ( (15 << 11) | (3 << 13) )
+# define R300_TX_MIN_FILTER_MASK ((15 << 11) | (3 << 13))
# define R300_TX_MAX_ANISO_1_TO_1 (0 << 21)
# define R300_TX_MAX_ANISO_2_TO_1 (2 << 21)
# define R300_TX_MAX_ANISO_4_TO_1 (4 << 21)
--
2.17.1
[PATCH] drm/radeon: Clean up errors in kv_smc.c
Fix the following errors reported by checkpatch: ERROR: spaces required around that '=' (ctx:VxW) Signed-off-by: GuoHua Chen --- drivers/gpu/drm/radeon/kv_smc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/radeon/kv_smc.c b/drivers/gpu/drm/radeon/kv_smc.c index c0a59527e7b8..65831cca6730 100644 --- a/drivers/gpu/drm/radeon/kv_smc.c +++ b/drivers/gpu/drm/radeon/kv_smc.c @@ -189,7 +189,7 @@ int kv_copy_bytes_to_smc(struct radeon_device *rdev, if (ret) return ret; - original_data= RREG32(SMC_IND_DATA_0); + original_data = RREG32(SMC_IND_DATA_0); extra_shift = 8 * (4 - byte_count); -- 2.17.1
[PATCH] drm/radeon: Clean up errors in evergreen_reg.h
Fix the following errors reported by checkpatch: ERROR: space prohibited before that close parenthesis ')' ERROR: need consistent spacing around '<<' (ctx:WxV) ERROR: need consistent spacing around '-' (ctx:WxV) Signed-off-by: GuoHua Chen --- drivers/gpu/drm/radeon/evergreen_reg.h | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/radeon/evergreen_reg.h b/drivers/gpu/drm/radeon/evergreen_reg.h index b436badf9efa..3ff9fda54aa3 100644 --- a/drivers/gpu/drm/radeon/evergreen_reg.h +++ b/drivers/gpu/drm/radeon/evergreen_reg.h @@ -265,8 +265,8 @@ #define NI_DIG_BE_CNTL0x7140 -# define NI_DIG_BE_CNTL_FE_SOURCE_SELECT(x) (((x) >> 8 ) & 0x3F) -# define NI_DIG_FE_CNTL_MODE(x) (((x) >> 16) & 0x7 ) +# define NI_DIG_BE_CNTL_FE_SOURCE_SELECT(x) (((x) >> 8) & 0x3F) +# define NI_DIG_FE_CNTL_MODE(x) (((x) >> 16) & 0x7) #define NI_DIG_BE_EN_CNTL 0x7144 # define NI_DIG_BE_EN_CNTL_ENABLE (1 << 0) @@ -284,7 +284,7 @@ #define EVERGREEN_DP_VID_STREAM_CNTL0x730C # define EVERGREEN_DP_VID_STREAM_CNTL_ENABLE (1 << 0) -# define EVERGREEN_DP_VID_STREAM_STATUS (1 <<16) +# define EVERGREEN_DP_VID_STREAM_STATUS (1 << 16) #define EVERGREEN_DP_STEER_FIFO 0x7310 # define EVERGREEN_DP_STEER_FIFO_RESET (1 << 0) #define EVERGREEN_DP_SEC_CNTL 0x7280 @@ -302,8 +302,8 @@ # define EVERGREEN_DP_SEC_SS_EN (1 << 28) /*DCIO_UNIPHY block*/ -#define NI_DCIO_UNIPHY0_UNIPHY_TX_CONTROL1(0x6600 -0x6600) -#define NI_DCIO_UNIPHY1_UNIPHY_TX_CONTROL1(0x6640 -0x6600) +#define NI_DCIO_UNIPHY0_UNIPHY_TX_CONTROL1(0x6600 - 0x6600) +#define NI_DCIO_UNIPHY1_UNIPHY_TX_CONTROL1(0x6640 - 0x6600) #define NI_DCIO_UNIPHY2_UNIPHY_TX_CONTROL1(0x6680 - 0x6600) #define NI_DCIO_UNIPHY3_UNIPHY_TX_CONTROL1(0x66C0 - 0x6600) #define NI_DCIO_UNIPHY4_UNIPHY_TX_CONTROL1(0x6700 - 0x6600) -- 2.17.1
[PATCH] drm/radeon: Clean up errors in radeon_mode.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/radeon_mode.h | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h
b/drivers/gpu/drm/radeon/radeon_mode.h
index 59c4db13d90a..546381a5c918 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -603,8 +603,7 @@ struct atom_memory_info {
#define MAX_AC_TIMING_ENTRIES 16
-struct atom_memory_clock_range_table
-{
+struct atom_memory_clock_range_table {
u8 num_entries;
u8 rsv[3];
u32 mclk[MAX_AC_TIMING_ENTRIES];
@@ -632,14 +631,12 @@ struct atom_mc_reg_table {
#define MAX_VOLTAGE_ENTRIES 32
-struct atom_voltage_table_entry
-{
+struct atom_voltage_table_entry {
u16 value;
u32 smio_low;
};
-struct atom_voltage_table
-{
+struct atom_voltage_table {
u32 count;
u32 mask_low;
u32 phase_delay;
--
2.17.1
[PATCH] drm/radeon: Clean up errors in rv515.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/rv515.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 76260fdfbaa7..79709d26d983 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -42,8 +42,7 @@
static void rv515_gpu_init(struct radeon_device *rdev);
int rv515_mc_wait_for_idle(struct radeon_device *rdev);
-static const u32 crtc_offsets[2] =
-{
+static const u32 crtc_offsets[2] = {
0,
AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL
};
--
2.17.1
[PATCH] drm/radeon: Clean up errors in r600_dpm.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/r600_dpm.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r600_dpm.c
b/drivers/gpu/drm/radeon/r600_dpm.c
index 9d2bcb9551e6..64980a61d38a 100644
--- a/drivers/gpu/drm/radeon/r600_dpm.c
+++ b/drivers/gpu/drm/radeon/r600_dpm.c
@@ -28,8 +28,7 @@
#include "r600_dpm.h"
#include "atom.h"
-const u32 r600_utc[R600_PM_NUMBER_OF_TC] =
-{
+const u32 r600_utc[R600_PM_NUMBER_OF_TC] = {
R600_UTC_DFLT_00,
R600_UTC_DFLT_01,
R600_UTC_DFLT_02,
@@ -47,8 +46,7 @@ const u32 r600_utc[R600_PM_NUMBER_OF_TC] =
R600_UTC_DFLT_14,
};
-const u32 r600_dtc[R600_PM_NUMBER_OF_TC] =
-{
+const u32 r600_dtc[R600_PM_NUMBER_OF_TC] = {
R600_DTC_DFLT_00,
R600_DTC_DFLT_01,
R600_DTC_DFLT_02,
--
2.17.1
[PATCH] drm/radeon/kms: Clean up errors in smu7_fusion.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
ERROR: space prohibited before open square bracket '['
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/smu7_fusion.h | 42 +++-
1 file changed, 16 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/radeon/smu7_fusion.h
b/drivers/gpu/drm/radeon/smu7_fusion.h
index 78ada9ffd508..e130f52fe8d6 100644
--- a/drivers/gpu/drm/radeon/smu7_fusion.h
+++ b/drivers/gpu/drm/radeon/smu7_fusion.h
@@ -36,8 +36,7 @@
#define SMU7_NUM_NON_TES 2
// All 'soft registers' should be uint32_t.
-struct SMU7_SoftRegisters
-{
+struct SMU7_SoftRegisters {
uint32_tRefClockFrequency;
uint32_tPmTimerP;
uint32_tFeatureEnables;
@@ -80,8 +79,7 @@ struct SMU7_SoftRegisters
typedef struct SMU7_SoftRegisters SMU7_SoftRegisters;
-struct SMU7_Fusion_GraphicsLevel
-{
+struct SMU7_Fusion_GraphicsLevel {
uint32_tMinVddNb;
uint32_tSclkFrequency;
@@ -111,8 +109,7 @@ struct SMU7_Fusion_GraphicsLevel
typedef struct SMU7_Fusion_GraphicsLevel SMU7_Fusion_GraphicsLevel;
-struct SMU7_Fusion_GIOLevel
-{
+struct SMU7_Fusion_GIOLevel {
uint8_t EnabledForActivity;
uint8_t LclkDid;
uint8_t Vid;
@@ -137,8 +134,7 @@ struct SMU7_Fusion_GIOLevel
typedef struct SMU7_Fusion_GIOLevel SMU7_Fusion_GIOLevel;
// UVD VCLK/DCLK state (level) definition.
-struct SMU7_Fusion_UvdLevel
-{
+struct SMU7_Fusion_UvdLevel {
uint32_t VclkFrequency;
uint32_t DclkFrequency;
uint16_t MinVddNb;
@@ -155,8 +151,7 @@ struct SMU7_Fusion_UvdLevel
typedef struct SMU7_Fusion_UvdLevel SMU7_Fusion_UvdLevel;
// Clocks for other external blocks (VCE, ACP, SAMU).
-struct SMU7_Fusion_ExtClkLevel
-{
+struct SMU7_Fusion_ExtClkLevel {
uint32_t Frequency;
uint16_t MinVoltage;
uint8_t Divider;
@@ -166,8 +161,7 @@ struct SMU7_Fusion_ExtClkLevel
};
typedef struct SMU7_Fusion_ExtClkLevel SMU7_Fusion_ExtClkLevel;
-struct SMU7_Fusion_ACPILevel
-{
+struct SMU7_Fusion_ACPILevel {
uint32_tFlags;
uint32_tMinVddNb;
uint32_tSclkFrequency;
@@ -181,8 +175,7 @@ struct SMU7_Fusion_ACPILevel
typedef struct SMU7_Fusion_ACPILevel SMU7_Fusion_ACPILevel;
-struct SMU7_Fusion_NbDpm
-{
+struct SMU7_Fusion_NbDpm {
uint8_t DpmXNbPsHi;
uint8_t DpmXNbPsLo;
uint8_t Dpm0PgNbPsHi;
@@ -197,8 +190,7 @@ struct SMU7_Fusion_NbDpm
typedef struct SMU7_Fusion_NbDpm SMU7_Fusion_NbDpm;
-struct SMU7_Fusion_StateInfo
-{
+struct SMU7_Fusion_StateInfo {
uint32_t SclkFrequency;
uint32_t LclkFrequency;
uint32_t VclkFrequency;
@@ -214,8 +206,7 @@ struct SMU7_Fusion_StateInfo
typedef struct SMU7_Fusion_StateInfo SMU7_Fusion_StateInfo;
-struct SMU7_Fusion_DpmTable
-{
+struct SMU7_Fusion_DpmTable {
uint32_tSystemFlags;
SMU7_PIDController GraphicsPIDController;
@@ -230,12 +221,12 @@ struct SMU7_Fusion_DpmTable
uint8_tSamuLevelCount;
uint16_t FpsHighT;
-SMU7_Fusion_GraphicsLevel GraphicsLevel
[SMU__NUM_SCLK_DPM_STATE];
+SMU7_Fusion_GraphicsLevel GraphicsLevel[SMU__NUM_SCLK_DPM_STATE];
SMU7_Fusion_ACPILevel ACPILevel;
-SMU7_Fusion_UvdLevel UvdLevel
[SMU7_MAX_LEVELS_UVD];
-SMU7_Fusion_ExtClkLevel VceLevel
[SMU7_MAX_LEVELS_VCE];
-SMU7_Fusion_ExtClkLevel AcpLevel
[SMU7_MAX_LEVELS_ACP];
-SMU7_Fusion_ExtClkLevel SamuLevel
[SMU7_MAX_LEVELS_SAMU];
+SMU7_Fusion_UvdLevel UvdLevel[SMU7_MAX_LEVELS_UVD];
+SMU7_Fusion_ExtClkLevel VceLevel[SMU7_MAX_LEVELS_VCE];
+SMU7_Fusion_ExtClkLevel AcpLevel[SMU7_MAX_LEVELS_ACP];
+SMU7_Fusion_ExtClkLevel SamuLevel[SMU7_MAX_LEVELS_SAMU];
uint8_t UvdBootLevel;
uint8_t VceBootLevel;
@@ -266,10 +257,9 @@ struct SMU7_Fusion_DpmTable
};
-struct SMU7_Fusion_GIODpmTable
-{
+struct SMU7_Fusion_GIODpmTable {
-SMU7_Fusion_GIOLevel GIOLevel
[SMU7_MAX_LEVELS_GIO];
+SMU7_Fusion_GIOLevel GIOLevel[SMU7_MAX_LEVELS_GIO];
SMU7_PIDControllerGioPIDController;
--
2.17.1
[PATCH] drm/radeon/kms: Clean up errors in smu7.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: GuoHua Chen
---
drivers/gpu/drm/radeon/smu7.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/radeon/smu7.h b/drivers/gpu/drm/radeon/smu7.h
index 75a380a15292..985d720dbc0d 100644
--- a/drivers/gpu/drm/radeon/smu7.h
+++ b/drivers/gpu/drm/radeon/smu7.h
@@ -82,8 +82,7 @@
#define SCRATCH_B_CURR_SAMU_INDEX_MASK (0x7<
[PATCH] drm/radeon/kms: Clean up errors in radeon_pm.c
Fix the following errors reported by checkpatch:
ERROR: space required before the open parenthesis '('
Signed-off-by: XueBing Chen
---
drivers/gpu/drm/radeon/radeon_pm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c
b/drivers/gpu/drm/radeon/radeon_pm.c
index b73fd9ab0252..4482c8c5f5ce 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -587,7 +587,7 @@ static ssize_t radeon_hwmon_set_pwm1_enable(struct device
*dev,
int err;
int value;
- if(!rdev->asic->dpm.fan_ctrl_set_mode)
+ if (!rdev->asic->dpm.fan_ctrl_set_mode)
return -EINVAL;
err = kstrtoint(buf, 10, &value);
@@ -789,7 +789,7 @@ static umode_t hwmon_attributes_visible(struct kobject
*kobj,
return 0;
/* Skip vddc attribute if get_current_vddc is not implemented */
- if(attr == &sensor_dev_attr_in0_input.dev_attr.attr &&
+ if (attr == &sensor_dev_attr_in0_input.dev_attr.attr &&
!rdev->asic->dpm.get_current_vddc)
return 0;
--
2.17.1
[PATCH] drm/radeon: Clean up errors in atombios.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
ERROR: space required after that close brace '}'
Signed-off-by: XueBing Chen
---
drivers/gpu/drm/radeon/atombios.h | 135 --
1 file changed, 54 insertions(+), 81 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios.h
b/drivers/gpu/drm/radeon/atombios.h
index 2db40789235c..141dc17ba632 100644
--- a/drivers/gpu/drm/radeon/atombios.h
+++ b/drivers/gpu/drm/radeon/atombios.h
@@ -197,19 +197,17 @@
Every table pointed _ATOM_MASTER_DATA_TABLE has this common header.
And the pointer actually points to this header. */
-typedef struct _ATOM_COMMON_TABLE_HEADER
-{
+typedef struct _ATOM_COMMON_TABLE_HEADER {
USHORT usStructureSize;
UCHAR ucTableFormatRevision; /*Change it when the Parser is not backward
compatible */
UCHAR ucTableContentRevision; /*Change it only when the table needs to
change but the firmware */
/*Image can't be updated, while Driver needs
to carry the new table! */
-}ATOM_COMMON_TABLE_HEADER;
+} ATOM_COMMON_TABLE_HEADER;
//
// Structure stores the ROM header.
//
-typedef struct _ATOM_ROM_HEADER
-{
+typedef struct _ATOM_ROM_HEADER {
ATOM_COMMON_TABLE_HEADER sHeader;
UCHAR uaFirmWareSignature[4];/*Signature to distinguish between
Atombios and non-atombios,
atombios should init it as "ATOM", don't
change the position */
@@ -228,7 +226,7 @@ typedef struct _ATOM_ROM_HEADER
USHORT usMasterDataTableOffset; /*Offset for SW to get all data table
offsets, Don't change the position */
UCHAR ucExtendedFunctionCode;
UCHAR ucReserved;
-}ATOM_ROM_HEADER;
+} ATOM_ROM_HEADER;
/*==Command Table
Portion */
@@ -342,17 +340,15 @@ typedef struct _ATOM_MASTER_LIST_OF_COMMAND_TABLES{
#define LCD1OutputControlHW_Misc_Operation
#define TV1OutputControl Gfx_Harvesting
-typedef struct _ATOM_MASTER_COMMAND_TABLE
-{
+typedef struct _ATOM_MASTER_COMMAND_TABLE {
ATOM_COMMON_TABLE_HEADER sHeader;
ATOM_MASTER_LIST_OF_COMMAND_TABLES ListOfCommandTables;
-}ATOM_MASTER_COMMAND_TABLE;
+} ATOM_MASTER_COMMAND_TABLE;
//
// Structures used in every command table
//
-typedef struct _ATOM_TABLE_ATTRIBUTE
-{
+typedef struct _ATOM_TABLE_ATTRIBUTE {
#if ATOM_BIG_ENDIAN
USHORT UpdatedByUtility:1; //[15]=Table updated by utility flag
USHORT PS_SizeInBytes:7; //[14:8]=Size of parameter space in
Bytes (multiple of a dword),
@@ -362,24 +358,22 @@ typedef struct _ATOM_TABLE_ATTRIBUTE
USHORT PS_SizeInBytes:7; //[14:8]=Size of parameter space in
Bytes (multiple of a dword),
USHORT UpdatedByUtility:1; //[15]=Table updated by utility flag
#endif
-}ATOM_TABLE_ATTRIBUTE;
+} ATOM_TABLE_ATTRIBUTE;
-typedef union _ATOM_TABLE_ATTRIBUTE_ACCESS
-{
+typedef union _ATOM_TABLE_ATTRIBUTE_ACCESS {
ATOM_TABLE_ATTRIBUTE sbfAccess;
USHORT susAccess;
-}ATOM_TABLE_ATTRIBUTE_ACCESS;
+} ATOM_TABLE_ATTRIBUTE_ACCESS;
//
// Common header for all command tables.
// Every table pointed by _ATOM_MASTER_COMMAND_TABLE has this common header.
// And the pointer actually points to this header.
//
-typedef struct _ATOM_COMMON_ROM_COMMAND_TABLE_HEADER
-{
+typedef struct _ATOM_COMMON_ROM_COMMAND_TABLE_HEADER {
ATOM_COMMON_TABLE_HEADER CommonHeader;
ATOM_TABLE_ATTRIBUTE TableAttribute;
-}ATOM_COMMON_ROM_COMMAND_TABLE_HEADER;
+} ATOM_COMMON_ROM_COMMAND_TABLE_HEADER;
//
// Structures used by ComputeMemoryEnginePLLTable
@@ -391,8 +385,7 @@ typedef struct _ATOM_COMMON_ROM_COMMAND_TABLE_HEADER
//
// Structures used by AdjustMemoryControllerTable
//
-typedef struct _ATOM_ADJUST_MEMORY_CLOCK_FREQ
-{
+typedef struct _ATOM_ADJUST_MEMORY_CLOCK_FREQ {
#if ATOM_BIG_ENDIAN
ULONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the
right Data Block; BYTE_3[7]=0 - Program the right Data Block
ULONG ulMemoryModuleNumber:7; // BYTE_3[6:0]
@@ -402,25 +395,23 @@ typedef struct _ATOM_ADJUST_MEMORY_CLOCK_FREQ
ULONG ulMemoryModuleNumber:7; // BYTE_3[6:
Re: [PATCH v5 0/8] iio: new DMABUF based API, v5
Hi Andrew, Le lundi 08 janvier 2024 à 15:12 -0600, Andrew Davis a écrit : > On 12/19/23 11:50 AM, Paul Cercueil wrote: > > [V4 was: "iio: Add buffer write() support"][1] > > > > Hi Jonathan, > > > > This is a respin of the V3 of my patchset that introduced a new > > interface based on DMABUF objects [2]. > > > > The V4 was a split of the patchset, to attempt to upstream buffer > > write() support first. But since there is no current user upstream, > > it > > was not merged. This V5 is about doing the opposite, and contains > > the > > new DMABUF interface, without adding the buffer write() support. It > > can > > already be used with the upstream adi-axi-adc driver. > > > > In user-space, Libiio uses it to transfer back and forth blocks of > > samples between the hardware and the applications, without having > > to > > copy the data. > > > > On a ZCU102 with a FMComms3 daughter board, running Libiio from the > > pcercuei/dev-new-dmabuf-api branch [3], compiled with > > WITH_LOCAL_DMABUF_API=OFF (so that it uses fileio): > > sudo utils/iio_rwdev -b 4096 -B cf-ad9361-lpc > > Throughput: 116 MiB/s > > > > Same hardware, with the DMABUF API (WITH_LOCAL_DMABUF_API=ON): > > sudo utils/iio_rwdev -b 4096 -B cf-ad9361-lpc > > Throughput: 475 MiB/s > > > > This benchmark only measures the speed at which the data can be > > fetched > > to iio_rwdev's internal buffers, and does not actually try to read > > the > > data (e.g. to pipe it to stdout). It shows that fetching the data > > is > > more than 4x faster using the new interface. > > > > When actually reading the data, the performance difference isn't > > that > > impressive (maybe because in case of DMABUF the data is not in > > cache): > > > > WITH_LOCAL_DMABUF_API=OFF (so that it uses fileio): > > sudo utils/iio_rwdev -b 4096 cf-ad9361-lpc | dd of=/dev/zero > > status=progress > > 2446422528 bytes (2.4 GB, 2.3 GiB) copied, 22 s, 111 MB/s > > > > WITH_LOCAL_DMABUF_API=ON: > > sudo utils/iio_rwdev -b 4096 cf-ad9361-lpc | dd of=/dev/zero > > status=progress > > 2334388736 bytes (2.3 GB, 2.2 GiB) copied, 21 s, 114 MB/s > > > > One interesting thing to note is that fileio is (currently) > > actually > > faster than the DMABUF interface if you increase a lot the buffer > > size. > > My explanation is that the cache invalidation routine takes more > > and > > more time the bigger the DMABUF gets. This is because the DMABUF is > > backed by small-size pages, so a (e.g.) 64 MiB DMABUF is backed by > > up > > to 16 thousands pages, that have to be invalidated one by one. This > > can > > be addressed by using huge pages, but the udmabuf driver does not > > (yet) > > support creating DMABUFs backed by huge pages. > > > > Have you tried DMABUFs created using the DMABUF System heap exporter? > (drivers/dma-buf/heaps/system_heap.c) It should be able to handle > larger allocation better here, and if you don't have any active > mmaps or vmaps then it can skip CPU-side coherency maintenance > (useful for device to device transfers). I didn't know about it! But udmabuf also allows you to skip CPU-side coherency maintenance, since DMABUFs have two ioctls to start/finish CPU access anyway. > Allocating DMABUFs out of user pages has a bunch of other issues you > might run into also. I'd argue udmabuf is now completely superseded > by DMABUF system heaps. Try it out :) I'm curious, what other issues? The good thing about udmabuf is that the memory is backed by pages, so we can use MSG_ZEROCOPY on sockets to transfer the mmapped data over the network (having a DMABUF interface to the network stack would be better, but I'm not opening that can of worms). > Andrew Cheers, -Paul > > Anyway, the real benefits happen when the DMABUFs are either shared > > between IIO devices, or between the IIO subsystem and another > > filesystem. In that case, the DMABUFs are simply passed around > > drivers, > > without the data being copied at any moment. > > > > We use that feature to transfer samples from our transceivers to > > USB, > > using a DMABUF interface to FunctionFS [4]. > > > > This drastically increases the throughput, to about 274 MiB/s over > > a > > USB3 link, vs. 127 MiB/s using IIO's fileio interface + write() to > > the > > FunctionFS endpoints, for a lower CPU usage (0.85 vs. 0.65 load > > avg.). > > > > Based on linux-next/next-20231219. > > > > Cheers, > > -Paul > > > > [1] > > https://lore.kernel.org/all/20230807112113.47157-1-p...@crapouillou.net/ > > [2] > > https://lore.kernel.org/all/20230403154800.215924-1-p...@crapouillou.net/ > > [3] > > https://github.com/analogdevicesinc/libiio/tree/pcercuei/dev-new-dmabuf-api > > [4] > > https://lore.kernel.org/all/20230322092118.9213-1-p...@crapouillou.net/ > > > > --- > > Changelog: > > - [3/8]: Replace V3's dmaengine_prep_slave_dma_array() with a new > > dmaengine_prep_slave_dma_vec(), which uses a new 'dma_vec' > > struct. > > Note that at some point we will need to support
[PATCH] drm/radeon: Clean up errors in clearstate_ci.h
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
Signed-off-by: XueBing Chen
---
drivers/gpu/drm/radeon/clearstate_ci.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/clearstate_ci.h
b/drivers/gpu/drm/radeon/clearstate_ci.h
index c1b6c22dbed7..0045d42aa27c 100644
--- a/drivers/gpu/drm/radeon/clearstate_ci.h
+++ b/drivers/gpu/drm/radeon/clearstate_ci.h
@@ -23,8 +23,7 @@
#include "clearstate_defs.h"
-static const unsigned int ci_SECT_CONTEXT_def_1[] =
-{
+static const unsigned int ci_SECT_CONTEXT_def_1[] = {
0x, // DB_RENDER_CONTROL
0x, // DB_COUNT_CONTROL
0x, // DB_DEPTH_VIEW
--
2.17.1
[PATCH] drm/radeon: Clean up errors in pptable.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
ERROR: space required after that close brace '}'
Signed-off-by: XueBing Chen
---
drivers/gpu/drm/radeon/pptable.h | 204 +--
1 file changed, 82 insertions(+), 122 deletions(-)
diff --git a/drivers/gpu/drm/radeon/pptable.h b/drivers/gpu/drm/radeon/pptable.h
index 94947229888b..594050be1cbd 100644
--- a/drivers/gpu/drm/radeon/pptable.h
+++ b/drivers/gpu/drm/radeon/pptable.h
@@ -90,22 +90,19 @@ typedef struct _ATOM_PPLIB_FANTABLE
USHORT usPWMHigh; // The PWM value at THigh.
} ATOM_PPLIB_FANTABLE;
-typedef struct _ATOM_PPLIB_FANTABLE2
-{
+typedef struct _ATOM_PPLIB_FANTABLE2 {
ATOM_PPLIB_FANTABLE basicTable;
USHORT usTMax; // The max temperature
} ATOM_PPLIB_FANTABLE2;
-typedef struct _ATOM_PPLIB_FANTABLE3
-{
+typedef struct _ATOM_PPLIB_FANTABLE3 {
ATOM_PPLIB_FANTABLE2 basicTable2;
UCHAR ucFanControlMode;
USHORT usFanPWMMax;
USHORT usFanOutputSensitivity;
} ATOM_PPLIB_FANTABLE3;
-typedef struct _ATOM_PPLIB_EXTENDEDHEADER
-{
+typedef struct _ATOM_PPLIB_EXTENDEDHEADER {
USHORT usSize;
ULONG ulMaxEngineClock; // For Overdrive.
ULONG ulMaxMemoryClock; // For Overdrive.
@@ -144,8 +141,7 @@ typedef struct _ATOM_PPLIB_EXTENDEDHEADER
#define ATOM_PP_PLATFORM_CAP_TEMP_INVERSION 0x0040// Does
the driver supports Temp Inversion feature.
#define ATOM_PP_PLATFORM_CAP_EVV0x0080
-typedef struct _ATOM_PPLIB_POWERPLAYTABLE
-{
+typedef struct _ATOM_PPLIB_POWERPLAYTABLE {
ATOM_COMMON_TABLE_HEADER sHeader;
UCHAR ucDataRevision;
@@ -178,23 +174,20 @@ typedef struct _ATOM_PPLIB_POWERPLAYTABLE
} ATOM_PPLIB_POWERPLAYTABLE;
-typedef struct _ATOM_PPLIB_POWERPLAYTABLE2
-{
+typedef struct _ATOM_PPLIB_POWERPLAYTABLE2 {
ATOM_PPLIB_POWERPLAYTABLE basicTable;
UCHAR ucNumCustomThermalPolicy;
USHORT usCustomThermalPolicyArrayOffset;
-}ATOM_PPLIB_POWERPLAYTABLE2, *LPATOM_PPLIB_POWERPLAYTABLE2;
+} ATOM_PPLIB_POWERPLAYTABLE2, *LPATOM_PPLIB_POWERPLAYTABLE2;
-typedef struct _ATOM_PPLIB_POWERPLAYTABLE3
-{
+typedef struct _ATOM_PPLIB_POWERPLAYTABLE3 {
ATOM_PPLIB_POWERPLAYTABLE2 basicTable2;
USHORT usFormatID; // To be used
ONLY by PPGen.
USHORT usFanTableOffset;
USHORT usExtendendedHeaderOffset;
} ATOM_PPLIB_POWERPLAYTABLE3, *LPATOM_PPLIB_POWERPLAYTABLE3;
-typedef struct _ATOM_PPLIB_POWERPLAYTABLE4
-{
+typedef struct _ATOM_PPLIB_POWERPLAYTABLE4 {
ATOM_PPLIB_POWERPLAYTABLE3 basicTable3;
ULONG ulGoldenPPID;// PPGen use
only
ULONG ulGoldenRevision;// PPGen use
only
@@ -206,8 +199,7 @@ typedef struct _ATOM_PPLIB_POWERPLAYTABLE4
USHORT usMvddDependencyOnMCLKOffset;
} ATOM_PPLIB_POWERPLAYTABLE4, *LPATOM_PPLIB_POWERPLAYTABLE4;
-typedef struct _ATOM_PPLIB_POWERPLAYTABLE5
-{
+typedef struct _ATOM_PPLIB_POWERPLAYTABLE5 {
ATOM_PPLIB_POWERPLAYTABLE4 basicTable4;
ULONG ulTDPLimit;
ULONG ulNearTDPLimit;
@@ -283,20 +275,18 @@ typedef struct _ATOM_PPLIB_POWERPLAYTABLE5
#define ATOM_PPLIB_ENABLE_DRR 0x0008
// remaining 16 bits are reserved
-typedef struct _ATOM_PPLIB_THERMAL_STATE
-{
+typedef struct _ATOM_PPLIB_THERMAL_STATE {
UCHAR ucMinTemperature;
UCHAR ucMaxTemperature;
UCHAR ucThermalAction;
-}ATOM_PPLIB_THERMAL_STATE, *LPATOM_PPLIB_THERMAL_STATE;
+} ATOM_PPLIB_THERMAL_STATE, *LPATOM_PPLIB_THERMAL_STATE;
// Contained in an array starting at the offset
// in ATOM_PPLIB_POWERPLAYTABLE::usNonClockInfoArrayOffset.
// referenced from ATOM_PPLIB_STATE_INFO::ucNonClockStateIndex
#define ATOM_PPLIB_NONCLOCKINFO_VER1 12
#define ATOM_PPLIB_NONCLOCKINFO_VER2 24
-typedef struct _ATOM_PPLIB_NONCLOCK_INFO
-{
+typedef struct _ATOM_PPLIB_NONCLOCK_INFO {
USHORT usClassification;
UCHAR ucMinTemperature;
UCHAR ucMaxTemperature;
@@ -311,8 +301,7 @@ typedef struct _ATOM_PPLIB_NONCLOCK_INFO
// Contained in an array starting at the offset
// in ATOM_PPLIB_POWERPLAYTABLE::usClockInfoArrayOffset.
// referenced from ATOM_PPLIB_STATE::ucClockStateIndices
-typedef struct _ATOM_PPLIB_R600_CLOCK_INFO
-{
+typedef struct _ATOM_PPLIB_R600_CLOCK_INFO {
USHORT usEngineClockLow;
UCHAR ucEngineClockHigh;
@@ -335,9 +324,7 @@ typedef struct _ATOM_PPLIB_R600_CLOCK_INFO
#define ATOM_PPLIB_R600_FLAGS_MEMORY_DLL_OFF 16
#define ATOM_PPLIB_R600_FLAGS_LOWPOWER 32 // On the RV770 use 'low
power' setting (sequencer S0).
-typedef struct _ATOM_PPLIB_RS780_CLOCK_INFO
-
-{
+typedef struct _ATOM_PPLIB_RS780_CLOCK_INFO {
USHORT usLowEngineClockLow; // Lo
[PATCH] drm/radeon: Clean up errors in clearstate_cayman.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
Signed-off-by: XueBing Chen
---
drivers/gpu/drm/radeon/clearstate_cayman.h | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/radeon/clearstate_cayman.h
b/drivers/gpu/drm/radeon/clearstate_cayman.h
index 4774e04c4da6..7693fb6624a3 100644
--- a/drivers/gpu/drm/radeon/clearstate_cayman.h
+++ b/drivers/gpu/drm/radeon/clearstate_cayman.h
@@ -23,8 +23,7 @@
#include "clearstate_defs.h"
-static const u32 SECT_CONTEXT_def_1[] =
-{
+static const u32 SECT_CONTEXT_def_1[] = {
0x, // DB_RENDER_CONTROL
0x, // DB_COUNT_CONTROL
0x, // DB_DEPTH_VIEW
@@ -514,8 +513,7 @@ static const u32 SECT_CONTEXT_def_1[] =
0x, // CB_BLEND6_CONTROL
0x, // CB_BLEND7_CONTROL
};
-static const u32 SECT_CONTEXT_def_2[] =
-{
+static const u32 SECT_CONTEXT_def_2[] = {
0x, // PA_CL_POINT_X_RAD
0x, // PA_CL_POINT_Y_RAD
0x, // PA_CL_POINT_SIZE
@@ -523,8 +521,7 @@ static const u32 SECT_CONTEXT_def_2[] =
0x, // VGT_DMA_BASE_HI
0x, // VGT_DMA_BASE
};
-static const u32 SECT_CONTEXT_def_3[] =
-{
+static const u32 SECT_CONTEXT_def_3[] = {
0x, // DB_DEPTH_CONTROL
0x, // DB_EQAA
0x, // CB_COLOR_CONTROL
--
2.17.1
RE: [PATCH v15 3/5] drm: renesas: Add RZ/G2L DU Support
Hi Laurent,
Thanks for the feedback.
> -Original Message-
> From: Laurent Pinchart
> Sent: Wednesday, January 10, 2024 7:39 PM
> Subject: Re: [PATCH v15 3/5] drm: renesas: Add RZ/G2L DU Support
>
> Hi Biju,
>
> On Thu, Jan 04, 2024 at 02:17:39PM +, Biju Das wrote:
> > On Friday, December 15, 2023 2:56 PM, Biju Das wrote:
> > > On Friday, December 15, 2023 2:18 PM, Maxime Ripard wrote:
> > > > On Fri, Dec 15, 2023 at 01:52:28PM +, Biju Das wrote:
> > > > > > > > > > > +static int rzg2l_du_crtc_enable_vblank(struct
> drm_crtc *crtc) {
> > > > > > > > > > > + struct rzg2l_du_crtc *rcrtc = to_rzg2l_crtc(crtc);
> > > > > > > > > > > +
> > > > > > > > > > > + rcrtc->vblank_enable = true;
> > > > > > > > > > > +
> > > > > > > > > > > + return 0;
> > > > > > > > > > > +}
> > > > > > > > > > > +
> > > > > > > > > > > +static void rzg2l_du_crtc_disable_vblank(struct
> > > > > > > > > > > +drm_crtc *crtc) {
> > > > > > > > > > > + struct rzg2l_du_crtc *rcrtc = to_rzg2l_crtc(crtc);
> > > > > > > > > > > +
> > > > > > > > > > > + rcrtc->vblank_enable = false; }
> > > > > > > > > >
> > > > > > > > > > You should enable / disable your interrupts here
> > > > > > > > >
> > > > > > > > > We don't have dedicated vblank IRQ for enabling/disabling
> vblank.
> > > > > > > > >
> > > > > > > > > vblank is handled by vspd.
> > > > > > > > >
> > > > > > > > > vspd is directly rendering images to display,
> > > > > > > > > rcar_du_crtc_finish_page_flip() and
> > > > > > > > > drm_crtc_handle_vblank() called in vspd's pageflip
> context.
> > > > > > > > >
> > > > > > > > > See rzg2l_du_vsp_complete()in rzg2l_du_vsp.c
> > > > > > > >
> > > > > > > > Sorry, I couldn't really get how the interrupt flow /
> > > > > > > > vblank reporting is going to work. Could you explain it a
> bit more?
> > > > > > >
> > > > > > > We just need to handle vertical blanking in the VSP frame end
> handler.
> > > > > > > See the code below.
> > > > > > >
> > > > > > > static void rzg2l_du_vsp_complete(void *private, unsigned
> > > > > > > int status,
> > > > > > > u32 crc) {
> > > > > > > struct rzg2l_du_crtc *crtc = private;
> > > > > > >
> > > > > > > if (crtc->vblank_enable)
> > > > > > > drm_crtc_handle_vblank(&crtc->crtc);
> > > > > > >
> > > > > > > if (status & VSP1_DU_STATUS_COMPLETE)
> > > > > > > rzg2l_du_crtc_finish_page_flip(crtc);
> > > > > > >
> > > > > > > drm_crtc_add_crc_entry(&crtc->crtc, false, 0, &crc); }
> > > > > >
> > > > > > Then we're back to the same question :)
> > > > > >
> > > > > > Why can't you mask the frame end interrupt?
> > > > >
> > > > > We are masking interrupts.
> > > > >
> > > > > [ 70.639139] ###rzg2l_du_crtc_disable_vblank###
> > > > > [ 70.650243] #rzg2l_du_vsp_disable
> > > > > [ 70.652003] ## vsp1_wpf_stop###
> > > > >
> > > > > Unmask is,
> > > > >
> > > > > [ 176.354520] ###rzg2l_du_crtc_enable_vblank###
> > > > > [ 176.354922] #rzg2l_du_vsp_atomic_flush [
> > > > > 176.355198] ## wpf_configure_stream###
> > > >
> > > > Sorry, my question was why aren't you unmasking and masking them
> > > > in the enable/disable_vblank hooks of the CRTC.
> > >
> > > I have n't tried that. Will try and provide feedback.
> > >
> > > Currently the IRQ source belongs to VSPD in media subsystem.
> > > So I need to export an API though vsp1_drm and test it.
> >
> > + linux-media
> >
> > Laurent, are you ok with the below RZ/G2L specific patch[1] for
> > enabling/disabling frame end interrupt in VSP driver?
> > Note:
> > I need to add a quirk for handling this only for RZ/G2L family as
> > other SoCs have Vblank specific interrupt available in DU.
>
> The DU driver on Gen3 handles vblank exactly as in your patch. What's the
> problem with that ?
There is no issue. Maxime Ripard is checking whether is it possible to
mask/unmask
Interrupt associated with vblank reporting during vblank{enable, disable}?
That is the reason I produced the below patch[1] for suggestions.
>
> > [1]
> >
> > diff --git a/drivers/media/platform/renesas/vsp1/vsp1_drm.c
> > b/drivers/media/platform/renesas/vsp1/vsp1_drm.c
> > index 9b087bd8df7d..39347c16bb27 100644
> > --- a/drivers/media/platform/renesas/vsp1/vsp1_drm.c
> > +++ b/drivers/media/platform/renesas/vsp1/vsp1_drm.c
> > @@ -936,6 +936,14 @@ void vsp1_du_unmap_sg(struct device *dev, struct
> > sg_table *sgt) } EXPORT_SYMBOL_GPL(vsp1_du_unmap_sg);
> >
> > +void vsp1_du_mask_frame_end_interrupt(struct device *dev, bool mask)
> > +{
> > + struct vsp1_device *vsp1 = dev_get_drvdata(dev);
> > +
> > + vsp1_write(vsp1, VI6_WPF_IRQ_ENB(0), mask ? 0 :
> > + VI6_WPF_IRQ_ENB_DFEE);
>
> That will break everything. As soon as you turn of vblank reporting, the
> VSP will stop processing frames and the display will freeze.
OK. I am not able to reproduce this issue on RZ/G2L with limited testing
compared to
R-Car. As per your suggestion, I will drop this change. I ho
Re: [PATCH 1/1] drm/virtio: Implement device_attach
Am 11.01.24 um 09:52 schrieb Zhang, Julia:
On 2024/1/10 18:21, Daniel Vetter wrote:
On Wed, Jan 10, 2024 at 05:56:28PM +0800, Julia Zhang wrote:
drm_gem_map_attach() requires drm_gem_object_funcs.get_sg_table to be
implemented, or else return ENOSYS. Virtio has no get_sg_table
implemented for vram object. To fix this, add a new device_attach to
call drm_gem_map_attach() for shmem object and return 0 for vram object
instead of calling drm_gem_map_attach for both of these two kinds of
object.
Signed-off-by: Julia Zhang
---
drivers/gpu/drm/virtio/virtgpu_prime.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/virtio/virtgpu_prime.c
b/drivers/gpu/drm/virtio/virtgpu_prime.c
index 44425f20d91a..f0b0ff6f3813 100644
--- a/drivers/gpu/drm/virtio/virtgpu_prime.c
+++ b/drivers/gpu/drm/virtio/virtgpu_prime.c
@@ -71,6 +71,18 @@ static void virtgpu_gem_unmap_dma_buf(struct
dma_buf_attachment *attach,
drm_gem_unmap_dma_buf(attach, sgt, dir);
}
+static int virtgpu_gem_device_attach(struct dma_buf *dma_buf,
+struct dma_buf_attachment *attach)
+{
+ struct drm_gem_object *obj = attach->dmabuf->priv;
+ struct virtio_gpu_object *bo = gem_to_virtio_gpu_obj(obj);
+
+ if (virtio_gpu_is_vram(bo))
+ return 0;
You need to reject attach here because these vram buffer objects cannot be
used by any other driver. In that case dma_buf_attach _must_ fail, not
silently succeed.
Do you mean these vram buffer objects should not be imported by other drivers?
Because if it silently succeeds then the subsequent dma_buf_map_attachment
will blow up because you don't have the ->get_sg_table hook implemented.
I saw only this call stack would call ->get_sg_table:
#0 ->get_sg_table
#1 drm_gem_map_dma_buf
#2 virtgpu_gem_map_dma_buf
#3 __map_dma_buf
#4 dma_buf_dynamic_attach
#5 amdgpu_gem_prime_import
this stack is for shmem object and it requires ->get_sg_table get implemented.
But for vram object, __map_dma_buf will call like this:
#0 sg_alloc_table
#1 virtio_gpu_vram_map_dma_buf
#2 virtgpu_gem_map_dma_buf
#3 __map_dma_buf
#4 dma_buf_dynamic_attach
#5 amdgpu_gem_prime_import
which will not call ->get_sg_table but alloc a sg table instead and fill it
from the vram object.
Yeah and exactly that won't work for this use case.
The VRAM of amdgpu is exposed through an MMIO BAR the guest can't access.
Before __map_dma_buf, the call stack of virtgpu_gem_device_attach is:
#0 virtgpu_gem_device_attach
#1 virtio_dma_buf_attach
#2 dma_buf_dynamic_attach
#3 amdgpu_gem_prime_import
So my problem is that to realize dGPU prime feature on VM, I actually want
dma_buf_attach succeed
for vram object so that passthrough dGPU can import these vram objects and blit
data to it.
That is completely futile effort, the dGPU physically can't access that
stuff or otherwise we have a major security hole in the VM.
If here return -EBUSY, then amdgpu_gem_prime_import will fail and the whole
feature will fail.
Yeah and that is completely intentional. Let's discuss that use case AMD
internally first.
Regards,
Christian.
Per the documentation the error code for this case must be -EBUSY, see the
section for the attach hook here:
https://dri.freedesktop.org/docs/drm/driver-api/dma-buf.html#c.dma_buf_ops
Since you're looking into this area, please make sure there's not other
similar mistake in virtio code.
Also can you please make a kerneldoc patch for struct virtio_dma_buf_ops
to improve the documentation there? I think it would be good to move those
to the inline style and then at least put a kernel-doc hyperlink to struct
dma_buf_ops.attach and mention that attach must fail for non-shareable
buffers.
In general the virtio_dma_buf kerneldoc seems to be on the "too minimal,
explains nothing" side of things :-/
OK, let me take a look and try to do it.
Regards,
Julia
Cheers, Sima
+
+ return drm_gem_map_attach(dma_buf, attach);
+}
+
static const struct virtio_dma_buf_ops virtgpu_dmabuf_ops = {
.ops = {
.cache_sgt_mapping = true,
@@ -83,7 +95,7 @@ static const struct virtio_dma_buf_ops virtgpu_dmabuf_ops = {
.vmap = drm_gem_dmabuf_vmap,
.vunmap = drm_gem_dmabuf_vunmap,
},
- .device_attach = drm_gem_map_attach,
+ .device_attach = virtgpu_gem_device_attach,
.get_uuid = virtgpu_virtio_get_uuid,
};
--
2.34.1
