Re: [PATCH] drm: Fix drm.h uapi header for Windows

[Pekka Paalanen]

On Thu, 3 Dec 2020 21:45:14 +0100
Daniel Vetter  wrote:

> On Thu, Dec 3, 2020 at 7:55 PM James Park  wrote:
> >
> > The trailing underscore for  DRM_FOURCC_STANDALONE_ isn't
> > intentional, right? Should I put all the integer types, or just the
> > ones that are used in that file?  
> 
> Yeah that trailing _ just slipped in. And I'd just do the types
> already used. I don't think anything else than __u32 (for drm fourcc)
> and __u64 (for drm modifier) is needed.

Hi,

can that create conflicts if userspace first includes drm_fourcc.h and
then drm.h?

I would find it natural to userspace have generic headers including
drm_fourcc.h and then DRM-specific C-files including drm.h as well
(through libdrm headers). I think Weston might already do this.

The generic userspace (weston) header would obviously #define
DRM_FOURCC_STANDALONE, because it is used by non-DRM C-files as well.


Thanks,
pq


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[PATCH] drm/amdgpu: make DRM_AMD_DC x86-only again

[Arnd Bergmann]

From: Arnd Bergmann 

As the DRM_AMD_DC_DCN3_0 code was x86-only and fails to build on
arm64, merging it into DRM_AMD_DC means that the top-level symbol
is now x86-only as well.

Compilation fails on arm64 with clang-12 with

drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:3641:6:
 error: stack frame size of 2416 bytes in function 
'dml30_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than=]
void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib 
*mode_lib)

I tried to see if the stack usage can be reduced, but this is code
that is described as "This file is gcc-parsable HW gospel, coming
straight from HW engineers." and is written in a way that is inherently
nonportable and not meant to be understood by humans.

There are probably no non-x86 users of this code, so simplify
the dependency list accordingly.

Fixes: 20f2ffe50472 ("drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into 
CONFIG_DRM_AMD_DC_DCN (v3)")
Signed-off-by: Arnd Bergmann 
---
 drivers/gpu/drm/amd/display/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/Kconfig 
b/drivers/gpu/drm/amd/display/Kconfig
index 797b5d4b43e5..54aa50d4deba 100644
--- a/drivers/gpu/drm/amd/display/Kconfig
+++ b/drivers/gpu/drm/amd/display/Kconfig
@@ -6,7 +6,7 @@ config DRM_AMD_DC
bool "AMD DC - Enable new display engine"
default y
select SND_HDA_COMPONENT if SND_HDA_CORE
-   select DRM_AMD_DC_DCN if (X86 || PPC64 || (ARM64 && KERNEL_MODE_NEON)) 
&& !(KCOV_INSTRUMENT_ALL && KCOV_ENABLE_COMPARISONS)
+   select DRM_AMD_DC_DCN if X86 && !(KCOV_INSTRUMENT_ALL && 
KCOV_ENABLE_COMPARISONS)
help
  Choose this option if you want to use the new display engine
  support for AMDGPU. This adds required support for Vega and
-- 
2.27.0

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Re: [PATCH 4/5] drm/scheduler: Job timeout handler returns status (v2)

[Christian König]

Thinking more about that I came to the conclusion that the whole 
approach here isn't correct.


See even when the job has been completed or canceled we still want to 
restart the timer.


The reason for this is that the timer is then not restarted for the 
current job, but for the next job in the queue.


The only valid reason to not restart the timer is that the whole device 
was hot plugged and we return -ENODEV here. E.g. what Andrey has been 
working on.


Regards,
Christian.

Am 04.12.20 um 04:17 schrieb Luben Tuikov:

The driver's job timeout handler now returns
status indicating back to the DRM layer whether
the task (job) was successfully aborted or whether
more time should be given to the task to complete.

Default behaviour as of this patch, is preserved,
except in obvious-by-comment case in the Panfrost
driver, as documented below.

All drivers which make use of the
drm_sched_backend_ops' .timedout_job() callback
have been accordingly renamed and return the
would've-been default value of
DRM_TASK_STATUS_ALIVE to restart the task's
timeout timer--this is the old behaviour, and
is preserved by this patch.

In the case of the Panfrost driver, its timedout
callback correctly first checks if the job had
completed in due time and if so, it now returns
DRM_TASK_STATUS_COMPLETE to notify the DRM layer
that the task can be moved to the done list, to be
freed later. In the other two subsequent checks,
the value of DRM_TASK_STATUS_ALIVE is returned, as
per the default behaviour.

A more involved driver's solutions can be had
in subequent patches.

Signed-off-by: Luben Tuikov 
Reported-by: kernel test robot 

Cc: Alexander Deucher 
Cc: Andrey Grodzovsky 
Cc: Christian König 
Cc: Daniel Vetter 
Cc: Lucas Stach 
Cc: Russell King 
Cc: Christian Gmeiner 
Cc: Qiang Yu 
Cc: Rob Herring 
Cc: Tomeu Vizoso 
Cc: Steven Price 
Cc: Alyssa Rosenzweig 
Cc: Eric Anholt 

v2: Use enum as the status of a driver's job
 timeout callback method.
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_job.c |  6 +++--
  drivers/gpu/drm/etnaviv/etnaviv_sched.c | 10 +++-
  drivers/gpu/drm/lima/lima_sched.c   |  4 +++-
  drivers/gpu/drm/panfrost/panfrost_job.c |  9 ---
  drivers/gpu/drm/scheduler/sched_main.c  |  4 +---
  drivers/gpu/drm/v3d/v3d_sched.c | 32 +
  include/drm/gpu_scheduler.h | 20 +---
  7 files changed, 57 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index ff48101bab55..a111326cbdde 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
@@ -28,7 +28,7 @@
  #include "amdgpu.h"
  #include "amdgpu_trace.h"
  
-static void amdgpu_job_timedout(struct drm_sched_job *s_job)

+static enum drm_task_status amdgpu_job_timedout(struct drm_sched_job *s_job)
  {
struct amdgpu_ring *ring = to_amdgpu_ring(s_job->sched);
struct amdgpu_job *job = to_amdgpu_job(s_job);
@@ -41,7 +41,7 @@ static void amdgpu_job_timedout(struct drm_sched_job *s_job)
amdgpu_ring_soft_recovery(ring, job->vmid, s_job->s_fence->parent)) 
{
DRM_ERROR("ring %s timeout, but soft recovered\n",
  s_job->sched->name);
-   return;
+   return DRM_TASK_STATUS_ALIVE;
}
  
  	amdgpu_vm_get_task_info(ring->adev, job->pasid, &ti);

@@ -53,10 +53,12 @@ static void amdgpu_job_timedout(struct drm_sched_job *s_job)
  
  	if (amdgpu_device_should_recover_gpu(ring->adev)) {

amdgpu_device_gpu_recover(ring->adev, job);
+   return DRM_TASK_STATUS_ALIVE;
} else {
drm_sched_suspend_timeout(&ring->sched);
if (amdgpu_sriov_vf(adev))
adev->virt.tdr_debug = true;
+   return DRM_TASK_STATUS_ALIVE;
}
  }
  
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_sched.c b/drivers/gpu/drm/etnaviv/etnaviv_sched.c

index cd46c882269c..c49516942328 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_sched.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_sched.c
@@ -82,7 +82,8 @@ static struct dma_fence *etnaviv_sched_run_job(struct 
drm_sched_job *sched_job)
return fence;
  }
  
-static void etnaviv_sched_timedout_job(struct drm_sched_job *sched_job)

+static enum drm_task_status etnaviv_sched_timedout_job(struct drm_sched_job
+  *sched_job)
  {
struct etnaviv_gem_submit *submit = to_etnaviv_submit(sched_job);
struct etnaviv_gpu *gpu = submit->gpu;
@@ -120,9 +121,16 @@ static void etnaviv_sched_timedout_job(struct 
drm_sched_job *sched_job)
  
  	drm_sched_resubmit_jobs(&gpu->sched);
  
+	/* Tell the DRM scheduler that this task needs

+* more time.
+*/
+   drm_sched_start(&gpu->sched, true);
+   return DRM_TASK_STATUS_ALIVE;
+
  out_no_timeout:
/* restart scheduler after GPU is usable again */
drm_sched_start(&gpu

Re: [PATCH 5/5] drm/sched: Make use of a "done" list (v2)

[Christian König]

Am 04.12.20 um 04:17 schrieb Luben Tuikov:

The drm_sched_job_done() callback now moves done
jobs from the pending list to a "done" list.

In drm_sched_job_timeout, make use of the status
returned by a GPU driver job timeout handler to
decide whether to leave the oldest job in the
pending list, or to send it off to the done list.
If a driver's job timeout callback returns a
status that that job is done, it is added to the
done list and the done thread woken up. If that
job needs more time, it is left on the pending
list and the timeout timer restarted.

The idea is that a GPU driver can check the IP to
which the passed-in job belongs to and determine
whether the IP is alive and well, or if it needs
more time to complete this job and perhaps others
also executing on it.

In drm_sched_job_timeout(), the main scheduler
thread is now parked, before calling a driver's
timeout_job callback, so as to not compete pushing
jobs down to the GPU while the recovery method is
taking place.

Eliminate the polling mechanism of picking out done
jobs from the pending list, i.e. eliminate
drm_sched_get_cleanup_job().

This also eliminates the eldest job disappearing
from the pending list, while the driver timeout
handler is called.

Various other optimizations to the GPU scheduler
and job recovery are possible with this format.

Signed-off-by: Luben Tuikov 

Cc: Alexander Deucher 
Cc: Andrey Grodzovsky 
Cc: Christian König 
Cc: Daniel Vetter 
Cc: Lucas Stach 
Cc: Russell King 
Cc: Christian Gmeiner 
Cc: Qiang Yu 
Cc: Rob Herring 
Cc: Tomeu Vizoso 
Cc: Steven Price 
Cc: Alyssa Rosenzweig 
Cc: Eric Anholt 

v2: Dispell using a done thread, so as to keep
 the cache hot on the same processor.
---
  drivers/gpu/drm/scheduler/sched_main.c | 247 +
  include/drm/gpu_scheduler.h|   4 +
  2 files changed, 134 insertions(+), 117 deletions(-)

diff --git a/drivers/gpu/drm/scheduler/sched_main.c 
b/drivers/gpu/drm/scheduler/sched_main.c
index b9876cad94f2..d77180b44998 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -164,7 +164,9 @@ drm_sched_rq_select_entity(struct drm_sched_rq *rq)
   * drm_sched_job_done - complete a job
   * @s_job: pointer to the job which is done
   *
- * Finish the job's fence and wake up the worker thread.
+ * Move the completed task to the done list,
+ * signal the its fence to mark it finished,
+ * and wake up the worker thread.
   */
  static void drm_sched_job_done(struct drm_sched_job *s_job)
  {
@@ -176,9 +178,14 @@ static void drm_sched_job_done(struct drm_sched_job *s_job)
  
  	trace_drm_sched_process_job(s_fence);
  
+	spin_lock(&sched->job_list_lock);

+   list_move(&s_job->list, &sched->done_list);
+   spin_unlock(&sched->job_list_lock);
+


That is racy, as soon as the spinlock is dropped the job and with it the 
s_fence might haven been destroyed.



dma_fence_get(&s_fence->finished);
drm_sched_fence_finished(s_fence);
dma_fence_put(&s_fence->finished);


In other words this here needs to come first.

Regards,
Christian.


+
wake_up_interruptible(&sched->wake_up_worker);
  }
  
@@ -309,6 +316,37 @@ static void drm_sched_job_begin(struct drm_sched_job *s_job)

spin_unlock(&sched->job_list_lock);
  }
  
+/** drm_sched_job_timeout -- a timer timeout occurred

+ * @work: pointer to work_struct
+ *
+ * First, park the scheduler thread whose IP timed out,
+ * so that we don't race with the scheduler thread pushing
+ * jobs down the IP as we try to investigate what
+ * happened and give drivers a chance to recover.
+ *
+ * Second, take the fist job in the pending list
+ * (oldest), leave it in the pending list and call the
+ * driver's timer timeout callback to find out what
+ * happened, passing this job as the suspect one.
+ *
+ * The driver may return DRM_TASK_STATUS COMPLETE,
+ * which means the task is not in the IP(*) and we move
+ * it to the done list to free it.
+ *
+ * (*) A reason for this would be, say, that the job
+ * completed in due time, or the driver has aborted
+ * this job using driver specific methods in the
+ * timedout_job callback and has now removed it from
+ * the hardware.
+ *
+ * Or, the driver may return DRM_TASK_STATUS_ALIVE, to
+ * indicate that it had inquired about this job, and it
+ * has verified that this job is alive and well, and
+ * that the DRM layer should give this task more time
+ * to complete. In this case, we restart the timeout timer.
+ *
+ * Lastly, we unpark the scheduler thread.
+ */
  static void drm_sched_job_timedout(struct work_struct *work)
  {
struct drm_gpu_scheduler *sched;
@@ -316,37 +354,32 @@ static void drm_sched_job_timedout(struct work_struct 
*work)
  
  	sched = container_of(work, struct drm_gpu_scheduler, work_tdr.work);
  
-	/* Protects against concurrent deletion in drm_sched_get_cleanup_job */

+   kthread_park(sched->thread);
+
spin_lock(&sched->job_list_lock);
job = lis

Re: [PATCH 2/2] drm/ingenic: depend on COMMON_CLK to fix compile tests

[Krzysztof Kozlowski]

On Mon, Nov 16, 2020 at 07:54:03PM +, Paul Cercueil wrote:
> Hi Krzysztof,
> 
> Le lun. 16 nov. 2020 à 18:53, Krzysztof Kozlowski  a écrit
> :
> > The Ingenic DRM uses Common Clock Framework thus it cannot be built on
> > platforms without it (e.g. compile test on MIPS with RALINK and
> > SOC_RT305X):
> > 
> > /usr/bin/mips-linux-gnu-ld:
> > drivers/gpu/drm/ingenic/ingenic-drm-drv.o: in function
> > `ingenic_drm_bind.isra.0':
> > ingenic-drm-drv.c:(.text+0x1600): undefined reference to
> > `clk_get_parent'
> > /usr/bin/mips-linux-gnu-ld: ingenic-drm-drv.c:(.text+0x16b0):
> > undefined reference to `clk_get_parent'
> > 
> > Reported-by: kernel test robot 
> > Signed-off-by: Krzysztof Kozlowski 
> 
> Acked-by: Paul Cercueil 

Thanks for the ack.

David and Daniel,
I think there is no dedicated maintainer for Ingenic DRM, so can you
pick it up directly?

Best regards,
Krzysztof
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[PATCH v2 0/2] drm: panel: add support for the Khadas TS050 panel

[Neil Armstrong]

This add support & bindings for the Khadas TS050 1080x1920 5" LCD DSI panel 
designed
to work with the Khadas Edge-V, Captain, VIM3 and VIM3L Single Board Computers.
It provides a MIPI DSI interface to the host, a built-in LED backlight
and touch controller.

Changes since v1:
- removed drm_print include
- added reset_gpio to 1 after prepare failure
- now ignore regulator_disable() on prepare failure
- mark prepared=false whatever the result of the unprepare function errors
- also reset_gpio to 1 on unprepare
- do not return on mipi_dsi_dcs_enter_sleep_mode error on unprepare
- mark enabled=true unconditionnally
- use dev_err_probe in probe()

Neil Armstrong (2):
  dt-bindings: panel-simple-dsi: add Khadas TS050 panel bindings
  drm: panel: add Khadas TS050 panel driver

 .../display/panel/panel-simple-dsi.yaml   |   2 +
 drivers/gpu/drm/panel/Kconfig |  11 +
 drivers/gpu/drm/panel/Makefile|   1 +
 drivers/gpu/drm/panel/panel-khadas-ts050.c| 866 ++
 4 files changed, 880 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-khadas-ts050.c

-- 
2.25.1

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[PATCH v2 1/2] dt-bindings: panel-simple-dsi: add Khadas TS050 panel bindings

[Neil Armstrong]

This add the bindings for the Khadas TS050 1080x1920 5" LCD DSI panel designed 
to work
with the Khadas Edge-V, Captain, VIM3 and VIM3L Single Board Computers.

Signed-off-by: Neil Armstrong 
Reviewed-by: Sam Ravnborg 
---
 .../devicetree/bindings/display/panel/panel-simple-dsi.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git 
a/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml 
b/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml
index 72e4b6d4d5e1..fbd71669248f 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml
+++ b/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml
@@ -35,6 +35,8 @@ properties:
   - boe,tv080wum-nl0
 # Innolux P079ZCA 7.85" 768x1024 TFT LCD panel
   - innolux,p079zca
+# Khadas TS050 5" 1080x1920 LCD panel
+  - khadas,ts050
 # Kingdisplay KD097D04 9.7" 1536x2048 TFT LCD panel
   - kingdisplay,kd097d04
 # LG ACX467AKM-7 4.95" 1080×1920 LCD Panel
-- 
2.25.1

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[PATCH v2 2/2] drm: panel: add Khadas TS050 panel driver

[Neil Armstrong]

This add support for the Khadas TS050 1080x1920 5" LCD DSI panel designed to 
work
with the Khadas Edge-V, Captain, VIM3 and VIM3L Single Board Computers.
It provides a MIPI DSI interface to the host, a built-in LED backlight
and touch controller.

The init values was taken from the vendor source tree, comments were added to 
the
know values but most of the init table is undocumented.

Signed-off-by: Neil Armstrong 
---
 drivers/gpu/drm/panel/Kconfig  |  11 +
 drivers/gpu/drm/panel/Makefile |   1 +
 drivers/gpu/drm/panel/panel-khadas-ts050.c | 866 +
 3 files changed, 878 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-khadas-ts050.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index b4e021ea30f9..8fec45b2ce02 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -145,6 +145,17 @@ config DRM_PANEL_JDI_LT070ME05000
  The panel has a 1200(RGB)×1920 (WUXGA) resolution and uses
  24 bit per pixel.
 
+config DRM_PANEL_KHADAS_TS050
+   tristate "Khadas TS050 panel"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y here if you want to enable support for Khadas TS050 TFT-LCD
+ panel module. The panel has a 1080x1920 resolution and uses
+ 24 bit RGB per pixel. It provides a MIPI DSI interface to
+ the host, a built-in LED backlight and touch controller.
+
 config DRM_PANEL_KINGDISPLAY_KD097D04
tristate "Kingdisplay kd097d04 panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index ebbf488c7eac..03496695e03f 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += 
panel-ilitek-ili9322.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
 obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o
+obj-$(CONFIG_DRM_PANEL_KHADAS_TS050) += panel-khadas-ts050.o
 obj-$(CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04) += panel-kingdisplay-kd097d04.o
 obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W) += panel-leadtek-ltk050h3146w.o
 obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829) += panel-leadtek-ltk500hd1829.o
diff --git a/drivers/gpu/drm/panel/panel-khadas-ts050.c 
b/drivers/gpu/drm/panel/panel-khadas-ts050.c
new file mode 100644
index ..ced48a96ffce
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-khadas-ts050.c
@@ -0,0 +1,866 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 BayLibre, SAS
+ * Author: Neil Armstrong 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct khadas_ts050_panel {
+   struct drm_panel base;
+   struct mipi_dsi_device *link;
+
+   struct regulator *supply;
+   struct gpio_desc *reset_gpio;
+   struct gpio_desc *enable_gpio;
+
+   bool prepared;
+   bool enabled;
+};
+
+struct khadas_ts050_panel_cmd {
+   u8 cmd;
+   u8 data;
+};
+
+/* Only the CMD1 User Command set is documented */
+static const struct khadas_ts050_panel_cmd init_code[] = {
+   /* Select Unknown CMD Page (Undocumented) */
+   {0xff, 0xee},
+   /* Reload CMD1: Don't reload default value to register */
+   {0xfb, 0x01},
+   {0x1f, 0x45},
+   {0x24, 0x4f},
+   {0x38, 0xc8},
+   {0x39, 0x27},
+   {0x1e, 0x77},
+   {0x1d, 0x0f},
+   {0x7e, 0x71},
+   {0x7c, 0x03},
+   {0xff, 0x00},
+   {0xfb, 0x01},
+   {0x35, 0x01},
+   /* Select CMD2 Page0 (Undocumented) */
+   {0xff, 0x01},
+   /* Reload CMD1: Don't reload default value to register */
+   {0xfb, 0x01},
+   {0x00, 0x01},
+   {0x01, 0x55},
+   {0x02, 0x40},
+   {0x05, 0x40},
+   {0x06, 0x4a},
+   {0x07, 0x24},
+   {0x08, 0x0c},
+   {0x0b, 0x7d},
+   {0x0c, 0x7d},
+   {0x0e, 0xb0},
+   {0x0f, 0xae},
+   {0x11, 0x10},
+   {0x12, 0x10},
+   {0x13, 0x03},
+   {0x14, 0x4a},
+   {0x15, 0x12},
+   {0x16, 0x12},
+   {0x18, 0x00},
+   {0x19, 0x77},
+   {0x1a, 0x55},
+   {0x1b, 0x13},
+   {0x1c, 0x00},
+   {0x1d, 0x00},
+   {0x1e, 0x13},
+   {0x1f, 0x00},
+   {0x23, 0x00},
+   {0x24, 0x00},
+   {0x25, 0x00},
+   {0x26, 0x00},
+   {0x27, 0x00},
+   {0x28, 0x00},
+   {0x35, 0x00},
+   {0x66, 0x00},
+   {0x58, 0x82},
+   {0x59, 0x02},
+   {0x5a, 0x02},
+   {0x5b, 0x02},
+   {0x5c, 0x82},
+   {0x5d, 0x82},
+   {0x5e, 0x02},
+   {0x5f, 0x02},
+   {0x72, 0x31},
+   /* Select CMD2 Page4 (Undocumented) */
+   {0xff, 0x05},
+   /* Reload CMD1: Don't reload default value to register */
+   {0xfb, 0x01},
+   {0x00, 0x01},
+   {0x01, 0x0b},
+ 

Re: [PATCH v2 7/7] dma-buf: Write down some rules for vmap usage

[Thomas Zimmermann]

Hi

Am 03.12.20 um 21:41 schrieb Daniel Vetter:

On Thu, Dec 03, 2020 at 07:59:04PM +0100, Thomas Zimmermann wrote:

Hi

Am 03.12.20 um 16:26 schrieb Daniel Vetter:

On Thu, Dec 03, 2020 at 03:02:59PM +0100, Thomas Zimmermann wrote:

Dma-buf's vmap and vunmap callbacks are undocumented and various
exporters currently have slightly different semantics for them. Add
documentation on how to implement and use these interfaces correctly.

v2:
* document vmap semantics in struct dma_buf_ops
* add TODO item for reviewing and maybe fixing dma-buf exporters

Signed-off-by: Thomas Zimmermann 


I still don't think this works, we're breaking dma_buf_vmap for everyone
else here.


I removed the text on the importer. These notes for callers in the docs are
more or less a consequence of the exporter semantics.


Callers are importers, so I'm not seeing how that fixes anything.


I thought we at least agreed on the exporter semantics in the other thread,
didn't we?

What I'm trying to do is to write dome some rules for exporters, even if not
all exporters follow them.


This is a standard interface, everyone needs to follow the same rules. And
if they change, we need to make sure nothing breaks and we're not creating
issues.

In the past the rule was the dma_buf_vmap was allowed to take the
dma_resv_lock, and that the buffer should be pinned. Now some ttm drivers
didn't ever bother with the pinning, and mostly got away with that because
drm_prime helpers do the pinning by default at attach time, and most users
do call dma_buf_attach.

But if you look through dma-buf docs nothing ever said you have to do a
dummy attachment before you call dma_buf_vmap, that's just slightly crappy
implementations that didn't blow up yet.


I had a patch for adding pin to radeon's implementation of vmap. [1] 
Christian told me to not do this; instead just get the lock in the fbdev 
code. His advise almost seems the opposite of what you're telling me here.


For the GEM VRAM helpers, that implicit pin in vmap gave me headaches. 
Because scanouts can only be done from VRAM, which is badly suited for 
exporting. So I ended up with an implicit pin that pins the buffer to 
whatever domain it currently is. I got away with it because GEM VRAM BOs 
are not sharable among devices; fbdev is the only user of that 
functionality and only pins for short periods of time.


I suspect that fixing TTM-based drivers by adding an implicit pin would 
result in a similar situation. Whatever domain it ends up pinning, some 
functionality might not be compatible with that.





Given the circumstances, we should leave out this patch from the patchset.


So the defacto rules are already a big mess, but that's not a good excuse
to make it worse.

What I had in mind is that we split dma_buf_vmap up into two variants:

- The current one, which should guarantee that the buffer is pinned.
   Because that's what all current callers wanted, before the fbdev code
   started allowing non-pinned buffers.


Can we add an explicit pin operation to dma_buf_vmap() to enforce the 
semantics?


Best regards
Thomas

[1] https://patchwork.freedesktop.org/patch/400054/?series=83765&rev=1



- The new one, which allows vmapping with just dma_resv locked, and should
   have some caching in exporters.

Breaking code and then adding todos about that is kinda not so cool
approach here imo.

Also I guess ttm_bo_vmap should have a check that either the buffer is
pinned, or dma_resv_lock is held.

Cheers, Daniel





Best regards
Thomas




---
   Documentation/gpu/todo.rst | 15 +
   include/drm/drm_gem.h  |  4 
   include/linux/dma-buf.h| 45 ++
   3 files changed, 64 insertions(+)

diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst
index 009d8e6c7e3c..32bb797a84fc 100644
--- a/Documentation/gpu/todo.rst
+++ b/Documentation/gpu/todo.rst
@@ -505,6 +505,21 @@ Contact: Thomas Zimmermann , 
Christian König, Daniel Vette
   Level: Intermediate
+Enforce rules for dma-buf vmap and pin ops
+--
+
+Exporter implementations of vmap and pin in struct dma_buf_ops (and 
consequently
+struct drm_gem_object_funcs) use a variety of locking semantics. Some rely on
+the caller holding the dma-buf's reservation lock, some do their own locking,
+some don't require any locking. VRAM helpers even used to pin as part of vmap.
+
+We need to review each exporter and enforce the documented rules.
+
+Contact: Christian König, Daniel Vetter, Thomas Zimmermann 

+
+Level: Advanced
+
+
   Core refactorings
   =
diff --git a/include/drm/drm_gem.h b/include/drm/drm_gem.h
index 5e6daa1c982f..1864c6a721b1 100644
--- a/include/drm/drm_gem.h
+++ b/include/drm/drm_gem.h
@@ -138,6 +138,8 @@ struct drm_gem_object_funcs {
 * drm_gem_dmabuf_vmap() helper.
 *
 * This callback is optional.
+*
+* See also struct dma_buf_ops.vmap
 */
  

[PATCH v3 1/3] drm/mipi-dbi: Add support for Type B

[mdurnev]

From: Mikhail Durnev 

Intel 8080 type (Type B) parallel bus over GPIO.

The parallel bus is implemented partially. It supports only write
operations from the host to the display. Read operations would
require switching GPIO mode between input and output back and
forth. But this implementation is very simple, and GPIO mode can
be set for all used pins to output once at initialization.

It is enough to support only write operations to initialize displays
and output video data. The bus driver returns EOPNOTSUPP for all read
operations requested through a display driver.

Bit banging is used to transmit data over the parallel bus from host
to display. There are two numbers that contol timings: wr_up_delay
and wr_down_delay. They should be provided by the display driver.
The first number is related to the write control pulse duration, and
the second number is related to the write cycle duration that can
be found in the specification of the display.

Signed-off-by: Mikhail Durnev 
---
 drivers/gpu/drm/drm_mipi_dbi.c | 134 ++---
 include/drm/drm_mipi_dbi.h |  30 -
 2 files changed, 153 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/drm_mipi_dbi.c b/drivers/gpu/drm/drm_mipi_dbi.c
index 230c4fd..3edb041 100644
--- a/drivers/gpu/drm/drm_mipi_dbi.c
+++ b/drivers/gpu/drm/drm_mipi_dbi.c
@@ -61,7 +61,7 @@
  *3. 8-bit with the Data/Command signal as a separate D/CX pin
  *
  * Currently mipi_dbi only supports Type C options 1 and 3 with
- * mipi_dbi_spi_init().
+ * mipi_dbi_spi_init() and Type B with mipi_dbi_gpio_init().
  */
 
 #define MIPI_DBI_DEBUG_COMMAND(cmd, data, len) \
@@ -701,6 +701,15 @@ int mipi_dbi_poweron_conditional_reset(struct mipi_dbi_dev 
*dbidev)
 }
 EXPORT_SYMBOL(mipi_dbi_poweron_conditional_reset);
 
+static bool mipi_dbi_machine_little_endian(void)
+{
+#if defined(__LITTLE_ENDIAN)
+   return true;
+#else
+   return false;
+#endif
+}
+
 #if IS_ENABLED(CONFIG_SPI)
 
 /**
@@ -721,15 +730,6 @@ u32 mipi_dbi_spi_cmd_max_speed(struct spi_device *spi, 
size_t len)
 }
 EXPORT_SYMBOL(mipi_dbi_spi_cmd_max_speed);
 
-static bool mipi_dbi_machine_little_endian(void)
-{
-#if defined(__LITTLE_ENDIAN)
-   return true;
-#else
-   return false;
-#endif
-}
-
 /*
  * MIPI DBI Type C Option 1
  *
@@ -1158,6 +1158,120 @@ EXPORT_SYMBOL(mipi_dbi_spi_transfer);
 
 #endif /* CONFIG_SPI */
 
+/*
+ * This function implements data transfer only from host to display.
+ */
+static void mipi_dbi_gpio_transfer(struct mipi_dbi *dbi, u16 data)
+{
+   unsigned long ldata = data;
+
+   /*
+* Set W/R to low to start transfer.
+* Set DB bits with provided data when W/R is low.
+*/
+   gpiod_set_value_cansleep(dbi->wr, 0);
+   gpiod_set_array_value_cansleep(dbi->db->ndescs, dbi->db->desc,
+  dbi->db->info, &ldata);
+
+   /*
+* The bus usually needs additional delay.
+*/
+   ndelay(dbi->wr_up_delay);
+
+   /*
+* Set W/R to high to indicate that DB lines are set.
+*/
+   gpiod_set_value_cansleep(dbi->wr, 1);
+
+   /*
+* The connected display needs some time to read the data.
+*/
+   ndelay(dbi->wr_down_delay);
+}
+
+static int mipi_dbi_gpio_command(struct mipi_dbi *dbi, u8 *cmd,
+   u8 *par, size_t num)
+{
+   int i;
+
+   /*
+* Read commands are not currently supported.
+*/
+   if (mipi_dbi_command_is_read(dbi, *cmd))
+   return -EOPNOTSUPP;
+
+   MIPI_DBI_DEBUG_COMMAND(*cmd, par, num);
+
+   gpiod_set_value_cansleep(dbi->dc, 0);
+   mipi_dbi_gpio_transfer(dbi, (u16)*cmd);
+   gpiod_set_value_cansleep(dbi->dc, 1);
+
+   if (dbi->db->ndescs == 16 &&
+   (*cmd == MIPI_DCS_WRITE_MEMORY_START ||
+*cmd == MIPI_DCS_WRITE_MEMORY_CONTINUE)) {
+   /*
+* Only a couple of commands supports 16-bit transfer.
+*/
+   for (i = 0; i < num; i += 2) {
+   u16 data = *(u16 *)&par[i];
+
+   if (dbi->swap_bytes)
+   data = (data >> 8) | (data << 8);
+
+   mipi_dbi_gpio_transfer(dbi, data);
+   }
+   } else {
+   for (i = 0; i < num; i++) {
+   /*
+* Other commands ignore most significant bits.
+*/
+   mipi_dbi_gpio_transfer(dbi, (u16)par[i]);
+   }
+   }
+
+   return 0;
+}
+
+/**
+ * mipi_dbi_gpio_init - Initialize MIPI DBI Type B interface implemented via 
GPIO
+ * @dbi: MIPI DBI structure to initialize
+ * @dc: D/C gpio
+ * @wr: W/R gpio
+ * @db: DB gpios
+ * @wr_up_delay: Delay after setting DB and before changing W/R from low to 
high
+ * @wr_down_delay: Delay after changing W/R from low to high
+ *
+ * This function sets &mipi_dbi->command, enable

[PATCH v11 08/10] drm/tegra: dc: Extend debug stats with total number of events

[Dmitry Osipenko]

It's useful to know the total number of underflow events and currently
the debug stats are getting reset each time CRTC is being disabled. Let's
account the overall number of events that doesn't get a reset.

Tested-by: Peter Geis 
Tested-by: Nicolas Chauvet 
Signed-off-by: Dmitry Osipenko 
---
 drivers/gpu/drm/tegra/dc.c | 10 ++
 drivers/gpu/drm/tegra/dc.h |  5 +
 2 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 5c587cfd1bb2..b6676f1fe358 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -1539,6 +1539,11 @@ static int tegra_dc_show_stats(struct seq_file *s, void 
*data)
seq_printf(s, "underflow: %lu\n", dc->stats.underflow);
seq_printf(s, "overflow: %lu\n", dc->stats.overflow);
 
+   seq_printf(s, "frames total: %lu\n", dc->stats.frames_total);
+   seq_printf(s, "vblank total: %lu\n", dc->stats.vblank_total);
+   seq_printf(s, "underflow total: %lu\n", dc->stats.underflow_total);
+   seq_printf(s, "overflow total: %lu\n", dc->stats.overflow_total);
+
return 0;
 }
 
@@ -2310,6 +2315,7 @@ static irqreturn_t tegra_dc_irq(int irq, void *data)
/*
dev_dbg(dc->dev, "%s(): frame end\n", __func__);
*/
+   dc->stats.frames_total++;
dc->stats.frames++;
}
 
@@ -2318,6 +2324,7 @@ static irqreturn_t tegra_dc_irq(int irq, void *data)
dev_dbg(dc->dev, "%s(): vertical blank\n", __func__);
*/
drm_crtc_handle_vblank(&dc->base);
+   dc->stats.vblank_total++;
dc->stats.vblank++;
}
 
@@ -2325,6 +2332,7 @@ static irqreturn_t tegra_dc_irq(int irq, void *data)
/*
dev_dbg(dc->dev, "%s(): underflow\n", __func__);
*/
+   dc->stats.underflow_total++;
dc->stats.underflow++;
}
 
@@ -2332,11 +2340,13 @@ static irqreturn_t tegra_dc_irq(int irq, void *data)
/*
dev_dbg(dc->dev, "%s(): overflow\n", __func__);
*/
+   dc->stats.overflow_total++;
dc->stats.overflow++;
}
 
if (status & HEAD_UF_INT) {
dev_dbg_ratelimited(dc->dev, "%s(): head underflow\n", 
__func__);
+   dc->stats.underflow_total++;
dc->stats.underflow++;
}
 
diff --git a/drivers/gpu/drm/tegra/dc.h b/drivers/gpu/drm/tegra/dc.h
index 0d7bdf66a1ec..ba4ed35139fb 100644
--- a/drivers/gpu/drm/tegra/dc.h
+++ b/drivers/gpu/drm/tegra/dc.h
@@ -48,6 +48,11 @@ struct tegra_dc_stats {
unsigned long vblank;
unsigned long underflow;
unsigned long overflow;
+
+   unsigned long frames_total;
+   unsigned long vblank_total;
+   unsigned long underflow_total;
+   unsigned long overflow_total;
 };
 
 struct tegra_windowgroup_soc {
-- 
2.29.2

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[PATCH 0/8] drm/vc4: DSI improvements and BCM2711 support

[Maxime Ripard]

Hi,

Here's a series adding support for the DSI0 controller in the BCM2835 and the
DSI1 controller found in the BCM2711.

Let me know what you think,
Maxime

Dave Stevenson (5):
  drm/vc4: dsi: Correct DSI register definition
  drm/vc4: dsi: Add support for DSI0
  dt-bindings: Add compatible for BCM2711 DSI1
  drm/vc4: dsi: Add configuration for BCM2711 DSI1
  ARM: dts: bcm2711: Use compatible string for BCM2711 DSI1

Maxime Ripard (3):
  drm/vc4: drv: Remove the DSI pointer in vc4_drv
  drm/vc4: dsi: Use snprintf for the PHY clocks instead of an array
  drm/vc4: dsi: Introduce a variant structure

 .../bindings/display/brcm,bcm2835-dsi0.yaml   |   1 +
 arch/arm/boot/dts/bcm2711.dtsi|   1 +
 drivers/gpu/drm/vc4/vc4_drv.h |   1 -
 drivers/gpu/drm/vc4/vc4_dsi.c | 111 ++
 4 files changed, 67 insertions(+), 47 deletions(-)

-- 
2.28.0

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[PATCH] drm/nouveau/fb/gp102-: use flexible-array member instead of zero-length array

[Tian Tao]

fixed the coccicheck:
drivers/gpu/drm/nouveau/include/nvfw/hs.h:26:5-9: WARNING use
flexible-array member instead.

Signed-off-by: Tian Tao 
---
 drivers/gpu/drm/nouveau/include/nvfw/hs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/nouveau/include/nvfw/hs.h 
b/drivers/gpu/drm/nouveau/include/nvfw/hs.h
index 64d0d32..b53bbc4 100644
--- a/drivers/gpu/drm/nouveau/include/nvfw/hs.h
+++ b/drivers/gpu/drm/nouveau/include/nvfw/hs.h
@@ -23,7 +23,7 @@ struct nvfw_hs_load_header {
u32 data_dma_base;
u32 data_size;
u32 num_apps;
-   u32 apps[0];
+   u32 apps[];
 };
 
 const struct nvfw_hs_load_header *
-- 
2.7.4

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[PATCH] drm/fsl-dcu: remove redundant platform_get_irq error message

[Tian Tao]

Function dev_err() after platform_get_irq() is redundant because
platform_get_irq() already prints an error.

Signed-off-by: Tian Tao 
---
 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c 
b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
index 7528e8a..476b196 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
@@ -259,7 +259,6 @@ static int fsl_dcu_drm_probe(struct platform_device *pdev)
 
fsl_dev->irq = platform_get_irq(pdev, 0);
if (fsl_dev->irq < 0) {
-   dev_err(dev, "failed to get irq\n");
return fsl_dev->irq;
}
 
-- 
2.7.4

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[PATCH] drm/nouveau: Use vmemdup_user()

[Tian Tao]

Replace alloc and copy with vmemdup_user()

Signed-off-by: Tian Tao 
---
 drivers/gpu/drm/nouveau/nouveau_gem.c | 11 +++
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c 
b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 787d05e..df986d9 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -591,14 +591,9 @@ u_memcpya(uint64_t user, unsigned nmemb, unsigned size)
 
size *= nmemb;
 
-   mem = kvmalloc(size, GFP_KERNEL);
-   if (!mem)
-   return ERR_PTR(-ENOMEM);
-
-   if (copy_from_user(mem, userptr, size)) {
-   u_free(mem);
-   return ERR_PTR(-EFAULT);
-   }
+   mem = vmemdup_user(userptr, size);
+   if (IS_ERR(mem))
+   return ERR_CAST(mem);
 
return mem;
 }
-- 
2.7.4

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[PATCH v11 09/10] PM / devfreq: tegra30: Support interconnect and OPPs from device-tree

[Dmitry Osipenko]

This patch moves ACTMON driver away from generating OPP table by itself,
transitioning it to use the table which comes from device-tree. This
change breaks compatibility with older device-trees and brings support
for the interconnect framework to the driver. This is a mandatory change
which needs to be done in order to implement interconnect-based memory
DVFS, i.e. device-trees need to be updated. Now ACTMON issues a memory
bandwidth requests using dev_pm_opp_set_bw() instead of driving EMC clock
rate directly.

Tested-by: Peter Geis 
Tested-by: Nicolas Chauvet 
Acked-by: Chanwoo Choi 
Signed-off-by: Dmitry Osipenko 
---
 drivers/devfreq/tegra30-devfreq.c | 79 +++
 1 file changed, 37 insertions(+), 42 deletions(-)

diff --git a/drivers/devfreq/tegra30-devfreq.c 
b/drivers/devfreq/tegra30-devfreq.c
index 38cc0d014738..145ef91ae092 100644
--- a/drivers/devfreq/tegra30-devfreq.c
+++ b/drivers/devfreq/tegra30-devfreq.c
@@ -19,6 +19,8 @@
 #include 
 #include 
 
+#include 
+
 #include "governor.h"
 
 #define ACTMON_GLB_STATUS  0x0
@@ -155,6 +157,7 @@ struct tegra_devfreq_device {
 
 struct tegra_devfreq {
struct devfreq  *devfreq;
+   struct opp_table*opp_table;
 
struct reset_control*reset;
struct clk  *clock;
@@ -612,34 +615,19 @@ static void tegra_actmon_stop(struct tegra_devfreq *tegra)
 static int tegra_devfreq_target(struct device *dev, unsigned long *freq,
u32 flags)
 {
-   struct tegra_devfreq *tegra = dev_get_drvdata(dev);
-   struct devfreq *devfreq = tegra->devfreq;
struct dev_pm_opp *opp;
-   unsigned long rate;
-   int err;
+   int ret;
 
opp = devfreq_recommended_opp(dev, freq, flags);
if (IS_ERR(opp)) {
dev_err(dev, "Failed to find opp for %lu Hz\n", *freq);
return PTR_ERR(opp);
}
-   rate = dev_pm_opp_get_freq(opp);
-   dev_pm_opp_put(opp);
-
-   err = clk_set_min_rate(tegra->emc_clock, rate * KHZ);
-   if (err)
-   return err;
-
-   err = clk_set_rate(tegra->emc_clock, 0);
-   if (err)
-   goto restore_min_rate;
 
-   return 0;
-
-restore_min_rate:
-   clk_set_min_rate(tegra->emc_clock, devfreq->previous_freq);
+   ret = dev_pm_opp_set_bw(dev, opp);
+   dev_pm_opp_put(opp);
 
-   return err;
+   return ret;
 }
 
 static int tegra_devfreq_get_dev_status(struct device *dev,
@@ -655,7 +643,7 @@ static int tegra_devfreq_get_dev_status(struct device *dev,
stat->private_data = tegra;
 
/* The below are to be used by the other governors */
-   stat->current_frequency = cur_freq;
+   stat->current_frequency = cur_freq * KHZ;
 
actmon_dev = &tegra->devices[MCALL];
 
@@ -705,7 +693,12 @@ static int tegra_governor_get_target(struct devfreq 
*devfreq,
target_freq = max(target_freq, dev->target_freq);
}
 
-   *freq = target_freq;
+   /*
+* tegra-devfreq driver operates with KHz units, while OPP table
+* entries use Hz units. Hence we need to convert the units for the
+* devfreq core.
+*/
+   *freq = target_freq * KHZ;
 
return 0;
 }
@@ -774,6 +767,7 @@ static struct devfreq_governor tegra_devfreq_governor = {
 
 static int tegra_devfreq_probe(struct platform_device *pdev)
 {
+   u32 hw_version = BIT(tegra_sku_info.soc_speedo_id);
struct tegra_devfreq_device *dev;
struct tegra_devfreq *tegra;
struct devfreq *devfreq;
@@ -822,11 +816,25 @@ static int tegra_devfreq_probe(struct platform_device 
*pdev)
return err;
}
 
+   tegra->opp_table = dev_pm_opp_set_supported_hw(&pdev->dev,
+  &hw_version, 1);
+   err = PTR_ERR_OR_ZERO(tegra->opp_table);
+   if (err) {
+   dev_err(&pdev->dev, "Failed to set supported HW: %d\n", err);
+   return err;
+   }
+
+   err = dev_pm_opp_of_add_table(&pdev->dev);
+   if (err) {
+   dev_err(&pdev->dev, "Failed to add OPP table: %d\n", err);
+   goto put_hw;
+   }
+
err = clk_prepare_enable(tegra->clock);
if (err) {
dev_err(&pdev->dev,
"Failed to prepare and enable ACTMON clock\n");
-   return err;
+   goto remove_table;
}
 
err = reset_control_reset(tegra->reset);
@@ -850,23 +858,6 @@ static int tegra_devfreq_probe(struct platform_device 
*pdev)
dev->regs = tegra->regs + dev->config->offset;
}
 
-   for (rate = 0; rate <= tegra->max_freq * KHZ; rate++) {
-   rate = clk_round_rate(tegra->emc_clock, rate);
-
-   if (rate < 0) {
-   dev_err(&pdev->dev,
-   "Failed to round clock rate: %ld\n", rate);
- 

[PATCH] drm/tilcdc: Remove unnecessary THIS_MODULE

[Tian Tao]

As THIS_MODULE has been set in platform_driver_register(),
so remove it.

Signed-off-by: Tian Tao 
---
 drivers/gpu/drm/tilcdc/tilcdc_panel.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel.c 
b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
index 00efc30..4235780 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
@@ -399,7 +399,6 @@ static struct platform_driver panel_driver = {
.probe = panel_probe,
.remove = panel_remove,
.driver = {
-   .owner = THIS_MODULE,
.name = "tilcdc-panel",
.of_match_table = panel_of_match,
},
-- 
2.7.4

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[PATCH 6/8] dt-bindings: Add compatible for BCM2711 DSI1

[Maxime Ripard]

From: Dave Stevenson 

DSI1 on BCM2711 doesn't require the DMA workaround that is used
on BCM2835/6/7, therefore it needs a new compatible string.

Signed-off-by: Dave Stevenson 
Signed-off-by: Maxime Ripard 
---
 Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml 
b/Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml
index eb44e072b6e5..55c60919991f 100644
--- a/Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml
+++ b/Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml
@@ -18,6 +18,7 @@ properties:
 
   compatible:
 enum:
+  - brcm,bcm2711-dsi1
   - brcm,bcm2835-dsi0
   - brcm,bcm2835-dsi1
 
-- 
2.28.0

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Re: [PATCH v2 2/5] thermal: devfreq_cooling: get a copy of device status

[Daniel Lezcano]

On 18/11/2020 13:03, Lukasz Luba wrote:
> Devfreq cooling needs to now the correct status of the device in order
> to operate. Do not rely on Devfreq last_status which might be a stale data
> and get more up-to-date values of the load.
> 
> Devfreq framework can change the device status in the background. To
> mitigate this situation make a copy of the status structure and use it
> for internal calculations.
> 
> In addition this patch adds normalization function, which also makes sure
> that whatever data comes from the device, it is in a sane range.
> 
> Signed-off-by: Lukasz Luba 
> ---
>  drivers/thermal/devfreq_cooling.c | 52 +--
>  1 file changed, 43 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/thermal/devfreq_cooling.c 
> b/drivers/thermal/devfreq_cooling.c
> index 659c0143c9f0..925523694462 100644
> --- a/drivers/thermal/devfreq_cooling.c
> +++ b/drivers/thermal/devfreq_cooling.c
> @@ -227,20 +227,46 @@ static inline unsigned long get_total_power(struct 
> devfreq_cooling_device *dfc,
>  voltage);
>  }
>  
> +static void _normalize_load(struct devfreq_dev_status *status)
> +{
> + /* Make some space if needed */
> + if (status->busy_time > 0x) {
> + status->busy_time >>= 10;
> + status->total_time >>= 10;
> + }
> +
> + if (status->busy_time > status->total_time)
> + status->busy_time = status->total_time;

How the condition above is possible?

> + status->busy_time *= 100;
> + status->busy_time /= status->total_time ? : 1;
> +
> + /* Avoid division by 0 */
> + status->busy_time = status->busy_time ? : 1;
> + status->total_time = 100;

Why not base the normalization on 1024? and use an intermediate u64.

For example:

static u32 _normalize_load(struct devfreq_dev_status *status)
{
u64 load = 0;

/* Prevent divison by zero */
if (!status->busy_time)
return 0;

/*
 * Assuming status->total_time is always greater or equal
 * to status->busy_time, it can not be equal to zero because
 * of the test above
 */
load = status->busy_time * 1024;
load /= status->total_time;

/*
 * load is always [1..1024[, so it can not be truncated by a
 * u64 -> u32 coercive cast
 */
return (u32)load;
}


> +}
>  
>  static int devfreq_cooling_get_requested_power(struct thermal_cooling_device 
> *cdev,
>  u32 *power)
>  {
>   struct devfreq_cooling_device *dfc = cdev->devdata;
>   struct devfreq *df = dfc->devfreq;
> - struct devfreq_dev_status *status = &df->last_status;
> + struct devfreq_dev_status status;
>   unsigned long state;
> - unsigned long freq = status->current_frequency;
> + unsigned long freq;
>   unsigned long voltage;
>   u32 dyn_power = 0;
>   u32 static_power = 0;
>   int res;
>  
> + mutex_lock(&df->lock);
> + res = df->profile->get_dev_status(df->dev.parent, &status);
> + mutex_unlock(&df->lock);
> + if (res)
> + return res;
> +
> + freq = status.current_frequency;
> +
>   state = freq_get_state(dfc, freq);
>   if (state == THERMAL_CSTATE_INVALID) {
>   res = -EAGAIN;
> @@ -268,16 +294,18 @@ static int devfreq_cooling_get_requested_power(struct 
> thermal_cooling_device *cd
>   } else {
>   dyn_power = dfc->power_table[state];
>  
> + _normalize_load(&status);

load = _normalize_load(&status);

> +
>   /* Scale dynamic power for utilization */
> - dyn_power *= status->busy_time;
> - dyn_power /= status->total_time;
> + dyn_power *= status.busy_time;
> + dyn_power /= status.total_time;

/*
 * May be change dyn_power to a u64 to prevent overflow
 * when multiplied by 'load'
 */
dyn_power = (dyn_power * load) / 1024;

>   /* Get static power */
>   static_power = get_static_power(dfc, freq);
>  
>   *power = dyn_power + static_power;
>   }
>  
> - trace_thermal_power_devfreq_get_power(cdev, status, freq, *power);
> + trace_thermal_power_devfreq_get_power(cdev, &status, freq, *power);
>  
>   return 0;
>  fail:
> @@ -309,14 +337,20 @@ static int devfreq_cooling_power2state(struct 
> thermal_cooling_device *cdev,
>  {
>   struct devfreq_cooling_device *dfc = cdev->devdata;
>   struct devfreq *df = dfc->devfreq;
> - struct devfreq_dev_status *status = &df->last_status;
> - unsigned long freq = status->current_frequency;
> + struct devfreq_dev_status status;
>   unsigned long busy_time;
> + unsigned long freq;
>   s32 dyn_power;
>   u32 static_power;
>   s32 est_power;
>   int i;
>  
> + mut

[PATCH v3 0/3] drm/mipi-dbi: Type B bus support, drm/tiny: MRB2801

[mdurnev]

From: Mikhail Durnev 

Hi All,

This patch series is aiming at extending the mipi-dbi bus driver
to support Intel 8080 type parallel bus (Type B) over GPIO and
adding a new driver for ILI9341 display panels with 8- or 16-bit
parallel interface.

It was tested with the MRB2801 display module [1] that had
a connector compatible with the ALIENTEK STM32 development board.
The module was connected to Raspberry Pi 3 via GPIO pins.

The parallel bus is implemented partially. It supports only write
operations from the host to the display. Read operations would
require switching GPIO mode between input and output back and
forth. But this implementation is very simple, and GPIO mode can
be set for all used pins to output once at initialization.
The RD pin of the display has to always receive the logic high
signal to make sure the data bus pins from the dislay side are
always in the high impedance state. Otherwise the display module
as well as the GPIO controller of the host can be damaged.
To be on the safe side I recommend using protective resistors
for all GPIO pins conneced to DB pins of the display. Resistors
of 10 kOhms are just fine for RPi 3. The WR and DC pins may not
work well with 10K resistors. Although there is no need to protect
them, you can try using 1K resistors if you want.

Bit banging is used to transmit data over the parallel bus from
host to display. There are two numbers that contol timings. They
should be defined in the device tree via the wr-up-down-delays
property. The first number is related to the write control pulse
duration, and the second number is related to the write cycle
duration. For ILI9341, the write pulse cannot be shorter than 15 ns,
and the write duration cannot be shorter than 66 ns. Delays of
10 and 51 ns respectively allow to meet the specifications on
RPi 3. Faster machines may need values closer to 15 and 66.

[1] http://www.lcdwiki.com/2.8inch_16BIT_Module_ILI9341_SKU:MRB2801

Signed-off-by: Mikhail Durnev 

v2 -> v3:
- Fixed build errors reported by the kernel test robot

v1 -> v2:
- Moved the definition of mipi_dbi_machine_little_endian()
  out of the "#if IS_ENABLED(CONFIG_SPI)" clause. That static
  function is used in mipi_dbi_gpio_init which does not need
  CONFIG_SPI enabled

v0 -> v1:
- Rebased on v5.10-rc6
- Replaced "dbi->spi = 0;" with "dbi->spi = NULL;" in
  mipi_dbi_gpio_init

v0:
- Based on branch rpi-5.10.y
- Tested on Raspberry Pi 3 Model B V 1.2

Mikhail Durnev (3):
  drm/mipi-dbi: Add support for Type B
  drm/tiny: Add driver for ili9341 with parallel bus
  dt-bindings: panel: Add bindings for MRB2801

 .../devicetree/bindings/display/ronbo,mrb2801.txt  |  42 +++
 drivers/gpu/drm/drm_mipi_dbi.c | 134 +-
 drivers/gpu/drm/tiny/Kconfig   |  13 +
 drivers/gpu/drm/tiny/Makefile  |   1 +
 drivers/gpu/drm/tiny/ili9341_gpio.c| 284 +
 include/drm/drm_mipi_dbi.h |  30 ++-
 6 files changed, 493 insertions(+), 11 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/display/ronbo,mrb2801.txt
 create mode 100644 drivers/gpu/drm/tiny/ili9341_gpio.c

-- 
2.7.4

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[PATCH 1/1] dt-bindings: eliminate yamllint warnings

[Zhen Lei]

All warnings are related only to "wrong indentation", except one:
Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml:4:1: \
[error] missing document start "---" (document-start)

Signed-off-by: Zhen Lei 
Cc: Rob Herring 
Cc: Michael Turquette 
Cc: Stephen Boyd 
Cc: Shawn Guo 
Cc: Sascha Hauer 
Cc: Pengutronix Kernel Team 
Cc: Fabio Estevam 
Cc: NXP Linux Team 
Cc: David Airlie 
Cc: Daniel Vetter 
Cc: Sumit Semwal 
Cc: Thierry Reding 
Cc: Sam Ravnborg 
Cc: Hans Verkuil 
Cc: Mauro Carvalho Chehab 
Cc: Sakari Ailus 
Cc: Ricardo Ribalda 
Cc: Ulf Hansson 
Cc: Matthias Brugger 
Cc: Liam Girdwood 
Cc: Mark Brown 
---
 .../devicetree/bindings/clock/imx8qxp-lpcg.yaml| 20 -
 .../bindings/display/bridge/analogix,anx7625.yaml  |  4 ++--
 .../bindings/display/bridge/intel,keembay-dsi.yaml |  4 ++--
 .../bindings/display/intel,keembay-msscam.yaml |  4 ++--
 .../bindings/display/panel/novatek,nt36672a.yaml   |  2 +-
 .../devicetree/bindings/media/i2c/adv7604.yaml |  4 ++--
 .../devicetree/bindings/media/i2c/mipi-ccs.yaml| 11 -
 .../devicetree/bindings/media/i2c/ovti,ov772x.yaml | 12 +-
 .../devicetree/bindings/media/i2c/sony,imx214.yaml | 12 +-
 Documentation/devicetree/bindings/mmc/mtk-sd.yaml  | 26 +++---
 .../sound/mt8192-mt6359-rt1015-rt5682.yaml |  4 ++--
 11 files changed, 52 insertions(+), 51 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml 
b/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml
index e709e530e17a27a..940486ef1051d10 100644
--- a/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml
+++ b/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml
@@ -29,18 +29,18 @@ properties:
   - const: fsl,imx8qxp-lpcg
   - items:
   - enum:
-- fsl,imx8qm-lpcg
+  - fsl,imx8qm-lpcg
   - const: fsl,imx8qxp-lpcg
   - enum:
-- fsl,imx8qxp-lpcg-adma
-- fsl,imx8qxp-lpcg-conn
-- fsl,imx8qxp-lpcg-dc
-- fsl,imx8qxp-lpcg-dsp
-- fsl,imx8qxp-lpcg-gpu
-- fsl,imx8qxp-lpcg-hsio
-- fsl,imx8qxp-lpcg-img
-- fsl,imx8qxp-lpcg-lsio
-- fsl,imx8qxp-lpcg-vpu
+  - fsl,imx8qxp-lpcg-adma
+  - fsl,imx8qxp-lpcg-conn
+  - fsl,imx8qxp-lpcg-dc
+  - fsl,imx8qxp-lpcg-dsp
+  - fsl,imx8qxp-lpcg-gpu
+  - fsl,imx8qxp-lpcg-hsio
+  - fsl,imx8qxp-lpcg-img
+  - fsl,imx8qxp-lpcg-lsio
+  - fsl,imx8qxp-lpcg-vpu
 deprecated: true
   reg:
 maxItems: 1
diff --git 
a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml 
b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
index 60585a4fc22bc9f..9392b5502a3293c 100644
--- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
@@ -49,8 +49,8 @@ properties:
   Video port for panel or connector.
 
 required:
-- port@0
-- port@1
+  - port@0
+  - port@1
 
 required:
   - compatible
diff --git 
a/Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml 
b/Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml
index ab5be26252240ea..35c9dfd866501a0 100644
--- a/Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml
@@ -39,10 +39,10 @@ properties:
 
 properties:
   '#address-cells':
-   const: 1
+const: 1
 
   '#size-cells':
-   const: 0
+const: 0
 
   port@0:
 type: object
diff --git 
a/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml 
b/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml
index 40caa61188098c2..a222b52d8b8ff6b 100644
--- a/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml
+++ b/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml
@@ -18,8 +18,8 @@ description: |
 properties:
   compatible:
 items:
- - const: intel,keembay-msscam
- - const: syscon
+  - const: intel,keembay-msscam
+  - const: syscon
 
   reg:
 maxItems: 1
diff --git 
a/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml 
b/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
index d2170de6b72302f..2f5df1d235aea8a 100644
--- a/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
+++ b/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
@@ -22,7 +22,7 @@ properties:
   compatible:
 items:
   - enum:
- - tianma,fhd-video
+  - tianma,fhd-video
   - const: novatek,nt36672a
 description: This indicates the panel manufacturer of the panel that is
   in turn using the NT36672A panel driver. This compatible string
diff --git a/Documentation/devicetree/bindings/media/i2c/adv7604.y

[PATCH v2] drm/hisilicon: Delete the entire file hibmc_ttm.c

[Tian Tao]

Delete the entire file hibmc_ttm.c. drmm_vram_helper_init() can be
called directly from hibmc_load(). hibmc_dumb_create() and
hibmc_mode_funcs can go to hibmc_drm_drv.c

v2:
change Deletted to Delete

Signed-off-by: Tian Tao 
Reviewed-by: Thomas Zimmermann 
---
 drivers/gpu/drm/hisilicon/hibmc/Makefile|  2 +-
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 21 ++-
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h |  4 --
 drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c | 50 -
 4 files changed, 20 insertions(+), 57 deletions(-)
 delete mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c

diff --git a/drivers/gpu/drm/hisilicon/hibmc/Makefile 
b/drivers/gpu/drm/hisilicon/hibmc/Makefile
index 684ef79..d25c75e 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/Makefile
+++ b/drivers/gpu/drm/hisilicon/hibmc/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0-only
-hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_de.o hibmc_drm_vdac.o hibmc_ttm.o 
hibmc_drm_i2c.o
+hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_de.o hibmc_drm_vdac.o hibmc_drm_i2c.o
 
 obj-$(CONFIG_DRM_HISI_HIBMC) += hibmc-drm.o
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
index 5aea2e9..3687753 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
@@ -16,6 +16,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -43,6 +44,12 @@ static irqreturn_t hibmc_drm_interrupt(int irq, void *arg)
return IRQ_HANDLED;
 }
 
+static int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev,
+struct drm_mode_create_dumb *args)
+{
+   return drm_gem_vram_fill_create_dumb(file, dev, 0, 128, args);
+}
+
 static const struct drm_driver hibmc_driver = {
.driver_features= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
.fops   = &hibmc_fops,
@@ -77,6 +84,13 @@ static const struct dev_pm_ops hibmc_pm_ops = {
hibmc_pm_resume)
 };
 
+static const struct drm_mode_config_funcs hibmc_mode_funcs = {
+   .mode_valid = drm_vram_helper_mode_valid,
+   .atomic_check = drm_atomic_helper_check,
+   .atomic_commit = drm_atomic_helper_commit,
+   .fb_create = drm_gem_fb_create,
+};
+
 static int hibmc_kms_init(struct hibmc_drm_private *priv)
 {
struct drm_device *dev = &priv->dev;
@@ -262,9 +276,12 @@ static int hibmc_load(struct drm_device *dev)
if (ret)
goto err;
 
-   ret = hibmc_mm_init(priv);
-   if (ret)
+   ret = drmm_vram_helper_init(dev, pci_resource_start(dev->pdev, 0),
+   priv->fb_size);
+   if (ret) {
+   drm_err(dev, "Error initializing VRAM MM; %d\n", ret);
goto err;
+   }
 
ret = hibmc_kms_init(priv);
if (ret)
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
index 2786de5..a49c10e 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
@@ -64,10 +64,6 @@ int hibmc_de_init(struct hibmc_drm_private *priv);
 int hibmc_vdac_init(struct hibmc_drm_private *priv);
 
 int hibmc_mm_init(struct hibmc_drm_private *hibmc);
-int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev,
- struct drm_mode_create_dumb *args);
 int hibmc_ddc_create(struct drm_device *drm_dev, struct hibmc_connector 
*connector);
 
-extern const struct drm_mode_config_funcs hibmc_mode_funcs;
-
 #endif
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
deleted file mode 100644
index 892d566..000
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
+++ /dev/null
@@ -1,50 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/* Hisilicon Hibmc SoC drm driver
- *
- * Based on the bochs drm driver.
- *
- * Copyright (c) 2016 Huawei Limited.
- *
- * Author:
- * Rongrong Zou 
- * Rongrong Zou 
- * Jianhua Li 
- */
-
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include "hibmc_drm_drv.h"
-
-int hibmc_mm_init(struct hibmc_drm_private *hibmc)
-{
-   int ret;
-   struct drm_device *dev = &hibmc->dev;
-
-   ret = drmm_vram_helper_init(dev, pci_resource_start(dev->pdev, 0),
-   hibmc->fb_size);
-   if (ret) {
-   drm_err(dev, "Error initializing VRAM MM; %d\n", ret);
-   return ret;
-   }
-
-   return 0;
-}
-
-int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev,
- struct drm_mode_create_dumb *args)
-{
-   return drm_gem_vram_fill_create_dumb(file, dev, 0, 128, args);
-}
-
-const struct drm_mode_config_funcs hibmc_mode_funcs = {
-   .mode_valid = drm_vram_helper_mode_valid,
-   .atomic_check = drm_atomic_helper_ch

[PATCH 7/8] drm/vc4: dsi: Add configuration for BCM2711 DSI1

[Maxime Ripard]

From: Dave Stevenson 

BCM2711 DSI1 doesn't have the issue with the ARM not being
able to write to the registers, therefore remove the DMA
workaround for that compatible string.

Signed-off-by: Dave Stevenson 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/vc4/vc4_dsi.c | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c
index 82162900e351..a55256ed0955 100644
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
@@ -1324,6 +1324,13 @@ static const struct drm_encoder_helper_funcs 
vc4_dsi_encoder_helper_funcs = {
.mode_fixup = vc4_dsi_encoder_mode_fixup,
 };
 
+static const struct vc4_dsi_variant bcm2711_dsi1_variant = {
+   .port   = 1,
+   .debugfs_name   = "dsi1_regs",
+   .regs   = dsi1_regs,
+   .nregs  = ARRAY_SIZE(dsi1_regs),
+};
+
 static const struct vc4_dsi_variant bcm2835_dsi0_variant = {
.port   = 0,
.debugfs_name   = "dsi0_regs",
@@ -1340,6 +1347,7 @@ static const struct vc4_dsi_variant bcm2835_dsi1_variant 
= {
 };
 
 static const struct of_device_id vc4_dsi_dt_match[] = {
+   { .compatible = "brcm,bcm2711-dsi1", &bcm2711_dsi1_variant },
{ .compatible = "brcm,bcm2835-dsi0", &bcm2835_dsi0_variant },
{ .compatible = "brcm,bcm2835-dsi1", &bcm2835_dsi1_variant },
{}
@@ -1524,8 +1532,8 @@ static int vc4_dsi_bind(struct device *dev, struct device 
*master, void *data)
return -ENODEV;
}
 
-   /* DSI1 has a broken AXI slave that doesn't respond to writes
-* from the ARM.  It does handle writes from the DMA engine,
+   /* DSI1 on BCM2835/6/7 has a broken AXI slave that doesn't respond to
+* writes from the ARM.  It does handle writes from the DMA engine,
 * so set up a channel for talking to it.
 */
if (dsi->variant->broken_axi_workaround) {
-- 
2.28.0

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[PATCH 8/8] ARM: dts: bcm2711: Use compatible string for BCM2711 DSI1

[Maxime Ripard]

From: Dave Stevenson 

Updates the compatible string for DSI1 on BCM2711 to
differentiate it from BCM2835.

Signed-off-by: Dave Stevenson 
Signed-off-by: Maxime Ripard 
---
 arch/arm/boot/dts/bcm2711.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
index 4847dd305317..f53a51cc91f0 100644
--- a/arch/arm/boot/dts/bcm2711.dtsi
+++ b/arch/arm/boot/dts/bcm2711.dtsi
@@ -540,6 +540,7 @@ &dsi0 {
 
 &dsi1 {
interrupts = ;
+   compatible = "brcm,bcm2711-dsi1";
 };
 
 &gpio {
-- 
2.28.0

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[PATCH] drm/msm/dsi: Replace spin_lock_irqsave by spin_lock in hard IRQ

[Tian Tao]

It is redundant to do irqsave and irqrestore in hardIRQ context.

Signed-off-by: Tian Tao 
---
 drivers/gpu/drm/msm/dsi/dsi_host.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c 
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index b17ac6c..b2fb5c3 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -1555,15 +1555,14 @@ static irqreturn_t dsi_host_irq(int irq, void *ptr)
 {
struct msm_dsi_host *msm_host = ptr;
u32 isr;
-   unsigned long flags;
 
if (!msm_host->ctrl_base)
return IRQ_HANDLED;
 
-   spin_lock_irqsave(&msm_host->intr_lock, flags);
+   spin_lock(&msm_host->intr_lock);
isr = dsi_read(msm_host, REG_DSI_INTR_CTRL);
dsi_write(msm_host, REG_DSI_INTR_CTRL, isr);
-   spin_unlock_irqrestore(&msm_host->intr_lock, flags);
+   spin_unlock(&msm_host->intr_lock);
 
DBG("isr=0x%x, id=%d", isr, msm_host->id);
 
-- 
2.7.4

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[PATCH v11 07/10] drm/tegra: dc: Support memory bandwidth management

[Dmitry Osipenko]

Display controller (DC) performs isochronous memory transfers, and thus,
has a requirement for a minimum memory bandwidth that shall be fulfilled,
otherwise framebuffer data can't be fetched fast enough and this results
in a DC's data-FIFO underflow that follows by a visual corruption.

The Memory Controller drivers provide facility for memory bandwidth
management via interconnect API. Let's wire up the interconnect API
support to the DC driver in order to fix the distorted display output
on T30 Ouya, T124 TK1 and other Tegra devices.

Tested-by: Peter Geis 
Tested-by: Nicolas Chauvet 
Signed-off-by: Dmitry Osipenko 
---
 drivers/gpu/drm/tegra/Kconfig |   1 +
 drivers/gpu/drm/tegra/dc.c| 349 ++
 drivers/gpu/drm/tegra/dc.h|  14 ++
 drivers/gpu/drm/tegra/drm.c   |  14 ++
 drivers/gpu/drm/tegra/hub.c   |   3 +
 drivers/gpu/drm/tegra/plane.c | 121 
 drivers/gpu/drm/tegra/plane.h |  15 ++
 7 files changed, 517 insertions(+)

diff --git a/drivers/gpu/drm/tegra/Kconfig b/drivers/gpu/drm/tegra/Kconfig
index 5043dcaf1cf9..1650a448eabd 100644
--- a/drivers/gpu/drm/tegra/Kconfig
+++ b/drivers/gpu/drm/tegra/Kconfig
@@ -9,6 +9,7 @@ config DRM_TEGRA
select DRM_MIPI_DSI
select DRM_PANEL
select TEGRA_HOST1X
+   select INTERCONNECT
select IOMMU_IOVA
select CEC_CORE if CEC_NOTIFIER
help
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 85dd7131553a..5c587cfd1bb2 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -616,6 +617,9 @@ static int tegra_plane_atomic_check(struct drm_plane *plane,
struct tegra_dc *dc = to_tegra_dc(state->crtc);
int err;
 
+   plane_state->peak_memory_bandwidth = 0;
+   plane_state->avg_memory_bandwidth = 0;
+
/* no need for further checks if the plane is being disabled */
if (!state->crtc)
return 0;
@@ -802,6 +806,12 @@ static struct drm_plane *tegra_primary_plane_create(struct 
drm_device *drm,
formats = dc->soc->primary_formats;
modifiers = dc->soc->modifiers;
 
+   err = tegra_plane_interconnect_init(plane);
+   if (err) {
+   kfree(plane);
+   return ERR_PTR(err);
+   }
+
err = drm_universal_plane_init(drm, &plane->base, possible_crtcs,
   &tegra_plane_funcs, formats,
   num_formats, modifiers, type, NULL);
@@ -833,9 +843,13 @@ static const u32 tegra_cursor_plane_formats[] = {
 static int tegra_cursor_atomic_check(struct drm_plane *plane,
 struct drm_plane_state *state)
 {
+   struct tegra_plane_state *plane_state = to_tegra_plane_state(state);
struct tegra_plane *tegra = to_tegra_plane(plane);
int err;
 
+   plane_state->peak_memory_bandwidth = 0;
+   plane_state->avg_memory_bandwidth = 0;
+
/* no need for further checks if the plane is being disabled */
if (!state->crtc)
return 0;
@@ -973,6 +987,12 @@ static struct drm_plane 
*tegra_dc_cursor_plane_create(struct drm_device *drm,
num_formats = ARRAY_SIZE(tegra_cursor_plane_formats);
formats = tegra_cursor_plane_formats;
 
+   err = tegra_plane_interconnect_init(plane);
+   if (err) {
+   kfree(plane);
+   return ERR_PTR(err);
+   }
+
err = drm_universal_plane_init(drm, &plane->base, possible_crtcs,
   &tegra_plane_funcs, formats,
   num_formats, NULL,
@@ -1087,6 +1107,12 @@ static struct drm_plane 
*tegra_dc_overlay_plane_create(struct drm_device *drm,
num_formats = dc->soc->num_overlay_formats;
formats = dc->soc->overlay_formats;
 
+   err = tegra_plane_interconnect_init(plane);
+   if (err) {
+   kfree(plane);
+   return ERR_PTR(err);
+   }
+
if (!cursor)
type = DRM_PLANE_TYPE_OVERLAY;
else
@@ -1204,6 +1230,7 @@ tegra_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
 {
struct tegra_dc_state *state = to_dc_state(crtc->state);
struct tegra_dc_state *copy;
+   unsigned int i;
 
copy = kmalloc(sizeof(*copy), GFP_KERNEL);
if (!copy)
@@ -1215,6 +1242,9 @@ tegra_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
copy->div = state->div;
copy->planes = state->planes;
 
+   for (i = 0; i < ARRAY_SIZE(state->plane_peak_bw); i++)
+   copy->plane_peak_bw[i] = state->plane_peak_bw[i];
+
return ©->base;
 }
 
@@ -1741,6 +1771,106 @@ static int tegra_dc_wait_idle(struct tegra_dc *dc, 
unsigned long timeout)
return -ETIMEDOUT;
 }
 
+static void
+tegra_crtc_update_memory_bandwidth(struct drm_crtc *crtc,
+  struct

Re: [PATCH] drm/fb-helper: Add missed unlocks in setcmap_legacy()

[Peter Rosin]

Hi!

On 2020-12-03 15:42, Chuhong Yuan wrote:
> setcmap_legacy() does not call drm_modeset_unlock_all() in some exits,
> add the missed unlocks with goto to fix it.
> 
> Fixes: 964c60063bff ("drm/fb-helper: separate the fb_setcmap helper into 
> atomic and legacy paths")
> Signed-off-by: Chuhong Yuan 

Yup, my patch fumbled the locking. Sorry, and thanks for cleaning up my mess!

Acked-by: Peter Rosin 

(Spelled that as Ached-by at first, what does that mean??)

Cheers,
Peter

> ---
>  drivers/gpu/drm/drm_fb_helper.c | 15 ++-
>  1 file changed, 10 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
> index 1543d9d10970..8033467db4be 100644
> --- a/drivers/gpu/drm/drm_fb_helper.c
> +++ b/drivers/gpu/drm/drm_fb_helper.c
> @@ -923,11 +923,15 @@ static int setcmap_legacy(struct fb_cmap *cmap, struct 
> fb_info *info)
>   drm_modeset_lock_all(fb_helper->dev);
>   drm_client_for_each_modeset(modeset, &fb_helper->client) {
>   crtc = modeset->crtc;
> - if (!crtc->funcs->gamma_set || !crtc->gamma_size)
> - return -EINVAL;
> + if (!crtc->funcs->gamma_set || !crtc->gamma_size) {
> + ret = -EINVAL;
> + goto out;
> + }
>  
> - if (cmap->start + cmap->len > crtc->gamma_size)
> - return -EINVAL;
> + if (cmap->start + cmap->len > crtc->gamma_size) {
> + ret = -EINVAL;
> + goto out;
> + }
>  
>   r = crtc->gamma_store;
>   g = r + crtc->gamma_size;
> @@ -940,8 +944,9 @@ static int setcmap_legacy(struct fb_cmap *cmap, struct 
> fb_info *info)
>   ret = crtc->funcs->gamma_set(crtc, r, g, b,
>crtc->gamma_size, NULL);
>   if (ret)
> - return ret;
> + goto out;
>   }
> +out:
>   drm_modeset_unlock_all(fb_helper->dev);
>  
>   return ret;
> 
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[PULL] drm-misc-fixes

[Maxime Ripard]

Hi Daniel, Dave,

Here's this week round of fixes for drm-misc

Thanks!
Maxime

drm-misc-fixes-2020-12-03:
One bridge fix for OMAP, one for a race condition in a panel, two for
uninitialized variables in rockchip and nouveau, and two fixes for mxsfb
to fix a regression with modifiers and a fix for a fence synchronization
issue.
The following changes since commit 2be65641642ef423f82162c3a5f28c754d1637d2:

  drm/nouveau: fix relocations applying logic and a double-free (2020-11-26 
08:04:19 +0100)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-fixes-2020-12-03

for you to fetch changes up to fd4e788e971ce763e50762d7b1a0048992949dd0:

  drm/omap: sdi: fix bridge enable/disable (2020-11-30 11:27:57 +0200)


One bridge fix for OMAP, one for a race condition in a panel, two for
uninitialized variables in rockchip and nouveau, and two fixes for mxsfb
to fix a regression with modifiers and a fix for a fence synchronization
issue.


Christian König (1):
  drm/nouveau: make sure ret is initialized in nouveau_ttm_io_mem_reserve

Daniel Abrecht (1):
  drm: mxsfb: Implement .format_mod_supported

Lucas Stach (1):
  drm: mxsfb: fix fence synchronization

Paul Kocialkowski (1):
  drm/rockchip: Avoid uninitialized use of endpoint id in LVDS

Sebastian Reichel (1):
  drm/panel: sony-acx565akm: Fix race condition in probe

Tomi Valkeinen (1):
  drm/omap: sdi: fix bridge enable/disable

 drivers/gpu/drm/mxsfb/mxsfb_kms.c| 11 +++
 drivers/gpu/drm/nouveau/nouveau_bo.c |  2 +-
 drivers/gpu/drm/omapdrm/dss/sdi.c| 10 --
 drivers/gpu/drm/panel/panel-sony-acx565akm.c |  2 +-
 drivers/gpu/drm/rockchip/rockchip_lvds.c |  2 +-
 5 files changed, 18 insertions(+), 9 deletions(-)


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[PATCH v3 2/3] drm: bridge: cdns-mhdp8546: Remove setting of bus format using connector info

[Yuti Amonkar]

As we are using bus negotiations for selecting bus format
remove the setting of bus format using the connector info
structure.

Signed-off-by: Yuti Amonkar 
---
 drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c | 6 --
 1 file changed, 6 deletions(-)

diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c 
b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
index 5ef6adb8bc82..d9f7eb8249e8 100644
--- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
@@ -1648,7 +1648,6 @@ static const struct drm_connector_funcs 
cdns_mhdp_conn_funcs = {
 
 static int cdns_mhdp_connector_init(struct cdns_mhdp_device *mhdp)
 {
-   u32 bus_format = MEDIA_BUS_FMT_RGB121212_1X36;
struct drm_connector *conn = &mhdp->connector;
struct drm_bridge *bridge = &mhdp->bridge;
int ret;
@@ -1669,11 +1668,6 @@ static int cdns_mhdp_connector_init(struct 
cdns_mhdp_device *mhdp)
 
drm_connector_helper_add(conn, &cdns_mhdp_conn_helper_funcs);
 
-   ret = drm_display_info_set_bus_formats(&conn->display_info,
-  &bus_format, 1);
-   if (ret)
-   return ret;
-
ret = drm_connector_attach_encoder(conn, bridge->encoder);
if (ret) {
dev_err(mhdp->dev, "Failed to attach connector to encoder\n");
-- 
2.17.1

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[PATCH 2/8] drm/vc4: dsi: Correct DSI register definition

[Maxime Ripard]

From: Dave Stevenson 

The DSI1_PHY_AFEC0_PD_DLANE1 and DSI1_PHY_AFEC0_PD_DLANE3 register
definitions were swapped, so trying to use more than a single data
lane failed as lane 1 would get powered down.
(In theory a 4 lane device would work as all lanes would remain
powered).

Correct the definitions.

Signed-off-by: Dave Stevenson 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/vc4/vc4_dsi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c
index b1d8765795f1..bb316e6cc12b 100644
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
@@ -306,11 +306,11 @@
 # define DSI0_PHY_AFEC0_RESET  BIT(11)
 # define DSI1_PHY_AFEC0_PD_BG  BIT(11)
 # define DSI0_PHY_AFEC0_PD BIT(10)
-# define DSI1_PHY_AFEC0_PD_DLANE3  BIT(10)
+# define DSI1_PHY_AFEC0_PD_DLANE1  BIT(10)
 # define DSI0_PHY_AFEC0_PD_BG  BIT(9)
 # define DSI1_PHY_AFEC0_PD_DLANE2  BIT(9)
 # define DSI0_PHY_AFEC0_PD_DLANE1  BIT(8)
-# define DSI1_PHY_AFEC0_PD_DLANE1  BIT(8)
+# define DSI1_PHY_AFEC0_PD_DLANE3  BIT(8)
 # define DSI_PHY_AFEC0_PTATADJ_MASKVC4_MASK(7, 4)
 # define DSI_PHY_AFEC0_PTATADJ_SHIFT   4
 # define DSI_PHY_AFEC0_CTATADJ_MASKVC4_MASK(3, 0)
-- 
2.28.0

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[PATCH v11 02/10] memory: tegra20: Support hardware versioning and clean up OPP table initialization

[Dmitry Osipenko]

Support hardware versioning, which is now required for Tegra20 EMC OPP.
Clean up OPP table initialization by using a error code returned by OPP
API for judging about the OPP table presence in a device-tree and remove
OPP regulator initialization because we're now going to use power domain
instead of a raw regulator. This puts Tegra20 EMC OPP preparation on par
with the Tegra30/124 EMC drivers.

Signed-off-by: Dmitry Osipenko 
---
 drivers/memory/tegra/tegra20-emc.c | 48 +-
 1 file changed, 20 insertions(+), 28 deletions(-)

diff --git a/drivers/memory/tegra/tegra20-emc.c 
b/drivers/memory/tegra/tegra20-emc.c
index 0320d9df4a20..686aaf477d8a 100644
--- a/drivers/memory/tegra/tegra20-emc.c
+++ b/drivers/memory/tegra/tegra20-emc.c
@@ -910,43 +910,36 @@ static int tegra_emc_interconnect_init(struct tegra_emc 
*emc)
 
 static int tegra_emc_opp_table_init(struct tegra_emc *emc)
 {
-   struct opp_table *reg_opp_table = NULL, *clk_opp_table;
-   const char *rname = "core";
+   u32 hw_version = BIT(tegra_sku_info.soc_process_id);
+   struct opp_table *clk_opp_table, *hw_opp_table;
int err;
 
-   /*
-* Legacy device-trees don't have OPP table and EMC driver isn't
-* useful in this case.
-*/
-   if (!device_property_present(emc->dev, "operating-points-v2")) {
-   dev_err(emc->dev,
-   "OPP table not found, please update your device 
tree\n");
-   return -ENODEV;
-   }
-
-   /* voltage scaling is optional */
-   if (device_property_present(emc->dev, "core-supply")) {
-   reg_opp_table = dev_pm_opp_set_regulators(emc->dev, &rname, 1);
-   if (IS_ERR(reg_opp_table))
-   return dev_err_probe(emc->dev, PTR_ERR(reg_opp_table),
-"failed to set OPP regulator\n");
-   }
-
clk_opp_table = dev_pm_opp_set_clkname(emc->dev, NULL);
err = PTR_ERR_OR_ZERO(clk_opp_table);
if (err) {
dev_err(emc->dev, "failed to set OPP clk: %d\n", err);
-   goto put_reg_table;
+   return err;
}
 
-   err = dev_pm_opp_of_add_table(emc->dev);
+   hw_opp_table = dev_pm_opp_set_supported_hw(emc->dev, &hw_version, 1);
+   err = PTR_ERR_OR_ZERO(hw_opp_table);
if (err) {
-   dev_err(emc->dev, "failed to add OPP table: %d\n", err);
+   dev_err(emc->dev, "failed to set OPP supported HW: %d\n", err);
goto put_clk_table;
}
 
-   dev_info(emc->dev, "current clock rate %lu MHz\n",
-clk_get_rate(emc->clk) / 100);
+   err = dev_pm_opp_of_add_table(emc->dev);
+   if (err) {
+   if (err == -ENODEV)
+   dev_err(emc->dev, "OPP table not found, please update 
your device tree\n");
+   else
+   dev_err(emc->dev, "failed to add OPP table: %d\n", err);
+
+   goto put_hw_table;
+   }
+
+   dev_info(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n",
+hw_version, clk_get_rate(emc->clk) / 100);
 
/* first dummy rate-set initializes voltage state */
err = dev_pm_opp_set_rate(emc->dev, clk_get_rate(emc->clk));
@@ -959,11 +952,10 @@ static int tegra_emc_opp_table_init(struct tegra_emc *emc)
 
 remove_table:
dev_pm_opp_of_remove_table(emc->dev);
+put_hw_table:
+   dev_pm_opp_put_supported_hw(hw_opp_table);
 put_clk_table:
dev_pm_opp_put_clkname(clk_opp_table);
-put_reg_table:
-   if (reg_opp_table)
-   dev_pm_opp_put_regulators(reg_opp_table);
 
return err;
 }
-- 
2.29.2

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[PATCH] drm/mediatek: mtk_dpi: Create connector for bridges

[Hsin-Yi Wang]

Similar to a9d9fea74be2 ("drm/mediatek: mtk_dsi: Create connector for bridges"):

Use the drm_bridge_connector helper to create a connector for pipelines
that use drm_bridge. This allows splitting connector operations across
multiple bridges when necessary, instead of having the last bridge in
the chain creating the connector and handling all connector operations
internally.

Signed-off-by: Hsin-Yi Wang 
---
 drivers/gpu/drm/mediatek/mtk_dpi.c | 13 -
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c 
b/drivers/gpu/drm/mediatek/mtk_dpi.c
index 52f11a63a330..189377e342fa 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -20,6 +20,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -66,6 +67,7 @@ struct mtk_dpi {
struct drm_encoder encoder;
struct drm_bridge bridge;
struct drm_bridge *next_bridge;
+   struct drm_connector *connector;
void __iomem *regs;
struct device *dev;
struct clk *engine_clk;
@@ -603,12 +605,21 @@ static int mtk_dpi_bind(struct device *dev, struct device 
*master, void *data)
 
dpi->encoder.possible_crtcs = 
mtk_drm_find_possible_crtc_by_comp(drm_dev, dpi->ddp_comp);
 
-   ret = drm_bridge_attach(&dpi->encoder, &dpi->bridge, NULL, 0);
+   ret = drm_bridge_attach(&dpi->encoder, &dpi->bridge, NULL,
+   DRM_BRIDGE_ATTACH_NO_CONNECTOR);
if (ret) {
dev_err(dev, "Failed to attach bridge: %d\n", ret);
goto err_cleanup;
}
 
+   dpi->connector = drm_bridge_connector_init(drm_dev, &dpi->encoder);
+   if (IS_ERR(dpi->connector)) {
+   dev_err(dev, "Unable to create bridge connector\n");
+   ret = PTR_ERR(dpi->connector);
+   goto err_cleanup;
+   }
+   drm_connector_attach_encoder(dpi->connector, &dpi->encoder);
+
dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS;
dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB;
dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB;
-- 
2.29.2.576.ga3fc446d84-goog

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Re: [PATCH] drm: Fix drm.h uapi header for Windows

[James Park]

The trailing underscore for  DRM_FOURCC_STANDALONE_ isn't intentional,
right? Should I put all the integer types, or just the ones that are used
in that file?

Thanks,
James

On Thu, Dec 3, 2020 at 6:52 AM Daniel Vetter  wrote:

> On Thu, Dec 3, 2020 at 9:18 AM Michel Dänzer  wrote:
> >
> > On 2020-12-02 8:47 p.m., James Park wrote:
> > >
> > > If we're trying to cut ties with the drm-uapi folder entirely, the
> stuff
> > > ac_surface.c need includes the AMD_FMT_MOD stuff in drm_fourcc.h,
> > > and AMDGPU_TILING_* under amdgpu_drm.h. Is there a better spot for
> these
> > > definitions?
> >
> > The Mesa src/amd/ code should use platform-neutral abstractions for
> > these. This wasn't deemed necessary before, because nobody was trying to
> > build these drivers for non-UNIX OSes. But now you are.
>
> I think that's a bit much busy work for not much gain. drm_fourcc.h is
> even included as the official source of truth of some khr extensions,
> making that header stand-alone and useable cross-platform sounds like
> a good idea to me. Something like the below is imo perfectly fine:
>
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index ca48ed0e6bc1..0a121b3efb58 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -24,7 +24,11 @@
> #ifndef DRM_FOURCC_H
> #define DRM_FOURCC_H
>
> +#ifndef DRM_FOURCC_STANDALONE_
> +/* include the linux uapi types here */
> +#else
> #include "drm.h"
> +#endif
>
> #if defined(__cplusplus)
> extern "C" {
>
>
> Cheers, Daniel
>
> >
> >
> > --
> > Earthling Michel Dänzer   |   https://redhat.com
> > Libre software enthusiast | Mesa and X developer
> > ___
> > dri-devel mailing list
> > dri-devel@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/dri-devel
>
>
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
>
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[PATCH 0/1] dt-bindings: eliminate yamllint warnings

[Zhen Lei]

There're too many people, I just send to the maintainer, reviewer, supporter.

Eliminate below warnings:
./Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml:32:13: [warning] 
wrong indentation: expected 14 but found 12 (indentation)
./Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml:35:9: [warning] 
wrong indentation: expected 10 but found 8 (indentation)
./Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml:21:6: 
[warning] wrong indentation: expected 6 but found 5 (indentation)
./Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml:52:9: 
[warning] wrong indentation: expected 6 but found 8 (indentation)
./Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml:42:8: 
[warning] wrong indentation: expected 8 but found 7 (indentation)
./Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml:45:8: 
[warning] wrong indentation: expected 8 but found 7 (indentation)
./Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml:25:10: 
[warning] wrong indentation: expected 10 but found 9 (indentation)
./Documentation/devicetree/bindings/media/i2c/adv7604.yaml:24:9: [warning] 
wrong indentation: expected 10 but found 8 (indentation)
./Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml:4:1: [error] 
missing document start "---" (document-start)
./Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml:29:9: [warning] 
wrong indentation: expected 10 but found 8 (indentation)
./Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml:32:9: [warning] 
wrong indentation: expected 10 but found 8 (indentation)
./Documentation/devicetree/bindings/media/i2c/ovti,ov772x.yaml:79:17: [warning] 
wrong indentation: expected 14 but found 16 (indentation)
./Documentation/devicetree/bindings/media/i2c/ovti,ov772x.yaml:88:17: [warning] 
wrong indentation: expected 14 but found 16 (indentation)
./Documentation/devicetree/bindings/media/i2c/sony,imx214.yaml:72:17: [warning] 
wrong indentation: expected 18 but found 16 (indentation)
./Documentation/devicetree/bindings/media/i2c/sony,imx214.yaml:75:17: [warning] 
wrong indentation: expected 18 but found 16 (indentation)
./Documentation/devicetree/bindings/mmc/mtk-sd.yaml:20:9: [warning] wrong 
indentation: expected 10 but found 8 (indentation)
./Documentation/devicetree/bindings/mmc/mtk-sd.yaml:30:9: [warning] wrong 
indentation: expected 10 but found 8 (indentation)
./Documentation/devicetree/bindings/mmc/mtk-sd.yaml:33:9: [warning] wrong 
indentation: expected 10 but found 8 (indentation)
./Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml:10:4:
 [warning] wrong indentation: expected 2 but found 3 (indentation)


Zhen Lei (1):
  dt-bindings: eliminate yamllint warnings

 .../devicetree/bindings/clock/imx8qxp-lpcg.yaml| 20 -
 .../bindings/display/bridge/analogix,anx7625.yaml  |  4 ++--
 .../bindings/display/bridge/intel,keembay-dsi.yaml |  4 ++--
 .../bindings/display/intel,keembay-msscam.yaml |  4 ++--
 .../bindings/display/panel/novatek,nt36672a.yaml   |  2 +-
 .../devicetree/bindings/media/i2c/adv7604.yaml |  4 ++--
 .../devicetree/bindings/media/i2c/mipi-ccs.yaml| 11 -
 .../devicetree/bindings/media/i2c/ovti,ov772x.yaml | 12 +-
 .../devicetree/bindings/media/i2c/sony,imx214.yaml | 12 +-
 Documentation/devicetree/bindings/mmc/mtk-sd.yaml  | 26 +++---
 .../sound/mt8192-mt6359-rt1015-rt5682.yaml |  4 ++--
 11 files changed, 52 insertions(+), 51 deletions(-)

-- 
1.8.3


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[PATCH] drm/hisilicon: Deletted the entire file hibmc_ttm.c

[Tian Tao]

Deletted the entire file hibmc_ttm.c. drmm_vram_helper_init() can be
called directly from hibmc_load(). hibmc_dumb_create() and
hibmc_mode_funcs can go to hibmc_drm_drv.c

Signed-off-by: Tian Tao 
---
 drivers/gpu/drm/hisilicon/hibmc/Makefile|  2 +-
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 21 ++-
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h |  4 --
 drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c | 50 -
 4 files changed, 20 insertions(+), 57 deletions(-)
 delete mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c

diff --git a/drivers/gpu/drm/hisilicon/hibmc/Makefile 
b/drivers/gpu/drm/hisilicon/hibmc/Makefile
index 684ef79..d25c75e 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/Makefile
+++ b/drivers/gpu/drm/hisilicon/hibmc/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0-only
-hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_de.o hibmc_drm_vdac.o hibmc_ttm.o 
hibmc_drm_i2c.o
+hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_de.o hibmc_drm_vdac.o hibmc_drm_i2c.o
 
 obj-$(CONFIG_DRM_HISI_HIBMC) += hibmc-drm.o
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
index 5aea2e9..3687753 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
@@ -16,6 +16,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -43,6 +44,12 @@ static irqreturn_t hibmc_drm_interrupt(int irq, void *arg)
return IRQ_HANDLED;
 }
 
+static int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev,
+struct drm_mode_create_dumb *args)
+{
+   return drm_gem_vram_fill_create_dumb(file, dev, 0, 128, args);
+}
+
 static const struct drm_driver hibmc_driver = {
.driver_features= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
.fops   = &hibmc_fops,
@@ -77,6 +84,13 @@ static const struct dev_pm_ops hibmc_pm_ops = {
hibmc_pm_resume)
 };
 
+static const struct drm_mode_config_funcs hibmc_mode_funcs = {
+   .mode_valid = drm_vram_helper_mode_valid,
+   .atomic_check = drm_atomic_helper_check,
+   .atomic_commit = drm_atomic_helper_commit,
+   .fb_create = drm_gem_fb_create,
+};
+
 static int hibmc_kms_init(struct hibmc_drm_private *priv)
 {
struct drm_device *dev = &priv->dev;
@@ -262,9 +276,12 @@ static int hibmc_load(struct drm_device *dev)
if (ret)
goto err;
 
-   ret = hibmc_mm_init(priv);
-   if (ret)
+   ret = drmm_vram_helper_init(dev, pci_resource_start(dev->pdev, 0),
+   priv->fb_size);
+   if (ret) {
+   drm_err(dev, "Error initializing VRAM MM; %d\n", ret);
goto err;
+   }
 
ret = hibmc_kms_init(priv);
if (ret)
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
index 2786de5..a49c10e 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
@@ -64,10 +64,6 @@ int hibmc_de_init(struct hibmc_drm_private *priv);
 int hibmc_vdac_init(struct hibmc_drm_private *priv);
 
 int hibmc_mm_init(struct hibmc_drm_private *hibmc);
-int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev,
- struct drm_mode_create_dumb *args);
 int hibmc_ddc_create(struct drm_device *drm_dev, struct hibmc_connector 
*connector);
 
-extern const struct drm_mode_config_funcs hibmc_mode_funcs;
-
 #endif
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
deleted file mode 100644
index 892d566..000
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
+++ /dev/null
@@ -1,50 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/* Hisilicon Hibmc SoC drm driver
- *
- * Based on the bochs drm driver.
- *
- * Copyright (c) 2016 Huawei Limited.
- *
- * Author:
- * Rongrong Zou 
- * Rongrong Zou 
- * Jianhua Li 
- */
-
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include "hibmc_drm_drv.h"
-
-int hibmc_mm_init(struct hibmc_drm_private *hibmc)
-{
-   int ret;
-   struct drm_device *dev = &hibmc->dev;
-
-   ret = drmm_vram_helper_init(dev, pci_resource_start(dev->pdev, 0),
-   hibmc->fb_size);
-   if (ret) {
-   drm_err(dev, "Error initializing VRAM MM; %d\n", ret);
-   return ret;
-   }
-
-   return 0;
-}
-
-int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev,
- struct drm_mode_create_dumb *args)
-{
-   return drm_gem_vram_fill_create_dumb(file, dev, 0, 128, args);
-}
-
-const struct drm_mode_config_funcs hibmc_mode_funcs = {
-   .mode_valid = drm_vram_helper_mode_valid,
-   .atomic_check = drm_atomic_helper_check,
-   .atomic_commit = drm_atomic_helper_commit,
-

[RFC PATCH 2/2] i915: POC use dynamic_debug_exec_queries to control pr_debugs in gvt

[Jim Cromie]

The gvt component of this driver has ~120 pr_debugs, in 9 "classes".
Following model of drm.debug, add a parameter to map bits to these
classes.

In Makefile, add DYNAMIC_DEBUG_MODULE.  This converts gvt's pr_debugs,
even if the rest of drm is not using CONFIG_DRM_USE_DYNAMIC_DEBUG.

Signed-off-by: Jim Cromie 
---
 drivers/gpu/drm/i915/gvt/Makefile  |  1 +
 drivers/gpu/drm/i915/i915_params.c | 74 ++
 2 files changed, 75 insertions(+)

diff --git a/drivers/gpu/drm/i915/gvt/Makefile 
b/drivers/gpu/drm/i915/gvt/Makefile
index ea8324abc784..e38a1eb618bd 100644
--- a/drivers/gpu/drm/i915/gvt/Makefile
+++ b/drivers/gpu/drm/i915/gvt/Makefile
@@ -6,4 +6,5 @@ GVT_SOURCE := gvt.o aperture_gm.o handlers.o vgpu.o 
trace_points.o firmware.o \
fb_decoder.o dmabuf.o page_track.o
 
 ccflags-y  += -I $(srctree)/$(src) -I 
$(srctree)/$(src)/$(GVT_DIR)/
+ccflags-y  += -DDYNAMIC_DEBUG_MODULE
 i915-y += $(addprefix $(GVT_DIR)/, 
$(GVT_SOURCE))
diff --git a/drivers/gpu/drm/i915/i915_params.c 
b/drivers/gpu/drm/i915/i915_params.c
index 7f139ea4a90b..ecc825558e00 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -260,3 +260,77 @@ void i915_params_free(struct i915_params *params)
I915_PARAMS_FOR_EACH(FREE);
 #undef FREE
 }
+
+/* POC for callback -> dynamic_debug_exec_queries */
+unsigned long __gvt_debug;
+EXPORT_SYMBOL(__gvt_debug);
+
+static char *format_prefix_classes[] = {
+   "gvt: cmd: ",
+   "gvt: core: ",
+   "gvt: dpy: ",
+   "gvt: el: ",
+   "gvt: irq: ",
+   "gvt: mm: ",
+   "gvt: mmio: ",
+   "gvt: render: ",
+   "gvt: sched: "
+};
+#define NUM_CLASSESARRAY_SIZE(format_prefix_classes)
+#define OUR_QUERY_SIZE 128 /* we need about 20 */
+
+#include 
+
+static int param_set_dyndbg(const char *instr, const struct kernel_param *kp)
+{
+   unsigned int val;
+   unsigned long changes, result;
+   int rc, chgct = 0, totct = 0, bitpos;
+   char query[OUR_QUERY_SIZE];
+
+   rc = kstrtouint(instr, 0, &val);
+   if (rc) {
+   pr_err("set_dyndbg: failed\n");
+   return -EINVAL;
+   }
+   result = val;
+   pr_info("set_dyndbg: result:0x%lx from %s\n", result, instr);
+
+   changes = result ^ __gvt_debug;
+
+   for_each_set_bit(bitpos, &changes, NUM_CLASSES) {
+
+   sprintf(query, "format '^%s' %cp", 
format_prefix_classes[bitpos],
+   test_bit(bitpos, &result) ? '+' : '-');
+
+   chgct = dynamic_debug_exec_queries(query, "i915");
+
+   pr_info("%d changes on: %s\n", chgct, query);
+   totct += chgct;
+   }
+   pr_info("total changes: %d\n", totct);
+   __gvt_debug = result;
+   return 0;
+}
+static int param_get_dyndbg(char *buffer, const struct kernel_param *kp)
+{
+   return scnprintf(buffer, PAGE_SIZE, "%u\n",
+*((unsigned int *)kp->arg));
+}
+static const struct kernel_param_ops param_ops_dyndbg = {
+   .set = param_set_dyndbg,
+   .get = param_get_dyndbg,
+};
+
+MODULE_PARM_DESC(debug_gvt, " gvt debug categories:"
+"\n\t0x1\t gvt: cmd:"
+"\n\t0x2\t gvt: core:"
+"\n\t0x4\t gvt: dpy:"
+"\n\t0x8\t gvt: el:"
+"\n\t0x10\t gvt: irq:"
+"\n\t0x20\t gvt: mm:"
+"\n\t0x40\t gvt: mmio:"
+"\n\t0x80\t gvt: render:"
+"\n\t0x100\t gvt: sched:" "\n");
+
+module_param_cb(debug_gvt, ¶m_ops_dyndbg, &__gvt_debug, 0644);
-- 
2.28.0

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Re: [PATCH 0/1] dt-bindings: eliminate yamllint warnings

[Leizhen (ThunderTown)]

Sorry, Forgot to say: This patch is based on the latest linux-next code.


On 2020/12/4 10:42, Zhen Lei wrote:
> There're too many people, I just send to the maintainer, reviewer, supporter.
> 
> Eliminate below warnings:
> ./Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml:32:13: [warning] 
> wrong indentation: expected 14 but found 12 (indentation)
> ./Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml:35:9: [warning] 
> wrong indentation: expected 10 but found 8 (indentation)
> ./Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml:21:6: 
> [warning] wrong indentation: expected 6 but found 5 (indentation)
> ./Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml:52:9:
>  [warning] wrong indentation: expected 6 but found 8 (indentation)
> ./Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml:42:8:
>  [warning] wrong indentation: expected 8 but found 7 (indentation)
> ./Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml:45:8:
>  [warning] wrong indentation: expected 8 but found 7 (indentation)
> ./Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml:25:10:
>  [warning] wrong indentation: expected 10 but found 9 (indentation)
> ./Documentation/devicetree/bindings/media/i2c/adv7604.yaml:24:9: [warning] 
> wrong indentation: expected 10 but found 8 (indentation)
> ./Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml:4:1: [error] 
> missing document start "---" (document-start)
> ./Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml:29:9: [warning] 
> wrong indentation: expected 10 but found 8 (indentation)
> ./Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml:32:9: [warning] 
> wrong indentation: expected 10 but found 8 (indentation)
> ./Documentation/devicetree/bindings/media/i2c/ovti,ov772x.yaml:79:17: 
> [warning] wrong indentation: expected 14 but found 16 (indentation)
> ./Documentation/devicetree/bindings/media/i2c/ovti,ov772x.yaml:88:17: 
> [warning] wrong indentation: expected 14 but found 16 (indentation)
> ./Documentation/devicetree/bindings/media/i2c/sony,imx214.yaml:72:17: 
> [warning] wrong indentation: expected 18 but found 16 (indentation)
> ./Documentation/devicetree/bindings/media/i2c/sony,imx214.yaml:75:17: 
> [warning] wrong indentation: expected 18 but found 16 (indentation)
> ./Documentation/devicetree/bindings/mmc/mtk-sd.yaml:20:9: [warning] wrong 
> indentation: expected 10 but found 8 (indentation)
> ./Documentation/devicetree/bindings/mmc/mtk-sd.yaml:30:9: [warning] wrong 
> indentation: expected 10 but found 8 (indentation)
> ./Documentation/devicetree/bindings/mmc/mtk-sd.yaml:33:9: [warning] wrong 
> indentation: expected 10 but found 8 (indentation)
> ./Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml:10:4:
>  [warning] wrong indentation: expected 2 but found 3 (indentation)
> 
> 
> Zhen Lei (1):
>   dt-bindings: eliminate yamllint warnings
> 
>  .../devicetree/bindings/clock/imx8qxp-lpcg.yaml| 20 -
>  .../bindings/display/bridge/analogix,anx7625.yaml  |  4 ++--
>  .../bindings/display/bridge/intel,keembay-dsi.yaml |  4 ++--
>  .../bindings/display/intel,keembay-msscam.yaml |  4 ++--
>  .../bindings/display/panel/novatek,nt36672a.yaml   |  2 +-
>  .../devicetree/bindings/media/i2c/adv7604.yaml |  4 ++--
>  .../devicetree/bindings/media/i2c/mipi-ccs.yaml| 11 -
>  .../devicetree/bindings/media/i2c/ovti,ov772x.yaml | 12 +-
>  .../devicetree/bindings/media/i2c/sony,imx214.yaml | 12 +-
>  Documentation/devicetree/bindings/mmc/mtk-sd.yaml  | 26 
> +++---
>  .../sound/mt8192-mt6359-rt1015-rt5682.yaml |  4 ++--
>  11 files changed, 52 insertions(+), 51 deletions(-)
> 

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[PATCH 1/4] drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_enable()

[Liu Ying]

The Northwest Logic MIPI DSI host controller embedded in i.MX8qxp
works with a Mixel MIPI DPHY + LVDS PHY combo to support either
a MIPI DSI display or a LVDS display.  So, this patch calls
phy_set_mode() from nwl_dsi_enable() to set PHY mode to MIPI DPHY
explicitly.

Cc: Guido Günther 
Cc: Robert Chiras 
Cc: Martin Kepplinger 
Cc: Andrzej Hajda 
Cc: Neil Armstrong 
Cc: Laurent Pinchart 
Cc: Jonas Karlman 
Cc: Jernej Skrabec 
Cc: David Airlie 
Cc: Daniel Vetter 
Cc: NXP Linux Team 
Signed-off-by: Liu Ying 
---
 drivers/gpu/drm/bridge/nwl-dsi.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-dsi.c
index 66b6740..be6bfc5 100644
--- a/drivers/gpu/drm/bridge/nwl-dsi.c
+++ b/drivers/gpu/drm/bridge/nwl-dsi.c
@@ -678,6 +678,12 @@ static int nwl_dsi_enable(struct nwl_dsi *dsi)
return ret;
}
 
+   ret = phy_set_mode(dsi->phy, PHY_MODE_MIPI_DPHY);
+   if (ret < 0) {
+   DRM_DEV_ERROR(dev, "Failed to set DSI phy mode: %d\n", ret);
+   goto uninit_phy;
+   }
+
ret = phy_configure(dsi->phy, phy_cfg);
if (ret < 0) {
DRM_DEV_ERROR(dev, "Failed to configure DSI phy: %d\n", ret);
-- 
2.7.4

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[PATCH v11 01/10] dt-bindings: memory: tegra20: emc: Document opp-supported-hw property

[Dmitry Osipenko]

Document opp-supported-hw property, which is not strictly necessary to
have on Tegra20, but it's very convenient to have because all other SoC
core devices will use hardware versioning, and thus, it's good to maintain
the consistency.

Signed-off-by: Dmitry Osipenko 
---
 .../bindings/memory-controllers/nvidia,tegra20-emc.txt  | 6 ++
 1 file changed, 6 insertions(+)

diff --git 
a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt 
b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
index 67ac8d1297da..cc443fcf4bec 100644
--- 
a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
+++ 
b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
@@ -16,6 +16,12 @@ Properties:
 - #interconnect-cells : Should be 0.
 - operating-points-v2: See ../bindings/opp/opp.txt for details.
 
+For each opp entry in 'operating-points-v2' table:
+- opp-supported-hw: One bitfield indicating SoC process ID mask
+
+   A bitwise AND is performed against this value and if any bit
+   matches, the OPP gets enabled.
+
 Optional properties:
 - core-supply: Phandle of voltage regulator of the SoC "core" power domain.
 
-- 
2.29.2

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[PATCH drm/hisilicon v3 0/2] support reading resolutions from EDID

[Tian Tao]

patch #1 add a new file to implements i2c adapters, #2 read the
resolution from the edid, if that fails, set the resolution to fixed.
and update the destroy callback function to release the i2c adapters

Changes since v1:
-merge patch #3 into patch #2.
-add new function to_hibmc_drm_private, modify three functions in
hibmc_drm_i2c.c with the newly added function.
-deleting the member variable dev from the structure hibmc_connector.
-modify print log incorrectly.
-Modify hibmc_connector_get_modes.

Changes since v2:
-rewrite the funtion to_hibmc_drm_private, and rename GPIO_SCL_MASK
to I2C_SCL_MASK

Tian Tao (2):
  drm/hisilicon: Support i2c driver algorithms for bit-shift adapters
  drm/hisilicon: Features to support reading resolutions from EDID

 drivers/gpu/drm/hisilicon/hibmc/Makefile |  2 +-
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h  | 25 +-
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c  | 99 
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c | 38 -
 4 files changed, 158 insertions(+), 6 deletions(-)
 create mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c

-- 
2.7.4

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[RFC PATCH 0/2] drm: use dynamic_debug

[Jim Cromie]

hello gentle readers,

These 2 rfc patches convert part of drm-world to use dynamic debug.

1st one addresses drm.debug category based logging.  If DYNAMIC_DEBUG
is configured, then CONFIG_DRM_USE_DYNAMIC_DEBUG controls whether
dynamic-debug is used to avoid runtime costs of drm_debug_enabled().
We require CONFIG_JUMP_LABEL too, since we are selling its
optimization.

This change adds many new callsites to /proc/dynamic_debug/control;
~300 in drm, ~200 in drm_kms_helper, as well as ~1500 in i915 driver,
and ~3200 in amdgpu.  So there are substantial implications here.

2nd one is for i915, which I have in my laptop.  `grep pr_debug` found
~90 callsites with a meaningful format-prefix-string, to demonstrate
use of "format ^prefix" to control user categorized debugs.

Jim Cromie (2):
  drm: RFC add choice to use dynamic debug in drm-debug
  i915: POC use dynamic_debug_exec_queries to control pr_debugs in gvt

 drivers/gpu/drm/Kconfig| 13 +
 drivers/gpu/drm/drm_print.c| 75 ++--
 drivers/gpu/drm/i915/gvt/Makefile  |  1 +
 drivers/gpu/drm/i915/i915_params.c | 74 
 include/drm/drm_print.h| 92 ++
 5 files changed, 228 insertions(+), 27 deletions(-)

-- 
2.28.0

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[PATCH] drm/vc4: Deleted the drm_device declaration

[Tian Tao]

drm_modeset_lock.h already declares struct drm_device, so there's no
need to declare it in vc4_drv.h

Signed-off-by: Tian Tao 
---
 drivers/gpu/drm/vc4/vc4_drv.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index 8c8d96b..8717a1c 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -19,7 +19,6 @@
 
 #include "uapi/drm/vc4_drm.h"
 
-struct drm_device;
 struct drm_gem_object;
 
 /* Don't forget to update vc4_bo.c: bo_type_names[] when adding to
-- 
2.7.4

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Re: [PATCH v2 2/5] thermal: devfreq_cooling: get a copy of device status

[Daniel Lezcano]

On 03/12/2020 16:38, Lukasz Luba wrote:
> 
> 
> On 12/3/20 1:09 PM, Daniel Lezcano wrote:
>> On 18/11/2020 13:03, Lukasz Luba wrote:
>>> Devfreq cooling needs to now the correct status of the device in order
>>> to operate. Do not rely on Devfreq last_status which might be a stale
>>> data
>>> and get more up-to-date values of the load.
>>>
>>> Devfreq framework can change the device status in the background. To
>>> mitigate this situation make a copy of the status structure and use it
>>> for internal calculations.
>>>
>>> In addition this patch adds normalization function, which also makes
>>> sure
>>> that whatever data comes from the device, it is in a sane range.
>>>
>>> Signed-off-by: Lukasz Luba 
>>> ---
>>>   drivers/thermal/devfreq_cooling.c | 52 +--
>>>   1 file changed, 43 insertions(+), 9 deletions(-)
>>>
>>> diff --git a/drivers/thermal/devfreq_cooling.c
>>> b/drivers/thermal/devfreq_cooling.c
>>> index 659c0143c9f0..925523694462 100644
>>> --- a/drivers/thermal/devfreq_cooling.c
>>> +++ b/drivers/thermal/devfreq_cooling.c
>>> @@ -227,20 +227,46 @@ static inline unsigned long
>>> get_total_power(struct devfreq_cooling_device *dfc,
>>>  voltage);
>>>   }
>>>   +static void _normalize_load(struct devfreq_dev_status *status)
>>> +{
>>> +    /* Make some space if needed */
>>> +    if (status->busy_time > 0x) {
>>> +    status->busy_time >>= 10;
>>> +    status->total_time >>= 10;
>>> +    }
>>> +
>>> +    if (status->busy_time > status->total_time)
>>> +    status->busy_time = status->total_time;
>>
>> How the condition above is possible?
> 
> They should, be checked by the driver, but I cannot trust
> and have to check for all corner cases: (div by 0, overflow
> one of them, etc). The busy_time and total_time are unsigned long,
> which means 4B on 32bit machines.
> If these values are coming from device counters, which count every
> busy cycle and total cycles of a clock of a device running at e.g.
> 1GHz they would overflow every ~4s.

I don't think it is up to this routine to check the driver is correctly
implemented, especially at every call to get_requested_power.

If the normalization ends up by doing this kind of thing, there is
certainly something wrong in the 'status' computation to be fixed before
submitting this series.


> Normally IPA polling are 1s and 100ms, it's platform specific. But there
> are also 'empty' periods when IPA sees temperature very low and does not
> even call the .get_requested_power() callbacks for the cooling devices,
> just grants max freq to all. This is problematic. I am investigating it
> and will propose a solution for IPA soon.
> 
> I would avoid all of this if devfreq core would have default for all
> devices a reliable polling timer... Let me check some possibilities also
> for this case.

Ok, may be create an API to compute the 'idle,busy,total times' to be
used by the different the devfreq drivers and then fix the overflow in
this common place.

>>> +    status->busy_time *= 100;
>>> +    status->busy_time /= status->total_time ? : 1;
>>> +
>>> +    /* Avoid division by 0 */
>>> +    status->busy_time = status->busy_time ? : 1;
>>> +    status->total_time = 100;
>>
>> Why not base the normalization on 1024? and use an intermediate u64.
> 
> You are the 2nd reviewer who is asking this. I tried to keep 'load' as
> in range [0, 100] since we also have 'load' in cpufreq cooling in this
> range. Maybe I should switch to 1024 (Ionela was also asking for this).

Well it is common practice to compute normalization with 1024 because
the division is a bit shift and the compiler optimize the code very well
with that value.




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[PATCH 3/4] dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for i.MX8qxp

[Liu Ying]

Add support for Mixel MIPI DPHY + LVDS PHY combo IP
as found on Freescale i.MX8qxp SoC.

Cc: Guido Günther 
Cc: Kishon Vijay Abraham I 
Cc: Vinod Koul 
Cc: Rob Herring 
Cc: NXP Linux Team 
Signed-off-by: Liu Ying 
---
 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt 
b/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt
index 9b23407..0afce99 100644
--- a/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt
+++ b/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt
@@ -4,9 +4,13 @@ The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 
platforms (along the
 MIPI-DSI IP from Northwest Logic). It represents the physical layer for the
 electrical signals for DSI.
 
+The Mixel PHY IP block found on i.MX8qxp is a combo PHY that can work
+in either MIPI-DSI PHY mode or LVDS PHY mode.
+
 Required properties:
-- compatible: Must be:
+- compatible: Should be one of:
   - "fsl,imx8mq-mipi-dphy"
+  - "fsl,imx8qxp-mipi-dphy"
 - clocks: Must contain an entry for each entry in clock-names.
 - clock-names: Must contain the following entries:
   - "phy_ref": phandle and specifier referring to the DPHY ref clock
@@ -14,6 +18,8 @@ Required properties:
 - #phy-cells: number of cells in PHY, as defined in
   Documentation/devicetree/bindings/phy/phy-bindings.txt
   this must be <0>
+- fsl,syscon: Phandle to a system controller, as required by the PHY
+  in i.MX8qxp SoC.
 
 Optional properties:
 - power-domains: phandle to power domain
-- 
2.7.4

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[PATCH drm/hisilicon 0/3] support reading resolutions from EDID

[Tian Tao]

patch #1 add a new file to implements i2c adapters, #2 read the
resolution from the edid, if that fails, set the resolution to fixed.
patch #3 update the destroy callback function to release the i2c adapters.

Tian Tao (3):
  drm/hisilicon: Support i2c driver algorithms for bit-shift adapters
  drm/hisilicon: Features to support reading resolutions from EDID
  drm/hisilicon: Releasing Resources in the Destroy callback Function

 drivers/gpu/drm/hisilicon/hibmc/Makefile |  2 +-
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h  | 21 -
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c  | 98 
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c | 45 +--
 4 files changed, 157 insertions(+), 9 deletions(-)
 create mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c

-- 
2.7.4

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[PATCH v3 3/3] dt-bindings: panel: Add bindings for MRB2801

[mdurnev]

From: Mikhail Durnev 

Add binding for Ronbo MRB2801 display module.

This binding is for display panels using an Ilitek ILI9341 controller in
parallel mode.

Signed-off-by: Mikhail Durnev 
---
 .../devicetree/bindings/display/ronbo,mrb2801.txt  | 42 ++
 1 file changed, 42 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/ronbo,mrb2801.txt

diff --git a/Documentation/devicetree/bindings/display/ronbo,mrb2801.txt 
b/Documentation/devicetree/bindings/display/ronbo,mrb2801.txt
new file mode 100644
index 000..db1a861e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/ronbo,mrb2801.txt
@@ -0,0 +1,42 @@
+MRB2801 display panel
+
+This binding is for display panels using an Ilitek ILI9341 controller in
+parallel mode.
+
+Required properties:
+- compatible:  "ronbo,mrb2801"
+- dc-gpios:D/C pin
+- wr-gpios:W/R pin
+- db-gpios:8 or 16 DB pins
+- reset-gpios: Reset pin
+- wr-up-down-delays:   Delays in ns for changing W/R from down to up and from 
up to down
+
+Optional properties:
+- backlight:   phandle of the backlight device attached to the panel
+- rotation:panel rotation in degrees counter clockwise (0,90,180,270)
+
+Example:
+   mrb2801{
+   compatible = "ronbo,mrb2801";
+   db-gpios = <&gpio 17 0>, /* DB0 */
+  <&gpio 18 0>, /* DB1 */
+  <&gpio 27 0>, /* DB2 */
+  <&gpio 22 0>, /* DB3 */
+  <&gpio 23 0>, /* DB4 */
+  <&gpio 24 0>, /* DB5 */
+  <&gpio 25 0>, /* DB6 */
+  <&gpio  4 0>, /* DB7 */
+  <&gpio 14 0>, /* DB8 */
+  <&gpio 15 0>, /* DB9 */
+  <&gpio  5 0>, /* DB10 */
+  <&gpio  6 0>, /* DB11 */
+  <&gpio 13 0>, /* DB12 */
+  <&gpio 19 0>, /* DB13 */
+  <&gpio 26 0>, /* DB14 */
+  <&gpio 12 0>; /* DB15 */
+   dc-gpios = <&gpio 16 0>; /* D/C */
+   wr-gpios = <&gpio 20 0>; /* W/R */
+   wr-up-down-delays = <10 51>;
+   reset-gpios = <&gpio 21 0>; /* RST */
+   backlight = <&backlight>;
+   };
-- 
2.7.4

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[PATCH v11 04/10] memory: tegra124-emc: Make driver modular

[Dmitry Osipenko]

Add modularization support to the Tegra124 EMC driver, which now can be
compiled as a loadable kernel module.

Note that EMC clock must be registered at clk-init time, otherwise PLLM
will be disabled as unused clock at boot time if EMC driver is compiled
as a module. Hence add a prepare/complete callbacks. similarly to what is
done for the Tegra20/30 EMC drivers.

Tested-by: Nicolas Chauvet 
Signed-off-by: Dmitry Osipenko 
---
 drivers/clk/tegra/Kconfig|  3 ++
 drivers/clk/tegra/Makefile   |  2 +-
 drivers/clk/tegra/clk-tegra124-emc.c | 41 
 drivers/clk/tegra/clk-tegra124.c | 26 --
 drivers/clk/tegra/clk.h  | 18 
 drivers/memory/tegra/Kconfig |  3 +-
 drivers/memory/tegra/tegra124-emc.c  | 31 ++---
 include/linux/clk/tegra.h|  8 ++
 include/soc/tegra/emc.h  | 16 ---
 9 files changed, 106 insertions(+), 42 deletions(-)
 delete mode 100644 include/soc/tegra/emc.h

diff --git a/drivers/clk/tegra/Kconfig b/drivers/clk/tegra/Kconfig
index deaa4605824c..90df619dc087 100644
--- a/drivers/clk/tegra/Kconfig
+++ b/drivers/clk/tegra/Kconfig
@@ -7,3 +7,6 @@ config TEGRA_CLK_DFLL
depends on ARCH_TEGRA_124_SOC || ARCH_TEGRA_210_SOC
select PM_OPP
def_bool y
+
+config TEGRA124_CLK_EMC
+   bool
diff --git a/drivers/clk/tegra/Makefile b/drivers/clk/tegra/Makefile
index eec2313fd37e..7b1816856eb5 100644
--- a/drivers/clk/tegra/Makefile
+++ b/drivers/clk/tegra/Makefile
@@ -22,7 +22,7 @@ obj-$(CONFIG_ARCH_TEGRA_3x_SOC)   += 
clk-tegra20-emc.o
 obj-$(CONFIG_ARCH_TEGRA_114_SOC)   += clk-tegra114.o
 obj-$(CONFIG_ARCH_TEGRA_124_SOC)   += clk-tegra124.o
 obj-$(CONFIG_TEGRA_CLK_DFLL)   += clk-tegra124-dfll-fcpu.o
-obj-$(CONFIG_TEGRA124_EMC) += clk-tegra124-emc.o
+obj-$(CONFIG_TEGRA124_CLK_EMC) += clk-tegra124-emc.o
 obj-$(CONFIG_ARCH_TEGRA_132_SOC)   += clk-tegra124.o
 obj-y  += cvb.o
 obj-$(CONFIG_ARCH_TEGRA_210_SOC)   += clk-tegra210.o
diff --git a/drivers/clk/tegra/clk-tegra124-emc.c 
b/drivers/clk/tegra/clk-tegra124-emc.c
index 745f9faa98d8..bdf6f4a51617 100644
--- a/drivers/clk/tegra/clk-tegra124-emc.c
+++ b/drivers/clk/tegra/clk-tegra124-emc.c
@@ -11,7 +11,9 @@
 #include 
 #include 
 #include 
+#include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -21,7 +23,6 @@
 #include 
 
 #include 
-#include 
 
 #include "clk.h"
 
@@ -80,6 +81,9 @@ struct tegra_clk_emc {
int num_timings;
struct emc_timing *timings;
spinlock_t *lock;
+
+   tegra124_emc_prepare_timing_change_cb *prepare_timing_change;
+   tegra124_emc_complete_timing_change_cb *complete_timing_change;
 };
 
 /* Common clock framework callback implementations */
@@ -176,6 +180,9 @@ static struct tegra_emc *emc_ensure_emc_driver(struct 
tegra_clk_emc *tegra)
if (tegra->emc)
return tegra->emc;
 
+   if (!tegra->prepare_timing_change || !tegra->complete_timing_change)
+   return NULL;
+
if (!tegra->emc_node)
return NULL;
 
@@ -241,7 +248,7 @@ static int emc_set_timing(struct tegra_clk_emc *tegra,
 
div = timing->parent_rate / (timing->rate / 2) - 2;
 
-   err = tegra_emc_prepare_timing_change(emc, timing->rate);
+   err = tegra->prepare_timing_change(emc, timing->rate);
if (err)
return err;
 
@@ -259,7 +266,7 @@ static int emc_set_timing(struct tegra_clk_emc *tegra,
 
spin_unlock_irqrestore(tegra->lock, flags);
 
-   tegra_emc_complete_timing_change(emc, timing->rate);
+   tegra->complete_timing_change(emc, timing->rate);
 
clk_hw_reparent(&tegra->hw, __clk_get_hw(timing->parent));
clk_disable_unprepare(tegra->prev_parent);
@@ -473,8 +480,8 @@ static const struct clk_ops tegra_clk_emc_ops = {
.get_parent = emc_get_parent,
 };
 
-struct clk *tegra_clk_register_emc(void __iomem *base, struct device_node *np,
-  spinlock_t *lock)
+struct clk *tegra124_clk_register_emc(void __iomem *base, struct device_node 
*np,
+ spinlock_t *lock)
 {
struct tegra_clk_emc *tegra;
struct clk_init_data init;
@@ -538,3 +545,27 @@ struct clk *tegra_clk_register_emc(void __iomem *base, 
struct device_node *np,
 
return clk;
 };
+
+void tegra124_clk_set_emc_callbacks(tegra124_emc_prepare_timing_change_cb 
*prep_cb,
+   tegra124_emc_complete_timing_change_cb 
*complete_cb)
+{
+   struct clk *clk = __clk_lookup("emc");
+   struct tegra_clk_emc *tegra;
+   struct clk_hw *hw;
+
+   if (clk) {
+   hw = __clk_get_hw(clk);
+   tegra = container_of(hw, struct tegra_clk_emc, hw);
+
+   tegra->prepare_timing_change = prep_cb;
+   tegra->complete_timing_change = complete_cb;
+ 

[PATCH v11 03/10] memory: tegra30: Support interconnect framework

[Dmitry Osipenko]

Now Internal and External memory controllers are memory interconnection
providers. This allows us to use interconnect API for tuning of memory
configuration. EMC driver now supports OPPs and DVFS. MC driver now
supports tuning of memory arbitration latency, which needs to be done
for ISO memory clients, like a Display client for example.

Tested-by: Peter Geis 
Acked-by: Georgi Djakov 
Signed-off-by: Dmitry Osipenko 
---
 drivers/memory/tegra/Kconfig   |   1 +
 drivers/memory/tegra/tegra30-emc.c | 344 +++--
 drivers/memory/tegra/tegra30.c | 173 ++-
 3 files changed, 496 insertions(+), 22 deletions(-)

diff --git a/drivers/memory/tegra/Kconfig b/drivers/memory/tegra/Kconfig
index 2a4a16bcf91c..ca7077a06f4c 100644
--- a/drivers/memory/tegra/Kconfig
+++ b/drivers/memory/tegra/Kconfig
@@ -24,6 +24,7 @@ config TEGRA30_EMC
tristate "NVIDIA Tegra30 External Memory Controller driver"
default y
depends on TEGRA_MC && ARCH_TEGRA_3x_SOC
+   select PM_OPP
help
  This driver is for the External Memory Controller (EMC) found on
  Tegra30 chips. The EMC controls the external DRAM on the board.
diff --git a/drivers/memory/tegra/tegra30-emc.c 
b/drivers/memory/tegra/tegra30-emc.c
index 93f9002d32ad..44ac155936aa 100644
--- a/drivers/memory/tegra/tegra30-emc.c
+++ b/drivers/memory/tegra/tegra30-emc.c
@@ -14,16 +14,21 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 
+#include 
 #include 
 
 #include "mc.h"
@@ -323,9 +328,21 @@ struct emc_timing {
bool emc_cfg_dyn_self_ref;
 };
 
+enum emc_rate_request_type {
+   EMC_RATE_DEBUG,
+   EMC_RATE_ICC,
+   EMC_RATE_TYPE_MAX,
+};
+
+struct emc_rate_request {
+   unsigned long min_rate;
+   unsigned long max_rate;
+};
+
 struct tegra_emc {
struct device *dev;
struct tegra_mc *mc;
+   struct icc_provider provider;
struct notifier_block clk_nb;
struct clk *clk;
void __iomem *regs;
@@ -352,6 +369,15 @@ struct tegra_emc {
unsigned long min_rate;
unsigned long max_rate;
} debugfs;
+
+   /*
+* There are multiple sources in the EMC driver which could request
+* a min/max clock rate, these rates are contained in this array.
+*/
+   struct emc_rate_request requested_rate[EMC_RATE_TYPE_MAX];
+
+   /* protect shared rate-change code path */
+   struct mutex rate_lock;
 };
 
 static int emc_seq_update_timing(struct tegra_emc *emc)
@@ -1094,6 +1120,83 @@ static long emc_round_rate(unsigned long rate,
return timing->rate;
 }
 
+static void tegra_emc_rate_requests_init(struct tegra_emc *emc)
+{
+   unsigned int i;
+
+   for (i = 0; i < EMC_RATE_TYPE_MAX; i++) {
+   emc->requested_rate[i].min_rate = 0;
+   emc->requested_rate[i].max_rate = ULONG_MAX;
+   }
+}
+
+static int emc_request_rate(struct tegra_emc *emc,
+   unsigned long new_min_rate,
+   unsigned long new_max_rate,
+   enum emc_rate_request_type type)
+{
+   struct emc_rate_request *req = emc->requested_rate;
+   unsigned long min_rate = 0, max_rate = ULONG_MAX;
+   unsigned int i;
+   int err;
+
+   /* select minimum and maximum rates among the requested rates */
+   for (i = 0; i < EMC_RATE_TYPE_MAX; i++, req++) {
+   if (i == type) {
+   min_rate = max(new_min_rate, min_rate);
+   max_rate = min(new_max_rate, max_rate);
+   } else {
+   min_rate = max(req->min_rate, min_rate);
+   max_rate = min(req->max_rate, max_rate);
+   }
+   }
+
+   if (min_rate > max_rate) {
+   dev_err_ratelimited(emc->dev, "%s: type %u: out of range: %lu 
%lu\n",
+   __func__, type, min_rate, max_rate);
+   return -ERANGE;
+   }
+
+   /*
+* EMC rate-changes should go via OPP API because it manages voltage
+* changes.
+*/
+   err = dev_pm_opp_set_rate(emc->dev, min_rate);
+   if (err)
+   return err;
+
+   emc->requested_rate[type].min_rate = new_min_rate;
+   emc->requested_rate[type].max_rate = new_max_rate;
+
+   return 0;
+}
+
+static int emc_set_min_rate(struct tegra_emc *emc, unsigned long rate,
+   enum emc_rate_request_type type)
+{
+   struct emc_rate_request *req = &emc->requested_rate[type];
+   int ret;
+
+   mutex_lock(&emc->rate_lock);
+   ret = emc_request_rate(emc, rate, req->max_rate, type);
+   mutex_unlock(&emc->rate_lock);
+
+   return ret;
+}
+
+static int emc_set_max_rate(struct tegra_emc *emc, unsigned long rate,
+   en

[PATCH drm/hisilicon 0/3] support reading resolutions from EDID

[Tian Tao]

patch #1 add a new file to implements i2c adapters, #2 read the
resolution from the edid, if that fails, set the resolution to fixed.
patch #3 update the destroy callback function to release the i2c adapters.

Tian Tao (3):
  drm/hisilicon: Support i2c driver algorithms for bit-shift adapters
  drm/hisilicon: Features to support reading resolutions from EDID
  drm/hisilicon: Releasing Resources in the Destroy callback Function

 drivers/gpu/drm/hisilicon/hibmc/Makefile |  2 +-
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h  | 21 -
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c  | 98 
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c | 45 +--
 4 files changed, 157 insertions(+), 9 deletions(-)
 create mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c

-- 
2.7.4

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[PATCH 1/2] drm/hisilicon: Use managed mode-config init

[Tian Tao]

Using drmm_mode_config_init() sets up managed release of modesetting
resources.
Signed-off-by: Tian Tao 
---
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 13 +++--
 1 file changed, 3 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
index 5aea2e9..04fee18 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
@@ -82,7 +82,9 @@ static int hibmc_kms_init(struct hibmc_drm_private *priv)
struct drm_device *dev = &priv->dev;
int ret;
 
-   drm_mode_config_init(dev);
+   ret = drmm_mode_config_init(dev);
+   if (ret)
+   return ret;
priv->mode_config_initialized = true;
 
dev->mode_config.min_width = 0;
@@ -111,14 +113,6 @@ static int hibmc_kms_init(struct hibmc_drm_private *priv)
return 0;
 }
 
-static void hibmc_kms_fini(struct hibmc_drm_private *priv)
-{
-   if (priv->mode_config_initialized) {
-   drm_mode_config_cleanup(&priv->dev);
-   priv->mode_config_initialized = false;
-   }
-}
-
 /*
  * It can operate in one of three modes: 0, 1 or Sleep.
  */
@@ -248,7 +242,6 @@ static int hibmc_unload(struct drm_device *dev)
drm_atomic_helper_shutdown(dev);
 
pci_disable_msi(dev->pdev);
-   hibmc_kms_fini(priv);
dev->dev_private = NULL;
return 0;
 }
-- 
2.7.4

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[PATCH] drm: Allow drm_fourcc.h without including drm.h

[James Park]

Add DRM_FOURCC_STANDALONE guard to skip drm.h dependency.

This will allow Mesa to port code to Windows more easily.

Signed-off-by: James Park 

James Park (1):
  drm: Allow drm_fourcc.h without including drm.h

 include/uapi/drm/drm_fourcc.h | 6 ++
 1 file changed, 6 insertions(+)

-- 
2.7.4

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[PATCH 4/4] phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support

[Liu Ying]

i.MX8qxp SoC embeds a Mixel MIPI DPHY + LVDS PHY combo which supports
either a MIPI DSI display or a LVDS display.  The PHY mode is controlled
by SCU firmware and the driver would call a SCU firmware function to
configure the PHY mode.  The single LVDS PHY has 4 data lanes to support
a LVDS display.  Also, with a master LVDS PHY and a slave LVDS PHY, they
may work together to support a LVDS display with 8 data lanes(usually, dual
LVDS link display).  Note that this patch supports the LVDS PHY mode only
for the i.MX8qxp Mixel combo PHY, i.e., the MIPI DPHY mode is yet to be
supported, so for now error would be returned from ->set_mode() if MIPI
DPHY mode is passed over to it for the combo PHY.

Cc: Guido Günther 
Cc: Robert Chiras 
Cc: Kishon Vijay Abraham I 
Cc: Vinod Koul 
Cc: Shawn Guo 
Cc: Sascha Hauer 
Cc: Pengutronix Kernel Team 
Cc: Fabio Estevam 
Cc: NXP Linux Team 
Signed-off-by: Liu Ying 
---
 drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c | 266 -
 1 file changed, 255 insertions(+), 11 deletions(-)

diff --git a/drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c 
b/drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c
index a95572b..37084a9 100644
--- a/drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c
+++ b/drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c
@@ -4,17 +4,31 @@
  * Copyright 2019 Purism SPC
  */
 
+#include 
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
+
+/* Control and Status Registers(CSR) */
+#define PHY_CTRL   0x00
+#define  CCM_MASK  GENMASK(7, 5)
+#define  CCM(n)FIELD_PREP(CCM_MASK, (n))
+#define  CA_MASK   GENMASK(4, 2)
+#define  CA(n) FIELD_PREP(CA_MASK, (n))
+#define  RFB   BIT(1)
+#define  LVDS_EN   BIT(0)
 
 /* DPHY registers */
 #define DPHY_PD_DPHY   0x00
@@ -55,8 +69,15 @@
 #define PWR_ON 0
 #define PWR_OFF1
 
+#define MIN_VCO_FREQ 64000
+#define MAX_VCO_FREQ 15
+
+#define MIN_LVDS_REFCLK_FREQ 2400
+#define MAX_LVDS_REFCLK_FREQ 15000
+
 enum mixel_dphy_devtype {
MIXEL_IMX8MQ,
+   MIXEL_IMX8QXP,
 };
 
 struct mixel_dphy_devdata {
@@ -65,6 +86,7 @@ struct mixel_dphy_devdata {
u8 reg_rxlprp;
u8 reg_rxcdrp;
u8 reg_rxhs_settle;
+   bool is_combo;  /* MIPI DPHY and LVDS PHY combo */
 };
 
 static const struct mixel_dphy_devdata mixel_dphy_devdata[] = {
@@ -74,6 +96,10 @@ static const struct mixel_dphy_devdata mixel_dphy_devdata[] 
= {
.reg_rxlprp = 0x40,
.reg_rxcdrp = 0x44,
.reg_rxhs_settle = 0x48,
+   .is_combo = false,
+   },
+   [MIXEL_IMX8QXP] = {
+   .is_combo = true,
},
 };
 
@@ -95,8 +121,12 @@ struct mixel_dphy_cfg {
 struct mixel_dphy_priv {
struct mixel_dphy_cfg cfg;
struct regmap *regmap;
+   struct regmap *lvds_regmap;
struct clk *phy_ref_clk;
const struct mixel_dphy_devdata *devdata;
+   struct imx_sc_ipc *ipc_handle;
+   bool is_slave;
+   int id;
 };
 
 static const struct regmap_config mixel_dphy_regmap_config = {
@@ -317,7 +347,8 @@ static int mixel_dphy_set_pll_params(struct phy *phy)
return 0;
 }
 
-static int mixel_dphy_configure(struct phy *phy, union phy_configure_opts 
*opts)
+static int
+mixel_dphy_configure_mipi_dphy(struct phy *phy, union phy_configure_opts *opts)
 {
struct mixel_dphy_priv *priv = phy_get_drvdata(phy);
struct mixel_dphy_cfg cfg = { 0 };
@@ -345,15 +376,118 @@ static int mixel_dphy_configure(struct phy *phy, union 
phy_configure_opts *opts)
return 0;
 }
 
+static int
+mixel_dphy_configure_lvds_phy(struct phy *phy, union phy_configure_opts *opts)
+{
+   struct mixel_dphy_priv *priv = phy_get_drvdata(phy);
+   struct phy_configure_opts_lvds *lvds_opts = &opts->lvds;
+   unsigned long data_rate;
+   unsigned long fvco;
+   u32 rsc;
+   u32 co;
+   int ret;
+
+   priv->is_slave = lvds_opts->is_slave;
+
+   /* LVDS interface pins */
+   regmap_write(priv->lvds_regmap, PHY_CTRL, CCM(0x5) | CA(0x4) | RFB);
+
+   /* enable MODE8 only for slave LVDS PHY */
+   rsc = priv->id ? IMX_SC_R_MIPI_1 : IMX_SC_R_MIPI_0;
+   ret = imx_sc_misc_set_control(priv->ipc_handle, rsc, IMX_SC_C_DUAL_MODE,
+ lvds_opts->is_slave);
+   if (ret) {
+   dev_err(&phy->dev, "Failed to configure MODE8: %d\n", ret);
+   return ret;
+   }
+
+   /*
+* Choose an appropriate divider ratio to meet the requirement of
+* PLL VCO frequency range.
+*
+*  -  640MHz ~ 1500MHz     ---
+* | VCO | > | CO divider | -> | LVDS data rate|
+*  --

[PATCH v2] drm/hisilicon: Delete the entire file hibmc_ttm.c

[Tian Tao]

Delete the entire file hibmc_ttm.c. drmm_vram_helper_init() can be
called directly from hibmc_load(). hibmc_dumb_create() and
hibmc_mode_funcs can go to hibmc_drm_drv.c

v2:
change Deletted to Delete

Signed-off-by: Tian Tao 
Reviewed-by: Thomas Zimmermann 
---
 drivers/gpu/drm/hisilicon/hibmc/Makefile|  2 +-
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 21 ++-
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h |  4 --
 drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c | 50 -
 4 files changed, 20 insertions(+), 57 deletions(-)
 delete mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c

diff --git a/drivers/gpu/drm/hisilicon/hibmc/Makefile 
b/drivers/gpu/drm/hisilicon/hibmc/Makefile
index 684ef79..d25c75e 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/Makefile
+++ b/drivers/gpu/drm/hisilicon/hibmc/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0-only
-hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_de.o hibmc_drm_vdac.o hibmc_ttm.o 
hibmc_drm_i2c.o
+hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_de.o hibmc_drm_vdac.o hibmc_drm_i2c.o
 
 obj-$(CONFIG_DRM_HISI_HIBMC) += hibmc-drm.o
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
index 5aea2e9..3687753 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
@@ -16,6 +16,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -43,6 +44,12 @@ static irqreturn_t hibmc_drm_interrupt(int irq, void *arg)
return IRQ_HANDLED;
 }
 
+static int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev,
+struct drm_mode_create_dumb *args)
+{
+   return drm_gem_vram_fill_create_dumb(file, dev, 0, 128, args);
+}
+
 static const struct drm_driver hibmc_driver = {
.driver_features= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
.fops   = &hibmc_fops,
@@ -77,6 +84,13 @@ static const struct dev_pm_ops hibmc_pm_ops = {
hibmc_pm_resume)
 };
 
+static const struct drm_mode_config_funcs hibmc_mode_funcs = {
+   .mode_valid = drm_vram_helper_mode_valid,
+   .atomic_check = drm_atomic_helper_check,
+   .atomic_commit = drm_atomic_helper_commit,
+   .fb_create = drm_gem_fb_create,
+};
+
 static int hibmc_kms_init(struct hibmc_drm_private *priv)
 {
struct drm_device *dev = &priv->dev;
@@ -262,9 +276,12 @@ static int hibmc_load(struct drm_device *dev)
if (ret)
goto err;
 
-   ret = hibmc_mm_init(priv);
-   if (ret)
+   ret = drmm_vram_helper_init(dev, pci_resource_start(dev->pdev, 0),
+   priv->fb_size);
+   if (ret) {
+   drm_err(dev, "Error initializing VRAM MM; %d\n", ret);
goto err;
+   }
 
ret = hibmc_kms_init(priv);
if (ret)
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
index 2786de5..a49c10e 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
@@ -64,10 +64,6 @@ int hibmc_de_init(struct hibmc_drm_private *priv);
 int hibmc_vdac_init(struct hibmc_drm_private *priv);
 
 int hibmc_mm_init(struct hibmc_drm_private *hibmc);
-int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev,
- struct drm_mode_create_dumb *args);
 int hibmc_ddc_create(struct drm_device *drm_dev, struct hibmc_connector 
*connector);
 
-extern const struct drm_mode_config_funcs hibmc_mode_funcs;
-
 #endif
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
deleted file mode 100644
index 892d566..000
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
+++ /dev/null
@@ -1,50 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/* Hisilicon Hibmc SoC drm driver
- *
- * Based on the bochs drm driver.
- *
- * Copyright (c) 2016 Huawei Limited.
- *
- * Author:
- * Rongrong Zou 
- * Rongrong Zou 
- * Jianhua Li 
- */
-
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include "hibmc_drm_drv.h"
-
-int hibmc_mm_init(struct hibmc_drm_private *hibmc)
-{
-   int ret;
-   struct drm_device *dev = &hibmc->dev;
-
-   ret = drmm_vram_helper_init(dev, pci_resource_start(dev->pdev, 0),
-   hibmc->fb_size);
-   if (ret) {
-   drm_err(dev, "Error initializing VRAM MM; %d\n", ret);
-   return ret;
-   }
-
-   return 0;
-}
-
-int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev,
- struct drm_mode_create_dumb *args)
-{
-   return drm_gem_vram_fill_create_dumb(file, dev, 0, 128, args);
-}
-
-const struct drm_mode_config_funcs hibmc_mode_funcs = {
-   .mode_valid = drm_vram_helper_mode_valid,
-   .atomic_check = drm_atomic_helper_ch

[PATCH 2/2] drm/hisilicon: Deletted unused local parameters

[Tian Tao]

deletted unused variable ‘priv’.

Signed-off-by: Tian Tao 
---
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 5 +
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
index 04fee18..8a04014 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
@@ -237,12 +237,9 @@ static int hibmc_hw_init(struct hibmc_drm_private *priv)
 
 static int hibmc_unload(struct drm_device *dev)
 {
-   struct hibmc_drm_private *priv = to_hibmc_drm_private(dev);
-
drm_atomic_helper_shutdown(dev);
-
pci_disable_msi(dev->pdev);
-   dev->dev_private = NULL;
+
return 0;
 }
 
-- 
2.7.4

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Re: [PATCH v2 2/5] thermal: devfreq_cooling: get a copy of device status

[Lukasz Luba]

On 12/3/20 1:09 PM, Daniel Lezcano wrote:

On 18/11/2020 13:03, Lukasz Luba wrote:

Devfreq cooling needs to now the correct status of the device in order
to operate. Do not rely on Devfreq last_status which might be a stale data
and get more up-to-date values of the load.

Devfreq framework can change the device status in the background. To
mitigate this situation make a copy of the status structure and use it
for internal calculations.

In addition this patch adds normalization function, which also makes sure
that whatever data comes from the device, it is in a sane range.

Signed-off-by: Lukasz Luba 
---
  drivers/thermal/devfreq_cooling.c | 52 +--
  1 file changed, 43 insertions(+), 9 deletions(-)

diff --git a/drivers/thermal/devfreq_cooling.c 
b/drivers/thermal/devfreq_cooling.c
index 659c0143c9f0..925523694462 100644
--- a/drivers/thermal/devfreq_cooling.c
+++ b/drivers/thermal/devfreq_cooling.c
@@ -227,20 +227,46 @@ static inline unsigned long get_total_power(struct 
devfreq_cooling_device *dfc,
   voltage);
  }
  
+static void _normalize_load(struct devfreq_dev_status *status)

+{
+   /* Make some space if needed */
+   if (status->busy_time > 0x) {
+   status->busy_time >>= 10;
+   status->total_time >>= 10;
+   }
+
+   if (status->busy_time > status->total_time)
+   status->busy_time = status->total_time;


How the condition above is possible?


They should, be checked by the driver, but I cannot trust
and have to check for all corner cases: (div by 0, overflow
one of them, etc). The busy_time and total_time are unsigned long,
which means 4B on 32bit machines.
If these values are coming from device counters, which count every
busy cycle and total cycles of a clock of a device running at e.g.
1GHz they would overflow every ~4s.

Normally IPA polling are 1s and 100ms, it's platform specific. But there
are also 'empty' periods when IPA sees temperature very low and does not
even call the .get_requested_power() callbacks for the cooling devices,
just grants max freq to all. This is problematic. I am investigating it
and will propose a solution for IPA soon.

I would avoid all of this if devfreq core would have default for all
devices a reliable polling timer... Let me check some possibilities also
for this case.




+   status->busy_time *= 100;
+   status->busy_time /= status->total_time ? : 1;
+
+   /* Avoid division by 0 */
+   status->busy_time = status->busy_time ? : 1;
+   status->total_time = 100;


Why not base the normalization on 1024? and use an intermediate u64.


You are the 2nd reviewer who is asking this. I tried to keep 'load' as
in range [0, 100] since we also have 'load' in cpufreq cooling in this
range. Maybe I should switch to 1024 (Ionela was also asking for this).



For example:

static u32 _normalize_load(struct devfreq_dev_status *status)
{
u64 load = 0;

/* Prevent divison by zero */
if (!status->busy_time)
return 0;

/*
 * Assuming status->total_time is always greater or equal
 * to status->busy_time, it can not be equal to zero because
 * of the test above
 */
load = status->busy_time * 1024;
load /= status->total_time;


I wanted to avoid any divisions which involve 64bit var on 32bit
machine.



/*
 * load is always [1..1024[, so it can not be truncated by a
 * u64 -> u32 coercive cast
 */
return (u32)load;
}



+}
  
  static int devfreq_cooling_get_requested_power(struct thermal_cooling_device *cdev,

   u32 *power)
  {
struct devfreq_cooling_device *dfc = cdev->devdata;
struct devfreq *df = dfc->devfreq;
-   struct devfreq_dev_status *status = &df->last_status;
+   struct devfreq_dev_status status;
unsigned long state;
-   unsigned long freq = status->current_frequency;
+   unsigned long freq;
unsigned long voltage;
u32 dyn_power = 0;
u32 static_power = 0;
int res;
  
+	mutex_lock(&df->lock);

+   res = df->profile->get_dev_status(df->dev.parent, &status);
+   mutex_unlock(&df->lock);
+   if (res)
+   return res;
+
+   freq = status.current_frequency;
+
state = freq_get_state(dfc, freq);
if (state == THERMAL_CSTATE_INVALID) {
res = -EAGAIN;
@@ -268,16 +294,18 @@ static int devfreq_cooling_get_requested_power(struct 
thermal_cooling_device *cd
} else {
dyn_power = dfc->power_table[state];
  
+		_normalize_load(&status);


load = _normalize_load(&status);


+
/* Scale dynamic power for utilization */
-   dyn_power *= status->busy_time;
-   dyn_power /= status->total_time;
+   dyn_power *= status.busy_time;
+

Re: [PATCH v2 3/5] thermal: devfreq_cooling: add new registration functions with Energy Model

[Daniel Lezcano]

On 18/11/2020 13:03, Lukasz Luba wrote:
> The Energy Model (EM) framework supports devices such as Devfreq. Create
> new registration functions which automatically register EM for the thermal
> devfreq_cooling devices. This patch prepares the code for coming changes
> which are going to replace old power model with the new EM.
> 
> Signed-off-by: Lukasz Luba 
> ---
>  drivers/thermal/devfreq_cooling.c | 99 ++-
>  include/linux/devfreq_cooling.h   | 22 +++
>  2 files changed, 120 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/thermal/devfreq_cooling.c 
> b/drivers/thermal/devfreq_cooling.c
> index 925523694462..b354271742c5 100644
> --- a/drivers/thermal/devfreq_cooling.c
> +++ b/drivers/thermal/devfreq_cooling.c
> @@ -50,6 +50,8 @@ static DEFINE_IDA(devfreq_ida);
>   * @capped_state:index to cooling state with in dynamic power budget
>   * @req_max_freq:PM QoS request for limiting the maximum frequency
>   *   of the devfreq device.
> + * @em:  Energy Model for the associated Devfreq device
> + * @em_registered:   Devfreq cooling registered the EM and should free it.
>   */
>  struct devfreq_cooling_device {
>   int id;
> @@ -63,6 +65,8 @@ struct devfreq_cooling_device {
>   u32 res_util;
>   int capped_state;
>   struct dev_pm_qos_request req_max_freq;
> + struct em_perf_domain *em;

This pointer is not needed, it is in the struct device.

> + bool em_registered;

The boolean em_registered is not needed because of the test in the
function em_dev_unregister_perf_domain():

if (IS_ERR_OR_NULL(dev) || !dev->em_pd)
return;

Logically if the 'em' was not initialized, it must be NULL, the
corresponding struct device was zero-allocated.


>  };
>  
>  static int devfreq_cooling_get_max_state(struct thermal_cooling_device *cdev,
> @@ -583,22 +587,115 @@ struct thermal_cooling_device 
> *devfreq_cooling_register(struct devfreq *df)
>  }
>  EXPORT_SYMBOL_GPL(devfreq_cooling_register);
>  
> +/**
> + * devfreq_cooling_em_register_power() - Register devfreq cooling device with
> + *   power information and attempt to register Energy Model (EM)
> + * @df:  Pointer to devfreq device.
> + * @dfc_power:   Pointer to devfreq_cooling_power.
> + * @em_cb:   Callback functions providing the data of the EM
> + *
> + * Register a devfreq cooling device and attempt to register Energy Model. 
> The
> + * available OPPs must be registered for the device.
> + *
> + * If @dfc_power is provided, the cooling device is registered with the
> + * power extensions. If @em_cb is provided it will be called for each OPP to
> + * calculate power value and cost. If @em_cb is not provided then simple 
> Energy
> + * Model is going to be used, which requires "dynamic-power-coefficient" a
> + * devicetree property.
> + */
> +struct thermal_cooling_device *
> +devfreq_cooling_em_register_power(struct devfreq *df,
> +   struct devfreq_cooling_power *dfc_power,
> +   struct em_data_callback *em_cb)
> +{
> + struct thermal_cooling_device *cdev;
> + struct devfreq_cooling_device *dfc;
> + struct device_node *np = NULL;
> + struct device *dev;
> + int nr_opp, ret;
> +
> + if (IS_ERR_OR_NULL(df))
> + return ERR_PTR(-EINVAL);
> +
> + dev = df->dev.parent;

Why the parent ?

> +
> + if (em_cb) {
> + nr_opp = dev_pm_opp_get_opp_count(dev);
> + if (nr_opp <= 0) {
> + dev_err(dev, "No valid OPPs found\n");
> + return ERR_PTR(-EINVAL);
> + }
> +
> + ret = em_dev_register_perf_domain(dev, nr_opp, em_cb, NULL, 
> false);
> + } else {
> + ret = dev_pm_opp_of_register_em(dev, NULL);
> + }
> +
> + if (ret)
> + dev_warn(dev, "Unable to register EM for devfreq cooling device 
> (%d)\n",
> +  ret);
> +
> + if (dev->of_node)
> + np = of_node_get(dev->of_node);
> +
> + cdev = of_devfreq_cooling_register_power(np, df, dfc_power);
> +
> + if (np)
> + of_node_put(np);> +
> + if (IS_ERR_OR_NULL(cdev)) {
> + if (!ret)
> + em_dev_unregister_perf_domain(dev);
> + } else {
> + dfc = cdev->devdata;
> + dfc->em_registered = !ret;
> + }
> +
> + return cdev;
> +}
> +EXPORT_SYMBOL_GPL(devfreq_cooling_em_register_power);
> +
> +/**
> + * devfreq_cooling_em_register() - Register devfreq cooling device together
> + *   with Energy Model.
> + * @df:  Pointer to devfreq device.
> + * @em_cb:   Callback functions providing the data of the Energy Model
> + *
> + * This function attempts to register Energy Model for devfreq device and 
> then
> + * register the devfreq cooling device.
> + */
> +struct thermal_cooling_device *
> +devfreq_cooling_em_register(struct devfreq

[PATCH v3 1/3] drm: bridge: cdns-mhdp8546: Modify atomic_get_input_bus_format bridge function

[Yuti Amonkar]

Modify atomic_get_input_bus_format function to return input formats
supported instead of using hardcoded value.

Signed-off-by: Yuti Amonkar 
---
 .../drm/bridge/cadence/cdns-mhdp8546-core.c   | 83 +--
 1 file changed, 74 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c 
b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
index d0ed950f4f87..5ef6adb8bc82 100644
--- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
@@ -2095,27 +2095,92 @@ cdns_mhdp_bridge_atomic_reset(struct drm_bridge *bridge)
return &cdns_mhdp_state->base;
 }
 
+#define MAX_INPUT_FORMAT 11
+
 static u32 *cdns_mhdp_get_input_bus_fmts(struct drm_bridge *bridge,
- struct drm_bridge_state *bridge_state,
- struct drm_crtc_state *crtc_state,
- struct drm_connector_state *conn_state,
- u32 output_fmt,
- unsigned int *num_input_fmts)
-{
+struct drm_bridge_state *bridge_state,
+struct drm_crtc_state *crtc_state,
+struct drm_connector_state *conn_state,
+u32 output_fmt,
+unsigned int *num_input_fmts)
+{
+   struct drm_connector *conn = conn_state->connector;
+   struct drm_display_info *info = &conn->display_info;
u32 *input_fmts;
u32 default_bus_format = MEDIA_BUS_FMT_RGB121212_1X36;
+   unsigned int i = 0;
 
*num_input_fmts = 0;
 
if (output_fmt != MEDIA_BUS_FMT_FIXED)
return NULL;
 
-   input_fmts = kzalloc(sizeof(*input_fmts), GFP_KERNEL);
+   input_fmts = kcalloc(MAX_INPUT_FORMAT,
+sizeof(*input_fmts), GFP_KERNEL);
if (!input_fmts)
return NULL;
 
-   *num_input_fmts = 1;
-   input_fmts[0] = default_bus_format;
+   input_fmts[i++] = default_bus_format;
+
+   if (info->color_formats & DRM_COLOR_FORMAT_RGB444) {
+   if (info->bpc == 16) {
+   input_fmts[i++] = MEDIA_BUS_FMT_RGB161616_1X48;
+   input_fmts[i++] = MEDIA_BUS_FMT_RGB101010_1X30;
+   input_fmts[i++] = MEDIA_BUS_FMT_RGB888_1X24;
+   }
+
+   if (info->bpc == 12) {
+   input_fmts[i++] = MEDIA_BUS_FMT_RGB101010_1X30;
+   input_fmts[i++] = MEDIA_BUS_FMT_RGB888_1X24;
+   }
+
+   if (info->bpc == 10) {
+   input_fmts[i++] = MEDIA_BUS_FMT_RGB101010_1X30;
+   input_fmts[i++] = MEDIA_BUS_FMT_RGB888_1X24;
+   }
+
+   input_fmts[i++] = MEDIA_BUS_FMT_RGB888_1X24;
+   }
+
+   if (info->color_formats & DRM_COLOR_FORMAT_YCRCB444) {
+   if (info->bpc == 16) {
+   input_fmts[i++] = MEDIA_BUS_FMT_YUV16_1X48;
+   input_fmts[i++] = MEDIA_BUS_FMT_YUV12_1X36;
+   input_fmts[i++] = MEDIA_BUS_FMT_YUV10_1X30;
+   input_fmts[i++] = MEDIA_BUS_FMT_YUV8_1X24;
+   }
+
+   if (info->bpc == 12) {
+   input_fmts[i++] = MEDIA_BUS_FMT_YUV12_1X36;
+   input_fmts[i++] = MEDIA_BUS_FMT_YUV10_1X30;
+   input_fmts[i++] = MEDIA_BUS_FMT_YUV8_1X24;
+   }
+
+   if (info->bpc == 10) {
+   input_fmts[i++] = MEDIA_BUS_FMT_YUV10_1X30;
+   input_fmts[i++] = MEDIA_BUS_FMT_YUV8_1X24;
+   }
+
+   input_fmts[i++] = MEDIA_BUS_FMT_YUV8_1X24;
+   }
+
+   if (info->color_formats & DRM_COLOR_FORMAT_YCRCB422) {
+   if (info->bpc == 12) {
+   input_fmts[i++] = MEDIA_BUS_FMT_UYVY12_1X24;
+   input_fmts[i++] = MEDIA_BUS_FMT_UYVY10_1X20;
+   input_fmts[i++] = MEDIA_BUS_FMT_UYVY8_1X16;
+   }
+
+   if (info->bpc == 10) {
+   input_fmts[i++] = MEDIA_BUS_FMT_UYVY10_1X20;
+   input_fmts[i++] = MEDIA_BUS_FMT_UYVY8_1X16;
+   }
+
+   input_fmts[i++] = MEDIA_BUS_FMT_UYVY8_1X16;
+   }
+
+   *num_input_fmts = i;
+
return input_fmts;
 }
 
-- 
2.17.1

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[PATCH 4/8] drm/vc4: dsi: Introduce a variant structure

[Maxime Ripard]

Most of the differences between DSI0 and DSI1 are handled through the
ID. However, the BCM2711 DSI is going to introduce one more variable to
the mix and will break some expectations of the earlier, simpler, test.

Let's add a variant structure that will address most of the differences
between those three controllers.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/vc4/vc4_dsi.c | 63 ---
 1 file changed, 37 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c
index f704d959e65b..601020c10053 100644
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
@@ -493,6 +493,18 @@
  */
 #define DSI1_ID0x8c
 
+struct vc4_dsi_variant {
+   /* Whether we're on bcm2835's DSI0 or DSI1. */
+   unsigned int port;
+
+   bool broken_axi_workaround;
+
+   const char *debugfs_name;
+   const struct debugfs_reg32 *regs;
+   size_t nregs;
+
+};
+
 /* General DSI hardware state. */
 struct vc4_dsi {
struct platform_device *pdev;
@@ -509,8 +521,7 @@ struct vc4_dsi {
u32 *reg_dma_mem;
dma_addr_t reg_paddr;
 
-   /* Whether we're on bcm2835's DSI0 or DSI1. */
-   int port;
+   const struct vc4_dsi_variant *variant;
 
/* DSI channel for the panel we're connected to. */
u32 channel;
@@ -586,10 +597,10 @@ dsi_dma_workaround_write(struct vc4_dsi *dsi, u32 offset, 
u32 val)
 #define DSI_READ(offset) readl(dsi->regs + (offset))
 #define DSI_WRITE(offset, val) dsi_dma_workaround_write(dsi, offset, val)
 #define DSI_PORT_READ(offset) \
-   DSI_READ(dsi->port ? DSI1_##offset : DSI0_##offset)
+   DSI_READ(dsi->variant->port ? DSI1_##offset : DSI0_##offset)
 #define DSI_PORT_WRITE(offset, val) \
-   DSI_WRITE(dsi->port ? DSI1_##offset : DSI0_##offset, val)
-#define DSI_PORT_BIT(bit) (dsi->port ? DSI1_##bit : DSI0_##bit)
+   DSI_WRITE(dsi->variant->port ? DSI1_##offset : DSI0_##offset, val)
+#define DSI_PORT_BIT(bit) (dsi->variant->port ? DSI1_##bit : DSI0_##bit)
 
 /* VC4 DSI encoder KMS struct */
 struct vc4_dsi_encoder {
@@ -837,7 +848,7 @@ static void vc4_dsi_encoder_enable(struct drm_encoder 
*encoder)
 
ret = pm_runtime_get_sync(dev);
if (ret) {
-   DRM_ERROR("Failed to runtime PM enable on DSI%d\n", dsi->port);
+   DRM_ERROR("Failed to runtime PM enable on DSI%d\n", 
dsi->variant->port);
return;
}
 
@@ -871,7 +882,7 @@ static void vc4_dsi_encoder_enable(struct drm_encoder 
*encoder)
DSI_PORT_WRITE(STAT, DSI_PORT_READ(STAT));
 
/* Set AFE CTR00/CTR1 to release powerdown of analog. */
-   if (dsi->port == 0) {
+   if (dsi->variant->port == 0) {
u32 afec0 = (VC4_SET_FIELD(7, DSI_PHY_AFEC0_PTATADJ) |
 VC4_SET_FIELD(7, DSI_PHY_AFEC0_CTATADJ));
 
@@ -1017,7 +1028,7 @@ static void vc4_dsi_encoder_enable(struct drm_encoder 
*encoder)
   DSI_PORT_BIT(PHYC_CLANE_ENABLE) |
   ((dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ?
0 : DSI_PORT_BIT(PHYC_HS_CLK_CONTINUOUS)) |
-  (dsi->port == 0 ?
+  (dsi->variant->port == 0 ?
VC4_SET_FIELD(lpx - 1, DSI0_PHYC_ESC_CLK_LPDT) :
VC4_SET_FIELD(lpx - 1, DSI1_PHYC_ESC_CLK_LPDT)));
 
@@ -1043,13 +1054,13 @@ static void vc4_dsi_encoder_enable(struct drm_encoder 
*encoder)
   DSI_DISP1_ENABLE);
 
/* Ungate the block. */
-   if (dsi->port == 0)
+   if (dsi->variant->port == 0)
DSI_PORT_WRITE(CTRL, DSI_PORT_READ(CTRL) | DSI0_CTRL_CTRL0);
else
DSI_PORT_WRITE(CTRL, DSI_PORT_READ(CTRL) | DSI1_CTRL_EN);
 
/* Bring AFE out of reset. */
-   if (dsi->port == 0) {
+   if (dsi->variant->port == 0) {
} else {
DSI_PORT_WRITE(PHY_AFEC0,
   DSI_PORT_READ(PHY_AFEC0) &
@@ -1313,8 +1324,16 @@ static const struct drm_encoder_helper_funcs 
vc4_dsi_encoder_helper_funcs = {
.mode_fixup = vc4_dsi_encoder_mode_fixup,
 };
 
+static const struct vc4_dsi_variant bcm2835_dsi1_variant = {
+   .port   = 1,
+   .broken_axi_workaround  = true,
+   .debugfs_name   = "dsi1_regs",
+   .regs   = dsi1_regs,
+   .nregs  = ARRAY_SIZE(dsi1_regs),
+};
+
 static const struct of_device_id vc4_dsi_dt_match[] = {
-   { .compatible = "brcm,bcm2835-dsi1", (void *)(uintptr_t)1 },
+   { .compatible = "brcm,bcm2835-dsi1", &bcm2835_dsi1_variant },
{}
 };
 
@@ -1325,7 +1344,7 @@ static void dsi_handle_error(struct vc4_dsi *dsi,
if (!(stat & bit))
return;
 
-   DRM_ERROR("DSI%d: %s error\n", dsi->port, type);
+   DRM_ERROR("DSI%d: %s error\n", dsi->variant->port, type);
*ret = IRQ_HANDLED

[PATCH v3 3/3] drm: bridge: cdns-mhdp8546: Retrieve the pixel format and bpc based on bus format

[Yuti Amonkar]

Get the pixel format and bpc based on the output bus format
negotiated instead of hardcoding the values.

Signed-off-by: Yuti Amonkar 
---
 .../drm/bridge/cadence/cdns-mhdp8546-core.c   | 82 +++
 1 file changed, 64 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c 
b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
index d9f7eb8249e8..2ad5cad46599 100644
--- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
@@ -1530,24 +1530,8 @@ static int cdns_mhdp_get_modes(struct drm_connector 
*connector)
 
drm_connector_update_edid_property(connector, edid);
num_modes = drm_add_edid_modes(connector, edid);
-   kfree(edid);
 
-   /*
-* HACK: Warn about unsupported display formats until we deal
-*   with them correctly.
-*/
-   if (connector->display_info.color_formats &&
-   !(connector->display_info.color_formats &
- mhdp->display_fmt.color_format))
-   dev_warn(mhdp->dev,
-"%s: No supported color_format found (0x%08x)\n",
-   __func__, connector->display_info.color_formats);
-
-   if (connector->display_info.bpc &&
-   connector->display_info.bpc < mhdp->display_fmt.bpc)
-   dev_warn(mhdp->dev, "%s: Display bpc only %d < %d\n",
-__func__, connector->display_info.bpc,
-mhdp->display_fmt.bpc);
+   kfree(edid);
 
return num_modes;
 }
@@ -1706,6 +1690,66 @@ static int cdns_mhdp_attach(struct drm_bridge *bridge,
return 0;
 }
 
+static void cdns_mhdp_get_display_fmt(struct cdns_mhdp_device *mhdp,
+ struct drm_bridge_state *state)
+{
+   u32 bus_fmt, bpc, pxlfmt;
+
+   bus_fmt = state->output_bus_cfg.format;
+   switch (bus_fmt) {
+   case MEDIA_BUS_FMT_RGB161616_1X48:
+   pxlfmt = DRM_COLOR_FORMAT_RGB444;
+   bpc = 16;
+   break;
+   case MEDIA_BUS_FMT_YUV16_1X48:
+   pxlfmt = DRM_COLOR_FORMAT_YCRCB444;
+   bpc = 16;
+   break;
+   case MEDIA_BUS_FMT_RGB121212_1X36:
+   pxlfmt = DRM_COLOR_FORMAT_RGB444;
+   bpc = 12;
+   break;
+   case MEDIA_BUS_FMT_UYVY12_1X24:
+   pxlfmt = DRM_COLOR_FORMAT_YCRCB422;
+   bpc = 12;
+   break;
+   case MEDIA_BUS_FMT_YUV12_1X36:
+   pxlfmt = DRM_COLOR_FORMAT_YCRCB444;
+   bpc = 12;
+   break;
+   case MEDIA_BUS_FMT_RGB101010_1X30:
+   pxlfmt = DRM_COLOR_FORMAT_RGB444;
+   bpc = 10;
+   break;
+   case MEDIA_BUS_FMT_UYVY10_1X20:
+   pxlfmt = DRM_COLOR_FORMAT_YCRCB422;
+   bpc = 10;
+   break;
+   case MEDIA_BUS_FMT_YUV10_1X30:
+   pxlfmt = DRM_COLOR_FORMAT_YCRCB444;
+   bpc = 10;
+   break;
+   case MEDIA_BUS_FMT_RGB888_1X24:
+   pxlfmt = DRM_COLOR_FORMAT_RGB444;
+   bpc = 8;
+   break;
+   case MEDIA_BUS_FMT_UYVY8_1X16:
+   pxlfmt = DRM_COLOR_FORMAT_YCRCB422;
+   bpc = 8;
+   break;
+   case MEDIA_BUS_FMT_YUV8_1X24:
+   pxlfmt = DRM_COLOR_FORMAT_YCRCB444;
+   bpc = 8;
+   break;
+   default:
+   pxlfmt = DRM_COLOR_FORMAT_RGB444;
+   bpc = 8;
+   }
+
+   mhdp->display_fmt.color_format = pxlfmt;
+   mhdp->display_fmt.bpc = bpc;
+}
+
 static void cdns_mhdp_configure_video(struct cdns_mhdp_device *mhdp,
  const struct drm_display_mode *mode)
 {
@@ -2186,6 +2230,8 @@ static int cdns_mhdp_atomic_check(struct drm_bridge 
*bridge,
struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
const struct drm_display_mode *mode = &crtc_state->adjusted_mode;
 
+   cdns_mhdp_get_display_fmt(mhdp, bridge_state);
+
mutex_lock(&mhdp->link_mutex);
 
if (!cdns_mhdp_bandwidth_ok(mhdp, mode, mhdp->link.num_lanes,
@@ -2499,7 +2545,7 @@ static int cdns_mhdp_probe(struct platform_device *pdev)
mhdp->link.rate = mhdp->host.link_rate;
mhdp->link.num_lanes = mhdp->host.lanes_cnt;
 
-   /* The only currently supported format */
+   /* Initialize color format bpc and y_only to default values*/
mhdp->display_fmt.y_only = false;
mhdp->display_fmt.color_format = DRM_COLOR_FORMAT_RGB444;
mhdp->display_fmt.bpc = 8;
-- 
2.17.1

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[PATCH v3 0/3] Add bus format negotiation support for Cadence MHDP8546 driver

[Yuti Amonkar]

This patch series add bus format negotiation support for Cadence MHDP8546 
bridge driver.

The patch series has four patches in the below sequence:
1. drm: bridge: cdns-mhdp8546: Modify atomic_get_input_bus_format bridge 
function.
   Return all the input formats supported.
2. drm: bridge: cdns-mhdp8546: Remove setting of bus format using connector 
info 
   Remove the bus format configuration using connector info structure.
3. drm: bridge: cdns-mhdp8546: Retrieve the pixel format and bpc based on bus 
format 
   Get the pixel format and bpc based on negotiated output bus format.

This patch series is dependent on tidss series [1] for the new connector model 
support.

[1]
https://patchwork.kernel.org/project/dri-devel/cover/20201201121830.29704-1-nikhil...@ti.com/

Version History:

v3:
 - Modify the atomic_get_input_bus_fmts to return the 
MEDIA_BUS_FMT_RGB121212_1X36
   as default format.along as tidss currently supports only this format.

v2:
 - Remove the Add output bus format negotiation patch from the series, 
   as we use ouput format as MEDIA_BUS_FMT_FIXED and that is  the 
   default value if atomic_get_output_bus_fmts function is not implemented.
 - Return NULL if output format is not MEDIA_BUS_FMT_FIXED.
 - Return the supported color formats based on the display info structure.


Yuti Amonkar (3):
  drm: bridge: cdns-mhdp8546: Modify atomic_get_input_bus_format bridge
function
  drm: bridge: cdns-mhdp8546: Remove setting of bus format using
connector info
  drm: bridge: cdns-mhdp8546: Retrieve the pixel format and bpc based on
bus format

 .../drm/bridge/cadence/cdns-mhdp8546-core.c   | 171 ++
 1 file changed, 138 insertions(+), 33 deletions(-)

-- 
2.17.1

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[RFC PATCH 1/2] drm: RFC add choice to use dynamic debug in drm-debug

[Jim Cromie]

drm's debug system uses distinct categories of debug messages, mapped
to bits in drm.debug.  Currently, code does a lot of unlikely bit-mask
checks on drm.debug (in drm_debug_enabled), we can use dynamic debug
instead, and get all that jump_label goodness.

RFC: dynamic debug has no concept of category, but we can do without
one if we can prepend a class-prefix to each printk format.  Then we
can use "format ^prefix" to select the whole category with one query.
This is a log-facing and user visible change, but it seems unlikely to
cause trouble for log watchers; they're not relying on the absence of
class prefix strings.

This conversion yields ~2100 new callsites on my i7 laptop:

  dyndbg: 195 debug prints in module drm_kms_helper
  dyndbg: 298 debug prints in module drm
  dyndbg: 1630 debug prints in module i915

Since this change has wide-ranging effects (many drm drivers, with
many callsites, and kernel image growth), and most vendors don't
enable DYNAMIC_DEBUG, we supplement the existing mechanism, adding
CONFIG_DRM_USE_DYNAMIC_DEBUG to enable the new one.

The indirection/switchover has a few parts:

1 a new callback on drm.debug which calls dynamic_debug_exec_queries
  to map those bits to specific query/commands
  dynamic_debug_exec_queries("format ^drm:kms: +p", "drm*");

2 a "converted" or "classy" DRM_UT_* map
  similar to DRM_UT_* ( symbol => bit-mask )
  named it  cDRM_UT_* ( symbol => format-class-prefix-string )

  cDRM_UT_* is either ( CONFIG_DRM_USE_DYNAMIC_DEBUG )
  legacy: cDRM_UT_* <-- DRM_UT_*
  enabled:
  +#define cDRM_UT_KMS"drm:kms: "
  +#define cDRM_UT_PRIME  "drm:prime: "
  +#define cDRM_UT_ATOMIC "drm:atomic: "

  these are similar to "gvt: cmd:" in i915/gvt
  and effectively a replacement for DRM_NAME
  please bikeshed on keys, values. latter are log-facing.

3 drm_dev_dbg & drm_debug are renamed (prefixed with '_')
  old names are now macros, which are ifdefd
  legacy:  -> to renamed fn
  enabled: -> dev_dbg & pr_debug, after prepending prefix to format.

4 names in (2) are called from DRM_DEBUG_ and drm_dbg_.
  all these get "converted" to use cDRM_UT_*, to get right token type.

RFC: for dynamic debug, category is a source-facing addition;
something like pr_debug_cat(cat, ...) would do it, iff cat is a
compile-time const.  Note that cat isn't needed in the printing, it
would be saved into a new field in struct _ddebug, and used only for
callsite selection, activation and control.

Signed-off-by: Jim Cromie 
---
 drivers/gpu/drm/Kconfig | 13 ++
 drivers/gpu/drm/drm_print.c | 75 --
 include/drm/drm_print.h | 92 +++--
 3 files changed, 153 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 147d61b9674e..854bc1ad21fb 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -54,6 +54,19 @@ config DRM_DEBUG_MM
 
  If in doubt, say "N".
 
+config DRM_USE_DYNAMIC_DEBUG
+   bool "use dynamic debug to implement drm.debug"
+   default n
+   depends on DRM
+   depends on DYNAMIC_DEBUG
+   depends on JUMP_LABEL
+   help
+ The drm debug category facility does a lot of unlikely bit-field
+ tests at runtime; while cheap individually, the cost accumulates.
+ This option uses dynamic debug facility (if configured and
+ using jump_label) to avoid those runtime checks, patching
+ the kernel when those debugs are desired.
+
 config DRM_DEBUG_SELFTEST
tristate "kselftests for DRM"
depends on DRM
diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu/drm/drm_print.c
index 111b932cf2a9..e2acdfc7088b 100644
--- a/drivers/gpu/drm/drm_print.c
+++ b/drivers/gpu/drm/drm_print.c
@@ -52,8 +52,75 @@ MODULE_PARM_DESC(debug, "Enable debug output, where each bit 
enables a debug cat
 "\t\tBit 5 (0x20)  will enable VBL messages (vblank code)\n"
 "\t\tBit 7 (0x80)  will enable LEASE messages (leasing code)\n"
 "\t\tBit 8 (0x100) will enable DP messages (displayport code)");
+
+#ifndef CONFIG_DRM_USE_DYNAMIC_DEBUG
 module_param_named(debug, __drm_debug, int, 0600);
 
+#else
+static char *format_class_prefixes[] = {
+   cDRM_UT_CORE,
+   cDRM_UT_DRIVER,
+   cDRM_UT_KMS,
+   cDRM_UT_PRIME,
+   cDRM_UT_ATOMIC,
+   cDRM_UT_VBL,
+   cDRM_UT_STATE,
+   cDRM_UT_LEASE,
+   cDRM_UT_DP,
+   cDRM_UT_DRMRES
+};
+
+#define OUR_QUERY_SIZE 64 /* > strlen "format '^%s' %cp" + longest prefix */
+
+static int param_set_dyndbg(const char *instr, const struct kernel_param *kp)
+{
+   unsigned int val;
+   unsigned long changes, result;
+   int rc, chgct = 0, totct = 0, bitpos;
+   char query[OUR_QUERY_SIZE];
+
+   rc = kstrtouint(instr, 0, &val);
+   if (rc) {
+   pr_err("%s: failed\n", __func__);
+   return -EINVAL;
+   }
+   result = val;
+   changes = result ^ __drm_debug;
+
+   pr_debug("changes:0x%lx f

[PATCH 5/8] drm/vc4: dsi: Add support for DSI0

[Maxime Ripard]

From: Dave Stevenson 

DSI0 was partially supported, but didn't register with the main
driver, and the code was inconsistent as to whether it checked
port == 0 or port == 1.

Add compatible string and other support to make it consistent.

Signed-off-by: Dave Stevenson 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/vc4/vc4_dsi.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c
index 601020c10053..82162900e351 100644
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
@@ -1324,6 +1324,13 @@ static const struct drm_encoder_helper_funcs 
vc4_dsi_encoder_helper_funcs = {
.mode_fixup = vc4_dsi_encoder_mode_fixup,
 };
 
+static const struct vc4_dsi_variant bcm2835_dsi0_variant = {
+   .port   = 0,
+   .debugfs_name   = "dsi0_regs",
+   .regs   = dsi0_regs,
+   .nregs  = ARRAY_SIZE(dsi0_regs),
+};
+
 static const struct vc4_dsi_variant bcm2835_dsi1_variant = {
.port   = 1,
.broken_axi_workaround  = true,
@@ -1333,6 +1340,7 @@ static const struct vc4_dsi_variant bcm2835_dsi1_variant 
= {
 };
 
 static const struct of_device_id vc4_dsi_dt_match[] = {
+   { .compatible = "brcm,bcm2835-dsi0", &bcm2835_dsi0_variant },
{ .compatible = "brcm,bcm2835-dsi1", &bcm2835_dsi1_variant },
{}
 };
-- 
2.28.0

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[PATCH v11 10/10] PM / devfreq: tegra30: Separate configurations per-SoC generation

[Dmitry Osipenko]

Previously we were using count-weight of the T124 for T30 in order to
get EMC clock rate that was reasonable for T30. In fact the count-weight
should be x2 times smaller on T30, but then devfreq was producing a bit
too low EMC clock rate for ISO memory clients, like display controller
for example.

Now both Tegra ACTMON and Tegra DRM display drivers support interconnect
framework and display driver tells to ICC what a minimum memory bandwidth
is needed, preventing FIFO underflows. Thus, now we can use a proper
count-weight value for Tegra30 and MC_ALL device config needs a bit more
aggressive boosting.

Add a separate ACTMON driver configuration that is specific to Tegra30.

Tested-by: Peter Geis 
Tested-by: Nicolas Chauvet 
Acked-by: Chanwoo Choi 
Signed-off-by: Dmitry Osipenko 
---
 drivers/devfreq/tegra30-devfreq.c | 68 ---
 1 file changed, 54 insertions(+), 14 deletions(-)

diff --git a/drivers/devfreq/tegra30-devfreq.c 
b/drivers/devfreq/tegra30-devfreq.c
index 145ef91ae092..117cad7968ab 100644
--- a/drivers/devfreq/tegra30-devfreq.c
+++ b/drivers/devfreq/tegra30-devfreq.c
@@ -57,13 +57,6 @@
 #define ACTMON_BELOW_WMARK_WINDOW  3
 #define ACTMON_BOOST_FREQ_STEP 16000
 
-/*
- * Activity counter is incremented every 256 memory transactions, and each
- * transaction takes 4 EMC clocks for Tegra124; So the COUNT_WEIGHT is
- * 4 * 256 = 1024.
- */
-#define ACTMON_COUNT_WEIGHT0x400
-
 /*
  * ACTMON_AVERAGE_WINDOW_LOG2: default value for @DEV_CTRL_K_VAL, which
  * translates to 2 ^ (K_VAL + 1). ex: 2 ^ (6 + 1) = 128
@@ -111,7 +104,7 @@ enum tegra_actmon_device {
MCCPU,
 };
 
-static const struct tegra_devfreq_device_config actmon_device_configs[] = {
+static const struct tegra_devfreq_device_config tegra124_device_configs[] = {
{
/* MCALL: All memory accesses (including from the CPUs) */
.offset = 0x1c0,
@@ -133,6 +126,28 @@ static const struct tegra_devfreq_device_config 
actmon_device_configs[] = {
},
 };
 
+static const struct tegra_devfreq_device_config tegra30_device_configs[] = {
+   {
+   /* MCALL: All memory accesses (including from the CPUs) */
+   .offset = 0x1c0,
+   .irq_mask = 1 << 26,
+   .boost_up_coeff = 200,
+   .boost_down_coeff = 50,
+   .boost_up_threshold = 20,
+   .boost_down_threshold = 10,
+   },
+   {
+   /* MCCPU: memory accesses from the CPUs */
+   .offset = 0x200,
+   .irq_mask = 1 << 25,
+   .boost_up_coeff = 800,
+   .boost_down_coeff = 40,
+   .boost_up_threshold = 27,
+   .boost_down_threshold = 10,
+   .avg_dependency_threshold = 16000, /* 16MHz in kHz units */
+   },
+};
+
 /**
  * struct tegra_devfreq_device - state specific to an ACTMON device
  *
@@ -155,6 +170,12 @@ struct tegra_devfreq_device {
unsigned long target_freq;
 };
 
+struct tegra_devfreq_soc_data {
+   const struct tegra_devfreq_device_config *configs;
+   /* Weight value for count measurements */
+   unsigned int count_weight;
+};
+
 struct tegra_devfreq {
struct devfreq  *devfreq;
struct opp_table*opp_table;
@@ -171,11 +192,13 @@ struct tegra_devfreq {
struct delayed_work cpufreq_update_work;
struct notifier_block   cpu_rate_change_nb;
 
-   struct tegra_devfreq_device devices[ARRAY_SIZE(actmon_device_configs)];
+   struct tegra_devfreq_device devices[2];
 
unsigned intirq;
 
boolstarted;
+
+   const struct tegra_devfreq_soc_data *soc;
 };
 
 struct tegra_actmon_emc_ratio {
@@ -488,7 +511,7 @@ static void tegra_actmon_configure_device(struct 
tegra_devfreq *tegra,
tegra_devfreq_update_avg_wmark(tegra, dev);
tegra_devfreq_update_wmark(tegra, dev);
 
-   device_writel(dev, ACTMON_COUNT_WEIGHT, ACTMON_DEV_COUNT_WEIGHT);
+   device_writel(dev, tegra->soc->count_weight, ACTMON_DEV_COUNT_WEIGHT);
device_writel(dev, ACTMON_INTR_STATUS_CLEAR, ACTMON_DEV_INTR_STATUS);
 
val |= ACTMON_DEV_CTRL_ENB_PERIODIC;
@@ -779,6 +802,8 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
if (!tegra)
return -ENOMEM;
 
+   tegra->soc = of_device_get_match_data(&pdev->dev);
+
tegra->regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(tegra->regs))
return PTR_ERR(tegra->regs);
@@ -852,9 +877,9 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
 
tegra->max_freq = rate / KHZ;
 
-   for (i = 0; i < ARRAY_SIZE(actmon_device_configs); i++) {
+   for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) {
dev = tegra->devices + i;
-   dev->config = actmon_device_configs + i;
+

[PATCH v11 06/10] memory: tegra124: Support interconnect framework

[Dmitry Osipenko]

Now Internal and External memory controllers are memory interconnection
providers. This allows us to use interconnect API for tuning of memory
configuration. EMC driver now supports OPPs and DVFS.

Tested-by: Nicolas Chauvet 
Acked-by: Georgi Djakov 
Signed-off-by: Dmitry Osipenko 
---
 drivers/memory/tegra/Kconfig|   1 +
 drivers/memory/tegra/tegra124-emc.c | 320 +++-
 drivers/memory/tegra/tegra124.c |  82 ++-
 3 files changed, 391 insertions(+), 12 deletions(-)

diff --git a/drivers/memory/tegra/Kconfig b/drivers/memory/tegra/Kconfig
index f5b451403c58..a70967a56e52 100644
--- a/drivers/memory/tegra/Kconfig
+++ b/drivers/memory/tegra/Kconfig
@@ -36,6 +36,7 @@ config TEGRA124_EMC
default y
depends on TEGRA_MC && ARCH_TEGRA_124_SOC
select TEGRA124_CLK_EMC
+   select PM_OPP
help
  This driver is for the External Memory Controller (EMC) found on
  Tegra124 chips. The EMC controls the external DRAM on the board.
diff --git a/drivers/memory/tegra/tegra124-emc.c 
b/drivers/memory/tegra/tegra124-emc.c
index 8fb8c1af25c9..9706550bdd5d 100644
--- a/drivers/memory/tegra/tegra124-emc.c
+++ b/drivers/memory/tegra/tegra124-emc.c
@@ -12,20 +12,26 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
 #include 
 #include 
 
+#include "mc.h"
+
 #define EMC_FBIO_CFG5  0x104
 #defineEMC_FBIO_CFG5_DRAM_TYPE_MASK0x3
 #defineEMC_FBIO_CFG5_DRAM_TYPE_SHIFT   0
+#define EMC_FBIO_CFG5_DRAM_WIDTH_X64   BIT(4)
 
 #define EMC_INTSTATUS  0x0
 #define EMC_INTSTATUS_CLKCHANGE_COMPLETE   BIT(4)
@@ -461,6 +467,17 @@ struct emc_timing {
u32 emc_zcal_interval;
 };
 
+enum emc_rate_request_type {
+   EMC_RATE_DEBUG,
+   EMC_RATE_ICC,
+   EMC_RATE_TYPE_MAX,
+};
+
+struct emc_rate_request {
+   unsigned long min_rate;
+   unsigned long max_rate;
+};
+
 struct tegra_emc {
struct device *dev;
 
@@ -471,6 +488,7 @@ struct tegra_emc {
struct clk *clk;
 
enum emc_dram_type dram_type;
+   unsigned int dram_bus_width;
unsigned int dram_num;
 
struct emc_timing last_timing;
@@ -482,6 +500,17 @@ struct tegra_emc {
unsigned long min_rate;
unsigned long max_rate;
} debugfs;
+
+   struct icc_provider provider;
+
+   /*
+* There are multiple sources in the EMC driver which could request
+* a min/max clock rate, these rates are contained in this array.
+*/
+   struct emc_rate_request requested_rate[EMC_RATE_TYPE_MAX];
+
+   /* protect shared rate-change code path */
+   struct mutex rate_lock;
 };
 
 /* Timing change sequence functions */
@@ -870,6 +899,14 @@ static void emc_read_current_timing(struct tegra_emc *emc,
 static int emc_init(struct tegra_emc *emc)
 {
emc->dram_type = readl(emc->regs + EMC_FBIO_CFG5);
+
+   if (emc->dram_type & EMC_FBIO_CFG5_DRAM_WIDTH_X64)
+   emc->dram_bus_width = 64;
+   else
+   emc->dram_bus_width = 32;
+
+   dev_info(emc->dev, "%ubit DRAM bus\n", emc->dram_bus_width);
+
emc->dram_type &= EMC_FBIO_CFG5_DRAM_TYPE_MASK;
emc->dram_type >>= EMC_FBIO_CFG5_DRAM_TYPE_SHIFT;
 
@@ -1009,6 +1046,83 @@ tegra_emc_find_node_by_ram_code(struct device_node 
*node, u32 ram_code)
return NULL;
 }
 
+static void tegra_emc_rate_requests_init(struct tegra_emc *emc)
+{
+   unsigned int i;
+
+   for (i = 0; i < EMC_RATE_TYPE_MAX; i++) {
+   emc->requested_rate[i].min_rate = 0;
+   emc->requested_rate[i].max_rate = ULONG_MAX;
+   }
+}
+
+static int emc_request_rate(struct tegra_emc *emc,
+   unsigned long new_min_rate,
+   unsigned long new_max_rate,
+   enum emc_rate_request_type type)
+{
+   struct emc_rate_request *req = emc->requested_rate;
+   unsigned long min_rate = 0, max_rate = ULONG_MAX;
+   unsigned int i;
+   int err;
+
+   /* select minimum and maximum rates among the requested rates */
+   for (i = 0; i < EMC_RATE_TYPE_MAX; i++, req++) {
+   if (i == type) {
+   min_rate = max(new_min_rate, min_rate);
+   max_rate = min(new_max_rate, max_rate);
+   } else {
+   min_rate = max(req->min_rate, min_rate);
+   max_rate = min(req->max_rate, max_rate);
+   }
+   }
+
+   if (min_rate > max_rate) {
+   dev_err_ratelimited(emc->dev, "%s: type %u: out of range: %lu 
%lu\n",
+   __func__, type, min_rate, max_rate);
+   return -ERANGE;
+   }
+
+   /*
+* EMC rate-changes should go via OPP API because it manages voltage
+

[PATCH 3/8] drm/vc4: dsi: Use snprintf for the PHY clocks instead of an array

[Maxime Ripard]

The DSI clocks setup function has been using an array to store the clock
name of either the DSI0 or DSI1 blocks, using the port ID to choose the
proper one.

Let's switch to an snprintf call to do the same thing and simplify the
array a bit.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/vc4/vc4_dsi.c | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c
index bb316e6cc12b..f704d959e65b 100644
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
@@ -1398,12 +1398,12 @@ vc4_dsi_init_phy_clocks(struct vc4_dsi *dsi)
struct device *dev = &dsi->pdev->dev;
const char *parent_name = __clk_get_name(dsi->pll_phy_clock);
static const struct {
-   const char *dsi0_name, *dsi1_name;
+   const char *name;
int div;
} phy_clocks[] = {
-   { "dsi0_byte", "dsi1_byte", 8 },
-   { "dsi0_ddr2", "dsi1_ddr2", 4 },
-   { "dsi0_ddr", "dsi1_ddr", 2 },
+   { "byte", 8 },
+   { "ddr2", 4 },
+   { "ddr", 2 },
};
int i;
 
@@ -1419,8 +1419,12 @@ vc4_dsi_init_phy_clocks(struct vc4_dsi *dsi)
for (i = 0; i < ARRAY_SIZE(phy_clocks); i++) {
struct clk_fixed_factor *fix = &dsi->phy_clocks[i];
struct clk_init_data init;
+   char clk_name[16];
int ret;
 
+   snprintf(clk_name, sizeof(clk_name),
+"dsi%u_%s", dsi->port, phy_clocks[i].name);
+
/* We just use core fixed factor clock ops for the PHY
 * clocks.  The clocks are actually gated by the
 * PHY_AFEC0_DDRCLK_EN bits, which we should be
@@ -1437,10 +1441,7 @@ vc4_dsi_init_phy_clocks(struct vc4_dsi *dsi)
memset(&init, 0, sizeof(init));
init.parent_names = &parent_name;
init.num_parents = 1;
-   if (dsi->port == 1)
-   init.name = phy_clocks[i].dsi1_name;
-   else
-   init.name = phy_clocks[i].dsi0_name;
+   init.name = clk_name;
init.ops = &clk_fixed_factor_ops;
 
ret = devm_clk_hw_register(dev, &fix->hw);
-- 
2.28.0

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[PATCH] drm/fb-helper: Add missed unlocks in setcmap_legacy()

[Chuhong Yuan]

setcmap_legacy() does not call drm_modeset_unlock_all() in some exits,
add the missed unlocks with goto to fix it.

Fixes: 964c60063bff ("drm/fb-helper: separate the fb_setcmap helper into atomic 
and legacy paths")
Signed-off-by: Chuhong Yuan 
---
 drivers/gpu/drm/drm_fb_helper.c | 15 ++-
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 1543d9d10970..8033467db4be 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -923,11 +923,15 @@ static int setcmap_legacy(struct fb_cmap *cmap, struct 
fb_info *info)
drm_modeset_lock_all(fb_helper->dev);
drm_client_for_each_modeset(modeset, &fb_helper->client) {
crtc = modeset->crtc;
-   if (!crtc->funcs->gamma_set || !crtc->gamma_size)
-   return -EINVAL;
+   if (!crtc->funcs->gamma_set || !crtc->gamma_size) {
+   ret = -EINVAL;
+   goto out;
+   }
 
-   if (cmap->start + cmap->len > crtc->gamma_size)
-   return -EINVAL;
+   if (cmap->start + cmap->len > crtc->gamma_size) {
+   ret = -EINVAL;
+   goto out;
+   }
 
r = crtc->gamma_store;
g = r + crtc->gamma_size;
@@ -940,8 +944,9 @@ static int setcmap_legacy(struct fb_cmap *cmap, struct 
fb_info *info)
ret = crtc->funcs->gamma_set(crtc, r, g, b,
 crtc->gamma_size, NULL);
if (ret)
-   return ret;
+   goto out;
}
+out:
drm_modeset_unlock_all(fb_helper->dev);
 
return ret;
-- 
2.26.2

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[PATCH v11 05/10] memory: tegra124-emc: Continue probing if timings are missing in device-tree

[Dmitry Osipenko]

EMC driver will become mandatory after turning it into interconnect
provider because interconnect users, like display controller driver, will
fail to probe using newer device-trees that have interconnect properties.
Thus make EMC driver to probe even if timings are missing in device-tree.

Signed-off-by: Dmitry Osipenko 
---
 drivers/memory/tegra/tegra124-emc.c | 26 +-
 1 file changed, 9 insertions(+), 17 deletions(-)

diff --git a/drivers/memory/tegra/tegra124-emc.c 
b/drivers/memory/tegra/tegra124-emc.c
index edfbf6d6d357..8fb8c1af25c9 100644
--- a/drivers/memory/tegra/tegra124-emc.c
+++ b/drivers/memory/tegra/tegra124-emc.c
@@ -1201,23 +1201,15 @@ static int tegra_emc_probe(struct platform_device *pdev)
ram_code = tegra_read_ram_code();
 
np = tegra_emc_find_node_by_ram_code(pdev->dev.of_node, ram_code);
-   if (!np) {
-   dev_err(&pdev->dev,
-   "no memory timings for RAM code %u found in DT\n",
-   ram_code);
-   return -ENOENT;
-   }
-
-   err = tegra_emc_load_timings_from_dt(emc, np);
-   of_node_put(np);
-   if (err)
-   return err;
-
-   if (emc->num_timings == 0) {
-   dev_err(&pdev->dev,
-   "no memory timings for RAM code %u registered\n",
-   ram_code);
-   return -ENOENT;
+   if (np) {
+   err = tegra_emc_load_timings_from_dt(emc, np);
+   of_node_put(np);
+   if (err)
+   return err;
+   } else {
+   dev_info(&pdev->dev,
+"no memory timings for RAM code %u found in DT\n",
+ram_code);
}
 
err = emc_init(emc);
-- 
2.29.2

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[PATCH 1/8] drm/vc4: drv: Remove the DSI pointer in vc4_drv

[Maxime Ripard]

That pointer isn't used anywhere, so there's no point in keeping it.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/vc4/vc4_drv.h | 1 -
 drivers/gpu/drm/vc4/vc4_dsi.c | 9 -
 2 files changed, 10 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index c5f2944d5bc6..ee95b4327796 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -77,7 +77,6 @@ struct vc4_dev {
struct vc4_hvs *hvs;
struct vc4_v3d *v3d;
struct vc4_dpi *dpi;
-   struct vc4_dsi *dsi1;
struct vc4_vec *vec;
struct vc4_txp *txp;
 
diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c
index 19aab4e7e209..b1d8765795f1 100644
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
@@ -1459,7 +1459,6 @@ static int vc4_dsi_bind(struct device *dev, struct device 
*master, void *data)
 {
struct platform_device *pdev = to_platform_device(dev);
struct drm_device *drm = dev_get_drvdata(master);
-   struct vc4_dev *vc4 = to_vc4_dev(drm);
struct vc4_dsi *dsi = dev_get_drvdata(dev);
struct vc4_dsi_encoder *vc4_dsi_encoder;
struct drm_panel *panel;
@@ -1612,9 +1611,6 @@ static int vc4_dsi_bind(struct device *dev, struct device 
*master, void *data)
if (ret)
return ret;
 
-   if (dsi->port == 1)
-   vc4->dsi1 = dsi;
-
drm_simple_encoder_init(drm, dsi->encoder, DRM_MODE_ENCODER_DSI);
drm_encoder_helper_add(dsi->encoder, &vc4_dsi_encoder_helper_funcs);
 
@@ -1643,8 +1639,6 @@ static int vc4_dsi_bind(struct device *dev, struct device 
*master, void *data)
 static void vc4_dsi_unbind(struct device *dev, struct device *master,
   void *data)
 {
-   struct drm_device *drm = dev_get_drvdata(master);
-   struct vc4_dev *vc4 = to_vc4_dev(drm);
struct vc4_dsi *dsi = dev_get_drvdata(dev);
 
if (dsi->bridge)
@@ -1656,9 +1650,6 @@ static void vc4_dsi_unbind(struct device *dev, struct 
device *master,
 */
list_splice_init(&dsi->bridge_chain, &dsi->encoder->bridge_chain);
drm_encoder_cleanup(dsi->encoder);
-
-   if (dsi->port == 1)
-   vc4->dsi1 = NULL;
 }
 
 static const struct component_ops vc4_dsi_ops = {
-- 
2.28.0

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[PATCH] drm: Allow drm_fourcc.h without including drm.h

[James Park]

Add DRM_FOURCC_STANDALONE guard to skip drm.h dependency.

This will allow Mesa to port code to Windows more easily.

Signed-off-by: James Park 
---
 include/uapi/drm/drm_fourcc.h | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 82f3278..159a9d0 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -24,7 +24,13 @@
 #ifndef DRM_FOURCC_H
 #define DRM_FOURCC_H
 
+#ifdef DRM_FOURCC_STANDALONE
+#include 
+typedef uint32_t __u32;
+typedef uint64_t __u64;
+#else
 #include "drm.h"
+#endif
 
 #if defined(__cplusplus)
 extern "C" {
-- 
2.7.4

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[PATCH v11 00/10] Introduce memory interconnect for NVIDIA Tegra SoCs

[Dmitry Osipenko]

This series brings initial support for memory interconnect to Tegra20,
Tegra30 and Tegra124 SoCs.

For the starter only display controllers and devfreq devices are getting
interconnect API support, others could be supported later on. The display
controllers have the biggest demand for interconnect API right now because
dynamic memory frequency scaling can't be done safely without taking into
account bandwidth requirement from the displays. In particular this series
fixes distorted display output on T30 Ouya and T124 TK1 devices.

Changelog:

v11: - Added acks from Georgi Djakov.

 - CC'ed devicet...@vger.kernel.org in order to make the dt-bindings
   patch ("Document opp-supported-hw property") visible to the DT
   maintainers.

 - Rebased on a recent linux-next, note that some of v10 DT patches
   were already applied by Thierry into tegra tree, as well as one
   devfreq patch which removed the older tegra20-devfreq driver was
   applied by Chanwoo Choi to the devfreq tree.

 - Note that patch "memory: tegra20: Support hardware versioning and
   clean up OPP table initialization" fixes the noisy (but harmless)
   warning which happens because DT patches were applied before the
   code changes. This problem was spotted in current linux-next by
   Jonathan Hunter, hence could be worthwhile to pick up this patch
   for the v5.11.

v10 - In a longer run it will be much nicer if we could support EMC
  hardware versioning on Tegra20 and it's not late to support it now.
  Hence I added these new patches:

dt-bindings: memory: tegra20: emc: Document opp-supported-hw property
memory: tegra20: Support hardware versioning and clean up OPP table 
initialization

- Removed error message from tegra30-devfreq driver about missing OPP
  properties in a device-tree because EMC driver already prints that
  message and it uses OPP API error code instead of checking DT directly,
  which is a more correct way of doing that.

v9: - Squashed "memory: tegra30-emc: Factor out clk initialization" into
  patch "tegra30: Support interconnect framework".
  Suggested by Krzysztof Kozlowski.

- Improved Kconfig in the patch "memory: tegra124-emc: Make driver modular"
  by adding CONFIG_TEGRA124_CLK_EMC entry, which makes clk-driver changes
  to look a bit more cleaner. Suggested by Krzysztof Kozlowski.

- Dropped voltage regulator support from ICC and DT patches for now
  because there is a new discussion about using a power domain abstraction
  for controlling the regulator, which is likely to happen.

- Replaced direct "operating-points-v2" property checking in EMC drivers
  with checking of a returned error code from dev_pm_opp_of_add_table().
  Note that I haven't touched T20 EMC driver because it's very likely
  that we'll replace that code with a common helper soon anyways.
  Suggested by Viresh Kumar.

- The T30 DT patches now include EMC OPP changes for Ouya board, which
  is available now in linux-next.

Dmitry Osipenko (10):
  dt-bindings: memory: tegra20: emc: Document opp-supported-hw property
  memory: tegra20: Support hardware versioning and clean up OPP table
initialization
  memory: tegra30: Support interconnect framework
  memory: tegra124-emc: Make driver modular
  memory: tegra124-emc: Continue probing if timings are missing in
device-tree
  memory: tegra124: Support interconnect framework
  drm/tegra: dc: Support memory bandwidth management
  drm/tegra: dc: Extend debug stats with total number of events
  PM / devfreq: tegra30: Support interconnect and OPPs from device-tree
  PM / devfreq: tegra30: Separate configurations per-SoC generation

 .../memory-controllers/nvidia,tegra20-emc.txt |   6 +
 drivers/clk/tegra/Kconfig |   3 +
 drivers/clk/tegra/Makefile|   2 +-
 drivers/clk/tegra/clk-tegra124-emc.c  |  41 +-
 drivers/clk/tegra/clk-tegra124.c  |  26 +-
 drivers/clk/tegra/clk.h   |  18 +-
 drivers/devfreq/tegra30-devfreq.c | 147 ---
 drivers/gpu/drm/tegra/Kconfig |   1 +
 drivers/gpu/drm/tegra/dc.c| 359 +
 drivers/gpu/drm/tegra/dc.h|  19 +
 drivers/gpu/drm/tegra/drm.c   |  14 +
 drivers/gpu/drm/tegra/hub.c   |   3 +
 drivers/gpu/drm/tegra/plane.c | 121 ++
 drivers/gpu/drm/tegra/plane.h |  15 +
 drivers/memory/tegra/Kconfig  |   5 +-
 drivers/memory/tegra/tegra124-emc.c   | 377 --
 drivers/memory/tegra/tegra124.c   |  82 +++-
 drivers/memory/tegra/tegra20-emc.c|  48 +--
 drivers/memory/tegra/tegra30-emc.c| 344 +++-
 drivers/memory/tegra/tegra30.c| 173 +++-
 include/linux/clk/tegra.h |   8 +
 include/s

[PATCH] drm/ttm: remove unused varibles

[Tian Tao]

fixed the following warnings
drivers/gpu/drm/nouveau/nouveau_bo.c:1227:17: warning: variable ‘dev’
set but not used [-Wunused-but-set-variable]
drivers/gpu/drm/nouveau/nouveau_bo.c:1251:17: warning: variable ‘dev’
set but not used [-Wunused-but-set-variable]

Signed-off-by: Tian Tao 
---
 drivers/gpu/drm/nouveau/nouveau_bo.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c 
b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 7aa4286..9465f56 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -1228,7 +1228,6 @@ nouveau_ttm_tt_populate(struct ttm_bo_device *bdev,
 {
struct ttm_tt *ttm_dma = (void *)ttm;
struct nouveau_drm *drm;
-   struct device *dev;
bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 
if (ttm_tt_is_populated(ttm))
@@ -1242,7 +1241,6 @@ nouveau_ttm_tt_populate(struct ttm_bo_device *bdev,
}
 
drm = nouveau_bdev(bdev);
-   dev = drm->dev->dev;
 
return ttm_pool_alloc(&drm->ttm.bdev.pool, ttm, ctx);
 }
-- 
2.7.4

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[PATCH v3 2/3] drm/tiny: Add driver for ili9341 with parallel bus

[mdurnev]

From: Mikhail Durnev 

MRB2801 display module [1] is an example of ILI9341 display that connects to
Intel 8080 parallel bus. Its connector is compatible with the ALIENTEK STM32
development board.

It can be used with the drm/mipi-dbi bus driver if the bus is emulated with
GPIO.

[1] http://www.lcdwiki.com/2.8inch_16BIT_Module_ILI9341_SKU:MRB2801

Signed-off-by: Mikhail Durnev 
---
 drivers/gpu/drm/tiny/Kconfig|  13 ++
 drivers/gpu/drm/tiny/Makefile   |   1 +
 drivers/gpu/drm/tiny/ili9341_gpio.c | 284 
 3 files changed, 298 insertions(+)
 create mode 100644 drivers/gpu/drm/tiny/ili9341_gpio.c

diff --git a/drivers/gpu/drm/tiny/Kconfig b/drivers/gpu/drm/tiny/Kconfig
index 2b6414f..e48e268 100644
--- a/drivers/gpu/drm/tiny/Kconfig
+++ b/drivers/gpu/drm/tiny/Kconfig
@@ -66,6 +66,19 @@ config TINYDRM_ILI9341
 
  If M is selected the module will be called ili9341.
 
+config TINYDRM_ILI9341_GPIO
+   tristate "DRM support for ILI9341 display panels with parallel bus 
interface over GPIO"
+   depends on DRM
+   select DRM_KMS_HELPER
+   select DRM_KMS_CMA_HELPER
+   select DRM_MIPI_DBI
+   select BACKLIGHT_CLASS_DEVICE
+   help
+ DRM driver for the following Ilitek ILI9341 panels:
+ * MRB2801 2.8" 240x320 TFT
+
+ If M is selected the module will be called ili9341_gpio.
+
 config TINYDRM_ILI9486
tristate "DRM support for ILI9486 display panels"
depends on DRM && SPI
diff --git a/drivers/gpu/drm/tiny/Makefile b/drivers/gpu/drm/tiny/Makefile
index 6ae4e9e5..1ad2c0d 100644
--- a/drivers/gpu/drm/tiny/Makefile
+++ b/drivers/gpu/drm/tiny/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_GM12U320)  += gm12u320.o
 obj-$(CONFIG_TINYDRM_HX8357D)  += hx8357d.o
 obj-$(CONFIG_TINYDRM_ILI9225)  += ili9225.o
 obj-$(CONFIG_TINYDRM_ILI9341)  += ili9341.o
+obj-$(CONFIG_TINYDRM_ILI9341_GPIO) += ili9341_gpio.o
 obj-$(CONFIG_TINYDRM_ILI9486)  += ili9486.o
 obj-$(CONFIG_TINYDRM_MI0283QT) += mi0283qt.o
 obj-$(CONFIG_TINYDRM_REPAPER)  += repaper.o
diff --git a/drivers/gpu/drm/tiny/ili9341_gpio.c 
b/drivers/gpu/drm/tiny/ili9341_gpio.c
new file mode 100644
index 000..841f01c
--- /dev/null
+++ b/drivers/gpu/drm/tiny/ili9341_gpio.c
@@ -0,0 +1,284 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * DRM driver for Ilitek ILI9341 panels with parallel bus interface
+ *
+ * Copyright 2020 Mikhail Durnev 
+ *
+ * Based on ili9341.c:
+ * Copyright 2018 David Lechner 
+ *
+ * Based on mi0283qt.c:
+ * Copyright 2016 Noralf Trønnes
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define ILI9341_FRMCTR10xb1
+#define ILI9341_DISCTRL0xb6
+#define ILI9341_ETMOD  0xb7
+
+#define ILI9341_PWCTRL10xc0
+#define ILI9341_PWCTRL20xc1
+#define ILI9341_VMCTRL10xc5
+#define ILI9341_VMCTRL20xc7
+#define ILI9341_PWCTRLA0xcb
+#define ILI9341_PWCTRLB0xcf
+
+#define ILI9341_PGAMCTRL   0xe0
+#define ILI9341_NGAMCTRL   0xe1
+#define ILI9341_DTCTRLA0xe8
+#define ILI9341_DTCTRLB0xea
+#define ILI9341_PWRSEQ 0xed
+
+#define ILI9341_EN3GAM 0xf2
+#define ILI9341_PUMPCTRL   0xf7
+
+#define ILI9341_MADCTL_BGR BIT(3)
+#define ILI9341_MADCTL_MV  BIT(5)
+#define ILI9341_MADCTL_MX  BIT(6)
+#define ILI9341_MADCTL_MY  BIT(7)
+
+static void yx240qv29_enable(struct drm_simple_display_pipe *pipe,
+struct drm_crtc_state *crtc_state,
+struct drm_plane_state *plane_state)
+{
+   struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
+   struct mipi_dbi *dbi = &dbidev->dbi;
+   u8 addr_mode;
+   int ret, idx;
+
+   if (!drm_dev_enter(pipe->crtc.dev, &idx))
+   return;
+
+   DRM_DEBUG_KMS("\n");
+
+   ret = mipi_dbi_poweron_conditional_reset(dbidev);
+   if (ret < 0)
+   goto out_exit;
+   if (ret == 1)
+   goto out_enable;
+
+   mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF);
+
+   mipi_dbi_command(dbi, ILI9341_PWCTRLB, 0x00, 0xc1, 0x30);
+   mipi_dbi_command(dbi, ILI9341_PWRSEQ, 0x64, 0x03, 0x12, 0x81);
+   mipi_dbi_command(dbi, ILI9341_DTCTRLA, 0x85, 0x00, 0x78);
+   mipi_dbi_command(dbi, ILI9341_PWCTRLA, 0x39, 0x2c, 0x00, 0x34, 0x02);
+   mipi_dbi_command(dbi, ILI9341_PUMPCTRL, 0x20);
+   mipi_dbi_command(dbi, ILI9341_DTCTRLB, 0x00, 0x00);
+
+   /* Power Control */
+   mipi_dbi_command(dbi, ILI9341_PWCTRL1, 0x23);
+   mipi_dbi_command(dbi, ILI9341_PWCTRL2, 0x10);
+   /* VCOM */
+   mipi_dbi_command(dbi, ILI9341_VMCTRL1, 0x3e, 0x28);
+   mipi_dbi_command(dbi, ILI9341_VMCTRL2, 0x86);
+
+  

[PATCH] gpu: ipu-v3: replace spin_lock_irqsave by spin_lock in hard IRQ

[Tian Tao]

The code has been in a irq-disabled context since it is hard IRQ. There
is no necessity to do it again.

Signed-off-by: Tian Tao 
---
 drivers/gpu/ipu-v3/ipu-image-convert.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-image-convert.c 
b/drivers/gpu/ipu-v3/ipu-image-convert.c
index aa1d4b6..c28764c 100644
--- a/drivers/gpu/ipu-v3/ipu-image-convert.c
+++ b/drivers/gpu/ipu-v3/ipu-image-convert.c
@@ -1737,9 +1737,8 @@ static irqreturn_t eof_irq(int irq, void *data)
struct ipu_image_convert_run *run;
irqreturn_t ret = IRQ_HANDLED;
bool tile_complete = false;
-   unsigned long flags;
 
-   spin_lock_irqsave(&chan->irqlock, flags);
+   spin_lock(&chan->irqlock);
 
/* get current run and its context */
run = chan->current_run;
@@ -1778,7 +1777,7 @@ static irqreturn_t eof_irq(int irq, void *data)
if (tile_complete)
ret = do_tile_complete(run);
 out:
-   spin_unlock_irqrestore(&chan->irqlock, flags);
+   spin_unlock(&chan->irqlock);
return ret;
 }
 
-- 
2.7.4

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[PATCH 2/4] phy: Add LVDS configuration options

[Liu Ying]

This patch allows LVDS PHYs to be configured through
the generic functions and through a custom structure
added to the generic union.

The parameters added here are based on common LVDS PHY
implementation practices.  The set of parameters
should cover all potential users.

Cc: Kishon Vijay Abraham I 
Cc: Vinod Koul 
Cc: NXP Linux Team 
Signed-off-by: Liu Ying 
---
 include/linux/phy/phy-lvds.h | 48 
 include/linux/phy/phy.h  |  4 
 2 files changed, 52 insertions(+)
 create mode 100644 include/linux/phy/phy-lvds.h

diff --git a/include/linux/phy/phy-lvds.h b/include/linux/phy/phy-lvds.h
new file mode 100644
index ..1b5b9d6
--- /dev/null
+++ b/include/linux/phy/phy-lvds.h
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright 2020 NXP
+ */
+
+#ifndef __PHY_LVDS_H_
+#define __PHY_LVDS_H_
+
+/**
+ * struct phy_configure_opts_lvds - LVDS configuration set
+ *
+ * This structure is used to represent the configuration state of a
+ * LVDS phy.
+ */
+struct phy_configure_opts_lvds {
+   /**
+* @bits_per_lane_and_dclk_cycle:
+*
+* Number of bits per data lane and differential clock cycle.
+*/
+   unsigned int bits_per_lane_and_dclk_cycle;
+
+   /**
+* @differential_clk_rate:
+*
+* Clock rate, in Hertz, of the LVDS differential clock.
+*/
+   unsigned long differential_clk_rate;
+
+   /**
+* @lanes:
+*
+* Number of active, consecutive, data lanes, starting from
+* lane 0, used for the transmissions.
+*/
+   unsigned int lanes;
+
+   /**
+* @is_slave:
+*
+* Boolean, true if the phy is a slave which works together
+* with a master phy to support dual link transmission,
+* otherwise a regular phy or a master phy.
+*/
+   bool is_slave;
+};
+
+#endif /* __PHY_LVDS_H_ */
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index e435bdb..d450b44 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -17,6 +17,7 @@
 #include 
 
 #include 
+#include 
 #include 
 
 struct phy;
@@ -51,10 +52,13 @@ enum phy_mode {
  * the MIPI_DPHY phy mode.
  * @dp:Configuration set applicable for phys supporting
  * the DisplayPort protocol.
+ * @lvds:  Configuration set applicable for phys supporting
+ * the LVDS phy mode.
  */
 union phy_configure_opts {
struct phy_configure_opts_mipi_dphy mipi_dphy;
struct phy_configure_opts_dpdp;
+   struct phy_configure_opts_lvds  lvds;
 };
 
 /**
-- 
2.7.4

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[PATCH] drm/msm/dp: remove duplicate include statement

[Tian Tao]

linux/rational.h is included more than once, Remove the one that isn't
necessary.

Signed-off-by: Tian Tao 
---
 drivers/gpu/drm/msm/dp/dp_catalog.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c 
b/drivers/gpu/drm/msm/dp/dp_catalog.c
index b15b4ce..105fa65 100644
--- a/drivers/gpu/drm/msm/dp/dp_catalog.c
+++ b/drivers/gpu/drm/msm/dp/dp_catalog.c
@@ -5,7 +5,6 @@
 
 #define pr_fmt(fmt)"[drm-dp] %s: " fmt, __func__
 
-#include 
 #include 
 #include 
 #include 
-- 
2.7.4

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[PATCH 0/4] phy: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support

[Liu Ying]

Hi,

This series adds i.MX8qxp LVDS PHY mode support for the Mixel PHY in the
Freescale i.MX8qxp SoC.

The Mixel PHY is MIPI DPHY + LVDS PHY combo, which can works in either
MIPI DPHY mode or LVDS PHY mode.  The PHY mode is controlled by i.MX8qxp
SCU firmware.  The PHY driver would call a SCU function to configure the
mode.

The PHY driver is already supporting the Mixel MIPI DPHY in i.MX8mq SoC,
where it appears to be a single MIPI DPHY.


Patch 1/4 sets PHY mode in the Northwest Logic MIPI DSI host controller
bridge driver, since i.MX8qxp SoC embeds this controller IP to support
MIPI DSI displays together with the Mixel PHY.

Patch 2/4 allows LVDS PHYs to be configured through the generic PHY functions
and through a custom structure added to the generic PHY configuration union.

Patch 3/4 adds dt binding support for the Mixel combo PHY in i.MX8qxp SoC.

Patch 4/4 adds the i.MX8qxp LVDS PHY mode support in the Mixel PHY driver.


Welcome comments, thanks.


Liu Ying (4):
  drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_enable()
  phy: Add LVDS configuration options
  dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for
i.MX8qxp
  phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode
support

 .../devicetree/bindings/phy/mixel,mipi-dsi-phy.txt |   8 +-
 drivers/gpu/drm/bridge/nwl-dsi.c   |   6 +
 drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c | 266 -
 include/linux/phy/phy-lvds.h   |  48 
 include/linux/phy/phy.h|   4 +
 5 files changed, 320 insertions(+), 12 deletions(-)
 create mode 100644 include/linux/phy/phy-lvds.h

-- 
2.7.4

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Re: [PATCH V3 1/2] dt-bindings: Add DT bindings for Toshiba TC358762 DSI-to-DPI bridge

[Marek Vasut]

On 12/3/20 7:01 PM, Dave Stevenson wrote:

Hi Marek


Hi,

[...]


+additionalProperties: false
+
+examples:
+  - |
+i2c1 {


Minor point.
I've just come to use this and noticed that this example puts the
device under i2c1. Seeing as it's a DSI driver with no I2C
interaction, shouldn't it be under a dsi node?


Good catch, it should, please send a patch to correct this error, thanks.
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Re: [PATCH v2 7/7] dma-buf: Write down some rules for vmap usage

[Christian König]

Am 04.12.20 um 09:32 schrieb Thomas Zimmermann:

Hi

Am 03.12.20 um 21:41 schrieb Daniel Vetter:

On Thu, Dec 03, 2020 at 07:59:04PM +0100, Thomas Zimmermann wrote:

Hi

Am 03.12.20 um 16:26 schrieb Daniel Vetter:

On Thu, Dec 03, 2020 at 03:02:59PM +0100, Thomas Zimmermann wrote:

Dma-buf's vmap and vunmap callbacks are undocumented and various
exporters currently have slightly different semantics for them. Add
documentation on how to implement and use these interfaces correctly.

v2:
* document vmap semantics in struct dma_buf_ops
* add TODO item for reviewing and maybe fixing dma-buf exporters

Signed-off-by: Thomas Zimmermann 


I still don't think this works, we're breaking dma_buf_vmap for 
everyone

else here.


I removed the text on the importer. These notes for callers in the 
docs are

more or less a consequence of the exporter semantics.


Callers are importers, so I'm not seeing how that fixes anything.

I thought we at least agreed on the exporter semantics in the other 
thread,

didn't we?

What I'm trying to do is to write dome some rules for exporters, 
even if not

all exporters follow them.


This is a standard interface, everyone needs to follow the same 
rules. And
if they change, we need to make sure nothing breaks and we're not 
creating

issues.

In the past the rule was the dma_buf_vmap was allowed to take the
dma_resv_lock, and that the buffer should be pinned. Now some ttm 
drivers
didn't ever bother with the pinning, and mostly got away with that 
because
drm_prime helpers do the pinning by default at attach time, and most 
users

do call dma_buf_attach.

But if you look through dma-buf docs nothing ever said you have to do a
dummy attachment before you call dma_buf_vmap, that's just slightly 
crappy

implementations that didn't blow up yet.


I had a patch for adding pin to radeon's implementation of vmap. [1] 
Christian told me to not do this; instead just get the lock in the 
fbdev code. His advise almost seems the opposite of what you're 
telling me here.


I think what Daniel suggests here is that we need to smoothly transition 
the code from making assumptions to having a straight interface where 
importers explicitly say when stuff is locked and when stuff is pinned.


I've started this with the attach interface by adding a new dynamic 
approach to that, but you probably need to carry on here with that for 
vmap as well.


When that is done we can migrate every exporter over to the new dynamic 
approach.




For the GEM VRAM helpers, that implicit pin in vmap gave me headaches. 
Because scanouts can only be done from VRAM, which is badly suited for 
exporting. So I ended up with an implicit pin that pins the buffer to 
whatever domain it currently is. I got away with it because GEM VRAM 
BOs are not sharable among devices; fbdev is the only user of that 
functionality and only pins for short periods of time.


I suspect that fixing TTM-based drivers by adding an implicit pin 
would result in a similar situation. Whatever domain it ends up 
pinning, some functionality might not be compatible with that.


Correct, exactly that's the problem.





Given the circumstances, we should leave out this patch from the 
patchset.


So the defacto rules are already a big mess, but that's not a good 
excuse

to make it worse.

What I had in mind is that we split dma_buf_vmap up into two variants:

- The current one, which should guarantee that the buffer is pinned.
   Because that's what all current callers wanted, before the fbdev code
   started allowing non-pinned buffers.


Can we add an explicit pin operation to dma_buf_vmap() to enforce the 
semantics?


At least I would be fine with that. For now amdgpu is the only exporter 
who implements the explicit pin/unpin semantics anyway.


Regards,
Christian.



Best regards
Thomas

[1] https://patchwork.freedesktop.org/patch/400054/?series=83765&rev=1



- The new one, which allows vmapping with just dma_resv locked, and 
should

   have some caching in exporters.

Breaking code and then adding todos about that is kinda not so cool
approach here imo.

Also I guess ttm_bo_vmap should have a check that either the buffer is
pinned, or dma_resv_lock is held.

Cheers, Daniel





Best regards
Thomas




---
   Documentation/gpu/todo.rst | 15 +
   include/drm/drm_gem.h  |  4 
   include/linux/dma-buf.h    | 45 
++

   3 files changed, 64 insertions(+)

diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst
index 009d8e6c7e3c..32bb797a84fc 100644
--- a/Documentation/gpu/todo.rst
+++ b/Documentation/gpu/todo.rst
@@ -505,6 +505,21 @@ Contact: Thomas Zimmermann 
, Christian König, Daniel Vette

   Level: Intermediate
+Enforce rules for dma-buf vmap and pin ops
+--
+
+Exporter implementations of vmap and pin in struct dma_buf_ops 
(and consequently
+struct drm_gem_object_funcs) use a variety of locking semantics. 
Some rely on
+t

Re: [PATCH] drm: Allow drm_fourcc.h without including drm.h

[Simon Ser]

On Friday, December 4, 2020 5:53 AM, James Park  
wrote:

> +#ifdef DRM_FOURCC_STANDALONE
> +#include 
>
> +typedef uint32_t __u32;
> +typedef uint64_t __u64;
> +#else
> #include "drm.h"
> +#endif

C11 allows duplicate typedefs, but older versions of the standard
don't AFAIK. If this is a concern, a solution would be to guard the
typedefs.
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Re: [PATCH v6 04/18] drm/i915/hdcp: No HDCP when encoder is't initialized

[Ramalingam C]

On 2020-11-26 at 13:07:08 +0530, Anshuman Gupta wrote:
> There can be situation when DP MST connector is created without
> mst modeset being done, in those cases connector->encoder will be
> NULL. MST connector->encoder initializes after modeset.

This patch is to reject the HDCP request on MST connector without
encoder initialized(modeset). But userspace are not supposed to request hdcp at 
such
scenario right?.

Ram

> Don't enable HDCP in such cases to prevent any crash.
> 
> Cc: Ramalingam C 
> Cc: Juston Li 
> Signed-off-by: Anshuman Gupta 
> ---
>  drivers/gpu/drm/i915/display/intel_hdcp.c | 6 ++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c 
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index b9d8825e2bb1..7d63e9495956 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -2106,6 +2106,12 @@ int intel_hdcp_enable(struct intel_connector 
> *connector,
>   if (!hdcp->shim)
>   return -ENOENT;
>  
> + if (!connector->encoder) {
> + drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n",
> + connector->base.name, connector->base.base.id);
> + return -ENODEV;
> + }
> +
>   mutex_lock(&hdcp->mutex);
>   mutex_lock(&dig_port->hdcp_mutex);
>   drm_WARN_ON(&dev_priv->drm,
> -- 
> 2.26.2
> 
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Re: [PATCH v6 04/18] drm/i915/hdcp: No HDCP when encoder is't initialized

[Anshuman Gupta]

On 2020-12-04 at 14:32:16 +0530, Ramalingam C wrote:
> On 2020-11-26 at 13:07:08 +0530, Anshuman Gupta wrote:
> > There can be situation when DP MST connector is created without
> > mst modeset being done, in those cases connector->encoder will be
> > NULL. MST connector->encoder initializes after modeset.
> 
> This patch is to reject the HDCP request on MST connector without
> encoder initialized(modeset). But userspace are not supposed to request hdcp 
> at such
> scenario right?.
AFAIU user space doesn't know about DP MST topology until unless it parse
PATH property. This crash oberved on chrome OS with DP MST dock.
>From driver POV it should avoid kernel crash in such cases.

Thanks,
Anshuman Gupta. 
> 
> Ram
> 
> > Don't enable HDCP in such cases to prevent any crash.
> > 
> > Cc: Ramalingam C 
> > Cc: Juston Li 
> > Signed-off-by: Anshuman Gupta 
> > ---
> >  drivers/gpu/drm/i915/display/intel_hdcp.c | 6 ++
> >  1 file changed, 6 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c 
> > b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > index b9d8825e2bb1..7d63e9495956 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > @@ -2106,6 +2106,12 @@ int intel_hdcp_enable(struct intel_connector 
> > *connector,
> > if (!hdcp->shim)
> > return -ENOENT;
> >  
> > +   if (!connector->encoder) {
> > +   drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n",
> > +   connector->base.name, connector->base.base.id);
> > +   return -ENODEV;
> > +   }
> > +
> > mutex_lock(&hdcp->mutex);
> > mutex_lock(&dig_port->hdcp_mutex);
> > drm_WARN_ON(&dev_priv->drm,
> > -- 
> > 2.26.2
> > 
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Re: [PATCH v3 1/7] drm: add drmm_encoder_alloc()

[Laurent Pinchart]

Hi Philipp,

Thank you for the patch.

On Fri, Sep 11, 2020 at 03:57:18PM +0200, Philipp Zabel wrote:
> Add an alternative to drm_encoder_init() that allocates and initializes
> an encoder and registers drm_encoder_cleanup() with
> drmm_add_action_or_reset().
> 
> Signed-off-by: Philipp Zabel 
> ---
> Changes since v2:
>  - call va_start() / va_end() unconditionally
> ---
>  drivers/gpu/drm/drm_encoder.c | 101 ++
>  include/drm/drm_encoder.h |  30 ++
>  2 files changed, 108 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_encoder.c b/drivers/gpu/drm/drm_encoder.c
> index e555281f43d4..f5414705f9ad 100644
> --- a/drivers/gpu/drm/drm_encoder.c
> +++ b/drivers/gpu/drm/drm_encoder.c
> @@ -26,6 +26,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #include "drm_crtc_internal.h"
>  
> @@ -91,25 +92,11 @@ void drm_encoder_unregister_all(struct drm_device *dev)
>   }
>  }
>  
> -/**
> - * drm_encoder_init - Init a preallocated encoder
> - * @dev: drm device
> - * @encoder: the encoder to init
> - * @funcs: callbacks for this encoder
> - * @encoder_type: user visible type of the encoder
> - * @name: printf style format string for the encoder name, or NULL for 
> default name
> - *
> - * Initialises a preallocated encoder. Encoder should be subclassed as part 
> of
> - * driver encoder objects. At driver unload time drm_encoder_cleanup() 
> should be
> - * called from the driver's &drm_encoder_funcs.destroy hook.
> - *
> - * Returns:
> - * Zero on success, error code on failure.
> - */
> -int drm_encoder_init(struct drm_device *dev,
> -  struct drm_encoder *encoder,
> -  const struct drm_encoder_funcs *funcs,
> -  int encoder_type, const char *name, ...)
> +__printf(5, 0)
> +static int __drm_encoder_init(struct drm_device *dev,
> +   struct drm_encoder *encoder,
> +   const struct drm_encoder_funcs *funcs,
> +   int encoder_type, const char *name, va_list ap)
>  {
>   int ret;
>  
> @@ -125,11 +112,7 @@ int drm_encoder_init(struct drm_device *dev,
>   encoder->encoder_type = encoder_type;
>   encoder->funcs = funcs;
>   if (name) {
> - va_list ap;
> -
> - va_start(ap, name);
>   encoder->name = kvasprintf(GFP_KERNEL, name, ap);
> - va_end(ap);
>   } else {
>   encoder->name = kasprintf(GFP_KERNEL, "%s-%d",
> 
> drm_encoder_enum_list[encoder_type].name,
> @@ -150,6 +133,36 @@ int drm_encoder_init(struct drm_device *dev,
>  
>   return ret;
>  }
> +
> +/**
> + * drm_encoder_init - Init a preallocated encoder
> + * @dev: drm device
> + * @encoder: the encoder to init
> + * @funcs: callbacks for this encoder
> + * @encoder_type: user visible type of the encoder
> + * @name: printf style format string for the encoder name, or NULL for 
> default name
> + *
> + * Initializes a preallocated encoder. Encoder should be subclassed as part 
> of
> + * driver encoder objects. At driver unload time drm_encoder_cleanup() 
> should be
> + * called from the driver's &drm_encoder_funcs.destroy hook.
> + *
> + * Returns:
> + * Zero on success, error code on failure.
> + */
> +int drm_encoder_init(struct drm_device *dev,
> +  struct drm_encoder *encoder,
> +  const struct drm_encoder_funcs *funcs,
> +  int encoder_type, const char *name, ...)
> +{
> + va_list ap;
> + int ret;
> +
> + va_start(ap, name);
> + ret = __drm_encoder_init(dev, encoder, funcs, encoder_type, name, ap);
> + va_end(ap);
> +
> + return ret;
> +}
>  EXPORT_SYMBOL(drm_encoder_init);
>  
>  /**
> @@ -181,6 +194,48 @@ void drm_encoder_cleanup(struct drm_encoder *encoder)
>  }
>  EXPORT_SYMBOL(drm_encoder_cleanup);
>  
> +static void drmm_encoder_alloc_release(struct drm_device *dev, void *ptr)
> +{
> + struct drm_encoder *encoder = ptr;
> +
> + if (WARN_ON(!encoder->dev))
> + return;
> +
> + drm_encoder_cleanup(encoder);
> +}
> +
> +void *__drmm_encoder_alloc(struct drm_device *dev, size_t size, size_t 
> offset,
> +const struct drm_encoder_funcs *funcs,
> +int encoder_type, const char *name, ...)
> +{
> + void *container;
> + struct drm_encoder *encoder;
> + va_list ap;
> + int ret;
> +
> + if (WARN_ON(!funcs || funcs->destroy))
> + return ERR_PTR(-EINVAL);
> +
> + container = drmm_kzalloc(dev, size, GFP_KERNEL);
> + if (!container)
> + return ERR_PTR(-EINVAL);
> +
> + encoder = container + offset;
> +
> + va_start(ap, name);
> + ret = __drm_encoder_init(dev, encoder, funcs, encoder_type, name, ap);
> + va_end(ap);
> + if (ret)
> + return ERR_PTR(ret);
> +
> + ret = drmm_add_action_or_reset(dev, drmm_encoder_alloc_rele

Re: [PATCH v2 0/6] drm/panel: mantix and st7703 fixes and additions

[Guido Günther]

Hi Linus,
On Thu, Nov 19, 2020 at 09:35:17AM +0100, Linus Walleij wrote:
> On Wed, Nov 18, 2020 at 9:29 AM Guido Günther  wrote:
> 
> > This adds new panel type to the mantix driver as found on the Librem 5 and
> > fixes a glitch in the init sequence (affecting both panels). The fix is at 
> > the
> > start of the series to make backporting simpler.
> > It also adds a patch to make st7703 use dev_err_probe().
> >
> > changes from v1
> > - as per review comments by Linus Walleij
> >   - fix alphabetical ordering in 
> > Documentation/devicetree/bindings/vendor-prefixes.yaml
> > 
> > https://lore.kernel.org/dri-devel/CACRpkdao_TMcpRsdK=7k5fnkjse0bqwk58iwu0xsxddndcf...@mail.gmail.com/
> >   - add reviewed by to all except 5/6, thanks
> 
> The whole v2 looks fine to me, I'd give the devicetree
> maintainers some slack to review the DT patches then I can
> apply the whole series unless you have commit access yourself,
> just tell me.

Thanks. Is 2 weeks enough slack? Checking what's the rule of thumb here.
Cheers,
 -- Guido

> 
> For all v2 patches:
> Reviewed-by: Linus Walleij 
> 
> If you have time, please review my s6e63m0 series.
> https://lore.kernel.org/dri-devel/20201117175621.870085-1-linus.wall...@linaro.org/
> https://lore.kernel.org/dri-devel/20201117175621.870085-2-linus.wall...@linaro.org/
> https://lore.kernel.org/dri-devel/20201117175621.870085-3-linus.wall...@linaro.org/
> 
> Yours,
> Linus Walleij
> 
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Re: [PATCH v3 2/7] drm/simple_kms_helper: add drmm_simple_encoder_alloc()

[Laurent Pinchart]

Hi Philipp,

Thank you for the patch.

On Fri, Sep 11, 2020 at 03:57:19PM +0200, Philipp Zabel wrote:
> Add an alternative to drm_simple_encoder_init() that allocates and
> initializes a simple encoder and registers drm_encoder_cleanup() with
> drmm_add_action_or_reset().
> 
> Signed-off-by: Philipp Zabel 
> ---
>  drivers/gpu/drm/drm_simple_kms_helper.c | 12 
>  include/drm/drm_simple_kms_helper.h | 24 
>  2 files changed, 36 insertions(+)
> 
> diff --git a/drivers/gpu/drm/drm_simple_kms_helper.c 
> b/drivers/gpu/drm/drm_simple_kms_helper.c
> index 74946690aba4..3cbbfb0f9b51 100644
> --- a/drivers/gpu/drm/drm_simple_kms_helper.c
> +++ b/drivers/gpu/drm/drm_simple_kms_helper.c
> @@ -9,6 +9,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -71,6 +72,17 @@ int drm_simple_encoder_init(struct drm_device *dev,
>  }
>  EXPORT_SYMBOL(drm_simple_encoder_init);
>  
> +static const struct drm_encoder_funcs drmm_simple_encoder_funcs_empty = { };
> +
> +void *__drmm_simple_encoder_alloc(struct drm_device *dev, size_t size,
> +   size_t offset, int encoder_type)
> +{
> + return __drmm_encoder_alloc(dev, size, offset,
> + &drmm_simple_encoder_funcs_empty,
> + encoder_type, NULL);
> +}
> +EXPORT_SYMBOL(__drmm_simple_encoder_alloc);

Do we need this ? Wouldn't it be better support a NULL drm_encoder_funcs
in the core (if we don't already) and use drmm_encoder_alloc() directly
in drivers ?

> +
>  static enum drm_mode_status
>  drm_simple_kms_crtc_mode_valid(struct drm_crtc *crtc,
>  const struct drm_display_mode *mode)
> diff --git a/include/drm/drm_simple_kms_helper.h 
> b/include/drm/drm_simple_kms_helper.h
> index a026375464ff..e6dbf3161c2f 100644
> --- a/include/drm/drm_simple_kms_helper.h
> +++ b/include/drm/drm_simple_kms_helper.h
> @@ -185,4 +185,28 @@ int drm_simple_encoder_init(struct drm_device *dev,
>   struct drm_encoder *encoder,
>   int encoder_type);
>  
> +void *__drmm_simple_encoder_alloc(struct drm_device *dev, size_t size,
> +   size_t offset, int encoder_type);
> +
> +/**
> + * drmm_simple_encoder_alloc - Allocate and initialize an encoder with basic
> + * functionality.
> + * @dev: drm device
> + * @type: the type of the struct which contains struct &drm_encoder
> + * @member: the name of the &drm_encoder within @type.
> + * @encoder_type: user visible type of the encoder
> + *
> + * Allocates and initializes an encoder that has no further functionality.
> + * Settings for possible CRTC and clones are left to their initial values.
> + * Cleanup is automatically handled through registering drm_encoder_cleanup()
> + * with drmm_add_action().
> + *
> + * Returns:
> + * Pointer to new encoder, or ERR_PTR on failure.
> + */
> +#define drmm_simple_encoder_alloc(dev, type, member, encoder_type) \
> + ((type *)__drmm_simple_encoder_alloc(dev, sizeof(type), \
> +  offsetof(type, member), \
> +  encoder_type))
> +
>  #endif /* __LINUX_DRM_SIMPLE_KMS_HELPER_H */

-- 
Regards,

Laurent Pinchart
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Re: [PATCH v3 3/7] drm/plane: add drmm_universal_plane_alloc()

[Laurent Pinchart]

Hi Philipp,

Thank you for the patch.

On Fri, Sep 11, 2020 at 03:57:20PM +0200, Philipp Zabel wrote:
> Add an alternative to drm_universal_plane_init() that allocates
> and initializes a plane and registers drm_plane_cleanup() with
> drmm_add_action_or_reset().
> 
> Signed-off-by: Philipp Zabel 
> ---
> Changes since v2:
>  - call va_start() / va_end() unconditionally
> ---
>  drivers/gpu/drm/drm_plane.c | 126 +++-
>  include/drm/drm_plane.h |  42 
>  2 files changed, 139 insertions(+), 29 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c
> index affe1cfed009..0081f6bb76b2 100644
> --- a/drivers/gpu/drm/drm_plane.c
> +++ b/drivers/gpu/drm/drm_plane.c
> @@ -30,6 +30,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  
>  #include "drm_crtc_internal.h"
> @@ -152,31 +153,16 @@ static int create_in_format_blob(struct drm_device 
> *dev, struct drm_plane *plane
>   return 0;
>  }
>  
> -/**
> - * drm_universal_plane_init - Initialize a new universal plane object
> - * @dev: DRM device
> - * @plane: plane object to init
> - * @possible_crtcs: bitmask of possible CRTCs
> - * @funcs: callbacks for the new plane
> - * @formats: array of supported formats (DRM_FORMAT\_\*)
> - * @format_count: number of elements in @formats
> - * @format_modifiers: array of struct drm_format modifiers terminated by
> - *DRM_FORMAT_MOD_INVALID
> - * @type: type of plane (overlay, primary, cursor)
> - * @name: printf style format string for the plane name, or NULL for default 
> name
> - *
> - * Initializes a plane object of type @type.
> - *
> - * Returns:
> - * Zero on success, error code on failure.
> - */
> -int drm_universal_plane_init(struct drm_device *dev, struct drm_plane *plane,
> -  uint32_t possible_crtcs,
> -  const struct drm_plane_funcs *funcs,
> -  const uint32_t *formats, unsigned int format_count,
> -  const uint64_t *format_modifiers,
> -  enum drm_plane_type type,
> -  const char *name, ...)
> +__printf(9, 0)
> +static int __drm_universal_plane_init(struct drm_device *dev,
> +   struct drm_plane *plane,
> +   uint32_t possible_crtcs,
> +   const struct drm_plane_funcs *funcs,
> +   const uint32_t *formats,
> +   unsigned int format_count,
> +   const uint64_t *format_modifiers,
> +   enum drm_plane_type type,
> +   const char *name, va_list ap)
>  {
>   struct drm_mode_config *config = &dev->mode_config;
>   unsigned int format_modifier_count = 0;
> @@ -237,11 +223,7 @@ int drm_universal_plane_init(struct drm_device *dev, 
> struct drm_plane *plane,
>   }
>  
>   if (name) {
> - va_list ap;
> -
> - va_start(ap, name);
>   plane->name = kvasprintf(GFP_KERNEL, name, ap);
> - va_end(ap);
>   } else {
>   plane->name = kasprintf(GFP_KERNEL, "plane-%d",
>   drm_num_planes(dev));
> @@ -286,8 +268,94 @@ int drm_universal_plane_init(struct drm_device *dev, 
> struct drm_plane *plane,
>  
>   return 0;
>  }
> +
> +/**
> + * drm_universal_plane_init - Initialize a new universal plane object
> + * @dev: DRM device
> + * @plane: plane object to init
> + * @possible_crtcs: bitmask of possible CRTCs
> + * @funcs: callbacks for the new plane
> + * @formats: array of supported formats (DRM_FORMAT\_\*)
> + * @format_count: number of elements in @formats
> + * @format_modifiers: array of struct drm_format modifiers terminated by
> + *DRM_FORMAT_MOD_INVALID
> + * @type: type of plane (overlay, primary, cursor)
> + * @name: printf style format string for the plane name, or NULL for default 
> name
> + *
> + * Initializes a plane object of type @type.
> + *
> + * Returns:
> + * Zero on success, error code on failure.
> + */
> +int drm_universal_plane_init(struct drm_device *dev, struct drm_plane *plane,
> +  uint32_t possible_crtcs,
> +  const struct drm_plane_funcs *funcs,
> +  const uint32_t *formats, unsigned int format_count,
> +  const uint64_t *format_modifiers,
> +  enum drm_plane_type type,
> +  const char *name, ...)
> +{
> + va_list ap;
> + int ret;
> +
> + va_start(ap, name);
> + ret = __drm_universal_plane_init(dev, plane, possible_crtcs, funcs,
> +  formats, format_count, 
> format_modifiers,
> +  type, name, ap);
> + va_end(ap);
> 

Re: [PATCH v3 4/7] drm/crtc: add drmm_crtc_alloc_with_planes()

[Laurent Pinchart]

Hi Philipp,

Thank you for the patch.

On Fri, Sep 11, 2020 at 03:57:21PM +0200, Philipp Zabel wrote:
> Add an alternative to drm_crtc_init_with_planes() that allocates
> and initializes a crtc and registers drm_crtc_cleanup() with
> drmm_add_action_or_reset().
> 
> Signed-off-by: Philipp Zabel 
> ---
> Changes since v2:
>  - call va_start() / va_end() unconditionally
> ---
>  drivers/gpu/drm/drm_crtc.c | 116 -
>  include/drm/drm_crtc.h |  33 +++
>  2 files changed, 121 insertions(+), 28 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> index aecdd7ea26dc..b9e7c11a76b7 100644
> --- a/drivers/gpu/drm/drm_crtc.c
> +++ b/drivers/gpu/drm/drm_crtc.c
> @@ -38,6 +38,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -231,30 +232,12 @@ struct dma_fence *drm_crtc_create_fence(struct drm_crtc 
> *crtc)
>   *   Setting MODE_ID to 0 will release reserved resources for the CRTC.
>   */
>  
> -/**
> - * drm_crtc_init_with_planes - Initialise a new CRTC object with
> - *specified primary and cursor planes.
> - * @dev: DRM device
> - * @crtc: CRTC object to init
> - * @primary: Primary plane for CRTC
> - * @cursor: Cursor plane for CRTC
> - * @funcs: callbacks for the new CRTC
> - * @name: printf style format string for the CRTC name, or NULL for default 
> name
> - *
> - * Inits a new object created as base part of a driver crtc object. Drivers
> - * should use this function instead of drm_crtc_init(), which is only 
> provided
> - * for backwards compatibility with drivers which do not yet support 
> universal
> - * planes). For really simple hardware which has only 1 plane look at
> - * drm_simple_display_pipe_init() instead.
> - *
> - * Returns:
> - * Zero on success, error code on failure.
> - */
> -int drm_crtc_init_with_planes(struct drm_device *dev, struct drm_crtc *crtc,
> -   struct drm_plane *primary,
> -   struct drm_plane *cursor,
> -   const struct drm_crtc_funcs *funcs,
> -   const char *name, ...)
> +__printf(6, 0)
> +static int __drm_crtc_init_with_planes(struct drm_device *dev, struct 
> drm_crtc *crtc,
> +struct drm_plane *primary,
> +struct drm_plane *cursor,
> +const struct drm_crtc_funcs *funcs,
> +const char *name, va_list ap)
>  {
>   struct drm_mode_config *config = &dev->mode_config;
>   int ret;
> @@ -282,11 +265,7 @@ int drm_crtc_init_with_planes(struct drm_device *dev, 
> struct drm_crtc *crtc,
>   return ret;
>  
>   if (name) {
> - va_list ap;
> -
> - va_start(ap, name);
>   crtc->name = kvasprintf(GFP_KERNEL, name, ap);
> - va_end(ap);
>   } else {
>   crtc->name = kasprintf(GFP_KERNEL, "crtc-%d",
>  drm_num_crtcs(dev));
> @@ -330,8 +309,89 @@ int drm_crtc_init_with_planes(struct drm_device *dev, 
> struct drm_crtc *crtc,
>  
>   return 0;
>  }
> +
> +/**
> + * drm_crtc_init_with_planes - Initialise a new CRTC object with
> + *specified primary and cursor planes.
> + * @dev: DRM device
> + * @crtc: CRTC object to init
> + * @primary: Primary plane for CRTC
> + * @cursor: Cursor plane for CRTC
> + * @funcs: callbacks for the new CRTC
> + * @name: printf style format string for the CRTC name, or NULL for default 
> name
> + *
> + * Inits a new object created as base part of a driver crtc object. Drivers
> + * should use this function instead of drm_crtc_init(), which is only 
> provided
> + * for backwards compatibility with drivers which do not yet support 
> universal
> + * planes). For really simple hardware which has only 1 plane look at
> + * drm_simple_display_pipe_init() instead.
> + *
> + * Returns:
> + * Zero on success, error code on failure.
> + */
> +int drm_crtc_init_with_planes(struct drm_device *dev, struct drm_crtc *crtc,
> +   struct drm_plane *primary,
> +   struct drm_plane *cursor,
> +   const struct drm_crtc_funcs *funcs,
> +   const char *name, ...)
> +{
> + va_list ap;
> + int ret;
> +
> + va_start(ap, name);
> + ret = __drm_crtc_init_with_planes(dev, crtc, primary, cursor, funcs,
> +   name, ap);
> + va_end(ap);
> +
> + return ret;
> +}
>  EXPORT_SYMBOL(drm_crtc_init_with_planes);
>  
> +static void drmm_crtc_alloc_with_planes_cleanup(struct drm_device *dev,
> + void *ptr)
> +{
> + struct drm_crtc *crtc = ptr;
> +
> + drm_crtc_cleanup(crtc);
> +}
> +
> +void *__drmm_crtc_alloc_with_planes(struct drm_device *dev,
> + size_t size, s

[PATCH] drm: Remove drmm_add_final_kfree() declaration from public headers

[Laurent Pinchart]

The drmm_add_final_kfree() function is declared in the
include/drm/drm_managed.h public header, but has become an internal API
not exposed to drivers. Drop it from drm_managed.h as it's already
declared in drm_internal.h.

Signed-off-by: Laurent Pinchart 
---
 include/drm/drm_managed.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/drm/drm_managed.h b/include/drm/drm_managed.h
index ca4114633bf9..b45c6fbf53ac 100644
--- a/include/drm/drm_managed.h
+++ b/include/drm/drm_managed.h
@@ -44,8 +44,6 @@ int __must_check __drmm_add_action_or_reset(struct drm_device 
*dev,
drmres_release_t action,
void *data, const char *name);
 
-void drmm_add_final_kfree(struct drm_device *dev, void *container);
-
 void *drmm_kmalloc(struct drm_device *dev, size_t size, gfp_t gfp) __malloc;
 
 /**
-- 
Regards,

Laurent Pinchart

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Re: [PATCH] drm: Remove drmm_add_final_kfree() declaration from public headers

[Thomas Zimmermann]

Am 04.12.20 um 10:29 schrieb Laurent Pinchart:

The drmm_add_final_kfree() function is declared in the
include/drm/drm_managed.h public header, but has become an internal API
not exposed to drivers. Drop it from drm_managed.h as it's already
declared in drm_internal.h.

Signed-off-by: Laurent Pinchart 


Acked-by: Thomas Zimmermann 


---
  include/drm/drm_managed.h | 2 --
  1 file changed, 2 deletions(-)

diff --git a/include/drm/drm_managed.h b/include/drm/drm_managed.h
index ca4114633bf9..b45c6fbf53ac 100644
--- a/include/drm/drm_managed.h
+++ b/include/drm/drm_managed.h
@@ -44,8 +44,6 @@ int __must_check __drmm_add_action_or_reset(struct drm_device 
*dev,
drmres_release_t action,
void *data, const char *name);
  
-void drmm_add_final_kfree(struct drm_device *dev, void *container);

-
  void *drmm_kmalloc(struct drm_device *dev, size_t size, gfp_t gfp) __malloc;
  
  /**




--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer



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Re: [PATCH v3 1/7] drm: add drmm_encoder_alloc()

[Philipp Zabel]

Hi Laurent,

On Fri, 2020-12-04 at 11:17 +0200, Laurent Pinchart wrote:
> Hi Philipp,
> 
> Thank you for the patch.

Thank you for the review.

> On Fri, Sep 11, 2020 at 03:57:18PM +0200, Philipp Zabel wrote:
> > Add an alternative to drm_encoder_init() that allocates and initializes
> > an encoder and registers drm_encoder_cleanup() with
> > drmm_add_action_or_reset().
> > 
> > Signed-off-by: Philipp Zabel 
> > ---
> > Changes since v2:
> >  - call va_start() / va_end() unconditionally
> > ---
> >  drivers/gpu/drm/drm_encoder.c | 101 ++
> >  include/drm/drm_encoder.h |  30 ++
> >  2 files changed, 108 insertions(+), 23 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/drm_encoder.c b/drivers/gpu/drm/drm_encoder.c
> > index e555281f43d4..f5414705f9ad 100644
> > --- a/drivers/gpu/drm/drm_encoder.c
> > +++ b/drivers/gpu/drm/drm_encoder.c
> > @@ -26,6 +26,7 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  
> >  #include "drm_crtc_internal.h"
> >  
> > @@ -91,25 +92,11 @@ void drm_encoder_unregister_all(struct drm_device *dev)
> > }
> >  }
> >  
> > -/**
> > - * drm_encoder_init - Init a preallocated encoder
> > - * @dev: drm device
> > - * @encoder: the encoder to init
> > - * @funcs: callbacks for this encoder
> > - * @encoder_type: user visible type of the encoder
> > - * @name: printf style format string for the encoder name, or NULL for 
> > default name
> > - *
> > - * Initialises a preallocated encoder. Encoder should be subclassed as 
> > part of
> > - * driver encoder objects. At driver unload time drm_encoder_cleanup() 
> > should be
> > - * called from the driver's &drm_encoder_funcs.destroy hook.
> > - *
> > - * Returns:
> > - * Zero on success, error code on failure.
> > - */
> > -int drm_encoder_init(struct drm_device *dev,
> > -struct drm_encoder *encoder,
> > -const struct drm_encoder_funcs *funcs,
> > -int encoder_type, const char *name, ...)
> > +__printf(5, 0)
> > +static int __drm_encoder_init(struct drm_device *dev,
> > + struct drm_encoder *encoder,
> > + const struct drm_encoder_funcs *funcs,
> > + int encoder_type, const char *name, va_list ap)
> >  {
> > int ret;
> >  
> > @@ -125,11 +112,7 @@ int drm_encoder_init(struct drm_device *dev,
> > encoder->encoder_type = encoder_type;
> > encoder->funcs = funcs;
> > if (name) {
> > -   va_list ap;
> > -
> > -   va_start(ap, name);
> > encoder->name = kvasprintf(GFP_KERNEL, name, ap);
> > -   va_end(ap);
> > } else {
> > encoder->name = kasprintf(GFP_KERNEL, "%s-%d",
> >   
> > drm_encoder_enum_list[encoder_type].name,
> > @@ -150,6 +133,36 @@ int drm_encoder_init(struct drm_device *dev,
> >  
> > return ret;
> >  }
> > +
> > +/**
> > + * drm_encoder_init - Init a preallocated encoder
> > + * @dev: drm device
> > + * @encoder: the encoder to init
> > + * @funcs: callbacks for this encoder
> > + * @encoder_type: user visible type of the encoder
> > + * @name: printf style format string for the encoder name, or NULL for 
> > default name
> > + *
> > + * Initializes a preallocated encoder. Encoder should be subclassed as 
> > part of
> > + * driver encoder objects. At driver unload time drm_encoder_cleanup() 
> > should be
> > + * called from the driver's &drm_encoder_funcs.destroy hook.
> > + *
> > + * Returns:
> > + * Zero on success, error code on failure.
> > + */
> > +int drm_encoder_init(struct drm_device *dev,
> > +struct drm_encoder *encoder,
> > +const struct drm_encoder_funcs *funcs,
> > +int encoder_type, const char *name, ...)
> > +{
> > +   va_list ap;
> > +   int ret;
> > +
> > +   va_start(ap, name);
> > +   ret = __drm_encoder_init(dev, encoder, funcs, encoder_type, name, ap);
> > +   va_end(ap);
> > +
> > +   return ret;
> > +}
> >  EXPORT_SYMBOL(drm_encoder_init);
> >  
> >  /**
> > @@ -181,6 +194,48 @@ void drm_encoder_cleanup(struct drm_encoder *encoder)
> >  }
> >  EXPORT_SYMBOL(drm_encoder_cleanup);
> >  
> > +static void drmm_encoder_alloc_release(struct drm_device *dev, void *ptr)
> > +{
> > +   struct drm_encoder *encoder = ptr;
> > +
> > +   if (WARN_ON(!encoder->dev))
> > +   return;
> > +
> > +   drm_encoder_cleanup(encoder);
> > +}
> > +
> > +void *__drmm_encoder_alloc(struct drm_device *dev, size_t size, size_t 
> > offset,
> > +  const struct drm_encoder_funcs *funcs,
> > +  int encoder_type, const char *name, ...)
> > +{
> > +   void *container;
> > +   struct drm_encoder *encoder;
> > +   va_list ap;
> > +   int ret;
> > +
> > +   if (WARN_ON(!funcs || funcs->destroy))
> > +   return ERR_PTR(-EINVAL);
> > +
> > +   container = drmm_kzalloc(dev, size, GFP_KERNEL);
> > +   if (!container)
> > +   return ERR_PTR(-EI

Re: [PATCH v3 2/7] drm/simple_kms_helper: add drmm_simple_encoder_alloc()

[Philipp Zabel]

Hi Laurent,

On Fri, 2020-12-04 at 11:19 +0200, Laurent Pinchart wrote:
> Hi Philipp,
> 
> Thank you for the patch.
> 
> On Fri, Sep 11, 2020 at 03:57:19PM +0200, Philipp Zabel wrote:
> > Add an alternative to drm_simple_encoder_init() that allocates and
> > initializes a simple encoder and registers drm_encoder_cleanup() with
> > drmm_add_action_or_reset().
> > 
> > Signed-off-by: Philipp Zabel 
> > ---
> >  drivers/gpu/drm/drm_simple_kms_helper.c | 12 
> >  include/drm/drm_simple_kms_helper.h | 24 
> >  2 files changed, 36 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/drm_simple_kms_helper.c 
> > b/drivers/gpu/drm/drm_simple_kms_helper.c
> > index 74946690aba4..3cbbfb0f9b51 100644
> > --- a/drivers/gpu/drm/drm_simple_kms_helper.c
> > +++ b/drivers/gpu/drm/drm_simple_kms_helper.c
> > @@ -9,6 +9,7 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include 
> >  #include 
> >  #include 
> > @@ -71,6 +72,17 @@ int drm_simple_encoder_init(struct drm_device *dev,
> >  }
> >  EXPORT_SYMBOL(drm_simple_encoder_init);
> >  
> > +static const struct drm_encoder_funcs drmm_simple_encoder_funcs_empty = { 
> > };
> > +
> > +void *__drmm_simple_encoder_alloc(struct drm_device *dev, size_t size,
> > + size_t offset, int encoder_type)
> > +{
> > +   return __drmm_encoder_alloc(dev, size, offset,
> > +   &drmm_simple_encoder_funcs_empty,
> > +   encoder_type, NULL);
> > +}
> > +EXPORT_SYMBOL(__drmm_simple_encoder_alloc);
> 
> Do we need this ? Wouldn't it be better support a NULL drm_encoder_funcs
> in the core (if we don't already) and use drmm_encoder_alloc() directly
> in drivers ?

I could change it to remove the empty drm_encoder_funcs, and prepend
something like this:

--8<--
>From 12147d90a8ae48dabc16ca8750fa0f629cc46570 Mon Sep 17 00:00:00 2001
From: Philipp Zabel 
Date: Fri, 4 Dec 2020 10:49:41 +0100
Subject: [PATCH] drm/encoder: make encoder control functions optional

Simple managed encoders do not require the .destroy callback,
make the whole funcs structure optional.

Signed-off-by: Philipp Zabel 
---
 drivers/gpu/drm/drm_encoder.c | 4 ++--
 drivers/gpu/drm/drm_mode_config.c | 5 +++--
 include/drm/drm_encoder.h | 2 +-
 3 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_encoder.c b/drivers/gpu/drm/drm_encoder.c
index e555281f43d4..b0b86a3c08f5 100644
--- a/drivers/gpu/drm/drm_encoder.c
+++ b/drivers/gpu/drm/drm_encoder.c
@@ -72,7 +72,7 @@ int drm_encoder_register_all(struct drm_device *dev)
int ret = 0;
 
drm_for_each_encoder(encoder, dev) {
-   if (encoder->funcs->late_register)
+   if (encoder->funcs && encoder->funcs->late_register)
ret = encoder->funcs->late_register(encoder);
if (ret)
return ret;
@@ -86,7 +86,7 @@ void drm_encoder_unregister_all(struct drm_device *dev)
struct drm_encoder *encoder;
 
drm_for_each_encoder(encoder, dev) {
-   if (encoder->funcs->early_unregister)
+   if (encoder->funcs && encoder->funcs->early_unregister)
encoder->funcs->early_unregister(encoder);
}
 }
diff --git a/drivers/gpu/drm/drm_mode_config.c 
b/drivers/gpu/drm/drm_mode_config.c
index f1affc1bb679..87e144155456 100644
--- a/drivers/gpu/drm/drm_mode_config.c
+++ b/drivers/gpu/drm/drm_mode_config.c
@@ -195,7 +195,7 @@ void drm_mode_config_reset(struct drm_device *dev)
crtc->funcs->reset(crtc);
 
drm_for_each_encoder(encoder, dev)
-   if (encoder->funcs->reset)
+   if (encoder->funcs && encoder->funcs->reset)
encoder->funcs->reset(encoder);
 
drm_connector_list_iter_begin(dev, &conn_iter);
@@ -487,7 +487,8 @@ void drm_mode_config_cleanup(struct drm_device *dev)
 
list_for_each_entry_safe(encoder, enct, &dev->mode_config.encoder_list,
 head) {
-   encoder->funcs->destroy(encoder);
+   if (encoder->funcs)
+   encoder->funcs->destroy(encoder);
}
 
drm_connector_list_iter_begin(dev, &conn_iter);
diff --git a/include/drm/drm_encoder.h b/include/drm/drm_encoder.h
index 5dfa5f7a80a7..833123637fbf 100644
--- a/include/drm/drm_encoder.h
+++ b/include/drm/drm_encoder.h
@@ -89,7 +89,7 @@ struct drm_encoder_funcs {
  * @head: list management
  * @base: base KMS object
  * @name: human readable name, can be overwritten by the driver
- * @funcs: control functions
+ * @funcs: control functions, can be NULL for simple managed encoders
  * @helper_private: mid-layer private data
  *
  * CRTCs drive pixels to encoders, which convert them into signals
-- 
2.20.1
-->8--

regards
Philipp
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Re: [PATCH v5] drm/bridge: tfp410: Set input_bus_flags in atomic_check

[Boris Brezillon]

On Thu, 3 Dec 2020 18:20:48 +0530
Nikhil Devshatwar  wrote:

> input_bus_flags are specified in drm_bridge_timings (legacy) as well
> as drm_bridge_state->input_bus_cfg.flags
> 
> The flags from the timings will be deprecated. Bridges are supposed
> to validate and set the bridge state flags from atomic_check.
> 
> Implement atomic_check hook for the same.
> 
> Signed-off-by: Nikhil Devshatwar 
> ---
> 
> Notes:
> changes from v4:
> * fix a warning Reported-by: kernel test robot 
> 
>  drivers/gpu/drm/bridge/ti-tfp410.c | 15 +++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/drivers/gpu/drm/bridge/ti-tfp410.c 
> b/drivers/gpu/drm/bridge/ti-tfp410.c
> index 3def9acba86b..92963d12106b 100644
> --- a/drivers/gpu/drm/bridge/ti-tfp410.c
> +++ b/drivers/gpu/drm/bridge/ti-tfp410.c
> @@ -233,6 +233,20 @@ static u32 *tfp410_get_input_bus_fmts(struct drm_bridge 
> *bridge,
>   return input_fmts;
>  }
>  
> +static int tfp410_atomic_check(struct drm_bridge *bridge,
> + struct drm_bridge_state *bridge_state,
> + struct drm_crtc_state *crtc_state,
> + struct drm_connector_state *conn_state)
> +{
> + struct tfp410 *dvi = drm_bridge_to_tfp410(bridge);
> +
> + /*
> +  * There might be flags negotiation supported in future
> +  * Set the bus flags in atomic_check statically for now
> +  */
> + bridge_state->input_bus_cfg.flags = dvi->timings.input_bus_flags;

The return statement is still missing :-).

> +}
> +
>  static const struct drm_bridge_funcs tfp410_bridge_funcs = {
>   .attach = tfp410_attach,
>   .detach = tfp410_detach,
> @@ -243,6 +257,7 @@ static const struct drm_bridge_funcs tfp410_bridge_funcs 
> = {
>   .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
>   .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
>   .atomic_get_input_bus_fmts = tfp410_get_input_bus_fmts,
> + .atomic_check = tfp410_atomic_check,
>  };
>  
>  static const struct drm_bridge_timings tfp410_default_timings = {

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Re: [PATCH v4 4/7] drm/bridge: mhdp8546: Set input_bus_flags from atomic_check

[Boris Brezillon]

On Tue, 1 Dec 2020 17:48:27 +0530
Nikhil Devshatwar  wrote:

> input_bus_flags are specified in drm_bridge_timings (legacy) as well
> as drm_bridge_state->input_bus_cfg.flags
> 
> The flags from the timings will be deprecated. Bridges are supposed
> to validate and set the bridge state flags from atomic_check.
> 
> Signed-off-by: Nikhil Devshatwar 
> ---
>  drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c | 6 ++
>  drivers/gpu/drm/bridge/ti-tfp410.c  | 1 +
>  2 files changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c 
> b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
> index 2cd809eed827..9c17e4bb517e 100644
> --- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
> +++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
> @@ -2121,6 +2121,12 @@ static int cdns_mhdp_atomic_check(struct drm_bridge 
> *bridge,
>   return -EINVAL;
>   }
>  
> + /*
> +  * There might be flags negotiation supported in future
> +  * Set the bus flags in atomic_check statically for now
> +  */
> + bridge_state->input_bus_cfg.flags = bridge->timings->input_bus_flags;
> +
>   mutex_unlock(&mhdp->link_mutex);
>   return 0;
>  }
> diff --git a/drivers/gpu/drm/bridge/ti-tfp410.c 
> b/drivers/gpu/drm/bridge/ti-tfp410.c
> index 4c536df003c8..9035d2145a28 100644
> --- a/drivers/gpu/drm/bridge/ti-tfp410.c
> +++ b/drivers/gpu/drm/bridge/ti-tfp410.c
> @@ -245,6 +245,7 @@ int tfp410_atomic_check(struct drm_bridge *bridge,
>* Set the bus flags in atomic_check statically for now
>*/
>   bridge_state->input_bus_cfg.flags = dvi->timings.input_bus_flags;
> + return 0;

And here is the return statement that was missing in patch 2 :-).

>  }
>  
>  static const struct drm_bridge_funcs tfp410_bridge_funcs = {

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Re: [PATCH v4 3/7] drm/bridge: mhdp8546: Add minimal format negotiation

[Boris Brezillon]

On Tue, 1 Dec 2020 17:48:26 +0530
Nikhil Devshatwar  wrote:

> With new connector model, mhdp bridge will not create the connector and
> SoC driver will rely on format negotiation to setup the encoder format.
> 
> Support minimal format negotiations hooks in the drm_bridge_funcs.
> Complete format negotiation can be added based on EDID data.
> This patch adds the minimal required support to avoid failure
> after moving to new connector model.
> 
> Signed-off-by: Nikhil Devshatwar 
> Reviewed-by: Tomi Valkeinen 
> ---
> 
> Notes:
> changes from v1:
> * cosmetic fixes, commit message update
> 
>  .../drm/bridge/cadence/cdns-mhdp8546-core.c   | 25 +++
>  1 file changed, 25 insertions(+)
> 
> diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c 
> b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
> index d0c65610ebb5..2cd809eed827 100644
> --- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
> +++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
> @@ -2078,6 +2078,30 @@ cdns_mhdp_bridge_atomic_reset(struct drm_bridge 
> *bridge)
>   return &cdns_mhdp_state->base;
>  }
>  
> +static u32 *cdns_mhdp_get_input_bus_fmts(struct drm_bridge *bridge,
> +   struct drm_bridge_state *bridge_state,
> +   struct drm_crtc_state *crtc_state,
> +   struct drm_connector_state *conn_state,
> +   u32 output_fmt,
> +   unsigned int *num_input_fmts)
> +{
> + u32 *input_fmts;
> + u32 default_bus_format = MEDIA_BUS_FMT_RGB121212_1X36;
> +
> + *num_input_fmts = 0;
> +
> + if (output_fmt != MEDIA_BUS_FMT_FIXED)
> + return NULL;
> +
> + input_fmts = kzalloc(sizeof(*input_fmts), GFP_KERNEL);
> + if (!input_fmts)
> + return NULL;
> +
> + *num_input_fmts = 1;
> + input_fmts[0] = default_bus_format;

Why not 

input_fmts[0] = MEDIA_BUS_FMT_RGB121212_1X36;

?

This way you could get rid of the default_bus_format variable.

> + return input_fmts;
> +}
> +
>  static int cdns_mhdp_atomic_check(struct drm_bridge *bridge,
> struct drm_bridge_state *bridge_state,
> struct drm_crtc_state *crtc_state,
> @@ -2142,6 +2166,7 @@ static const struct drm_bridge_funcs 
> cdns_mhdp_bridge_funcs = {
>   .atomic_duplicate_state = cdns_mhdp_bridge_atomic_duplicate_state,
>   .atomic_destroy_state = cdns_mhdp_bridge_atomic_destroy_state,
>   .atomic_reset = cdns_mhdp_bridge_atomic_reset,
> + .atomic_get_input_bus_fmts = cdns_mhdp_get_input_bus_fmts,
>   .detect = cdns_mhdp_bridge_detect,
>   .get_edid = cdns_mhdp_bridge_get_edid,
>   .hpd_enable = cdns_mhdp_bridge_hpd_enable,

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Re: [PATCH v4 4/7] drm/bridge: mhdp8546: Set input_bus_flags from atomic_check

[Boris Brezillon]

On Tue, 1 Dec 2020 17:48:27 +0530
Nikhil Devshatwar  wrote:

> input_bus_flags are specified in drm_bridge_timings (legacy) as well
> as drm_bridge_state->input_bus_cfg.flags
> 
> The flags from the timings will be deprecated. Bridges are supposed
> to validate and set the bridge state flags from atomic_check.
> 
> Signed-off-by: Nikhil Devshatwar 
> ---
>  drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c | 6 ++
>  drivers/gpu/drm/bridge/ti-tfp410.c  | 1 +
>  2 files changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c 
> b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
> index 2cd809eed827..9c17e4bb517e 100644
> --- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
> +++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
> @@ -2121,6 +2121,12 @@ static int cdns_mhdp_atomic_check(struct drm_bridge 
> *bridge,
>   return -EINVAL;
>   }
>  
> + /*
> +  * There might be flags negotiation supported in future
> +  * Set the bus flags in atomic_check statically for now
> +  */
> + bridge_state->input_bus_cfg.flags = bridge->timings->input_bus_flags;

I'd go even further and replace the timings field in
cdns_mhdp_platform_info by an input_bus_flags field, you'll then
have the following assignment here.

if (mhdp->info)
bridge_state->input_bus_cfg.flags = mhdp->info->input_bus_flags;

This way you no rely on the bridge->timings presence and can
get rid of the mhdp->bridge.timings assignment in the probe path.


> +
>   mutex_unlock(&mhdp->link_mutex);
>   return 0;
>  }

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Re: [PATCH v4 5/7] drm/tidss: Set bus_format correctly from bridge/connector

[Boris Brezillon]

On Tue, 1 Dec 2020 17:48:28 +0530
Nikhil Devshatwar  wrote:

> Remove the old code to iterate over the bridge chain, as this is
> already done by the framework.
> The bridge state should have the negotiated bus format and flags.
> Use these from the bridge's state.
> If the bridge does not support format negotiation, error out
> and fail.

That'd be even better if you implement the bridge interface instead of
the encoder one so we can get rid of the encoder_{helper}_funcs and use
drm_simple_encoder_init().

> 
> Signed-off-by: Nikhil Devshatwar 
> Reviewed-by: Tomi Valkeinen 
> ---
> 
> Notes:
> changes from v3:
> * cosmetic updates
> changes from v2:
> * Remove the old code and use the flags from the bridge state
> 
>  drivers/gpu/drm/tidss/tidss_encoder.c | 36 +++
>  1 file changed, 14 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/gpu/drm/tidss/tidss_encoder.c 
> b/drivers/gpu/drm/tidss/tidss_encoder.c
> index e278a9c89476..5deb8102e4d3 100644
> --- a/drivers/gpu/drm/tidss/tidss_encoder.c
> +++ b/drivers/gpu/drm/tidss/tidss_encoder.c
> @@ -21,37 +21,29 @@ static int tidss_encoder_atomic_check(struct drm_encoder 
> *encoder,
>  {
>   struct drm_device *ddev = encoder->dev;
>   struct tidss_crtc_state *tcrtc_state = to_tidss_crtc_state(crtc_state);
> - struct drm_display_info *di = &conn_state->connector->display_info;
> + struct drm_bridge_state *bstate;
>   struct drm_bridge *bridge;
> - bool bus_flags_set = false;
>  
>   dev_dbg(ddev->dev, "%s\n", __func__);
>  
> - /*
> -  * Take the bus_flags from the first bridge that defines
> -  * bridge timings, or from the connector's display_info if no
> -  * bridge defines the timings.
> -  */
> - drm_for_each_bridge_in_chain(encoder, bridge) {
> - if (!bridge->timings)
> - continue;
> -
> - tcrtc_state->bus_flags = bridge->timings->input_bus_flags;
> - bus_flags_set = true;
> - break;
> + /* Copy the bus_format and flags from the first bridge's state */
> + bridge = drm_bridge_chain_get_first_bridge(encoder);
> + bstate = drm_atomic_get_new_bridge_state(crtc_state->state, bridge);
> + if (!bstate) {
> + dev_err(ddev->dev, "Could not get the bridge state\n");
> + return -EINVAL;
>   }
>  
> - if (!di->bus_formats || di->num_bus_formats == 0)  {
> - dev_err(ddev->dev, "%s: No bus_formats in connected display\n",
> - __func__);
> + tcrtc_state->bus_format = bstate->input_bus_cfg.format;
> + tcrtc_state->bus_flags = bstate->input_bus_cfg.flags;
> +
> + if (tcrtc_state->bus_format == 0 ||
> + tcrtc_state->bus_format == MEDIA_BUS_FMT_FIXED) {
> +
> + dev_err(ddev->dev, "Bridge connected to the encoder did not 
> specify media bus format\n");
>   return -EINVAL;
>   }
>  
> - // XXX any cleaner way to set bus format and flags?
> - tcrtc_state->bus_format = di->bus_formats[0];
> - if (!bus_flags_set)
> - tcrtc_state->bus_flags = di->bus_flags;
> -
>   return 0;
>  }
>  

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Re: [PATCH v4 5/7] drm/tidss: Set bus_format correctly from bridge/connector

[Boris Brezillon]

On Fri, 4 Dec 2020 12:56:27 +0200
Tomi Valkeinen  wrote:

> Hi Boris,
> 
> On 04/12/2020 12:50, Boris Brezillon wrote:
> > On Tue, 1 Dec 2020 17:48:28 +0530
> > Nikhil Devshatwar  wrote:
> >   
> >> Remove the old code to iterate over the bridge chain, as this is
> >> already done by the framework.
> >> The bridge state should have the negotiated bus format and flags.
> >> Use these from the bridge's state.
> >> If the bridge does not support format negotiation, error out
> >> and fail.  
> > 
> > That'd be even better if you implement the bridge interface instead of
> > the encoder one so we can get rid of the encoder_{helper}_funcs and use
> > drm_simple_encoder_init().  
> 
> I'm a bit confused here. What should be the design here...
> 
> These formats need to be handled by the crtc (well, the display controller, 
> which is modeled as the
> crtc). Should we have a tidss_crtc.c file, which implements a crtc, a simple 
> encoder and a bridge?
> And just consider those three DRM components as different API parts of the 
> display controller?

The idea is to hide the encoder abstraction from drivers as much as we
can. We have to keep the encoder concept because that's what we expose
to userspace, but drivers shouldn't have to worry about the distinction
between the first bridge in the chain (what we currently call encoders)
and other bridges. The bridge interface provides pretty much the same
functionality, so all you need to do is turn your encoder driver into a
bridge driver (see what we did for
drivers/gpu/drm/imx/parallel-display.c), the only particularity here is
that the bridge knows it's the first in the chain, and has access to
the CRTC it's directly connected to.

IMHO, the less interfaces we keep the clearer it gets for our users.
Getting rid of the encoder_{helper_}funcs in favor or bridge_ops would
clarify the fact that any kind of encoder, no matter if it's the first
in the chain or not, should be represented as a bridge object.
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Re: [PATCH] drm/vkms: Add setup and testing information

[Melissa Wen]

Hi Sumera,

Thanks for the doc improvements.
Please see some complimentary comments below.

On 12/03, Daniel Vetter wrote:
> On Thu, Dec 3, 2020 at 8:13 PM Sumera Priyadarsini
>  wrote:
> >
> > Update the vkms documentation to contain steps to:
> >
> >  - setup the vkms driver
> >  - run tests using igt
> >
> > Signed-off-by: Sumera Priyadarsini 
> > ---
> >  Documentation/gpu/vkms.rst | 47 ++
> >  1 file changed, 47 insertions(+)
> >
> > diff --git a/Documentation/gpu/vkms.rst b/Documentation/gpu/vkms.rst
> > index 13bab1d93bb3..d6782174d23f 100644
> > --- a/Documentation/gpu/vkms.rst
> > +++ b/Documentation/gpu/vkms.rst
> > @@ -7,6 +7,53 @@
> >  .. kernel-doc:: drivers/gpu/drm/vkms/vkms_drv.c
> > :doc: vkms (Virtual Kernel Modesetting)
> >
> > +SETUP
> 
> Absolute bikeshed, but we generally stick to titlecase for titles, so
> just "Setup" and "Testing with IGT".
> > +=
> > +
> > +The VKMS driver can be setup with the following steps:
> > +
> > +To check if VKMS is loaded, run::
> > +
> > +  lsmod | grep vkms
> > +
> > +This should list the VKMS driver. If no output is obtained, then
> > +you need to enable and/or load the VKMS driver.
> > +Ensure that the VKMS driver has been set as a loadable module in your
> > +kernel config file. The following line should be present in the .config
> > +file in your kernel root::
> > +
> > +  CONFIG_DRM_VKMS=m
> > +

Considering the target audience, I would make it clearer to explore the
configuration options using "make *config". As in
https://kernelnewbies.org/FirstKernelPatch#Recompiling_the_driver

> > +Compile and build the kernel for the changes to get reflected.
> > +If your existing config already has VKMS available as a loadable module,
> > +then there is no need to build the kernel again.
> > +Now, to load the driver, use::
> > +
> > +  sudo modprobe vkms
> > +
> > +On running the lsmod command now, the VKMS driver will appear listed.
> > +You can also observe the driver being loaded in the dmesg logs.
> > +
> > +To disable the driver, use ::
s/disable/unload/
> > +
> > +  sudo modprobe -r vkms
> > +
> > +TESTING WITH IGT
> > +
> > +
> > +The IGT GPU Tools is a test suite used specifically for debugging and
> > +development of the DRM drivers.
> > +The IGT Tools can be installed from
> > +`here `_ .
> > +Once you have installed IGT, you can run tests using::
> > +
> > +  ./scripts/run-tests.sh -t 
> > +
> > +For example, to test the functionality of the igt_draw library,
> > +we can run the kms_draw_crc test::
> > +
> > +  ./scripts/run-tests.sh -t kms_draw_crc
> 
> If we run igt tests directly, there's an option to select the right
> device. This is important if you have more than one gpu driver
> (usually the case if you run this directly, but even on virtual
> machines there should usually be a drm driver around).  E.g. when I
> run a test directly:
> 
> # tests/kms_flip --device drm:/dev/dri/card0
> 
> I'm not sure whether there's an option that's always going to select
> the vkms device. I'm also not sure you can pass these options to
> run-tests.sh, I kinda don't use that one myself ...

I also run a test directly. Some cases have many subtests, therefore I
can pass --run-subtest to specify one.

And, to select vkms, I use IGT_FORCE_DRIVER. For example:

# IGT_FORCE_DRIVER=vkms tests/kms_flip --run-subtest basic-plain-flip

> 
> Aside from that looks all good to me.
+1

Melissa
> -Daniel
> 
> > +
> >  TODO
> >  
> >
> > --
> > 2.25.1
> >
> 
> 
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
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[Bug 209123] Bogus possible_crtcs: [ENCODER:58:TMDS-58] possible_crtcs=0xf (full crtc mask=0x7)

[bugzilla-daemon]

https://bugzilla.kernel.org/show_bug.cgi?id=209123

Stuart Foster (smf-li...@virginmedia.com) changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |CODE_FIX

--- Comment #2 from Stuart Foster (smf-li...@virginmedia.com) ---
That seems to fix the problem, tested it on kernels 5.8.7 and 5.9.10.

thank you Alex.

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Re: [PATCH v4 5/7] drm/tidss: Set bus_format correctly from bridge/connector

[Boris Brezillon]

On Fri, 4 Dec 2020 13:47:05 +0200
Tomi Valkeinen  wrote:

> On 04/12/2020 13:12, Boris Brezillon wrote:
> 
> >>> That'd be even better if you implement the bridge interface instead of
> >>> the encoder one so we can get rid of the encoder_{helper}_funcs and use
> >>> drm_simple_encoder_init().
> >>
> >> I'm a bit confused here. What should be the design here...
> >>
> >> These formats need to be handled by the crtc (well, the display 
> >> controller, which is modeled as the
> >> crtc). Should we have a tidss_crtc.c file, which implements a crtc, a 
> >> simple encoder and a bridge?
> >> And just consider those three DRM components as different API parts of the 
> >> display controller?  
> > 
> > The idea is to hide the encoder abstraction from drivers as much as we
> > can. We have to keep the encoder concept because that's what we expose
> > to userspace, but drivers shouldn't have to worry about the distinction
> > between the first bridge in the chain (what we currently call encoders)
> > and other bridges. The bridge interface provides pretty much the same
> > functionality, so all you need to do is turn your encoder driver into a
> > bridge driver (see what we did for
> > drivers/gpu/drm/imx/parallel-display.c), the only particularity here is
> > that the bridge knows it's the first in the chain, and has access to
> > the CRTC it's directly connected to.  
> 
> With a quick look, the imx parallel-display.c seems to be really part of the 
> crtc. Shouldn't we then
> take one more step forward, and just combine the crtc, encoder and bridge 
> (somehow)? That's kind of
> what parallel-display.c is doing, isn't it? It's directly poking the crtc 
> state, but the code just
> happens to be in a separate file from the crtc.

Right. If we want to keep the code split, the logic should probably be
reversed, with the CRTC driver checking the first bridge state to setup
its internal state. Those DPI encoders are always a bit special, since
they tend to be directly embedded in the block responsible for timing
control (what we call CRTCs), so you're right, maybe we should model
that as a CRTC+bridge pair.

> 
> Thinking about the TI HW, we have a bunch of internal IPs which are clearly 
> bridges: HDMI, DSI,
> which get the pixel data from the display controller, and they have their own 
> registers, so clearly
> independent bridges.
> 
> Then we have MIPI DPI, which doesn't really have its own registers, as it's 
> just plain parallel RGB,
> the same as what is sent to e.g. HDMI and DSI bridges.

I still consider that one a bridge, even if the translation is almost
transparent from a HW PoV.

> However, there might be some muxes or
> regulators to set up to get the external signals working. So a bridge would 
> be ok here too to handle
> that external side.

Exactly.

> 
> But in all the above cases, we have the display controller (crtc), which in 
> all the cases needs to
> do e.g. pixel/bus format configuration. So why add direct crtc poking into 
> the first bridges (HDMI,
> DSI, DPI), when we could just model the crtc as a bridge, and thus the first 
> bridges wouldn't need
> to touch the crtc.

Yes, that's an option. I mean, you can already modify your CRTC
logic to implement the bridge and CRTC interface and have your
driver-specific CRTC object embed both a drm_crtc and a drm_bridge.

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Re: [PATCH] drm: Allow drm_fourcc.h without including drm.h

[kernel test robot]

Hi James,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-exynos/exynos-drm-next 
tegra-drm/drm/tegra/for-next drm-tip/drm-tip linus/master drm/drm-next 
v5.10-rc6 next-20201204]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/James-Park/drm-Allow-drm_fourcc-h-without-including-drm-h/20201204-163753
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-c002-20201204 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
# 
https://github.com/0day-ci/linux/commit/444ac999e27a36307f741eb0ef60d630b0b8946a
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
James-Park/drm-Allow-drm_fourcc-h-without-including-drm-h/20201204-163753
git checkout 444ac999e27a36307f741eb0ef60d630b0b8946a
# save the attached .config to linux build tree
make W=1 ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

>> usr/include/drm/drm_fourcc.h:29: found __[us]{8,16,32,64} type without 
>> #include 

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.config.gz
Description: application/gzip
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