How to manage OMAP display drivers in the future

[Tomi Valkeinen]

Hi Dave,

I'm writing this mail to get some ideas how we should manage OMAP's
display drivers in the future.

As a short intro, we have the following players around:

omapdss - omapdss handles the DSS (display subsystem) hardware. omapdss
doesn't do any buffer management or expose any userspace API (except a
few sysfs files), so it doesn't do anything by itself.
(drivers/video/omap2/dss/)

panel drivers - Drivers for various panel models. The panel drivers use
omapdss API to manage the video bus. (drivers/video/omap2/displays/)

omapfb - Framebuffer driver, uses omapdss to handle the HW.
(drivers/video/omap2/omapfb/)

omap_vout - V4L2 driver for showing video, uses omapdss to handle the
HW. (drivers/media/platform/omap/)

omapdrm - DRM driver, uses omapdss to handle the HW.
(drivers/gpu/drm/omapdrm/)

omapdss and the panel drivers form the lowest level layer. omapfb and
omap_vout can be used at the same time, but omapdrm must be used alone,
without omapfb or omap_vout.

omapfb and omap_vout are not much developed anymore, even though they
are still commonly used. Most of the development happens in omapdss,
panel drivers and omapdrm.

So that's what we have now. In the distant future I see omapfb and
omap_vout disappear totally, the panel drivers would be made generic
using Common Display Framework, and omapdss and omapdrm would more or
less be merged together. However, all that is still far away, and we
need some plan to go forward for now.

Most pressing question is how to get OMAP display patches merged. It
seems that there's not really an fbdev maintainer for the time being,
and fbdev tree has been the route for omapdss, panels and omapfb in the
past. Now that omapdrm is the new main driver for omap display, fbdev
would be somewhat wrong in any case.

Dave, how would you feel about merging changes to all the above
components through DRM tree? Merging all the above together would be the
easiest way, as the changes may have dependencies to each other.

As I said, most of the development should be in omapdss, panels and
omapdrm. There would be an occasional fix for omapfb and omap_vout, or
small changes when omapdss changes require changes elsewhere.

 Tomi
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH 0/7] Consider G2D hardware restrictions.

[Inki Dae]

This patch set checks the contents of g2d command list from user
is valid or not according to G2D hardware restrictions. For now,
G2D driver wasn't considered for them properly.

For this, this patch set includes relevant code cleaups, fixups
and adds a new function to get buffer size to the gem to be
accessed by G2D dma.

Inki Dae (1):
  drm/exynos: Add a new function to get gem buffer size

YoungJun Cho (6):
  drm/exynos: Fix error routine to getting dma addr.
  drm/exynos: clear node object type at gem unmap
  drm/exynos: Fix G2D core mulfunctioning issue
  drm/exynos: Clean up some G2D codes for readability
  drm/exynos: Deal with g2d buffer info more efficiently
  drm/exynos: Check g2d cmd list for g2d restrictions

 drivers/gpu/drm/exynos/exynos_drm_g2d.c |  381 ++-
 drivers/gpu/drm/exynos/exynos_drm_gem.c |   21 ++
 drivers/gpu/drm/exynos/exynos_drm_gem.h |5 +
 3 files changed, 349 insertions(+), 58 deletions(-)

-- 
1.7.4.1

___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH 1/7] drm/exynos: Fix error routine to getting dma addr.

[Inki Dae]

From: YoungJun Cho 

This patch fixes error routine when g2d_userptr_get_dma_add is failed.
When sg_alloc_table_from_pages() is failed, it doesn't call
sg_free_table() anymore.

Signed-off-by: YoungJun Cho 
Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_g2d.c |6 --
 1 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index 3b0da03..28b7112 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -450,7 +450,7 @@ static dma_addr_t *g2d_userptr_get_dma_addr(struct 
drm_device *drm_dev,
DMA_BIDIRECTIONAL);
if (ret < 0) {
DRM_ERROR("failed to map sgt with dma region.\n");
-   goto err_free_sgt;
+   goto err_sg_free_table;
}
 
g2d_userptr->dma_addr = sgt->sgl[0].dma_address;
@@ -467,8 +467,10 @@ static dma_addr_t *g2d_userptr_get_dma_addr(struct 
drm_device *drm_dev,
 
return &g2d_userptr->dma_addr;
 
-err_free_sgt:
+err_sg_free_table:
sg_free_table(sgt);
+
+err_free_sgt:
kfree(sgt);
sgt = NULL;
 
-- 
1.7.4.1

___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH 2/7] drm/exynos: clear node object type at gem unmap

[Inki Dae]

From: YoungJun Cho 

This patch clears node object type in G2D unmap cmdlist.
The obj_type of cmdlist node has to be cleared in
g2d_unmap_cmdlist_gem() so that the node can be reused
in g2d_map_cmdlist_gem().

Signed-off-by: YoungJun Cho 
Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_g2d.c |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index 28b7112..095520f 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -576,6 +576,7 @@ static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
false);
 
node->handles[i] = 0;
+   node->obj_type[i] = 0;
}
 
node->map_nr = 0;
-- 
1.7.4.1

___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue

[Inki Dae]

From: YoungJun Cho 

This patch fixes G2D core mulfunctioning issue once g2d dma is started.
Without 'DMA_HOLD_CMD_REG' register setting, there is only one interrupt
after the execution to all command lists have been completed. And that
induces watchdog. So this patch sets 'LIST_HOLD' command to the register
so that command execution interrupt can be occured whenever each command
list execution is finished.

Signed-off-by: YoungJun Cho 
Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_g2d.c |   13 -
 1 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index 095520f..91bc4cc 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -82,7 +82,7 @@
 #define G2D_DMA_LIST_DONE_COUNT_OFFSET 17
 
 /* G2D_DMA_HOLD_CMD */
-#define G2D_USET_HOLD  (1 << 2)
+#define G2D_USER_HOLD  (1 << 2)
 #define G2D_LIST_HOLD  (1 << 1)
 #define G2D_BITBLT_HOLD(1 << 0)
 
@@ -863,10 +863,13 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device 
*drm_dev, void *data,
cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
cmdlist->data[cmdlist->last++] = 0;
 
-   if (node->event) {
-   cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
-   cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
-   }
+   /*
+* 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
+* if user wants G2D interrupt event once each command list or
+* BitBLT command execution is finished.
+*/
+   cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
+   cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
 
/* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;
-- 
1.7.4.1

___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH 4/7] drm/exynos: Clean up some G2D codes for readability

[Inki Dae]

From: YoungJun Cho 

This patch just cleans up G2D codes for readability.

For this, it changes the member of g2d_cmdlist_node, obj_type into
buf_type and gathers relevant variables together.

Signed-off-by: YoungJun Cho 
Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_g2d.c |   33 +-
 1 files changed, 14 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index 91bc4cc..ce8e670 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -131,13 +131,12 @@ struct g2d_cmdlist_userptr {
boolin_pool;
boolout_of_list;
 };
-
 struct g2d_cmdlist_node {
struct list_headlist;
struct g2d_cmdlist  *cmdlist;
unsigned intmap_nr;
unsigned long   handles[MAX_BUF_ADDR_NR];
-   unsigned intobj_type[MAX_BUF_ADDR_NR];
+   unsigned intbuf_type[MAX_BUF_ADDR_NR];
dma_addr_t  dma_addr;
 
struct drm_exynos_pending_g2d_event *event;
@@ -186,8 +185,7 @@ static int g2d_init_cmdlist(struct g2d_data *g2d)
struct device *dev = g2d->dev;
struct g2d_cmdlist_node *node = g2d->cmdlist_node;
struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
-   int nr;
-   int ret;
+   int nr, ret;
 
init_dma_attrs(&g2d->cmdlist_dma_attrs);
dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
@@ -514,17 +512,17 @@ static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
struct drm_file *file)
 {
struct g2d_cmdlist *cmdlist = node->cmdlist;
-   int offset;
int i;
 
for (i = 0; i < node->map_nr; i++) {
+   int offset;
unsigned long handle;
dma_addr_t *addr;
 
offset = cmdlist->last - (i * 2 + 1);
handle = cmdlist->data[offset];
 
-   if (node->obj_type[i] == BUF_TYPE_GEM) {
+   if (node->buf_type[i] == BUF_TYPE_GEM) {
addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
file);
if (IS_ERR(addr)) {
@@ -568,7 +566,7 @@ static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
for (i = 0; i < node->map_nr; i++) {
unsigned long handle = node->handles[i];
 
-   if (node->obj_type[i] == BUF_TYPE_GEM)
+   if (node->buf_type[i] == BUF_TYPE_GEM)
exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle,
filp);
else
@@ -576,7 +574,7 @@ static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
false);
 
node->handles[i] = 0;
-   node->obj_type[i] = 0;
+   node->buf_type[i] = 0;
}
 
node->map_nr = 0;
@@ -646,7 +644,6 @@ static void g2d_runqueue_worker(struct work_struct *work)
struct g2d_data *g2d = container_of(work, struct g2d_data,
runqueue_work);
 
-
mutex_lock(&g2d->runqueue_mutex);
clk_disable(g2d->gate_clk);
pm_runtime_put_sync(g2d->dev);
@@ -722,11 +719,11 @@ static int g2d_check_reg_offset(struct device *dev,
int nr, bool for_addr)
 {
struct g2d_cmdlist *cmdlist = node->cmdlist;
-   int reg_offset;
-   int index;
-   int i;
+   int index, i;
 
for (i = 0; i < nr; i++) {
+   int reg_offset;
+
index = cmdlist->last - 2 * (i + 1);
 
if (for_addr) {
@@ -734,7 +731,7 @@ static int g2d_check_reg_offset(struct device *dev,
reg_offset = (cmdlist->data[index] &
~0x7fff) >> 31;
if (reg_offset) {
-   node->obj_type[i] = BUF_TYPE_USERPTR;
+   node->buf_type[i] = BUF_TYPE_USERPTR;
cmdlist->data[index] &= ~G2D_BUF_USERPTR;
}
}
@@ -756,8 +753,8 @@ static int g2d_check_reg_offset(struct device *dev,
if (!for_addr)
goto err;
 
-   if (node->obj_type[i] != BUF_TYPE_USERPTR)
-   node->obj_type[i] = BUF_TYPE_GEM;
+   if (node->buf_type[i] != BUF_TYPE_USERPTR)
+   node->buf_type[i] = BUF_TYPE_GEM;
break;
default:
if (for_addr)
@@ -799,8 +796,7 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device 
*drm_dev, void *data,
struct g2d_cmdli

[PATCH 6/7] drm/exynos: Add a new function to get gem buffer size

[Inki Dae]

This patch adds a new function to get gem buffer size. And this
funtion could be used for g2d driver or others can get gem buffer
size to check if the buffer is valid or not.

Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_gem.c |   21 +
 drivers/gpu/drm/exynos/exynos_drm_gem.h |5 +
 2 files changed, 26 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.c 
b/drivers/gpu/drm/exynos/exynos_drm_gem.c
index 67e17ce..0e6fe00 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.c
@@ -164,6 +164,27 @@ out:
exynos_gem_obj = NULL;
 }
 
+unsigned long exynos_drm_gem_get_size(struct drm_device *dev,
+   unsigned int gem_handle,
+   struct drm_file *file_priv)
+{
+   struct exynos_drm_gem_obj *exynos_gem_obj;
+   struct drm_gem_object *obj;
+
+   obj = drm_gem_object_lookup(dev, file_priv, gem_handle);
+   if (!obj) {
+   DRM_ERROR("failed to lookup gem object.\n");
+   return 0;
+   }
+
+   exynos_gem_obj = to_exynos_gem_obj(obj);
+
+   drm_gem_object_unreference_unlocked(obj);
+
+   return exynos_gem_obj->buffer->size;
+}
+
+
 struct exynos_drm_gem_obj *exynos_drm_gem_init(struct drm_device *dev,
  unsigned long size)
 {
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.h 
b/drivers/gpu/drm/exynos/exynos_drm_gem.h
index 35ebac4..468766b 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.h
@@ -130,6 +130,11 @@ int exynos_drm_gem_userptr_ioctl(struct drm_device *dev, 
void *data,
 int exynos_drm_gem_get_ioctl(struct drm_device *dev, void *data,
  struct drm_file *file_priv);
 
+/* get buffer size to gem handle. */
+unsigned long exynos_drm_gem_get_size(struct drm_device *dev,
+   unsigned int gem_handle,
+   struct drm_file *file_priv);
+
 /* initialize gem object. */
 int exynos_drm_gem_init_object(struct drm_gem_object *obj);
 
-- 
1.7.4.1

___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH 5/7] drm/exynos: Deal with g2d buffer info more efficiently

[Inki Dae]

From: YoungJun Cho 

This patch adds g2d_buf_info structure and buffer relevant
variables moves into the g2d_buf_info to manage g2d buffer
information more efficiently.

Signed-off-by: YoungJun Cho 
Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_g2d.c |  169 +++
 1 files changed, 125 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index ce8e670..b7be3d4 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -96,8 +96,6 @@
 #define G2D_CMDLIST_POOL_SIZE  (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
 #define G2D_CMDLIST_DATA_NUM   (G2D_CMDLIST_SIZE / sizeof(u32) - 2)
 
-#define MAX_BUF_ADDR_NR6
-
 /* maximum buffer pool size of userptr is 64MB as default */
 #define MAX_POOL   (64 * 1024 * 1024)
 
@@ -106,6 +104,17 @@ enum {
BUF_TYPE_USERPTR,
 };
 
+enum g2d_reg_type {
+   REG_TYPE_NONE = -1,
+   REG_TYPE_SRC,
+   REG_TYPE_SRC_PLANE2,
+   REG_TYPE_DST,
+   REG_TYPE_DST_PLANE2,
+   REG_TYPE_PAT,
+   REG_TYPE_MSK,
+   MAX_REG_TYPE_NR
+};
+
 /* cmdlist data structure */
 struct g2d_cmdlist {
u32 head;
@@ -113,6 +122,22 @@ struct g2d_cmdlist {
u32 last;   /* last data offset */
 };
 
+/*
+ * A structure of buffer information
+ *
+ * @map_nr: manages the number of mapped buffers
+ * @reg_types: stores regitster type in the order of requested command
+ * @handles: stores buffer handle in its reg_type position
+ * @types: stores buffer type in its reg_type position
+ *
+ */
+struct g2d_buf_info {
+   unsigned intmap_nr;
+   enum g2d_reg_type   reg_types[MAX_REG_TYPE_NR];
+   unsigned long   handles[MAX_REG_TYPE_NR];
+   unsigned inttypes[MAX_REG_TYPE_NR];
+};
+
 struct drm_exynos_pending_g2d_event {
struct drm_pending_eventbase;
struct drm_exynos_g2d_event event;
@@ -134,10 +159,8 @@ struct g2d_cmdlist_userptr {
 struct g2d_cmdlist_node {
struct list_headlist;
struct g2d_cmdlist  *cmdlist;
-   unsigned intmap_nr;
-   unsigned long   handles[MAX_BUF_ADDR_NR];
-   unsigned intbuf_type[MAX_BUF_ADDR_NR];
dma_addr_t  dma_addr;
+   struct g2d_buf_info buf_info;
 
struct drm_exynos_pending_g2d_event *event;
 };
@@ -185,7 +208,8 @@ static int g2d_init_cmdlist(struct g2d_data *g2d)
struct device *dev = g2d->dev;
struct g2d_cmdlist_node *node = g2d->cmdlist_node;
struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
-   int nr, ret;
+   struct g2d_buf_info *buf_info;
+   int nr, ret, i;
 
init_dma_attrs(&g2d->cmdlist_dma_attrs);
dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
@@ -212,6 +236,10 @@ static int g2d_init_cmdlist(struct g2d_data *g2d)
node[nr].dma_addr =
g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE;
 
+   buf_info = &node[nr].buf_info;
+   for (i = 0; i < MAX_REG_TYPE_NR; i++)
+   buf_info->reg_types[i] = REG_TYPE_NONE;
+
list_add_tail(&node[nr].list, &g2d->free_cmdlist);
}
 
@@ -506,36 +534,78 @@ static void g2d_userptr_free_all(struct drm_device 
*drm_dev,
g2d->current_pool = 0;
 }
 
+static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
+{
+   enum g2d_reg_type reg_type;
+
+   switch (reg_offset) {
+   case G2D_SRC_BASE_ADDR:
+   reg_type = REG_TYPE_SRC;
+   break;
+   case G2D_SRC_PLANE2_BASE_ADDR:
+   reg_type = REG_TYPE_SRC_PLANE2;
+   break;
+   case G2D_DST_BASE_ADDR:
+   reg_type = REG_TYPE_DST;
+   break;
+   case G2D_DST_PLANE2_BASE_ADDR:
+   reg_type = REG_TYPE_DST_PLANE2;
+   break;
+   case G2D_PAT_BASE_ADDR:
+   reg_type = REG_TYPE_PAT;
+   break;
+   case G2D_MSK_BASE_ADDR:
+   reg_type = REG_TYPE_MSK;
+   break;
+   default:
+   reg_type = REG_TYPE_NONE;
+   DRM_ERROR("Unknown register offset![%d]\n", reg_offset);
+   break;
+   };
+
+   return reg_type;
+}
+
 static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
struct g2d_cmdlist_node *node,
struct drm_device *drm_dev,
struct drm_file *file)
 {
struct g2d_cmdlist *cmdlist = node->cmdlist;
-   int i;
+   struct g2d_buf_info *buf_info = &node->buf_info;
+   int ret, i;
 
-   for (i = 0; i < node->map_nr; i++) {
-   int offset;
+   for (i = 0; i < buf_info->map_nr; i++) {
+   enum g2d_reg_type reg_typ

[PATCH 7/7] drm/exynos: Check g2d cmd list for g2d restrictions

[Inki Dae]

From: YoungJun Cho 

This patch checks command list from user for g2d restrictions.

For now, g2d driver wasn't considered for G2D hardware restrictions
properly. The below is the restrictions to G2D hardware and this patch
considers them.
- width or height value in the command list
has to be in valid range (1 to 8000 pixels)
- The requested area should be less than buffer size.
- right has to be bigger than left.
- bottom has to be bigger than top.

Signed-off-by: YoungJun Cho 
Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_g2d.c |  183 +++
 1 files changed, 183 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index b7be3d4..dbebbb8 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -48,8 +48,14 @@
 
 /* registers for base address */
 #define G2D_SRC_BASE_ADDR  0x0304
+#define G2D_SRC_COLOR_MODE 0x030C
+#define G2D_SRC_LEFT_TOP   0x0310
+#define G2D_SRC_RIGHT_BOTTOM   0x0314
 #define G2D_SRC_PLANE2_BASE_ADDR   0x0318
 #define G2D_DST_BASE_ADDR  0x0404
+#define G2D_DST_COLOR_MODE 0x040C
+#define G2D_DST_LEFT_TOP   0x0410
+#define G2D_DST_RIGHT_BOTTOM   0x0414
 #define G2D_DST_PLANE2_BASE_ADDR   0x0418
 #define G2D_PAT_BASE_ADDR  0x0500
 #define G2D_MSK_BASE_ADDR  0x0520
@@ -91,6 +97,22 @@
 #define G2D_START_NHOLT(1 << 1)
 #define G2D_START_BITBLT   (1 << 0)
 
+/* buffer color format */
+#define G2D_FMT_XRGB   0
+#define G2D_FMT_ARGB   1
+#define G2D_FMT_RGB565 2
+#define G2D_FMT_XRGB1555   3
+#define G2D_FMT_ARGB1555   4
+#define G2D_FMT_XRGB   5
+#define G2D_FMT_ARGB   6
+#define G2D_FMT_PACKED_RGB888  7
+#define G2D_FMT_A8 11
+#define G2D_FMT_L8 12
+
+/* buffer valid length */
+#define G2D_LEN_MIN1
+#define G2D_LEN_MAX8000
+
 #define G2D_CMDLIST_SIZE   (PAGE_SIZE / 4)
 #define G2D_CMDLIST_NUM64
 #define G2D_CMDLIST_POOL_SIZE  (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
@@ -123,12 +145,31 @@ struct g2d_cmdlist {
 };
 
 /*
+ * A structure of buffer description
+ *
+ * @format: color format
+ * @left_x: the x coordinates of left top corner
+ * @top_y: the y coordinates of left top corner
+ * @right_x: the x coordinates of right bottom corner
+ * @bottom_y: the y coordinates of right bottom corner
+ *
+ */
+struct g2d_buf_desc {
+   unsigned intformat;
+   unsigned intleft_x;
+   unsigned inttop_y;
+   unsigned intright_x;
+   unsigned intbottom_y;
+};
+
+/*
  * A structure of buffer information
  *
  * @map_nr: manages the number of mapped buffers
  * @reg_types: stores regitster type in the order of requested command
  * @handles: stores buffer handle in its reg_type position
  * @types: stores buffer type in its reg_type position
+ * @descs: stores buffer description in its reg_type position
  *
  */
 struct g2d_buf_info {
@@ -136,6 +177,7 @@ struct g2d_buf_info {
enum g2d_reg_type   reg_types[MAX_REG_TYPE_NR];
unsigned long   handles[MAX_REG_TYPE_NR];
unsigned inttypes[MAX_REG_TYPE_NR];
+   struct g2d_buf_desc descs[MAX_REG_TYPE_NR];
 };
 
 struct drm_exynos_pending_g2d_event {
@@ -540,12 +582,18 @@ static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
 
switch (reg_offset) {
case G2D_SRC_BASE_ADDR:
+   case G2D_SRC_COLOR_MODE:
+   case G2D_SRC_LEFT_TOP:
+   case G2D_SRC_RIGHT_BOTTOM:
reg_type = REG_TYPE_SRC;
break;
case G2D_SRC_PLANE2_BASE_ADDR:
reg_type = REG_TYPE_SRC_PLANE2;
break;
case G2D_DST_BASE_ADDR:
+   case G2D_DST_COLOR_MODE:
+   case G2D_DST_LEFT_TOP:
+   case G2D_DST_RIGHT_BOTTOM:
reg_type = REG_TYPE_DST;
break;
case G2D_DST_PLANE2_BASE_ADDR:
@@ -566,6 +614,69 @@ static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
return reg_type;
 }
 
+static unsigned long g2d_get_buf_bpp(unsigned int format)
+{
+   unsigned long bpp;
+
+   switch (format) {
+   case G2D_FMT_XRGB:
+   case G2D_FMT_ARGB:
+   bpp = 4;
+   break;
+   case G2D_FMT_RGB565:
+   case G2D_FMT_XRGB1555:
+   case G2D_FMT_ARGB1555:
+   case G2D_FMT_XRGB:
+   case G2D_FMT_ARGB:
+   bpp = 2;
+   break;
+   case G2D_FMT_PACKED_RGB888:
+   bpp = 3;
+   break;
+   default:
+   bpp = 1;
+   break;
+   }
+
+   

Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue

[Joonyoung Shim]

On 03/13/2013 06:04 PM, Inki Dae wrote:

From: YoungJun Cho 

This patch fixes G2D core mulfunctioning issue once g2d dma is started.
Without 'DMA_HOLD_CMD_REG' register setting, there is only one interrupt
after the execution to all command lists have been completed. And that
induces watchdog. So this patch sets 'LIST_HOLD' command to the register
so that command execution interrupt can be occured whenever each command
list execution is finished.


No, this problem occurs as GCF bit of INTEN_REG register is enabled
always. If wants to raise interrupt immediately after a command list
finished, GCF bit should be enabled, and it also needs to enable of LIST
Hold bit of DMA_HOLD_CMD_REG register. If one of the two is missed out,
g2d hardware will not work normally sometimes.

This patch is just workaround and it can happen performance issue
because g2d hardware stops a moment whenever a command list finished.

So, we need the way which enable GCF bit only when a command list
completion interrupt needs.

Thanks.


Signed-off-by: YoungJun Cho 
Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
  drivers/gpu/drm/exynos/exynos_drm_g2d.c |   13 -
  1 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index 095520f..91bc4cc 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -82,7 +82,7 @@
  #define G2D_DMA_LIST_DONE_COUNT_OFFSET17
  
  /* G2D_DMA_HOLD_CMD */

-#define G2D_USET_HOLD  (1 << 2)
+#define G2D_USER_HOLD  (1 << 2)
  #define G2D_LIST_HOLD (1 << 1)
  #define G2D_BITBLT_HOLD   (1 << 0)
  
@@ -863,10 +863,13 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,

cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
cmdlist->data[cmdlist->last++] = 0;
  
-	if (node->event) {

-   cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
-   cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
-   }
+   /*
+* 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
+* if user wants G2D interrupt event once each command list or
+* BitBLT command execution is finished.
+*/
+   cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
+   cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
  
  	/* Check size of cmdlist: last 2 is about G2D_BITBLT_START */

size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;


___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH 4/7] drm/exynos: Clean up some G2D codes for readability

[Joonyoung Shim]

On 03/13/2013 06:04 PM, Inki Dae wrote:

From: YoungJun Cho 

This patch just cleans up G2D codes for readability.

For this, it changes the member of g2d_cmdlist_node, obj_type into
buf_type and gathers relevant variables together.


Please make patch only about s/obj_type/buf_type.



Signed-off-by: YoungJun Cho 
Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
  drivers/gpu/drm/exynos/exynos_drm_g2d.c |   33 +-
  1 files changed, 14 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index 91bc4cc..ce8e670 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -131,13 +131,12 @@ struct g2d_cmdlist_userptr {
boolin_pool;
boolout_of_list;
  };
-


Need blank line.


  struct g2d_cmdlist_node {
struct list_headlist;
struct g2d_cmdlist  *cmdlist;
unsigned intmap_nr;
unsigned long   handles[MAX_BUF_ADDR_NR];
-   unsigned intobj_type[MAX_BUF_ADDR_NR];
+   unsigned intbuf_type[MAX_BUF_ADDR_NR];
dma_addr_t  dma_addr;
  
  	struct drm_exynos_pending_g2d_event	*event;

@@ -186,8 +185,7 @@ static int g2d_init_cmdlist(struct g2d_data *g2d)
struct device *dev = g2d->dev;
struct g2d_cmdlist_node *node = g2d->cmdlist_node;
struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
-   int nr;
-   int ret;
+   int nr, ret;


Please keep one variable to one line. The below modifications are ditto.

  
  	init_dma_attrs(&g2d->cmdlist_dma_attrs);

dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
@@ -514,17 +512,17 @@ static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
struct drm_file *file)
  {
struct g2d_cmdlist *cmdlist = node->cmdlist;
-   int offset;
int i;
  
  	for (i = 0; i < node->map_nr; i++) {

+   int offset;
unsigned long handle;
dma_addr_t *addr;
  
  		offset = cmdlist->last - (i * 2 + 1);

handle = cmdlist->data[offset];
  
-		if (node->obj_type[i] == BUF_TYPE_GEM) {

+   if (node->buf_type[i] == BUF_TYPE_GEM) {
addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
file);
if (IS_ERR(addr)) {
@@ -568,7 +566,7 @@ static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
for (i = 0; i < node->map_nr; i++) {
unsigned long handle = node->handles[i];
  
-		if (node->obj_type[i] == BUF_TYPE_GEM)

+   if (node->buf_type[i] == BUF_TYPE_GEM)
exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle,
filp);
else
@@ -576,7 +574,7 @@ static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
false);
  
  		node->handles[i] = 0;

-   node->obj_type[i] = 0;
+   node->buf_type[i] = 0;
}
  
  	node->map_nr = 0;

@@ -646,7 +644,6 @@ static void g2d_runqueue_worker(struct work_struct *work)
struct g2d_data *g2d = container_of(work, struct g2d_data,
runqueue_work);
  
-

mutex_lock(&g2d->runqueue_mutex);
clk_disable(g2d->gate_clk);
pm_runtime_put_sync(g2d->dev);
@@ -722,11 +719,11 @@ static int g2d_check_reg_offset(struct device *dev,
int nr, bool for_addr)
  {
struct g2d_cmdlist *cmdlist = node->cmdlist;
-   int reg_offset;
-   int index;
-   int i;
+   int index, i;
  
  	for (i = 0; i < nr; i++) {

+   int reg_offset;
+
index = cmdlist->last - 2 * (i + 1);
  
  		if (for_addr) {

@@ -734,7 +731,7 @@ static int g2d_check_reg_offset(struct device *dev,
reg_offset = (cmdlist->data[index] &
~0x7fff) >> 31;
if (reg_offset) {
-   node->obj_type[i] = BUF_TYPE_USERPTR;
+   node->buf_type[i] = BUF_TYPE_USERPTR;
cmdlist->data[index] &= ~G2D_BUF_USERPTR;
}
}
@@ -756,8 +753,8 @@ static int g2d_check_reg_offset(struct device *dev,
if (!for_addr)
goto err;
  
-			if (node->obj_type[i] != BUF_TYPE_USERPTR)

-   node->obj_type[i] = BUF_TYPE_GEM;
+   if (node->buf_type[i] != BUF_TYPE_USERPTR)
+   node->buf_type[i] = BUF_TYPE_GEM;
break;
default:
if (for_addr)
@@ -79

RE: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue

[Inki Dae]

> -Original Message-
> From: Joonyoung Shim [mailto:jy0922.s...@samsung.com]
> Sent: Wednesday, March 13, 2013 6:53 PM
> To: Inki Dae
> Cc: airl...@linux.ie; dri-devel@lists.freedesktop.org;
> kyungmin.p...@samsung.com; sw0312@samsung.com; YoungJun Cho
> Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue
> 
> On 03/13/2013 06:04 PM, Inki Dae wrote:
> > From: YoungJun Cho 
> >
> > This patch fixes G2D core mulfunctioning issue once g2d dma is started.
> > Without 'DMA_HOLD_CMD_REG' register setting, there is only one interrupt
> > after the execution to all command lists have been completed. And that
> > induces watchdog. So this patch sets 'LIST_HOLD' command to the register
> > so that command execution interrupt can be occured whenever each command
> > list execution is finished.
> 
> No, this problem occurs as GCF bit of INTEN_REG register is enabled
> always. If wants to raise interrupt immediately after a command list
> finished, GCF bit should be enabled, and it also needs to enable of LIST
> Hold bit of DMA_HOLD_CMD_REG register. If one of the two is missed out,
> g2d hardware will not work normally sometimes.

Right, these two things(LIST HOLD command and GCF interrupt enabling) should
be pair.

> 
> This patch is just workaround and it can happen performance issue
> because g2d hardware stops a moment whenever a command list finished.
> 
> So, we need the way which enable GCF bit only when a command list
> completion interrupt needs.
> 

Agree. How about this? If node->event isn't NULL then set GCF to INTEN
register in g2d_dma_start(). For this way, I already mentioned through
internal email thread.

> Thanks.
> 
> > Signed-off-by: YoungJun Cho 
> > Signed-off-by: Inki Dae 
> > Signed-off-by: Kyungmin Park 
> > ---
> >   drivers/gpu/drm/exynos/exynos_drm_g2d.c |   13 -
> >   1 files changed, 8 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> > index 095520f..91bc4cc 100644
> > --- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> > +++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> > @@ -82,7 +82,7 @@
> >   #define G2D_DMA_LIST_DONE_COUNT_OFFSET17
> >
> >   /* G2D_DMA_HOLD_CMD */
> > -#define G2D_USET_HOLD  (1 << 2)
> > +#define G2D_USER_HOLD  (1 << 2)
> >   #define G2D_LIST_HOLD (1 << 1)
> >   #define G2D_BITBLT_HOLD   (1 << 0)
> >
> > @@ -863,10 +863,13 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device
> *drm_dev, void *data,
> > cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
> > cmdlist->data[cmdlist->last++] = 0;
> >
> > -   if (node->event) {
> > -   cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
> > -   cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
> > -   }
> > +   /*
> > +* 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
> > +* if user wants G2D interrupt event once each command list or
> > +* BitBLT command execution is finished.
> > +*/
> > +   cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
> > +   cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
> >
> > /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
> > size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;

___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue

[Joonyoung Shim]

On 03/13/2013 07:14 PM, Inki Dae wrote:



-Original Message-
From: Joonyoung Shim [mailto:jy0922.s...@samsung.com]
Sent: Wednesday, March 13, 2013 6:53 PM
To: Inki Dae
Cc: airl...@linux.ie; dri-devel@lists.freedesktop.org;
kyungmin.p...@samsung.com; sw0312@samsung.com; YoungJun Cho
Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue

On 03/13/2013 06:04 PM, Inki Dae wrote:

From: YoungJun Cho 

This patch fixes G2D core mulfunctioning issue once g2d dma is started.
Without 'DMA_HOLD_CMD_REG' register setting, there is only one interrupt
after the execution to all command lists have been completed. And that
induces watchdog. So this patch sets 'LIST_HOLD' command to the register
so that command execution interrupt can be occured whenever each command
list execution is finished.

No, this problem occurs as GCF bit of INTEN_REG register is enabled
always. If wants to raise interrupt immediately after a command list
finished, GCF bit should be enabled, and it also needs to enable of LIST
Hold bit of DMA_HOLD_CMD_REG register. If one of the two is missed out,
g2d hardware will not work normally sometimes.

Right, these two things(LIST HOLD command and GCF interrupt enabling) should
be pair.


This patch is just workaround and it can happen performance issue
because g2d hardware stops a moment whenever a command list finished.

So, we need the way which enable GCF bit only when a command list
completion interrupt needs.


Agree. How about this? If node->event isn't NULL then set GCF to INTEN
register in g2d_dma_start(). For this way, I already mentioned through
internal email thread.


No, Once set GCF, it is set on end. Who can clear it?


Thanks.


Signed-off-by: YoungJun Cho 
Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
   drivers/gpu/drm/exynos/exynos_drm_g2d.c |   13 -
   1 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c

b/drivers/gpu/drm/exynos/exynos_drm_g2d.c

index 095520f..91bc4cc 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -82,7 +82,7 @@
   #define G2D_DMA_LIST_DONE_COUNT_OFFSET   17

   /* G2D_DMA_HOLD_CMD */
-#define G2D_USET_HOLD  (1 << 2)
+#define G2D_USER_HOLD  (1 << 2)
   #define G2D_LIST_HOLD(1 << 1)
   #define G2D_BITBLT_HOLD  (1 << 0)

@@ -863,10 +863,13 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device

*drm_dev, void *data,

cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
cmdlist->data[cmdlist->last++] = 0;

-   if (node->event) {
-   cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
-   cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
-   }
+   /*
+* 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
+* if user wants G2D interrupt event once each command list or
+* BitBLT command execution is finished.
+*/
+   cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
+   cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;

/* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;




___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: WARNING: at drivers/gpu/drm/nouveau/core/core/mm.c:242

[Jiri Slaby]

On 02/19/2013 11:32 PM, Marcin Slusarz wrote:
> On Tue, Feb 19, 2013 at 08:07:44AM +0100, Marcin Slusarz wrote:
>> On Tue, Feb 19, 2013 at 12:43:06AM +0100, Jiri Slaby wrote:
>>> On 02/19/2013 12:23 AM, Marcin Slusarz wrote:
 Tomorrow I'll post a patch for page allocation failure.
>>>
>>> What do you mean -- what kind of patch?
>>
>> A patch which will change pgt allocation to use vmalloc.

It's still not in -next. Any plans on this?

> ---
> From: Marcin Slusarz 
> Subject: [PATCH] drm/nouveau: use vmalloc for pgt allocation
> 
> Page tables on nv50 take 48kB, which can be hard to allocate in one piece.
> Let's use vmalloc.
> 
> Signed-off-by: Marcin Slusarz 
> Cc: sta...@vger.kernel.org
> ---
>  drivers/gpu/drm/nouveau/core/subdev/vm/base.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c 
> b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c
> index 77c67fc..e66fb77 100644
> --- a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c
> +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c
> @@ -362,7 +362,7 @@ nouveau_vm_create(struct nouveau_vmmgr *vmm, u64 offset, 
> u64 length,
>   vm->fpde = offset >> (vmm->pgt_bits + 12);
>   vm->lpde = (offset + length - 1) >> (vmm->pgt_bits + 12);
>  
> - vm->pgt  = kcalloc(vm->lpde - vm->fpde + 1, sizeof(*vm->pgt), 
> GFP_KERNEL);
> + vm->pgt  = vzalloc((vm->lpde - vm->fpde + 1) * sizeof(*vm->pgt));
>   if (!vm->pgt) {
>   kfree(vm);
>   return -ENOMEM;
> @@ -371,7 +371,7 @@ nouveau_vm_create(struct nouveau_vmmgr *vmm, u64 offset, 
> u64 length,
>   ret = nouveau_mm_init(&vm->mm, mm_offset >> 12, mm_length >> 12,
> block >> 12);
>   if (ret) {
> - kfree(vm->pgt);
> + vfree(vm->pgt);
>   kfree(vm);
>   return ret;
>   }
> @@ -446,7 +446,7 @@ nouveau_vm_del(struct nouveau_vm *vm)
>   }
>  
>   nouveau_mm_fini(&vm->mm);
> - kfree(vm->pgt);
> + vfree(vm->pgt);
>   kfree(vm);
>  }
>  
> 


-- 
js
suse labs
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

RE: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue

[Inki Dae]

> -Original Message-
> From: Joonyoung Shim [mailto:jy0922.s...@samsung.com]
> Sent: Wednesday, March 13, 2013 7:28 PM
> To: Inki Dae
> Cc: airl...@linux.ie; dri-devel@lists.freedesktop.org;
> kyungmin.p...@samsung.com; sw0312@samsung.com; 'YoungJun Cho'
> Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue
> 
> On 03/13/2013 07:14 PM, Inki Dae wrote:
> >
> >> -Original Message-
> >> From: Joonyoung Shim [mailto:jy0922.s...@samsung.com]
> >> Sent: Wednesday, March 13, 2013 6:53 PM
> >> To: Inki Dae
> >> Cc: airl...@linux.ie; dri-devel@lists.freedesktop.org;
> >> kyungmin.p...@samsung.com; sw0312@samsung.com; YoungJun Cho
> >> Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue
> >>
> >> On 03/13/2013 06:04 PM, Inki Dae wrote:
> >>> From: YoungJun Cho 
> >>>
> >>> This patch fixes G2D core mulfunctioning issue once g2d dma is
started.
> >>> Without 'DMA_HOLD_CMD_REG' register setting, there is only one
> interrupt
> >>> after the execution to all command lists have been completed. And that
> >>> induces watchdog. So this patch sets 'LIST_HOLD' command to the
> register
> >>> so that command execution interrupt can be occured whenever each
> command
> >>> list execution is finished.
> >> No, this problem occurs as GCF bit of INTEN_REG register is enabled
> >> always. If wants to raise interrupt immediately after a command list
> >> finished, GCF bit should be enabled, and it also needs to enable of
> LIST
> >> Hold bit of DMA_HOLD_CMD_REG register. If one of the two is missed out,
> >> g2d hardware will not work normally sometimes.
> > Right, these two things(LIST HOLD command and GCF interrupt enabling)
> should
> > be pair.
> >
> >> This patch is just workaround and it can happen performance issue
> >> because g2d hardware stops a moment whenever a command list finished.
> >>
> >> So, we need the way which enable GCF bit only when a command list
> >> completion interrupt needs.
> >>
> > Agree. How about this? If node->event isn't NULL then set GCF to INTEN
> > register in g2d_dma_start(). For this way, I already mentioned through
> > internal email thread.
> 
> No, Once set GCF, it is set on end. Who can clear it?
> 

Maybe you say that g2d_dma_start() is called by exec ioctl so the GCF bit
could be set by only last node.  For this, We need to look into dma-driven
command processing. Assume that two more command lists exist and they are
executed at once. Then we CAN NOT GET each node while dma operation because
the command lists of each node are executed by dma at once.

On other words, there is no way to enable GCF bit only in case that a
command list completion interrupt is needed because the need is from user
side.

So I think we need some policy for g2d driver. For example, if user wants to
get event to each node, all nodes from the user should be operated with GCF
bit otherwise without GCF bit.
 
Any other idea?

> >> Thanks.
> >>
> >>> Signed-off-by: YoungJun Cho 
> >>> Signed-off-by: Inki Dae 
> >>> Signed-off-by: Kyungmin Park 
> >>> ---
> >>>drivers/gpu/drm/exynos/exynos_drm_g2d.c |   13 -
> >>>1 files changed, 8 insertions(+), 5 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> >> b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> >>> index 095520f..91bc4cc 100644
> >>> --- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> >>> +++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> >>> @@ -82,7 +82,7 @@
> >>>#define G2D_DMA_LIST_DONE_COUNT_OFFSET 17
> >>>
> >>>/* G2D_DMA_HOLD_CMD */
> >>> -#define G2D_USET_HOLD(1 << 2)
> >>> +#define G2D_USER_HOLD(1 << 2)
> >>>#define G2D_LIST_HOLD  (1 << 1)
> >>>#define G2D_BITBLT_HOLD(1 << 0)
> >>>
> >>> @@ -863,10 +863,13 @@ int exynos_g2d_set_cmdlist_ioctl(struct
> drm_device
> >> *drm_dev, void *data,
> >>>   cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
> >>>   cmdlist->data[cmdlist->last++] = 0;
> >>>
> >>> - if (node->event) {
> >>> - cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
> >>> - cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
> >>> - }
> >>> + /*
> >>> +  * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
> >>> +  * if user wants G2D interrupt event once each command list or
> >>> +  * BitBLT command execution is finished.
> >>> +  */
> >>> + cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
> >>> + cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
> >>>
> >>>   /* Check size of cmdlist: last 2 is about G2D_BITBLT_START
*/
> >>>   size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2
+ 2;
> >

___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[Bug 62244] SIGFPE with cogl GL client in wayland

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=62244

Bastien Nocera  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

--- Comment #1 from Bastien Nocera  ---
This works with the mesa 9.1 packages in F19.

-- 
You are receiving this mail because:
You are the assignee for the bug.
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH] DRI2: don't advertise GLX_INTEL_swap_event if it can't

[Paul Menzel]

Dear Rob,


Am Dienstag, den 12.03.2013, 19:44 -0400 schrieb Rob Clark:

»it« sounds  strange in commit summary.

> If ddx does not support swap, don't advertise it.

So how is `dri2BindExtensions` changed. Some things passed beforehand
are already available in `struct dri2_screen *psc`?

Are bugs fixed by this or did you find this reading through the code?

> We might also be able to get rid of the vmwgfx check (I'm not quite
> sure the purpose of that check vs. just checking dri2Minor.

Missing »)«.

> Signed-off-by: Rob Clark 
> ---
>  src/glx/dri2_glx.c | 12 
>  1 file changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/src/glx/dri2_glx.c b/src/glx/dri2_glx.c
> index c4f6996..b2d712c 100644
> --- a/src/glx/dri2_glx.c
> +++ b/src/glx/dri2_glx.c
> @@ -1051,11 +1051,16 @@ static const struct glx_context_vtable 
> dri2_context_vtable = {
>  };
>  
>  static void
> -dri2BindExtensions(struct dri2_screen *psc, const __DRIextension 
> **extensions,
> +dri2BindExtensions(struct dri2_screen *psc, struct glx_display * priv,

No space after the * in `* priv`?

> const char *driverName)
>  {
> +   const struct dri2_display *const pdp = (struct dri2_display *)
> +  priv->dri2Display;
> +   const __DRIextension **extensions;
> int i;
>  
> +   extensions = psc->core->getExtensions(psc->driScreen);
> +
> __glXEnableDirectExtension(&psc->base, "GLX_SGI_video_sync");
> __glXEnableDirectExtension(&psc->base, "GLX_SGI_swap_control");
> __glXEnableDirectExtension(&psc->base, "GLX_MESA_swap_control");
> @@ -1069,7 +1074,7 @@ dri2BindExtensions(struct dri2_screen *psc, const 
> __DRIextension **extensions,
>  * of disabling it uncondtionally, just disable it for drivers
>  * which are known to not support it.
>  */
> -   if (strcmp(driverName, "vmwgfx") != 0) {
> +   if (pdp->swapAvailable && strcmp(driverName, "vmwgfx") != 0) {
>__glXEnableDirectExtension(&psc->base, "GLX_INTEL_swap_event");
> }
>  
> @@ -1212,8 +1217,7 @@ dri2CreateScreen(int screen, struct glx_display * priv)
>goto handle_error;
> }
>  
> -   extensions = psc->core->getExtensions(psc->driScreen);
> -   dri2BindExtensions(psc, extensions, driverName);
> +   dri2BindExtensions(psc, priv, driverName);
>  
> configs = driConvertConfigs(psc->core, psc->base.configs, driver_configs);
> visuals = driConvertConfigs(psc->core, psc->base.visuals, driver_configs);


Thanks,

Paul


signature.asc
Description: This is a digitally signed message part
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCHv7 00/10] Support for Tegra 2D hardware

[Terje Bergstrom]

This set of patches adds support for Tegra20 and Tegra30 host1x and
2D. It is based on linux-next-20130307.

Changes in this version:
 * host1x memory data structures refactored
 * Some "nvhost" leftovers renamed to host1x

Changes in previous version 6:
 * Rebased on latest tegradrm
 * Renamed tegradrm's host1x to host1x_drm
 * Indentation and line split fixed to follow tegradrm convention
 * Pointers to platform_device replaced with pointers to device
 * Added host1x allocator, and wired it in
 * Debug spew code fixed to access mem handles from host1x_job
 * CDMA code doesn't keep the mem handles anymore
 * Push buffer ops have been made generic code
 * Removed the pin_array optimization in host1x_job to simplify code
 * Large number of smaller changes

The driver implements an allocator using the DRM CMA helper. Each buffer is
assigned an ops structure to operate on it. In future the DRM CMA helper will
be replaced with an own allocator to implement IOMMU support.

host1x is the driver that controls host1x hardware. It supports
host1x command channels, synchronization, and memory management. It
is sectioned into logical driver under drivers/gpu/host1x and
physical driver under drivers/host1x/hw. The physical driver is
compiled with the hardware headers of the particular host1x version.

The hardware units are described (briefly) in the Tegra2 TRM. Wiki
page http://http.download.nvidia.com/tegra-public-appnotes/host1x.html
also contains a short description of the functionality.

The patch set merges tegradrm into host1x and adds 2D driver, which
uses host1x channels and sync points. The patch set also adds user
space API to tegradrm for accessing host1x and 2D.

The changes to add support to libdrm are in
g...@gitorious.org:linux-host1x/libdrm-host1x.git

Arto Merilainen (3):
  gpu: drm: Support CMA object preallocation
  gpu: host1x: drm: Rename host1x to host1x_drm
  gpu: host1x: drm: Add CMA ops for host1x driver

Terje Bergstrom (7):
  gpu: host1x: Add host1x driver
  gpu: host1x: Add syncpoint wait and interrupts
  gpu: host1x: Add channel support
  gpu: host1x: Add debug support
  drm: tegra: Move drm to live under host1x
  gpu: host1x: Remove second host1x driver
  drm: tegra: Add gr2d device

 drivers/gpu/Makefile   |1 +
 drivers/gpu/drm/Kconfig|2 -
 drivers/gpu/drm/Makefile   |1 -
 drivers/gpu/drm/drm_gem_cma_helper.c   |   78 ++-
 drivers/gpu/drm/tegra/Makefile |7 -
 drivers/gpu/drm/tegra/drm.c|  217 
 drivers/gpu/drm/tegra/host1x.c |  327 
 drivers/gpu/host1x/Kconfig |   23 +
 drivers/gpu/host1x/Makefile|   20 +
 drivers/gpu/host1x/cdma.c  |  491 +
 drivers/gpu/host1x/cdma.h  |  100 
 drivers/gpu/host1x/channel.c   |  120 +
 drivers/gpu/host1x/channel.h   |   52 ++
 drivers/gpu/host1x/debug.c |  210 
 drivers/gpu/host1x/debug.h |   51 ++
 drivers/gpu/host1x/dev.c   |  248 +
 drivers/gpu/host1x/dev.h   |  316 +++
 drivers/gpu/{drm/tegra => host1x/drm}/Kconfig  |2 +-
 drivers/gpu/host1x/drm/cma.c   |   93 
 drivers/gpu/host1x/drm/cma.h   |   35 ++
 drivers/gpu/{drm/tegra => host1x/drm}/dc.c |5 +-
 drivers/gpu/{drm/tegra => host1x/drm}/dc.h |0
 drivers/gpu/host1x/drm/drm.c   |  673 
 drivers/gpu/{drm/tegra => host1x/drm}/drm.h|   51 +-
 drivers/gpu/{drm/tegra => host1x/drm}/fb.c |6 +-
 drivers/gpu/host1x/drm/gr2d.c  |  330 
 drivers/gpu/{drm/tegra => host1x/drm}/hdmi.c   |5 +-
 drivers/gpu/{drm/tegra => host1x/drm}/hdmi.h   |0
 drivers/gpu/{drm/tegra => host1x/drm}/output.c |0
 drivers/gpu/{drm/tegra => host1x/drm}/rgb.c|0
 drivers/gpu/host1x/host1x.h|   29 +
 drivers/gpu/host1x/host1x_bo.h |   92 
 drivers/gpu/host1x/host1x_client.h |   35 ++
 drivers/gpu/host1x/hw/Makefile |6 +
 drivers/gpu/host1x/hw/cdma_hw.c|  326 
 drivers/gpu/host1x/hw/channel_hw.c |  167 ++
 drivers/gpu/host1x/hw/debug_hw.c   |  322 
 drivers/gpu/host1x/hw/host1x01.c   |   42 ++
 drivers/gpu/host1x/hw/host1x01.h   |   25 +
 drivers/gpu/host1x/hw/host1x01_hardware.h  |  143 +
 drivers/gpu/host1x/hw/hw_host1x01_channel.h|  120 +
 drivers/gpu/host1x/hw/hw_host1x01_sync.h   |  243 +
 drivers/gpu/host1x/hw/hw_host1x01_uclass.h |  174 ++
 drivers/gpu/host1x/hw/intr_hw.c|  143 +
 drivers/gpu/host1x/hw/syncpt_hw.c  |  114 
 drivers/gpu/host1x/intr.c 

[PATCHv7 06/10] drm: tegra: Move drm to live under host1x

[Terje Bergstrom]

Make drm part of host1x driver.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/drm/Kconfig|2 --
 drivers/gpu/drm/Makefile   |1 -
 drivers/gpu/drm/tegra/Makefile |7 ---
 drivers/gpu/host1x/Kconfig |2 ++
 drivers/gpu/host1x/Makefile|5 +
 drivers/gpu/{drm/tegra => host1x/drm}/Kconfig  |0
 drivers/gpu/{drm/tegra => host1x/drm}/dc.c |0
 drivers/gpu/{drm/tegra => host1x/drm}/dc.h |0
 drivers/gpu/{drm/tegra => host1x/drm}/drm.c|0
 drivers/gpu/{drm/tegra => host1x/drm}/drm.h|6 +++---
 drivers/gpu/{drm/tegra => host1x/drm}/fb.c |0
 drivers/gpu/{drm/tegra => host1x/drm}/hdmi.c   |0
 drivers/gpu/{drm/tegra => host1x/drm}/hdmi.h   |0
 drivers/gpu/{drm/tegra => host1x/drm}/host1x.c |0
 drivers/gpu/{drm/tegra => host1x/drm}/output.c |0
 drivers/gpu/{drm/tegra => host1x/drm}/rgb.c|0
 16 files changed, 10 insertions(+), 13 deletions(-)
 delete mode 100644 drivers/gpu/drm/tegra/Makefile
 rename drivers/gpu/{drm/tegra => host1x/drm}/Kconfig (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/dc.c (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/dc.h (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/drm.c (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/drm.h (98%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/fb.c (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/hdmi.c (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/hdmi.h (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/host1x.c (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/output.c (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/rgb.c (100%)

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 1e82882..9031bb7 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -215,8 +215,6 @@ source "drivers/gpu/drm/cirrus/Kconfig"
 
 source "drivers/gpu/drm/shmobile/Kconfig"
 
-source "drivers/gpu/drm/tegra/Kconfig"
-
 source "drivers/gpu/drm/omapdrm/Kconfig"
 
 source "drivers/gpu/drm/tilcdc/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 0d59b24..847b830 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -49,7 +49,6 @@ obj-$(CONFIG_DRM_GMA500) += gma500/
 obj-$(CONFIG_DRM_UDL) += udl/
 obj-$(CONFIG_DRM_AST) += ast/
 obj-$(CONFIG_DRM_SHMOBILE) +=shmobile/
-obj-$(CONFIG_DRM_TEGRA) += tegra/
 obj-$(CONFIG_DRM_OMAP) += omapdrm/
 obj-$(CONFIG_DRM_TILCDC)   += tilcdc/
 obj-y  += i2c/
diff --git a/drivers/gpu/drm/tegra/Makefile b/drivers/gpu/drm/tegra/Makefile
deleted file mode 100644
index 80f73d1..000
--- a/drivers/gpu/drm/tegra/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-ccflags-y := -Iinclude/drm
-ccflags-$(CONFIG_DRM_TEGRA_DEBUG) += -DDEBUG
-
-tegra-drm-y := drm.o fb.o dc.o host1x.o
-tegra-drm-y += output.o rgb.o hdmi.o
-
-obj-$(CONFIG_DRM_TEGRA) += tegra-drm.o
diff --git a/drivers/gpu/host1x/Kconfig b/drivers/gpu/host1x/Kconfig
index 00f0859..ee3af1e 100644
--- a/drivers/gpu/host1x/Kconfig
+++ b/drivers/gpu/host1x/Kconfig
@@ -18,4 +18,6 @@ config TEGRA_HOST1X_FIREWALL
 
  If unsure, choose Y.
 
+source "drivers/gpu/host1x/drm/Kconfig"
+
 endif
diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index 49fd580..4761e8a 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -10,4 +10,9 @@ host1x-y = \
debug.o \
hw/host1x01.o
 
+ccflags-y += -Iinclude/drm
+ccflags-$(CONFIG_DRM_TEGRA_DEBUG) += -DDEBUG
+
+host1x-$(CONFIG_DRM_TEGRA) += drm/drm.o drm/fb.o drm/dc.o drm/host1x.o
+host1x-$(CONFIG_DRM_TEGRA) += drm/output.o drm/rgb.o drm/hdmi.o
 obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/drm/tegra/Kconfig b/drivers/gpu/host1x/drm/Kconfig
similarity index 100%
rename from drivers/gpu/drm/tegra/Kconfig
rename to drivers/gpu/host1x/drm/Kconfig
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/host1x/drm/dc.c
similarity index 100%
rename from drivers/gpu/drm/tegra/dc.c
rename to drivers/gpu/host1x/drm/dc.c
diff --git a/drivers/gpu/drm/tegra/dc.h b/drivers/gpu/host1x/drm/dc.h
similarity index 100%
rename from drivers/gpu/drm/tegra/dc.h
rename to drivers/gpu/host1x/drm/dc.h
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/host1x/drm/drm.c
similarity index 100%
rename from drivers/gpu/drm/tegra/drm.c
rename to drivers/gpu/host1x/drm/drm.c
diff --git a/drivers/gpu/drm/tegra/drm.h b/drivers/gpu/host1x/drm/drm.h
similarity index 98%
rename from drivers/gpu/drm/tegra/drm.h
rename to drivers/gpu/host1x/drm/drm.h
index 6dd75a2..a6c011d 100644
--- a/drivers/gpu/drm/tegra/drm.h
+++ b/drivers/gpu/host1x/drm/drm.h
@@ -7,8 +7,8 @@
  * published by the Free Software Foundation.
  */
 
-#ifndef TEGRA_DRM_H
-#define TEGRA_DRM_H 1
+#ifndef HOST1X_DRM_H
+#define HOST1X_DRM_H 1
 
 #include 
 #include 
@@ -234,4 +234,4 @@ extern struct platform_driver tegra

[PATCHv7 03/10] gpu: host1x: Add syncpoint wait and interrupts

[Terje Bergstrom]

Add support for sync point interrupts, and sync point wait. Sync
point wait used interrupts for unblocking wait.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/Makefile  |1 +
 drivers/gpu/host1x/dev.c |   12 ++
 drivers/gpu/host1x/dev.h |   51 +
 drivers/gpu/host1x/hw/host1x01.c |2 +
 drivers/gpu/host1x/hw/hw_host1x01_sync.h |   42 
 drivers/gpu/host1x/hw/intr_hw.c  |  143 +
 drivers/gpu/host1x/intr.c|  328 ++
 drivers/gpu/host1x/intr.h|   96 +
 drivers/gpu/host1x/syncpt.c  |  159 +++
 drivers/gpu/host1x/syncpt.h  |   14 +-
 10 files changed, 847 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/host1x/hw/intr_hw.c
 create mode 100644 drivers/gpu/host1x/intr.c
 create mode 100644 drivers/gpu/host1x/intr.h

diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index 363e6ab..5ef47ff 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -3,6 +3,7 @@ ccflags-y = -Idrivers/gpu/host1x
 host1x-y = \
syncpt.o \
dev.o \
+   intr.o \
hw/host1x01.o
 
 obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index d95a9b2..4421e28 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -28,6 +28,7 @@
 #include 
 
 #include "dev.h"
+#include "intr.h"
 #include "hw/host1x01.h"
 
 void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)
@@ -127,12 +128,23 @@ static int host1x_probe(struct platform_device *pdev)
return err;
}
 
+   err = host1x_intr_init(host, syncpt_irq);
+   if (err) {
+   dev_err(dev, "failed to init irq");
+   goto fail_deinit_syncpt;
+   }
+
return 0;
+
+fail_deinit_syncpt:
+   host1x_syncpt_deinit(host);
+   return err;
 }
 
 static int __exit host1x_remove(struct platform_device *pdev)
 {
struct host1x *host = platform_get_drvdata(pdev);
+   host1x_intr_deinit(host);
host1x_syncpt_deinit(host);
clk_disable_unprepare(host->clk);
return 0;
diff --git a/drivers/gpu/host1x/dev.h b/drivers/gpu/host1x/dev.h
index 750daa3..fb5f842 100644
--- a/drivers/gpu/host1x/dev.h
+++ b/drivers/gpu/host1x/dev.h
@@ -21,6 +21,7 @@
 #include 
 
 #include "syncpt.h"
+#include "intr.h"
 
 struct host1x_syncpt;
 
@@ -33,6 +34,17 @@ struct host1x_syncpt_ops {
int (*patch_wait)(struct host1x_syncpt *syncpt, void *patch_addr);
 };
 
+struct host1x_intr_ops {
+   int (*init_host_sync)(struct host1x *host, u32 cpm,
+   void (*syncpt_thresh_work)(struct work_struct *work));
+   void (*set_syncpt_threshold)(
+   struct host1x *host, u32 id, u32 thresh);
+   void (*enable_syncpt_intr)(struct host1x *host, u32 id);
+   void (*disable_syncpt_intr)(struct host1x *host, u32 id);
+   void (*disable_all_syncpt_intrs)(struct host1x *host);
+   int (*free_syncpt_irq)(struct host1x *host);
+};
+
 struct host1x_info {
int nb_channels;/* host1x: num channels supported */
int nb_pts; /* host1x: num syncpoints supported */
@@ -50,7 +62,13 @@ struct host1x {
struct device *dev;
struct clk *clk;
 
+   struct mutex intr_mutex;
+   struct workqueue_struct *intr_wq;
+   int intr_syncpt_irq;
+
const struct host1x_syncpt_ops *syncpt_op;
+   const struct host1x_intr_ops *intr_op;
+
 };
 
 static inline struct host1x *host1x_get_host(struct device *dev)
@@ -101,4 +119,37 @@ static inline int host1x_hw_syncpt_patch_wait(struct 
host1x *host,
return host->syncpt_op->patch_wait(sp, patch_addr);
 }
 
+static inline int host1x_hw_intr_init_host_sync(struct host1x *host, u32 cpm,
+   void (*syncpt_thresh_work)(struct work_struct *))
+{
+   return host->intr_op->init_host_sync(host, cpm, syncpt_thresh_work);
+}
+
+static inline void host1x_hw_intr_set_syncpt_threshold(struct host1x *host,
+  u32 id, u32 thresh)
+{
+   host->intr_op->set_syncpt_threshold(host, id, thresh);
+}
+
+static inline void host1x_hw_intr_enable_syncpt_intr(struct host1x *host,
+u32 id)
+{
+   host->intr_op->enable_syncpt_intr(host, id);
+}
+
+static inline void host1x_hw_intr_disable_syncpt_intr(struct host1x *host,
+ u32 id)
+{
+   host->intr_op->disable_syncpt_intr(host, id);
+}
+
+static inline void host1x_hw_intr_disable_all_syncpt_intrs(struct host1x *host)
+{
+   host->intr_op->disable_all_syncpt_intrs(host);
+}
+
+static inline int host1x_hw_intr_free_syncpt_irq(struct host1x *host)
+{
+   return host->intr_op->free_syncpt_irq(host);
+}
 #endif
d

[PATCHv7 09/10] gpu: host1x: drm: Add CMA ops for host1x driver

[Terje Bergstrom]

From: Arto Merilainen 

This patch implements a CMA memory handler for the host1x driver.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/Makefile  |1 +
 drivers/gpu/host1x/drm/cma.c |   93 ++
 drivers/gpu/host1x/drm/cma.h |   35 
 3 files changed, 129 insertions(+)
 create mode 100644 drivers/gpu/host1x/drm/cma.c
 create mode 100644 drivers/gpu/host1x/drm/cma.h

diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index 9a6fc76..e85db5a 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -15,4 +15,5 @@ ccflags-$(CONFIG_DRM_TEGRA_DEBUG) += -DDEBUG
 
 host1x-$(CONFIG_DRM_TEGRA) += drm/drm.o drm/fb.o drm/dc.o
 host1x-$(CONFIG_DRM_TEGRA) += drm/output.o drm/rgb.o drm/hdmi.o
+host1x-$(CONFIG_DRM_TEGRA) += drm/cma.o
 obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/drm/cma.c b/drivers/gpu/host1x/drm/cma.c
new file mode 100644
index 000..cf86fce
--- /dev/null
+++ b/drivers/gpu/host1x/drm/cma.c
@@ -0,0 +1,93 @@
+/*
+ * Tegra host1x CMA support
+ *
+ * Copyright (c) 2012-2013, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include "cma.h"
+#include "host1x_bo.h"
+
+static void cma_put(struct host1x_bo *bo)
+{
+   struct tegra_drm_bo *cma_bo =
+   container_of(bo, struct tegra_drm_bo, base);
+   struct drm_device *drm = cma_bo->cma_obj.base.dev;
+
+   mutex_lock(&drm->struct_mutex);
+   drm_gem_object_unreference(&cma_bo->cma_obj.base);
+   mutex_unlock(&drm->struct_mutex);
+}
+
+static dma_addr_t cma_pin(struct host1x_bo *bo, struct sg_table **sgt)
+{
+   struct tegra_drm_bo *cma_bo =
+   container_of(bo, struct tegra_drm_bo, base);
+   return cma_bo->cma_obj.paddr;
+}
+
+static void cma_unpin(struct host1x_bo *bo, struct sg_table *sgt)
+{
+}
+
+static void *cma_mmap(struct host1x_bo *bo)
+{
+   struct tegra_drm_bo *cma_bo =
+   container_of(bo, struct tegra_drm_bo, base);
+   return cma_bo->cma_obj.vaddr;
+}
+
+static void cma_munmap(struct host1x_bo *bo, void *addr)
+{
+}
+
+static void *cma_kmap(struct host1x_bo *bo, unsigned int pagenum)
+{
+   struct tegra_drm_bo *cma_bo =
+   container_of(bo, struct tegra_drm_bo, base);
+   return cma_bo->cma_obj.vaddr + pagenum * PAGE_SIZE;
+}
+
+static void cma_kunmap(struct host1x_bo *bo, unsigned int pagenum, void *addr)
+{
+}
+
+static struct host1x_bo *cma_get(struct host1x_bo *bo)
+{
+   struct tegra_drm_bo *cma_bo =
+   container_of(bo, struct tegra_drm_bo, base);
+   struct drm_device *drm = cma_bo->cma_obj.base.dev;
+
+   mutex_lock(&drm->struct_mutex);
+   drm_gem_object_reference(&cma_bo->cma_obj.base);
+   mutex_unlock(&drm->struct_mutex);
+
+   return bo;
+}
+
+const struct host1x_bo_ops tegra_drm_bo_ops = {
+   .get = cma_get,
+   .put = cma_put,
+   .pin = cma_pin,
+   .unpin = cma_unpin,
+   .mmap = cma_mmap,
+   .munmap = cma_munmap,
+   .kmap = cma_kmap,
+   .kunmap = cma_kunmap,
+};
diff --git a/drivers/gpu/host1x/drm/cma.h b/drivers/gpu/host1x/drm/cma.h
new file mode 100644
index 000..f35cebd
--- /dev/null
+++ b/drivers/gpu/host1x/drm/cma.h
@@ -0,0 +1,35 @@
+/*
+ * Tegra host1x cma memory manager
+ *
+ * Copyright (c) 2012-2013, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#ifndef __HOST1X_CMA_H
+#define __HOST1X_CMA_H
+
+#include 
+#include 
+#include 
+
+#include "host1x_bo.h"
+
+struct tegra_drm_bo {
+   struct host1x_bo base;
+   struct drm_gem_cma_object cma_obj;
+};
+
+extern const struct host1x_bo_ops tegra_drm_bo_ops;
+
+#endif
-- 
1.7.9.5

___
dri-devel mailing l

[PATCHv7 02/10] gpu: host1x: Add host1x driver

[Terje Bergstrom]

Add host1x, the driver for host1x and its client unit 2D. The Tegra
host1x module is the DMA engine for register access to Tegra's
graphics- and multimedia-related modules. The modules served by
host1x are referred to as clients. host1x includes some other
functionality, such as synchronization.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/Makefile  |1 +
 drivers/gpu/host1x/Kconfig|9 ++
 drivers/gpu/host1x/Makefile   |8 ++
 drivers/gpu/host1x/dev.c  |  155 +
 drivers/gpu/host1x/dev.h  |  104 ++
 drivers/gpu/host1x/hw/Makefile|6 +
 drivers/gpu/host1x/hw/host1x01.c  |   33 +
 drivers/gpu/host1x/hw/host1x01.h  |   25 
 drivers/gpu/host1x/hw/host1x01_hardware.h |   27 
 drivers/gpu/host1x/hw/hw_host1x01_sync.h  |   74 ++
 drivers/gpu/host1x/hw/syncpt_hw.c |  102 ++
 drivers/gpu/host1x/syncpt.c   |  212 +
 drivers/gpu/host1x/syncpt.h   |  147 
 drivers/video/Kconfig |2 +
 include/trace/events/host1x.h |   61 +
 15 files changed, 966 insertions(+)
 create mode 100644 drivers/gpu/host1x/Kconfig
 create mode 100644 drivers/gpu/host1x/Makefile
 create mode 100644 drivers/gpu/host1x/dev.c
 create mode 100644 drivers/gpu/host1x/dev.h
 create mode 100644 drivers/gpu/host1x/hw/Makefile
 create mode 100644 drivers/gpu/host1x/hw/host1x01.c
 create mode 100644 drivers/gpu/host1x/hw/host1x01.h
 create mode 100644 drivers/gpu/host1x/hw/host1x01_hardware.h
 create mode 100644 drivers/gpu/host1x/hw/hw_host1x01_sync.h
 create mode 100644 drivers/gpu/host1x/hw/syncpt_hw.c
 create mode 100644 drivers/gpu/host1x/syncpt.c
 create mode 100644 drivers/gpu/host1x/syncpt.h
 create mode 100644 include/trace/events/host1x.h

diff --git a/drivers/gpu/Makefile b/drivers/gpu/Makefile
index 30879df..d8a22c2 100644
--- a/drivers/gpu/Makefile
+++ b/drivers/gpu/Makefile
@@ -1 +1,2 @@
 obj-y  += drm/ vga/
+obj-$(CONFIG_TEGRA_HOST1X) += host1x/
diff --git a/drivers/gpu/host1x/Kconfig b/drivers/gpu/host1x/Kconfig
new file mode 100644
index 000..c01c450
--- /dev/null
+++ b/drivers/gpu/host1x/Kconfig
@@ -0,0 +1,9 @@
+config TEGRA_HOST1X
+   tristate "NVIDIA Tegra host1x driver"
+   help
+ Driver for the NVIDIA Tegra host1x hardware.
+
+ The Tegra host1x module is the DMA engine for register access to
+ Tegra's graphics- and multimedia-related modules. The modules served
+ by host1x are referred to as clients. host1x includes some other
+ functionality, such as synchronization.
diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
new file mode 100644
index 000..363e6ab
--- /dev/null
+++ b/drivers/gpu/host1x/Makefile
@@ -0,0 +1,8 @@
+ccflags-y = -Idrivers/gpu/host1x
+
+host1x-y = \
+   syncpt.o \
+   dev.o \
+   hw/host1x01.o
+
+obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
new file mode 100644
index 000..d95a9b2
--- /dev/null
+++ b/drivers/gpu/host1x/dev.c
@@ -0,0 +1,155 @@
+/*
+ * Tegra host1x driver
+ *
+ * Copyright (c) 2010-2013, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define CREATE_TRACE_POINTS
+#include 
+
+#include "dev.h"
+#include "hw/host1x01.h"
+
+void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)
+{
+   void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;
+
+   writel(v, sync_regs + r);
+}
+
+u32 host1x_sync_readl(struct host1x *host1x, u32 r)
+{
+   void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;
+
+   return readl(sync_regs + r);
+}
+
+static const struct host1x_info host1x01_info = {
+   .nb_channels= 8,
+   .nb_pts = 32,
+   .nb_mlocks  = 16,
+   .nb_bases   = 8,
+   .init   = host1x01_init,
+   .sync_offset= 0x3000,
+};
+
+static struct of_device_id host1x_match[] = {
+   { .compatible = "nvidia,tegra30-host1x", .data = &host1x01_info, },
+   { .compatible = "nvidia,tegra20-host1x", .data = &host1x01_info, },
+   { },
+};
+
+static int 

[PATCHv7 07/10] gpu: host1x: drm: Rename host1x to host1x_drm

[Terje Bergstrom]

From: Arto Merilainen 

Both host1x and drm drivers have host1x structures. This patch
renames the host1x structure under drm to follow name host1x_drm.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/drm/dc.c |4 ++--
 drivers/gpu/host1x/drm/drm.c|4 ++--
 drivers/gpu/host1x/drm/drm.h|   14 +++---
 drivers/gpu/host1x/drm/fb.c |6 +++---
 drivers/gpu/host1x/drm/hdmi.c   |4 ++--
 drivers/gpu/host1x/drm/host1x.c |   22 --
 6 files changed, 28 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/host1x/drm/dc.c b/drivers/gpu/host1x/drm/dc.c
index de94707..d1f6609 100644
--- a/drivers/gpu/host1x/drm/dc.c
+++ b/drivers/gpu/host1x/drm/dc.c
@@ -1097,7 +1097,7 @@ static const struct host1x_client_ops dc_client_ops = {
 
 static int tegra_dc_probe(struct platform_device *pdev)
 {
-   struct host1x *host1x = dev_get_drvdata(pdev->dev.parent);
+   struct host1x_drm *host1x = dev_get_drvdata(pdev->dev.parent);
struct resource *regs;
struct tegra_dc *dc;
int err;
@@ -1160,7 +1160,7 @@ static int tegra_dc_probe(struct platform_device *pdev)
 
 static int tegra_dc_remove(struct platform_device *pdev)
 {
-   struct host1x *host1x = dev_get_drvdata(pdev->dev.parent);
+   struct host1x_drm *host1x = dev_get_drvdata(pdev->dev.parent);
struct tegra_dc *dc = platform_get_drvdata(pdev);
int err;
 
diff --git a/drivers/gpu/host1x/drm/drm.c b/drivers/gpu/host1x/drm/drm.c
index 9d452df..6c59bcd 100644
--- a/drivers/gpu/host1x/drm/drm.c
+++ b/drivers/gpu/host1x/drm/drm.c
@@ -26,7 +26,7 @@
 static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
 {
struct device *dev = drm->dev;
-   struct host1x *host1x;
+   struct host1x_drm *host1x;
int err;
 
host1x = dev_get_drvdata(dev);
@@ -69,7 +69,7 @@ static int tegra_drm_open(struct drm_device *drm, struct 
drm_file *filp)
 
 static void tegra_drm_lastclose(struct drm_device *drm)
 {
-   struct host1x *host1x = drm->dev_private;
+   struct host1x_drm *host1x = drm->dev_private;
 
drm_fbdev_cma_restore_mode(host1x->fbdev);
 }
diff --git a/drivers/gpu/host1x/drm/drm.h b/drivers/gpu/host1x/drm/drm.h
index a6c011d..7fedb6c 100644
--- a/drivers/gpu/host1x/drm/drm.h
+++ b/drivers/gpu/host1x/drm/drm.h
@@ -18,7 +18,7 @@
 #include 
 #include 
 
-struct host1x {
+struct host1x_drm {
struct drm_device *drm;
struct device *dev;
void __iomem *regs;
@@ -44,7 +44,7 @@ struct host1x_client_ops {
 };
 
 struct host1x_client {
-   struct host1x *host1x;
+   struct host1x_drm *host1x;
struct device *dev;
 
const struct host1x_client_ops *ops;
@@ -52,12 +52,12 @@ struct host1x_client {
struct list_head list;
 };
 
-extern int host1x_drm_init(struct host1x *host1x, struct drm_device *drm);
-extern int host1x_drm_exit(struct host1x *host1x);
+extern int host1x_drm_init(struct host1x_drm *host1x, struct drm_device *drm);
+extern int host1x_drm_exit(struct host1x_drm *host1x);
 
-extern int host1x_register_client(struct host1x *host1x,
+extern int host1x_register_client(struct host1x_drm *host1x,
  struct host1x_client *client);
-extern int host1x_unregister_client(struct host1x *host1x,
+extern int host1x_unregister_client(struct host1x_drm *host1x,
struct host1x_client *client);
 
 struct tegra_output;
@@ -66,7 +66,7 @@ struct tegra_dc {
struct host1x_client client;
spinlock_t lock;
 
-   struct host1x *host1x;
+   struct host1x_drm *host1x;
struct device *dev;
 
struct drm_crtc base;
diff --git a/drivers/gpu/host1x/drm/fb.c b/drivers/gpu/host1x/drm/fb.c
index 0391495..6ed885a 100644
--- a/drivers/gpu/host1x/drm/fb.c
+++ b/drivers/gpu/host1x/drm/fb.c
@@ -11,7 +11,7 @@
 
 static void tegra_drm_fb_output_poll_changed(struct drm_device *drm)
 {
-   struct host1x *host1x = drm->dev_private;
+   struct host1x_drm *host1x = drm->dev_private;
 
drm_fbdev_cma_hotplug_event(host1x->fbdev);
 }
@@ -23,7 +23,7 @@ static const struct drm_mode_config_funcs 
tegra_drm_mode_funcs = {
 
 int tegra_drm_fb_init(struct drm_device *drm)
 {
-   struct host1x *host1x = drm->dev_private;
+   struct host1x_drm *host1x = drm->dev_private;
struct drm_fbdev_cma *fbdev;
 
drm->mode_config.min_width = 0;
@@ -46,7 +46,7 @@ int tegra_drm_fb_init(struct drm_device *drm)
 
 void tegra_drm_fb_exit(struct drm_device *drm)
 {
-   struct host1x *host1x = drm->dev_private;
+   struct host1x_drm *host1x = drm->dev_private;
 
drm_fbdev_cma_fini(host1x->fbdev);
 }
diff --git a/drivers/gpu/host1x/drm/hdmi.c b/drivers/gpu/host1x/drm/hdmi.c
index bb747f6..f438f80 100644
--- a/drivers/gpu/host1x/drm/hdmi.c
+++ b/drivers/gpu/host1x/drm/hdmi.c
@@ -1189,7 +1189,7 @@ static const struct host1x_client_ops hdmi_client_ops = {
 

[PATCHv7 01/10] gpu: drm: Support CMA object preallocation

[Terje Bergstrom]

From: Arto Merilainen 

This patch adds helper functions drm_gem_cma_init() and
drm_gem_cma_deinit() for handling CMA structures that already have
been allocated. This allows embedding the CMA structure inside other
structures.

Signed-off-by: Arto Merilainen 
---
 drivers/gpu/drm/drm_gem_cma_helper.c |   78 --
 include/drm/drm_gem_cma_helper.h |9 
 2 files changed, 64 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c 
b/drivers/gpu/drm/drm_gem_cma_helper.c
index 0a7e011..3b14280 100644
--- a/drivers/gpu/drm/drm_gem_cma_helper.c
+++ b/drivers/gpu/drm/drm_gem_cma_helper.c
@@ -2,6 +2,7 @@
  * drm gem CMA (contiguous memory allocator) helper functions
  *
  * Copyright (C) 2012 Sascha Hauer, Pengutronix
+ * Copyright (C) 2013 NVIDIA CORPORATION, All rights reserved.
  *
  * Based on Samsung Exynos code
  *
@@ -40,30 +41,25 @@ static void drm_gem_cma_buf_destroy(struct drm_device *drm,
 }
 
 /*
- * drm_gem_cma_create - allocate an object with the given size
+ * drm_gem_cma_object_init - allocate buffer and initialize given cma object
  *
- * returns a struct drm_gem_cma_object* on success or ERR_PTR values
- * on failure.
+ * this function allocates memory for a cma buffer and initializes the given
+ * cma object to use the allocated buffer.
  */
-struct drm_gem_cma_object *drm_gem_cma_create(struct drm_device *drm,
-   unsigned int size)
+
+int drm_gem_cma_object_init(struct drm_device *drm,
+   struct drm_gem_cma_object *cma_obj, unsigned int size)
 {
-   struct drm_gem_cma_object *cma_obj;
struct drm_gem_object *gem_obj;
int ret;
 
size = round_up(size, PAGE_SIZE);
 
-   cma_obj = kzalloc(sizeof(*cma_obj), GFP_KERNEL);
-   if (!cma_obj)
-   return ERR_PTR(-ENOMEM);
-
cma_obj->vaddr = dma_alloc_writecombine(drm->dev, size,
&cma_obj->paddr, GFP_KERNEL | __GFP_NOWARN);
if (!cma_obj->vaddr) {
dev_err(drm->dev, "failed to allocate buffer with size %d\n", 
size);
-   ret = -ENOMEM;
-   goto err_dma_alloc;
+   return -ENOMEM;
}
 
gem_obj = &cma_obj->base;
@@ -76,7 +72,7 @@ struct drm_gem_cma_object *drm_gem_cma_create(struct 
drm_device *drm,
if (ret)
goto err_create_mmap_offset;
 
-   return cma_obj;
+   return 0;
 
 err_create_mmap_offset:
drm_gem_object_release(gem_obj);
@@ -84,10 +80,36 @@ err_create_mmap_offset:
 err_obj_init:
drm_gem_cma_buf_destroy(drm, cma_obj);
 
-err_dma_alloc:
-   kfree(cma_obj);
+   return ret;
+}
+EXPORT_SYMBOL_GPL(drm_gem_cma_object_init);
+
+/*
+ * drm_gem_cma_create - allocate an object with the given size
+ *
+ * returns a struct drm_gem_cma_object* on success or ERR_PTR values
+ * on failure.
+ */
+struct drm_gem_cma_object *drm_gem_cma_create(struct drm_device *drm,
+   unsigned int size)
+{
+   struct drm_gem_cma_object *cma_obj;
+   int ret;
+
+   size = round_up(size, PAGE_SIZE);
+
+   cma_obj = kzalloc(sizeof(*cma_obj), GFP_KERNEL);
+   if (!cma_obj)
+   return ERR_PTR(-ENOMEM);
+
+   ret = drm_gem_cma_object_init(drm, cma_obj, size);
+   if (ret) {
+   kfree(cma_obj);
+   return ERR_PTR(ret);
+   }
+
+   return cma_obj;
 
-   return ERR_PTR(ret);
 }
 EXPORT_SYMBOL_GPL(drm_gem_cma_create);
 
@@ -133,22 +155,32 @@ err_handle_create:
 }
 
 /*
- * drm_gem_cma_free_object - (struct drm_driver)->gem_free_object callback
- * function
+ * drm_gem_cma_deinit_object - deinitialize cma object
+ *
+ * this function deinitializes the given cma object without releasing the
+ * object memory. this function is a counterpart for the function
+ * drm_gem_cma_object_init().
  */
-void drm_gem_cma_free_object(struct drm_gem_object *gem_obj)
+void drm_gem_cma_object_deinit(struct drm_gem_object *gem_obj)
 {
-   struct drm_gem_cma_object *cma_obj;
+   struct drm_gem_cma_object *cma_obj = to_drm_gem_cma_obj(gem_obj);
 
if (gem_obj->map_list.map)
drm_gem_free_mmap_offset(gem_obj);
 
drm_gem_object_release(gem_obj);
-
-   cma_obj = to_drm_gem_cma_obj(gem_obj);
-
drm_gem_cma_buf_destroy(gem_obj->dev, cma_obj);
+}
+EXPORT_SYMBOL_GPL(drm_gem_cma_object_deinit);
 
+/*
+ * drm_gem_cma_free_object - (struct drm_driver)->gem_free_object callback
+ * function
+ */
+void drm_gem_cma_free_object(struct drm_gem_object *gem_obj)
+{
+   struct drm_gem_cma_object *cma_obj = to_drm_gem_cma_obj(gem_obj);
+   drm_gem_cma_object_deinit(gem_obj);
kfree(cma_obj);
 }
 EXPORT_SYMBOL_GPL(drm_gem_cma_free_object);
diff --git a/include/drm/drm_gem_cma_helper.h b/include/drm/drm_gem_cma_helper.h
index 63397ce..5fdccb3 100644
--- a/include/drm/drm_gem_cma_helper.h
+++ b/include/drm/drm_gem_cma_helper.h
@@ -13,6 +13,10 @@ to_drm_gem_cma_obj(struct drm_gem_object *gem

[PATCHv7 08/10] gpu: host1x: Remove second host1x driver

[Terje Bergstrom]

Remove second host1x driver, and bind tegra-drm to the new host1x
driver. The logic to parse device tree and track clients is moved
to drm.c.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/Makefile|2 +-
 drivers/gpu/host1x/dev.c   |   58 ++-
 drivers/gpu/host1x/dev.h   |6 +
 drivers/gpu/host1x/drm/Kconfig |2 +-
 drivers/gpu/host1x/drm/dc.c|5 +-
 drivers/gpu/host1x/drm/drm.c   |  217 +++-
 drivers/gpu/host1x/drm/drm.h   |3 -
 drivers/gpu/host1x/drm/hdmi.c  |5 +-
 drivers/gpu/host1x/drm/host1x.c|  329 
 drivers/gpu/host1x/host1x_client.h |   35 
 10 files changed, 318 insertions(+), 344 deletions(-)
 delete mode 100644 drivers/gpu/host1x/drm/host1x.c
 create mode 100644 drivers/gpu/host1x/host1x_client.h

diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index 4761e8a..9a6fc76 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -13,6 +13,6 @@ host1x-y = \
 ccflags-y += -Iinclude/drm
 ccflags-$(CONFIG_DRM_TEGRA_DEBUG) += -DDEBUG
 
-host1x-$(CONFIG_DRM_TEGRA) += drm/drm.o drm/fb.o drm/dc.o drm/host1x.o
+host1x-$(CONFIG_DRM_TEGRA) += drm/drm.o drm/fb.o drm/dc.o
 host1x-$(CONFIG_DRM_TEGRA) += drm/output.o drm/rgb.o drm/hdmi.o
 obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index d7c6e3e..6af8081 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -32,6 +32,19 @@
 #include "channel.h"
 #include "debug.h"
 #include "hw/host1x01.h"
+#include "host1x_client.h"
+
+void host1x_set_drm_data(struct device *dev, void *data)
+{
+   struct host1x *host1x = dev_get_drvdata(dev);
+   host1x->drm_data = data;
+}
+
+void *host1x_get_drm_data(struct device *dev)
+{
+   struct host1x *host1x = dev_get_drvdata(dev);
+   return host1x->drm_data;
+}
 
 void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)
 {
@@ -154,6 +167,8 @@ static int host1x_probe(struct platform_device *pdev)
 
host1x_debug_init(host);
 
+   host1x_drm_alloc(pdev);
+
return 0;
 
 fail_deinit_syncpt:
@@ -170,7 +185,7 @@ static int __exit host1x_remove(struct platform_device 
*pdev)
return 0;
 }
 
-static struct platform_driver platform_driver = {
+static struct platform_driver tegra_host1x_driver = {
.probe = host1x_probe,
.remove = __exit_p(host1x_remove),
.driver = {
@@ -180,8 +195,47 @@ static struct platform_driver platform_driver = {
},
 };
 
-module_platform_driver(platform_driver);
+static int __init tegra_host1x_init(void)
+{
+   int err;
+
+   err = platform_driver_register(&tegra_host1x_driver);
+   if (err < 0)
+   return err;
+
+#ifdef CONFIG_DRM_TEGRA
+   err = platform_driver_register(&tegra_dc_driver);
+   if (err < 0)
+   goto unregister_host1x;
+
+   err = platform_driver_register(&tegra_hdmi_driver);
+   if (err < 0)
+   goto unregister_dc;
+#endif
+
+   return 0;
+
+#ifdef CONFIG_DRM_TEGRA
+unregister_dc:
+   platform_driver_unregister(&tegra_dc_driver);
+unregister_host1x:
+   platform_driver_unregister(&tegra_host1x_driver);
+   return err;
+#endif
+}
+module_init(tegra_host1x_init);
+
+static void __exit tegra_host1x_exit(void)
+{
+#ifdef CONFIG_DRM_TEGRA
+   platform_driver_unregister(&tegra_hdmi_driver);
+   platform_driver_unregister(&tegra_dc_driver);
+#endif
+   platform_driver_unregister(&tegra_host1x_driver);
+}
+module_exit(tegra_host1x_exit);
 
+MODULE_AUTHOR("Thierry Reding ");
 MODULE_AUTHOR("Terje Bergstrom ");
 MODULE_DESCRIPTION("Host1x driver for Tegra products");
 MODULE_LICENSE("GPL");
diff --git a/drivers/gpu/host1x/dev.h b/drivers/gpu/host1x/dev.h
index 4a56233..ca2ba8a 100644
--- a/drivers/gpu/host1x/dev.h
+++ b/drivers/gpu/host1x/dev.h
@@ -124,6 +124,8 @@ struct host1x {
unsigned int num_allocated_channels;
 
struct dentry *debugfs;
+
+   void *drm_data;
 };
 
 static inline struct host1x *host1x_get_host(struct device *dev)
@@ -307,4 +309,8 @@ static inline void host1x_hw_show_mlocks(struct host1x 
*host, struct output *o)
host->debug_op->show_mlocks(host, o);
 }
 
+extern struct platform_driver tegra_hdmi_driver;
+extern struct platform_driver tegra_dc_driver;
+extern struct platform_driver tegra_gr2d_driver;
+
 #endif
diff --git a/drivers/gpu/host1x/drm/Kconfig b/drivers/gpu/host1x/drm/Kconfig
index c92955d..8fb6545 100644
--- a/drivers/gpu/host1x/drm/Kconfig
+++ b/drivers/gpu/host1x/drm/Kconfig
@@ -1,5 +1,5 @@
 config DRM_TEGRA
-   tristate "NVIDIA Tegra DRM"
+   bool "NVIDIA Tegra DRM"
depends on DRM && OF && ARCH_TEGRA
select DRM_KMS_HELPER
select DRM_GEM_CMA_HELPER
diff --git a/drivers/gpu/host1x/drm/dc.c b/drivers/gpu/host1x/drm/dc.c
index d1f6609..29a79b6 100644
--- a/drivers/gpu

[PATCHv7 10/10] drm: tegra: Add gr2d device

[Terje Bergstrom]

Add client driver for 2D device, and IOCTLs to pass work to host1x
channel for 2D.

Also adds functions that can be called to access sync points from
DRM.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/Makefile   |1 +
 drivers/gpu/host1x/dev.c  |7 +
 drivers/gpu/host1x/drm/drm.c  |  251 ++-
 drivers/gpu/host1x/drm/drm.h  |   28 +++-
 drivers/gpu/host1x/drm/gr2d.c |  330 +
 drivers/gpu/host1x/host1x.h   |3 +-
 include/drm/tegra_drm.h   |  131 
 7 files changed, 747 insertions(+), 4 deletions(-)
 create mode 100644 drivers/gpu/host1x/drm/gr2d.c
 create mode 100644 include/drm/tegra_drm.h

diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index e85db5a..29c0c6b 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -16,4 +16,5 @@ ccflags-$(CONFIG_DRM_TEGRA_DEBUG) += -DDEBUG
 host1x-$(CONFIG_DRM_TEGRA) += drm/drm.o drm/fb.o drm/dc.o
 host1x-$(CONFIG_DRM_TEGRA) += drm/output.o drm/rgb.o drm/hdmi.o
 host1x-$(CONFIG_DRM_TEGRA) += drm/cma.o
+host1x-$(CONFIG_DRM_TEGRA) += drm/gr2d.o
 obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index 6af8081..0091632 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -211,11 +211,17 @@ static int __init tegra_host1x_init(void)
err = platform_driver_register(&tegra_hdmi_driver);
if (err < 0)
goto unregister_dc;
+
+   err = platform_driver_register(&tegra_gr2d_driver);
+   if (err < 0)
+   goto unregister_hdmi;
 #endif
 
return 0;
 
 #ifdef CONFIG_DRM_TEGRA
+unregister_hdmi:
+   platform_driver_unregister(&tegra_hdmi_driver);
 unregister_dc:
platform_driver_unregister(&tegra_dc_driver);
 unregister_host1x:
@@ -228,6 +234,7 @@ module_init(tegra_host1x_init);
 static void __exit tegra_host1x_exit(void)
 {
 #ifdef CONFIG_DRM_TEGRA
+   platform_driver_unregister(&tegra_gr2d_driver);
platform_driver_unregister(&tegra_hdmi_driver);
platform_driver_unregister(&tegra_dc_driver);
 #endif
diff --git a/drivers/gpu/host1x/drm/drm.c b/drivers/gpu/host1x/drm/drm.c
index dbd4808..9f78f52 100644
--- a/drivers/gpu/host1x/drm/drm.c
+++ b/drivers/gpu/host1x/drm/drm.c
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2012 Avionic Design GmbH
- * Copyright (C) 2012 NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (C) 2012-2013 NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -8,13 +8,21 @@
  */
 
 #include 
+#include 
+#include 
+#include 
+#include 
 #include 
 #include 
 #include 
 #include 
 
+#include "cma.h"
+#include "dev.h"
 #include "drm.h"
+#include "host1x_bo.h"
 #include "host1x_client.h"
+#include "syncpt.h"
 
 #define DRIVER_NAME "tegra"
 #define DRIVER_DESC "NVIDIA Tegra graphics"
@@ -77,8 +85,10 @@ static int host1x_parse_dt(struct host1x_drm *host1x)
static const char * const compat[] = {
"nvidia,tegra20-dc",
"nvidia,tegra20-hdmi",
+   "nvidia,tegra20-gr2d",
"nvidia,tegra30-dc",
"nvidia,tegra30-hdmi",
+   "nvidia,tegra30-gr2d",
};
unsigned int i;
int err;
@@ -273,9 +283,24 @@ static int tegra_drm_unload(struct drm_device *drm)
 
 static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
 {
+   struct host1x_drm_file *fpriv;
+
+   fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
+   if (!fpriv)
+   return -ENOMEM;
+
+   INIT_LIST_HEAD(&fpriv->contexts);
+   filp->driver_priv = fpriv;
+
return 0;
 }
 
+static void host1x_drm_context_free(struct host1x_drm_context *context)
+{
+   context->client->ops->close_channel(context);
+   kfree(context);
+}
+
 static void tegra_drm_lastclose(struct drm_device *drm)
 {
struct host1x_drm *host1x = drm->dev_private;
@@ -283,7 +308,222 @@ static void tegra_drm_lastclose(struct drm_device *drm)
drm_fbdev_cma_restore_mode(host1x->fbdev);
 }
 
+static int tegra_drm_ioctl_syncpt_read(struct drm_device *drm, void *data,
+  struct drm_file *file_priv)
+{
+   struct tegra_drm_syncpt_read_args *args = data;
+   struct host1x *host = host1x_get_host(drm->dev);
+   struct host1x_syncpt *sp = host1x_syncpt_get(host, args->id);
+
+   if (!sp)
+   return -EINVAL;
+
+   args->value = host1x_syncpt_read_min(sp);
+   return 0;
+}
+
+static int tegra_drm_ioctl_syncpt_incr(struct drm_device *drm, void *data,
+  struct drm_file *file_priv)
+{
+   struct tegra_drm_syncpt_incr_args *args = data;
+   struct host1x *host = host1x_get_host(drm->dev);
+   struct host1x_syncpt *sp

[PATCHv7 05/10] gpu: host1x: Add debug support

[Terje Bergstrom]

Add support for host1x debugging. Adds debugfs entries, and dumps
channel state to UART in case of stuck job.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/Makefile |1 +
 drivers/gpu/host1x/cdma.c   |4 +
 drivers/gpu/host1x/debug.c  |  210 +
 drivers/gpu/host1x/debug.h  |   51 +
 drivers/gpu/host1x/dev.c|3 +
 drivers/gpu/host1x/dev.h|   42 
 drivers/gpu/host1x/hw/cdma_hw.c |2 +
 drivers/gpu/host1x/hw/channel_hw.c  |   26 ++-
 drivers/gpu/host1x/hw/debug_hw.c|  322 +++
 drivers/gpu/host1x/hw/host1x01.c|2 +
 drivers/gpu/host1x/hw/hw_host1x01_channel.h |   18 ++
 drivers/gpu/host1x/hw/hw_host1x01_sync.h|  115 ++
 drivers/gpu/host1x/hw/hw_host1x01_uclass.h  |6 +
 drivers/gpu/host1x/hw/syncpt_hw.c   |1 +
 drivers/gpu/host1x/syncpt.c |5 +
 15 files changed, 807 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/host1x/debug.c
 create mode 100644 drivers/gpu/host1x/debug.h
 create mode 100644 drivers/gpu/host1x/hw/debug_hw.c

diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index 06a995b..49fd580 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -7,6 +7,7 @@ host1x-y = \
cdma.o \
channel.o \
job.o \
+   debug.o \
hw/host1x01.o
 
 obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/cdma.c b/drivers/gpu/host1x/cdma.c
index 33935de..de72172 100644
--- a/drivers/gpu/host1x/cdma.c
+++ b/drivers/gpu/host1x/cdma.c
@@ -439,6 +439,10 @@ void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, 
u32 op2)
struct push_buffer *pb = &cdma->push_buffer;
u32 slots_free = cdma->slots_free;
 
+   if (host1x_debug_trace_cmdbuf)
+   trace_host1x_cdma_push(dev_name(cdma_to_channel(cdma)->dev),
+  op1, op2);
+
if (slots_free == 0) {
host1x_hw_cdma_flush(host1x, cdma);
slots_free = host1x_cdma_wait_locked(cdma,
diff --git a/drivers/gpu/host1x/debug.c b/drivers/gpu/host1x/debug.c
new file mode 100644
index 000..cb8aff9
--- /dev/null
+++ b/drivers/gpu/host1x/debug.c
@@ -0,0 +1,210 @@
+/*
+ * Copyright (C) 2010 Google, Inc.
+ * Author: Erik Gilling 
+ *
+ * Copyright (C) 2011-2013 NVIDIA Corporation
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "dev.h"
+#include "debug.h"
+#include "channel.h"
+
+unsigned int host1x_debug_trace_cmdbuf;
+
+static pid_t host1x_debug_force_timeout_pid;
+static u32 host1x_debug_force_timeout_val;
+static u32 host1x_debug_force_timeout_channel;
+
+void host1x_debug_output(struct output *o, const char *fmt, ...)
+{
+   va_list args;
+   int len;
+
+   va_start(args, fmt);
+   len = vsnprintf(o->buf, sizeof(o->buf), fmt, args);
+   va_end(args);
+   o->fn(o->ctx, o->buf, len);
+}
+
+static int show_channels(struct host1x_channel *ch, void *data, bool show_fifo)
+{
+   struct host1x *m = host1x_get_host(ch->dev);
+   struct output *o = data;
+
+   mutex_lock(&ch->reflock);
+   if (ch->refcount) {
+   mutex_lock(&ch->cdma.lock);
+   if (show_fifo)
+   host1x_hw_show_channel_fifo(m, ch, o);
+   host1x_hw_show_channel_cdma(m, ch, o);
+   mutex_unlock(&ch->cdma.lock);
+   }
+   mutex_unlock(&ch->reflock);
+
+   return 0;
+}
+
+static void show_syncpts(struct host1x *m, struct output *o)
+{
+   int i;
+   host1x_debug_output(o, " syncpts \n");
+   for (i = 0; i < host1x_syncpt_nb_pts(m); i++) {
+   u32 max = host1x_syncpt_read_max(m->syncpt + i);
+   u32 min = host1x_syncpt_load(m->syncpt + i);
+   if (!min && !max)
+   continue;
+   host1x_debug_output(o, "id %d (%s) min %d max %d\n",
+   i, m->syncpt[i].name, min, max);
+   }
+
+   for (i = 0; i < host1x_syncpt_nb_bases(m); i++) {
+   u32 base_val;
+   base_val = host1x_syncpt_load_wait_base(m->syncpt + i);
+   if (base_val)
+   host1x_debug_output(o, "waitbase id %d val %d\n", i,
+   base_val);
+   }
+
+   host1x_deb

[Bug 57875] Second Life viewer bad rendering with git-ec83535

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=57875

--- Comment #26 from Marek Olšák  ---
Stefan> We can also go the easy way and only advertise ARB_depth_clamp if the
user is Wine. It would work in the same way we disable HyperZ for compositors.
I'm assuming Wine can be detected as easily as reading
program_invocation_short_name.

-- 
You are receiving this mail because:
You are the assignee for the bug.
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[Bug 60879] X11 can't start with acceleration enabled

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=60879

--- Comment #13 from Michel Dänzer  ---
Created attachment 76481
  --> https://bugs.freedesktop.org/attachment.cgi?id=76481&action=edit
Mesa test patch

Does it work better with this Mesa patch?

-- 
You are receiving this mail because:
You are the assignee for the bug.
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: OOPS with 3.9.0rc2+

[Borislav Petkov]

+ dri-devel.

On Wed, Mar 13, 2013 at 02:34:31PM +0100, Rolf Offermanns wrote:
> Hi,
> 
> I get a kernel oops / panic with a 3.9.0rc2+ kernel (git from 2h ago) on my 
> Sony
> Vaio laptop. It happened with rc1, too.
> 
> Unfortunately I only have a screen photo as nothing gets written to the system
> log.
> 
> Here is a transcript:
> -[cut here]
> WARNING: at linux-2.6/drivers/gpu/drm/drm.crtc.c:84 
> drm_warn_on_modeset_not_all_locked+0x80/0x90 [drm]()
> Hardware name: VPCF23A9E
> Modules linked in: [...]
> Pid: 1894, comm: plasma-desktop Tainted: G   D W  3.9.0-rc2+ #1
> Call Trace:
> warn_slowpath_common+0x7f/0xc0
>  warn_slowpath_null+0x1a/020
>  drm_warn_on_modeset_not_all_locked+0x80/0x90 [drm]
>  drm_fb_helper_restore_fbdev_mode+0x1c/0x80 [drm_kms_helper]
>  drm_fb_helper_force_kernel_mode+0x4d/0xa0 [drm_kms_helper]
>  drm_fb_helper_panic+0x2b/0x30 [drm_kms_helper]
>  notifier_call_chain+0x4d/0x70
>  __atomic_notifier_call_chain+0x12/0x20
>  atomic_notifier_call_chain+0x16/0x20
>  panic+0xef/0x1d0
>  oops_end+0xe2/0xf0
>  die+0x58/0x90
>  do_trap+0x6b/0170
>  ? __atomic_notifier_call_chain+0x12/0x20
>  do_divide_error+0x96/0xa0
>  ? intel_pstate_timer_func+0x15d/0x380
>  ? check_preempt_curr+0x75/0xa0
>  ? ttwu_do_wakeup+0x2c/0xf0
>  divide_error+0x1e/0x30
>  ? intel_pstate_timer_func+0x15d/0x380
>  ? intel_pstate_timer_func+0xbc/0x380
>  ? pid_param_set+0x120/0x120
>  call_timer_fn+0x3a/0x120
>  ? pid_param_set+0x120/0x120
>  run_timer_softirq+0x1fe/0x2b0
>  __do_softirq+0xe0/0x230
>  irq_exit+0xa5/0xb0
>  smp_apic_timer_interrupt+0x6e/0x99
>  apic_timer_interrupt+0x6d/0x80
>   ? sysret_audit+0x17/0x21
>  -[ end trace  ]--
>  NOHZ: local_softirq_pending 282
> 
> 
>  Is this of any use at all? How can I help track this down? Shall I attach a
>  serial console (USB only)?
> 
> lspci:
> 
> 00:00.0 Host bridge: Intel Corporation 2nd Generation Core Processor Family 
> DRAM Controller (rev 09)
> 00:01.0 PCI bridge: Intel Corporation Xeon E3-1200/2nd Generation Core 
> Processor Family PCI Express Root Port (rev 09)
> 00:16.0 Communication controller: Intel Corporation 6 Series/C200 Series 
> Chipset Family MEI Controller #1 (rev 04)
> 00:1a.0 USB controller: Intel Corporation 6 Series/C200 Series Chipset Family 
> USB Enhanced Host Controller #2 (rev 04)
> 00:1b.0 Audio device: Intel Corporation 6 Series/C200 Series Chipset Family 
> High Definition Audio Controller (rev 04)
> 00:1c.0 PCI bridge: Intel Corporation 6 Series/C200 Series Chipset Family PCI 
> Express Root Port 1 (rev b4)
> 00:1c.1 PCI bridge: Intel Corporation 6 Series/C200 Series Chipset Family PCI 
> Express Root Port 2 (rev b4)
> 00:1c.2 PCI bridge: Intel Corporation 6 Series/C200 Series Chipset Family PCI 
> Express Root Port 3 (rev b4)
> 00:1c.3 PCI bridge: Intel Corporation 6 Series/C200 Series Chipset Family PCI 
> Express Root Port 4 (rev b4)
> 00:1d.0 USB controller: Intel Corporation 6 Series/C200 Series Chipset Family 
> USB Enhanced Host Controller #1 (rev 04)
> 00:1f.0 ISA bridge: Intel Corporation HM65 Express Chipset Family LPC 
> Controller (rev 04)
> 00:1f.2 SATA controller: Intel Corporation 6 Series/C200 Series Chipset 
> Family 6 port SATA AHCI Controller (rev 04)
> 00:1f.3 SMBus: Intel Corporation 6 Series/C200 Series Chipset Family SMBus 
> Controller (rev 04)
> 01:00.0 VGA compatible controller: NVIDIA Corporation GF108 [GeForce GT 540M] 
> (rev a1)
> 01:00.1 Audio device: NVIDIA Corporation GF108 High Definition Audio 
> Controller (rev a1)
> 02:00.0 Network controller: Atheros Communications Inc. AR9485 Wireless 
> Network Adapter (rev 01)
> 03:00.0 SD Host controller: Ricoh Co Ltd PCIe SDXC/MMC Host Controller (rev 
> 09) 03:00.1 System peripheral: Ricoh Co Ltd Device e232 (rev 06)
> 03:00.3 FireWire (IEEE 1394): Ricoh Co Ltd R5C832 PCIe IEEE 1394 Controller 
> (rev 05)
> 04:00.0 USB controller: NEC Corporation uPD720200 USB 3.0 Host Controller 
> (rev 04)
> 05:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168 PCI 
> Express Gigabit Ethernet controller (rev 06)
> 
> 
> cpuinfo:
> processor   : 0-7
> vendor_id   : GenuineIntel
> cpu family  : 6
> model   : 42
> model name  : Intel(R) Core(TM) i7-2670QM CPU @ 2.20GHz
> stepping: 7
> microcode   : 0x28
> cpu MHz : 800.000
> cache size  : 6144 KB
> physical id : 0
> siblings: 8
> core id : 0
> cpu cores   : 4
> apicid  : 0
> initial apicid  : 0
> fpu : yes
> fpu_exception   : yes
> cpuid level : 13
> wp  : yes
> flags   : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca 
> cmov
> pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx rdtscp lm
> constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc
> aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16
> xtpr pdcm pcid sse4_1 sse4_2 x2apic popcnt tsc_deadline_timer aes xsave a

[PATCH 1/2] drm/radeon/benchmark: make sure bo blit copy exists before using it

[alexdeucher]

From: Alex Deucher 

Fixes a segfault on asics without a blit callback.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=62239

Signed-off-by: Alex Deucher 
Cc: sta...@vger.kernel.org
---
 drivers/gpu/drm/radeon/radeon_benchmark.c |   16 +---
 1 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_benchmark.c 
b/drivers/gpu/drm/radeon/radeon_benchmark.c
index bedda9c..a2f0c24 100644
--- a/drivers/gpu/drm/radeon/radeon_benchmark.c
+++ b/drivers/gpu/drm/radeon/radeon_benchmark.c
@@ -135,13 +135,15 @@ static void radeon_benchmark_move(struct radeon_device 
*rdev, unsigned size,
 sdomain, ddomain, "dma");
}
 
-   time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
-   RADEON_BENCHMARK_COPY_BLIT, n);
-   if (time < 0)
-   goto out_cleanup;
-   if (time > 0)
-   radeon_benchmark_log_results(n, size, time,
-sdomain, ddomain, "blit");
+   if (rdev->asic->copy.blit) {
+   time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
+   RADEON_BENCHMARK_COPY_BLIT, n);
+   if (time < 0)
+   goto out_cleanup;
+   if (time > 0)
+   radeon_benchmark_log_results(n, size, time,
+sdomain, ddomain, "blit");
+   }
 
 out_cleanup:
if (sobj) {
-- 
1.7.7.5

___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH 2/2] drm/radeon/benchmark: allow same domains for dma copy

[alexdeucher]

From: Alex Deucher 

Remove old comment and allow benchmarking moves within the
same memory domain for both dma and blit methods.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/radeon_benchmark.c |5 +
 1 files changed, 1 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_benchmark.c 
b/drivers/gpu/drm/radeon/radeon_benchmark.c
index a2f0c24..6e05a2e 100644
--- a/drivers/gpu/drm/radeon/radeon_benchmark.c
+++ b/drivers/gpu/drm/radeon/radeon_benchmark.c
@@ -122,10 +122,7 @@ static void radeon_benchmark_move(struct radeon_device 
*rdev, unsigned size,
goto out_cleanup;
}
 
-   /* r100 doesn't have dma engine so skip the test */
-   /* also, VRAM-to-VRAM test doesn't make much sense for DMA */
-   /* skip it as well if domains are the same */
-   if ((rdev->asic->copy.dma) && (sdomain != ddomain)) {
+   if (rdev->asic->copy.dma) {
time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
RADEON_BENCHMARK_COPY_DMA, n);
if (time < 0)
-- 
1.7.7.5

___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH 1/2] drm/radeon/benchmark: make sure bo blit copy exists before using it

[Michel Dänzer]

On Mit, 2013-03-13 at 12:38 -0400, alexdeuc...@gmail.com wrote: 
> From: Alex Deucher 
> 
> Fixes a segfault on asics without a blit callback.
> 
> Fixes:
> https://bugs.freedesktop.org/show_bug.cgi?id=62239
> 
> Signed-off-by: Alex Deucher 
> Cc: sta...@vger.kernel.org

For the series:

Reviewed-by: Michel Dänzer 


-- 
Earthling Michel Dänzer   |   http://www.amd.com
Libre software enthusiast |  Debian, X and DRI developer
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH] drm/omap: change "!CONFIG_FB_OMAP2" to "!FB_OMAP2"

[Paul Bolle]

Signed-off-by: Paul Bolle 
---
Untested. Perhaps the first test that people with access to the relevant
hardware might do, is to test _before applying this patch_ with FB_OMAP2
set. Perhaps this negative dependency isn't needed at all. Or is it
obvious?

 drivers/gpu/drm/omapdrm/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/omapdrm/Kconfig b/drivers/gpu/drm/omapdrm/Kconfig
index 09f65dc..45875a0 100644
--- a/drivers/gpu/drm/omapdrm/Kconfig
+++ b/drivers/gpu/drm/omapdrm/Kconfig
@@ -1,7 +1,7 @@
 
 config DRM_OMAP
tristate "OMAP DRM"
-   depends on DRM && !CONFIG_FB_OMAP2
+   depends on DRM && !FB_OMAP2
depends on ARCH_OMAP2PLUS || ARCH_MULTIPLATFORM
depends on OMAP2_DSS
select DRM_KMS_HELPER
-- 
1.7.11.7

___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH] drm/i915: use do_div() as needed in debugfs code

[Daniel Vetter]

On Mon, Mar 11, 2013 at 10:46:31PM -0700, Kees Cook wrote:
> This replaces the open-coded divisions in the debugfs code by calls
> to do_div().
> 
> Signed-off-by: Kees Cook 
> Cc: Daniel Vetter 

Squashed into the debugfs patch which introduced this regression, thanks
for the quick fixup.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c |   12 ++--
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index d86c304..6f3cbf8 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1814,9 +1814,9 @@ i915_max_freq_set(void *data, u64 val)
>   /*
>* Turbo will still be enabled, but won't go above the set value.
>*/
> - dev_priv->rps.max_delay = val / GT_FREQUENCY_MULTIPLIER;
> -
> - gen6_set_rps(dev, val / GT_FREQUENCY_MULTIPLIER);
> + do_div(val, GT_FREQUENCY_MULTIPLIER);
> + dev_priv->rps.max_delay = val;
> + gen6_set_rps(dev, val);
>   mutex_unlock(&dev_priv->rps.hw_lock);
>  
>   return 0;
> @@ -1865,9 +1865,9 @@ i915_min_freq_set(void *data, u64 val)
>   /*
>* Turbo will still be enabled, but won't go below the set value.
>*/
> - dev_priv->rps.min_delay = val / GT_FREQUENCY_MULTIPLIER;
> -
> - gen6_set_rps(dev, val / GT_FREQUENCY_MULTIPLIER);
> + do_div(val, GT_FREQUENCY_MULTIPLIER);
> + dev_priv->rps.min_delay = val;
> + gen6_set_rps(dev, val);
>   mutex_unlock(&dev_priv->rps.hw_lock);
>  
>   return 0;
> -- 
> 1.7.9.5
> 
> 
> -- 
> Kees Cook
> Chrome OS Security

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: linux-next: build failure after merge of the final tree (drm-intel tree related)

[Daniel Vetter]

On Tue, Mar 12, 2013 at 03:22:26PM +1100, Stephen Rothwell wrote:
> Hi all,
> 
> After merging the final tree, today's linux-next build (i386 defconfig)
> failed like this:
> 
> drivers/built-in.o: In function `i915_min_freq_set':
> i915_debugfs.c:(.text+0xb1adc): undefined reference to `__udivdi3'
> drivers/built-in.o: In function `i915_max_freq_set':
> i915_debugfs.c:(.text+0xb1bac): undefined reference to `__udivdi3'
> 
> Caused by commit 2389cc500686 ("drm/i915: use simple attribute in debugfs
> routines") from the drm-intel tree.
> 
> I have reverted that commit for today.

Should be fixed now, thanks for the report (and my apologies for the
little screw-up).
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH v3] drm/i915: bounds check execbuffer relocation count

[Daniel Vetter]

On Tue, Mar 12, 2013 at 09:07:46AM +, Chris Wilson wrote:
> On Mon, Mar 11, 2013 at 05:31:45PM -0700, Kees Cook wrote:
> > It is possible to wrap the counter used to allocate the buffer for
> > relocation copies. This could lead to heap writing overflows.
> > 
> > CVE-2013-0913
> > 
> > v3: collapse test, improve comment
> > v2: move check into validate_exec_list
> > 
> > Signed-off-by: Kees Cook 
> > Reported-by: Pinkie Pie
> > Cc: sta...@vger.kernel.org
> 
> Looks good to me. The only bikeshed that remains is whether we should
> just collapse the two variables into one, but the current 'max - count'
> is more idiomatic and so preferrable.
> Reviewed-by: Chris Wilson 

Picked up for -fixes, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[Bug 60879] X11 can't start with acceleration enabled

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=60879

--- Comment #14 from Hristo Venev  ---
Sadly this patch doesn't fix this bug. egltri_screen does not render anything
and does not cause GPU reset. However eglgears_screen and Xorg cause the GPU to
reset. Without the patch it's the same.

-- 
You are receiving this mail because:
You are the assignee for the bug.
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[Bug 57875] Second Life viewer bad rendering with git-ec83535

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=57875

--- Comment #27 from Stefan Dösinger  ---
This is a bad idea because Wine can also run OpenGL applications, which might
use depth_clamp in a way that doesn't work on r300g.

Feel free to revert the patch for now. Implementing MESA_depth_clip is fairly
high up on my todo list, but even higher priorities kept interfering.

If you have the time and resources to implement my extension proposal yourself
that'd make me extra-happy of course :-)

-- 
You are receiving this mail because:
You are the assignee for the bug.
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[Bug 62311] New: (kernel) memory leak

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=62311

  Priority: medium
Bug ID: 62311
  Assignee: dri-devel@lists.freedesktop.org
   Summary: (kernel) memory leak
  Severity: major
Classification: Unclassified
OS: Linux (All)
  Reporter: f...@won2.de
  Hardware: x86-64 (AMD64)
Status: NEW
   Version: unspecified
 Component: DRM/Radeon
   Product: DRI

I'm experiencing a (kernel) memory leak for several months now and it seems to
got worse. I found a bug on
https://bugzilla.kernel.org/show_bug.cgi?id=43751#c11 but no solution yet
(disregard command 12, it's not true ;)). I asked on IRC #fdo and #radeon and
got told to file a bug here on fdo.

At some point I always run out of main memory and got lots of kernel messages
like those:
[drm:radeon_gem_object_create] *ERROR* Failed to allocate GEM object (4096, 6,
4096, -12)
[TTM] Out of kernel memory
[TTM] Out of kernel memory
Repeating over and over again. I'm currently running radeon driver 7.1.0, mesa
9.0.1, xorg-server 1.13.1, KDE 4.9.5 (tried with compositing enabled and
disabled).

I don't know what to do or how to debug this, could anybody please help?

-- 
You are receiving this mail because:
You are the assignee for the bug.
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[Bug 60802] Corruption with DMA ring on cayman

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=60802

--- Comment #44 from vincent  ---
I think I have similar issue with Unigine Heaven 3.0 :

http://people.freedesktop.org/~vlj/2.jpg
http://people.freedesktop.org/~vlj/3.jpg

A webgl demo that has the issue too is at http://www.findyourwaytooz.com/

It appeared with Kernel 3.8 too. Kernel 3.7.9 did have this.

With a previous Mesa there was the same kind of issue with Lightmark, but with
latest mesa it is gone ; maybe the remaining corruption is related to
compressed textures ?

-- 
You are receiving this mail because:
You are the assignee for the bug.
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[Bug 60802] Corruption with DMA ring on cayman

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=60802

--- Comment #45 from Alex Deucher  ---
(In reply to comment #44)
> 
> It appeared with Kernel 3.8 too. Kernel 3.7.9 did have this.

The DMA rings are only available on 3.8 kernels.

-- 
You are receiving this mail because:
You are the assignee for the bug.
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[Bug 60802] Corruption with DMA ring on cayman

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=60802

--- Comment #46 from Alexandre Demers  ---
(In reply to comment #44)
> I think I have similar issue with Unigine Heaven 3.0 :
> 
> http://people.freedesktop.org/~vlj/2.jpg
> http://people.freedesktop.org/~vlj/3.jpg
> 
> A webgl demo that has the issue too is at http://www.findyourwaytooz.com/
> 
> It appeared with Kernel 3.8 too. Kernel 3.7.9 did have this.
> 
> With a previous Mesa there was the same kind of issue with Lightmark, but
> with latest mesa it is gone ; maybe the remaining corruption is related to
> compressed textures ?

Your screenshots are very similar to what I see with other Unigine's demos.
Your webgl demo also seems to exhibit the same corruption issue. I would say
you are right about some specific kind of textures not being correctly
rendered, while others are. What kind exactly is to be determined.

-- 
You are receiving this mail because:
You are the assignee for the bug.
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue

[Joonyoung Shim]

On 03/13/2013 07:53 PM, Inki Dae wrote:

-Original Message-
From: Joonyoung Shim [mailto:jy0922.s...@samsung.com]
Sent: Wednesday, March 13, 2013 7:28 PM
To: Inki Dae
Cc:airl...@linux.ie;dri-devel@lists.freedesktop.org;
kyungmin.p...@samsung.com;sw0312@samsung.com; 'YoungJun Cho'
Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue

On 03/13/2013 07:14 PM, Inki Dae wrote:

-Original Message-
From: Joonyoung Shim [mailto:jy0922.s...@samsung.com]
Sent: Wednesday, March 13, 2013 6:53 PM
To: Inki Dae
Cc:airl...@linux.ie;dri-devel@lists.freedesktop.org;
kyungmin.p...@samsung.com;sw0312@samsung.com; YoungJun Cho
Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue

On 03/13/2013 06:04 PM, Inki Dae wrote:

From: YoungJun Cho

This patch fixes G2D core mulfunctioning issue once g2d dma is

started.

Without 'DMA_HOLD_CMD_REG' register setting, there is only one

interrupt

after the execution to all command lists have been completed. And that
induces watchdog. So this patch sets 'LIST_HOLD' command to the

register

so that command execution interrupt can be occured whenever each

command

list execution is finished.

No, this problem occurs as GCF bit of INTEN_REG register is enabled
always. If wants to raise interrupt immediately after a command list
finished, GCF bit should be enabled, and it also needs to enable of

LIST

Hold bit of DMA_HOLD_CMD_REG register. If one of the two is missed out,
g2d hardware will not work normally sometimes.

Right, these two things(LIST HOLD command and GCF interrupt enabling)

should

be pair.


This patch is just workaround and it can happen performance issue
because g2d hardware stops a moment whenever a command list finished.

So, we need the way which enable GCF bit only when a command list
completion interrupt needs.


Agree. How about this? If node->event isn't NULL then set GCF to INTEN
register in g2d_dma_start(). For this way, I already mentioned through
internal email thread.

No, Once set GCF, it is set on end. Who can clear it?


Maybe you say that g2d_dma_start() is called by exec ioctl so the GCF bit
could be set by only last node.  For this, We need to look into dma-driven
command processing. Assume that two more command lists exist and they are
executed at once. Then we CAN NOT GET each node while dma operation because
the command lists of each node are executed by dma at once.

On other words, there is no way to enable GCF bit only in case that a
command list completion interrupt is needed because the need is from user
side.


I requested to Youngjun Cho whether it is possible to work and to insert
a command to set GCF bit of INTEN in command list and he said it is
possiable and works because clears GCF bit in irq handler if command
list completion interrupt occurs.


So I think we need some policy for g2d driver. For example, if user wants to
get event to each node, all nodes from the user should be operated with GCF
bit otherwise without GCF bit.


Actually now there is no way to inform completion of a set of command
lists to user on async mode. So, i think completion event of a set of
command lists needs also.

Thanks.

  
Any other idea?



Thanks.


Signed-off-by: YoungJun Cho
Signed-off-by: Inki Dae
Signed-off-by: Kyungmin Park
---
drivers/gpu/drm/exynos/exynos_drm_g2d.c |   13 -
1 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c

b/drivers/gpu/drm/exynos/exynos_drm_g2d.c

index 095520f..91bc4cc 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -82,7 +82,7 @@
#define G2D_DMA_LIST_DONE_COUNT_OFFSET  17

/* G2D_DMA_HOLD_CMD */
-#define G2D_USET_HOLD  (1 << 2)
+#define G2D_USER_HOLD  (1 << 2)
#define G2D_LIST_HOLD   (1 << 1)
#define G2D_BITBLT_HOLD (1 << 0)

@@ -863,10 +863,13 @@ int exynos_g2d_set_cmdlist_ioctl(struct

drm_device

*drm_dev, void *data,

cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
cmdlist->data[cmdlist->last++] = 0;

-   if (node->event) {
-   cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
-   cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
-   }
+   /*
+* 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
+* if user wants G2D interrupt event once each command list or
+* BitBLT command execution is finished.
+*/
+   cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
+   cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;

/* Check size of cmdlist: last 2 is about G2D_BITBLT_START

*/

size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2

+ 2;


___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[Bug 60802] Corruption with DMA ring on cayman

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=60802

--- Comment #47 from Alexandre Demers  ---
So I played with libtxc (removed it in fact) and tested some demos again. For
those that were not completely relying on libtxc, I observed the following:
- textures not related to libtxc were displayed correctly
- textures related to libtxc were not displayed AND were corresponding to the
corrupted textures seen when libtxc was available.

-- 
You are receiving this mail because:
You are the assignee for the bug.
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[Bug 60802] Corruption with DMA ring on cayman

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=60802

--- Comment #48 from Anthony Waters  ---
I looked into this a little bit and the issue appears to be within
evergreen_dma_copy_tile within evergreen_state.c.  It looks like when bank_h is
0 it causes the texture to appear bad, but bank_h is allowed to be 0 so I
believe the lines
cs->buf[cs->cdw++] = (detile << 31) | (array_mode << 27) |
(lbpp << 24) | (bank_h << 21) |
(bank_w << 18) | (mt_aspect << 16);
have the incorrect offsets, but I'm not 100% sure at the moment.

-- 
You are receiving this mail because:
You are the assignee for the bug.
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

[Bug 60802] Corruption with DMA ring on cayman

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=60802

--- Comment #49 from Anthony Waters  ---
Looked into it a bit more and it appears that when bpp is 16 there is a bad
texture, I'll see if I can figure it out more later on.

-- 
You are receiving this mail because:
You are the assignee for the bug.
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

RE: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue

[Inki Dae]

> -Original Message-
> From: Joonyoung Shim [mailto:jy0922.s...@samsung.com]
> Sent: Thursday, March 14, 2013 11:30 AM
> To: Inki Dae
> Cc: airl...@linux.ie; dri-devel@lists.freedesktop.org;
> kyungmin.p...@samsung.com; sw0312@samsung.com; 'YoungJun Cho'
> Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue
> 
> On 03/13/2013 07:53 PM, Inki Dae wrote:
> >> -Original Message-
> >> From: Joonyoung Shim [mailto:jy0922.s...@samsung.com]
> >> Sent: Wednesday, March 13, 2013 7:28 PM
> >> To: Inki Dae
> >> Cc:airl...@linux.ie;dri-devel@lists.freedesktop.org;
> >> kyungmin.p...@samsung.com;sw0312@samsung.com; 'YoungJun Cho'
> >> Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue
> >>
> >> On 03/13/2013 07:14 PM, Inki Dae wrote:
>  -Original Message-
>  From: Joonyoung Shim [mailto:jy0922.s...@samsung.com]
>  Sent: Wednesday, March 13, 2013 6:53 PM
>  To: Inki Dae
>  Cc:airl...@linux.ie;dri-devel@lists.freedesktop.org;
>  kyungmin.p...@samsung.com;sw0312@samsung.com; YoungJun Cho
>  Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning
> issue
> 
>  On 03/13/2013 06:04 PM, Inki Dae wrote:
> > From: YoungJun Cho
> >
> > This patch fixes G2D core mulfunctioning issue once g2d dma is
> > started.
> > Without 'DMA_HOLD_CMD_REG' register setting, there is only one
> >> interrupt
> > after the execution to all command lists have been completed. And
> that
> > induces watchdog. So this patch sets 'LIST_HOLD' command to the
> >> register
> > so that command execution interrupt can be occured whenever each
> >> command
> > list execution is finished.
>  No, this problem occurs as GCF bit of INTEN_REG register is enabled
>  always. If wants to raise interrupt immediately after a command list
>  finished, GCF bit should be enabled, and it also needs to enable of
> >> LIST
>  Hold bit of DMA_HOLD_CMD_REG register. If one of the two is missed
> out,
>  g2d hardware will not work normally sometimes.
> >>> Right, these two things(LIST HOLD command and GCF interrupt enabling)
> >> should
> >>> be pair.
> >>>
>  This patch is just workaround and it can happen performance issue
>  because g2d hardware stops a moment whenever a command list finished.
> 
>  So, we need the way which enable GCF bit only when a command list
>  completion interrupt needs.
> 
> >>> Agree. How about this? If node->event isn't NULL then set GCF to INTEN
> >>> register in g2d_dma_start(). For this way, I already mentioned through
> >>> internal email thread.
> >> No, Once set GCF, it is set on end. Who can clear it?
> >>
> > Maybe you say that g2d_dma_start() is called by exec ioctl so the GCF
> bit
> > could be set by only last node.  For this, We need to look into dma-
> driven
> > command processing. Assume that two more command lists exist and they
> are
> > executed at once. Then we CAN NOT GET each node while dma operation
> because
> > the command lists of each node are executed by dma at once.
> >
> > On other words, there is no way to enable GCF bit only in case that a
> > command list completion interrupt is needed because the need is from
> user
> > side.
> 
> I requested to Youngjun Cho whether it is possible to work and to insert
> a command to set GCF bit of INTEN in command list and he said it is
> possiable and works because clears GCF bit in irq handler if command
> list completion interrupt occurs.
> 

Checked it out. It seems that the g2d dma could also access and control
other registers(not rendering relevant ones) in the command list. So we
could implement this approach that user can get event to each command list
completion more simply.

With set_cmdlist ioctl with event, it makes GCF bit to be set to
node->cmdlist and only ACF bit without event. Afterwards, whenever each
command list is completed, G2D Core can aware of the interrupt source
enabled(GCF or ACF) so interrupt  will occurs properly.

Mr. Cho, please implement this approach and test it.


> > So I think we need some policy for g2d driver. For example, if user
> wants to
> > get event to each node, all nodes from the user should be operated with
> GCF
> > bit otherwise without GCF bit.
> 
> Actually now there is no way to inform completion of a set of command
> lists to user on async mode. So, i think completion event of a set of
> command lists needs also.
> 

I think it's enough to have only event to each command list because user
wants to do something only whenever one bitblt command is completed. Maybe
there is no use case to all command lists. Anyway, let's implement the above
approach first. :)

> Thanks.
> 
> >
> > Any other idea?
> >
>  Thanks.
> 
> > Signed-off-by: YoungJun Cho
> > Signed-off-by: Inki Dae
> > Signed-off-by: Kyungmin Park
> > ---
> > drivers/gpu/drm/exynos/exynos_drm_g2d.c |   13 -
> > 1 files changed, 8

RE: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue

[YoungJun Cho]

On Mar 14, 2013 1:59 PM, "Inki Dae"  wrote:
>
>
>
> > -Original Message-
> > From: Joonyoung Shim [mailto:jy0922.s...@samsung.com]
> > Sent: Thursday, March 14, 2013 11:30 AM
> > To: Inki Dae
> > Cc: airl...@linux.ie; dri-devel@lists.freedesktop.org;
> > kyungmin.p...@samsung.com; sw0312@samsung.com; 'YoungJun Cho'
> > Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue
> >
> > On 03/13/2013 07:53 PM, Inki Dae wrote:
> > >> -Original Message-
> > >> From: Joonyoung Shim [mailto:jy0922.s...@samsung.com]
> > >> Sent: Wednesday, March 13, 2013 7:28 PM
> > >> To: Inki Dae
> > >> Cc:airl...@linux.ie;dri-devel@lists.freedesktop.org;
> > >> kyungmin.p...@samsung.com;sw0312@samsung.com; 'YoungJun Cho'
> > >> Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning
issue
> > >>
> > >> On 03/13/2013 07:14 PM, Inki Dae wrote:
> >  -Original Message-
> >  From: Joonyoung Shim [mailto:jy0922.s...@samsung.com]
> >  Sent: Wednesday, March 13, 2013 6:53 PM
> >  To: Inki Dae
> >  Cc:airl...@linux.ie;dri-devel@lists.freedesktop.org;
> >  kyungmin.p...@samsung.com;sw0312@samsung.com; YoungJun Cho
> >  Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning
> > issue
> > 
> >  On 03/13/2013 06:04 PM, Inki Dae wrote:
> > > From: YoungJun Cho
> > >
> > > This patch fixes G2D core mulfunctioning issue once g2d dma is
> > > started.
> > > Without 'DMA_HOLD_CMD_REG' register setting, there is only one
> > >> interrupt
> > > after the execution to all command lists have been completed. And
> > that
> > > induces watchdog. So this patch sets 'LIST_HOLD' command to the
> > >> register
> > > so that command execution interrupt can be occured whenever each
> > >> command
> > > list execution is finished.
> >  No, this problem occurs as GCF bit of INTEN_REG register is enabled
> >  always. If wants to raise interrupt immediately after a command
list
> >  finished, GCF bit should be enabled, and it also needs to enable of
> > >> LIST
> >  Hold bit of DMA_HOLD_CMD_REG register. If one of the two is missed
> > out,
> >  g2d hardware will not work normally sometimes.
> > >>> Right, these two things(LIST HOLD command and GCF interrupt
enabling)
> > >> should
> > >>> be pair.
> > >>>
> >  This patch is just workaround and it can happen performance issue
> >  because g2d hardware stops a moment whenever a command list
finished.
> > 
> >  So, we need the way which enable GCF bit only when a command list
> >  completion interrupt needs.
> > 
> > >>> Agree. How about this? If node->event isn't NULL then set GCF to
INTEN
> > >>> register in g2d_dma_start(). For this way, I already mentioned
through
> > >>> internal email thread.
> > >> No, Once set GCF, it is set on end. Who can clear it?
> > >>
> > > Maybe you say that g2d_dma_start() is called by exec ioctl so the GCF
> > bit
> > > could be set by only last node.  For this, We need to look into dma-
> > driven
> > > command processing. Assume that two more command lists exist and they
> > are
> > > executed at once. Then we CAN NOT GET each node while dma operation
> > because
> > > the command lists of each node are executed by dma at once.
> > >
> > > On other words, there is no way to enable GCF bit only in case that a
> > > command list completion interrupt is needed because the need is from
> > user
> > > side.
> >
> > I requested to Youngjun Cho whether it is possible to work and to insert
> > a command to set GCF bit of INTEN in command list and he said it is
> > possiable and works because clears GCF bit in irq handler if command
> > list completion interrupt occurs.
> >
>
> Checked it out. It seems that the g2d dma could also access and control
> other registers(not rendering relevant ones) in the command list. So we
> could implement this approach that user can get event to each command list
> completion more simply.
>
> With set_cmdlist ioctl with event, it makes GCF bit to be set to
> node->cmdlist and only ACF bit without event. Afterwards, whenever each
> command list is completed, G2D Core can aware of the interrupt source
> enabled(GCF or ACF) so interrupt  will occurs properly.
>
> Mr. Cho, please implement this approach and test it.
>

I tested it and checked working well.

I'll send patch again.

Thank you

Best regards YJ

>
> > > So I think we need some policy for g2d driver. For example, if user
> > wants to
> > > get event to each node, all nodes from the user should be operated
with
> > GCF
> > > bit otherwise without GCF bit.
> >
> > Actually now there is no way to inform completion of a set of command
> > lists to user on async mode. So, i think completion event of a set of
> > command lists needs also.
> >
>
> I think it's enough to have only event to each command list because user
> wants to do something only whenever one bitblt command is completed. Maybe
> there is no use case to all c

How to manage OMAP display drivers in the future

[Tomi Valkeinen]

Hi Dave,

I'm writing this mail to get some ideas how we should manage OMAP's
display drivers in the future.

As a short intro, we have the following players around:

omapdss - omapdss handles the DSS (display subsystem) hardware. omapdss
doesn't do any buffer management or expose any userspace API (except a
few sysfs files), so it doesn't do anything by itself.
(drivers/video/omap2/dss/)

panel drivers - Drivers for various panel models. The panel drivers use
omapdss API to manage the video bus. (drivers/video/omap2/displays/)

omapfb - Framebuffer driver, uses omapdss to handle the HW.
(drivers/video/omap2/omapfb/)

omap_vout - V4L2 driver for showing video, uses omapdss to handle the
HW. (drivers/media/platform/omap/)

omapdrm - DRM driver, uses omapdss to handle the HW.
(drivers/gpu/drm/omapdrm/)

omapdss and the panel drivers form the lowest level layer. omapfb and
omap_vout can be used at the same time, but omapdrm must be used alone,
without omapfb or omap_vout.

omapfb and omap_vout are not much developed anymore, even though they
are still commonly used. Most of the development happens in omapdss,
panel drivers and omapdrm.

So that's what we have now. In the distant future I see omapfb and
omap_vout disappear totally, the panel drivers would be made generic
using Common Display Framework, and omapdss and omapdrm would more or
less be merged together. However, all that is still far away, and we
need some plan to go forward for now.

Most pressing question is how to get OMAP display patches merged. It
seems that there's not really an fbdev maintainer for the time being,
and fbdev tree has been the route for omapdss, panels and omapfb in the
past. Now that omapdrm is the new main driver for omap display, fbdev
would be somewhat wrong in any case.

Dave, how would you feel about merging changes to all the above
components through DRM tree? Merging all the above together would be the
easiest way, as the changes may have dependencies to each other.

As I said, most of the development should be in omapdss, panels and
omapdrm. There would be an occasional fix for omapfb and omap_vout, or
small changes when omapdss changes require changes elsewhere.

 Tomi

[PATCH 0/7] Consider G2D hardware restrictions.

[Inki Dae]

This patch set checks the contents of g2d command list from user
is valid or not according to G2D hardware restrictions. For now,
G2D driver wasn't considered for them properly.

For this, this patch set includes relevant code cleaups, fixups
and adds a new function to get buffer size to the gem to be
accessed by G2D dma.

Inki Dae (1):
  drm/exynos: Add a new function to get gem buffer size

YoungJun Cho (6):
  drm/exynos: Fix error routine to getting dma addr.
  drm/exynos: clear node object type at gem unmap
  drm/exynos: Fix G2D core mulfunctioning issue
  drm/exynos: Clean up some G2D codes for readability
  drm/exynos: Deal with g2d buffer info more efficiently
  drm/exynos: Check g2d cmd list for g2d restrictions

 drivers/gpu/drm/exynos/exynos_drm_g2d.c |  381 ++-
 drivers/gpu/drm/exynos/exynos_drm_gem.c |   21 ++
 drivers/gpu/drm/exynos/exynos_drm_gem.h |5 +
 3 files changed, 349 insertions(+), 58 deletions(-)

-- 
1.7.4.1

[PATCH 1/7] drm/exynos: Fix error routine to getting dma addr.

[Inki Dae]

From: YoungJun Cho 

This patch fixes error routine when g2d_userptr_get_dma_add is failed.
When sg_alloc_table_from_pages() is failed, it doesn't call
sg_free_table() anymore.

Signed-off-by: YoungJun Cho 
Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_g2d.c |6 --
 1 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index 3b0da03..28b7112 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -450,7 +450,7 @@ static dma_addr_t *g2d_userptr_get_dma_addr(struct 
drm_device *drm_dev,
DMA_BIDIRECTIONAL);
if (ret < 0) {
DRM_ERROR("failed to map sgt with dma region.\n");
-   goto err_free_sgt;
+   goto err_sg_free_table;
}

g2d_userptr->dma_addr = sgt->sgl[0].dma_address;
@@ -467,8 +467,10 @@ static dma_addr_t *g2d_userptr_get_dma_addr(struct 
drm_device *drm_dev,

return &g2d_userptr->dma_addr;

-err_free_sgt:
+err_sg_free_table:
sg_free_table(sgt);
+
+err_free_sgt:
kfree(sgt);
sgt = NULL;

-- 
1.7.4.1

[PATCH 2/7] drm/exynos: clear node object type at gem unmap

[Inki Dae]

From: YoungJun Cho 

This patch clears node object type in G2D unmap cmdlist.
The obj_type of cmdlist node has to be cleared in
g2d_unmap_cmdlist_gem() so that the node can be reused
in g2d_map_cmdlist_gem().

Signed-off-by: YoungJun Cho 
Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_g2d.c |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index 28b7112..095520f 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -576,6 +576,7 @@ static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
false);

node->handles[i] = 0;
+   node->obj_type[i] = 0;
}

node->map_nr = 0;
-- 
1.7.4.1

[PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue

[Inki Dae]

From: YoungJun Cho 

This patch fixes G2D core mulfunctioning issue once g2d dma is started.
Without 'DMA_HOLD_CMD_REG' register setting, there is only one interrupt
after the execution to all command lists have been completed. And that
induces watchdog. So this patch sets 'LIST_HOLD' command to the register
so that command execution interrupt can be occured whenever each command
list execution is finished.

Signed-off-by: YoungJun Cho 
Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_g2d.c |   13 -
 1 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index 095520f..91bc4cc 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -82,7 +82,7 @@
 #define G2D_DMA_LIST_DONE_COUNT_OFFSET 17

 /* G2D_DMA_HOLD_CMD */
-#define G2D_USET_HOLD  (1 << 2)
+#define G2D_USER_HOLD  (1 << 2)
 #define G2D_LIST_HOLD  (1 << 1)
 #define G2D_BITBLT_HOLD(1 << 0)

@@ -863,10 +863,13 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device 
*drm_dev, void *data,
cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
cmdlist->data[cmdlist->last++] = 0;

-   if (node->event) {
-   cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
-   cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
-   }
+   /*
+* 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
+* if user wants G2D interrupt event once each command list or
+* BitBLT command execution is finished.
+*/
+   cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
+   cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;

/* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;
-- 
1.7.4.1

[PATCH 4/7] drm/exynos: Clean up some G2D codes for readability

[Inki Dae]

From: YoungJun Cho 

This patch just cleans up G2D codes for readability.

For this, it changes the member of g2d_cmdlist_node, obj_type into
buf_type and gathers relevant variables together.

Signed-off-by: YoungJun Cho 
Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_g2d.c |   33 +-
 1 files changed, 14 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index 91bc4cc..ce8e670 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -131,13 +131,12 @@ struct g2d_cmdlist_userptr {
boolin_pool;
boolout_of_list;
 };
-
 struct g2d_cmdlist_node {
struct list_headlist;
struct g2d_cmdlist  *cmdlist;
unsigned intmap_nr;
unsigned long   handles[MAX_BUF_ADDR_NR];
-   unsigned intobj_type[MAX_BUF_ADDR_NR];
+   unsigned intbuf_type[MAX_BUF_ADDR_NR];
dma_addr_t  dma_addr;

struct drm_exynos_pending_g2d_event *event;
@@ -186,8 +185,7 @@ static int g2d_init_cmdlist(struct g2d_data *g2d)
struct device *dev = g2d->dev;
struct g2d_cmdlist_node *node = g2d->cmdlist_node;
struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
-   int nr;
-   int ret;
+   int nr, ret;

init_dma_attrs(&g2d->cmdlist_dma_attrs);
dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
@@ -514,17 +512,17 @@ static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
struct drm_file *file)
 {
struct g2d_cmdlist *cmdlist = node->cmdlist;
-   int offset;
int i;

for (i = 0; i < node->map_nr; i++) {
+   int offset;
unsigned long handle;
dma_addr_t *addr;

offset = cmdlist->last - (i * 2 + 1);
handle = cmdlist->data[offset];

-   if (node->obj_type[i] == BUF_TYPE_GEM) {
+   if (node->buf_type[i] == BUF_TYPE_GEM) {
addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
file);
if (IS_ERR(addr)) {
@@ -568,7 +566,7 @@ static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
for (i = 0; i < node->map_nr; i++) {
unsigned long handle = node->handles[i];

-   if (node->obj_type[i] == BUF_TYPE_GEM)
+   if (node->buf_type[i] == BUF_TYPE_GEM)
exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle,
filp);
else
@@ -576,7 +574,7 @@ static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
false);

node->handles[i] = 0;
-   node->obj_type[i] = 0;
+   node->buf_type[i] = 0;
}

node->map_nr = 0;
@@ -646,7 +644,6 @@ static void g2d_runqueue_worker(struct work_struct *work)
struct g2d_data *g2d = container_of(work, struct g2d_data,
runqueue_work);

-
mutex_lock(&g2d->runqueue_mutex);
clk_disable(g2d->gate_clk);
pm_runtime_put_sync(g2d->dev);
@@ -722,11 +719,11 @@ static int g2d_check_reg_offset(struct device *dev,
int nr, bool for_addr)
 {
struct g2d_cmdlist *cmdlist = node->cmdlist;
-   int reg_offset;
-   int index;
-   int i;
+   int index, i;

for (i = 0; i < nr; i++) {
+   int reg_offset;
+
index = cmdlist->last - 2 * (i + 1);

if (for_addr) {
@@ -734,7 +731,7 @@ static int g2d_check_reg_offset(struct device *dev,
reg_offset = (cmdlist->data[index] &
~0x7fff) >> 31;
if (reg_offset) {
-   node->obj_type[i] = BUF_TYPE_USERPTR;
+   node->buf_type[i] = BUF_TYPE_USERPTR;
cmdlist->data[index] &= ~G2D_BUF_USERPTR;
}
}
@@ -756,8 +753,8 @@ static int g2d_check_reg_offset(struct device *dev,
if (!for_addr)
goto err;

-   if (node->obj_type[i] != BUF_TYPE_USERPTR)
-   node->obj_type[i] = BUF_TYPE_GEM;
+   if (node->buf_type[i] != BUF_TYPE_USERPTR)
+   node->buf_type[i] = BUF_TYPE_GEM;
break;
default:
if (for_addr)
@@ -799,8 +796,7 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device 
*drm_dev, void *data,
struct g2d_cmdlist_node *nod

[PATCH 6/7] drm/exynos: Add a new function to get gem buffer size

[Inki Dae]

This patch adds a new function to get gem buffer size. And this
funtion could be used for g2d driver or others can get gem buffer
size to check if the buffer is valid or not.

Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_gem.c |   21 +
 drivers/gpu/drm/exynos/exynos_drm_gem.h |5 +
 2 files changed, 26 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.c 
b/drivers/gpu/drm/exynos/exynos_drm_gem.c
index 67e17ce..0e6fe00 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.c
@@ -164,6 +164,27 @@ out:
exynos_gem_obj = NULL;
 }

+unsigned long exynos_drm_gem_get_size(struct drm_device *dev,
+   unsigned int gem_handle,
+   struct drm_file *file_priv)
+{
+   struct exynos_drm_gem_obj *exynos_gem_obj;
+   struct drm_gem_object *obj;
+
+   obj = drm_gem_object_lookup(dev, file_priv, gem_handle);
+   if (!obj) {
+   DRM_ERROR("failed to lookup gem object.\n");
+   return 0;
+   }
+
+   exynos_gem_obj = to_exynos_gem_obj(obj);
+
+   drm_gem_object_unreference_unlocked(obj);
+
+   return exynos_gem_obj->buffer->size;
+}
+
+
 struct exynos_drm_gem_obj *exynos_drm_gem_init(struct drm_device *dev,
  unsigned long size)
 {
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.h 
b/drivers/gpu/drm/exynos/exynos_drm_gem.h
index 35ebac4..468766b 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.h
@@ -130,6 +130,11 @@ int exynos_drm_gem_userptr_ioctl(struct drm_device *dev, 
void *data,
 int exynos_drm_gem_get_ioctl(struct drm_device *dev, void *data,
  struct drm_file *file_priv);

+/* get buffer size to gem handle. */
+unsigned long exynos_drm_gem_get_size(struct drm_device *dev,
+   unsigned int gem_handle,
+   struct drm_file *file_priv);
+
 /* initialize gem object. */
 int exynos_drm_gem_init_object(struct drm_gem_object *obj);

-- 
1.7.4.1

[PATCH 5/7] drm/exynos: Deal with g2d buffer info more efficiently

[Inki Dae]

From: YoungJun Cho 

This patch adds g2d_buf_info structure and buffer relevant
variables moves into the g2d_buf_info to manage g2d buffer
information more efficiently.

Signed-off-by: YoungJun Cho 
Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_g2d.c |  169 +++
 1 files changed, 125 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index ce8e670..b7be3d4 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -96,8 +96,6 @@
 #define G2D_CMDLIST_POOL_SIZE  (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
 #define G2D_CMDLIST_DATA_NUM   (G2D_CMDLIST_SIZE / sizeof(u32) - 2)

-#define MAX_BUF_ADDR_NR6
-
 /* maximum buffer pool size of userptr is 64MB as default */
 #define MAX_POOL   (64 * 1024 * 1024)

@@ -106,6 +104,17 @@ enum {
BUF_TYPE_USERPTR,
 };

+enum g2d_reg_type {
+   REG_TYPE_NONE = -1,
+   REG_TYPE_SRC,
+   REG_TYPE_SRC_PLANE2,
+   REG_TYPE_DST,
+   REG_TYPE_DST_PLANE2,
+   REG_TYPE_PAT,
+   REG_TYPE_MSK,
+   MAX_REG_TYPE_NR
+};
+
 /* cmdlist data structure */
 struct g2d_cmdlist {
u32 head;
@@ -113,6 +122,22 @@ struct g2d_cmdlist {
u32 last;   /* last data offset */
 };

+/*
+ * A structure of buffer information
+ *
+ * @map_nr: manages the number of mapped buffers
+ * @reg_types: stores regitster type in the order of requested command
+ * @handles: stores buffer handle in its reg_type position
+ * @types: stores buffer type in its reg_type position
+ *
+ */
+struct g2d_buf_info {
+   unsigned intmap_nr;
+   enum g2d_reg_type   reg_types[MAX_REG_TYPE_NR];
+   unsigned long   handles[MAX_REG_TYPE_NR];
+   unsigned inttypes[MAX_REG_TYPE_NR];
+};
+
 struct drm_exynos_pending_g2d_event {
struct drm_pending_eventbase;
struct drm_exynos_g2d_event event;
@@ -134,10 +159,8 @@ struct g2d_cmdlist_userptr {
 struct g2d_cmdlist_node {
struct list_headlist;
struct g2d_cmdlist  *cmdlist;
-   unsigned intmap_nr;
-   unsigned long   handles[MAX_BUF_ADDR_NR];
-   unsigned intbuf_type[MAX_BUF_ADDR_NR];
dma_addr_t  dma_addr;
+   struct g2d_buf_info buf_info;

struct drm_exynos_pending_g2d_event *event;
 };
@@ -185,7 +208,8 @@ static int g2d_init_cmdlist(struct g2d_data *g2d)
struct device *dev = g2d->dev;
struct g2d_cmdlist_node *node = g2d->cmdlist_node;
struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
-   int nr, ret;
+   struct g2d_buf_info *buf_info;
+   int nr, ret, i;

init_dma_attrs(&g2d->cmdlist_dma_attrs);
dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
@@ -212,6 +236,10 @@ static int g2d_init_cmdlist(struct g2d_data *g2d)
node[nr].dma_addr =
g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE;

+   buf_info = &node[nr].buf_info;
+   for (i = 0; i < MAX_REG_TYPE_NR; i++)
+   buf_info->reg_types[i] = REG_TYPE_NONE;
+
list_add_tail(&node[nr].list, &g2d->free_cmdlist);
}

@@ -506,36 +534,78 @@ static void g2d_userptr_free_all(struct drm_device 
*drm_dev,
g2d->current_pool = 0;
 }

+static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
+{
+   enum g2d_reg_type reg_type;
+
+   switch (reg_offset) {
+   case G2D_SRC_BASE_ADDR:
+   reg_type = REG_TYPE_SRC;
+   break;
+   case G2D_SRC_PLANE2_BASE_ADDR:
+   reg_type = REG_TYPE_SRC_PLANE2;
+   break;
+   case G2D_DST_BASE_ADDR:
+   reg_type = REG_TYPE_DST;
+   break;
+   case G2D_DST_PLANE2_BASE_ADDR:
+   reg_type = REG_TYPE_DST_PLANE2;
+   break;
+   case G2D_PAT_BASE_ADDR:
+   reg_type = REG_TYPE_PAT;
+   break;
+   case G2D_MSK_BASE_ADDR:
+   reg_type = REG_TYPE_MSK;
+   break;
+   default:
+   reg_type = REG_TYPE_NONE;
+   DRM_ERROR("Unknown register offset![%d]\n", reg_offset);
+   break;
+   };
+
+   return reg_type;
+}
+
 static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
struct g2d_cmdlist_node *node,
struct drm_device *drm_dev,
struct drm_file *file)
 {
struct g2d_cmdlist *cmdlist = node->cmdlist;
-   int i;
+   struct g2d_buf_info *buf_info = &node->buf_info;
+   int ret, i;

-   for (i = 0; i < node->map_nr; i++) {
-   int offset;
+   for (i = 0; i < buf_info->map_nr; i++) {
+   enum g2d_reg_type reg_type;
+  

[PATCH 7/7] drm/exynos: Check g2d cmd list for g2d restrictions

[Inki Dae]

From: YoungJun Cho 

This patch checks command list from user for g2d restrictions.

For now, g2d driver wasn't considered for G2D hardware restrictions
properly. The below is the restrictions to G2D hardware and this patch
considers them.
- width or height value in the command list
has to be in valid range (1 to 8000 pixels)
- The requested area should be less than buffer size.
- right has to be bigger than left.
- bottom has to be bigger than top.

Signed-off-by: YoungJun Cho 
Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_g2d.c |  183 +++
 1 files changed, 183 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index b7be3d4..dbebbb8 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -48,8 +48,14 @@

 /* registers for base address */
 #define G2D_SRC_BASE_ADDR  0x0304
+#define G2D_SRC_COLOR_MODE 0x030C
+#define G2D_SRC_LEFT_TOP   0x0310
+#define G2D_SRC_RIGHT_BOTTOM   0x0314
 #define G2D_SRC_PLANE2_BASE_ADDR   0x0318
 #define G2D_DST_BASE_ADDR  0x0404
+#define G2D_DST_COLOR_MODE 0x040C
+#define G2D_DST_LEFT_TOP   0x0410
+#define G2D_DST_RIGHT_BOTTOM   0x0414
 #define G2D_DST_PLANE2_BASE_ADDR   0x0418
 #define G2D_PAT_BASE_ADDR  0x0500
 #define G2D_MSK_BASE_ADDR  0x0520
@@ -91,6 +97,22 @@
 #define G2D_START_NHOLT(1 << 1)
 #define G2D_START_BITBLT   (1 << 0)

+/* buffer color format */
+#define G2D_FMT_XRGB   0
+#define G2D_FMT_ARGB   1
+#define G2D_FMT_RGB565 2
+#define G2D_FMT_XRGB1555   3
+#define G2D_FMT_ARGB1555   4
+#define G2D_FMT_XRGB   5
+#define G2D_FMT_ARGB   6
+#define G2D_FMT_PACKED_RGB888  7
+#define G2D_FMT_A8 11
+#define G2D_FMT_L8 12
+
+/* buffer valid length */
+#define G2D_LEN_MIN1
+#define G2D_LEN_MAX8000
+
 #define G2D_CMDLIST_SIZE   (PAGE_SIZE / 4)
 #define G2D_CMDLIST_NUM64
 #define G2D_CMDLIST_POOL_SIZE  (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
@@ -123,12 +145,31 @@ struct g2d_cmdlist {
 };

 /*
+ * A structure of buffer description
+ *
+ * @format: color format
+ * @left_x: the x coordinates of left top corner
+ * @top_y: the y coordinates of left top corner
+ * @right_x: the x coordinates of right bottom corner
+ * @bottom_y: the y coordinates of right bottom corner
+ *
+ */
+struct g2d_buf_desc {
+   unsigned intformat;
+   unsigned intleft_x;
+   unsigned inttop_y;
+   unsigned intright_x;
+   unsigned intbottom_y;
+};
+
+/*
  * A structure of buffer information
  *
  * @map_nr: manages the number of mapped buffers
  * @reg_types: stores regitster type in the order of requested command
  * @handles: stores buffer handle in its reg_type position
  * @types: stores buffer type in its reg_type position
+ * @descs: stores buffer description in its reg_type position
  *
  */
 struct g2d_buf_info {
@@ -136,6 +177,7 @@ struct g2d_buf_info {
enum g2d_reg_type   reg_types[MAX_REG_TYPE_NR];
unsigned long   handles[MAX_REG_TYPE_NR];
unsigned inttypes[MAX_REG_TYPE_NR];
+   struct g2d_buf_desc descs[MAX_REG_TYPE_NR];
 };

 struct drm_exynos_pending_g2d_event {
@@ -540,12 +582,18 @@ static enum g2d_reg_type g2d_get_reg_type(int reg_offset)

switch (reg_offset) {
case G2D_SRC_BASE_ADDR:
+   case G2D_SRC_COLOR_MODE:
+   case G2D_SRC_LEFT_TOP:
+   case G2D_SRC_RIGHT_BOTTOM:
reg_type = REG_TYPE_SRC;
break;
case G2D_SRC_PLANE2_BASE_ADDR:
reg_type = REG_TYPE_SRC_PLANE2;
break;
case G2D_DST_BASE_ADDR:
+   case G2D_DST_COLOR_MODE:
+   case G2D_DST_LEFT_TOP:
+   case G2D_DST_RIGHT_BOTTOM:
reg_type = REG_TYPE_DST;
break;
case G2D_DST_PLANE2_BASE_ADDR:
@@ -566,6 +614,69 @@ static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
return reg_type;
 }

+static unsigned long g2d_get_buf_bpp(unsigned int format)
+{
+   unsigned long bpp;
+
+   switch (format) {
+   case G2D_FMT_XRGB:
+   case G2D_FMT_ARGB:
+   bpp = 4;
+   break;
+   case G2D_FMT_RGB565:
+   case G2D_FMT_XRGB1555:
+   case G2D_FMT_ARGB1555:
+   case G2D_FMT_XRGB:
+   case G2D_FMT_ARGB:
+   bpp = 2;
+   break;
+   case G2D_FMT_PACKED_RGB888:
+   bpp = 3;
+   break;
+   default:
+   bpp = 1;
+   break;
+   }
+
+   return

[PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue

[Joonyoung Shim]

On 03/13/2013 06:04 PM, Inki Dae wrote:
> From: YoungJun Cho 
>
> This patch fixes G2D core mulfunctioning issue once g2d dma is started.
> Without 'DMA_HOLD_CMD_REG' register setting, there is only one interrupt
> after the execution to all command lists have been completed. And that
> induces watchdog. So this patch sets 'LIST_HOLD' command to the register
> so that command execution interrupt can be occured whenever each command
> list execution is finished.

No, this problem occurs as GCF bit of INTEN_REG register is enabled
always. If wants to raise interrupt immediately after a command list
finished, GCF bit should be enabled, and it also needs to enable of LIST
Hold bit of DMA_HOLD_CMD_REG register. If one of the two is missed out,
g2d hardware will not work normally sometimes.

This patch is just workaround and it can happen performance issue
because g2d hardware stops a moment whenever a command list finished.

So, we need the way which enable GCF bit only when a command list
completion interrupt needs.

Thanks.

> Signed-off-by: YoungJun Cho 
> Signed-off-by: Inki Dae 
> Signed-off-by: Kyungmin Park 
> ---
>   drivers/gpu/drm/exynos/exynos_drm_g2d.c |   13 -
>   1 files changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
> b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> index 095520f..91bc4cc 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> @@ -82,7 +82,7 @@
>   #define G2D_DMA_LIST_DONE_COUNT_OFFSET  17
>   
>   /* G2D_DMA_HOLD_CMD */
> -#define G2D_USET_HOLD(1 << 2)
> +#define G2D_USER_HOLD(1 << 2)
>   #define G2D_LIST_HOLD   (1 << 1)
>   #define G2D_BITBLT_HOLD (1 << 0)
>   
> @@ -863,10 +863,13 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device 
> *drm_dev, void *data,
>   cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
>   cmdlist->data[cmdlist->last++] = 0;
>   
> - if (node->event) {
> - cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
> - cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
> - }
> + /*
> +  * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
> +  * if user wants G2D interrupt event once each command list or
> +  * BitBLT command execution is finished.
> +  */
> + cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
> + cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
>   
>   /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
>   size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;

[PATCH 4/7] drm/exynos: Clean up some G2D codes for readability

[Joonyoung Shim]

On 03/13/2013 06:04 PM, Inki Dae wrote:
> From: YoungJun Cho 
>
> This patch just cleans up G2D codes for readability.
>
> For this, it changes the member of g2d_cmdlist_node, obj_type into
> buf_type and gathers relevant variables together.

Please make patch only about s/obj_type/buf_type.

>
> Signed-off-by: YoungJun Cho 
> Signed-off-by: Inki Dae 
> Signed-off-by: Kyungmin Park 
> ---
>   drivers/gpu/drm/exynos/exynos_drm_g2d.c |   33 
> +-
>   1 files changed, 14 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
> b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> index 91bc4cc..ce8e670 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> @@ -131,13 +131,12 @@ struct g2d_cmdlist_userptr {
>   boolin_pool;
>   boolout_of_list;
>   };
> -

Need blank line.

>   struct g2d_cmdlist_node {
>   struct list_headlist;
>   struct g2d_cmdlist  *cmdlist;
>   unsigned intmap_nr;
>   unsigned long   handles[MAX_BUF_ADDR_NR];
> - unsigned intobj_type[MAX_BUF_ADDR_NR];
> + unsigned intbuf_type[MAX_BUF_ADDR_NR];
>   dma_addr_t  dma_addr;
>   
>   struct drm_exynos_pending_g2d_event *event;
> @@ -186,8 +185,7 @@ static int g2d_init_cmdlist(struct g2d_data *g2d)
>   struct device *dev = g2d->dev;
>   struct g2d_cmdlist_node *node = g2d->cmdlist_node;
>   struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
> - int nr;
> - int ret;
> + int nr, ret;

Please keep one variable to one line. The below modifications are ditto.

>   
>   init_dma_attrs(&g2d->cmdlist_dma_attrs);
>   dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
> @@ -514,17 +512,17 @@ static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
>   struct drm_file *file)
>   {
>   struct g2d_cmdlist *cmdlist = node->cmdlist;
> - int offset;
>   int i;
>   
>   for (i = 0; i < node->map_nr; i++) {
> + int offset;
>   unsigned long handle;
>   dma_addr_t *addr;
>   
>   offset = cmdlist->last - (i * 2 + 1);
>   handle = cmdlist->data[offset];
>   
> - if (node->obj_type[i] == BUF_TYPE_GEM) {
> + if (node->buf_type[i] == BUF_TYPE_GEM) {
>   addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
>   file);
>   if (IS_ERR(addr)) {
> @@ -568,7 +566,7 @@ static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
>   for (i = 0; i < node->map_nr; i++) {
>   unsigned long handle = node->handles[i];
>   
> - if (node->obj_type[i] == BUF_TYPE_GEM)
> + if (node->buf_type[i] == BUF_TYPE_GEM)
>   exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle,
>   filp);
>   else
> @@ -576,7 +574,7 @@ static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
>   false);
>   
>   node->handles[i] = 0;
> - node->obj_type[i] = 0;
> + node->buf_type[i] = 0;
>   }
>   
>   node->map_nr = 0;
> @@ -646,7 +644,6 @@ static void g2d_runqueue_worker(struct work_struct *work)
>   struct g2d_data *g2d = container_of(work, struct g2d_data,
>   runqueue_work);
>   
> -
>   mutex_lock(&g2d->runqueue_mutex);
>   clk_disable(g2d->gate_clk);
>   pm_runtime_put_sync(g2d->dev);
> @@ -722,11 +719,11 @@ static int g2d_check_reg_offset(struct device *dev,
>   int nr, bool for_addr)
>   {
>   struct g2d_cmdlist *cmdlist = node->cmdlist;
> - int reg_offset;
> - int index;
> - int i;
> + int index, i;
>   
>   for (i = 0; i < nr; i++) {
> + int reg_offset;
> +
>   index = cmdlist->last - 2 * (i + 1);
>   
>   if (for_addr) {
> @@ -734,7 +731,7 @@ static int g2d_check_reg_offset(struct device *dev,
>   reg_offset = (cmdlist->data[index] &
>   ~0x7fff) >> 31;
>   if (reg_offset) {
> - node->obj_type[i] = BUF_TYPE_USERPTR;
> + node->buf_type[i] = BUF_TYPE_USERPTR;
>   cmdlist->data[index] &= ~G2D_BUF_USERPTR;
>   }
>   }
> @@ -756,8 +753,8 @@ static int g2d_check_reg_offset(struct device *dev,
>   if (!for_addr)
>   goto err;
>   
> - if (node->obj_type[i] != BUF_TYPE_USERPTR)
> - node->obj_type[i] = BUF_TYPE_GEM;
> + if (node->buf_type[i] !=

[PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue

[Inki Dae]

> -Original Message-
> From: Joonyoung Shim [mailto:jy0922.shim at samsung.com]
> Sent: Wednesday, March 13, 2013 6:53 PM
> To: Inki Dae
> Cc: airlied at linux.ie; dri-devel at lists.freedesktop.org;
> kyungmin.park at samsung.com; sw0312.kim at samsung.com; YoungJun Cho
> Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue
> 
> On 03/13/2013 06:04 PM, Inki Dae wrote:
> > From: YoungJun Cho 
> >
> > This patch fixes G2D core mulfunctioning issue once g2d dma is started.
> > Without 'DMA_HOLD_CMD_REG' register setting, there is only one interrupt
> > after the execution to all command lists have been completed. And that
> > induces watchdog. So this patch sets 'LIST_HOLD' command to the register
> > so that command execution interrupt can be occured whenever each command
> > list execution is finished.
> 
> No, this problem occurs as GCF bit of INTEN_REG register is enabled
> always. If wants to raise interrupt immediately after a command list
> finished, GCF bit should be enabled, and it also needs to enable of LIST
> Hold bit of DMA_HOLD_CMD_REG register. If one of the two is missed out,
> g2d hardware will not work normally sometimes.

Right, these two things(LIST HOLD command and GCF interrupt enabling) should
be pair.

> 
> This patch is just workaround and it can happen performance issue
> because g2d hardware stops a moment whenever a command list finished.
> 
> So, we need the way which enable GCF bit only when a command list
> completion interrupt needs.
> 

Agree. How about this? If node->event isn't NULL then set GCF to INTEN
register in g2d_dma_start(). For this way, I already mentioned through
internal email thread.

> Thanks.
> 
> > Signed-off-by: YoungJun Cho 
> > Signed-off-by: Inki Dae 
> > Signed-off-by: Kyungmin Park 
> > ---
> >   drivers/gpu/drm/exynos/exynos_drm_g2d.c |   13 -
> >   1 files changed, 8 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> > index 095520f..91bc4cc 100644
> > --- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> > +++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> > @@ -82,7 +82,7 @@
> >   #define G2D_DMA_LIST_DONE_COUNT_OFFSET17
> >
> >   /* G2D_DMA_HOLD_CMD */
> > -#define G2D_USET_HOLD  (1 << 2)
> > +#define G2D_USER_HOLD  (1 << 2)
> >   #define G2D_LIST_HOLD (1 << 1)
> >   #define G2D_BITBLT_HOLD   (1 << 0)
> >
> > @@ -863,10 +863,13 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device
> *drm_dev, void *data,
> > cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
> > cmdlist->data[cmdlist->last++] = 0;
> >
> > -   if (node->event) {
> > -   cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
> > -   cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
> > -   }
> > +   /*
> > +* 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
> > +* if user wants G2D interrupt event once each command list or
> > +* BitBLT command execution is finished.
> > +*/
> > +   cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
> > +   cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
> >
> > /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
> > size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;

[PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue

[Joonyoung Shim]

On 03/13/2013 07:14 PM, Inki Dae wrote:
>
>> -Original Message-
>> From: Joonyoung Shim [mailto:jy0922.shim at samsung.com]
>> Sent: Wednesday, March 13, 2013 6:53 PM
>> To: Inki Dae
>> Cc: airlied at linux.ie; dri-devel at lists.freedesktop.org;
>> kyungmin.park at samsung.com; sw0312.kim at samsung.com; YoungJun Cho
>> Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue
>>
>> On 03/13/2013 06:04 PM, Inki Dae wrote:
>>> From: YoungJun Cho 
>>>
>>> This patch fixes G2D core mulfunctioning issue once g2d dma is started.
>>> Without 'DMA_HOLD_CMD_REG' register setting, there is only one interrupt
>>> after the execution to all command lists have been completed. And that
>>> induces watchdog. So this patch sets 'LIST_HOLD' command to the register
>>> so that command execution interrupt can be occured whenever each command
>>> list execution is finished.
>> No, this problem occurs as GCF bit of INTEN_REG register is enabled
>> always. If wants to raise interrupt immediately after a command list
>> finished, GCF bit should be enabled, and it also needs to enable of LIST
>> Hold bit of DMA_HOLD_CMD_REG register. If one of the two is missed out,
>> g2d hardware will not work normally sometimes.
> Right, these two things(LIST HOLD command and GCF interrupt enabling) should
> be pair.
>
>> This patch is just workaround and it can happen performance issue
>> because g2d hardware stops a moment whenever a command list finished.
>>
>> So, we need the way which enable GCF bit only when a command list
>> completion interrupt needs.
>>
> Agree. How about this? If node->event isn't NULL then set GCF to INTEN
> register in g2d_dma_start(). For this way, I already mentioned through
> internal email thread.

No, Once set GCF, it is set on end. Who can clear it?

>> Thanks.
>>
>>> Signed-off-by: YoungJun Cho 
>>> Signed-off-by: Inki Dae 
>>> Signed-off-by: Kyungmin Park 
>>> ---
>>>drivers/gpu/drm/exynos/exynos_drm_g2d.c |   13 -
>>>1 files changed, 8 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
>> b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
>>> index 095520f..91bc4cc 100644
>>> --- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
>>> +++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
>>> @@ -82,7 +82,7 @@
>>>#define G2D_DMA_LIST_DONE_COUNT_OFFSET   17
>>>
>>>/* G2D_DMA_HOLD_CMD */
>>> -#define G2D_USET_HOLD  (1 << 2)
>>> +#define G2D_USER_HOLD  (1 << 2)
>>>#define G2D_LIST_HOLD(1 << 1)
>>>#define G2D_BITBLT_HOLD  (1 << 0)
>>>
>>> @@ -863,10 +863,13 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device
>> *drm_dev, void *data,
>>> cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
>>> cmdlist->data[cmdlist->last++] = 0;
>>>
>>> -   if (node->event) {
>>> -   cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
>>> -   cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
>>> -   }
>>> +   /*
>>> +* 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
>>> +* if user wants G2D interrupt event once each command list or
>>> +* BitBLT command execution is finished.
>>> +*/
>>> +   cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
>>> +   cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
>>>
>>> /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
>>> size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;
>

WARNING: at drivers/gpu/drm/nouveau/core/core/mm.c:242

[Jiri Slaby]

On 02/19/2013 11:32 PM, Marcin Slusarz wrote:
> On Tue, Feb 19, 2013 at 08:07:44AM +0100, Marcin Slusarz wrote:
>> On Tue, Feb 19, 2013 at 12:43:06AM +0100, Jiri Slaby wrote:
>>> On 02/19/2013 12:23 AM, Marcin Slusarz wrote:
 Tomorrow I'll post a patch for page allocation failure.
>>>
>>> What do you mean -- what kind of patch?
>>
>> A patch which will change pgt allocation to use vmalloc.

It's still not in -next. Any plans on this?

> ---
> From: Marcin Slusarz 
> Subject: [PATCH] drm/nouveau: use vmalloc for pgt allocation
> 
> Page tables on nv50 take 48kB, which can be hard to allocate in one piece.
> Let's use vmalloc.
> 
> Signed-off-by: Marcin Slusarz 
> Cc: stable at vger.kernel.org
> ---
>  drivers/gpu/drm/nouveau/core/subdev/vm/base.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c 
> b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c
> index 77c67fc..e66fb77 100644
> --- a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c
> +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c
> @@ -362,7 +362,7 @@ nouveau_vm_create(struct nouveau_vmmgr *vmm, u64 offset, 
> u64 length,
>   vm->fpde = offset >> (vmm->pgt_bits + 12);
>   vm->lpde = (offset + length - 1) >> (vmm->pgt_bits + 12);
>  
> - vm->pgt  = kcalloc(vm->lpde - vm->fpde + 1, sizeof(*vm->pgt), 
> GFP_KERNEL);
> + vm->pgt  = vzalloc((vm->lpde - vm->fpde + 1) * sizeof(*vm->pgt));
>   if (!vm->pgt) {
>   kfree(vm);
>   return -ENOMEM;
> @@ -371,7 +371,7 @@ nouveau_vm_create(struct nouveau_vmmgr *vmm, u64 offset, 
> u64 length,
>   ret = nouveau_mm_init(&vm->mm, mm_offset >> 12, mm_length >> 12,
> block >> 12);
>   if (ret) {
> - kfree(vm->pgt);
> + vfree(vm->pgt);
>   kfree(vm);
>   return ret;
>   }
> @@ -446,7 +446,7 @@ nouveau_vm_del(struct nouveau_vm *vm)
>   }
>  
>   nouveau_mm_fini(&vm->mm);
> - kfree(vm->pgt);
> + vfree(vm->pgt);
>   kfree(vm);
>  }
>  
> 


-- 
js
suse labs

[PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue

[Inki Dae]

> -Original Message-
> From: Joonyoung Shim [mailto:jy0922.shim at samsung.com]
> Sent: Wednesday, March 13, 2013 7:28 PM
> To: Inki Dae
> Cc: airlied at linux.ie; dri-devel at lists.freedesktop.org;
> kyungmin.park at samsung.com; sw0312.kim at samsung.com; 'YoungJun Cho'
> Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue
> 
> On 03/13/2013 07:14 PM, Inki Dae wrote:
> >
> >> -Original Message-
> >> From: Joonyoung Shim [mailto:jy0922.shim at samsung.com]
> >> Sent: Wednesday, March 13, 2013 6:53 PM
> >> To: Inki Dae
> >> Cc: airlied at linux.ie; dri-devel at lists.freedesktop.org;
> >> kyungmin.park at samsung.com; sw0312.kim at samsung.com; YoungJun Cho
> >> Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue
> >>
> >> On 03/13/2013 06:04 PM, Inki Dae wrote:
> >>> From: YoungJun Cho 
> >>>
> >>> This patch fixes G2D core mulfunctioning issue once g2d dma is
started.
> >>> Without 'DMA_HOLD_CMD_REG' register setting, there is only one
> interrupt
> >>> after the execution to all command lists have been completed. And that
> >>> induces watchdog. So this patch sets 'LIST_HOLD' command to the
> register
> >>> so that command execution interrupt can be occured whenever each
> command
> >>> list execution is finished.
> >> No, this problem occurs as GCF bit of INTEN_REG register is enabled
> >> always. If wants to raise interrupt immediately after a command list
> >> finished, GCF bit should be enabled, and it also needs to enable of
> LIST
> >> Hold bit of DMA_HOLD_CMD_REG register. If one of the two is missed out,
> >> g2d hardware will not work normally sometimes.
> > Right, these two things(LIST HOLD command and GCF interrupt enabling)
> should
> > be pair.
> >
> >> This patch is just workaround and it can happen performance issue
> >> because g2d hardware stops a moment whenever a command list finished.
> >>
> >> So, we need the way which enable GCF bit only when a command list
> >> completion interrupt needs.
> >>
> > Agree. How about this? If node->event isn't NULL then set GCF to INTEN
> > register in g2d_dma_start(). For this way, I already mentioned through
> > internal email thread.
> 
> No, Once set GCF, it is set on end. Who can clear it?
> 

Maybe you say that g2d_dma_start() is called by exec ioctl so the GCF bit
could be set by only last node.  For this, We need to look into dma-driven
command processing. Assume that two more command lists exist and they are
executed at once. Then we CAN NOT GET each node while dma operation because
the command lists of each node are executed by dma at once.

On other words, there is no way to enable GCF bit only in case that a
command list completion interrupt is needed because the need is from user
side.

So I think we need some policy for g2d driver. For example, if user wants to
get event to each node, all nodes from the user should be operated with GCF
bit otherwise without GCF bit.

Any other idea?

> >> Thanks.
> >>
> >>> Signed-off-by: YoungJun Cho 
> >>> Signed-off-by: Inki Dae 
> >>> Signed-off-by: Kyungmin Park 
> >>> ---
> >>>drivers/gpu/drm/exynos/exynos_drm_g2d.c |   13 -
> >>>1 files changed, 8 insertions(+), 5 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> >> b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> >>> index 095520f..91bc4cc 100644
> >>> --- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> >>> +++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> >>> @@ -82,7 +82,7 @@
> >>>#define G2D_DMA_LIST_DONE_COUNT_OFFSET 17
> >>>
> >>>/* G2D_DMA_HOLD_CMD */
> >>> -#define G2D_USET_HOLD(1 << 2)
> >>> +#define G2D_USER_HOLD(1 << 2)
> >>>#define G2D_LIST_HOLD  (1 << 1)
> >>>#define G2D_BITBLT_HOLD(1 << 0)
> >>>
> >>> @@ -863,10 +863,13 @@ int exynos_g2d_set_cmdlist_ioctl(struct
> drm_device
> >> *drm_dev, void *data,
> >>>   cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
> >>>   cmdlist->data[cmdlist->last++] = 0;
> >>>
> >>> - if (node->event) {
> >>> - cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
> >>> - cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
> >>> - }
> >>> + /*
> >>> +  * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
> >>> +  * if user wants G2D interrupt event once each command list or
> >>> +  * BitBLT command execution is finished.
> >>> +  */
> >>> + cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
> >>> + cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
> >>>
> >>>   /* Check size of cmdlist: last 2 is about G2D_BITBLT_START
*/
> >>>   size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2
+ 2;
> >

[WARNING v3.9-rc2] [nouveau] possible recursive locking detected in evo_wait()

[Konstantin Khlebnikov]

ce:
[  894.379615]  [] __lock_acquire+0x6c9/0x1b00
[  894.379621]  [] ? mark_held_locks+0x9b/0x100
[  894.379626]  [] lock_acquire+0x85/0x120
[  894.379682]  [] ? evo_wait+0x49/0xf0 [nouveau]
[  894.379691]  [] ? mutex_lock_nested+0x292/0x330
[  894.379696]  [] mutex_lock_nested+0x6e/0x330
[  894.379752]  [] ? evo_wait+0x49/0xf0 [nouveau]
[  894.379756]  [] ? mark_held_locks+0x9b/0x100
[  894.379812]  [] evo_wait+0x49/0xf0 [nouveau]
[  894.379868]  [] nv50_display_flip_next+0x713/0x7a0 
[nouveau]
[  894.379874]  [] ? mutex_unlock+0xe/0x10
[  894.379930]  [] ? evo_kick+0x37/0x40 [nouveau]
[  894.379985]  [] nv50_crtc_commit+0x10e/0x230 [nouveau]
[  894.379997]  [] drm_crtc_helper_set_mode+0x335/0x4c0 
[drm_kms_helper]
[  894.380008]  [] drm_crtc_helper_set_config+0xa4e/0xb70 
[drm_kms_helper]
[  894.380013]  [] drm_mode_set_config_internal+0x31/0x70
[  894.380013]  [] drm_fb_helper_set_par+0x71/0xf0 
[drm_kms_helper]
[  894.380013]  [] fbcon_init+0x514/0x5a0
[  894.380013]  [] visual_init+0xbc/0x120
[  894.380013]  [] do_bind_con_driver+0x163/0x320
[  894.380013]  [] do_take_over_console+0x61/0x70
[  894.380013]  [] do_fbcon_takeover+0x63/0xc0
[  894.380013]  [] fbcon_event_notify+0x715/0x820
[  894.380013]  [] notifier_call_chain+0x4d/0x70
[  894.380013]  [] __blocking_notifier_call_chain+0x58/0x80
[  894.380013]  [] blocking_notifier_call_chain+0x16/0x20
[  894.380013]  [] fb_notifier_call_chain+0x1b/0x20
[  894.380013]  [] register_framebuffer+0x1c8/0x300
[  894.380013]  [] drm_fb_helper_initial_config+0x371/0x520 
[drm_kms_helper]
[  894.380013]  [] ? 
drm_fb_helper_single_add_all_connectors+0x47/0xf0 [drm_kms_helper]
[  894.380013]  [] ? 
drm_fb_helper_single_add_all_connectors+0x47/0xf0 [drm_kms_helper]
[  894.380013]  [] ? kmem_cache_alloc_trace+0x163/0x180
[  894.380013]  [] nouveau_fbcon_init+0x10e/0x160 [nouveau]
[  894.380013]  [] nouveau_drm_load+0x40a/0x5d0 [nouveau]
[  894.380013]  [] ? device_register+0x1e/0x30
[  894.380013]  [] ? drm_sysfs_device_add+0x86/0xb0
[  894.380013]  [] drm_get_pci_dev+0x186/0x2d0
[  894.380013]  [] nouveau_drm_probe+0x26a/0x2c0 [nouveau]
[  894.380013]  [] pci_device_probe+0x9c/0xe0
[  894.380013]  [] driver_probe_device+0x8b/0x390
[  894.380013]  [] __driver_attach+0xab/0xb0
[  894.380013]  [] ? driver_probe_device+0x390/0x390
[  894.380013]  [] bus_for_each_dev+0x5d/0xa0
[  894.380013]  [] driver_attach+0x1e/0x20
[  894.380013]  [] bus_add_driver+0x121/0x2b0
[  894.380013]  [] ? 0xa038cfff
[  894.380013]  [] driver_register+0x77/0x170
[  894.380013]  [] ? 0xa038cfff
[  894.380013]  [] __pci_register_driver+0x64/0x70
[  894.380013]  [] drm_pci_init+0x115/0x130
[  894.380013]  [] ? 0xa038cfff
[  894.380013]  [] ? 0xa038cfff
[  894.380013]  [] nouveau_drm_init+0x4d/0x4f [nouveau]
[  894.380013]  [] do_one_initcall+0x122/0x170
[  894.380013]  [] load_module+0x1b5d/0x26e0
[  894.380013]  [] ? ddebug_proc_open+0xe0/0xe0
[  894.380013]  [] ? retint_restore_args+0xe/0xe
[  894.380013]  [] sys_init_module+0xae/0x110
[  894.380013]  [] system_call_fastpath+0x16/0x1b
[  894.435597] Console: switching to colour frame buffer device 200x75
[  894.513780] nouveau :02:00.0: fb0: nouveaufb frame buffer device
[  894.516082] nouveau :02:00.0: registered panic notifier
[  894.517288] [drm] Initialized nouveau 1.1.0 20120801 for :02:00.0 on 
minor 0
-- next part --
An embedded and charset-unspecified text was scrubbed...
Name: .config
URL: 
<http://lists.freedesktop.org/archives/dri-devel/attachments/20130313/e7e4cf2f/attachment-0001.ksh>

[Bug 62244] SIGFPE with cogl GL client in wayland

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=62244

Bastien Nocera  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

--- Comment #1 from Bastien Nocera  ---
This works with the mesa 9.1 packages in F19.

-- 
You are receiving this mail because:
You are the assignee for the bug.
-- next part --
An HTML attachment was scrubbed...
URL: 
<http://lists.freedesktop.org/archives/dri-devel/attachments/20130313/156ba859/attachment.html>

[PATCH] DRI2: don't advertise GLX_INTEL_swap_event if it can't

[Paul Menzel]

Dear Rob,


Am Dienstag, den 12.03.2013, 19:44 -0400 schrieb Rob Clark:

?it? sounds  strange in commit summary.

> If ddx does not support swap, don't advertise it.

So how is `dri2BindExtensions` changed. Some things passed beforehand
are already available in `struct dri2_screen *psc`?

Are bugs fixed by this or did you find this reading through the code?

> We might also be able to get rid of the vmwgfx check (I'm not quite
> sure the purpose of that check vs. just checking dri2Minor.

Missing ?)?.

> Signed-off-by: Rob Clark 
> ---
>  src/glx/dri2_glx.c | 12 
>  1 file changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/src/glx/dri2_glx.c b/src/glx/dri2_glx.c
> index c4f6996..b2d712c 100644
> --- a/src/glx/dri2_glx.c
> +++ b/src/glx/dri2_glx.c
> @@ -1051,11 +1051,16 @@ static const struct glx_context_vtable 
> dri2_context_vtable = {
>  };
>  
>  static void
> -dri2BindExtensions(struct dri2_screen *psc, const __DRIextension 
> **extensions,
> +dri2BindExtensions(struct dri2_screen *psc, struct glx_display * priv,

No space after the * in `* priv`?

> const char *driverName)
>  {
> +   const struct dri2_display *const pdp = (struct dri2_display *)
> +  priv->dri2Display;
> +   const __DRIextension **extensions;
> int i;
>  
> +   extensions = psc->core->getExtensions(psc->driScreen);
> +
> __glXEnableDirectExtension(&psc->base, "GLX_SGI_video_sync");
> __glXEnableDirectExtension(&psc->base, "GLX_SGI_swap_control");
> __glXEnableDirectExtension(&psc->base, "GLX_MESA_swap_control");
> @@ -1069,7 +1074,7 @@ dri2BindExtensions(struct dri2_screen *psc, const 
> __DRIextension **extensions,
>  * of disabling it uncondtionally, just disable it for drivers
>  * which are known to not support it.
>  */
> -   if (strcmp(driverName, "vmwgfx") != 0) {
> +   if (pdp->swapAvailable && strcmp(driverName, "vmwgfx") != 0) {
>__glXEnableDirectExtension(&psc->base, "GLX_INTEL_swap_event");
> }
>  
> @@ -1212,8 +1217,7 @@ dri2CreateScreen(int screen, struct glx_display * priv)
>goto handle_error;
> }
>  
> -   extensions = psc->core->getExtensions(psc->driScreen);
> -   dri2BindExtensions(psc, extensions, driverName);
> +   dri2BindExtensions(psc, priv, driverName);
>  
> configs = driConvertConfigs(psc->core, psc->base.configs, driver_configs);
> visuals = driConvertConfigs(psc->core, psc->base.visuals, driver_configs);


Thanks,

Paul
-- next part --
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 198 bytes
Desc: This is a digitally signed message part
URL: 
<http://lists.freedesktop.org/archives/dri-devel/attachments/20130313/d945302d/attachment.pgp>

[PATCHv7 00/10] Support for Tegra 2D hardware

[Terje Bergstrom]

This set of patches adds support for Tegra20 and Tegra30 host1x and
2D. It is based on linux-next-20130307.

Changes in this version:
 * host1x memory data structures refactored
 * Some "nvhost" leftovers renamed to host1x

Changes in previous version 6:
 * Rebased on latest tegradrm
 * Renamed tegradrm's host1x to host1x_drm
 * Indentation and line split fixed to follow tegradrm convention
 * Pointers to platform_device replaced with pointers to device
 * Added host1x allocator, and wired it in
 * Debug spew code fixed to access mem handles from host1x_job
 * CDMA code doesn't keep the mem handles anymore
 * Push buffer ops have been made generic code
 * Removed the pin_array optimization in host1x_job to simplify code
 * Large number of smaller changes

The driver implements an allocator using the DRM CMA helper. Each buffer is
assigned an ops structure to operate on it. In future the DRM CMA helper will
be replaced with an own allocator to implement IOMMU support.

host1x is the driver that controls host1x hardware. It supports
host1x command channels, synchronization, and memory management. It
is sectioned into logical driver under drivers/gpu/host1x and
physical driver under drivers/host1x/hw. The physical driver is
compiled with the hardware headers of the particular host1x version.

The hardware units are described (briefly) in the Tegra2 TRM. Wiki
page http://http.download.nvidia.com/tegra-public-appnotes/host1x.html
also contains a short description of the functionality.

The patch set merges tegradrm into host1x and adds 2D driver, which
uses host1x channels and sync points. The patch set also adds user
space API to tegradrm for accessing host1x and 2D.

The changes to add support to libdrm are in
git at gitorious.org:linux-host1x/libdrm-host1x.git

Arto Merilainen (3):
  gpu: drm: Support CMA object preallocation
  gpu: host1x: drm: Rename host1x to host1x_drm
  gpu: host1x: drm: Add CMA ops for host1x driver

Terje Bergstrom (7):
  gpu: host1x: Add host1x driver
  gpu: host1x: Add syncpoint wait and interrupts
  gpu: host1x: Add channel support
  gpu: host1x: Add debug support
  drm: tegra: Move drm to live under host1x
  gpu: host1x: Remove second host1x driver
  drm: tegra: Add gr2d device

 drivers/gpu/Makefile   |1 +
 drivers/gpu/drm/Kconfig|2 -
 drivers/gpu/drm/Makefile   |1 -
 drivers/gpu/drm/drm_gem_cma_helper.c   |   78 ++-
 drivers/gpu/drm/tegra/Makefile |7 -
 drivers/gpu/drm/tegra/drm.c|  217 
 drivers/gpu/drm/tegra/host1x.c |  327 
 drivers/gpu/host1x/Kconfig |   23 +
 drivers/gpu/host1x/Makefile|   20 +
 drivers/gpu/host1x/cdma.c  |  491 +
 drivers/gpu/host1x/cdma.h  |  100 
 drivers/gpu/host1x/channel.c   |  120 +
 drivers/gpu/host1x/channel.h   |   52 ++
 drivers/gpu/host1x/debug.c |  210 
 drivers/gpu/host1x/debug.h |   51 ++
 drivers/gpu/host1x/dev.c   |  248 +
 drivers/gpu/host1x/dev.h   |  316 +++
 drivers/gpu/{drm/tegra => host1x/drm}/Kconfig  |2 +-
 drivers/gpu/host1x/drm/cma.c   |   93 
 drivers/gpu/host1x/drm/cma.h   |   35 ++
 drivers/gpu/{drm/tegra => host1x/drm}/dc.c |5 +-
 drivers/gpu/{drm/tegra => host1x/drm}/dc.h |0
 drivers/gpu/host1x/drm/drm.c   |  673 
 drivers/gpu/{drm/tegra => host1x/drm}/drm.h|   51 +-
 drivers/gpu/{drm/tegra => host1x/drm}/fb.c |6 +-
 drivers/gpu/host1x/drm/gr2d.c  |  330 
 drivers/gpu/{drm/tegra => host1x/drm}/hdmi.c   |5 +-
 drivers/gpu/{drm/tegra => host1x/drm}/hdmi.h   |0
 drivers/gpu/{drm/tegra => host1x/drm}/output.c |0
 drivers/gpu/{drm/tegra => host1x/drm}/rgb.c|0
 drivers/gpu/host1x/host1x.h|   29 +
 drivers/gpu/host1x/host1x_bo.h |   92 
 drivers/gpu/host1x/host1x_client.h |   35 ++
 drivers/gpu/host1x/hw/Makefile |6 +
 drivers/gpu/host1x/hw/cdma_hw.c|  326 
 drivers/gpu/host1x/hw/channel_hw.c |  167 ++
 drivers/gpu/host1x/hw/debug_hw.c   |  322 
 drivers/gpu/host1x/hw/host1x01.c   |   42 ++
 drivers/gpu/host1x/hw/host1x01.h   |   25 +
 drivers/gpu/host1x/hw/host1x01_hardware.h  |  143 +
 drivers/gpu/host1x/hw/hw_host1x01_channel.h|  120 +
 drivers/gpu/host1x/hw/hw_host1x01_sync.h   |  243 +
 drivers/gpu/host1x/hw/hw_host1x01_uclass.h |  174 ++
 drivers/gpu/host1x/hw/intr_hw.c|  143 +
 drivers/gpu/host1x/hw/syncpt_hw.c  |  114 
 drivers/gpu/host1x/intr.

[PATCHv7 06/10] drm: tegra: Move drm to live under host1x

[Terje Bergstrom]

Make drm part of host1x driver.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/drm/Kconfig|2 --
 drivers/gpu/drm/Makefile   |1 -
 drivers/gpu/drm/tegra/Makefile |7 ---
 drivers/gpu/host1x/Kconfig |2 ++
 drivers/gpu/host1x/Makefile|5 +
 drivers/gpu/{drm/tegra => host1x/drm}/Kconfig  |0
 drivers/gpu/{drm/tegra => host1x/drm}/dc.c |0
 drivers/gpu/{drm/tegra => host1x/drm}/dc.h |0
 drivers/gpu/{drm/tegra => host1x/drm}/drm.c|0
 drivers/gpu/{drm/tegra => host1x/drm}/drm.h|6 +++---
 drivers/gpu/{drm/tegra => host1x/drm}/fb.c |0
 drivers/gpu/{drm/tegra => host1x/drm}/hdmi.c   |0
 drivers/gpu/{drm/tegra => host1x/drm}/hdmi.h   |0
 drivers/gpu/{drm/tegra => host1x/drm}/host1x.c |0
 drivers/gpu/{drm/tegra => host1x/drm}/output.c |0
 drivers/gpu/{drm/tegra => host1x/drm}/rgb.c|0
 16 files changed, 10 insertions(+), 13 deletions(-)
 delete mode 100644 drivers/gpu/drm/tegra/Makefile
 rename drivers/gpu/{drm/tegra => host1x/drm}/Kconfig (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/dc.c (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/dc.h (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/drm.c (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/drm.h (98%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/fb.c (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/hdmi.c (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/hdmi.h (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/host1x.c (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/output.c (100%)
 rename drivers/gpu/{drm/tegra => host1x/drm}/rgb.c (100%)

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 1e82882..9031bb7 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -215,8 +215,6 @@ source "drivers/gpu/drm/cirrus/Kconfig"

 source "drivers/gpu/drm/shmobile/Kconfig"

-source "drivers/gpu/drm/tegra/Kconfig"
-
 source "drivers/gpu/drm/omapdrm/Kconfig"

 source "drivers/gpu/drm/tilcdc/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 0d59b24..847b830 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -49,7 +49,6 @@ obj-$(CONFIG_DRM_GMA500) += gma500/
 obj-$(CONFIG_DRM_UDL) += udl/
 obj-$(CONFIG_DRM_AST) += ast/
 obj-$(CONFIG_DRM_SHMOBILE) +=shmobile/
-obj-$(CONFIG_DRM_TEGRA) += tegra/
 obj-$(CONFIG_DRM_OMAP) += omapdrm/
 obj-$(CONFIG_DRM_TILCDC)   += tilcdc/
 obj-y  += i2c/
diff --git a/drivers/gpu/drm/tegra/Makefile b/drivers/gpu/drm/tegra/Makefile
deleted file mode 100644
index 80f73d1..000
--- a/drivers/gpu/drm/tegra/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-ccflags-y := -Iinclude/drm
-ccflags-$(CONFIG_DRM_TEGRA_DEBUG) += -DDEBUG
-
-tegra-drm-y := drm.o fb.o dc.o host1x.o
-tegra-drm-y += output.o rgb.o hdmi.o
-
-obj-$(CONFIG_DRM_TEGRA) += tegra-drm.o
diff --git a/drivers/gpu/host1x/Kconfig b/drivers/gpu/host1x/Kconfig
index 00f0859..ee3af1e 100644
--- a/drivers/gpu/host1x/Kconfig
+++ b/drivers/gpu/host1x/Kconfig
@@ -18,4 +18,6 @@ config TEGRA_HOST1X_FIREWALL

  If unsure, choose Y.

+source "drivers/gpu/host1x/drm/Kconfig"
+
 endif
diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index 49fd580..4761e8a 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -10,4 +10,9 @@ host1x-y = \
debug.o \
hw/host1x01.o

+ccflags-y += -Iinclude/drm
+ccflags-$(CONFIG_DRM_TEGRA_DEBUG) += -DDEBUG
+
+host1x-$(CONFIG_DRM_TEGRA) += drm/drm.o drm/fb.o drm/dc.o drm/host1x.o
+host1x-$(CONFIG_DRM_TEGRA) += drm/output.o drm/rgb.o drm/hdmi.o
 obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/drm/tegra/Kconfig b/drivers/gpu/host1x/drm/Kconfig
similarity index 100%
rename from drivers/gpu/drm/tegra/Kconfig
rename to drivers/gpu/host1x/drm/Kconfig
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/host1x/drm/dc.c
similarity index 100%
rename from drivers/gpu/drm/tegra/dc.c
rename to drivers/gpu/host1x/drm/dc.c
diff --git a/drivers/gpu/drm/tegra/dc.h b/drivers/gpu/host1x/drm/dc.h
similarity index 100%
rename from drivers/gpu/drm/tegra/dc.h
rename to drivers/gpu/host1x/drm/dc.h
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/host1x/drm/drm.c
similarity index 100%
rename from drivers/gpu/drm/tegra/drm.c
rename to drivers/gpu/host1x/drm/drm.c
diff --git a/drivers/gpu/drm/tegra/drm.h b/drivers/gpu/host1x/drm/drm.h
similarity index 98%
rename from drivers/gpu/drm/tegra/drm.h
rename to drivers/gpu/host1x/drm/drm.h
index 6dd75a2..a6c011d 100644
--- a/drivers/gpu/drm/tegra/drm.h
+++ b/drivers/gpu/host1x/drm/drm.h
@@ -7,8 +7,8 @@
  * published by the Free Software Foundation.
  */

-#ifndef TEGRA_DRM_H
-#define TEGRA_DRM_H 1
+#ifndef HOST1X_DRM_H
+#define HOST1X_DRM_H 1

 #include 
 #include 
@@ -234,4 +234,4 @@ extern struct platform_driver tegra_hdmi_dr

[PATCHv7 03/10] gpu: host1x: Add syncpoint wait and interrupts

[Terje Bergstrom]

Add support for sync point interrupts, and sync point wait. Sync
point wait used interrupts for unblocking wait.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/Makefile  |1 +
 drivers/gpu/host1x/dev.c |   12 ++
 drivers/gpu/host1x/dev.h |   51 +
 drivers/gpu/host1x/hw/host1x01.c |2 +
 drivers/gpu/host1x/hw/hw_host1x01_sync.h |   42 
 drivers/gpu/host1x/hw/intr_hw.c  |  143 +
 drivers/gpu/host1x/intr.c|  328 ++
 drivers/gpu/host1x/intr.h|   96 +
 drivers/gpu/host1x/syncpt.c  |  159 +++
 drivers/gpu/host1x/syncpt.h  |   14 +-
 10 files changed, 847 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/host1x/hw/intr_hw.c
 create mode 100644 drivers/gpu/host1x/intr.c
 create mode 100644 drivers/gpu/host1x/intr.h

diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index 363e6ab..5ef47ff 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -3,6 +3,7 @@ ccflags-y = -Idrivers/gpu/host1x
 host1x-y = \
syncpt.o \
dev.o \
+   intr.o \
hw/host1x01.o

 obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index d95a9b2..4421e28 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -28,6 +28,7 @@
 #include 

 #include "dev.h"
+#include "intr.h"
 #include "hw/host1x01.h"

 void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)
@@ -127,12 +128,23 @@ static int host1x_probe(struct platform_device *pdev)
return err;
}

+   err = host1x_intr_init(host, syncpt_irq);
+   if (err) {
+   dev_err(dev, "failed to init irq");
+   goto fail_deinit_syncpt;
+   }
+
return 0;
+
+fail_deinit_syncpt:
+   host1x_syncpt_deinit(host);
+   return err;
 }

 static int __exit host1x_remove(struct platform_device *pdev)
 {
struct host1x *host = platform_get_drvdata(pdev);
+   host1x_intr_deinit(host);
host1x_syncpt_deinit(host);
clk_disable_unprepare(host->clk);
return 0;
diff --git a/drivers/gpu/host1x/dev.h b/drivers/gpu/host1x/dev.h
index 750daa3..fb5f842 100644
--- a/drivers/gpu/host1x/dev.h
+++ b/drivers/gpu/host1x/dev.h
@@ -21,6 +21,7 @@
 #include 

 #include "syncpt.h"
+#include "intr.h"

 struct host1x_syncpt;

@@ -33,6 +34,17 @@ struct host1x_syncpt_ops {
int (*patch_wait)(struct host1x_syncpt *syncpt, void *patch_addr);
 };

+struct host1x_intr_ops {
+   int (*init_host_sync)(struct host1x *host, u32 cpm,
+   void (*syncpt_thresh_work)(struct work_struct *work));
+   void (*set_syncpt_threshold)(
+   struct host1x *host, u32 id, u32 thresh);
+   void (*enable_syncpt_intr)(struct host1x *host, u32 id);
+   void (*disable_syncpt_intr)(struct host1x *host, u32 id);
+   void (*disable_all_syncpt_intrs)(struct host1x *host);
+   int (*free_syncpt_irq)(struct host1x *host);
+};
+
 struct host1x_info {
int nb_channels;/* host1x: num channels supported */
int nb_pts; /* host1x: num syncpoints supported */
@@ -50,7 +62,13 @@ struct host1x {
struct device *dev;
struct clk *clk;

+   struct mutex intr_mutex;
+   struct workqueue_struct *intr_wq;
+   int intr_syncpt_irq;
+
const struct host1x_syncpt_ops *syncpt_op;
+   const struct host1x_intr_ops *intr_op;
+
 };

 static inline struct host1x *host1x_get_host(struct device *dev)
@@ -101,4 +119,37 @@ static inline int host1x_hw_syncpt_patch_wait(struct 
host1x *host,
return host->syncpt_op->patch_wait(sp, patch_addr);
 }

+static inline int host1x_hw_intr_init_host_sync(struct host1x *host, u32 cpm,
+   void (*syncpt_thresh_work)(struct work_struct *))
+{
+   return host->intr_op->init_host_sync(host, cpm, syncpt_thresh_work);
+}
+
+static inline void host1x_hw_intr_set_syncpt_threshold(struct host1x *host,
+  u32 id, u32 thresh)
+{
+   host->intr_op->set_syncpt_threshold(host, id, thresh);
+}
+
+static inline void host1x_hw_intr_enable_syncpt_intr(struct host1x *host,
+u32 id)
+{
+   host->intr_op->enable_syncpt_intr(host, id);
+}
+
+static inline void host1x_hw_intr_disable_syncpt_intr(struct host1x *host,
+ u32 id)
+{
+   host->intr_op->disable_syncpt_intr(host, id);
+}
+
+static inline void host1x_hw_intr_disable_all_syncpt_intrs(struct host1x *host)
+{
+   host->intr_op->disable_all_syncpt_intrs(host);
+}
+
+static inline int host1x_hw_intr_free_syncpt_irq(struct host1x *host)
+{
+   return host->intr_op->free_syncpt_irq(host);
+}
 #endif
diff --git a/

[PATCHv7 09/10] gpu: host1x: drm: Add CMA ops for host1x driver

[Terje Bergstrom]

From: Arto Merilainen 

This patch implements a CMA memory handler for the host1x driver.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/Makefile  |1 +
 drivers/gpu/host1x/drm/cma.c |   93 ++
 drivers/gpu/host1x/drm/cma.h |   35 
 3 files changed, 129 insertions(+)
 create mode 100644 drivers/gpu/host1x/drm/cma.c
 create mode 100644 drivers/gpu/host1x/drm/cma.h

diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index 9a6fc76..e85db5a 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -15,4 +15,5 @@ ccflags-$(CONFIG_DRM_TEGRA_DEBUG) += -DDEBUG

 host1x-$(CONFIG_DRM_TEGRA) += drm/drm.o drm/fb.o drm/dc.o
 host1x-$(CONFIG_DRM_TEGRA) += drm/output.o drm/rgb.o drm/hdmi.o
+host1x-$(CONFIG_DRM_TEGRA) += drm/cma.o
 obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/drm/cma.c b/drivers/gpu/host1x/drm/cma.c
new file mode 100644
index 000..cf86fce
--- /dev/null
+++ b/drivers/gpu/host1x/drm/cma.c
@@ -0,0 +1,93 @@
+/*
+ * Tegra host1x CMA support
+ *
+ * Copyright (c) 2012-2013, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include "cma.h"
+#include "host1x_bo.h"
+
+static void cma_put(struct host1x_bo *bo)
+{
+   struct tegra_drm_bo *cma_bo =
+   container_of(bo, struct tegra_drm_bo, base);
+   struct drm_device *drm = cma_bo->cma_obj.base.dev;
+
+   mutex_lock(&drm->struct_mutex);
+   drm_gem_object_unreference(&cma_bo->cma_obj.base);
+   mutex_unlock(&drm->struct_mutex);
+}
+
+static dma_addr_t cma_pin(struct host1x_bo *bo, struct sg_table **sgt)
+{
+   struct tegra_drm_bo *cma_bo =
+   container_of(bo, struct tegra_drm_bo, base);
+   return cma_bo->cma_obj.paddr;
+}
+
+static void cma_unpin(struct host1x_bo *bo, struct sg_table *sgt)
+{
+}
+
+static void *cma_mmap(struct host1x_bo *bo)
+{
+   struct tegra_drm_bo *cma_bo =
+   container_of(bo, struct tegra_drm_bo, base);
+   return cma_bo->cma_obj.vaddr;
+}
+
+static void cma_munmap(struct host1x_bo *bo, void *addr)
+{
+}
+
+static void *cma_kmap(struct host1x_bo *bo, unsigned int pagenum)
+{
+   struct tegra_drm_bo *cma_bo =
+   container_of(bo, struct tegra_drm_bo, base);
+   return cma_bo->cma_obj.vaddr + pagenum * PAGE_SIZE;
+}
+
+static void cma_kunmap(struct host1x_bo *bo, unsigned int pagenum, void *addr)
+{
+}
+
+static struct host1x_bo *cma_get(struct host1x_bo *bo)
+{
+   struct tegra_drm_bo *cma_bo =
+   container_of(bo, struct tegra_drm_bo, base);
+   struct drm_device *drm = cma_bo->cma_obj.base.dev;
+
+   mutex_lock(&drm->struct_mutex);
+   drm_gem_object_reference(&cma_bo->cma_obj.base);
+   mutex_unlock(&drm->struct_mutex);
+
+   return bo;
+}
+
+const struct host1x_bo_ops tegra_drm_bo_ops = {
+   .get = cma_get,
+   .put = cma_put,
+   .pin = cma_pin,
+   .unpin = cma_unpin,
+   .mmap = cma_mmap,
+   .munmap = cma_munmap,
+   .kmap = cma_kmap,
+   .kunmap = cma_kunmap,
+};
diff --git a/drivers/gpu/host1x/drm/cma.h b/drivers/gpu/host1x/drm/cma.h
new file mode 100644
index 000..f35cebd
--- /dev/null
+++ b/drivers/gpu/host1x/drm/cma.h
@@ -0,0 +1,35 @@
+/*
+ * Tegra host1x cma memory manager
+ *
+ * Copyright (c) 2012-2013, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#ifndef __HOST1X_CMA_H
+#define __HOST1X_CMA_H
+
+#include 
+#include 
+#include 
+
+#include "host1x_bo.h"
+
+struct tegra_drm_bo {
+   struct host1x_bo base;
+   struct drm_gem_cma_object cma_obj;
+};
+
+extern const struct host1x_bo_ops tegra_drm_bo_ops;
+
+#endif
-- 
1.7.9.5

[PATCHv7 02/10] gpu: host1x: Add host1x driver

[Terje Bergstrom]

Add host1x, the driver for host1x and its client unit 2D. The Tegra
host1x module is the DMA engine for register access to Tegra's
graphics- and multimedia-related modules. The modules served by
host1x are referred to as clients. host1x includes some other
functionality, such as synchronization.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/Makefile  |1 +
 drivers/gpu/host1x/Kconfig|9 ++
 drivers/gpu/host1x/Makefile   |8 ++
 drivers/gpu/host1x/dev.c  |  155 +
 drivers/gpu/host1x/dev.h  |  104 ++
 drivers/gpu/host1x/hw/Makefile|6 +
 drivers/gpu/host1x/hw/host1x01.c  |   33 +
 drivers/gpu/host1x/hw/host1x01.h  |   25 
 drivers/gpu/host1x/hw/host1x01_hardware.h |   27 
 drivers/gpu/host1x/hw/hw_host1x01_sync.h  |   74 ++
 drivers/gpu/host1x/hw/syncpt_hw.c |  102 ++
 drivers/gpu/host1x/syncpt.c   |  212 +
 drivers/gpu/host1x/syncpt.h   |  147 
 drivers/video/Kconfig |2 +
 include/trace/events/host1x.h |   61 +
 15 files changed, 966 insertions(+)
 create mode 100644 drivers/gpu/host1x/Kconfig
 create mode 100644 drivers/gpu/host1x/Makefile
 create mode 100644 drivers/gpu/host1x/dev.c
 create mode 100644 drivers/gpu/host1x/dev.h
 create mode 100644 drivers/gpu/host1x/hw/Makefile
 create mode 100644 drivers/gpu/host1x/hw/host1x01.c
 create mode 100644 drivers/gpu/host1x/hw/host1x01.h
 create mode 100644 drivers/gpu/host1x/hw/host1x01_hardware.h
 create mode 100644 drivers/gpu/host1x/hw/hw_host1x01_sync.h
 create mode 100644 drivers/gpu/host1x/hw/syncpt_hw.c
 create mode 100644 drivers/gpu/host1x/syncpt.c
 create mode 100644 drivers/gpu/host1x/syncpt.h
 create mode 100644 include/trace/events/host1x.h

diff --git a/drivers/gpu/Makefile b/drivers/gpu/Makefile
index 30879df..d8a22c2 100644
--- a/drivers/gpu/Makefile
+++ b/drivers/gpu/Makefile
@@ -1 +1,2 @@
 obj-y  += drm/ vga/
+obj-$(CONFIG_TEGRA_HOST1X) += host1x/
diff --git a/drivers/gpu/host1x/Kconfig b/drivers/gpu/host1x/Kconfig
new file mode 100644
index 000..c01c450
--- /dev/null
+++ b/drivers/gpu/host1x/Kconfig
@@ -0,0 +1,9 @@
+config TEGRA_HOST1X
+   tristate "NVIDIA Tegra host1x driver"
+   help
+ Driver for the NVIDIA Tegra host1x hardware.
+
+ The Tegra host1x module is the DMA engine for register access to
+ Tegra's graphics- and multimedia-related modules. The modules served
+ by host1x are referred to as clients. host1x includes some other
+ functionality, such as synchronization.
diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
new file mode 100644
index 000..363e6ab
--- /dev/null
+++ b/drivers/gpu/host1x/Makefile
@@ -0,0 +1,8 @@
+ccflags-y = -Idrivers/gpu/host1x
+
+host1x-y = \
+   syncpt.o \
+   dev.o \
+   hw/host1x01.o
+
+obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
new file mode 100644
index 000..d95a9b2
--- /dev/null
+++ b/drivers/gpu/host1x/dev.c
@@ -0,0 +1,155 @@
+/*
+ * Tegra host1x driver
+ *
+ * Copyright (c) 2010-2013, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define CREATE_TRACE_POINTS
+#include 
+
+#include "dev.h"
+#include "hw/host1x01.h"
+
+void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)
+{
+   void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;
+
+   writel(v, sync_regs + r);
+}
+
+u32 host1x_sync_readl(struct host1x *host1x, u32 r)
+{
+   void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;
+
+   return readl(sync_regs + r);
+}
+
+static const struct host1x_info host1x01_info = {
+   .nb_channels= 8,
+   .nb_pts = 32,
+   .nb_mlocks  = 16,
+   .nb_bases   = 8,
+   .init   = host1x01_init,
+   .sync_offset= 0x3000,
+};
+
+static struct of_device_id host1x_match[] = {
+   { .compatible = "nvidia,tegra30-host1x", .data = &host1x01_info, },
+   { .compatible = "nvidia,tegra20-host1x", .data = &host1x01_info, },
+   { },
+};
+
+static int 

[PATCHv7 07/10] gpu: host1x: drm: Rename host1x to host1x_drm

[Terje Bergstrom]

From: Arto Merilainen 

Both host1x and drm drivers have host1x structures. This patch
renames the host1x structure under drm to follow name host1x_drm.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/drm/dc.c |4 ++--
 drivers/gpu/host1x/drm/drm.c|4 ++--
 drivers/gpu/host1x/drm/drm.h|   14 +++---
 drivers/gpu/host1x/drm/fb.c |6 +++---
 drivers/gpu/host1x/drm/hdmi.c   |4 ++--
 drivers/gpu/host1x/drm/host1x.c |   22 --
 6 files changed, 28 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/host1x/drm/dc.c b/drivers/gpu/host1x/drm/dc.c
index de94707..d1f6609 100644
--- a/drivers/gpu/host1x/drm/dc.c
+++ b/drivers/gpu/host1x/drm/dc.c
@@ -1097,7 +1097,7 @@ static const struct host1x_client_ops dc_client_ops = {

 static int tegra_dc_probe(struct platform_device *pdev)
 {
-   struct host1x *host1x = dev_get_drvdata(pdev->dev.parent);
+   struct host1x_drm *host1x = dev_get_drvdata(pdev->dev.parent);
struct resource *regs;
struct tegra_dc *dc;
int err;
@@ -1160,7 +1160,7 @@ static int tegra_dc_probe(struct platform_device *pdev)

 static int tegra_dc_remove(struct platform_device *pdev)
 {
-   struct host1x *host1x = dev_get_drvdata(pdev->dev.parent);
+   struct host1x_drm *host1x = dev_get_drvdata(pdev->dev.parent);
struct tegra_dc *dc = platform_get_drvdata(pdev);
int err;

diff --git a/drivers/gpu/host1x/drm/drm.c b/drivers/gpu/host1x/drm/drm.c
index 9d452df..6c59bcd 100644
--- a/drivers/gpu/host1x/drm/drm.c
+++ b/drivers/gpu/host1x/drm/drm.c
@@ -26,7 +26,7 @@
 static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
 {
struct device *dev = drm->dev;
-   struct host1x *host1x;
+   struct host1x_drm *host1x;
int err;

host1x = dev_get_drvdata(dev);
@@ -69,7 +69,7 @@ static int tegra_drm_open(struct drm_device *drm, struct 
drm_file *filp)

 static void tegra_drm_lastclose(struct drm_device *drm)
 {
-   struct host1x *host1x = drm->dev_private;
+   struct host1x_drm *host1x = drm->dev_private;

drm_fbdev_cma_restore_mode(host1x->fbdev);
 }
diff --git a/drivers/gpu/host1x/drm/drm.h b/drivers/gpu/host1x/drm/drm.h
index a6c011d..7fedb6c 100644
--- a/drivers/gpu/host1x/drm/drm.h
+++ b/drivers/gpu/host1x/drm/drm.h
@@ -18,7 +18,7 @@
 #include 
 #include 

-struct host1x {
+struct host1x_drm {
struct drm_device *drm;
struct device *dev;
void __iomem *regs;
@@ -44,7 +44,7 @@ struct host1x_client_ops {
 };

 struct host1x_client {
-   struct host1x *host1x;
+   struct host1x_drm *host1x;
struct device *dev;

const struct host1x_client_ops *ops;
@@ -52,12 +52,12 @@ struct host1x_client {
struct list_head list;
 };

-extern int host1x_drm_init(struct host1x *host1x, struct drm_device *drm);
-extern int host1x_drm_exit(struct host1x *host1x);
+extern int host1x_drm_init(struct host1x_drm *host1x, struct drm_device *drm);
+extern int host1x_drm_exit(struct host1x_drm *host1x);

-extern int host1x_register_client(struct host1x *host1x,
+extern int host1x_register_client(struct host1x_drm *host1x,
  struct host1x_client *client);
-extern int host1x_unregister_client(struct host1x *host1x,
+extern int host1x_unregister_client(struct host1x_drm *host1x,
struct host1x_client *client);

 struct tegra_output;
@@ -66,7 +66,7 @@ struct tegra_dc {
struct host1x_client client;
spinlock_t lock;

-   struct host1x *host1x;
+   struct host1x_drm *host1x;
struct device *dev;

struct drm_crtc base;
diff --git a/drivers/gpu/host1x/drm/fb.c b/drivers/gpu/host1x/drm/fb.c
index 0391495..6ed885a 100644
--- a/drivers/gpu/host1x/drm/fb.c
+++ b/drivers/gpu/host1x/drm/fb.c
@@ -11,7 +11,7 @@

 static void tegra_drm_fb_output_poll_changed(struct drm_device *drm)
 {
-   struct host1x *host1x = drm->dev_private;
+   struct host1x_drm *host1x = drm->dev_private;

drm_fbdev_cma_hotplug_event(host1x->fbdev);
 }
@@ -23,7 +23,7 @@ static const struct drm_mode_config_funcs 
tegra_drm_mode_funcs = {

 int tegra_drm_fb_init(struct drm_device *drm)
 {
-   struct host1x *host1x = drm->dev_private;
+   struct host1x_drm *host1x = drm->dev_private;
struct drm_fbdev_cma *fbdev;

drm->mode_config.min_width = 0;
@@ -46,7 +46,7 @@ int tegra_drm_fb_init(struct drm_device *drm)

 void tegra_drm_fb_exit(struct drm_device *drm)
 {
-   struct host1x *host1x = drm->dev_private;
+   struct host1x_drm *host1x = drm->dev_private;

drm_fbdev_cma_fini(host1x->fbdev);
 }
diff --git a/drivers/gpu/host1x/drm/hdmi.c b/drivers/gpu/host1x/drm/hdmi.c
index bb747f6..f438f80 100644
--- a/drivers/gpu/host1x/drm/hdmi.c
+++ b/drivers/gpu/host1x/drm/hdmi.c
@@ -1189,7 +1189,7 @@ static const struct host1x_client_ops hdmi_client_ops = {

 static int tegra_hdm

[PATCHv7 01/10] gpu: drm: Support CMA object preallocation

[Terje Bergstrom]

From: Arto Merilainen 

This patch adds helper functions drm_gem_cma_init() and
drm_gem_cma_deinit() for handling CMA structures that already have
been allocated. This allows embedding the CMA structure inside other
structures.

Signed-off-by: Arto Merilainen 
---
 drivers/gpu/drm/drm_gem_cma_helper.c |   78 --
 include/drm/drm_gem_cma_helper.h |9 
 2 files changed, 64 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c 
b/drivers/gpu/drm/drm_gem_cma_helper.c
index 0a7e011..3b14280 100644
--- a/drivers/gpu/drm/drm_gem_cma_helper.c
+++ b/drivers/gpu/drm/drm_gem_cma_helper.c
@@ -2,6 +2,7 @@
  * drm gem CMA (contiguous memory allocator) helper functions
  *
  * Copyright (C) 2012 Sascha Hauer, Pengutronix
+ * Copyright (C) 2013 NVIDIA CORPORATION, All rights reserved.
  *
  * Based on Samsung Exynos code
  *
@@ -40,30 +41,25 @@ static void drm_gem_cma_buf_destroy(struct drm_device *drm,
 }

 /*
- * drm_gem_cma_create - allocate an object with the given size
+ * drm_gem_cma_object_init - allocate buffer and initialize given cma object
  *
- * returns a struct drm_gem_cma_object* on success or ERR_PTR values
- * on failure.
+ * this function allocates memory for a cma buffer and initializes the given
+ * cma object to use the allocated buffer.
  */
-struct drm_gem_cma_object *drm_gem_cma_create(struct drm_device *drm,
-   unsigned int size)
+
+int drm_gem_cma_object_init(struct drm_device *drm,
+   struct drm_gem_cma_object *cma_obj, unsigned int size)
 {
-   struct drm_gem_cma_object *cma_obj;
struct drm_gem_object *gem_obj;
int ret;

size = round_up(size, PAGE_SIZE);

-   cma_obj = kzalloc(sizeof(*cma_obj), GFP_KERNEL);
-   if (!cma_obj)
-   return ERR_PTR(-ENOMEM);
-
cma_obj->vaddr = dma_alloc_writecombine(drm->dev, size,
&cma_obj->paddr, GFP_KERNEL | __GFP_NOWARN);
if (!cma_obj->vaddr) {
dev_err(drm->dev, "failed to allocate buffer with size %d\n", 
size);
-   ret = -ENOMEM;
-   goto err_dma_alloc;
+   return -ENOMEM;
}

gem_obj = &cma_obj->base;
@@ -76,7 +72,7 @@ struct drm_gem_cma_object *drm_gem_cma_create(struct 
drm_device *drm,
if (ret)
goto err_create_mmap_offset;

-   return cma_obj;
+   return 0;

 err_create_mmap_offset:
drm_gem_object_release(gem_obj);
@@ -84,10 +80,36 @@ err_create_mmap_offset:
 err_obj_init:
drm_gem_cma_buf_destroy(drm, cma_obj);

-err_dma_alloc:
-   kfree(cma_obj);
+   return ret;
+}
+EXPORT_SYMBOL_GPL(drm_gem_cma_object_init);
+
+/*
+ * drm_gem_cma_create - allocate an object with the given size
+ *
+ * returns a struct drm_gem_cma_object* on success or ERR_PTR values
+ * on failure.
+ */
+struct drm_gem_cma_object *drm_gem_cma_create(struct drm_device *drm,
+   unsigned int size)
+{
+   struct drm_gem_cma_object *cma_obj;
+   int ret;
+
+   size = round_up(size, PAGE_SIZE);
+
+   cma_obj = kzalloc(sizeof(*cma_obj), GFP_KERNEL);
+   if (!cma_obj)
+   return ERR_PTR(-ENOMEM);
+
+   ret = drm_gem_cma_object_init(drm, cma_obj, size);
+   if (ret) {
+   kfree(cma_obj);
+   return ERR_PTR(ret);
+   }
+
+   return cma_obj;

-   return ERR_PTR(ret);
 }
 EXPORT_SYMBOL_GPL(drm_gem_cma_create);

@@ -133,22 +155,32 @@ err_handle_create:
 }

 /*
- * drm_gem_cma_free_object - (struct drm_driver)->gem_free_object callback
- * function
+ * drm_gem_cma_deinit_object - deinitialize cma object
+ *
+ * this function deinitializes the given cma object without releasing the
+ * object memory. this function is a counterpart for the function
+ * drm_gem_cma_object_init().
  */
-void drm_gem_cma_free_object(struct drm_gem_object *gem_obj)
+void drm_gem_cma_object_deinit(struct drm_gem_object *gem_obj)
 {
-   struct drm_gem_cma_object *cma_obj;
+   struct drm_gem_cma_object *cma_obj = to_drm_gem_cma_obj(gem_obj);

if (gem_obj->map_list.map)
drm_gem_free_mmap_offset(gem_obj);

drm_gem_object_release(gem_obj);
-
-   cma_obj = to_drm_gem_cma_obj(gem_obj);
-
drm_gem_cma_buf_destroy(gem_obj->dev, cma_obj);
+}
+EXPORT_SYMBOL_GPL(drm_gem_cma_object_deinit);

+/*
+ * drm_gem_cma_free_object - (struct drm_driver)->gem_free_object callback
+ * function
+ */
+void drm_gem_cma_free_object(struct drm_gem_object *gem_obj)
+{
+   struct drm_gem_cma_object *cma_obj = to_drm_gem_cma_obj(gem_obj);
+   drm_gem_cma_object_deinit(gem_obj);
kfree(cma_obj);
 }
 EXPORT_SYMBOL_GPL(drm_gem_cma_free_object);
diff --git a/include/drm/drm_gem_cma_helper.h b/include/drm/drm_gem_cma_helper.h
index 63397ce..5fdccb3 100644
--- a/include/drm/drm_gem_cma_helper.h
+++ b/include/drm/drm_gem_cma_helper.h
@@ -13,6 +13,10 @@ to_drm_gem_cma_obj(struct drm_gem_object *gem_obj)
   

[PATCHv7 08/10] gpu: host1x: Remove second host1x driver

[Terje Bergstrom]

Remove second host1x driver, and bind tegra-drm to the new host1x
driver. The logic to parse device tree and track clients is moved
to drm.c.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/Makefile|2 +-
 drivers/gpu/host1x/dev.c   |   58 ++-
 drivers/gpu/host1x/dev.h   |6 +
 drivers/gpu/host1x/drm/Kconfig |2 +-
 drivers/gpu/host1x/drm/dc.c|5 +-
 drivers/gpu/host1x/drm/drm.c   |  217 +++-
 drivers/gpu/host1x/drm/drm.h   |3 -
 drivers/gpu/host1x/drm/hdmi.c  |5 +-
 drivers/gpu/host1x/drm/host1x.c|  329 
 drivers/gpu/host1x/host1x_client.h |   35 
 10 files changed, 318 insertions(+), 344 deletions(-)
 delete mode 100644 drivers/gpu/host1x/drm/host1x.c
 create mode 100644 drivers/gpu/host1x/host1x_client.h

diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index 4761e8a..9a6fc76 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -13,6 +13,6 @@ host1x-y = \
 ccflags-y += -Iinclude/drm
 ccflags-$(CONFIG_DRM_TEGRA_DEBUG) += -DDEBUG

-host1x-$(CONFIG_DRM_TEGRA) += drm/drm.o drm/fb.o drm/dc.o drm/host1x.o
+host1x-$(CONFIG_DRM_TEGRA) += drm/drm.o drm/fb.o drm/dc.o
 host1x-$(CONFIG_DRM_TEGRA) += drm/output.o drm/rgb.o drm/hdmi.o
 obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index d7c6e3e..6af8081 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -32,6 +32,19 @@
 #include "channel.h"
 #include "debug.h"
 #include "hw/host1x01.h"
+#include "host1x_client.h"
+
+void host1x_set_drm_data(struct device *dev, void *data)
+{
+   struct host1x *host1x = dev_get_drvdata(dev);
+   host1x->drm_data = data;
+}
+
+void *host1x_get_drm_data(struct device *dev)
+{
+   struct host1x *host1x = dev_get_drvdata(dev);
+   return host1x->drm_data;
+}

 void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)
 {
@@ -154,6 +167,8 @@ static int host1x_probe(struct platform_device *pdev)

host1x_debug_init(host);

+   host1x_drm_alloc(pdev);
+
return 0;

 fail_deinit_syncpt:
@@ -170,7 +185,7 @@ static int __exit host1x_remove(struct platform_device 
*pdev)
return 0;
 }

-static struct platform_driver platform_driver = {
+static struct platform_driver tegra_host1x_driver = {
.probe = host1x_probe,
.remove = __exit_p(host1x_remove),
.driver = {
@@ -180,8 +195,47 @@ static struct platform_driver platform_driver = {
},
 };

-module_platform_driver(platform_driver);
+static int __init tegra_host1x_init(void)
+{
+   int err;
+
+   err = platform_driver_register(&tegra_host1x_driver);
+   if (err < 0)
+   return err;
+
+#ifdef CONFIG_DRM_TEGRA
+   err = platform_driver_register(&tegra_dc_driver);
+   if (err < 0)
+   goto unregister_host1x;
+
+   err = platform_driver_register(&tegra_hdmi_driver);
+   if (err < 0)
+   goto unregister_dc;
+#endif
+
+   return 0;
+
+#ifdef CONFIG_DRM_TEGRA
+unregister_dc:
+   platform_driver_unregister(&tegra_dc_driver);
+unregister_host1x:
+   platform_driver_unregister(&tegra_host1x_driver);
+   return err;
+#endif
+}
+module_init(tegra_host1x_init);
+
+static void __exit tegra_host1x_exit(void)
+{
+#ifdef CONFIG_DRM_TEGRA
+   platform_driver_unregister(&tegra_hdmi_driver);
+   platform_driver_unregister(&tegra_dc_driver);
+#endif
+   platform_driver_unregister(&tegra_host1x_driver);
+}
+module_exit(tegra_host1x_exit);

+MODULE_AUTHOR("Thierry Reding ");
 MODULE_AUTHOR("Terje Bergstrom ");
 MODULE_DESCRIPTION("Host1x driver for Tegra products");
 MODULE_LICENSE("GPL");
diff --git a/drivers/gpu/host1x/dev.h b/drivers/gpu/host1x/dev.h
index 4a56233..ca2ba8a 100644
--- a/drivers/gpu/host1x/dev.h
+++ b/drivers/gpu/host1x/dev.h
@@ -124,6 +124,8 @@ struct host1x {
unsigned int num_allocated_channels;

struct dentry *debugfs;
+
+   void *drm_data;
 };

 static inline struct host1x *host1x_get_host(struct device *dev)
@@ -307,4 +309,8 @@ static inline void host1x_hw_show_mlocks(struct host1x 
*host, struct output *o)
host->debug_op->show_mlocks(host, o);
 }

+extern struct platform_driver tegra_hdmi_driver;
+extern struct platform_driver tegra_dc_driver;
+extern struct platform_driver tegra_gr2d_driver;
+
 #endif
diff --git a/drivers/gpu/host1x/drm/Kconfig b/drivers/gpu/host1x/drm/Kconfig
index c92955d..8fb6545 100644
--- a/drivers/gpu/host1x/drm/Kconfig
+++ b/drivers/gpu/host1x/drm/Kconfig
@@ -1,5 +1,5 @@
 config DRM_TEGRA
-   tristate "NVIDIA Tegra DRM"
+   bool "NVIDIA Tegra DRM"
depends on DRM && OF && ARCH_TEGRA
select DRM_KMS_HELPER
select DRM_GEM_CMA_HELPER
diff --git a/drivers/gpu/host1x/drm/dc.c b/drivers/gpu/host1x/drm/dc.c
index d1f6609..29a79b6 100644
--- a/drivers/gpu/host1x/drm

[PATCHv7 04/10] gpu: host1x: Add channel support

[Terje Bergstrom]

Add support for host1x client modules, and host1x channels to submit
work to the clients.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/Kconfig  |   12 +
 drivers/gpu/host1x/Makefile |3 +
 drivers/gpu/host1x/cdma.c   |  487 ++
 drivers/gpu/host1x/cdma.h   |  100 +
 drivers/gpu/host1x/channel.c|  120 ++
 drivers/gpu/host1x/channel.h|   52 +++
 drivers/gpu/host1x/dev.c|   17 +
 drivers/gpu/host1x/dev.h|  113 +
 drivers/gpu/host1x/host1x.h |   28 ++
 drivers/gpu/host1x/host1x_bo.h  |   92 +
 drivers/gpu/host1x/hw/cdma_hw.c |  324 +++
 drivers/gpu/host1x/hw/channel_hw.c  |  143 +++
 drivers/gpu/host1x/hw/host1x01.c|5 +
 drivers/gpu/host1x/hw/host1x01_hardware.h   |  116 ++
 drivers/gpu/host1x/hw/hw_host1x01_channel.h |  102 +
 drivers/gpu/host1x/hw/hw_host1x01_sync.h|   12 +
 drivers/gpu/host1x/hw/hw_host1x01_uclass.h  |  168 
 drivers/gpu/host1x/hw/syncpt_hw.c   |   11 +
 drivers/gpu/host1x/intr.c   |   28 +-
 drivers/gpu/host1x/intr.h   |6 +
 drivers/gpu/host1x/job.c|  597 +++
 drivers/gpu/host1x/job.h|  157 +++
 drivers/gpu/host1x/syncpt.c |   11 +
 drivers/gpu/host1x/syncpt.h |6 +
 include/trace/events/host1x.h   |  211 ++
 25 files changed, 2920 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/host1x/cdma.c
 create mode 100644 drivers/gpu/host1x/cdma.h
 create mode 100644 drivers/gpu/host1x/channel.c
 create mode 100644 drivers/gpu/host1x/channel.h
 create mode 100644 drivers/gpu/host1x/host1x.h
 create mode 100644 drivers/gpu/host1x/host1x_bo.h
 create mode 100644 drivers/gpu/host1x/hw/cdma_hw.c
 create mode 100644 drivers/gpu/host1x/hw/channel_hw.c
 create mode 100644 drivers/gpu/host1x/hw/hw_host1x01_channel.h
 create mode 100644 drivers/gpu/host1x/hw/hw_host1x01_uclass.h
 create mode 100644 drivers/gpu/host1x/job.c
 create mode 100644 drivers/gpu/host1x/job.h

diff --git a/drivers/gpu/host1x/Kconfig b/drivers/gpu/host1x/Kconfig
index c01c450..00f0859 100644
--- a/drivers/gpu/host1x/Kconfig
+++ b/drivers/gpu/host1x/Kconfig
@@ -7,3 +7,15 @@ config TEGRA_HOST1X
  Tegra's graphics- and multimedia-related modules. The modules served
  by host1x are referred to as clients. host1x includes some other
  functionality, such as synchronization.
+
+if TEGRA_HOST1X
+
+config TEGRA_HOST1X_FIREWALL
+   bool "Enable HOST1X security firewall"
+   default y
+   help
+ Say yes if kernel should protect command streams from tampering.
+
+ If unsure, choose Y.
+
+endif
diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index 5ef47ff..06a995b 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -4,6 +4,9 @@ host1x-y = \
syncpt.o \
dev.o \
intr.o \
+   cdma.o \
+   channel.o \
+   job.o \
hw/host1x01.o

 obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/cdma.c b/drivers/gpu/host1x/cdma.c
new file mode 100644
index 000..33935de
--- /dev/null
+++ b/drivers/gpu/host1x/cdma.c
@@ -0,0 +1,487 @@
+/*
+ * Tegra host1x Command DMA
+ *
+ * Copyright (c) 2010-2013, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "cdma.h"
+#include "channel.h"
+#include "dev.h"
+#include "debug.h"
+#include "host1x_bo.h"
+#include "job.h"
+
+/*
+ * push_buffer
+ *
+ * The push buffer is a circular array of words to be fetched by command DMA.
+ * Note that it works slightly differently to the sync queue; fence == pos
+ * means that the push buffer is full, not empty.
+ */
+
+#define HOST1X_PUSHBUFFER_SLOTS512
+
+/*
+ * Clean up push buffer resources
+ */
+static void host1x_pushbuffer_destroy(struct push_buffer *pb)
+{
+   struct host1x_cdma *cdma = pb_to_cdma(pb);
+   struct host1x *host1x = cdma_to_host1x(cdma);
+
+   if (pb->phys != 0)
+   dma_free_writecombine(host1x->dev, pb->size_bytes + 

[PATCHv7 10/10] drm: tegra: Add gr2d device

[Terje Bergstrom]

Add client driver for 2D device, and IOCTLs to pass work to host1x
channel for 2D.

Also adds functions that can be called to access sync points from
DRM.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/Makefile   |1 +
 drivers/gpu/host1x/dev.c  |7 +
 drivers/gpu/host1x/drm/drm.c  |  251 ++-
 drivers/gpu/host1x/drm/drm.h  |   28 +++-
 drivers/gpu/host1x/drm/gr2d.c |  330 +
 drivers/gpu/host1x/host1x.h   |3 +-
 include/drm/tegra_drm.h   |  131 
 7 files changed, 747 insertions(+), 4 deletions(-)
 create mode 100644 drivers/gpu/host1x/drm/gr2d.c
 create mode 100644 include/drm/tegra_drm.h

diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index e85db5a..29c0c6b 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -16,4 +16,5 @@ ccflags-$(CONFIG_DRM_TEGRA_DEBUG) += -DDEBUG
 host1x-$(CONFIG_DRM_TEGRA) += drm/drm.o drm/fb.o drm/dc.o
 host1x-$(CONFIG_DRM_TEGRA) += drm/output.o drm/rgb.o drm/hdmi.o
 host1x-$(CONFIG_DRM_TEGRA) += drm/cma.o
+host1x-$(CONFIG_DRM_TEGRA) += drm/gr2d.o
 obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index 6af8081..0091632 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -211,11 +211,17 @@ static int __init tegra_host1x_init(void)
err = platform_driver_register(&tegra_hdmi_driver);
if (err < 0)
goto unregister_dc;
+
+   err = platform_driver_register(&tegra_gr2d_driver);
+   if (err < 0)
+   goto unregister_hdmi;
 #endif

return 0;

 #ifdef CONFIG_DRM_TEGRA
+unregister_hdmi:
+   platform_driver_unregister(&tegra_hdmi_driver);
 unregister_dc:
platform_driver_unregister(&tegra_dc_driver);
 unregister_host1x:
@@ -228,6 +234,7 @@ module_init(tegra_host1x_init);
 static void __exit tegra_host1x_exit(void)
 {
 #ifdef CONFIG_DRM_TEGRA
+   platform_driver_unregister(&tegra_gr2d_driver);
platform_driver_unregister(&tegra_hdmi_driver);
platform_driver_unregister(&tegra_dc_driver);
 #endif
diff --git a/drivers/gpu/host1x/drm/drm.c b/drivers/gpu/host1x/drm/drm.c
index dbd4808..9f78f52 100644
--- a/drivers/gpu/host1x/drm/drm.c
+++ b/drivers/gpu/host1x/drm/drm.c
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2012 Avionic Design GmbH
- * Copyright (C) 2012 NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (C) 2012-2013 NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -8,13 +8,21 @@
  */

 #include 
+#include 
+#include 
+#include 
+#include 
 #include 
 #include 
 #include 
 #include 

+#include "cma.h"
+#include "dev.h"
 #include "drm.h"
+#include "host1x_bo.h"
 #include "host1x_client.h"
+#include "syncpt.h"

 #define DRIVER_NAME "tegra"
 #define DRIVER_DESC "NVIDIA Tegra graphics"
@@ -77,8 +85,10 @@ static int host1x_parse_dt(struct host1x_drm *host1x)
static const char * const compat[] = {
"nvidia,tegra20-dc",
"nvidia,tegra20-hdmi",
+   "nvidia,tegra20-gr2d",
"nvidia,tegra30-dc",
"nvidia,tegra30-hdmi",
+   "nvidia,tegra30-gr2d",
};
unsigned int i;
int err;
@@ -273,9 +283,24 @@ static int tegra_drm_unload(struct drm_device *drm)

 static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
 {
+   struct host1x_drm_file *fpriv;
+
+   fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
+   if (!fpriv)
+   return -ENOMEM;
+
+   INIT_LIST_HEAD(&fpriv->contexts);
+   filp->driver_priv = fpriv;
+
return 0;
 }

+static void host1x_drm_context_free(struct host1x_drm_context *context)
+{
+   context->client->ops->close_channel(context);
+   kfree(context);
+}
+
 static void tegra_drm_lastclose(struct drm_device *drm)
 {
struct host1x_drm *host1x = drm->dev_private;
@@ -283,7 +308,222 @@ static void tegra_drm_lastclose(struct drm_device *drm)
drm_fbdev_cma_restore_mode(host1x->fbdev);
 }

+static int tegra_drm_ioctl_syncpt_read(struct drm_device *drm, void *data,
+  struct drm_file *file_priv)
+{
+   struct tegra_drm_syncpt_read_args *args = data;
+   struct host1x *host = host1x_get_host(drm->dev);
+   struct host1x_syncpt *sp = host1x_syncpt_get(host, args->id);
+
+   if (!sp)
+   return -EINVAL;
+
+   args->value = host1x_syncpt_read_min(sp);
+   return 0;
+}
+
+static int tegra_drm_ioctl_syncpt_incr(struct drm_device *drm, void *data,
+  struct drm_file *file_priv)
+{
+   struct tegra_drm_syncpt_incr_args *args = data;
+   struct host1x *host = host1x_get_host(drm->dev);
+   struct host1x_syncpt *sp = host1

[PATCHv7 05/10] gpu: host1x: Add debug support

[Terje Bergstrom]

Add support for host1x debugging. Adds debugfs entries, and dumps
channel state to UART in case of stuck job.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/Makefile |1 +
 drivers/gpu/host1x/cdma.c   |4 +
 drivers/gpu/host1x/debug.c  |  210 +
 drivers/gpu/host1x/debug.h  |   51 +
 drivers/gpu/host1x/dev.c|3 +
 drivers/gpu/host1x/dev.h|   42 
 drivers/gpu/host1x/hw/cdma_hw.c |2 +
 drivers/gpu/host1x/hw/channel_hw.c  |   26 ++-
 drivers/gpu/host1x/hw/debug_hw.c|  322 +++
 drivers/gpu/host1x/hw/host1x01.c|2 +
 drivers/gpu/host1x/hw/hw_host1x01_channel.h |   18 ++
 drivers/gpu/host1x/hw/hw_host1x01_sync.h|  115 ++
 drivers/gpu/host1x/hw/hw_host1x01_uclass.h  |6 +
 drivers/gpu/host1x/hw/syncpt_hw.c   |1 +
 drivers/gpu/host1x/syncpt.c |5 +
 15 files changed, 807 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/host1x/debug.c
 create mode 100644 drivers/gpu/host1x/debug.h
 create mode 100644 drivers/gpu/host1x/hw/debug_hw.c

diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index 06a995b..49fd580 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -7,6 +7,7 @@ host1x-y = \
cdma.o \
channel.o \
job.o \
+   debug.o \
hw/host1x01.o

 obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/cdma.c b/drivers/gpu/host1x/cdma.c
index 33935de..de72172 100644
--- a/drivers/gpu/host1x/cdma.c
+++ b/drivers/gpu/host1x/cdma.c
@@ -439,6 +439,10 @@ void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, 
u32 op2)
struct push_buffer *pb = &cdma->push_buffer;
u32 slots_free = cdma->slots_free;

+   if (host1x_debug_trace_cmdbuf)
+   trace_host1x_cdma_push(dev_name(cdma_to_channel(cdma)->dev),
+  op1, op2);
+
if (slots_free == 0) {
host1x_hw_cdma_flush(host1x, cdma);
slots_free = host1x_cdma_wait_locked(cdma,
diff --git a/drivers/gpu/host1x/debug.c b/drivers/gpu/host1x/debug.c
new file mode 100644
index 000..cb8aff9
--- /dev/null
+++ b/drivers/gpu/host1x/debug.c
@@ -0,0 +1,210 @@
+/*
+ * Copyright (C) 2010 Google, Inc.
+ * Author: Erik Gilling 
+ *
+ * Copyright (C) 2011-2013 NVIDIA Corporation
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "dev.h"
+#include "debug.h"
+#include "channel.h"
+
+unsigned int host1x_debug_trace_cmdbuf;
+
+static pid_t host1x_debug_force_timeout_pid;
+static u32 host1x_debug_force_timeout_val;
+static u32 host1x_debug_force_timeout_channel;
+
+void host1x_debug_output(struct output *o, const char *fmt, ...)
+{
+   va_list args;
+   int len;
+
+   va_start(args, fmt);
+   len = vsnprintf(o->buf, sizeof(o->buf), fmt, args);
+   va_end(args);
+   o->fn(o->ctx, o->buf, len);
+}
+
+static int show_channels(struct host1x_channel *ch, void *data, bool show_fifo)
+{
+   struct host1x *m = host1x_get_host(ch->dev);
+   struct output *o = data;
+
+   mutex_lock(&ch->reflock);
+   if (ch->refcount) {
+   mutex_lock(&ch->cdma.lock);
+   if (show_fifo)
+   host1x_hw_show_channel_fifo(m, ch, o);
+   host1x_hw_show_channel_cdma(m, ch, o);
+   mutex_unlock(&ch->cdma.lock);
+   }
+   mutex_unlock(&ch->reflock);
+
+   return 0;
+}
+
+static void show_syncpts(struct host1x *m, struct output *o)
+{
+   int i;
+   host1x_debug_output(o, " syncpts \n");
+   for (i = 0; i < host1x_syncpt_nb_pts(m); i++) {
+   u32 max = host1x_syncpt_read_max(m->syncpt + i);
+   u32 min = host1x_syncpt_load(m->syncpt + i);
+   if (!min && !max)
+   continue;
+   host1x_debug_output(o, "id %d (%s) min %d max %d\n",
+   i, m->syncpt[i].name, min, max);
+   }
+
+   for (i = 0; i < host1x_syncpt_nb_bases(m); i++) {
+   u32 base_val;
+   base_val = host1x_syncpt_load_wait_base(m->syncpt + i);
+   if (base_val)
+   host1x_debug_output(o, "waitbase id %d val %d\n", i,
+   base_val);
+   }
+
+   host1x_debug

[Bug 57875] Second Life viewer bad rendering with git-ec83535

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=57875

--- Comment #26 from Marek Ol??k  ---
Stefan> We can also go the easy way and only advertise ARB_depth_clamp if the
user is Wine. It would work in the same way we disable HyperZ for compositors.
I'm assuming Wine can be detected as easily as reading
program_invocation_short_name.

-- 
You are receiving this mail because:
You are the assignee for the bug.
-- next part --
An HTML attachment was scrubbed...
URL: 
<http://lists.freedesktop.org/archives/dri-devel/attachments/20130313/a01044c8/attachment.html>

[Bug 60879] X11 can't start with acceleration enabled

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=60879

--- Comment #13 from Michel D?nzer  ---
Created attachment 76481
  --> https://bugs.freedesktop.org/attachment.cgi?id=76481&action=edit
Mesa test patch

Does it work better with this Mesa patch?

-- 
You are receiving this mail because:
You are the assignee for the bug.
-- next part --
An HTML attachment was scrubbed...
URL: 
<http://lists.freedesktop.org/archives/dri-devel/attachments/20130313/ab3a0dd4/attachment.html>

OOPS with 3.9.0rc2+

[Borislav Petkov]

+ dri-devel.

On Wed, Mar 13, 2013 at 02:34:31PM +0100, Rolf Offermanns wrote:
> Hi,
> 
> I get a kernel oops / panic with a 3.9.0rc2+ kernel (git from 2h ago) on my 
> Sony
> Vaio laptop. It happened with rc1, too.
> 
> Unfortunately I only have a screen photo as nothing gets written to the system
> log.
> 
> Here is a transcript:
> -[cut here]
> WARNING: at linux-2.6/drivers/gpu/drm/drm.crtc.c:84 
> drm_warn_on_modeset_not_all_locked+0x80/0x90 [drm]()
> Hardware name: VPCF23A9E
> Modules linked in: [...]
> Pid: 1894, comm: plasma-desktop Tainted: G   D W  3.9.0-rc2+ #1
> Call Trace:
> warn_slowpath_common+0x7f/0xc0
>  warn_slowpath_null+0x1a/020
>  drm_warn_on_modeset_not_all_locked+0x80/0x90 [drm]
>  drm_fb_helper_restore_fbdev_mode+0x1c/0x80 [drm_kms_helper]
>  drm_fb_helper_force_kernel_mode+0x4d/0xa0 [drm_kms_helper]
>  drm_fb_helper_panic+0x2b/0x30 [drm_kms_helper]
>  notifier_call_chain+0x4d/0x70
>  __atomic_notifier_call_chain+0x12/0x20
>  atomic_notifier_call_chain+0x16/0x20
>  panic+0xef/0x1d0
>  oops_end+0xe2/0xf0
>  die+0x58/0x90
>  do_trap+0x6b/0170
>  ? __atomic_notifier_call_chain+0x12/0x20
>  do_divide_error+0x96/0xa0
>  ? intel_pstate_timer_func+0x15d/0x380
>  ? check_preempt_curr+0x75/0xa0
>  ? ttwu_do_wakeup+0x2c/0xf0
>  divide_error+0x1e/0x30
>  ? intel_pstate_timer_func+0x15d/0x380
>  ? intel_pstate_timer_func+0xbc/0x380
>  ? pid_param_set+0x120/0x120
>  call_timer_fn+0x3a/0x120
>  ? pid_param_set+0x120/0x120
>  run_timer_softirq+0x1fe/0x2b0
>  __do_softirq+0xe0/0x230
>  irq_exit+0xa5/0xb0
>  smp_apic_timer_interrupt+0x6e/0x99
>  apic_timer_interrupt+0x6d/0x80
>   ? sysret_audit+0x17/0x21
>  -[ end trace  ]--
>  NOHZ: local_softirq_pending 282
> 
> 
>  Is this of any use at all? How can I help track this down? Shall I attach a
>  serial console (USB only)?
> 
> lspci:
> 
> 00:00.0 Host bridge: Intel Corporation 2nd Generation Core Processor Family 
> DRAM Controller (rev 09)
> 00:01.0 PCI bridge: Intel Corporation Xeon E3-1200/2nd Generation Core 
> Processor Family PCI Express Root Port (rev 09)
> 00:16.0 Communication controller: Intel Corporation 6 Series/C200 Series 
> Chipset Family MEI Controller #1 (rev 04)
> 00:1a.0 USB controller: Intel Corporation 6 Series/C200 Series Chipset Family 
> USB Enhanced Host Controller #2 (rev 04)
> 00:1b.0 Audio device: Intel Corporation 6 Series/C200 Series Chipset Family 
> High Definition Audio Controller (rev 04)
> 00:1c.0 PCI bridge: Intel Corporation 6 Series/C200 Series Chipset Family PCI 
> Express Root Port 1 (rev b4)
> 00:1c.1 PCI bridge: Intel Corporation 6 Series/C200 Series Chipset Family PCI 
> Express Root Port 2 (rev b4)
> 00:1c.2 PCI bridge: Intel Corporation 6 Series/C200 Series Chipset Family PCI 
> Express Root Port 3 (rev b4)
> 00:1c.3 PCI bridge: Intel Corporation 6 Series/C200 Series Chipset Family PCI 
> Express Root Port 4 (rev b4)
> 00:1d.0 USB controller: Intel Corporation 6 Series/C200 Series Chipset Family 
> USB Enhanced Host Controller #1 (rev 04)
> 00:1f.0 ISA bridge: Intel Corporation HM65 Express Chipset Family LPC 
> Controller (rev 04)
> 00:1f.2 SATA controller: Intel Corporation 6 Series/C200 Series Chipset 
> Family 6 port SATA AHCI Controller (rev 04)
> 00:1f.3 SMBus: Intel Corporation 6 Series/C200 Series Chipset Family SMBus 
> Controller (rev 04)
> 01:00.0 VGA compatible controller: NVIDIA Corporation GF108 [GeForce GT 540M] 
> (rev a1)
> 01:00.1 Audio device: NVIDIA Corporation GF108 High Definition Audio 
> Controller (rev a1)
> 02:00.0 Network controller: Atheros Communications Inc. AR9485 Wireless 
> Network Adapter (rev 01)
> 03:00.0 SD Host controller: Ricoh Co Ltd PCIe SDXC/MMC Host Controller (rev 
> 09) 03:00.1 System peripheral: Ricoh Co Ltd Device e232 (rev 06)
> 03:00.3 FireWire (IEEE 1394): Ricoh Co Ltd R5C832 PCIe IEEE 1394 Controller 
> (rev 05)
> 04:00.0 USB controller: NEC Corporation uPD720200 USB 3.0 Host Controller 
> (rev 04)
> 05:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168 PCI 
> Express Gigabit Ethernet controller (rev 06)
> 
> 
> cpuinfo:
> processor   : 0-7
> vendor_id   : GenuineIntel
> cpu family  : 6
> model   : 42
> model name  : Intel(R) Core(TM) i7-2670QM CPU @ 2.20GHz
> stepping: 7
> microcode   : 0x28
> cpu MHz : 800.000
> cache size  : 6144 KB
> physical id : 0
> siblings: 8
> core id : 0
> cpu cores   : 4
> apicid  : 0
> initial apicid  : 0
> fpu : yes
> fpu_exception   : yes
> cpuid level : 13
> wp  : yes
> flags   : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca 
> cmov
> pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx rdtscp lm
> constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc
> aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16
> xtpr pdcm pcid sse4_1 sse4_2 x2apic popcnt tsc_deadline_timer aes xsave a

[PATCH 1/2] drm/radeon/benchmark: make sure bo blit copy exists before using it

[alexdeuc...@gmail.com]

From: Alex Deucher 

Fixes a segfault on asics without a blit callback.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=62239

Signed-off-by: Alex Deucher 
Cc: stable at vger.kernel.org
---
 drivers/gpu/drm/radeon/radeon_benchmark.c |   16 +---
 1 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_benchmark.c 
b/drivers/gpu/drm/radeon/radeon_benchmark.c
index bedda9c..a2f0c24 100644
--- a/drivers/gpu/drm/radeon/radeon_benchmark.c
+++ b/drivers/gpu/drm/radeon/radeon_benchmark.c
@@ -135,13 +135,15 @@ static void radeon_benchmark_move(struct radeon_device 
*rdev, unsigned size,
 sdomain, ddomain, "dma");
}

-   time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
-   RADEON_BENCHMARK_COPY_BLIT, n);
-   if (time < 0)
-   goto out_cleanup;
-   if (time > 0)
-   radeon_benchmark_log_results(n, size, time,
-sdomain, ddomain, "blit");
+   if (rdev->asic->copy.blit) {
+   time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
+   RADEON_BENCHMARK_COPY_BLIT, n);
+   if (time < 0)
+   goto out_cleanup;
+   if (time > 0)
+   radeon_benchmark_log_results(n, size, time,
+sdomain, ddomain, "blit");
+   }

 out_cleanup:
if (sobj) {
-- 
1.7.7.5

[PATCH 2/2] drm/radeon/benchmark: allow same domains for dma copy

[alexdeuc...@gmail.com]

From: Alex Deucher 

Remove old comment and allow benchmarking moves within the
same memory domain for both dma and blit methods.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/radeon_benchmark.c |5 +
 1 files changed, 1 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_benchmark.c 
b/drivers/gpu/drm/radeon/radeon_benchmark.c
index a2f0c24..6e05a2e 100644
--- a/drivers/gpu/drm/radeon/radeon_benchmark.c
+++ b/drivers/gpu/drm/radeon/radeon_benchmark.c
@@ -122,10 +122,7 @@ static void radeon_benchmark_move(struct radeon_device 
*rdev, unsigned size,
goto out_cleanup;
}

-   /* r100 doesn't have dma engine so skip the test */
-   /* also, VRAM-to-VRAM test doesn't make much sense for DMA */
-   /* skip it as well if domains are the same */
-   if ((rdev->asic->copy.dma) && (sdomain != ddomain)) {
+   if (rdev->asic->copy.dma) {
time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
RADEON_BENCHMARK_COPY_DMA, n);
if (time < 0)
-- 
1.7.7.5

[PATCH 1/2] drm/radeon/benchmark: make sure bo blit copy exists before using it

[Michel Dänzer]

On Mit, 2013-03-13 at 12:38 -0400, alexdeucher at gmail.com wrote: 
> From: Alex Deucher 
> 
> Fixes a segfault on asics without a blit callback.
> 
> Fixes:
> https://bugs.freedesktop.org/show_bug.cgi?id=62239
> 
> Signed-off-by: Alex Deucher 
> Cc: stable at vger.kernel.org

For the series:

Reviewed-by: Michel D?nzer 


-- 
Earthling Michel D?nzer   |   http://www.amd.com
Libre software enthusiast |  Debian, X and DRI developer

[PATCH] drm/omap: change "!CONFIG_FB_OMAP2" to "!FB_OMAP2"

[Paul Bolle]

Signed-off-by: Paul Bolle 
---
Untested. Perhaps the first test that people with access to the relevant
hardware might do, is to test _before applying this patch_ with FB_OMAP2
set. Perhaps this negative dependency isn't needed at all. Or is it
obvious?

 drivers/gpu/drm/omapdrm/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/omapdrm/Kconfig b/drivers/gpu/drm/omapdrm/Kconfig
index 09f65dc..45875a0 100644
--- a/drivers/gpu/drm/omapdrm/Kconfig
+++ b/drivers/gpu/drm/omapdrm/Kconfig
@@ -1,7 +1,7 @@

 config DRM_OMAP
tristate "OMAP DRM"
-   depends on DRM && !CONFIG_FB_OMAP2
+   depends on DRM && !FB_OMAP2
depends on ARCH_OMAP2PLUS || ARCH_MULTIPLATFORM
depends on OMAP2_DSS
select DRM_KMS_HELPER
-- 
1.7.11.7

[PATCH] drm/i915: use do_div() as needed in debugfs code

[Daniel Vetter]

On Mon, Mar 11, 2013 at 10:46:31PM -0700, Kees Cook wrote:
> This replaces the open-coded divisions in the debugfs code by calls
> to do_div().
> 
> Signed-off-by: Kees Cook 
> Cc: Daniel Vetter 

Squashed into the debugfs patch which introduced this regression, thanks
for the quick fixup.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c |   12 ++--
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index d86c304..6f3cbf8 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1814,9 +1814,9 @@ i915_max_freq_set(void *data, u64 val)
>   /*
>* Turbo will still be enabled, but won't go above the set value.
>*/
> - dev_priv->rps.max_delay = val / GT_FREQUENCY_MULTIPLIER;
> -
> - gen6_set_rps(dev, val / GT_FREQUENCY_MULTIPLIER);
> + do_div(val, GT_FREQUENCY_MULTIPLIER);
> + dev_priv->rps.max_delay = val;
> + gen6_set_rps(dev, val);
>   mutex_unlock(&dev_priv->rps.hw_lock);
>  
>   return 0;
> @@ -1865,9 +1865,9 @@ i915_min_freq_set(void *data, u64 val)
>   /*
>* Turbo will still be enabled, but won't go below the set value.
>*/
> - dev_priv->rps.min_delay = val / GT_FREQUENCY_MULTIPLIER;
> -
> - gen6_set_rps(dev, val / GT_FREQUENCY_MULTIPLIER);
> + do_div(val, GT_FREQUENCY_MULTIPLIER);
> + dev_priv->rps.min_delay = val;
> + gen6_set_rps(dev, val);
>   mutex_unlock(&dev_priv->rps.hw_lock);
>  
>   return 0;
> -- 
> 1.7.9.5
> 
> 
> -- 
> Kees Cook
> Chrome OS Security

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

linux-next: build failure after merge of the final tree (drm-intel tree related)

[Daniel Vetter]

On Tue, Mar 12, 2013 at 03:22:26PM +1100, Stephen Rothwell wrote:
> Hi all,
> 
> After merging the final tree, today's linux-next build (i386 defconfig)
> failed like this:
> 
> drivers/built-in.o: In function `i915_min_freq_set':
> i915_debugfs.c:(.text+0xb1adc): undefined reference to `__udivdi3'
> drivers/built-in.o: In function `i915_max_freq_set':
> i915_debugfs.c:(.text+0xb1bac): undefined reference to `__udivdi3'
> 
> Caused by commit 2389cc500686 ("drm/i915: use simple attribute in debugfs
> routines") from the drm-intel tree.
> 
> I have reverted that commit for today.

Should be fixed now, thanks for the report (and my apologies for the
little screw-up).
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

[PATCH v3] drm/i915: bounds check execbuffer relocation count

[Daniel Vetter]

On Tue, Mar 12, 2013 at 09:07:46AM +, Chris Wilson wrote:
> On Mon, Mar 11, 2013 at 05:31:45PM -0700, Kees Cook wrote:
> > It is possible to wrap the counter used to allocate the buffer for
> > relocation copies. This could lead to heap writing overflows.
> > 
> > CVE-2013-0913
> > 
> > v3: collapse test, improve comment
> > v2: move check into validate_exec_list
> > 
> > Signed-off-by: Kees Cook 
> > Reported-by: Pinkie Pie
> > Cc: stable at vger.kernel.org
> 
> Looks good to me. The only bikeshed that remains is whether we should
> just collapse the two variables into one, but the current 'max - count'
> is more idiomatic and so preferrable.
> Reviewed-by: Chris Wilson 

Picked up for -fixes, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

[Bug 60879] X11 can't start with acceleration enabled

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=60879

--- Comment #14 from Hristo Venev  ---
Sadly this patch doesn't fix this bug. egltri_screen does not render anything
and does not cause GPU reset. However eglgears_screen and Xorg cause the GPU to
reset. Without the patch it's the same.

-- 
You are receiving this mail because:
You are the assignee for the bug.
-- next part --
An HTML attachment was scrubbed...
URL: 
<http://lists.freedesktop.org/archives/dri-devel/attachments/20130313/7d40c6c1/attachment.html>

[Bug 57875] Second Life viewer bad rendering with git-ec83535

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=57875

--- Comment #27 from Stefan D?singer  ---
This is a bad idea because Wine can also run OpenGL applications, which might
use depth_clamp in a way that doesn't work on r300g.

Feel free to revert the patch for now. Implementing MESA_depth_clip is fairly
high up on my todo list, but even higher priorities kept interfering.

If you have the time and resources to implement my extension proposal yourself
that'd make me extra-happy of course :-)

-- 
You are receiving this mail because:
You are the assignee for the bug.
-- next part --
An HTML attachment was scrubbed...
URL: 
<http://lists.freedesktop.org/archives/dri-devel/attachments/20130313/6bf84d54/attachment.html>

[Bug 62311] New: (kernel) memory leak

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=62311

  Priority: medium
Bug ID: 62311
  Assignee: dri-devel at lists.freedesktop.org
   Summary: (kernel) memory leak
  Severity: major
Classification: Unclassified
OS: Linux (All)
  Reporter: fdo at won2.de
  Hardware: x86-64 (AMD64)
Status: NEW
   Version: unspecified
 Component: DRM/Radeon
   Product: DRI

I'm experiencing a (kernel) memory leak for several months now and it seems to
got worse. I found a bug on
https://bugzilla.kernel.org/show_bug.cgi?id=43751#c11 but no solution yet
(disregard command 12, it's not true ;)). I asked on IRC #fdo and #radeon and
got told to file a bug here on fdo.

At some point I always run out of main memory and got lots of kernel messages
like those:
[drm:radeon_gem_object_create] *ERROR* Failed to allocate GEM object (4096, 6,
4096, -12)
[TTM] Out of kernel memory
[TTM] Out of kernel memory
Repeating over and over again. I'm currently running radeon driver 7.1.0, mesa
9.0.1, xorg-server 1.13.1, KDE 4.9.5 (tried with compositing enabled and
disabled).

I don't know what to do or how to debug this, could anybody please help?

-- 
You are receiving this mail because:
You are the assignee for the bug.
-- next part --
An HTML attachment was scrubbed...
URL: 
<http://lists.freedesktop.org/archives/dri-devel/attachments/20130313/291db280/attachment-0001.html>

[Bug 60802] Corruption with DMA ring on cayman

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=60802

--- Comment #44 from vincent  ---
I think I have similar issue with Unigine Heaven 3.0 :

http://people.freedesktop.org/~vlj/2.jpg
http://people.freedesktop.org/~vlj/3.jpg

A webgl demo that has the issue too is at http://www.findyourwaytooz.com/

It appeared with Kernel 3.8 too. Kernel 3.7.9 did have this.

With a previous Mesa there was the same kind of issue with Lightmark, but with
latest mesa it is gone ; maybe the remaining corruption is related to
compressed textures ?

-- 
You are receiving this mail because:
You are the assignee for the bug.
-- next part --
An HTML attachment was scrubbed...
URL: 
<http://lists.freedesktop.org/archives/dri-devel/attachments/20130313/1fc95d0b/attachment.html>

[Bug 60802] Corruption with DMA ring on cayman

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=60802

--- Comment #45 from Alex Deucher  ---
(In reply to comment #44)
> 
> It appeared with Kernel 3.8 too. Kernel 3.7.9 did have this.

The DMA rings are only available on 3.8 kernels.

-- 
You are receiving this mail because:
You are the assignee for the bug.
-- next part --
An HTML attachment was scrubbed...
URL: 
<http://lists.freedesktop.org/archives/dri-devel/attachments/20130313/1c2fa1a0/attachment.html>

linux-next: build failure after merge of the final tree (drm-intel tree related)

[Sedat Dilek]

On Tue, Mar 12, 2013 at 10:50 AM, Sedat Dilek  wrote:
> On Tue, Mar 12, 2013 at 6:46 AM, Kees Cook  wrote:
>> On Mon, Mar 11, 2013 at 9:22 PM, Stephen Rothwell  
>> wrote:
>>> Hi all,
>>>
>>> After merging the final tree, today's linux-next build (i386 defconfig)
>>> failed like this:
>>>
>>> drivers/built-in.o: In function `i915_min_freq_set':
>>> i915_debugfs.c:(.text+0xb1adc): undefined reference to `__udivdi3'
>>> drivers/built-in.o: In function `i915_max_freq_set':
>>> i915_debugfs.c:(.text+0xb1bac): undefined reference to `__udivdi3'
>>>
>>> Caused by commit 2389cc500686 ("drm/i915: use simple attribute in debugfs
>>> routines") from the drm-intel tree.
>>>
>>> I have reverted that commit for today.
>>
>> Ah-ha, thanks. I've sent a follow-up patch to fix this.
>>
>
> Can you please point to the patch [1] next time?
> Thanks.
>
> - Sedat -
>
> [1] https://patchwork.kernel.org/patch/2253231/
>

Hi Kees, Hi Daniel,

was the above patch merged into drm (for me it does not look like it was [1])?

Regards,
- Sedat -

[1] 
http://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/log/?qt=author&q=Kees+Cook



>> -Kees
>>
>> --
>> Kees Cook
>> Chrome OS Security
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-next" in
>> the body of a message to majordomo at vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 4/4] omapdss: features: fixed supported outputs for OMAP4

[Tomi Valkeinen]

On 2013-03-12 17:01, Archit Taneja wrote:

> So, what I'm saying is that we should stick to output->dispc_channel. We
> iterate through all the panels, and by using output->dispc_channel, we
> get the manager for an output, and map that manager to a crtc, and make
> sure the number of unique managers we finally use is equal to NUM_CRTC.
> 
> Does that sound good?

Yes, I think that sounds good.

 Tomi


-- next part --
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 899 bytes
Desc: OpenPGP digital signature
URL: 
<http://lists.freedesktop.org/archives/dri-devel/attachments/20130313/8caaf449/attachment.pgp>

[PATCH] drm/exynos: change the method for getting the interrupt resource of FIMD

[Vikas Sajjan]

Replaces the "platform_get_resource() for IORESOURCE_IRQ" with
platform_get_resource_byname().
Both in exynos4 and exynos5, FIMD IP has 3 interrupts in the order: "fifo",
"vsync", and "lcd_sys".
But The FIMD driver expects the "vsync" interrupt to be mentioned as the
1st parameter in the FIMD DT node. So to meet this expectation of the
driver, the FIMD DT node was forced to be made by keeping "vsync" as the
1st paramter.
For example in exynos4, the FIMD DT node has interrupt numbers
mentioned as <11, 1> <11, 0> <11, 2> keeping "vsync" as the 1st paramter.

This patch fixes the above mentioned "hack" of re-ordering of the
FIMD interrupt numbers by getting interrupt resource of FIMD by using
platform_get_resource_byname().

Signed-off-by: Vikas Sajjan 
---
 drivers/gpu/drm/exynos/exynos_drm_fimd.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c 
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 1ea173a..cd79d38 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -945,7 +945,7 @@ static int fimd_probe(struct platform_device *pdev)
return -ENXIO;
}

-   res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+   res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "vsync");
if (!res) {
dev_err(dev, "irq request failed.\n");
return -ENXIO;
-- 
1.7.9.5

linux 3.9-rc1: nouveau crash on PPC

[Aaro Koskinen]

Hi,

On Sat, Mar 09, 2013 at 08:44:31PM +0200, Aaro Koskinen wrote:
> There's nouveau crash during boot with 3.9-rc1 on iMac G5 (nVidia GeForce
> FX 5200 Ultra). This happens also with current mainline kernel HEAD
> (0aefda3e8188ad71168bd32152d41b3d72f04087).
> 
> git bisect tells the first bad commit is
> 1d7c71a3e2f77336df536855b0efd2dc5bdeb41b (drm/nouveau/disp: port vblank
> handling to event interface).
> 
> The crash is (manually copied from screen):
> 
> [...]
> 
> Unable to handle kernel paging request for data at address 0x1
> 
> call trace:
> nouveau_event_trigger

The cause is event handling linked lists getting corrupted.

I'm not sure how that code is intented to work, but with the below HACK
I can at least boot the iMac without crashing, and get a working display:

diff --git a/drivers/gpu/drm/nouveau/core/core/event.c 
b/drivers/gpu/drm/nouveau/core/core/event.c
index 6d01e0f..ab8d6c7 100644
--- a/drivers/gpu/drm/nouveau/core/core/event.c
+++ b/drivers/gpu/drm/nouveau/core/core/event.c
@@ -29,7 +29,7 @@ nouveau_event_put_locked(struct nouveau_event *event, int 
index,
 {
if (!--event->index[index].refs)
event->disable(event, index);
-   list_del(&handler->head);
+   list_del(&handler->heads[index]);
 }

 void
@@ -39,7 +39,7 @@ nouveau_event_put(struct nouveau_event *event, int index,
unsigned long flags;

spin_lock_irqsave(&event->lock, flags);
-   if (index < event->index_nr)
+   if (index < ARRAY_SIZE(handler->heads) && index < event->index_nr)
nouveau_event_put_locked(event, index, handler);
spin_unlock_irqrestore(&event->lock, flags);
 }
@@ -51,8 +51,8 @@ nouveau_event_get(struct nouveau_event *event, int index,
unsigned long flags;

spin_lock_irqsave(&event->lock, flags);
-   if (index < event->index_nr) {
-   list_add(&handler->head, &event->index[index].list);
+   if (index < ARRAY_SIZE(handler->heads) && index < event->index_nr) {
+   list_add(&handler->heads[index], &event->index[index].list);
if (!event->index[index].refs++)
event->enable(event, index);
}
@@ -69,7 +69,7 @@ nouveau_event_trigger(struct nouveau_event *event, int index)
return;

spin_lock_irqsave(&event->lock, flags);
-   list_for_each_entry_safe(handler, temp, &event->index[index].list, 
head) {
+   list_for_each_entry_safe(handler, temp, &event->index[index].list, 
heads[index]) {
if (handler->func(handler, index) == NVKM_EVENT_DROP) {
nouveau_event_put_locked(event, index, handler);
}
diff --git a/drivers/gpu/drm/nouveau/core/include/core/event.h 
b/drivers/gpu/drm/nouveau/core/include/core/event.h
index 9e09440..ba52172 100644
--- a/drivers/gpu/drm/nouveau/core/include/core/event.h
+++ b/drivers/gpu/drm/nouveau/core/include/core/event.h
@@ -6,7 +6,7 @@
 #define NVKM_EVENT_KEEP 1

 struct nouveau_eventh {
-   struct list_head head;
+   struct list_head heads[2];
int (*func)(struct nouveau_eventh *, int index);
 };

A.