v3.5 Oops in i2c_algo_bit.c:bit_xfer+0x23/0x870: i915 or i2c?
I'm trying to run a v3.5 kernel (plus some -stable patches from Ted Ts'o) on an Ubuntu system. Things are generally working except for the following Oops on each boot, which prevents the graphics system from loading. [ 36.187972] [drm] Initialized drm 1.1.0 20060810 [ 36.230306] kvm: VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL does not work properly. Using workaround [ 36.487606] i915 :00:02.0: setting latency timer to 64 [ 36.555464] [drm] GMBUS [i915 gmbus ssc] timed out, falling back to bit banging on pin 0 [ 36.555490] BUG: unable to handle kernel NULL pointer dereference at 0028 [ 36.555626] IP: [] bit_xfer+0x23/0x870 [i2c_algo_bit] [ 36.555701] PGD 212cb0067 PUD 212caf067 PMD 0 [ 36.555803] Oops: [#1] SMP [ 36.555885] CPU 3 [ 36.555907] Modules linked in: snd_seq_midi joydev i915(+) snd_rawmidi snd_seq_midi_event snd_seq drm_kms_helper snd_timer snd_seq_device kvm_intel drm kvm snd serio_raw soundcore i2c_algo_bit snd_page_alloc lpc_ich video mei microcode mac_hid eeprom it87 hwmon_vid coretemp lp parport raid10 raid456 async_pq async_xor firewire_ohci firewire_core xor async_memcpy async_raid6_recov hid_microsoft floppy crc_itu_t r8169 pata_jmicron usbhid hid mptsas mptscsih mptbase scsi_transport_sas raid6_pq async_tx raid1 raid0 multipath linear [ 36.557232] [ 36.557271] Pid: 623, comm: modprobe Not tainted 3.5.0 #3 Gigabyte Technology Co., Ltd. H57M-USB3/H57M-USB3 [ 36.557398] RIP: 0010:[] [] bit_xfer+0x23/0x870 [i2c_algo_bit] [ 36.557493] RSP: :880212c6d648 EFLAGS: 00010296 [ 36.557544] RAX: 88021222c030 RBX: 880212c6d7e8 RCX: [ 36.557599] RDX: 0001 RSI: 880212c6d7e8 RDI: 88021222c030 [ 36.557655] RBP: 880212c6d6c8 R08: 0402 R09: [ 36.557710] R10: R11: 0006 R12: 0001 [ 36.557766] R13: 880212c6dfd8 R14: 0001 R15: 88021222c030 [ 36.557822] FS: 7f5a7b85b700() GS:88021fcc() knlGS: [ 36.557899] CS: 0010 DS: ES: CR0: 8005003b [ 36.557950] CR2: 0028 CR3: 000212cad000 CR4: 07e0 [ 36.558006] DR0: DR1: DR2: [ 36.558062] DR3: DR6: 0ff0 DR7: 0400 [ 36.558119] Process modprobe (pid: 623, threadinfo 880212c6c000, task 88020fdf5b80) [ 36.558197] Stack: [ 36.558239] 0001 880212c6dfd8 0001 00011222c000 [ 36.558380] 880212c6d6c8 8166341e 88020ff6ca72 000c510c0018 [ 36.558523] 880212c6d6d8 880212c6d698 0082 880212c6d7e8 [ 36.558671] Call Trace: [ 36.558719] [] ? printk+0x61/0x63 [ 36.558790] [] gmbus_xfer+0x56b/0x6f0 [i915] [ 36.558847] [] i2c_transfer+0x9c/0xe0 [ 36.558899] [] ? ep_poll_callback+0x10b/0x150 [ 36.558953] [] i2c_smbus_xfer_emulated+0x156/0x5d0 [ 36.559010] [] ? idr_get_empty_slot+0x115/0x320 [ 36.559064] [] i2c_smbus_xfer+0x113/0x130 [ 36.559118] [] ? _raw_spin_lock+0xe/0x20 [ 36.559173] [] ? klist_next+0x89/0x110 [ 36.559225] [] i2c_default_probe+0xeb/0x130 [ 36.559279] [] ? i2c_check_addr_busy+0x3b/0x60 [ 36.559332] [] i2c_do_add_adapter+0x1bb/0x290 [ 36.559382] [] ? sysfs_do_create_link+0xeb/0x200 [ 36.559433] [] ? put_device+0x17/0x20 [ 36.559482] [] ? __process_new_driver+0x30/0x30 [ 36.559535] [] __process_new_adapter+0x12/0x20 [ 36.559590] [] bus_for_each_drv+0x4e/0xa0 [ 36.559642] [] i2c_register_adapter+0x16d/0x270 [ 36.559696] [] i2c_add_adapter+0xa3/0xb0 [ 36.559759] [] intel_setup_gmbus+0xcc/0x1f0 [i915] [ 36.559821] [] i915_driver_load+0x2ac/0xb90 [i915] [ 36.559882] [] ? drm_get_minor+0x261/0x300 [drm] [ 36.559940] [] drm_get_pci_dev+0x186/0x2d0 [drm] [ 36.559995] [] ? default_spin_lock_flags+0x9/0x10 [ 36.560060] [] i915_pci_probe+0x16/0x20 [i915] [ 36.560115] [] local_pci_probe+0x5c/0xd0 [ 36.560168] [] pci_device_probe+0x111/0x120 [ 36.560221] [] driver_probe_device+0x7e/0x220 [ 36.560274] [] __driver_attach+0xab/0xb0 [ 36.560327] [] ? driver_probe_device+0x220/0x220 [ 36.560375] [] bus_for_each_dev+0x55/0x90 [ 36.560421] [] ? 0xa0322fff [ 36.560470] [] driver_attach+0x1e/0x20 [ 36.560522] [] bus_add_driver+0x198/0x270 [ 36.560573] [] ? 0xa0322fff [ 36.560625] [] driver_register+0x77/0x150 [ 36.560677] [] ? 0xa0322fff [ 36.560729] [] __pci_register_driver+0x5e/0xe0 [ 36.560784] [] ? 0xa0322fff [ 36.560839] [] drm_pci_init+0x11a/0x130 [drm] [ 36.560892] [] ? 0xa0322fff [ 36.560949] [] i915_init+0x8b/0x8d [i915] [ 36.561004] [] do_one_initcall+0x12a/0x180 [ 36.561057] [] sys_init_module+0x10b0/0x1f40 [ 36.56] [] ? free_notes_attrs+0x60/0x60 [ 36.561165] [] system_call_fastpath+0x16/0x1b [ 36.561218] Code:
Re: [PATCH] dma-buf: add reference counting for exporter module
Hi Tomasz, On 8 August 2012 19:36, Daniel Vetter wrote: > On Wed, Aug 08, 2012 at 03:53:10PM +0200, Tomasz Stanislawski wrote: >> Hi Laurent, >> >> On 08/08/2012 03:35 PM, Laurent Pinchart wrote: >> > Hi Tomasz, >> > >> > Thanks for the patch. Thanks for the patch; may I ask you to split it into 2 patches (1 dma-buf and 1 drm) and submit? That ways, either Dave or I can take the patches for either pull request. With that, please feel free to add my Acked-by as well. >> > >> > On Wednesday 08 August 2012 12:17:41 Tomasz Stanislawski wrote: >> >> This patch adds reference counting on a module that exports dma-buf and >> >> implements its operations. This prevents the module from being unloaded >> >> while DMABUF file is in use. >> >> >> >> Signed-off-by: Tomasz Stanislawski >> >> --- >> >> Documentation/dma-buf-sharing.txt |3 ++- >> >> drivers/base/dma-buf.c | 10 +- >> >> drivers/gpu/drm/exynos/exynos_drm_dmabuf.c |1 + >> >> drivers/gpu/drm/i915/i915_gem_dmabuf.c |1 + >> >> drivers/gpu/drm/nouveau/nouveau_prime.c|1 + >> >> drivers/gpu/drm/radeon/radeon_prime.c |1 + >> >> drivers/staging/omapdrm/omap_gem_dmabuf.c |1 + >> >> include/linux/dma-buf.h|2 ++ >> >> 8 files changed, 18 insertions(+), 2 deletions(-) >> >> >> [snip] >> >> >> @@ -96,6 +98,7 @@ struct dma_buf *dma_buf_export(void *priv, const struct >> >> dma_buf_ops *ops, struct file *file; >> >> >> >>if (WARN_ON(!priv || !ops >> >> +|| !ops->owner >> >> Thank you for spotting this. >> I didn'y know that try_get_module returned true is module was NULL. >> >> BTW. Is it worth to add ".owner = THIS_MODULE," to all dma_buf >> exporters in this patch? > > Yeah, I think that makes sense. Otherwise it might get lost somewhere, > i.e. you can smash my Ack on this. > -Daniel > -- > Daniel Vetter > Mail: dan...@ffwll.ch > Mobile: +41 (0)79 365 57 48 -- Thanks and regards, Sumit Semwal. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 53111] [bisected] lockups since added support for virtual address space on cayman v11
https://bugs.freedesktop.org/show_bug.cgi?id=53111 --- Comment #7 from Michel Dänzer 2012-08-09 07:05:26 UTC --- (In reply to comment #6) > The fault address in the VM_CONTEXT1_PROTECTION_FAULT_ADDR register is less > than the start of the virtual address area, unless that is due to the bug? Sorry, should have mentioned that the address in VM_CONTEXT1_PROTECTION_FAULT_ADDR is shifted right by 12 bits (i.e. it's the page frame number). -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 0/2] Enhance DMABUF with reference counting for exporter module
Hello, This patchset adds reference counting for an exporter module to DMABUF framework. Moreover, it adds setup of an owner field for exporters in DRM subsystem. v1: Original v2: - split patch into DMABUF and DRM part - allow owner to be NULL Regards, Tomasz Stanislawski Tomasz Stanislawski (2): dma-buf: add reference counting for exporter module drm: set owner field to for all DMABUF exporters Documentation/dma-buf-sharing.txt |3 ++- drivers/base/dma-buf.c |9 - drivers/gpu/drm/exynos/exynos_drm_dmabuf.c |1 + drivers/gpu/drm/i915/i915_gem_dmabuf.c |1 + drivers/gpu/drm/nouveau/nouveau_prime.c|1 + drivers/gpu/drm/radeon/radeon_prime.c |1 + drivers/staging/omapdrm/omap_gem_dmabuf.c |1 + include/linux/dma-buf.h|2 ++ 8 files changed, 17 insertions(+), 2 deletions(-) -- 1.7.9.5 ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 1/3] dma-fence: dma-buf synchronization (v7)
Hey Sumit, Op 08-08-12 08:35, Sumit Semwal schreef: > Hi Maarten, > > On 8 August 2012 00:17, Maarten Lankhorst > wrote: >> Op 07-08-12 19:53, Maarten Lankhorst schreef: >>> A dma-fence can be attached to a buffer which is being filled or consumed >>> by hw, to allow userspace to pass the buffer without waiting to another >>> device. For example, userspace can call page_flip ioctl to display the >>> next frame of graphics after kicking the GPU but while the GPU is still >>> rendering. The display device sharing the buffer with the GPU would >>> attach a callback to get notified when the GPU's rendering-complete IRQ >>> fires, to update the scan-out address of the display, without having to >>> wake up userspace. > Thanks for this patchset; Could you please also fill up > Documentation/dma-buf-sharing.txt, to include the relevant bits? > > We've tried to make sure the Documentation corresponding is kept > up-to-date as the framework has grown, and new features are added to > it - and I think features as important as dma-fence and dmabufmgr do > warrant a healthy update. Ok I'll clean it up and add the documentation, one other question. If code that requires dmabuf needs to select CONFIG_DMA_SHARED_BUFFER, why does dma-buf.h have fallbacks for !CONFIG_DMA_SHARED_BUFFER? This seems weird, would you have any objection if I removed those? ~Maarten ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 1/2] dma-buf: add reference counting for exporter module
This patch adds reference counting on a module that exported dma-buf and
implements its operations. This prevents the module from being unloaded while
DMABUF file is in use.
Signed-off-by: Tomasz Stanislawski
Acked-by: Sumit Semwal
Acked-by: Daniel Vetter
CC: linux-...@vger.kernel.org
---
Documentation/dma-buf-sharing.txt |3 ++-
drivers/base/dma-buf.c|9 -
include/linux/dma-buf.h |2 ++
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/Documentation/dma-buf-sharing.txt
b/Documentation/dma-buf-sharing.txt
index ad86fb8..2613057 100644
--- a/Documentation/dma-buf-sharing.txt
+++ b/Documentation/dma-buf-sharing.txt
@@ -49,7 +49,8 @@ The dma_buf buffer sharing API usage contains the following
steps:
The buffer exporter announces its wish to export a buffer. In this, it
connects its own private buffer data, provides implementation for operations
that can be performed on the exported dma_buf, and flags for the file
- associated with this buffer.
+ associated with this buffer. The operations structure has owner field.
+ You should initialize this to THIS_MODULE in most cases.
Interface:
struct dma_buf *dma_buf_export(void *priv, struct dma_buf_ops *ops,
diff --git a/drivers/base/dma-buf.c b/drivers/base/dma-buf.c
index c30f3e1..a1d9cab 100644
--- a/drivers/base/dma-buf.c
+++ b/drivers/base/dma-buf.c
@@ -27,6 +27,7 @@
#include
#include
#include
+#include
static inline int is_dma_buf_file(struct file *);
@@ -40,6 +41,7 @@ static int dma_buf_release(struct inode *inode, struct file
*file)
dmabuf = file->private_data;
dmabuf->ops->release(dmabuf);
+ module_put(dmabuf->ops->owner);
kfree(dmabuf);
return 0;
}
@@ -105,9 +107,14 @@ struct dma_buf *dma_buf_export(void *priv, const struct
dma_buf_ops *ops,
return ERR_PTR(-EINVAL);
}
+ if (!try_module_get(ops->owner))
+ return ERR_PTR(-ENOENT);
+
dmabuf = kzalloc(sizeof(struct dma_buf), GFP_KERNEL);
- if (dmabuf == NULL)
+ if (dmabuf == NULL) {
+ module_put(ops->owner);
return ERR_PTR(-ENOMEM);
+ }
dmabuf->priv = priv;
dmabuf->ops = ops;
diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h
index eb48f38..22953de 100644
--- a/include/linux/dma-buf.h
+++ b/include/linux/dma-buf.h
@@ -37,6 +37,7 @@ struct dma_buf_attachment;
/**
* struct dma_buf_ops - operations possible on struct dma_buf
+ * @owner: the module that implements dma_buf operations
* @attach: [optional] allows different devices to 'attach' themselves to the
* given buffer. It might return -EBUSY to signal that backing storage
* is already allocated and incompatible with the requirements
@@ -70,6 +71,7 @@ struct dma_buf_attachment;
* @vunmap: [optional] unmaps a vmap from the buffer
*/
struct dma_buf_ops {
+ struct module *owner;
int (*attach)(struct dma_buf *, struct device *,
struct dma_buf_attachment *);
--
1.7.9.5
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[PATCH v2 2/2] drm: set owner field to for all DMABUF exporters
This patch sets owner field in DMABUF operations for all DMABUF exporters in
DRM subsystem. This prevents an exporting module from being unloaded while
exported DMABUF descriptor is in use.
Signed-off-by: Tomasz Stanislawski
Acked-by: Sumit Semwal
Acked-by: Daniel Vetter
---
drivers/gpu/drm/exynos/exynos_drm_dmabuf.c |1 +
drivers/gpu/drm/i915/i915_gem_dmabuf.c |1 +
drivers/gpu/drm/nouveau/nouveau_prime.c|1 +
drivers/gpu/drm/radeon/radeon_prime.c |1 +
drivers/staging/omapdrm/omap_gem_dmabuf.c |1 +
5 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
index 613bf8a..cf3bc6d 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
@@ -164,6 +164,7 @@ static void exynos_gem_dmabuf_kunmap(struct dma_buf
*dma_buf,
}
static struct dma_buf_ops exynos_dmabuf_ops = {
+ .owner = THIS_MODULE,
.map_dma_buf= exynos_gem_map_dma_buf,
.unmap_dma_buf = exynos_gem_unmap_dma_buf,
.kmap = exynos_gem_dmabuf_kmap,
diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
index aa308e1..07ff03b 100644
--- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
@@ -152,6 +152,7 @@ static int i915_gem_dmabuf_mmap(struct dma_buf *dma_buf,
struct vm_area_struct *
}
static const struct dma_buf_ops i915_dmabuf_ops = {
+ .owner = THIS_MODULE,
.map_dma_buf = i915_gem_map_dma_buf,
.unmap_dma_buf = i915_gem_unmap_dma_buf,
.release = i915_gem_dmabuf_release,
diff --git a/drivers/gpu/drm/nouveau/nouveau_prime.c
b/drivers/gpu/drm/nouveau/nouveau_prime.c
index a25cf2c..8605033 100644
--- a/drivers/gpu/drm/nouveau/nouveau_prime.c
+++ b/drivers/gpu/drm/nouveau/nouveau_prime.c
@@ -127,6 +127,7 @@ static void nouveau_gem_prime_vunmap(struct dma_buf
*dma_buf, void *vaddr)
}
static const struct dma_buf_ops nouveau_dmabuf_ops = {
+ .owner = THIS_MODULE,
.map_dma_buf = nouveau_gem_map_dma_buf,
.unmap_dma_buf = nouveau_gem_unmap_dma_buf,
.release = nouveau_gem_dmabuf_release,
diff --git a/drivers/gpu/drm/radeon/radeon_prime.c
b/drivers/gpu/drm/radeon/radeon_prime.c
index 6bef46a..4061fd3 100644
--- a/drivers/gpu/drm/radeon/radeon_prime.c
+++ b/drivers/gpu/drm/radeon/radeon_prime.c
@@ -127,6 +127,7 @@ static void radeon_gem_prime_vunmap(struct dma_buf
*dma_buf, void *vaddr)
mutex_unlock(&dev->struct_mutex);
}
const static struct dma_buf_ops radeon_dmabuf_ops = {
+ .owner = THIS_MODULE,
.map_dma_buf = radeon_gem_map_dma_buf,
.unmap_dma_buf = radeon_gem_unmap_dma_buf,
.release = radeon_gem_dmabuf_release,
diff --git a/drivers/staging/omapdrm/omap_gem_dmabuf.c
b/drivers/staging/omapdrm/omap_gem_dmabuf.c
index 42728e0..6a4dd67 100644
--- a/drivers/staging/omapdrm/omap_gem_dmabuf.c
+++ b/drivers/staging/omapdrm/omap_gem_dmabuf.c
@@ -179,6 +179,7 @@ out_unlock:
}
struct dma_buf_ops omap_dmabuf_ops = {
+ .owner = THIS_MODULE,
.map_dma_buf = omap_gem_map_dma_buf,
.unmap_dma_buf = omap_gem_unmap_dma_buf,
.release = omap_gem_dmabuf_release,
--
1.7.9.5
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[Bug 53291] New: Failed to allocate a buffer at CAYMAN
https://bugs.freedesktop.org/show_bug.cgi?id=53291 Bug #: 53291 Summary: Failed to allocate a buffer at CAYMAN Classification: Unclassified Product: DRI Version: DRI CVS Platform: x86-64 (AMD64) OS/Version: Linux (All) Status: NEW Severity: normal Priority: medium Component: libdrm AssignedTo: dri-devel@lists.freedesktop.org ReportedBy: v10la...@myway.de I see this error randomly with different games. Good reproducable with minecraft (appears at the first minutes of gameplay). radeon: Failed to allocate a buffer: radeon:size : 4096 bytes radeon:alignment : 4096 bytes radeon:domains : 2 This shows up in dmesg: Also (don't know if that is related or if I should open a new report for it) I randomly get a similar error. Good reproducible by playing two instances of minecraft at the same time: radeon: Failed to allocate a buffer: radeon:size : 4096 bytes radeon:alignment : 256 bytes radeon:domains : 2 EE r600_texture.c:552 r600_texture_get_transfer - failed to create temporary texture to hold untiled copy ## GL ERROR ## @ Pre render 1285: Out of memory Some more: radeon: Failed to allocate a buffer: radeon:size : 4096 bytes radeon:alignment : 256 bytes radeon:domains : 2 EE r600_texture.c:552 r600_texture_get_transfer - failed to create temporary texture to hold untiled copy radeon: Failed to allocate a buffer: radeon:size : 4096 bytes radeon:alignment : 256 bytes radeon:domains : 2 EE r600_texture.c:552 r600_texture_get_transfer - failed to create temporary texture to hold untiled copy radeon: Failed to allocate a buffer: radeon:size : 4096 bytes radeon:alignment : 256 bytes radeon:domains : 2 EE r600_texture.c:552 r600_texture_get_transfer - failed to create temporary texture to hold untiled copy radeon: Failed to allocate a buffer: radeon:size : 4096 bytes radeon:alignment : 256 bytes radeon:domains : 2 EE r600_texture.c:552 r600_texture_get_transfer - failed to create temporary texture to hold untiled copy radeon: Failed to allocate a buffer: radeon:size : 4096 bytes radeon:alignment : 256 bytes radeon:domains : 2 EE r600_texture.c:552 r600_texture_get_transfer - failed to create temporary texture to hold untiled copy ## GL ERROR ## @ Pre render 1285: Out of memory This shows up in dmesg: [ 2581.428385] radeon :03:00.0: bo 880132b8d800 va 0x0277F000 conflict with (bo 880115520400 0x0277F000 0x0278) [ 3226.086410] radeon :03:00.0: bo 880137603800 va 0x04D2 conflict with (bo 88012eba9000 0x04D2 0x04D21000) [ 3226.087925] radeon :03:00.0: bo 880137603800 va 0x04D2 conflict with (bo 88012eba9000 0x04D2 0x04D21000) [ 3226.092606] radeon :03:00.0: bo 880137603800 va 0x04D2 conflict with (bo 88012eba9000 0x04D2 0x04D21000) [ 3226.093541] radeon :03:00.0: bo 880137603800 va 0x04D2 conflict with (bo 88012eba9000 0x04D2 0x04D21000) [ 3226.094905] radeon :03:00.0: bo 880137603800 va 0x04D2 conflict with (bo 88012eba9000 0x04D2 0x04D21000) [ 3226.448935] radeon :03:00.0: bo 880137647400 va 0x04D4E000 conflict with (bo 880148407c00 0x04D4E000 0x04D4F000) [ 3278.230509] radeon :03:00.0: bo 88014930 va 0x148B1000 conflict with (bo 88012f656c00 0x148B1000 0x148B2000) [ 3759.347944] radeon :03:00.0: bo 880113d36c00 va 0x04ED2000 conflict with (bo 88013d72bc00 0x04ED2000 0x04ED3000) [ 3899.333115] radeon :03:00.0: bo 88013c35ac00 va 0x0C17B000 conflict with (bo 880115523800 0x0C17B000 0x0C17C000) [ 3960.510231] radeon :03:00.0: bo 88012422bc00 va 0x05C49000 conflict with (bo 88014318fc00 0x05C49000 0x05C4A000) [ 3960.510673] radeon :03:00.0: bo 88012422bc00 va 0x05C49000 conflict with (bo 88014318fc00 0x05C49000 0x05C4A000) [ 3960.511108] radeon :03:00.0: bo 88012422bc00 va 0x05C49000 conflict with (bo 88014318fc00 0x05C49000 0x05C4A000) [ 3960.511716] radeon :03:00.0: bo 8801374f9800 va 0x05C49000 conflict with (bo 88014318fc00 0x05C49000 0x05C4A000) [ 3960.512308] radeon :03:00.0: bo 8801374f9800 va 0x05C49000 conflict with (bo 88014318fc00 0x05C49000 0x05C4A000) This is with the git versions of the radon driver, libdrm, mesa and the 3.5 kernel. The card beeing used is a Sapphire Radeon HD 6950 with 2GB. lspci -v: 03:00.0 VGA compatible controller: Advanced Micro Devices [AMD] nee ATI Cayman PRO [Radeon HD 6950] (prog-if 00 [VGA controller]) Subsystem: PC Partner Limited Device 186b Flags: bus master, fast devsel, latency 0, IRQ 43 Memory at d000 (64-bit, prefetchable) [size=256M] Memory at fe9e (64-bit, non-prefetchable) [size=128K] I/O ports at d000 [size=256] Expansion R
[Bug 16273] suspend/resume failure with radeon kms driver
https://bugzilla.kernel.org/show_bug.cgi?id=16273 Alan changed: What|Removed |Added Status|NEW |RESOLVED CC||a...@lxorguk.ukuu.org.uk Resolution||OBSOLETE --- Comment #8 from Alan 2012-08-09 13:59:44 --- The driver has changed so much that this bug report is really obsolete. If you see the problem with a modern (3.2/4/5 kernel) feel free to update it -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 53291] Failed to allocate a buffer at CAYMAN
https://bugs.freedesktop.org/show_bug.cgi?id=53291 --- Comment #1 from Alex Deucher 2012-08-09 14:08:54 UTC --- possibly a duplicate of bug 45018. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 16295] radeon conflict/interference with rt2800pci
https://bugzilla.kernel.org/show_bug.cgi?id=16295 Alan changed: What|Removed |Added Status|NEW |RESOLVED CC||a...@lxorguk.ukuu.org.uk Resolution||OBSOLETE -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 45018] [bisected] rendering regression and va conflicts since added support for virtual address space on cayman v11
https://bugs.freedesktop.org/show_bug.cgi?id=45018 --- Comment #114 from Alex Deucher 2012-08-09 14:14:04 UTC --- Please test mesa from git (no additional patches) and make sure your kernel has this patch: http://lists.freedesktop.org/archives/dri-devel/2012-August/026015.html (no other kernel patches). -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 16375] missing blit_vb check in r600_prepare_blit_copy
https://bugzilla.kernel.org/show_bug.cgi?id=16375 Alan changed: What|Removed |Added Status|NEW |RESOLVED CC||a...@lxorguk.ukuu.org.uk Resolution||CODE_FIX -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 1/3] drm/radeon/kms: reorder code in r600_check_texture_resource
Signed-off-by: Marek Olšák
---
drivers/gpu/drm/radeon/r600_cs.c | 52 +++---
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index 1119e31..ff61402 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -1559,13 +1559,14 @@ static int r600_check_texture_resource(struct
radeon_cs_parser *p, u32 idx,
u32 tiling_flags)
{
struct r600_cs_track *track = p->track;
- u32 nfaces, llevel, blevel, w0, h0, d0;
- u32 word0, word1, l0_size, mipmap_size, word2, word3;
+ u32 dim, nfaces, llevel, blevel, w0, h0, d0;
+ u32 word0, word1, l0_size, mipmap_size, word2, word3, word4, word5;
u32 height_align, pitch, pitch_align, depth_align;
- u32 array, barray, larray;
+ u32 barray, larray;
u64 base_align;
struct array_mode_checker array_check;
u32 format;
+ bool is_array;
/* on legacy kernel we don't perform advanced check */
if (p->rdev == NULL)
@@ -1583,12 +1584,28 @@ static int r600_check_texture_resource(struct
radeon_cs_parser *p, u32 idx,
word0 |=
S_038000_TILE_MODE(V_038000_ARRAY_1D_TILED_THIN1);
}
word1 = radeon_get_ib_value(p, idx + 1);
+ word2 = radeon_get_ib_value(p, idx + 2) << 8;
+ word3 = radeon_get_ib_value(p, idx + 3) << 8;
+ word4 = radeon_get_ib_value(p, idx + 4);
+ word5 = radeon_get_ib_value(p, idx + 5);
+ dim = G_038000_DIM(word0);
w0 = G_038000_TEX_WIDTH(word0) + 1;
+ pitch = (G_038000_PITCH(word0) + 1) * 8;
h0 = G_038004_TEX_HEIGHT(word1) + 1;
d0 = G_038004_TEX_DEPTH(word1);
+ format = G_038004_DATA_FORMAT(word1);
+ blevel = G_038010_BASE_LEVEL(word4);
+ llevel = G_038014_LAST_LEVEL(word5);
+ /* pitch in texels */
+ array_check.array_mode = G_038000_TILE_MODE(word0);
+ array_check.group_size = track->group_size;
+ array_check.nbanks = track->nbanks;
+ array_check.npipes = track->npipes;
+ array_check.nsamples = 1;
+ array_check.blocksize = r600_fmt_get_blocksize(format);
nfaces = 1;
- array = 0;
- switch (G_038000_DIM(word0)) {
+ is_array = false;
+ switch (dim) {
case V_038000_SQ_TEX_DIM_1D:
case V_038000_SQ_TEX_DIM_2D:
case V_038000_SQ_TEX_DIM_3D:
@@ -1601,7 +1618,7 @@ static int r600_check_texture_resource(struct
radeon_cs_parser *p, u32 idx,
break;
case V_038000_SQ_TEX_DIM_1D_ARRAY:
case V_038000_SQ_TEX_DIM_2D_ARRAY:
- array = 1;
+ is_array = true;
break;
case V_038000_SQ_TEX_DIM_2D_MSAA:
case V_038000_SQ_TEX_DIM_2D_ARRAY_MSAA:
@@ -1609,21 +1626,12 @@ static int r600_check_texture_resource(struct
radeon_cs_parser *p, u32 idx,
dev_warn(p->dev, "this kernel doesn't support %d texture
dim\n", G_038000_DIM(word0));
return -EINVAL;
}
- format = G_038004_DATA_FORMAT(word1);
if (!r600_fmt_is_valid_texture(format, p->family)) {
dev_warn(p->dev, "%s:%d texture invalid format %d\n",
__func__, __LINE__, format);
return -EINVAL;
}
- /* pitch in texels */
- pitch = (G_038000_PITCH(word0) + 1) * 8;
- array_check.array_mode = G_038000_TILE_MODE(word0);
- array_check.group_size = track->group_size;
- array_check.nbanks = track->nbanks;
- array_check.npipes = track->npipes;
- array_check.nsamples = 1;
- array_check.blocksize = r600_fmt_get_blocksize(format);
if (r600_get_array_mode_alignment(&array_check,
&pitch_align, &height_align,
&depth_align, &base_align)) {
dev_warn(p->dev, "%s:%d tex array mode (%d) invalid\n",
@@ -1649,20 +1657,13 @@ static int r600_check_texture_resource(struct
radeon_cs_parser *p, u32 idx,
return -EINVAL;
}
- word2 = radeon_get_ib_value(p, idx + 2) << 8;
- word3 = radeon_get_ib_value(p, idx + 3) << 8;
-
- word0 = radeon_get_ib_value(p, idx + 4);
- word1 = radeon_get_ib_value(p, idx + 5);
- blevel = G_038010_BASE_LEVEL(word0);
- llevel = G_038014_LAST_LEVEL(word1);
if (blevel > llevel) {
dev_warn(p->dev, "texture blevel %d > llevel %d\n",
blevel, llevel);
}
- if (array == 1) {
- barray = G_038014_BASE_ARRAY(word1);
- larray = G_038014_LAST_ARRAY(word1);
+ if (is_array) {
+ barray = G_038014_BASE_ARRAY(word5);
+ larray = G_038014_LAST_ARRAY(word5);
nfaces = larray - barray + 1;
}
@@ -1679,7 +1680,6 @@ static int r600_check_texture_resource(struc
[PATCH 2/3] drm/radeon/kms: add MSAA texture support for r600-evergreen
Most of the checking seems to be in place already. As you can see, log2(number of samples) resides in LAST_LEVEL. This is required for MSAA support (namely for depth-stencil resolve and blitting between MSAA resources). Signed-off-by: Marek Olšák --- drivers/gpu/drm/radeon/evergreen_cs.c |7 +++ drivers/gpu/drm/radeon/r600_cs.c |7 ++- drivers/gpu/drm/radeon/radeon_drv.c |3 ++- 3 files changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index f2e5c54..e44a62a 100644 --- a/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/drivers/gpu/drm/radeon/evergreen_cs.c @@ -788,6 +788,13 @@ static int evergreen_cs_track_validate_texture(struct radeon_cs_parser *p, case V_03_SQ_TEX_DIM_1D_ARRAY: case V_03_SQ_TEX_DIM_2D_ARRAY: depth = 1; + break; + case V_03_SQ_TEX_DIM_2D_MSAA: + case V_03_SQ_TEX_DIM_2D_ARRAY_MSAA: + surf.nsamples = 1 << llevel; + llevel = 0; + depth = 1; + break; case V_03_SQ_TEX_DIM_3D: break; default: diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index ff61402..3dab49c 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c @@ -1620,8 +1620,13 @@ static int r600_check_texture_resource(struct radeon_cs_parser *p, u32 idx, case V_038000_SQ_TEX_DIM_2D_ARRAY: is_array = true; break; - case V_038000_SQ_TEX_DIM_2D_MSAA: case V_038000_SQ_TEX_DIM_2D_ARRAY_MSAA: + is_array = true; + /* fall through */ + case V_038000_SQ_TEX_DIM_2D_MSAA: + array_check.nsamples = 1 << llevel; + llevel = 0; + break; default: dev_warn(p->dev, "this kernel doesn't support %d texture dim\n", G_038000_DIM(word0)); return -EINVAL; diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 4b736ec..a7f8ac0 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -60,9 +60,10 @@ * 2.16.0 - fix evergreen 2D tiled surface calculation * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx * 2.18.0 - r600-eg: allow "invalid" DB formats + * 2.19.0 - r600-eg: MSAA textures */ #define KMS_DRIVER_MAJOR 2 -#define KMS_DRIVER_MINOR 18 +#define KMS_DRIVER_MINOR 19 #define KMS_DRIVER_PATCHLEVEL 0 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); int radeon_driver_unload_kms(struct drm_device *dev); -- 1.7.9.5 ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 3/3] drm/radeon/kms: implement timestamp userspace query
Signed-off-by: Marek Olšák
---
drivers/gpu/drm/radeon/r600.c | 12 +++
drivers/gpu/drm/radeon/r600d.h |3 +++
drivers/gpu/drm/radeon/radeon.h|1 +
drivers/gpu/drm/radeon/radeon_asic.h |2 ++
drivers/gpu/drm/radeon/radeon_device.c |1 +
drivers/gpu/drm/radeon/radeon_drv.c|2 +-
drivers/gpu/drm/radeon/radeon_kms.c| 35 ++--
drivers/gpu/drm/radeon/si.c| 11 ++
drivers/gpu/drm/radeon/sid.h |3 +++
include/drm/radeon_drm.h |2 ++
10 files changed, 65 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 637280f..be0e320 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -3789,3 +3789,15 @@ static void r600_pcie_gen2_enable(struct radeon_device
*rdev)
WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
}
}
+
+uint64_t r600_get_gpu_clock(struct radeon_device *rdev)
+{
+ uint64_t clock;
+
+ mutex_lock(&rdev->gpu_clock_mutex);
+ WREG32(RLC_CAPTURE_GPU_CLOCK_COUNT, 1);
+ clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) |
+ ((uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_MSB) << 32);
+ mutex_unlock(&rdev->gpu_clock_mutex);
+ return clock;
+}
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index 4b116ae..fd328f4 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -602,6 +602,9 @@
#define RLC_HB_WPTR 0x3f1c
#define RLC_HB_WPTR_LSB_ADDR 0x3f14
#define RLC_HB_WPTR_MSB_ADDR 0x3f18
+#define RLC_GPU_CLOCK_COUNT_LSB 0x3f38
+#define RLC_GPU_CLOCK_COUNT_MSB 0x3f3c
+#define RLC_CAPTURE_GPU_CLOCK_COUNT 0x3f40
#define RLC_MC_CNTL 0x3f44
#define RLC_UCODE_CNTL0x3f48
#define RLC_UCODE_ADDR0x3f2c
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 5431af2..150097f 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1533,6 +1533,7 @@ struct radeon_device {
unsigneddebugfs_count;
/* virtual memory */
struct radeon_vm_managervm_manager;
+ struct mutexgpu_clock_mutex;
};
int radeon_device_init(struct radeon_device *rdev,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
b/drivers/gpu/drm/radeon/radeon_asic.h
index f4af243..cbba387 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -371,6 +371,7 @@ void r600_kms_blit_copy(struct radeon_device *rdev,
unsigned num_gpu_pages,
struct radeon_sa_bo *vb);
int r600_mc_wait_for_idle(struct radeon_device *rdev);
+uint64_t r600_get_gpu_clock(struct radeon_device *rdev);
/*
* rv770,rv730,rv710,rv740
@@ -472,5 +473,6 @@ int si_vm_bind(struct radeon_device *rdev, struct radeon_vm
*vm, int id);
void si_vm_unbind(struct radeon_device *rdev, struct radeon_vm *vm);
void si_vm_tlb_flush(struct radeon_device *rdev, struct radeon_vm *vm);
int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib);
+uint64_t si_get_gpu_clock(struct radeon_device *rdev);
#endif
diff --git a/drivers/gpu/drm/radeon/radeon_device.c
b/drivers/gpu/drm/radeon/radeon_device.c
index 742af82..d2e2438 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -1009,6 +1009,7 @@ int radeon_device_init(struct radeon_device *rdev,
atomic_set(&rdev->ih.lock, 0);
mutex_init(&rdev->gem.mutex);
mutex_init(&rdev->pm.mutex);
+ mutex_init(&rdev->gpu_clock_mutex);
init_rwsem(&rdev->pm.mclk_lock);
init_rwsem(&rdev->exclusive_lock);
init_waitqueue_head(&rdev->irq.vblank_queue);
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c
b/drivers/gpu/drm/radeon/radeon_drv.c
index a7f8ac0..f940806 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -60,7 +60,7 @@
* 2.16.0 - fix evergreen 2D tiled surface calculation
* 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
* 2.18.0 - r600-eg: allow "invalid" DB formats
- * 2.19.0 - r600-eg: MSAA textures
+ * 2.19.0 - r600-eg: MSAA textures; r600-si: RADEON_INFO_TIMESTAMP query
*/
#define KMS_DRIVER_MAJOR 2
#define KMS_DRIVER_MINOR 19
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c
b/drivers/gpu/drm/radeon/radeon_kms.c
index 1d73f16..414b4ac 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -29,6 +29,7 @@
#include "drm_sarea.h"
#include "radeon.h"
#include "radeon_drm.h"
+#include "radeon_asic.h"
[PATCH 1/2] radeon: force 2D tiling for MSAA surfaces
---
radeon/radeon_surface.c | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c
index 874a092..499e994 100644
--- a/radeon/radeon_surface.c
+++ b/radeon/radeon_surface.c
@@ -154,7 +154,7 @@ static void surf_minify(struct radeon_surface *surf,
surf->level[level].nblk_x = (surf->level[level].npix_x + surf->blk_w - 1)
/ surf->blk_w;
surf->level[level].nblk_y = (surf->level[level].npix_y + surf->blk_h - 1)
/ surf->blk_h;
surf->level[level].nblk_z = (surf->level[level].npix_z + surf->blk_d - 1)
/ surf->blk_d;
-if (surf->level[level].mode == RADEON_SURF_MODE_2D) {
+if (surf->nsamples == 1 && surf->level[level].mode == RADEON_SURF_MODE_2D)
{
if (surf->level[level].nblk_x < xalign || surf->level[level].nblk_y <
yalign) {
surf->level[level].mode = RADEON_SURF_MODE_1D;
return;
@@ -382,6 +382,12 @@ static int r6_surface_init(struct radeon_surface_manager
*surf_man,
unsigned mode;
int r;
+/* MSAA surfaces support the 2D mode only. */
+if (surf->nsamples > 1) {
+surf->flags = RADEON_SURF_CLR(surf->flags, MODE);
+surf->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE);
+}
+
/* tiling mode */
mode = (surf->flags >> RADEON_SURF_MODE_SHIFT) & RADEON_SURF_MODE_MASK;
@@ -401,6 +407,10 @@ static int r6_surface_init(struct radeon_surface_manager
*surf_man,
/* force 1d on kernel that can't do 2d */
if (!surf_man->hw_info.allow_2d && mode > RADEON_SURF_MODE_1D) {
+if (surf->nsamples > 1) {
+fprintf(stderr, "radeon: Cannot use 2D tiling for an MSAA surface
(%i).\n", __LINE__);
+return -EFAULT;
+}
mode = RADEON_SURF_MODE_1D;
surf->flags = RADEON_SURF_CLR(surf->flags, MODE);
surf->flags |= RADEON_SURF_SET(mode, MODE);
@@ -548,7 +558,7 @@ static void eg_surf_minify(struct radeon_surface *surf,
surf->level[level].nblk_x = (surf->level[level].npix_x + surf->blk_w - 1)
/ surf->blk_w;
surf->level[level].nblk_y = (surf->level[level].npix_y + surf->blk_h - 1)
/ surf->blk_h;
surf->level[level].nblk_z = (surf->level[level].npix_z + surf->blk_d - 1)
/ surf->blk_d;
-if (surf->level[level].mode == RADEON_SURF_MODE_2D) {
+if (surf->nsamples == 1 && surf->level[level].mode == RADEON_SURF_MODE_2D)
{
if (surf->level[level].nblk_x < mtilew || surf->level[level].nblk_y <
mtileh) {
surf->level[level].mode = RADEON_SURF_MODE_1D;
return;
@@ -687,6 +697,10 @@ static int eg_surface_sanity(struct radeon_surface_manager
*surf_man,
/* force 1d on kernel that can't do 2d */
if (!surf_man->hw_info.allow_2d && mode > RADEON_SURF_MODE_1D) {
+if (surf->nsamples > 1) {
+fprintf(stderr, "radeon: Cannot use 2D tiling for an MSAA surface
(%i).\n", __LINE__);
+return -EFAULT;
+}
mode = RADEON_SURF_MODE_1D;
surf->flags = RADEON_SURF_CLR(surf->flags, MODE);
surf->flags |= RADEON_SURF_SET(mode, MODE);
@@ -754,6 +768,12 @@ static int eg_surface_init(struct radeon_surface_manager
*surf_man,
unsigned mode;
int r;
+/* MSAA surfaces support the 2D mode only. */
+if (surf->nsamples > 1) {
+surf->flags = RADEON_SURF_CLR(surf->flags, MODE);
+surf->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE);
+}
+
/* tiling mode */
mode = (surf->flags >> RADEON_SURF_MODE_SHIFT) & RADEON_SURF_MODE_MASK;
--
1.7.9.5
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[PATCH 2/2] radeon: tweak TILE_SPLIT for MSAA surfaces
---
radeon/radeon_surface.c | 37 +++--
1 file changed, 31 insertions(+), 6 deletions(-)
diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c
index 499e994..892dca6 100644
--- a/radeon/radeon_surface.c
+++ b/radeon/radeon_surface.c
@@ -871,12 +871,37 @@ static int eg_surface_best(struct radeon_surface_manager
*surf_man,
return 0;
}
-/* set tile split to row size, optimize latter for multi-sample surface
- * tile split >= 256 for render buffer surface. Also depth surface want
- * smaller value for optimal performances.
- */
-surf->tile_split = surf_man->hw_info.row_size;
-surf->stencil_tile_split = surf_man->hw_info.row_size / 2;
+/* Tweak TILE_SPLIT for performance here. */
+if (surf->nsamples > 1) {
+if (surf->flags & (RADEON_SURF_ZBUFFER | RADEON_SURF_SBUFFER)) {
+switch (surf->nsamples) {
+case 2:
+surf->tile_split = 128;
+break;
+case 4:
+surf->tile_split = 128;
+break;
+case 8:
+surf->tile_split = 256;
+break;
+case 16: /* cayman only */
+surf->tile_split = 512;
+break;
+default:
+fprintf(stderr, "radeon: Wrong number of samples %i (%i)\n",
+surf->nsamples, __LINE__);
+return -EINVAL;
+}
+surf->stencil_tile_split = 64;
+} else {
+/* tile split must be >= 256 for colorbuffer surfaces */
+surf->tile_split = MAX2(surf->nsamples * surf->bpe * 64, 256);
+}
+} else {
+/* set tile split to row size */
+surf->tile_split = surf_man->hw_info.row_size;
+surf->stencil_tile_split = surf_man->hw_info.row_size / 2;
+}
/* bankw or bankh greater than 1 increase alignment requirement, not
* sure if it's worth using smaller bankw & bankh to stick with 2D
--
1.7.9.5
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[Bug 50450] OpenGL does not work or works very slowly on Radeon HD3850
https://bugs.freedesktop.org/show_bug.cgi?id=50450 Andreas Boll changed: What|Removed |Added Component|Drivers/DRI/R600|Drivers/Gallium/r600 --- Comment #11 from Andreas Boll 2012-08-09 14:53:12 UTC --- glxinfo in comment 1 shows: OpenGL renderer string: Gallium 0.4 on AMD RV670 -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 53283] Rendering problems in Sacred with Radeon and Nvidia
https://bugs.freedesktop.org/show_bug.cgi?id=53283 --- Comment #8 from kh3...@yandex.ru 2012-08-09 14:54:08 UTC --- OK, I'll try. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are on the CC list for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v2 1/2] dma-buf: add reference counting for exporter module
Hi Greg, On 08/09/2012 04:23 PM, Greg KH wrote: > On Thu, Aug 09, 2012 at 11:36:21AM +0200, Tomasz Stanislawski wrote: >> This patch adds reference counting on a module that exported dma-buf and >> implements its operations. This prevents the module from being unloaded while >> DMABUF file is in use. > > Why force all of the modules to be changed "by hand", and not just do > this automatically by changing the register function to include the > THIS_MODULE macro in it? Much like the pci_register_driver() function > is implemented in include/linux/pci.h? Thank you for the hint. The owner field belongs to dma_buf_ops structure that is often a 'const' entity. Therefore owner field would have to be moved to 'struct dma_buf' to avoid 'deconstification' issues. Regards, Tomasz Stanislawski > > That makes it impossible for driver authors to get it wrong, which is > always a good sign of a correct api. > > thanks, > > greg k-h > ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 45018] [bisected] rendering regression and va conflicts since added support for virtual address space on cayman v11
https://bugs.freedesktop.org/show_bug.cgi?id=45018 --- Comment #115 from Alexandre Demers 2012-08-09 14:56:34 UTC --- (In reply to comment #114) > Please test mesa from git (no additional patches) and make sure your kernel > has > this patch: > http://lists.freedesktop.org/archives/dri-devel/2012-August/026015.html > (no other kernel patches). It looks pretty much to what I was testing with (latest mesa git without any patch as explained in comment 112) where I had already applied Jerome's patch v2 (no other patch). v4 doesn't seem to have any major differences (according to comment for v3 and v4). Nevertheless, I'll recompile kernel 3.6-rc1 with patch v4 just in case, though I would be surprised if that would make a difference from test/error reported in comment 113. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 3/3] drm/radeon/kms: implement timestamp userspace query
On Thu, Aug 9, 2012 at 10:34 AM, Marek Olšák wrote:
> Signed-off-by: Marek Olšák
Some comment inline that need a v2 at least for version otherwise
Reviewed-by: Jerome Glisse
> ---
> drivers/gpu/drm/radeon/r600.c | 12 +++
> drivers/gpu/drm/radeon/r600d.h |3 +++
> drivers/gpu/drm/radeon/radeon.h|1 +
> drivers/gpu/drm/radeon/radeon_asic.h |2 ++
> drivers/gpu/drm/radeon/radeon_device.c |1 +
> drivers/gpu/drm/radeon/radeon_drv.c|2 +-
> drivers/gpu/drm/radeon/radeon_kms.c| 35
> ++--
> drivers/gpu/drm/radeon/si.c| 11 ++
> drivers/gpu/drm/radeon/sid.h |3 +++
> include/drm/radeon_drm.h |2 ++
> 10 files changed, 65 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
> index 637280f..be0e320 100644
> --- a/drivers/gpu/drm/radeon/r600.c
> +++ b/drivers/gpu/drm/radeon/r600.c
> @@ -3789,3 +3789,15 @@ static void r600_pcie_gen2_enable(struct radeon_device
> *rdev)
> WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
> }
> }
> +
> +uint64_t r600_get_gpu_clock(struct radeon_device *rdev)
> +{
> + uint64_t clock;
> +
> + mutex_lock(&rdev->gpu_clock_mutex);
> + WREG32(RLC_CAPTURE_GPU_CLOCK_COUNT, 1);
> + clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) |
> + ((uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_MSB) << 32);
I keep forgeting about c type rules but i think you want 32ULL
> + mutex_unlock(&rdev->gpu_clock_mutex);
> + return clock;
> +}
> diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
> index 4b116ae..fd328f4 100644
> --- a/drivers/gpu/drm/radeon/r600d.h
> +++ b/drivers/gpu/drm/radeon/r600d.h
> @@ -602,6 +602,9 @@
> #define RLC_HB_WPTR 0x3f1c
> #define RLC_HB_WPTR_LSB_ADDR 0x3f14
> #define RLC_HB_WPTR_MSB_ADDR 0x3f18
> +#define RLC_GPU_CLOCK_COUNT_LSB 0x3f38
> +#define RLC_GPU_CLOCK_COUNT_MSB 0x3f3c
> +#define RLC_CAPTURE_GPU_CLOCK_COUNT 0x3f40
> #define RLC_MC_CNTL 0x3f44
> #define RLC_UCODE_CNTL0x3f48
> #define RLC_UCODE_ADDR0x3f2c
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index 5431af2..150097f 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -1533,6 +1533,7 @@ struct radeon_device {
> unsigneddebugfs_count;
> /* virtual memory */
> struct radeon_vm_managervm_manager;
> + struct mutexgpu_clock_mutex;
> };
>
> int radeon_device_init(struct radeon_device *rdev,
> diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
> b/drivers/gpu/drm/radeon/radeon_asic.h
> index f4af243..cbba387 100644
> --- a/drivers/gpu/drm/radeon/radeon_asic.h
> +++ b/drivers/gpu/drm/radeon/radeon_asic.h
> @@ -371,6 +371,7 @@ void r600_kms_blit_copy(struct radeon_device *rdev,
> unsigned num_gpu_pages,
> struct radeon_sa_bo *vb);
> int r600_mc_wait_for_idle(struct radeon_device *rdev);
> +uint64_t r600_get_gpu_clock(struct radeon_device *rdev);
>
> /*
> * rv770,rv730,rv710,rv740
> @@ -472,5 +473,6 @@ int si_vm_bind(struct radeon_device *rdev, struct
> radeon_vm *vm, int id);
> void si_vm_unbind(struct radeon_device *rdev, struct radeon_vm *vm);
> void si_vm_tlb_flush(struct radeon_device *rdev, struct radeon_vm *vm);
> int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib);
> +uint64_t si_get_gpu_clock(struct radeon_device *rdev);
>
> #endif
> diff --git a/drivers/gpu/drm/radeon/radeon_device.c
> b/drivers/gpu/drm/radeon/radeon_device.c
> index 742af82..d2e2438 100644
> --- a/drivers/gpu/drm/radeon/radeon_device.c
> +++ b/drivers/gpu/drm/radeon/radeon_device.c
> @@ -1009,6 +1009,7 @@ int radeon_device_init(struct radeon_device *rdev,
> atomic_set(&rdev->ih.lock, 0);
> mutex_init(&rdev->gem.mutex);
> mutex_init(&rdev->pm.mutex);
> + mutex_init(&rdev->gpu_clock_mutex);
> init_rwsem(&rdev->pm.mclk_lock);
> init_rwsem(&rdev->exclusive_lock);
> init_waitqueue_head(&rdev->irq.vblank_queue);
> diff --git a/drivers/gpu/drm/radeon/radeon_drv.c
> b/drivers/gpu/drm/radeon/radeon_drv.c
> index a7f8ac0..f940806 100644
> --- a/drivers/gpu/drm/radeon/radeon_drv.c
> +++ b/drivers/gpu/drm/radeon/radeon_drv.c
> @@ -60,7 +60,7 @@
> * 2.16.0 - fix evergreen 2D tiled surface calculation
> * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
> * 2.18.0 - r600-eg: allow "invalid" DB formats
> - * 2.19.0 - r600-eg: MSAA textures
> + * 2.19.0 - r600-eg: MSAA textures; r60
Re: [PATCH 1/3] drm/radeon/kms: reorder code in r600_check_texture_resource
On Thu, Aug 9, 2012 at 10:34 AM, Marek Olšák wrote:
> Signed-off-by: Marek Olšák
Reviewed-by: Jerome Glisse
> ---
> drivers/gpu/drm/radeon/r600_cs.c | 52
> +++---
> 1 file changed, 26 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/r600_cs.c
> b/drivers/gpu/drm/radeon/r600_cs.c
> index 1119e31..ff61402 100644
> --- a/drivers/gpu/drm/radeon/r600_cs.c
> +++ b/drivers/gpu/drm/radeon/r600_cs.c
> @@ -1559,13 +1559,14 @@ static int r600_check_texture_resource(struct
> radeon_cs_parser *p, u32 idx,
> u32 tiling_flags)
> {
> struct r600_cs_track *track = p->track;
> - u32 nfaces, llevel, blevel, w0, h0, d0;
> - u32 word0, word1, l0_size, mipmap_size, word2, word3;
> + u32 dim, nfaces, llevel, blevel, w0, h0, d0;
> + u32 word0, word1, l0_size, mipmap_size, word2, word3, word4, word5;
> u32 height_align, pitch, pitch_align, depth_align;
> - u32 array, barray, larray;
> + u32 barray, larray;
> u64 base_align;
> struct array_mode_checker array_check;
> u32 format;
> + bool is_array;
>
> /* on legacy kernel we don't perform advanced check */
> if (p->rdev == NULL)
> @@ -1583,12 +1584,28 @@ static int r600_check_texture_resource(struct
> radeon_cs_parser *p, u32 idx,
> word0 |=
> S_038000_TILE_MODE(V_038000_ARRAY_1D_TILED_THIN1);
> }
> word1 = radeon_get_ib_value(p, idx + 1);
> + word2 = radeon_get_ib_value(p, idx + 2) << 8;
> + word3 = radeon_get_ib_value(p, idx + 3) << 8;
> + word4 = radeon_get_ib_value(p, idx + 4);
> + word5 = radeon_get_ib_value(p, idx + 5);
> + dim = G_038000_DIM(word0);
> w0 = G_038000_TEX_WIDTH(word0) + 1;
> + pitch = (G_038000_PITCH(word0) + 1) * 8;
> h0 = G_038004_TEX_HEIGHT(word1) + 1;
> d0 = G_038004_TEX_DEPTH(word1);
> + format = G_038004_DATA_FORMAT(word1);
> + blevel = G_038010_BASE_LEVEL(word4);
> + llevel = G_038014_LAST_LEVEL(word5);
> + /* pitch in texels */
> + array_check.array_mode = G_038000_TILE_MODE(word0);
> + array_check.group_size = track->group_size;
> + array_check.nbanks = track->nbanks;
> + array_check.npipes = track->npipes;
> + array_check.nsamples = 1;
> + array_check.blocksize = r600_fmt_get_blocksize(format);
> nfaces = 1;
> - array = 0;
> - switch (G_038000_DIM(word0)) {
> + is_array = false;
> + switch (dim) {
> case V_038000_SQ_TEX_DIM_1D:
> case V_038000_SQ_TEX_DIM_2D:
> case V_038000_SQ_TEX_DIM_3D:
> @@ -1601,7 +1618,7 @@ static int r600_check_texture_resource(struct
> radeon_cs_parser *p, u32 idx,
> break;
> case V_038000_SQ_TEX_DIM_1D_ARRAY:
> case V_038000_SQ_TEX_DIM_2D_ARRAY:
> - array = 1;
> + is_array = true;
> break;
> case V_038000_SQ_TEX_DIM_2D_MSAA:
> case V_038000_SQ_TEX_DIM_2D_ARRAY_MSAA:
> @@ -1609,21 +1626,12 @@ static int r600_check_texture_resource(struct
> radeon_cs_parser *p, u32 idx,
> dev_warn(p->dev, "this kernel doesn't support %d texture
> dim\n", G_038000_DIM(word0));
> return -EINVAL;
> }
> - format = G_038004_DATA_FORMAT(word1);
> if (!r600_fmt_is_valid_texture(format, p->family)) {
> dev_warn(p->dev, "%s:%d texture invalid format %d\n",
> __func__, __LINE__, format);
> return -EINVAL;
> }
>
> - /* pitch in texels */
> - pitch = (G_038000_PITCH(word0) + 1) * 8;
> - array_check.array_mode = G_038000_TILE_MODE(word0);
> - array_check.group_size = track->group_size;
> - array_check.nbanks = track->nbanks;
> - array_check.npipes = track->npipes;
> - array_check.nsamples = 1;
> - array_check.blocksize = r600_fmt_get_blocksize(format);
> if (r600_get_array_mode_alignment(&array_check,
> &pitch_align, &height_align,
> &depth_align, &base_align)) {
> dev_warn(p->dev, "%s:%d tex array mode (%d) invalid\n",
> @@ -1649,20 +1657,13 @@ static int r600_check_texture_resource(struct
> radeon_cs_parser *p, u32 idx,
> return -EINVAL;
> }
>
> - word2 = radeon_get_ib_value(p, idx + 2) << 8;
> - word3 = radeon_get_ib_value(p, idx + 3) << 8;
> -
> - word0 = radeon_get_ib_value(p, idx + 4);
> - word1 = radeon_get_ib_value(p, idx + 5);
> - blevel = G_038010_BASE_LEVEL(word0);
> - llevel = G_038014_LAST_LEVEL(word1);
> if (blevel > llevel) {
> dev_warn(p->dev, "texture blevel %d > llevel %d\n",
> blevel, llevel);
> }
> - if (array == 1) {
> - barray = G_038014_BASE_ARRAY(word1
[Bug 53283] Rendering problems in Sacred with Radeon and Nvidia
https://bugs.freedesktop.org/show_bug.cgi?id=53283 kh3...@yandex.ru changed: What|Removed |Added Severity|normal |critical -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are on the CC list for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 2/3] drm/radeon/kms: add MSAA texture support for r600-evergreen
On Thu, Aug 9, 2012 at 10:34 AM, Marek Olšák wrote: > Most of the checking seems to be in place already. As you can see, > log2(number of samples) resides in LAST_LEVEL. Yeah i tried to make it easy but i might have get few thing wrong, i do hope not. > This is required for MSAA support (namely for depth-stencil resolve and > blitting between MSAA resources). > > Signed-off-by: Marek Olšák Reviewed-by: Jerome Glisse > --- > drivers/gpu/drm/radeon/evergreen_cs.c |7 +++ > drivers/gpu/drm/radeon/r600_cs.c |7 ++- > drivers/gpu/drm/radeon/radeon_drv.c |3 ++- > 3 files changed, 15 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c > b/drivers/gpu/drm/radeon/evergreen_cs.c > index f2e5c54..e44a62a 100644 > --- a/drivers/gpu/drm/radeon/evergreen_cs.c > +++ b/drivers/gpu/drm/radeon/evergreen_cs.c > @@ -788,6 +788,13 @@ static int evergreen_cs_track_validate_texture(struct > radeon_cs_parser *p, > case V_03_SQ_TEX_DIM_1D_ARRAY: > case V_03_SQ_TEX_DIM_2D_ARRAY: > depth = 1; > + break; > + case V_03_SQ_TEX_DIM_2D_MSAA: > + case V_03_SQ_TEX_DIM_2D_ARRAY_MSAA: > + surf.nsamples = 1 << llevel; > + llevel = 0; > + depth = 1; > + break; > case V_03_SQ_TEX_DIM_3D: > break; > default: > diff --git a/drivers/gpu/drm/radeon/r600_cs.c > b/drivers/gpu/drm/radeon/r600_cs.c > index ff61402..3dab49c 100644 > --- a/drivers/gpu/drm/radeon/r600_cs.c > +++ b/drivers/gpu/drm/radeon/r600_cs.c > @@ -1620,8 +1620,13 @@ static int r600_check_texture_resource(struct > radeon_cs_parser *p, u32 idx, > case V_038000_SQ_TEX_DIM_2D_ARRAY: > is_array = true; > break; > - case V_038000_SQ_TEX_DIM_2D_MSAA: > case V_038000_SQ_TEX_DIM_2D_ARRAY_MSAA: > + is_array = true; > + /* fall through */ > + case V_038000_SQ_TEX_DIM_2D_MSAA: > + array_check.nsamples = 1 << llevel; > + llevel = 0; > + break; > default: > dev_warn(p->dev, "this kernel doesn't support %d texture > dim\n", G_038000_DIM(word0)); > return -EINVAL; > diff --git a/drivers/gpu/drm/radeon/radeon_drv.c > b/drivers/gpu/drm/radeon/radeon_drv.c > index 4b736ec..a7f8ac0 100644 > --- a/drivers/gpu/drm/radeon/radeon_drv.c > +++ b/drivers/gpu/drm/radeon/radeon_drv.c > @@ -60,9 +60,10 @@ > * 2.16.0 - fix evergreen 2D tiled surface calculation > * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx > * 2.18.0 - r600-eg: allow "invalid" DB formats > + * 2.19.0 - r600-eg: MSAA textures > */ > #define KMS_DRIVER_MAJOR 2 > -#define KMS_DRIVER_MINOR 18 > +#define KMS_DRIVER_MINOR 19 > #define KMS_DRIVER_PATCHLEVEL 0 > int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); > int radeon_driver_unload_kms(struct drm_device *dev); > -- > 1.7.9.5 > > ___ > dri-devel mailing list > dri-devel@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 1/2] radeon: force 2D tiling for MSAA surfaces
On Thu, Aug 9, 2012 at 10:37 AM, Marek Olšák wrote:
Reviewed-by: Jerome Glisse
> ---
> radeon/radeon_surface.c | 24 ++--
> 1 file changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c
> index 874a092..499e994 100644
> --- a/radeon/radeon_surface.c
> +++ b/radeon/radeon_surface.c
> @@ -154,7 +154,7 @@ static void surf_minify(struct radeon_surface *surf,
> surf->level[level].nblk_x = (surf->level[level].npix_x + surf->blk_w -
> 1) / surf->blk_w;
> surf->level[level].nblk_y = (surf->level[level].npix_y + surf->blk_h -
> 1) / surf->blk_h;
> surf->level[level].nblk_z = (surf->level[level].npix_z + surf->blk_d -
> 1) / surf->blk_d;
> -if (surf->level[level].mode == RADEON_SURF_MODE_2D) {
> +if (surf->nsamples == 1 && surf->level[level].mode ==
> RADEON_SURF_MODE_2D) {
> if (surf->level[level].nblk_x < xalign || surf->level[level].nblk_y
> < yalign) {
> surf->level[level].mode = RADEON_SURF_MODE_1D;
> return;
> @@ -382,6 +382,12 @@ static int r6_surface_init(struct radeon_surface_manager
> *surf_man,
> unsigned mode;
> int r;
>
> +/* MSAA surfaces support the 2D mode only. */
> +if (surf->nsamples > 1) {
> +surf->flags = RADEON_SURF_CLR(surf->flags, MODE);
> +surf->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE);
> +}
> +
> /* tiling mode */
> mode = (surf->flags >> RADEON_SURF_MODE_SHIFT) & RADEON_SURF_MODE_MASK;
>
> @@ -401,6 +407,10 @@ static int r6_surface_init(struct radeon_surface_manager
> *surf_man,
>
> /* force 1d on kernel that can't do 2d */
> if (!surf_man->hw_info.allow_2d && mode > RADEON_SURF_MODE_1D) {
> +if (surf->nsamples > 1) {
> +fprintf(stderr, "radeon: Cannot use 2D tiling for an MSAA
> surface (%i).\n", __LINE__);
> +return -EFAULT;
> +}
> mode = RADEON_SURF_MODE_1D;
> surf->flags = RADEON_SURF_CLR(surf->flags, MODE);
> surf->flags |= RADEON_SURF_SET(mode, MODE);
> @@ -548,7 +558,7 @@ static void eg_surf_minify(struct radeon_surface *surf,
> surf->level[level].nblk_x = (surf->level[level].npix_x + surf->blk_w -
> 1) / surf->blk_w;
> surf->level[level].nblk_y = (surf->level[level].npix_y + surf->blk_h -
> 1) / surf->blk_h;
> surf->level[level].nblk_z = (surf->level[level].npix_z + surf->blk_d -
> 1) / surf->blk_d;
> -if (surf->level[level].mode == RADEON_SURF_MODE_2D) {
> +if (surf->nsamples == 1 && surf->level[level].mode ==
> RADEON_SURF_MODE_2D) {
> if (surf->level[level].nblk_x < mtilew || surf->level[level].nblk_y
> < mtileh) {
> surf->level[level].mode = RADEON_SURF_MODE_1D;
> return;
> @@ -687,6 +697,10 @@ static int eg_surface_sanity(struct
> radeon_surface_manager *surf_man,
>
> /* force 1d on kernel that can't do 2d */
> if (!surf_man->hw_info.allow_2d && mode > RADEON_SURF_MODE_1D) {
> +if (surf->nsamples > 1) {
> +fprintf(stderr, "radeon: Cannot use 2D tiling for an MSAA
> surface (%i).\n", __LINE__);
> +return -EFAULT;
> +}
> mode = RADEON_SURF_MODE_1D;
> surf->flags = RADEON_SURF_CLR(surf->flags, MODE);
> surf->flags |= RADEON_SURF_SET(mode, MODE);
> @@ -754,6 +768,12 @@ static int eg_surface_init(struct radeon_surface_manager
> *surf_man,
> unsigned mode;
> int r;
>
> +/* MSAA surfaces support the 2D mode only. */
> +if (surf->nsamples > 1) {
> +surf->flags = RADEON_SURF_CLR(surf->flags, MODE);
> +surf->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE);
> +}
> +
> /* tiling mode */
> mode = (surf->flags >> RADEON_SURF_MODE_SHIFT) & RADEON_SURF_MODE_MASK;
>
> --
> 1.7.9.5
>
> ___
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
___
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Re: [PATCH 2/2] radeon: tweak TILE_SPLIT for MSAA surfaces
Reviewed-by: Jerome Glisse
On Thu, Aug 9, 2012 at 10:38 AM, Marek Olšák wrote:
> ---
> radeon/radeon_surface.c | 37 +++--
> 1 file changed, 31 insertions(+), 6 deletions(-)
>
> diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c
> index 499e994..892dca6 100644
> --- a/radeon/radeon_surface.c
> +++ b/radeon/radeon_surface.c
> @@ -871,12 +871,37 @@ static int eg_surface_best(struct
> radeon_surface_manager *surf_man,
> return 0;
> }
>
> -/* set tile split to row size, optimize latter for multi-sample surface
> - * tile split >= 256 for render buffer surface. Also depth surface want
> - * smaller value for optimal performances.
> - */
> -surf->tile_split = surf_man->hw_info.row_size;
> -surf->stencil_tile_split = surf_man->hw_info.row_size / 2;
> +/* Tweak TILE_SPLIT for performance here. */
> +if (surf->nsamples > 1) {
> +if (surf->flags & (RADEON_SURF_ZBUFFER | RADEON_SURF_SBUFFER)) {
> +switch (surf->nsamples) {
> +case 2:
> +surf->tile_split = 128;
> +break;
> +case 4:
> +surf->tile_split = 128;
> +break;
> +case 8:
> +surf->tile_split = 256;
> +break;
> +case 16: /* cayman only */
> +surf->tile_split = 512;
> +break;
> +default:
> +fprintf(stderr, "radeon: Wrong number of samples %i (%i)\n",
> +surf->nsamples, __LINE__);
> +return -EINVAL;
> +}
> +surf->stencil_tile_split = 64;
> +} else {
> +/* tile split must be >= 256 for colorbuffer surfaces */
> +surf->tile_split = MAX2(surf->nsamples * surf->bpe * 64, 256);
> +}
> +} else {
> +/* set tile split to row size */
> +surf->tile_split = surf_man->hw_info.row_size;
> +surf->stencil_tile_split = surf_man->hw_info.row_size / 2;
> +}
>
> /* bankw or bankh greater than 1 increase alignment requirement, not
> * sure if it's worth using smaller bankw & bankh to stick with 2D
> --
> 1.7.9.5
>
> ___
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> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
___
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[Bug 37490] texture corruption in r600/r600g when using DRI2, no texture corruption in r600 with dri1
https://bugs.freedesktop.org/show_bug.cgi?id=37490 --- Comment #16 from Andreas Boll 2012-08-09 15:03:34 UTC --- (In reply to comment #15) > (In reply to comment #14) > > (In reply to comment #13) > > > i don't know, and my concern is mostly with the non-gallium driver right > > > now. > > > > > > i can test the gallium driver, but i need the normal driver to work as i > > > have > > > 32-bit applications i am running in a debian chroot. thusly, i do not > > > really > > > use the gallium driver yet... i only tested it to see if it did the same > > > thing, > > > which it does. > > > > > > the result is not the same everytime you trigger that kwin effect though; > > > sometimes i get part of a console framebuffer (e.g. radeondrmfb). > > > > > > so would it make more sense for me to test non-gallium driver first? > > > > No one is really working on the non gallium driver any more, so it's not > > likely > > to get much more attention. > > well, i will try and see if r600g git master solves the problem. > unfortunately, i think this means i'm screwed when it comes to running > proprietary apps in chroots. hi William, did you have any chance to test r600g git master in the mean time? -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 48455] Enabling R600_STREAMOUT causes graphical corruption
https://bugs.freedesktop.org/show_bug.cgi?id=48455 Andreas Boll changed: What|Removed |Added Component|Drivers/DRI/R600|Drivers/Gallium/r600 --- Comment #1 from Andreas Boll 2012-08-09 15:21:05 UTC --- You need kernel 3.5 and mesa from git. There were streamout fixes in both kernel and mesa especially for r700. Additionally you don't need to set R600_GLSL130=1 and R600_STREAMOUT=1 anymore, both have been enabled by default in mesa master. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 45018] [bisected] rendering regression and va conflicts since added support for virtual address space on cayman v11
https://bugs.freedesktop.org/show_bug.cgi?id=45018 --- Comment #116 from Alexandre Demers 2012-08-09 15:24:41 UTC --- (In reply to comment #113) > (In reply to comment #112) > > (In reply to comment #111) > > > (In reply to comment #110) > > > > I just pushed a minor bugfix to mesa master, that in conjunction with > > > > Jeromes > > > > kernel patch should eliminate the last VA issues. > > > > > > > > Please retest it again. > > > > > > > > Christian. > > > > > > You must be refering to commit 8c44e5a144009a03c20befa6468d19d41c802795. > > > Do I > > > still need to apply your previous patch also (attachment 65093 [details] > > > [review] [review] [review])? I'll try it > > > tonight, but it may take a bit more complicated to reproduce, I'll have > > > to play > > > for a while until it does or doesn't trigger the last reported vm error. > > > > Well, I tested it with your previous patch on top of > > 68bccc40f55aee7f4af8eb64b15a95f0b49d6a17 and it was not working properly. > > First, I had to modify your patch to apply on top of latest git. After > > applying > > it, compiling and installing, I rebooted and I was unable to load the > > logging > > screen. I removed the patch, rebuilt a clean mesa from > > 68bccc40f55aee7f4af8eb64b15a95f0b49d6a17, installed and relaunched Xorg > > and... > > I was able to log in. So I'm now testing latest mesa > > (68bccc40f55aee7f4af8eb64b15a95f0b49d6a17) with kernel 3.6-rc1 + Jerome's > > patch. I should be able to tell you soon if it works. Meanwhile, if I should > > have applied something different, let me know. > > > > To Jerome: I could test your [PATCH] drm/radeon: delay virtual address > > destruction to bo destruction. But first, I want to make sure Christian's > > patch > > does what it should do. > > Bug still there with latest mesa git (without your previous patch as explained > previously). > Aug 9 01:03:29 Xander kernel: [13308.165749] radeon :01:00.0: offset > 0x40 is in reserved area 0x80 > Aug 9 01:03:29 Xander kernel: [13308.232245] radeon :01:00.0: bo > 880223646400 va 0x02B0 conflict with (bo 8801e3edc400 > > Locked and reset without any notice. Two things I've noticed: 1- the error points directly at "offset 0x40 is in reserved area 0x80" since I applied Christian's and Jerome's patches, which is a different error from errors before patches. 2- the error only happens after a while, when switching between windows (under Gnome 3 in that case). I had to alt+tab and show my whole desktop (top left corner) many times before it happened. I played with my desktop all night long. So, it's like if the pointer keeps increasing until it reaches its limit. Either we are not releasing correctly previous addresses (or we are forgetting some on the way)or we are unaware of every released addresses, in both cases pushing us forward until we hit a wall. And if someone could explain me what this message/addresses means, I'd appreciate it. How is it possible that an offset of 0x40 ends up in a reserved area allocated at 0x80? We must not be offsetting from 0 obviously. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] drm/edid: limit printk when facing bad edid
From: Jerome Glisse
Limit printing bad edid information at one time per connector.
Connector that are connected to a bad monitor/kvm will likely
stay connected to the same bad monitor/kvm and it makes no
sense to keep printing the bad edid message.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/drm_edid.c | 22 ++
drivers/gpu/drm/drm_edid_load.c | 6 --
include/drm/drm_crtc.h | 3 ++-
3 files changed, 20 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index a8743c3..7380ee3 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -158,7 +158,7 @@ MODULE_PARM_DESC(edid_fixup,
* Sanity check the EDID block (base or extension). Return 0 if the block
* doesn't check out, or 1 if it's valid.
*/
-bool drm_edid_block_valid(u8 *raw_edid, int block)
+bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
{
int i;
u8 csum = 0;
@@ -181,7 +181,9 @@ bool drm_edid_block_valid(u8 *raw_edid, int block)
for (i = 0; i < EDID_LENGTH; i++)
csum += raw_edid[i];
if (csum) {
- DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
+ if (print_bad_edid) {
+ DRM_ERROR("EDID checksum is invalid, remainder is
%d\n", csum);
+ }
/* allow CEA to slide through, switches mangle this */
if (raw_edid[0] != 0x02)
@@ -207,7 +209,7 @@ bool drm_edid_block_valid(u8 *raw_edid, int block)
return 1;
bad:
- if (raw_edid) {
+ if (raw_edid && print_bad_edid) {
printk(KERN_ERR "Raw EDID:\n");
print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
raw_edid, EDID_LENGTH, false);
@@ -231,7 +233,7 @@ bool drm_edid_is_valid(struct edid *edid)
return false;
for (i = 0; i <= edid->extensions; i++)
- if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i))
+ if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
return false;
return true;
@@ -303,6 +305,7 @@ drm_do_get_edid(struct drm_connector *connector, struct
i2c_adapter *adapter)
{
int i, j = 0, valid_extensions = 0;
u8 *block, *new;
+ bool print_bad_edid = !connector->bad_edid_counter || (drm_debug &
DRM_UT_KMS);
if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
return NULL;
@@ -311,7 +314,7 @@ drm_do_get_edid(struct drm_connector *connector, struct
i2c_adapter *adapter)
for (i = 0; i < 4; i++) {
if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
goto out;
- if (drm_edid_block_valid(block, 0))
+ if (drm_edid_block_valid(block, 0, print_bad_edid))
break;
if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
connector->null_edid_counter++;
@@ -336,7 +339,7 @@ drm_do_get_edid(struct drm_connector *connector, struct
i2c_adapter *adapter)
block + (valid_extensions + 1) * EDID_LENGTH,
j, EDID_LENGTH))
goto out;
- if (drm_edid_block_valid(block + (valid_extensions + 1)
* EDID_LENGTH, j)) {
+ if (drm_edid_block_valid(block + (valid_extensions + 1)
* EDID_LENGTH, j, print_bad_edid)) {
valid_extensions++;
break;
}
@@ -359,8 +362,11 @@ drm_do_get_edid(struct drm_connector *connector, struct
i2c_adapter *adapter)
return block;
carp:
- dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
-drm_get_connector_name(connector), j);
+ if (print_bad_edid) {
+ dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
+drm_get_connector_name(connector), j);
+ }
+ connector->bad_edid_counter++;
out:
kfree(block);
diff --git a/drivers/gpu/drm/drm_edid_load.c b/drivers/gpu/drm/drm_edid_load.c
index 66d4a28..14f46dd 100644
--- a/drivers/gpu/drm/drm_edid_load.c
+++ b/drivers/gpu/drm/drm_edid_load.c
@@ -123,6 +123,7 @@ static int edid_load(struct drm_connector *connector, char
*name,
int fwsize, expected;
int builtin = 0, err = 0;
int i, valid_extensions = 0;
+ bool print_bad_edid = !connector->bad_edid_counter || (drm_debug &
DRM_UT_KMS);
pdev = platform_device_register_simple(connector_name, -1, NULL, 0);
if (IS_ERR(pdev)) {
@@ -173,7 +174,8 @@ static int edid_load(struct drm_connector *connector, char
*name,
}
memcpy(edid, fwdata, fwsize);
- if (!drm_edid_block_valid(edid, 0)) {
+ if (!drm_edid_block_valid(edid, 0, print_bad_edid)) {
+
Re: [PATCH 1/2] radeon: force 2D tiling for MSAA surfaces
Dear Marek, Am Donnerstag, den 09.08.2012, 16:37 +0200 schrieb Marek Olšák: > --- > radeon/radeon_surface.c | 24 ++-- > 1 file changed, 22 insertions(+), 2 deletions(-) […] do you have some numbers indicating an improvement with this change? On what hardware did you test? Thanks, Paul signature.asc Description: This is a digitally signed message part ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 16541] Imac Radeon HD 4850 switch "Mini Display Port" output with ALL kernels after 2.6.31
https://bugzilla.kernel.org/show_bug.cgi?id=16541 Alan changed: What|Removed |Added Status|NEW |RESOLVED CC||a...@lxorguk.ukuu.org.uk Resolution||OBSOLETE -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 3/3] drm/radeon/kms: implement timestamp userspace query
On Thu, Aug 9, 2012 at 10:57 AM, Jerome Glisse wrote:
> On Thu, Aug 9, 2012 at 10:34 AM, Marek Olšák wrote:
>> Signed-off-by: Marek Olšák
>
> Some comment inline that need a v2 at least for version otherwise
How about the attached updated patch? I'd like to get this series in
the radeon drm-fixes pull.
Alex
>
> Reviewed-by: Jerome Glisse
>
>> ---
>> drivers/gpu/drm/radeon/r600.c | 12 +++
>> drivers/gpu/drm/radeon/r600d.h |3 +++
>> drivers/gpu/drm/radeon/radeon.h|1 +
>> drivers/gpu/drm/radeon/radeon_asic.h |2 ++
>> drivers/gpu/drm/radeon/radeon_device.c |1 +
>> drivers/gpu/drm/radeon/radeon_drv.c|2 +-
>> drivers/gpu/drm/radeon/radeon_kms.c| 35
>> ++--
>> drivers/gpu/drm/radeon/si.c| 11 ++
>> drivers/gpu/drm/radeon/sid.h |3 +++
>> include/drm/radeon_drm.h |2 ++
>> 10 files changed, 65 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
>> index 637280f..be0e320 100644
>> --- a/drivers/gpu/drm/radeon/r600.c
>> +++ b/drivers/gpu/drm/radeon/r600.c
>> @@ -3789,3 +3789,15 @@ static void r600_pcie_gen2_enable(struct
>> radeon_device *rdev)
>> WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
>> }
>> }
>> +
>> +uint64_t r600_get_gpu_clock(struct radeon_device *rdev)
>> +{
>> + uint64_t clock;
>> +
>> + mutex_lock(&rdev->gpu_clock_mutex);
>> + WREG32(RLC_CAPTURE_GPU_CLOCK_COUNT, 1);
>> + clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) |
>> + ((uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_MSB) << 32);
>
> I keep forgeting about c type rules but i think you want 32ULL
>
>> + mutex_unlock(&rdev->gpu_clock_mutex);
>> + return clock;
>> +}
>> diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
>> index 4b116ae..fd328f4 100644
>> --- a/drivers/gpu/drm/radeon/r600d.h
>> +++ b/drivers/gpu/drm/radeon/r600d.h
>> @@ -602,6 +602,9 @@
>> #define RLC_HB_WPTR 0x3f1c
>> #define RLC_HB_WPTR_LSB_ADDR 0x3f14
>> #define RLC_HB_WPTR_MSB_ADDR 0x3f18
>> +#define RLC_GPU_CLOCK_COUNT_LSB 0x3f38
>> +#define RLC_GPU_CLOCK_COUNT_MSB 0x3f3c
>> +#define RLC_CAPTURE_GPU_CLOCK_COUNT 0x3f40
>> #define RLC_MC_CNTL 0x3f44
>> #define RLC_UCODE_CNTL0x3f48
>> #define RLC_UCODE_ADDR0x3f2c
>> diff --git a/drivers/gpu/drm/radeon/radeon.h
>> b/drivers/gpu/drm/radeon/radeon.h
>> index 5431af2..150097f 100644
>> --- a/drivers/gpu/drm/radeon/radeon.h
>> +++ b/drivers/gpu/drm/radeon/radeon.h
>> @@ -1533,6 +1533,7 @@ struct radeon_device {
>> unsigneddebugfs_count;
>> /* virtual memory */
>> struct radeon_vm_managervm_manager;
>> + struct mutexgpu_clock_mutex;
>> };
>>
>> int radeon_device_init(struct radeon_device *rdev,
>> diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
>> b/drivers/gpu/drm/radeon/radeon_asic.h
>> index f4af243..cbba387 100644
>> --- a/drivers/gpu/drm/radeon/radeon_asic.h
>> +++ b/drivers/gpu/drm/radeon/radeon_asic.h
>> @@ -371,6 +371,7 @@ void r600_kms_blit_copy(struct radeon_device *rdev,
>> unsigned num_gpu_pages,
>> struct radeon_sa_bo *vb);
>> int r600_mc_wait_for_idle(struct radeon_device *rdev);
>> +uint64_t r600_get_gpu_clock(struct radeon_device *rdev);
>>
>> /*
>> * rv770,rv730,rv710,rv740
>> @@ -472,5 +473,6 @@ int si_vm_bind(struct radeon_device *rdev, struct
>> radeon_vm *vm, int id);
>> void si_vm_unbind(struct radeon_device *rdev, struct radeon_vm *vm);
>> void si_vm_tlb_flush(struct radeon_device *rdev, struct radeon_vm *vm);
>> int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib);
>> +uint64_t si_get_gpu_clock(struct radeon_device *rdev);
>>
>> #endif
>> diff --git a/drivers/gpu/drm/radeon/radeon_device.c
>> b/drivers/gpu/drm/radeon/radeon_device.c
>> index 742af82..d2e2438 100644
>> --- a/drivers/gpu/drm/radeon/radeon_device.c
>> +++ b/drivers/gpu/drm/radeon/radeon_device.c
>> @@ -1009,6 +1009,7 @@ int radeon_device_init(struct radeon_device *rdev,
>> atomic_set(&rdev->ih.lock, 0);
>> mutex_init(&rdev->gem.mutex);
>> mutex_init(&rdev->pm.mutex);
>> + mutex_init(&rdev->gpu_clock_mutex);
>> init_rwsem(&rdev->pm.mclk_lock);
>> init_rwsem(&rdev->exclusive_lock);
>> init_waitqueue_head(&rdev->irq.vblank_queue);
>> diff --git a/drivers/gpu/drm/radeon/radeon_drv.c
>> b/drivers/gpu/drm/radeon/radeon_drv.c
>> index a7f8ac0..f940806 100644
>> --- a/drivers/gpu/drm/radeon/radeon_drv.c
>> +++ b/drivers/gpu/drm/radeon/ra
Re: [PATCH 3/3] drm/radeon/kms: implement timestamp userspace query
On Thu, Aug 9, 2012 at 11:44 AM, Alex Deucher wrote:
> On Thu, Aug 9, 2012 at 10:57 AM, Jerome Glisse wrote:
>> On Thu, Aug 9, 2012 at 10:34 AM, Marek Olšák wrote:
>>> Signed-off-by: Marek Olšák
>>
>> Some comment inline that need a v2 at least for version otherwise
>
> How about the attached updated patch? I'd like to get this series in
> the radeon drm-fixes pull.
>
> Alex
Looks good to me
>>
>> Reviewed-by: Jerome Glisse
>>
>>> ---
>>> drivers/gpu/drm/radeon/r600.c | 12 +++
>>> drivers/gpu/drm/radeon/r600d.h |3 +++
>>> drivers/gpu/drm/radeon/radeon.h|1 +
>>> drivers/gpu/drm/radeon/radeon_asic.h |2 ++
>>> drivers/gpu/drm/radeon/radeon_device.c |1 +
>>> drivers/gpu/drm/radeon/radeon_drv.c|2 +-
>>> drivers/gpu/drm/radeon/radeon_kms.c| 35
>>> ++--
>>> drivers/gpu/drm/radeon/si.c| 11 ++
>>> drivers/gpu/drm/radeon/sid.h |3 +++
>>> include/drm/radeon_drm.h |2 ++
>>> 10 files changed, 65 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
>>> index 637280f..be0e320 100644
>>> --- a/drivers/gpu/drm/radeon/r600.c
>>> +++ b/drivers/gpu/drm/radeon/r600.c
>>> @@ -3789,3 +3789,15 @@ static void r600_pcie_gen2_enable(struct
>>> radeon_device *rdev)
>>> WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
>>> }
>>> }
>>> +
>>> +uint64_t r600_get_gpu_clock(struct radeon_device *rdev)
>>> +{
>>> + uint64_t clock;
>>> +
>>> + mutex_lock(&rdev->gpu_clock_mutex);
>>> + WREG32(RLC_CAPTURE_GPU_CLOCK_COUNT, 1);
>>> + clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) |
>>> + ((uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_MSB) << 32);
>>
>> I keep forgeting about c type rules but i think you want 32ULL
>>
>>> + mutex_unlock(&rdev->gpu_clock_mutex);
>>> + return clock;
>>> +}
>>> diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
>>> index 4b116ae..fd328f4 100644
>>> --- a/drivers/gpu/drm/radeon/r600d.h
>>> +++ b/drivers/gpu/drm/radeon/r600d.h
>>> @@ -602,6 +602,9 @@
>>> #define RLC_HB_WPTR 0x3f1c
>>> #define RLC_HB_WPTR_LSB_ADDR 0x3f14
>>> #define RLC_HB_WPTR_MSB_ADDR 0x3f18
>>> +#define RLC_GPU_CLOCK_COUNT_LSB 0x3f38
>>> +#define RLC_GPU_CLOCK_COUNT_MSB 0x3f3c
>>> +#define RLC_CAPTURE_GPU_CLOCK_COUNT 0x3f40
>>> #define RLC_MC_CNTL 0x3f44
>>> #define RLC_UCODE_CNTL0x3f48
>>> #define RLC_UCODE_ADDR0x3f2c
>>> diff --git a/drivers/gpu/drm/radeon/radeon.h
>>> b/drivers/gpu/drm/radeon/radeon.h
>>> index 5431af2..150097f 100644
>>> --- a/drivers/gpu/drm/radeon/radeon.h
>>> +++ b/drivers/gpu/drm/radeon/radeon.h
>>> @@ -1533,6 +1533,7 @@ struct radeon_device {
>>> unsigneddebugfs_count;
>>> /* virtual memory */
>>> struct radeon_vm_managervm_manager;
>>> + struct mutexgpu_clock_mutex;
>>> };
>>>
>>> int radeon_device_init(struct radeon_device *rdev,
>>> diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
>>> b/drivers/gpu/drm/radeon/radeon_asic.h
>>> index f4af243..cbba387 100644
>>> --- a/drivers/gpu/drm/radeon/radeon_asic.h
>>> +++ b/drivers/gpu/drm/radeon/radeon_asic.h
>>> @@ -371,6 +371,7 @@ void r600_kms_blit_copy(struct radeon_device *rdev,
>>> unsigned num_gpu_pages,
>>> struct radeon_sa_bo *vb);
>>> int r600_mc_wait_for_idle(struct radeon_device *rdev);
>>> +uint64_t r600_get_gpu_clock(struct radeon_device *rdev);
>>>
>>> /*
>>> * rv770,rv730,rv710,rv740
>>> @@ -472,5 +473,6 @@ int si_vm_bind(struct radeon_device *rdev, struct
>>> radeon_vm *vm, int id);
>>> void si_vm_unbind(struct radeon_device *rdev, struct radeon_vm *vm);
>>> void si_vm_tlb_flush(struct radeon_device *rdev, struct radeon_vm *vm);
>>> int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib);
>>> +uint64_t si_get_gpu_clock(struct radeon_device *rdev);
>>>
>>> #endif
>>> diff --git a/drivers/gpu/drm/radeon/radeon_device.c
>>> b/drivers/gpu/drm/radeon/radeon_device.c
>>> index 742af82..d2e2438 100644
>>> --- a/drivers/gpu/drm/radeon/radeon_device.c
>>> +++ b/drivers/gpu/drm/radeon/radeon_device.c
>>> @@ -1009,6 +1009,7 @@ int radeon_device_init(struct radeon_device *rdev,
>>> atomic_set(&rdev->ih.lock, 0);
>>> mutex_init(&rdev->gem.mutex);
>>> mutex_init(&rdev->pm.mutex);
>>> + mutex_init(&rdev->gpu_clock_mutex);
>>> init_rwsem(&rdev->pm.mclk_lock);
>>> init_rwsem(&rdev->exclusive_lock);
>>> init_waitqueue_head(&rdev->irq.vblank_queue);
>>> diff --git a/d
[PATCH 1/1] omap: include omap_drm.h independently
omap_drm.h uses data type defined in stdint.h, but that header was not included. omap_drm.h includes drm.h as a local file when it is part of the compiler c flags. This two issues are fixed. New code can include omap_drm.h alone. Signed-off-by: Víctor Manuel Jáquez Leal --- omap/omap_drm.h |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/omap/omap_drm.h b/omap/omap_drm.h index f677cd8..9c6c0e4 100644 --- a/omap/omap_drm.h +++ b/omap/omap_drm.h @@ -29,7 +29,8 @@ #ifndef __OMAP_DRM_H__ #define __OMAP_DRM_H__ -#include "drm.h" +#include +#include /* Please note that modifications to all structs defined here are * subject to backwards-compatibility constraints. -- 1.7.10.4 ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v2 1/2] dma-buf: add reference counting for exporter module
On Thu, Aug 09, 2012 at 11:36:21AM +0200, Tomasz Stanislawski wrote: > This patch adds reference counting on a module that exported dma-buf and > implements its operations. This prevents the module from being unloaded while > DMABUF file is in use. Why force all of the modules to be changed "by hand", and not just do this automatically by changing the register function to include the THIS_MODULE macro in it? Much like the pci_register_driver() function is implemented in include/linux/pci.h? That makes it impossible for driver authors to get it wrong, which is always a good sign of a correct api. thanks, greg k-h ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 1/2] radeon: force 2D tiling for MSAA surfaces
On Thu, Aug 9, 2012 at 5:41 PM, Paul Menzel wrote: > Dear Marek, > > > Am Donnerstag, den 09.08.2012, 16:37 +0200 schrieb Marek Olšák: >> --- >> radeon/radeon_surface.c | 24 ++-- >> 1 file changed, 22 insertions(+), 2 deletions(-) > > […] > > do you have some numbers indicating an improvement with this change? On > what hardware did you test? I wasn't measuring performance. This patch is actually a fix, because AFAIK 2D tiling is the only mode available for MSAA surfaces. The other tiling modes hang my GPU. Marek ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] staging: omapdrm: Fix DMM sparse warnings
On Thu, Aug 9, 2012 at 12:14 AM, Andy Gross wrote:
> Fix the following sparse warnings:
>
> drivers/staging/omapdrm/omap_dmm_tiler.c:123:13:
>warning: symbol 'omap_dmm_irq_handler' was not declared.
>Should it be static?
>
> drivers/staging/omapdrm/omap_dmm_tiler.c:370:24:
>warning: Using plain integer as NULL pointer
>
> Signed-off-by: Andy Gross
Signed-off-by: Rob Clark
> ---
> drivers/staging/omapdrm/omap_dmm_tiler.c |4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/staging/omapdrm/omap_dmm_tiler.c
> b/drivers/staging/omapdrm/omap_dmm_tiler.c
> index 8619783..ec7a5c8 100644
> --- a/drivers/staging/omapdrm/omap_dmm_tiler.c
> +++ b/drivers/staging/omapdrm/omap_dmm_tiler.c
> @@ -120,7 +120,7 @@ static int wait_status(struct refill_engine *engine,
> uint32_t wait_mask)
> return 0;
> }
>
> -irqreturn_t omap_dmm_irq_handler(int irq, void *arg)
> +static irqreturn_t omap_dmm_irq_handler(int irq, void *arg)
> {
> struct dmm *dmm = arg;
> uint32_t status = readl(dmm->base + DMM_PAT_IRQSTATUS);
> @@ -367,7 +367,7 @@ struct tiler_block *tiler_reserve_1d(size_t size)
> int num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
>
> if (!block)
> - return 0;
> + return ERR_PTR(-ENOMEM);
>
> block->fmt = TILFMT_PAGE;
>
> --
> 1.7.5.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
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Re: [PATCH 1/2] radeon: force 2D tiling for MSAA surfaces
On Thu, Aug 9, 2012 at 12:14 PM, Marek Olšák wrote: > On Thu, Aug 9, 2012 at 5:41 PM, Paul Menzel > wrote: >> Dear Marek, >> >> >> Am Donnerstag, den 09.08.2012, 16:37 +0200 schrieb Marek Olšák: >>> --- >>> radeon/radeon_surface.c | 24 ++-- >>> 1 file changed, 22 insertions(+), 2 deletions(-) >> >> […] >> >> do you have some numbers indicating an improvement with this change? On >> what hardware did you test? > > I wasn't measuring performance. This patch is actually a fix, because > AFAIK 2D tiling is the only mode available for MSAA surfaces. The > other tiling modes hang my GPU. AA surfaces can't use linear or 1D tiling modes. They have to be 2D. Resolve targets can use other tiling modes however. Alex ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 40211] texture probleme in wolfenstein enemy territory rv770
https://bugs.freedesktop.org/show_bug.cgi?id=40211 Andreas Boll changed: What|Removed |Added Component|Drivers/DRI/R600|Drivers/Gallium/r600 --- Comment #7 from Andreas Boll 2012-08-09 17:17:43 UTC --- Can you test again with a newer version of mesa? In the meantime debian has mesa-8.0.4 in sid and testing. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 45018] [bisected] rendering regression and va conflicts since added support for virtual address space on cayman v11
https://bugs.freedesktop.org/show_bug.cgi?id=45018 --- Comment #117 from Alex Deucher 2012-08-09 18:50:34 UTC --- (In reply to comment #116) > > And if someone could explain me what this message/addresses means, I'd > appreciate it. How is it possible that an offset of 0x40 ends up in a > reserved area allocated at 0x80? We must not be offsetting from 0 > obviously. The first 8 MB of the client's VM space are reserved for kernel use and not available for the client to use. The client is not allowed to use an address below 0x80. If an address ends up there, the kernel flags it. That's the message you are seeing. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 53283] Rendering problems in Sacred with Radeon and Nvidia
https://bugs.freedesktop.org/show_bug.cgi?id=53283 --- Comment #9 from kh3...@yandex.ru 2012-08-09 21:05:31 UTC --- I found that this problem is related to conflict between amd64 and i386. Sacred Gold is i386, so running on amd64 with open drivers causes this problem. I tried to install i386 librares (with Debian multiarch), and it really solves the problem. Unfortunately, new problem arises -- everything renders correctly, but there's no text at all (menu, speech, items exlanation, etc.). The bug report is closed. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are on the CC list for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 53283] Rendering problems in Sacred with Radeon and Nvidia
https://bugs.freedesktop.org/show_bug.cgi?id=53283 kh3...@yandex.ru changed: What|Removed |Added Status|NEW |RESOLVED Resolution||NOTABUG -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are on the CC list for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 26891] Radeon KMS fails with inaccessible AtomBIOS on systems with (U)EFI boot
https://bugs.freedesktop.org/show_bug.cgi?id=26891 --- Comment #32 from Alex Deucher 2012-08-09 21:10:43 UTC --- Created attachment 65357 --> https://bugs.freedesktop.org/attachment.cgi?id=65357 VFCT patch Hi David, I took the liberty of cleaning up your UEFI VFCT patch. I'd like to get it into the next drm fixes pull in the next day or so. If you are ok with it or would like anything changed, please let me know. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 41265] KMS does not work on Radeon HD6700M
https://bugs.freedesktop.org/show_bug.cgi?id=41265 --- Comment #24 from Alex Deucher 2012-08-09 21:12:52 UTC --- The patch on bug 26891 might help if this is a UEFI system. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 41265] Radeon KMS does not work on thunderbolt media dock
https://bugs.freedesktop.org/show_bug.cgi?id=41265 Alex Deucher changed: What|Removed |Added Summary|KMS does not work on Radeon |Radeon KMS does not work on |HD6700M |thunderbolt media dock -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: Enhancing EDID quirk functionality
Well, it took me 4 months to find the time, but I finally had a crack addressing the ideas you mentioned in your last response. I believe that the patch in the following note does everything that you wanted, and hopefully it's all straightforward enough that it doesn't require a lot of explanation. I have tested this on both 32- and 64-bit x86 systems, but I don't have access to any big-endian hardware, so an extra- careful look at the parts where I swizzle the bytes in the EDID display ID data is probably warranted. Please let me know if you have any questions or concerns. Thanks! ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] drm: EDID quirk improvements
Add ability for user to add or remove EDID quirks, via module parameter or sysfs. Also add two new quirk flags -- EDID_QUIRK_DISABLE_INFOFRAMES and EDID_QUIRK_NO_AUDIO -- and adds a quirk for the LG L246WP display. Document module parameter and sysfs interface. --- Documentation/EDID/edid_quirks.txt | 161 drivers/gpu/drm/drm_drv.c | 2 + drivers/gpu/drm/drm_edid.c | 524 + drivers/gpu/drm/drm_stub.c | 5 + drivers/gpu/drm/drm_sysfs.c| 19 ++ include/drm/drmP.h | 10 + include/drm/drm_edid.h | 13 +- 7 files changed, 673 insertions(+), 61 deletions(-) create mode 100644 Documentation/EDID/edid_quirks.txt diff --git a/Documentation/EDID/edid_quirks.txt b/Documentation/EDID/edid_quirks.txt new file mode 100644 index 000..07a0087 --- /dev/null +++ b/Documentation/EDID/edid_quirks.txt @@ -0,0 +1,161 @@ + EDID Quirks + = + Ian Pilcher + August 8, 2012 + + +"EDID blocks out in the wild have a variety of bugs" +-- from drivers/gpu/drm/drm_edid.c + + +Overview + + +EDID quirks provide a mechanism for working around display hardware with buggy +EDID data. + +An individual EDID quirk maps a display type (identified by its EDID +manufacturer ID and product code[1]) to a set of flags. For example, the current +list of quirks built into the kernel is: + +ACR:0xad46:0x0001 +API:0x7602:0x0001 +ACR:0x0977:0x0020 +MAX:0x05ec:0x0001 +MAX:0x077e:0x0001 +EPI:0xe780:0x0002 +EPI:0x2028:0x0001 +FCM:0x3520:0x000c +LPL:0x:0x0010 +LPL:0x2a00:0x0010 +PHL:0xe014:0x0020 +PTS:0x02fd:0x0020 +SAM:0x021d:0x0040 +SAM:0x0254:0x0001 +SAM:0x027e:0x0001 +VSC:0x139c:0x0080 +GSM:0x563f:0x0300 + +The first field of each quirk is the manufacturer ID, the second field is the +product code, and the third field is the quirk flags. + +NOTE: All of the manufacturer IDs above are displayed as 3-character strings, +because they are conformant IDs that have been properly encoded: + +- The most-significant bit of the encoded ID is 0 +- They only contain ASCII characters in the range A-Z + +IDs that do not conform to these rules are displayed as "raw" hexadecimal +values. + +The current quirk flags are: + +/* First detailed mode wrong, use largest 60Hz mode */ +#define EDID_QUIRK_PREFER_LARGE_60 0x0001 + +/* Reported 135MHz pixel clock is too high, needs adjustment */ +#define EDID_QUIRK_135_CLOCK_TOO_HIGH 0x0002 + +/* Prefer the largest mode at 75 Hz */ +#define EDID_QUIRK_PREFER_LARGE_75 0x0004 + +/* Detail timing is in cm not mm */ +#define EDID_QUIRK_DETAILED_IN_CM 0x0008 + +/* Detailed timing descriptors have bogus size values, so just take the + * maximum size and use that. + */ +#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE0x0010 + +/* Monitor forgot to set the first detailed is preferred bit. */ +#define EDID_QUIRK_FIRST_DETAILED_PREFERRED 0x0020 + +/* use +hsync +vsync for detailed mode */ +#define EDID_QUIRK_DETAILED_SYNC_PP 0x0040 + +/* Force reduced-blanking timings for detailed modes */ +#define EDID_QUIRK_FORCE_REDUCED_BLANKING 0x0080 + +/* Display is confused by InfoFrames; don't sent any */ +#define EDID_QUIRK_DISABLE_INFOFRAMES 0x0100 + +/* Display doesn't have any audio output */ +#define EDID_QUIRK_NO_AUDIO 0x0200 + + +sysfs interface +=== + +The current EDID quirk list can be read from /sys/class/drm/edid_quirks. + +The number of total "slots" in the list can be read from +/sys/class/drm/edid_quirks_size. This total includes both occupied slots (i.e. +the current list) and any slots available for additional quirks. The number of +available slots can be calculated by subtracting the number of quirks in the +current list from the total number of slots. + +If a slot is available, an additional quirk can be added to the list by writing +it to edid_quirks: + +# echo FOO:0x:0x100 > /sys/class/drm/edid_quirks + +Manufacturer IDs can also be specified numerically. (This is the only way to +specify a nonconformant ID.) This command is equivalent to the previous one: + +# echo 0x19ef:0x:0x100 > /sys/class/drm/edid_quirks + +Numeric values can also be specified in decimal or octal formats; a number that +begins with a 0 is assumed to be octal: + +# echo FOO:65535:0400 > /sys/class/drm/edid_quirks + +An existing quirk can be replaced by writing a new set of flags: + +# echo FOO:0x:0x200 > /sys/class/drm/edid
[PATCH v4] DRM: add drm gem CMA helper
On Thu, Aug 9, 2012 at 2:31 AM, Laurent Pinchart wrote: > Hi Lars, > > On Wednesday 08 August 2012 18:25:30 Lars-Peter Clausen wrote: >> On 08/08/2012 04:44 PM, Laurent Pinchart wrote: >> > On Wednesday 27 June 2012 15:30:18 Sascha Hauer wrote: >> >> Many embedded drm devices do not have a IOMMU and no dedicated >> >> memory for graphics. These devices use CMA (Contiguous Memory >> >> Allocator) backed graphics memory. This patch provides helper >> >> functions to be able to share the code. The code technically does >> >> not depend on CMA as the backend allocator, the name has been chosen >> >> because cma makes for a nice, short but still descriptive function >> >> prefix. >> >> >> >> Signed-off-by: Sascha Hauer >> >> --- >> >> >> >> changes since v3: >> >> - *really* use DIV_ROUND_UP(args->width * args->bpp, 8) to calculate the >> >> pitch changes since v2: >> >> - make drm_gem_cma_create_with_handle static >> >> - use DIV_ROUND_UP(args->width * args->bpp, 8) to calculate the pitch >> >> - make drm_gem_cma_vm_ops const >> >> - add missing #include >> >> changes since v1: >> >> - map whole buffer at mmap time, not page by page at fault time >> >> - several cleanups as suggested by Lars-Peter Clausen and Laurent >> >> Pinchart >> >> >> >> drivers/gpu/drm/Kconfig |6 + >> >> drivers/gpu/drm/Makefile |1 + >> >> drivers/gpu/drm/drm_gem_cma_helper.c | 251 >> >> +++ >> >> include/drm/drm_gem_cma_helper.h | 44 ++ >> >> 4 files changed, 302 insertions(+) >> >> create mode 100644 drivers/gpu/drm/drm_gem_cma_helper.c >> >> create mode 100644 include/drm/drm_gem_cma_helper.h >> >> >> >> diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig >> >> index dc5df12..8f362ec 100644 >> >> --- a/drivers/gpu/drm/Kconfig >> >> +++ b/drivers/gpu/drm/Kconfig >> >> @@ -53,6 +53,12 @@ config DRM_TTM >> >> >> >> GPU memory types. Will be enabled automatically if a device driver >> >> uses it. >> >> >> >> +config DRM_GEM_CMA_HELPER >> >> + tristate >> >> + depends on DRM >> >> + help >> >> +Choose this if you need the GEM CMA helper functions >> >> + >> >> >> >> config DRM_TDFX >> >> >> >>tristate "3dfx Banshee/Voodoo3+" >> >>depends on DRM && PCI >> >> >> >> diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile >> >> index 0487ff6..8759cda 100644 >> >> --- a/drivers/gpu/drm/Makefile >> >> +++ b/drivers/gpu/drm/Makefile >> >> @@ -15,6 +15,7 @@ drm-y := drm_auth.o drm_buffer.o drm_bufs.o >> >> drm_cache.o \ drm_trace_points.o drm_global.o drm_prime.o >> >> >> >> drm-$(CONFIG_COMPAT) += drm_ioc32.o >> >> >> >> +drm-$(CONFIG_DRM_GEM_CMA_HELPER) += drm_gem_cma_helper.o >> > >> > This results in a built failure for me with >> > >> > CONFIG_DRM=y >> > CONFIG_DRM_KMS_HELPER=m >> > # CONFIG_DRM_LOAD_EDID_FIRMWARE is not set >> > CONFIG_DRM_GEM_CMA_HELPER=m >> > CONFIG_DRM_KMS_CMA_HELPER=m >> > >> > drm_gem_cma_helper.o isn't compiled at all. Can you reproduce the problem >> > ? >> >> The Kconfig entry needs to be bool instead of tristate. > > That's my preferred solution as well. I'll modify the patch in my tree, unless > Sascha wants to submit a v5. Oh I keep missing this, I've no objections to putting it into -next, if someone sends one clean patch to the list with sign offs that I can grab easily. Dave.
[Bug 45018] [bisected] rendering regression and va conflicts since added support for virtual address space on cayman v11
https://bugs.freedesktop.org/show_bug.cgi?id=45018 --- Comment #112 from Alexandre Demers 2012-08-09 01:38:41 UTC --- (In reply to comment #111) > (In reply to comment #110) > > I just pushed a minor bugfix to mesa master, that in conjunction with > > Jeromes > > kernel patch should eliminate the last VA issues. > > > > Please retest it again. > > > > Christian. > > You must be refering to commit 8c44e5a144009a03c20befa6468d19d41c802795. Do I > still need to apply your previous patch also (attachment 65093 [details] > [review])? I'll try it > tonight, but it may take a bit more complicated to reproduce, I'll have to > play > for a while until it does or doesn't trigger the last reported vm error. Well, I tested it with your previous patch on top of 68bccc40f55aee7f4af8eb64b15a95f0b49d6a17 and it was not working properly. First, I had to modify your patch to apply on top of latest git. After applying it, compiling and installing, I rebooted and I was unable to load the logging screen. I removed the patch, rebuilt a clean mesa from 68bccc40f55aee7f4af8eb64b15a95f0b49d6a17, installed and relaunched Xorg and... I was able to log in. So I'm now testing latest mesa (68bccc40f55aee7f4af8eb64b15a95f0b49d6a17) with kernel 3.6-rc1 + Jerome's patch. I should be able to tell you soon if it works. Meanwhile, if I should have applied something different, let me know. To Jerome: I could test your [PATCH] drm/radeon: delay virtual address destruction to bo destruction. But first, I want to make sure Christian's patch does what it should do. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[Bug 53111] [bisected] lockups since added support for virtual address space on cayman v11
https://bugs.freedesktop.org/show_bug.cgi?id=53111 --- Comment #6 from Anthony Waters 2012-08-09 03:07:19 UTC --- The fault address in the VM_CONTEXT1_PROTECTION_FAULT_ADDR register is less than the start of the virtual address area, unless that is due to the bug? -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[PATCH] drm/mgag200: fix G200ER pll picking algorithm
The original code was misported from the X driver,
a) an int went to unsigned int, breaking the downward counting testm code
b) the port did the vco/computed clock bits completely wrong.
This fixes an infinite loop on modprobe on some Dell servers with the G200ER
chipset variant.
Found in internal testing.
Cc: stable at vger.kernel.org
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/mgag200/mgag200_mode.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index d303061..0201d1d 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -468,10 +468,11 @@ static int mga_g200er_set_plls(struct mga_device *mdev,
long clock)
{
unsigned int vcomax, vcomin, pllreffreq;
unsigned int delta, tmpdelta;
- unsigned int testr, testn, testm, testo;
+ int testr, testn, testm, testo;
unsigned int p, m, n;
- unsigned int computed;
+ unsigned int computed, vco;
int tmp;
+ const unsigned int m_div_val[] = { 1, 2, 4, 8 };
m = n = p = 0;
vcomax = 1488000;
@@ -490,12 +491,13 @@ static int mga_g200er_set_plls(struct mga_device *mdev,
long clock)
if (delta == 0)
break;
for (testo = 5; testo < 33; testo++) {
- computed = pllreffreq * (testn + 1) /
+ vco = pllreffreq * (testn + 1) /
(testr + 1);
- if (computed < vcomin)
+ if (vco < vcomin)
continue;
- if (computed > vcomax)
+ if (vco > vcomax)
continue;
+ computed = vco / (m_div_val[testm] *
(testo + 1));
if (computed > clock)
tmpdelta = computed - clock;
else
--
1.7.10.4
[Bug 45018] [bisected] rendering regression and va conflicts since added support for virtual address space on cayman v11
https://bugs.freedesktop.org/show_bug.cgi?id=45018 --- Comment #113 from Alexandre Demers 2012-08-09 05:20:04 UTC --- (In reply to comment #112) > (In reply to comment #111) > > (In reply to comment #110) > > > I just pushed a minor bugfix to mesa master, that in conjunction with > > > Jeromes > > > kernel patch should eliminate the last VA issues. > > > > > > Please retest it again. > > > > > > Christian. > > > > You must be refering to commit 8c44e5a144009a03c20befa6468d19d41c802795. Do > > I > > still need to apply your previous patch also (attachment 65093 [details] > > [review] [review])? I'll try it > > tonight, but it may take a bit more complicated to reproduce, I'll have to > > play > > for a while until it does or doesn't trigger the last reported vm error. > > Well, I tested it with your previous patch on top of > 68bccc40f55aee7f4af8eb64b15a95f0b49d6a17 and it was not working properly. > First, I had to modify your patch to apply on top of latest git. After > applying > it, compiling and installing, I rebooted and I was unable to load the logging > screen. I removed the patch, rebuilt a clean mesa from > 68bccc40f55aee7f4af8eb64b15a95f0b49d6a17, installed and relaunched Xorg and... > I was able to log in. So I'm now testing latest mesa > (68bccc40f55aee7f4af8eb64b15a95f0b49d6a17) with kernel 3.6-rc1 + Jerome's > patch. I should be able to tell you soon if it works. Meanwhile, if I should > have applied something different, let me know. > > To Jerome: I could test your [PATCH] drm/radeon: delay virtual address > destruction to bo destruction. But first, I want to make sure Christian's > patch > does what it should do. Bug still there with latest mesa git (without your previous patch as explained previously). Aug 9 01:03:29 Xander kernel: [13308.165749] radeon :01:00.0: offset 0x40 is in reserved area 0x80 Aug 9 01:03:29 Xander kernel: [13308.232245] radeon :01:00.0: bo 880223646400 va 0x02B0 conflict with (bo 8801e3edc400 Locked and reset without any notice. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[PATCH] staging: omapdrm: Fix DMM sparse warnings
Fix the following sparse warnings:
drivers/staging/omapdrm/omap_dmm_tiler.c:123:13:
warning: symbol 'omap_dmm_irq_handler' was not declared.
Should it be static?
drivers/staging/omapdrm/omap_dmm_tiler.c:370:24:
warning: Using plain integer as NULL pointer
Signed-off-by: Andy Gross
---
drivers/staging/omapdrm/omap_dmm_tiler.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/omapdrm/omap_dmm_tiler.c
b/drivers/staging/omapdrm/omap_dmm_tiler.c
index 8619783..ec7a5c8 100644
--- a/drivers/staging/omapdrm/omap_dmm_tiler.c
+++ b/drivers/staging/omapdrm/omap_dmm_tiler.c
@@ -120,7 +120,7 @@ static int wait_status(struct refill_engine *engine,
uint32_t wait_mask)
return 0;
}
-irqreturn_t omap_dmm_irq_handler(int irq, void *arg)
+static irqreturn_t omap_dmm_irq_handler(int irq, void *arg)
{
struct dmm *dmm = arg;
uint32_t status = readl(dmm->base + DMM_PAT_IRQSTATUS);
@@ -367,7 +367,7 @@ struct tiler_block *tiler_reserve_1d(size_t size)
int num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
if (!block)
- return 0;
+ return ERR_PTR(-ENOMEM);
block->fmt = TILFMT_PAGE;
--
1.7.5.4
[PATCH] staging: omapdrm: Remove unnecessary memcpy
Removed the unnecessary copy of the memory page addresses when
programming the DMM/PAT and all support code for the lut copy.
The original intent was to have this code in place for
suspend/resume functionality w.r.t. DEVICE_OFF.
Performance analysis showed that the extra copy from uncached memory
led to a fairly hefty penalty when programming large 1D or 2D
buffers. This can be implemented in a more efficient manner when we
actually have to support DEVICE_OFF suspend/resume operations.
Signed-off-by: Andy Gross
---
drivers/staging/omapdrm/omap_dmm_priv.h |6 --
drivers/staging/omapdrm/omap_dmm_tiler.c | 25 +
2 files changed, 1 insertions(+), 30 deletions(-)
diff --git a/drivers/staging/omapdrm/omap_dmm_priv.h
b/drivers/staging/omapdrm/omap_dmm_priv.h
index 08b22e9..09ebc50 100644
--- a/drivers/staging/omapdrm/omap_dmm_priv.h
+++ b/drivers/staging/omapdrm/omap_dmm_priv.h
@@ -141,9 +141,6 @@ struct refill_engine {
/* only one trans per engine for now */
struct dmm_txn txn;
- /* offset to lut associated with container */
- u32 *lut_offset;
-
wait_queue_head_t wait_for_refill;
struct list_head idle_node;
@@ -176,9 +173,6 @@ struct dmm {
/* array of LUT - TCM containers */
struct tcm **tcm;
- /* LUT table storage */
- u32 *lut;
-
/* allocation list and lock */
struct list_head alloc_head;
};
diff --git a/drivers/staging/omapdrm/omap_dmm_tiler.c
b/drivers/staging/omapdrm/omap_dmm_tiler.c
index ec7a5c8..80d3f8a 100644
--- a/drivers/staging/omapdrm/omap_dmm_tiler.c
+++ b/drivers/staging/omapdrm/omap_dmm_tiler.c
@@ -24,7 +24,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -184,9 +183,6 @@ static int dmm_txn_append(struct dmm_txn *txn, struct
pat_area *area,
int columns = (1 + area->x1 - area->x0);
int rows = (1 + area->y1 - area->y0);
int i = columns*rows;
- u32 *lut = omap_dmm->lut + (engine->tcm->lut_id * omap_dmm->lut_width *
- omap_dmm->lut_height) +
- (area->y0 * omap_dmm->lut_width) + area->x0;
pat = alloc_dma(txn, sizeof(struct pat), &pat_pa);
@@ -209,10 +205,6 @@ static int dmm_txn_append(struct dmm_txn *txn, struct
pat_area *area,
page_to_phys(pages[n]) : engine->dmm->dummy_pa;
}
- /* fill in lut with new addresses */
- for (i = 0; i < rows; i++, lut += omap_dmm->lut_width)
- memcpy(lut, &data[i*columns], columns * sizeof(u32));
-
txn->last_pat = pat;
return 0;
@@ -504,8 +496,6 @@ static int omap_dmm_remove(struct platform_device *dev)
if (omap_dmm->dummy_page)
__free_page(omap_dmm->dummy_page);
- vfree(omap_dmm->lut);
-
if (omap_dmm->irq > 0)
free_irq(omap_dmm->irq, omap_dmm);
@@ -521,7 +511,7 @@ static int omap_dmm_probe(struct platform_device *dev)
{
int ret = -EFAULT, i;
struct tcm_area area = {0};
- u32 hwinfo, pat_geom, lut_table_size;
+ u32 hwinfo, pat_geom;
struct resource *mem;
omap_dmm = kzalloc(sizeof(*omap_dmm), GFP_KERNEL);
@@ -593,16 +583,6 @@ static int omap_dmm_probe(struct platform_device *dev)
*/
writel(0x7e7e7e7e, omap_dmm->base + DMM_PAT_IRQENABLE_SET);
- lut_table_size = omap_dmm->lut_width * omap_dmm->lut_height *
- omap_dmm->num_lut;
-
- omap_dmm->lut = vmalloc(lut_table_size * sizeof(*omap_dmm->lut));
- if (!omap_dmm->lut) {
- dev_err(&dev->dev, "could not allocate lut table\n");
- ret = -ENOMEM;
- goto fail;
- }
-
omap_dmm->dummy_page = alloc_page(GFP_KERNEL | __GFP_DMA32);
if (!omap_dmm->dummy_page) {
dev_err(&dev->dev, "could not allocate dummy page\n");
@@ -685,9 +665,6 @@ static int omap_dmm_probe(struct platform_device *dev)
.p1.y = omap_dmm->container_height - 1,
};
- for (i = 0; i < lut_table_size; i++)
- omap_dmm->lut[i] = omap_dmm->dummy_pa;
-
/* initialize all LUTs to dummy page entries */
for (i = 0; i < omap_dmm->num_lut; i++) {
area.tcm = omap_dmm->tcm[i];
--
1.7.5.4
v3.5 Oops in i2c_algo_bit.c:bit_xfer+0x23/0x870: i915 or i2c?
I'm trying to run a v3.5 kernel (plus some -stable patches from Ted Ts'o) on an Ubuntu system. Things are generally working except for the following Oops on each boot, which prevents the graphics system from loading. [ 36.187972] [drm] Initialized drm 1.1.0 20060810 [ 36.230306] kvm: VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL does not work properly. Using workaround [ 36.487606] i915 :00:02.0: setting latency timer to 64 [ 36.555464] [drm] GMBUS [i915 gmbus ssc] timed out, falling back to bit banging on pin 0 [ 36.555490] BUG: unable to handle kernel NULL pointer dereference at 0028 [ 36.555626] IP: [] bit_xfer+0x23/0x870 [i2c_algo_bit] [ 36.555701] PGD 212cb0067 PUD 212caf067 PMD 0 [ 36.555803] Oops: [#1] SMP [ 36.555885] CPU 3 [ 36.555907] Modules linked in: snd_seq_midi joydev i915(+) snd_rawmidi snd_seq_midi_event snd_seq drm_kms_helper snd_timer snd_seq_device kvm_intel drm kvm snd serio_raw soundcore i2c_algo_bit snd_page_alloc lpc_ich video mei microcode mac_hid eeprom it87 hwmon_vid coretemp lp parport raid10 raid456 async_pq async_xor firewire_ohci firewire_core xor async_memcpy async_raid6_recov hid_microsoft floppy crc_itu_t r8169 pata_jmicron usbhid hid mptsas mptscsih mptbase scsi_transport_sas raid6_pq async_tx raid1 raid0 multipath linear [ 36.557232] [ 36.557271] Pid: 623, comm: modprobe Not tainted 3.5.0 #3 Gigabyte Technology Co., Ltd. H57M-USB3/H57M-USB3 [ 36.557398] RIP: 0010:[] [] bit_xfer+0x23/0x870 [i2c_algo_bit] [ 36.557493] RSP: :880212c6d648 EFLAGS: 00010296 [ 36.557544] RAX: 88021222c030 RBX: 880212c6d7e8 RCX: [ 36.557599] RDX: 0001 RSI: 880212c6d7e8 RDI: 88021222c030 [ 36.557655] RBP: 880212c6d6c8 R08: 0402 R09: [ 36.557710] R10: R11: 0006 R12: 0001 [ 36.557766] R13: 880212c6dfd8 R14: 0001 R15: 88021222c030 [ 36.557822] FS: 7f5a7b85b700() GS:88021fcc() knlGS: [ 36.557899] CS: 0010 DS: ES: CR0: 8005003b [ 36.557950] CR2: 0028 CR3: 000212cad000 CR4: 07e0 [ 36.558006] DR0: DR1: DR2: [ 36.558062] DR3: DR6: 0ff0 DR7: 0400 [ 36.558119] Process modprobe (pid: 623, threadinfo 880212c6c000, task 88020fdf5b80) [ 36.558197] Stack: [ 36.558239] 0001 880212c6dfd8 0001 00011222c000 [ 36.558380] 880212c6d6c8 8166341e 88020ff6ca72 000c510c0018 [ 36.558523] 880212c6d6d8 880212c6d698 0082 880212c6d7e8 [ 36.558671] Call Trace: [ 36.558719] [] ? printk+0x61/0x63 [ 36.558790] [] gmbus_xfer+0x56b/0x6f0 [i915] [ 36.558847] [] i2c_transfer+0x9c/0xe0 [ 36.558899] [] ? ep_poll_callback+0x10b/0x150 [ 36.558953] [] i2c_smbus_xfer_emulated+0x156/0x5d0 [ 36.559010] [] ? idr_get_empty_slot+0x115/0x320 [ 36.559064] [] i2c_smbus_xfer+0x113/0x130 [ 36.559118] [] ? _raw_spin_lock+0xe/0x20 [ 36.559173] [] ? klist_next+0x89/0x110 [ 36.559225] [] i2c_default_probe+0xeb/0x130 [ 36.559279] [] ? i2c_check_addr_busy+0x3b/0x60 [ 36.559332] [] i2c_do_add_adapter+0x1bb/0x290 [ 36.559382] [] ? sysfs_do_create_link+0xeb/0x200 [ 36.559433] [] ? put_device+0x17/0x20 [ 36.559482] [] ? __process_new_driver+0x30/0x30 [ 36.559535] [] __process_new_adapter+0x12/0x20 [ 36.559590] [] bus_for_each_drv+0x4e/0xa0 [ 36.559642] [] i2c_register_adapter+0x16d/0x270 [ 36.559696] [] i2c_add_adapter+0xa3/0xb0 [ 36.559759] [] intel_setup_gmbus+0xcc/0x1f0 [i915] [ 36.559821] [] i915_driver_load+0x2ac/0xb90 [i915] [ 36.559882] [] ? drm_get_minor+0x261/0x300 [drm] [ 36.559940] [] drm_get_pci_dev+0x186/0x2d0 [drm] [ 36.559995] [] ? default_spin_lock_flags+0x9/0x10 [ 36.560060] [] i915_pci_probe+0x16/0x20 [i915] [ 36.560115] [] local_pci_probe+0x5c/0xd0 [ 36.560168] [] pci_device_probe+0x111/0x120 [ 36.560221] [] driver_probe_device+0x7e/0x220 [ 36.560274] [] __driver_attach+0xab/0xb0 [ 36.560327] [] ? driver_probe_device+0x220/0x220 [ 36.560375] [] bus_for_each_dev+0x55/0x90 [ 36.560421] [] ? 0xa0322fff [ 36.560470] [] driver_attach+0x1e/0x20 [ 36.560522] [] bus_add_driver+0x198/0x270 [ 36.560573] [] ? 0xa0322fff [ 36.560625] [] driver_register+0x77/0x150 [ 36.560677] [] ? 0xa0322fff [ 36.560729] [] __pci_register_driver+0x5e/0xe0 [ 36.560784] [] ? 0xa0322fff [ 36.560839] [] drm_pci_init+0x11a/0x130 [drm] [ 36.560892] [] ? 0xa0322fff [ 36.560949] [] i915_init+0x8b/0x8d [i915] [ 36.561004] [] do_one_initcall+0x12a/0x180 [ 36.561057] [] sys_init_module+0x10b0/0x1f40 [ 36.56] [] ? free_notes_attrs+0x60/0x60 [ 36.561165] [] system_call_fastpath+0x16/0x1b [ 36.561218] Code:
[PATCH] dma-buf: add reference counting for exporter module
Hi Tomasz, On 8 August 2012 19:36, Daniel Vetter wrote: > On Wed, Aug 08, 2012 at 03:53:10PM +0200, Tomasz Stanislawski wrote: >> Hi Laurent, >> >> On 08/08/2012 03:35 PM, Laurent Pinchart wrote: >> > Hi Tomasz, >> > >> > Thanks for the patch. Thanks for the patch; may I ask you to split it into 2 patches (1 dma-buf and 1 drm) and submit? That ways, either Dave or I can take the patches for either pull request. With that, please feel free to add my Acked-by as well. >> > >> > On Wednesday 08 August 2012 12:17:41 Tomasz Stanislawski wrote: >> >> This patch adds reference counting on a module that exports dma-buf and >> >> implements its operations. This prevents the module from being unloaded >> >> while DMABUF file is in use. >> >> >> >> Signed-off-by: Tomasz Stanislawski >> >> --- >> >> Documentation/dma-buf-sharing.txt |3 ++- >> >> drivers/base/dma-buf.c | 10 +- >> >> drivers/gpu/drm/exynos/exynos_drm_dmabuf.c |1 + >> >> drivers/gpu/drm/i915/i915_gem_dmabuf.c |1 + >> >> drivers/gpu/drm/nouveau/nouveau_prime.c|1 + >> >> drivers/gpu/drm/radeon/radeon_prime.c |1 + >> >> drivers/staging/omapdrm/omap_gem_dmabuf.c |1 + >> >> include/linux/dma-buf.h|2 ++ >> >> 8 files changed, 18 insertions(+), 2 deletions(-) >> >> >> [snip] >> >> >> @@ -96,6 +98,7 @@ struct dma_buf *dma_buf_export(void *priv, const struct >> >> dma_buf_ops *ops, struct file *file; >> >> >> >>if (WARN_ON(!priv || !ops >> >> +|| !ops->owner >> >> Thank you for spotting this. >> I didn'y know that try_get_module returned true is module was NULL. >> >> BTW. Is it worth to add ".owner = THIS_MODULE," to all dma_buf >> exporters in this patch? > > Yeah, I think that makes sense. Otherwise it might get lost somewhere, > i.e. you can smash my Ack on this. > -Daniel > -- > Daniel Vetter > Mail: daniel at ffwll.ch > Mobile: +41 (0)79 365 57 48 -- Thanks and regards, Sumit Semwal.
[Bug 53111] [bisected] lockups since added support for virtual address space on cayman v11
https://bugs.freedesktop.org/show_bug.cgi?id=53111 --- Comment #7 from Michel D?nzer 2012-08-09 07:05:26 UTC --- (In reply to comment #6) > The fault address in the VM_CONTEXT1_PROTECTION_FAULT_ADDR register is less > than the start of the virtual address area, unless that is due to the bug? Sorry, should have mentioned that the address in VM_CONTEXT1_PROTECTION_FAULT_ADDR is shifted right by 12 bits (i.e. it's the page frame number). -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[PATCH v2 0/2] Enhance DMABUF with reference counting for exporter module
Hello, This patchset adds reference counting for an exporter module to DMABUF framework. Moreover, it adds setup of an owner field for exporters in DRM subsystem. v1: Original v2: - split patch into DMABUF and DRM part - allow owner to be NULL Regards, Tomasz Stanislawski Tomasz Stanislawski (2): dma-buf: add reference counting for exporter module drm: set owner field to for all DMABUF exporters Documentation/dma-buf-sharing.txt |3 ++- drivers/base/dma-buf.c |9 - drivers/gpu/drm/exynos/exynos_drm_dmabuf.c |1 + drivers/gpu/drm/i915/i915_gem_dmabuf.c |1 + drivers/gpu/drm/nouveau/nouveau_prime.c|1 + drivers/gpu/drm/radeon/radeon_prime.c |1 + drivers/staging/omapdrm/omap_gem_dmabuf.c |1 + include/linux/dma-buf.h|2 ++ 8 files changed, 17 insertions(+), 2 deletions(-) -- 1.7.9.5
[PATCH 1/3] dma-fence: dma-buf synchronization (v7)
Hey Sumit, Op 08-08-12 08:35, Sumit Semwal schreef: > Hi Maarten, > > On 8 August 2012 00:17, Maarten Lankhorst > wrote: >> Op 07-08-12 19:53, Maarten Lankhorst schreef: >>> A dma-fence can be attached to a buffer which is being filled or consumed >>> by hw, to allow userspace to pass the buffer without waiting to another >>> device. For example, userspace can call page_flip ioctl to display the >>> next frame of graphics after kicking the GPU but while the GPU is still >>> rendering. The display device sharing the buffer with the GPU would >>> attach a callback to get notified when the GPU's rendering-complete IRQ >>> fires, to update the scan-out address of the display, without having to >>> wake up userspace. > Thanks for this patchset; Could you please also fill up > Documentation/dma-buf-sharing.txt, to include the relevant bits? > > We've tried to make sure the Documentation corresponding is kept > up-to-date as the framework has grown, and new features are added to > it - and I think features as important as dma-fence and dmabufmgr do > warrant a healthy update. Ok I'll clean it up and add the documentation, one other question. If code that requires dmabuf needs to select CONFIG_DMA_SHARED_BUFFER, why does dma-buf.h have fallbacks for !CONFIG_DMA_SHARED_BUFFER? This seems weird, would you have any objection if I removed those? ~Maarten
[PATCH v2 1/2] dma-buf: add reference counting for exporter module
This patch adds reference counting on a module that exported dma-buf and
implements its operations. This prevents the module from being unloaded while
DMABUF file is in use.
Signed-off-by: Tomasz Stanislawski
Acked-by: Sumit Semwal
Acked-by: Daniel Vetter
CC: linux-doc at vger.kernel.org
---
Documentation/dma-buf-sharing.txt |3 ++-
drivers/base/dma-buf.c|9 -
include/linux/dma-buf.h |2 ++
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/Documentation/dma-buf-sharing.txt
b/Documentation/dma-buf-sharing.txt
index ad86fb8..2613057 100644
--- a/Documentation/dma-buf-sharing.txt
+++ b/Documentation/dma-buf-sharing.txt
@@ -49,7 +49,8 @@ The dma_buf buffer sharing API usage contains the following
steps:
The buffer exporter announces its wish to export a buffer. In this, it
connects its own private buffer data, provides implementation for operations
that can be performed on the exported dma_buf, and flags for the file
- associated with this buffer.
+ associated with this buffer. The operations structure has owner field.
+ You should initialize this to THIS_MODULE in most cases.
Interface:
struct dma_buf *dma_buf_export(void *priv, struct dma_buf_ops *ops,
diff --git a/drivers/base/dma-buf.c b/drivers/base/dma-buf.c
index c30f3e1..a1d9cab 100644
--- a/drivers/base/dma-buf.c
+++ b/drivers/base/dma-buf.c
@@ -27,6 +27,7 @@
#include
#include
#include
+#include
static inline int is_dma_buf_file(struct file *);
@@ -40,6 +41,7 @@ static int dma_buf_release(struct inode *inode, struct file
*file)
dmabuf = file->private_data;
dmabuf->ops->release(dmabuf);
+ module_put(dmabuf->ops->owner);
kfree(dmabuf);
return 0;
}
@@ -105,9 +107,14 @@ struct dma_buf *dma_buf_export(void *priv, const struct
dma_buf_ops *ops,
return ERR_PTR(-EINVAL);
}
+ if (!try_module_get(ops->owner))
+ return ERR_PTR(-ENOENT);
+
dmabuf = kzalloc(sizeof(struct dma_buf), GFP_KERNEL);
- if (dmabuf == NULL)
+ if (dmabuf == NULL) {
+ module_put(ops->owner);
return ERR_PTR(-ENOMEM);
+ }
dmabuf->priv = priv;
dmabuf->ops = ops;
diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h
index eb48f38..22953de 100644
--- a/include/linux/dma-buf.h
+++ b/include/linux/dma-buf.h
@@ -37,6 +37,7 @@ struct dma_buf_attachment;
/**
* struct dma_buf_ops - operations possible on struct dma_buf
+ * @owner: the module that implements dma_buf operations
* @attach: [optional] allows different devices to 'attach' themselves to the
* given buffer. It might return -EBUSY to signal that backing storage
* is already allocated and incompatible with the requirements
@@ -70,6 +71,7 @@ struct dma_buf_attachment;
* @vunmap: [optional] unmaps a vmap from the buffer
*/
struct dma_buf_ops {
+ struct module *owner;
int (*attach)(struct dma_buf *, struct device *,
struct dma_buf_attachment *);
--
1.7.9.5
[PATCH v2 2/2] drm: set owner field to for all DMABUF exporters
This patch sets owner field in DMABUF operations for all DMABUF exporters in
DRM subsystem. This prevents an exporting module from being unloaded while
exported DMABUF descriptor is in use.
Signed-off-by: Tomasz Stanislawski
Acked-by: Sumit Semwal
Acked-by: Daniel Vetter
---
drivers/gpu/drm/exynos/exynos_drm_dmabuf.c |1 +
drivers/gpu/drm/i915/i915_gem_dmabuf.c |1 +
drivers/gpu/drm/nouveau/nouveau_prime.c|1 +
drivers/gpu/drm/radeon/radeon_prime.c |1 +
drivers/staging/omapdrm/omap_gem_dmabuf.c |1 +
5 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
index 613bf8a..cf3bc6d 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
@@ -164,6 +164,7 @@ static void exynos_gem_dmabuf_kunmap(struct dma_buf
*dma_buf,
}
static struct dma_buf_ops exynos_dmabuf_ops = {
+ .owner = THIS_MODULE,
.map_dma_buf= exynos_gem_map_dma_buf,
.unmap_dma_buf = exynos_gem_unmap_dma_buf,
.kmap = exynos_gem_dmabuf_kmap,
diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
index aa308e1..07ff03b 100644
--- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
@@ -152,6 +152,7 @@ static int i915_gem_dmabuf_mmap(struct dma_buf *dma_buf,
struct vm_area_struct *
}
static const struct dma_buf_ops i915_dmabuf_ops = {
+ .owner = THIS_MODULE,
.map_dma_buf = i915_gem_map_dma_buf,
.unmap_dma_buf = i915_gem_unmap_dma_buf,
.release = i915_gem_dmabuf_release,
diff --git a/drivers/gpu/drm/nouveau/nouveau_prime.c
b/drivers/gpu/drm/nouveau/nouveau_prime.c
index a25cf2c..8605033 100644
--- a/drivers/gpu/drm/nouveau/nouveau_prime.c
+++ b/drivers/gpu/drm/nouveau/nouveau_prime.c
@@ -127,6 +127,7 @@ static void nouveau_gem_prime_vunmap(struct dma_buf
*dma_buf, void *vaddr)
}
static const struct dma_buf_ops nouveau_dmabuf_ops = {
+ .owner = THIS_MODULE,
.map_dma_buf = nouveau_gem_map_dma_buf,
.unmap_dma_buf = nouveau_gem_unmap_dma_buf,
.release = nouveau_gem_dmabuf_release,
diff --git a/drivers/gpu/drm/radeon/radeon_prime.c
b/drivers/gpu/drm/radeon/radeon_prime.c
index 6bef46a..4061fd3 100644
--- a/drivers/gpu/drm/radeon/radeon_prime.c
+++ b/drivers/gpu/drm/radeon/radeon_prime.c
@@ -127,6 +127,7 @@ static void radeon_gem_prime_vunmap(struct dma_buf
*dma_buf, void *vaddr)
mutex_unlock(&dev->struct_mutex);
}
const static struct dma_buf_ops radeon_dmabuf_ops = {
+ .owner = THIS_MODULE,
.map_dma_buf = radeon_gem_map_dma_buf,
.unmap_dma_buf = radeon_gem_unmap_dma_buf,
.release = radeon_gem_dmabuf_release,
diff --git a/drivers/staging/omapdrm/omap_gem_dmabuf.c
b/drivers/staging/omapdrm/omap_gem_dmabuf.c
index 42728e0..6a4dd67 100644
--- a/drivers/staging/omapdrm/omap_gem_dmabuf.c
+++ b/drivers/staging/omapdrm/omap_gem_dmabuf.c
@@ -179,6 +179,7 @@ out_unlock:
}
struct dma_buf_ops omap_dmabuf_ops = {
+ .owner = THIS_MODULE,
.map_dma_buf = omap_gem_map_dma_buf,
.unmap_dma_buf = omap_gem_unmap_dma_buf,
.release = omap_gem_dmabuf_release,
--
1.7.9.5
[Bug 53291] New: Failed to allocate a buffer at CAYMAN
https://bugs.freedesktop.org/show_bug.cgi?id=53291 Bug #: 53291 Summary: Failed to allocate a buffer at CAYMAN Classification: Unclassified Product: DRI Version: DRI CVS Platform: x86-64 (AMD64) OS/Version: Linux (All) Status: NEW Severity: normal Priority: medium Component: libdrm AssignedTo: dri-devel at lists.freedesktop.org ReportedBy: v10lator at myway.de I see this error randomly with different games. Good reproducable with minecraft (appears at the first minutes of gameplay). radeon: Failed to allocate a buffer: radeon:size : 4096 bytes radeon:alignment : 4096 bytes radeon:domains : 2 This shows up in dmesg: Also (don't know if that is related or if I should open a new report for it) I randomly get a similar error. Good reproducible by playing two instances of minecraft at the same time: radeon: Failed to allocate a buffer: radeon:size : 4096 bytes radeon:alignment : 256 bytes radeon:domains : 2 EE r600_texture.c:552 r600_texture_get_transfer - failed to create temporary texture to hold untiled copy ## GL ERROR ## @ Pre render 1285: Out of memory Some more: radeon: Failed to allocate a buffer: radeon:size : 4096 bytes radeon:alignment : 256 bytes radeon:domains : 2 EE r600_texture.c:552 r600_texture_get_transfer - failed to create temporary texture to hold untiled copy radeon: Failed to allocate a buffer: radeon:size : 4096 bytes radeon:alignment : 256 bytes radeon:domains : 2 EE r600_texture.c:552 r600_texture_get_transfer - failed to create temporary texture to hold untiled copy radeon: Failed to allocate a buffer: radeon:size : 4096 bytes radeon:alignment : 256 bytes radeon:domains : 2 EE r600_texture.c:552 r600_texture_get_transfer - failed to create temporary texture to hold untiled copy radeon: Failed to allocate a buffer: radeon:size : 4096 bytes radeon:alignment : 256 bytes radeon:domains : 2 EE r600_texture.c:552 r600_texture_get_transfer - failed to create temporary texture to hold untiled copy radeon: Failed to allocate a buffer: radeon:size : 4096 bytes radeon:alignment : 256 bytes radeon:domains : 2 EE r600_texture.c:552 r600_texture_get_transfer - failed to create temporary texture to hold untiled copy ## GL ERROR ## @ Pre render 1285: Out of memory This shows up in dmesg: [ 2581.428385] radeon :03:00.0: bo 880132b8d800 va 0x0277F000 conflict with (bo 880115520400 0x0277F000 0x0278) [ 3226.086410] radeon :03:00.0: bo 880137603800 va 0x04D2 conflict with (bo 88012eba9000 0x04D2 0x04D21000) [ 3226.087925] radeon :03:00.0: bo 880137603800 va 0x04D2 conflict with (bo 88012eba9000 0x04D2 0x04D21000) [ 3226.092606] radeon :03:00.0: bo 880137603800 va 0x04D2 conflict with (bo 88012eba9000 0x04D2 0x04D21000) [ 3226.093541] radeon :03:00.0: bo 880137603800 va 0x04D2 conflict with (bo 88012eba9000 0x04D2 0x04D21000) [ 3226.094905] radeon :03:00.0: bo 880137603800 va 0x04D2 conflict with (bo 88012eba9000 0x04D2 0x04D21000) [ 3226.448935] radeon :03:00.0: bo 880137647400 va 0x04D4E000 conflict with (bo 880148407c00 0x04D4E000 0x04D4F000) [ 3278.230509] radeon :03:00.0: bo 88014930 va 0x148B1000 conflict with (bo 88012f656c00 0x148B1000 0x148B2000) [ 3759.347944] radeon :03:00.0: bo 880113d36c00 va 0x04ED2000 conflict with (bo 88013d72bc00 0x04ED2000 0x04ED3000) [ 3899.333115] radeon :03:00.0: bo 88013c35ac00 va 0x0C17B000 conflict with (bo 880115523800 0x0C17B000 0x0C17C000) [ 3960.510231] radeon :03:00.0: bo 88012422bc00 va 0x05C49000 conflict with (bo 88014318fc00 0x05C49000 0x05C4A000) [ 3960.510673] radeon :03:00.0: bo 88012422bc00 va 0x05C49000 conflict with (bo 88014318fc00 0x05C49000 0x05C4A000) [ 3960.511108] radeon :03:00.0: bo 88012422bc00 va 0x05C49000 conflict with (bo 88014318fc00 0x05C49000 0x05C4A000) [ 3960.511716] radeon :03:00.0: bo 8801374f9800 va 0x05C49000 conflict with (bo 88014318fc00 0x05C49000 0x05C4A000) [ 3960.512308] radeon :03:00.0: bo 8801374f9800 va 0x05C49000 conflict with (bo 88014318fc00 0x05C49000 0x05C4A000) This is with the git versions of the radon driver, libdrm, mesa and the 3.5 kernel. The card beeing used is a Sapphire Radeon HD 6950 with 2GB. lspci -v: 03:00.0 VGA compatible controller: Advanced Micro Devices [AMD] nee ATI Cayman PRO [Radeon HD 6950] (prog-if 00 [VGA controller]) Subsystem: PC Partner Limited Device 186b Flags: bus master, fast devsel, latency 0, IRQ 43 Memory at d000 (64-bit, prefetchable) [size=256M] Memory at fe9e (64-bit, non-prefetchable) [size=128K] I/O ports at d000 [size=256] Expan
[Bug 16273] suspend/resume failure with radeon kms driver
https://bugzilla.kernel.org/show_bug.cgi?id=16273 Alan changed: What|Removed |Added Status|NEW |RESOLVED CC||alan at lxorguk.ukuu.org.uk Resolution||OBSOLETE --- Comment #8 from Alan 2012-08-09 13:59:44 --- The driver has changed so much that this bug report is really obsolete. If you see the problem with a modern (3.2/4/5 kernel) feel free to update it -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug.
[Bug 53291] Failed to allocate a buffer at CAYMAN
https://bugs.freedesktop.org/show_bug.cgi?id=53291 --- Comment #1 from Alex Deucher 2012-08-09 14:08:54 UTC --- possibly a duplicate of bug 45018. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[Bug 16295] radeon conflict/interference with rt2800pci
https://bugzilla.kernel.org/show_bug.cgi?id=16295 Alan changed: What|Removed |Added Status|NEW |RESOLVED CC||alan at lxorguk.ukuu.org.uk Resolution||OBSOLETE -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug.
[Bug 45018] [bisected] rendering regression and va conflicts since added support for virtual address space on cayman v11
https://bugs.freedesktop.org/show_bug.cgi?id=45018 --- Comment #114 from Alex Deucher 2012-08-09 14:14:04 UTC --- Please test mesa from git (no additional patches) and make sure your kernel has this patch: http://lists.freedesktop.org/archives/dri-devel/2012-August/026015.html (no other kernel patches). -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[Bug 16375] missing blit_vb check in r600_prepare_blit_copy
https://bugzilla.kernel.org/show_bug.cgi?id=16375 Alan changed: What|Removed |Added Status|NEW |RESOLVED CC||alan at lxorguk.ukuu.org.uk Resolution||CODE_FIX -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug.
[PATCH 1/3] drm/radeon/kms: reorder code in r600_check_texture_resource
Signed-off-by: Marek Ol??k
---
drivers/gpu/drm/radeon/r600_cs.c | 52 +++---
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index 1119e31..ff61402 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -1559,13 +1559,14 @@ static int r600_check_texture_resource(struct
radeon_cs_parser *p, u32 idx,
u32 tiling_flags)
{
struct r600_cs_track *track = p->track;
- u32 nfaces, llevel, blevel, w0, h0, d0;
- u32 word0, word1, l0_size, mipmap_size, word2, word3;
+ u32 dim, nfaces, llevel, blevel, w0, h0, d0;
+ u32 word0, word1, l0_size, mipmap_size, word2, word3, word4, word5;
u32 height_align, pitch, pitch_align, depth_align;
- u32 array, barray, larray;
+ u32 barray, larray;
u64 base_align;
struct array_mode_checker array_check;
u32 format;
+ bool is_array;
/* on legacy kernel we don't perform advanced check */
if (p->rdev == NULL)
@@ -1583,12 +1584,28 @@ static int r600_check_texture_resource(struct
radeon_cs_parser *p, u32 idx,
word0 |=
S_038000_TILE_MODE(V_038000_ARRAY_1D_TILED_THIN1);
}
word1 = radeon_get_ib_value(p, idx + 1);
+ word2 = radeon_get_ib_value(p, idx + 2) << 8;
+ word3 = radeon_get_ib_value(p, idx + 3) << 8;
+ word4 = radeon_get_ib_value(p, idx + 4);
+ word5 = radeon_get_ib_value(p, idx + 5);
+ dim = G_038000_DIM(word0);
w0 = G_038000_TEX_WIDTH(word0) + 1;
+ pitch = (G_038000_PITCH(word0) + 1) * 8;
h0 = G_038004_TEX_HEIGHT(word1) + 1;
d0 = G_038004_TEX_DEPTH(word1);
+ format = G_038004_DATA_FORMAT(word1);
+ blevel = G_038010_BASE_LEVEL(word4);
+ llevel = G_038014_LAST_LEVEL(word5);
+ /* pitch in texels */
+ array_check.array_mode = G_038000_TILE_MODE(word0);
+ array_check.group_size = track->group_size;
+ array_check.nbanks = track->nbanks;
+ array_check.npipes = track->npipes;
+ array_check.nsamples = 1;
+ array_check.blocksize = r600_fmt_get_blocksize(format);
nfaces = 1;
- array = 0;
- switch (G_038000_DIM(word0)) {
+ is_array = false;
+ switch (dim) {
case V_038000_SQ_TEX_DIM_1D:
case V_038000_SQ_TEX_DIM_2D:
case V_038000_SQ_TEX_DIM_3D:
@@ -1601,7 +1618,7 @@ static int r600_check_texture_resource(struct
radeon_cs_parser *p, u32 idx,
break;
case V_038000_SQ_TEX_DIM_1D_ARRAY:
case V_038000_SQ_TEX_DIM_2D_ARRAY:
- array = 1;
+ is_array = true;
break;
case V_038000_SQ_TEX_DIM_2D_MSAA:
case V_038000_SQ_TEX_DIM_2D_ARRAY_MSAA:
@@ -1609,21 +1626,12 @@ static int r600_check_texture_resource(struct
radeon_cs_parser *p, u32 idx,
dev_warn(p->dev, "this kernel doesn't support %d texture
dim\n", G_038000_DIM(word0));
return -EINVAL;
}
- format = G_038004_DATA_FORMAT(word1);
if (!r600_fmt_is_valid_texture(format, p->family)) {
dev_warn(p->dev, "%s:%d texture invalid format %d\n",
__func__, __LINE__, format);
return -EINVAL;
}
- /* pitch in texels */
- pitch = (G_038000_PITCH(word0) + 1) * 8;
- array_check.array_mode = G_038000_TILE_MODE(word0);
- array_check.group_size = track->group_size;
- array_check.nbanks = track->nbanks;
- array_check.npipes = track->npipes;
- array_check.nsamples = 1;
- array_check.blocksize = r600_fmt_get_blocksize(format);
if (r600_get_array_mode_alignment(&array_check,
&pitch_align, &height_align,
&depth_align, &base_align)) {
dev_warn(p->dev, "%s:%d tex array mode (%d) invalid\n",
@@ -1649,20 +1657,13 @@ static int r600_check_texture_resource(struct
radeon_cs_parser *p, u32 idx,
return -EINVAL;
}
- word2 = radeon_get_ib_value(p, idx + 2) << 8;
- word3 = radeon_get_ib_value(p, idx + 3) << 8;
-
- word0 = radeon_get_ib_value(p, idx + 4);
- word1 = radeon_get_ib_value(p, idx + 5);
- blevel = G_038010_BASE_LEVEL(word0);
- llevel = G_038014_LAST_LEVEL(word1);
if (blevel > llevel) {
dev_warn(p->dev, "texture blevel %d > llevel %d\n",
blevel, llevel);
}
- if (array == 1) {
- barray = G_038014_BASE_ARRAY(word1);
- larray = G_038014_LAST_ARRAY(word1);
+ if (is_array) {
+ barray = G_038014_BASE_ARRAY(word5);
+ larray = G_038014_LAST_ARRAY(word5);
nfaces = larray - barray + 1;
}
@@ -1679,7 +1680,6 @@ static int r600_check_texture_resource(struct
r
[PATCH 2/3] drm/radeon/kms: add MSAA texture support for r600-evergreen
Most of the checking seems to be in place already. As you can see, log2(number of samples) resides in LAST_LEVEL. This is required for MSAA support (namely for depth-stencil resolve and blitting between MSAA resources). Signed-off-by: Marek Ol??k --- drivers/gpu/drm/radeon/evergreen_cs.c |7 +++ drivers/gpu/drm/radeon/r600_cs.c |7 ++- drivers/gpu/drm/radeon/radeon_drv.c |3 ++- 3 files changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index f2e5c54..e44a62a 100644 --- a/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/drivers/gpu/drm/radeon/evergreen_cs.c @@ -788,6 +788,13 @@ static int evergreen_cs_track_validate_texture(struct radeon_cs_parser *p, case V_03_SQ_TEX_DIM_1D_ARRAY: case V_03_SQ_TEX_DIM_2D_ARRAY: depth = 1; + break; + case V_03_SQ_TEX_DIM_2D_MSAA: + case V_03_SQ_TEX_DIM_2D_ARRAY_MSAA: + surf.nsamples = 1 << llevel; + llevel = 0; + depth = 1; + break; case V_03_SQ_TEX_DIM_3D: break; default: diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index ff61402..3dab49c 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c @@ -1620,8 +1620,13 @@ static int r600_check_texture_resource(struct radeon_cs_parser *p, u32 idx, case V_038000_SQ_TEX_DIM_2D_ARRAY: is_array = true; break; - case V_038000_SQ_TEX_DIM_2D_MSAA: case V_038000_SQ_TEX_DIM_2D_ARRAY_MSAA: + is_array = true; + /* fall through */ + case V_038000_SQ_TEX_DIM_2D_MSAA: + array_check.nsamples = 1 << llevel; + llevel = 0; + break; default: dev_warn(p->dev, "this kernel doesn't support %d texture dim\n", G_038000_DIM(word0)); return -EINVAL; diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 4b736ec..a7f8ac0 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -60,9 +60,10 @@ * 2.16.0 - fix evergreen 2D tiled surface calculation * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx * 2.18.0 - r600-eg: allow "invalid" DB formats + * 2.19.0 - r600-eg: MSAA textures */ #define KMS_DRIVER_MAJOR 2 -#define KMS_DRIVER_MINOR 18 +#define KMS_DRIVER_MINOR 19 #define KMS_DRIVER_PATCHLEVEL 0 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); int radeon_driver_unload_kms(struct drm_device *dev); -- 1.7.9.5
[PATCH 3/3] drm/radeon/kms: implement timestamp userspace query
Signed-off-by: Marek Ol??k
---
drivers/gpu/drm/radeon/r600.c | 12 +++
drivers/gpu/drm/radeon/r600d.h |3 +++
drivers/gpu/drm/radeon/radeon.h|1 +
drivers/gpu/drm/radeon/radeon_asic.h |2 ++
drivers/gpu/drm/radeon/radeon_device.c |1 +
drivers/gpu/drm/radeon/radeon_drv.c|2 +-
drivers/gpu/drm/radeon/radeon_kms.c| 35 ++--
drivers/gpu/drm/radeon/si.c| 11 ++
drivers/gpu/drm/radeon/sid.h |3 +++
include/drm/radeon_drm.h |2 ++
10 files changed, 65 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 637280f..be0e320 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -3789,3 +3789,15 @@ static void r600_pcie_gen2_enable(struct radeon_device
*rdev)
WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
}
}
+
+uint64_t r600_get_gpu_clock(struct radeon_device *rdev)
+{
+ uint64_t clock;
+
+ mutex_lock(&rdev->gpu_clock_mutex);
+ WREG32(RLC_CAPTURE_GPU_CLOCK_COUNT, 1);
+ clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) |
+ ((uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_MSB) << 32);
+ mutex_unlock(&rdev->gpu_clock_mutex);
+ return clock;
+}
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index 4b116ae..fd328f4 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -602,6 +602,9 @@
#define RLC_HB_WPTR 0x3f1c
#define RLC_HB_WPTR_LSB_ADDR 0x3f14
#define RLC_HB_WPTR_MSB_ADDR 0x3f18
+#define RLC_GPU_CLOCK_COUNT_LSB 0x3f38
+#define RLC_GPU_CLOCK_COUNT_MSB 0x3f3c
+#define RLC_CAPTURE_GPU_CLOCK_COUNT 0x3f40
#define RLC_MC_CNTL 0x3f44
#define RLC_UCODE_CNTL0x3f48
#define RLC_UCODE_ADDR0x3f2c
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 5431af2..150097f 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1533,6 +1533,7 @@ struct radeon_device {
unsigneddebugfs_count;
/* virtual memory */
struct radeon_vm_managervm_manager;
+ struct mutexgpu_clock_mutex;
};
int radeon_device_init(struct radeon_device *rdev,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
b/drivers/gpu/drm/radeon/radeon_asic.h
index f4af243..cbba387 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -371,6 +371,7 @@ void r600_kms_blit_copy(struct radeon_device *rdev,
unsigned num_gpu_pages,
struct radeon_sa_bo *vb);
int r600_mc_wait_for_idle(struct radeon_device *rdev);
+uint64_t r600_get_gpu_clock(struct radeon_device *rdev);
/*
* rv770,rv730,rv710,rv740
@@ -472,5 +473,6 @@ int si_vm_bind(struct radeon_device *rdev, struct radeon_vm
*vm, int id);
void si_vm_unbind(struct radeon_device *rdev, struct radeon_vm *vm);
void si_vm_tlb_flush(struct radeon_device *rdev, struct radeon_vm *vm);
int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib);
+uint64_t si_get_gpu_clock(struct radeon_device *rdev);
#endif
diff --git a/drivers/gpu/drm/radeon/radeon_device.c
b/drivers/gpu/drm/radeon/radeon_device.c
index 742af82..d2e2438 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -1009,6 +1009,7 @@ int radeon_device_init(struct radeon_device *rdev,
atomic_set(&rdev->ih.lock, 0);
mutex_init(&rdev->gem.mutex);
mutex_init(&rdev->pm.mutex);
+ mutex_init(&rdev->gpu_clock_mutex);
init_rwsem(&rdev->pm.mclk_lock);
init_rwsem(&rdev->exclusive_lock);
init_waitqueue_head(&rdev->irq.vblank_queue);
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c
b/drivers/gpu/drm/radeon/radeon_drv.c
index a7f8ac0..f940806 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -60,7 +60,7 @@
* 2.16.0 - fix evergreen 2D tiled surface calculation
* 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
* 2.18.0 - r600-eg: allow "invalid" DB formats
- * 2.19.0 - r600-eg: MSAA textures
+ * 2.19.0 - r600-eg: MSAA textures; r600-si: RADEON_INFO_TIMESTAMP query
*/
#define KMS_DRIVER_MAJOR 2
#define KMS_DRIVER_MINOR 19
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c
b/drivers/gpu/drm/radeon/radeon_kms.c
index 1d73f16..414b4ac 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -29,6 +29,7 @@
#include "drm_sarea.h"
#include "radeon.h"
#include "radeon_drm.h"
+#include "radeon_asic.h"
[PATCH 1/2] radeon: force 2D tiling for MSAA surfaces
---
radeon/radeon_surface.c | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c
index 874a092..499e994 100644
--- a/radeon/radeon_surface.c
+++ b/radeon/radeon_surface.c
@@ -154,7 +154,7 @@ static void surf_minify(struct radeon_surface *surf,
surf->level[level].nblk_x = (surf->level[level].npix_x + surf->blk_w - 1)
/ surf->blk_w;
surf->level[level].nblk_y = (surf->level[level].npix_y + surf->blk_h - 1)
/ surf->blk_h;
surf->level[level].nblk_z = (surf->level[level].npix_z + surf->blk_d - 1)
/ surf->blk_d;
-if (surf->level[level].mode == RADEON_SURF_MODE_2D) {
+if (surf->nsamples == 1 && surf->level[level].mode == RADEON_SURF_MODE_2D)
{
if (surf->level[level].nblk_x < xalign || surf->level[level].nblk_y <
yalign) {
surf->level[level].mode = RADEON_SURF_MODE_1D;
return;
@@ -382,6 +382,12 @@ static int r6_surface_init(struct radeon_surface_manager
*surf_man,
unsigned mode;
int r;
+/* MSAA surfaces support the 2D mode only. */
+if (surf->nsamples > 1) {
+surf->flags = RADEON_SURF_CLR(surf->flags, MODE);
+surf->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE);
+}
+
/* tiling mode */
mode = (surf->flags >> RADEON_SURF_MODE_SHIFT) & RADEON_SURF_MODE_MASK;
@@ -401,6 +407,10 @@ static int r6_surface_init(struct radeon_surface_manager
*surf_man,
/* force 1d on kernel that can't do 2d */
if (!surf_man->hw_info.allow_2d && mode > RADEON_SURF_MODE_1D) {
+if (surf->nsamples > 1) {
+fprintf(stderr, "radeon: Cannot use 2D tiling for an MSAA surface
(%i).\n", __LINE__);
+return -EFAULT;
+}
mode = RADEON_SURF_MODE_1D;
surf->flags = RADEON_SURF_CLR(surf->flags, MODE);
surf->flags |= RADEON_SURF_SET(mode, MODE);
@@ -548,7 +558,7 @@ static void eg_surf_minify(struct radeon_surface *surf,
surf->level[level].nblk_x = (surf->level[level].npix_x + surf->blk_w - 1)
/ surf->blk_w;
surf->level[level].nblk_y = (surf->level[level].npix_y + surf->blk_h - 1)
/ surf->blk_h;
surf->level[level].nblk_z = (surf->level[level].npix_z + surf->blk_d - 1)
/ surf->blk_d;
-if (surf->level[level].mode == RADEON_SURF_MODE_2D) {
+if (surf->nsamples == 1 && surf->level[level].mode == RADEON_SURF_MODE_2D)
{
if (surf->level[level].nblk_x < mtilew || surf->level[level].nblk_y <
mtileh) {
surf->level[level].mode = RADEON_SURF_MODE_1D;
return;
@@ -687,6 +697,10 @@ static int eg_surface_sanity(struct radeon_surface_manager
*surf_man,
/* force 1d on kernel that can't do 2d */
if (!surf_man->hw_info.allow_2d && mode > RADEON_SURF_MODE_1D) {
+if (surf->nsamples > 1) {
+fprintf(stderr, "radeon: Cannot use 2D tiling for an MSAA surface
(%i).\n", __LINE__);
+return -EFAULT;
+}
mode = RADEON_SURF_MODE_1D;
surf->flags = RADEON_SURF_CLR(surf->flags, MODE);
surf->flags |= RADEON_SURF_SET(mode, MODE);
@@ -754,6 +768,12 @@ static int eg_surface_init(struct radeon_surface_manager
*surf_man,
unsigned mode;
int r;
+/* MSAA surfaces support the 2D mode only. */
+if (surf->nsamples > 1) {
+surf->flags = RADEON_SURF_CLR(surf->flags, MODE);
+surf->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE);
+}
+
/* tiling mode */
mode = (surf->flags >> RADEON_SURF_MODE_SHIFT) & RADEON_SURF_MODE_MASK;
--
1.7.9.5
[PATCH 2/2] radeon: tweak TILE_SPLIT for MSAA surfaces
---
radeon/radeon_surface.c | 37 +++--
1 file changed, 31 insertions(+), 6 deletions(-)
diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c
index 499e994..892dca6 100644
--- a/radeon/radeon_surface.c
+++ b/radeon/radeon_surface.c
@@ -871,12 +871,37 @@ static int eg_surface_best(struct radeon_surface_manager
*surf_man,
return 0;
}
-/* set tile split to row size, optimize latter for multi-sample surface
- * tile split >= 256 for render buffer surface. Also depth surface want
- * smaller value for optimal performances.
- */
-surf->tile_split = surf_man->hw_info.row_size;
-surf->stencil_tile_split = surf_man->hw_info.row_size / 2;
+/* Tweak TILE_SPLIT for performance here. */
+if (surf->nsamples > 1) {
+if (surf->flags & (RADEON_SURF_ZBUFFER | RADEON_SURF_SBUFFER)) {
+switch (surf->nsamples) {
+case 2:
+surf->tile_split = 128;
+break;
+case 4:
+surf->tile_split = 128;
+break;
+case 8:
+surf->tile_split = 256;
+break;
+case 16: /* cayman only */
+surf->tile_split = 512;
+break;
+default:
+fprintf(stderr, "radeon: Wrong number of samples %i (%i)\n",
+surf->nsamples, __LINE__);
+return -EINVAL;
+}
+surf->stencil_tile_split = 64;
+} else {
+/* tile split must be >= 256 for colorbuffer surfaces */
+surf->tile_split = MAX2(surf->nsamples * surf->bpe * 64, 256);
+}
+} else {
+/* set tile split to row size */
+surf->tile_split = surf_man->hw_info.row_size;
+surf->stencil_tile_split = surf_man->hw_info.row_size / 2;
+}
/* bankw or bankh greater than 1 increase alignment requirement, not
* sure if it's worth using smaller bankw & bankh to stick with 2D
--
1.7.9.5
[Bug 50450] OpenGL does not work or works very slowly on Radeon HD3850
https://bugs.freedesktop.org/show_bug.cgi?id=50450 Andreas Boll changed: What|Removed |Added Component|Drivers/DRI/R600|Drivers/Gallium/r600 --- Comment #11 from Andreas Boll 2012-08-09 14:53:12 UTC --- glxinfo in comment 1 shows: OpenGL renderer string: Gallium 0.4 on AMD RV670 -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[Bug 53283] Rendering problems in Sacred with Radeon and Nvidia
https://bugs.freedesktop.org/show_bug.cgi?id=53283 kh3095 at yandex.ru changed: What|Removed |Added Severity|normal |critical -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are on the CC list for the bug.
[Bug 53283] Rendering problems in Sacred with Radeon and Nvidia
https://bugs.freedesktop.org/show_bug.cgi?id=53283 --- Comment #8 from kh3095 at yandex.ru 2012-08-09 14:54:08 UTC --- OK, I'll try. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are on the CC list for the bug.
[PATCH v2 1/2] dma-buf: add reference counting for exporter module
Hi Greg, On 08/09/2012 04:23 PM, Greg KH wrote: > On Thu, Aug 09, 2012 at 11:36:21AM +0200, Tomasz Stanislawski wrote: >> This patch adds reference counting on a module that exported dma-buf and >> implements its operations. This prevents the module from being unloaded while >> DMABUF file is in use. > > Why force all of the modules to be changed "by hand", and not just do > this automatically by changing the register function to include the > THIS_MODULE macro in it? Much like the pci_register_driver() function > is implemented in include/linux/pci.h? Thank you for the hint. The owner field belongs to dma_buf_ops structure that is often a 'const' entity. Therefore owner field would have to be moved to 'struct dma_buf' to avoid 'deconstification' issues. Regards, Tomasz Stanislawski > > That makes it impossible for driver authors to get it wrong, which is > always a good sign of a correct api. > > thanks, > > greg k-h >
[Bug 45018] [bisected] rendering regression and va conflicts since added support for virtual address space on cayman v11
https://bugs.freedesktop.org/show_bug.cgi?id=45018 --- Comment #115 from Alexandre Demers 2012-08-09 14:56:34 UTC --- (In reply to comment #114) > Please test mesa from git (no additional patches) and make sure your kernel > has > this patch: > http://lists.freedesktop.org/archives/dri-devel/2012-August/026015.html > (no other kernel patches). It looks pretty much to what I was testing with (latest mesa git without any patch as explained in comment 112) where I had already applied Jerome's patch v2 (no other patch). v4 doesn't seem to have any major differences (according to comment for v3 and v4). Nevertheless, I'll recompile kernel 3.6-rc1 with patch v4 just in case, though I would be surprised if that would make a difference from test/error reported in comment 113. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[PATCH 3/3] drm/radeon/kms: implement timestamp userspace query
On Thu, Aug 9, 2012 at 10:34 AM, Marek Ol??k wrote:
> Signed-off-by: Marek Ol??k
Some comment inline that need a v2 at least for version otherwise
Reviewed-by: Jerome Glisse
> ---
> drivers/gpu/drm/radeon/r600.c | 12 +++
> drivers/gpu/drm/radeon/r600d.h |3 +++
> drivers/gpu/drm/radeon/radeon.h|1 +
> drivers/gpu/drm/radeon/radeon_asic.h |2 ++
> drivers/gpu/drm/radeon/radeon_device.c |1 +
> drivers/gpu/drm/radeon/radeon_drv.c|2 +-
> drivers/gpu/drm/radeon/radeon_kms.c| 35
> ++--
> drivers/gpu/drm/radeon/si.c| 11 ++
> drivers/gpu/drm/radeon/sid.h |3 +++
> include/drm/radeon_drm.h |2 ++
> 10 files changed, 65 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
> index 637280f..be0e320 100644
> --- a/drivers/gpu/drm/radeon/r600.c
> +++ b/drivers/gpu/drm/radeon/r600.c
> @@ -3789,3 +3789,15 @@ static void r600_pcie_gen2_enable(struct radeon_device
> *rdev)
> WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
> }
> }
> +
> +uint64_t r600_get_gpu_clock(struct radeon_device *rdev)
> +{
> + uint64_t clock;
> +
> + mutex_lock(&rdev->gpu_clock_mutex);
> + WREG32(RLC_CAPTURE_GPU_CLOCK_COUNT, 1);
> + clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) |
> + ((uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_MSB) << 32);
I keep forgeting about c type rules but i think you want 32ULL
> + mutex_unlock(&rdev->gpu_clock_mutex);
> + return clock;
> +}
> diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
> index 4b116ae..fd328f4 100644
> --- a/drivers/gpu/drm/radeon/r600d.h
> +++ b/drivers/gpu/drm/radeon/r600d.h
> @@ -602,6 +602,9 @@
> #define RLC_HB_WPTR 0x3f1c
> #define RLC_HB_WPTR_LSB_ADDR 0x3f14
> #define RLC_HB_WPTR_MSB_ADDR 0x3f18
> +#define RLC_GPU_CLOCK_COUNT_LSB 0x3f38
> +#define RLC_GPU_CLOCK_COUNT_MSB 0x3f3c
> +#define RLC_CAPTURE_GPU_CLOCK_COUNT 0x3f40
> #define RLC_MC_CNTL 0x3f44
> #define RLC_UCODE_CNTL0x3f48
> #define RLC_UCODE_ADDR0x3f2c
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index 5431af2..150097f 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -1533,6 +1533,7 @@ struct radeon_device {
> unsigneddebugfs_count;
> /* virtual memory */
> struct radeon_vm_managervm_manager;
> + struct mutexgpu_clock_mutex;
> };
>
> int radeon_device_init(struct radeon_device *rdev,
> diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
> b/drivers/gpu/drm/radeon/radeon_asic.h
> index f4af243..cbba387 100644
> --- a/drivers/gpu/drm/radeon/radeon_asic.h
> +++ b/drivers/gpu/drm/radeon/radeon_asic.h
> @@ -371,6 +371,7 @@ void r600_kms_blit_copy(struct radeon_device *rdev,
> unsigned num_gpu_pages,
> struct radeon_sa_bo *vb);
> int r600_mc_wait_for_idle(struct radeon_device *rdev);
> +uint64_t r600_get_gpu_clock(struct radeon_device *rdev);
>
> /*
> * rv770,rv730,rv710,rv740
> @@ -472,5 +473,6 @@ int si_vm_bind(struct radeon_device *rdev, struct
> radeon_vm *vm, int id);
> void si_vm_unbind(struct radeon_device *rdev, struct radeon_vm *vm);
> void si_vm_tlb_flush(struct radeon_device *rdev, struct radeon_vm *vm);
> int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib);
> +uint64_t si_get_gpu_clock(struct radeon_device *rdev);
>
> #endif
> diff --git a/drivers/gpu/drm/radeon/radeon_device.c
> b/drivers/gpu/drm/radeon/radeon_device.c
> index 742af82..d2e2438 100644
> --- a/drivers/gpu/drm/radeon/radeon_device.c
> +++ b/drivers/gpu/drm/radeon/radeon_device.c
> @@ -1009,6 +1009,7 @@ int radeon_device_init(struct radeon_device *rdev,
> atomic_set(&rdev->ih.lock, 0);
> mutex_init(&rdev->gem.mutex);
> mutex_init(&rdev->pm.mutex);
> + mutex_init(&rdev->gpu_clock_mutex);
> init_rwsem(&rdev->pm.mclk_lock);
> init_rwsem(&rdev->exclusive_lock);
> init_waitqueue_head(&rdev->irq.vblank_queue);
> diff --git a/drivers/gpu/drm/radeon/radeon_drv.c
> b/drivers/gpu/drm/radeon/radeon_drv.c
> index a7f8ac0..f940806 100644
> --- a/drivers/gpu/drm/radeon/radeon_drv.c
> +++ b/drivers/gpu/drm/radeon/radeon_drv.c
> @@ -60,7 +60,7 @@
> * 2.16.0 - fix evergreen 2D tiled surface calculation
> * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
> * 2.18.0 - r600-eg: allow "invalid" DB formats
> - * 2.19.0 - r600-eg: MSAA textures
> + * 2.19.0 - r600-eg: MSAA textures; r60
[PATCH 1/3] drm/radeon/kms: reorder code in r600_check_texture_resource
On Thu, Aug 9, 2012 at 10:34 AM, Marek Ol??k wrote:
> Signed-off-by: Marek Ol??k
Reviewed-by: Jerome Glisse
> ---
> drivers/gpu/drm/radeon/r600_cs.c | 52
> +++---
> 1 file changed, 26 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/r600_cs.c
> b/drivers/gpu/drm/radeon/r600_cs.c
> index 1119e31..ff61402 100644
> --- a/drivers/gpu/drm/radeon/r600_cs.c
> +++ b/drivers/gpu/drm/radeon/r600_cs.c
> @@ -1559,13 +1559,14 @@ static int r600_check_texture_resource(struct
> radeon_cs_parser *p, u32 idx,
> u32 tiling_flags)
> {
> struct r600_cs_track *track = p->track;
> - u32 nfaces, llevel, blevel, w0, h0, d0;
> - u32 word0, word1, l0_size, mipmap_size, word2, word3;
> + u32 dim, nfaces, llevel, blevel, w0, h0, d0;
> + u32 word0, word1, l0_size, mipmap_size, word2, word3, word4, word5;
> u32 height_align, pitch, pitch_align, depth_align;
> - u32 array, barray, larray;
> + u32 barray, larray;
> u64 base_align;
> struct array_mode_checker array_check;
> u32 format;
> + bool is_array;
>
> /* on legacy kernel we don't perform advanced check */
> if (p->rdev == NULL)
> @@ -1583,12 +1584,28 @@ static int r600_check_texture_resource(struct
> radeon_cs_parser *p, u32 idx,
> word0 |=
> S_038000_TILE_MODE(V_038000_ARRAY_1D_TILED_THIN1);
> }
> word1 = radeon_get_ib_value(p, idx + 1);
> + word2 = radeon_get_ib_value(p, idx + 2) << 8;
> + word3 = radeon_get_ib_value(p, idx + 3) << 8;
> + word4 = radeon_get_ib_value(p, idx + 4);
> + word5 = radeon_get_ib_value(p, idx + 5);
> + dim = G_038000_DIM(word0);
> w0 = G_038000_TEX_WIDTH(word0) + 1;
> + pitch = (G_038000_PITCH(word0) + 1) * 8;
> h0 = G_038004_TEX_HEIGHT(word1) + 1;
> d0 = G_038004_TEX_DEPTH(word1);
> + format = G_038004_DATA_FORMAT(word1);
> + blevel = G_038010_BASE_LEVEL(word4);
> + llevel = G_038014_LAST_LEVEL(word5);
> + /* pitch in texels */
> + array_check.array_mode = G_038000_TILE_MODE(word0);
> + array_check.group_size = track->group_size;
> + array_check.nbanks = track->nbanks;
> + array_check.npipes = track->npipes;
> + array_check.nsamples = 1;
> + array_check.blocksize = r600_fmt_get_blocksize(format);
> nfaces = 1;
> - array = 0;
> - switch (G_038000_DIM(word0)) {
> + is_array = false;
> + switch (dim) {
> case V_038000_SQ_TEX_DIM_1D:
> case V_038000_SQ_TEX_DIM_2D:
> case V_038000_SQ_TEX_DIM_3D:
> @@ -1601,7 +1618,7 @@ static int r600_check_texture_resource(struct
> radeon_cs_parser *p, u32 idx,
> break;
> case V_038000_SQ_TEX_DIM_1D_ARRAY:
> case V_038000_SQ_TEX_DIM_2D_ARRAY:
> - array = 1;
> + is_array = true;
> break;
> case V_038000_SQ_TEX_DIM_2D_MSAA:
> case V_038000_SQ_TEX_DIM_2D_ARRAY_MSAA:
> @@ -1609,21 +1626,12 @@ static int r600_check_texture_resource(struct
> radeon_cs_parser *p, u32 idx,
> dev_warn(p->dev, "this kernel doesn't support %d texture
> dim\n", G_038000_DIM(word0));
> return -EINVAL;
> }
> - format = G_038004_DATA_FORMAT(word1);
> if (!r600_fmt_is_valid_texture(format, p->family)) {
> dev_warn(p->dev, "%s:%d texture invalid format %d\n",
> __func__, __LINE__, format);
> return -EINVAL;
> }
>
> - /* pitch in texels */
> - pitch = (G_038000_PITCH(word0) + 1) * 8;
> - array_check.array_mode = G_038000_TILE_MODE(word0);
> - array_check.group_size = track->group_size;
> - array_check.nbanks = track->nbanks;
> - array_check.npipes = track->npipes;
> - array_check.nsamples = 1;
> - array_check.blocksize = r600_fmt_get_blocksize(format);
> if (r600_get_array_mode_alignment(&array_check,
> &pitch_align, &height_align,
> &depth_align, &base_align)) {
> dev_warn(p->dev, "%s:%d tex array mode (%d) invalid\n",
> @@ -1649,20 +1657,13 @@ static int r600_check_texture_resource(struct
> radeon_cs_parser *p, u32 idx,
> return -EINVAL;
> }
>
> - word2 = radeon_get_ib_value(p, idx + 2) << 8;
> - word3 = radeon_get_ib_value(p, idx + 3) << 8;
> -
> - word0 = radeon_get_ib_value(p, idx + 4);
> - word1 = radeon_get_ib_value(p, idx + 5);
> - blevel = G_038010_BASE_LEVEL(word0);
> - llevel = G_038014_LAST_LEVEL(word1);
> if (blevel > llevel) {
> dev_warn(p->dev, "texture blevel %d > llevel %d\n",
> blevel, llevel);
> }
> - if (array == 1) {
> - barray = G_038014_BASE_ARRAY(word1
[PATCH 2/3] drm/radeon/kms: add MSAA texture support for r600-evergreen
On Thu, Aug 9, 2012 at 10:34 AM, Marek Ol??k wrote: > Most of the checking seems to be in place already. As you can see, > log2(number of samples) resides in LAST_LEVEL. Yeah i tried to make it easy but i might have get few thing wrong, i do hope not. > This is required for MSAA support (namely for depth-stencil resolve and > blitting between MSAA resources). > > Signed-off-by: Marek Ol??k Reviewed-by: Jerome Glisse > --- > drivers/gpu/drm/radeon/evergreen_cs.c |7 +++ > drivers/gpu/drm/radeon/r600_cs.c |7 ++- > drivers/gpu/drm/radeon/radeon_drv.c |3 ++- > 3 files changed, 15 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c > b/drivers/gpu/drm/radeon/evergreen_cs.c > index f2e5c54..e44a62a 100644 > --- a/drivers/gpu/drm/radeon/evergreen_cs.c > +++ b/drivers/gpu/drm/radeon/evergreen_cs.c > @@ -788,6 +788,13 @@ static int evergreen_cs_track_validate_texture(struct > radeon_cs_parser *p, > case V_03_SQ_TEX_DIM_1D_ARRAY: > case V_03_SQ_TEX_DIM_2D_ARRAY: > depth = 1; > + break; > + case V_03_SQ_TEX_DIM_2D_MSAA: > + case V_03_SQ_TEX_DIM_2D_ARRAY_MSAA: > + surf.nsamples = 1 << llevel; > + llevel = 0; > + depth = 1; > + break; > case V_03_SQ_TEX_DIM_3D: > break; > default: > diff --git a/drivers/gpu/drm/radeon/r600_cs.c > b/drivers/gpu/drm/radeon/r600_cs.c > index ff61402..3dab49c 100644 > --- a/drivers/gpu/drm/radeon/r600_cs.c > +++ b/drivers/gpu/drm/radeon/r600_cs.c > @@ -1620,8 +1620,13 @@ static int r600_check_texture_resource(struct > radeon_cs_parser *p, u32 idx, > case V_038000_SQ_TEX_DIM_2D_ARRAY: > is_array = true; > break; > - case V_038000_SQ_TEX_DIM_2D_MSAA: > case V_038000_SQ_TEX_DIM_2D_ARRAY_MSAA: > + is_array = true; > + /* fall through */ > + case V_038000_SQ_TEX_DIM_2D_MSAA: > + array_check.nsamples = 1 << llevel; > + llevel = 0; > + break; > default: > dev_warn(p->dev, "this kernel doesn't support %d texture > dim\n", G_038000_DIM(word0)); > return -EINVAL; > diff --git a/drivers/gpu/drm/radeon/radeon_drv.c > b/drivers/gpu/drm/radeon/radeon_drv.c > index 4b736ec..a7f8ac0 100644 > --- a/drivers/gpu/drm/radeon/radeon_drv.c > +++ b/drivers/gpu/drm/radeon/radeon_drv.c > @@ -60,9 +60,10 @@ > * 2.16.0 - fix evergreen 2D tiled surface calculation > * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx > * 2.18.0 - r600-eg: allow "invalid" DB formats > + * 2.19.0 - r600-eg: MSAA textures > */ > #define KMS_DRIVER_MAJOR 2 > -#define KMS_DRIVER_MINOR 18 > +#define KMS_DRIVER_MINOR 19 > #define KMS_DRIVER_PATCHLEVEL 0 > int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); > int radeon_driver_unload_kms(struct drm_device *dev); > -- > 1.7.9.5 > > ___ > dri-devel mailing list > dri-devel at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 1/2] radeon: force 2D tiling for MSAA surfaces
On Thu, Aug 9, 2012 at 10:37 AM, Marek Ol??k wrote:
Reviewed-by: Jerome Glisse
> ---
> radeon/radeon_surface.c | 24 ++--
> 1 file changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c
> index 874a092..499e994 100644
> --- a/radeon/radeon_surface.c
> +++ b/radeon/radeon_surface.c
> @@ -154,7 +154,7 @@ static void surf_minify(struct radeon_surface *surf,
> surf->level[level].nblk_x = (surf->level[level].npix_x + surf->blk_w -
> 1) / surf->blk_w;
> surf->level[level].nblk_y = (surf->level[level].npix_y + surf->blk_h -
> 1) / surf->blk_h;
> surf->level[level].nblk_z = (surf->level[level].npix_z + surf->blk_d -
> 1) / surf->blk_d;
> -if (surf->level[level].mode == RADEON_SURF_MODE_2D) {
> +if (surf->nsamples == 1 && surf->level[level].mode ==
> RADEON_SURF_MODE_2D) {
> if (surf->level[level].nblk_x < xalign || surf->level[level].nblk_y
> < yalign) {
> surf->level[level].mode = RADEON_SURF_MODE_1D;
> return;
> @@ -382,6 +382,12 @@ static int r6_surface_init(struct radeon_surface_manager
> *surf_man,
> unsigned mode;
> int r;
>
> +/* MSAA surfaces support the 2D mode only. */
> +if (surf->nsamples > 1) {
> +surf->flags = RADEON_SURF_CLR(surf->flags, MODE);
> +surf->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE);
> +}
> +
> /* tiling mode */
> mode = (surf->flags >> RADEON_SURF_MODE_SHIFT) & RADEON_SURF_MODE_MASK;
>
> @@ -401,6 +407,10 @@ static int r6_surface_init(struct radeon_surface_manager
> *surf_man,
>
> /* force 1d on kernel that can't do 2d */
> if (!surf_man->hw_info.allow_2d && mode > RADEON_SURF_MODE_1D) {
> +if (surf->nsamples > 1) {
> +fprintf(stderr, "radeon: Cannot use 2D tiling for an MSAA
> surface (%i).\n", __LINE__);
> +return -EFAULT;
> +}
> mode = RADEON_SURF_MODE_1D;
> surf->flags = RADEON_SURF_CLR(surf->flags, MODE);
> surf->flags |= RADEON_SURF_SET(mode, MODE);
> @@ -548,7 +558,7 @@ static void eg_surf_minify(struct radeon_surface *surf,
> surf->level[level].nblk_x = (surf->level[level].npix_x + surf->blk_w -
> 1) / surf->blk_w;
> surf->level[level].nblk_y = (surf->level[level].npix_y + surf->blk_h -
> 1) / surf->blk_h;
> surf->level[level].nblk_z = (surf->level[level].npix_z + surf->blk_d -
> 1) / surf->blk_d;
> -if (surf->level[level].mode == RADEON_SURF_MODE_2D) {
> +if (surf->nsamples == 1 && surf->level[level].mode ==
> RADEON_SURF_MODE_2D) {
> if (surf->level[level].nblk_x < mtilew || surf->level[level].nblk_y
> < mtileh) {
> surf->level[level].mode = RADEON_SURF_MODE_1D;
> return;
> @@ -687,6 +697,10 @@ static int eg_surface_sanity(struct
> radeon_surface_manager *surf_man,
>
> /* force 1d on kernel that can't do 2d */
> if (!surf_man->hw_info.allow_2d && mode > RADEON_SURF_MODE_1D) {
> +if (surf->nsamples > 1) {
> +fprintf(stderr, "radeon: Cannot use 2D tiling for an MSAA
> surface (%i).\n", __LINE__);
> +return -EFAULT;
> +}
> mode = RADEON_SURF_MODE_1D;
> surf->flags = RADEON_SURF_CLR(surf->flags, MODE);
> surf->flags |= RADEON_SURF_SET(mode, MODE);
> @@ -754,6 +768,12 @@ static int eg_surface_init(struct radeon_surface_manager
> *surf_man,
> unsigned mode;
> int r;
>
> +/* MSAA surfaces support the 2D mode only. */
> +if (surf->nsamples > 1) {
> +surf->flags = RADEON_SURF_CLR(surf->flags, MODE);
> +surf->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE);
> +}
> +
> /* tiling mode */
> mode = (surf->flags >> RADEON_SURF_MODE_SHIFT) & RADEON_SURF_MODE_MASK;
>
> --
> 1.7.9.5
>
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[PATCH 2/2] radeon: tweak TILE_SPLIT for MSAA surfaces
Reviewed-by: Jerome Glisse
On Thu, Aug 9, 2012 at 10:38 AM, Marek Ol??k wrote:
> ---
> radeon/radeon_surface.c | 37 +++--
> 1 file changed, 31 insertions(+), 6 deletions(-)
>
> diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c
> index 499e994..892dca6 100644
> --- a/radeon/radeon_surface.c
> +++ b/radeon/radeon_surface.c
> @@ -871,12 +871,37 @@ static int eg_surface_best(struct
> radeon_surface_manager *surf_man,
> return 0;
> }
>
> -/* set tile split to row size, optimize latter for multi-sample surface
> - * tile split >= 256 for render buffer surface. Also depth surface want
> - * smaller value for optimal performances.
> - */
> -surf->tile_split = surf_man->hw_info.row_size;
> -surf->stencil_tile_split = surf_man->hw_info.row_size / 2;
> +/* Tweak TILE_SPLIT for performance here. */
> +if (surf->nsamples > 1) {
> +if (surf->flags & (RADEON_SURF_ZBUFFER | RADEON_SURF_SBUFFER)) {
> +switch (surf->nsamples) {
> +case 2:
> +surf->tile_split = 128;
> +break;
> +case 4:
> +surf->tile_split = 128;
> +break;
> +case 8:
> +surf->tile_split = 256;
> +break;
> +case 16: /* cayman only */
> +surf->tile_split = 512;
> +break;
> +default:
> +fprintf(stderr, "radeon: Wrong number of samples %i (%i)\n",
> +surf->nsamples, __LINE__);
> +return -EINVAL;
> +}
> +surf->stencil_tile_split = 64;
> +} else {
> +/* tile split must be >= 256 for colorbuffer surfaces */
> +surf->tile_split = MAX2(surf->nsamples * surf->bpe * 64, 256);
> +}
> +} else {
> +/* set tile split to row size */
> +surf->tile_split = surf_man->hw_info.row_size;
> +surf->stencil_tile_split = surf_man->hw_info.row_size / 2;
> +}
>
> /* bankw or bankh greater than 1 increase alignment requirement, not
> * sure if it's worth using smaller bankw & bankh to stick with 2D
> --
> 1.7.9.5
>
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[Bug 37490] texture corruption in r600/r600g when using DRI2, no texture corruption in r600 with dri1
https://bugs.freedesktop.org/show_bug.cgi?id=37490 --- Comment #16 from Andreas Boll 2012-08-09 15:03:34 UTC --- (In reply to comment #15) > (In reply to comment #14) > > (In reply to comment #13) > > > i don't know, and my concern is mostly with the non-gallium driver right > > > now. > > > > > > i can test the gallium driver, but i need the normal driver to work as i > > > have > > > 32-bit applications i am running in a debian chroot. thusly, i do not > > > really > > > use the gallium driver yet... i only tested it to see if it did the same > > > thing, > > > which it does. > > > > > > the result is not the same everytime you trigger that kwin effect though; > > > sometimes i get part of a console framebuffer (e.g. radeondrmfb). > > > > > > so would it make more sense for me to test non-gallium driver first? > > > > No one is really working on the non gallium driver any more, so it's not > > likely > > to get much more attention. > > well, i will try and see if r600g git master solves the problem. > unfortunately, i think this means i'm screwed when it comes to running > proprietary apps in chroots. hi William, did you have any chance to test r600g git master in the mean time? -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[Bug 48455] Enabling R600_STREAMOUT causes graphical corruption
https://bugs.freedesktop.org/show_bug.cgi?id=48455 Andreas Boll changed: What|Removed |Added Component|Drivers/DRI/R600|Drivers/Gallium/r600 --- Comment #1 from Andreas Boll 2012-08-09 15:21:05 UTC --- You need kernel 3.5 and mesa from git. There were streamout fixes in both kernel and mesa especially for r700. Additionally you don't need to set R600_GLSL130=1 and R600_STREAMOUT=1 anymore, both have been enabled by default in mesa master. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[Bug 45018] [bisected] rendering regression and va conflicts since added support for virtual address space on cayman v11
https://bugs.freedesktop.org/show_bug.cgi?id=45018 --- Comment #116 from Alexandre Demers 2012-08-09 15:24:41 UTC --- (In reply to comment #113) > (In reply to comment #112) > > (In reply to comment #111) > > > (In reply to comment #110) > > > > I just pushed a minor bugfix to mesa master, that in conjunction with > > > > Jeromes > > > > kernel patch should eliminate the last VA issues. > > > > > > > > Please retest it again. > > > > > > > > Christian. > > > > > > You must be refering to commit 8c44e5a144009a03c20befa6468d19d41c802795. > > > Do I > > > still need to apply your previous patch also (attachment 65093 [details] > > > [review] [review] [review])? I'll try it > > > tonight, but it may take a bit more complicated to reproduce, I'll have > > > to play > > > for a while until it does or doesn't trigger the last reported vm error. > > > > Well, I tested it with your previous patch on top of > > 68bccc40f55aee7f4af8eb64b15a95f0b49d6a17 and it was not working properly. > > First, I had to modify your patch to apply on top of latest git. After > > applying > > it, compiling and installing, I rebooted and I was unable to load the > > logging > > screen. I removed the patch, rebuilt a clean mesa from > > 68bccc40f55aee7f4af8eb64b15a95f0b49d6a17, installed and relaunched Xorg > > and... > > I was able to log in. So I'm now testing latest mesa > > (68bccc40f55aee7f4af8eb64b15a95f0b49d6a17) with kernel 3.6-rc1 + Jerome's > > patch. I should be able to tell you soon if it works. Meanwhile, if I should > > have applied something different, let me know. > > > > To Jerome: I could test your [PATCH] drm/radeon: delay virtual address > > destruction to bo destruction. But first, I want to make sure Christian's > > patch > > does what it should do. > > Bug still there with latest mesa git (without your previous patch as explained > previously). > Aug 9 01:03:29 Xander kernel: [13308.165749] radeon :01:00.0: offset > 0x40 is in reserved area 0x80 > Aug 9 01:03:29 Xander kernel: [13308.232245] radeon :01:00.0: bo > 880223646400 va 0x02B0 conflict with (bo 8801e3edc400 > > Locked and reset without any notice. Two things I've noticed: 1- the error points directly at "offset 0x40 is in reserved area 0x80" since I applied Christian's and Jerome's patches, which is a different error from errors before patches. 2- the error only happens after a while, when switching between windows (under Gnome 3 in that case). I had to alt+tab and show my whole desktop (top left corner) many times before it happened. I played with my desktop all night long. So, it's like if the pointer keeps increasing until it reaches its limit. Either we are not releasing correctly previous addresses (or we are forgetting some on the way)or we are unaware of every released addresses, in both cases pushing us forward until we hit a wall. And if someone could explain me what this message/addresses means, I'd appreciate it. How is it possible that an offset of 0x40 ends up in a reserved area allocated at 0x80? We must not be offsetting from 0 obviously. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[PATCH] drm/edid: limit printk when facing bad edid
From: Jerome Glisse
Limit printing bad edid information at one time per connector.
Connector that are connected to a bad monitor/kvm will likely
stay connected to the same bad monitor/kvm and it makes no
sense to keep printing the bad edid message.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/drm_edid.c | 22 ++
drivers/gpu/drm/drm_edid_load.c | 6 --
include/drm/drm_crtc.h | 3 ++-
3 files changed, 20 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index a8743c3..7380ee3 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -158,7 +158,7 @@ MODULE_PARM_DESC(edid_fixup,
* Sanity check the EDID block (base or extension). Return 0 if the block
* doesn't check out, or 1 if it's valid.
*/
-bool drm_edid_block_valid(u8 *raw_edid, int block)
+bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
{
int i;
u8 csum = 0;
@@ -181,7 +181,9 @@ bool drm_edid_block_valid(u8 *raw_edid, int block)
for (i = 0; i < EDID_LENGTH; i++)
csum += raw_edid[i];
if (csum) {
- DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
+ if (print_bad_edid) {
+ DRM_ERROR("EDID checksum is invalid, remainder is
%d\n", csum);
+ }
/* allow CEA to slide through, switches mangle this */
if (raw_edid[0] != 0x02)
@@ -207,7 +209,7 @@ bool drm_edid_block_valid(u8 *raw_edid, int block)
return 1;
bad:
- if (raw_edid) {
+ if (raw_edid && print_bad_edid) {
printk(KERN_ERR "Raw EDID:\n");
print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
raw_edid, EDID_LENGTH, false);
@@ -231,7 +233,7 @@ bool drm_edid_is_valid(struct edid *edid)
return false;
for (i = 0; i <= edid->extensions; i++)
- if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i))
+ if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
return false;
return true;
@@ -303,6 +305,7 @@ drm_do_get_edid(struct drm_connector *connector, struct
i2c_adapter *adapter)
{
int i, j = 0, valid_extensions = 0;
u8 *block, *new;
+ bool print_bad_edid = !connector->bad_edid_counter || (drm_debug &
DRM_UT_KMS);
if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
return NULL;
@@ -311,7 +314,7 @@ drm_do_get_edid(struct drm_connector *connector, struct
i2c_adapter *adapter)
for (i = 0; i < 4; i++) {
if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
goto out;
- if (drm_edid_block_valid(block, 0))
+ if (drm_edid_block_valid(block, 0, print_bad_edid))
break;
if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
connector->null_edid_counter++;
@@ -336,7 +339,7 @@ drm_do_get_edid(struct drm_connector *connector, struct
i2c_adapter *adapter)
block + (valid_extensions + 1) * EDID_LENGTH,
j, EDID_LENGTH))
goto out;
- if (drm_edid_block_valid(block + (valid_extensions + 1)
* EDID_LENGTH, j)) {
+ if (drm_edid_block_valid(block + (valid_extensions + 1)
* EDID_LENGTH, j, print_bad_edid)) {
valid_extensions++;
break;
}
@@ -359,8 +362,11 @@ drm_do_get_edid(struct drm_connector *connector, struct
i2c_adapter *adapter)
return block;
carp:
- dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
-drm_get_connector_name(connector), j);
+ if (print_bad_edid) {
+ dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
+drm_get_connector_name(connector), j);
+ }
+ connector->bad_edid_counter++;
out:
kfree(block);
diff --git a/drivers/gpu/drm/drm_edid_load.c b/drivers/gpu/drm/drm_edid_load.c
index 66d4a28..14f46dd 100644
--- a/drivers/gpu/drm/drm_edid_load.c
+++ b/drivers/gpu/drm/drm_edid_load.c
@@ -123,6 +123,7 @@ static int edid_load(struct drm_connector *connector, char
*name,
int fwsize, expected;
int builtin = 0, err = 0;
int i, valid_extensions = 0;
+ bool print_bad_edid = !connector->bad_edid_counter || (drm_debug &
DRM_UT_KMS);
pdev = platform_device_register_simple(connector_name, -1, NULL, 0);
if (IS_ERR(pdev)) {
@@ -173,7 +174,8 @@ static int edid_load(struct drm_connector *connector, char
*name,
}
memcpy(edid, fwdata, fwsize);
- if (!drm_edid_block_valid(edid, 0)) {
+ if (!drm_edid_block_valid(edid, 0, print_bad_edid)) {
+
[PATCH 1/2] radeon: force 2D tiling for MSAA surfaces
Dear Marek, Am Donnerstag, den 09.08.2012, 16:37 +0200 schrieb Marek Ol??k: > --- > radeon/radeon_surface.c | 24 ++-- > 1 file changed, 22 insertions(+), 2 deletions(-) [?] do you have some numbers indicating an improvement with this change? On what hardware did you test? Thanks, Paul -- next part -- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 198 bytes Desc: This is a digitally signed message part URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20120809/7d84584e/attachment.pgp>
[Bug 16541] Imac Radeon HD 4850 switch "Mini Display Port" output with ALL kernels after 2.6.31
https://bugzilla.kernel.org/show_bug.cgi?id=16541 Alan changed: What|Removed |Added Status|NEW |RESOLVED CC||alan at lxorguk.ukuu.org.uk Resolution||OBSOLETE -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug.
[PATCH 3/3] drm/radeon/kms: implement timestamp userspace query
struct radeon_device *rdev)
>> rdev->bios = NULL;
>> }
>>
>> +uint64_t si_get_gpu_clock(struct radeon_device *rdev)
>> +{
>> + uint64_t clock;
>> +
>> + mutex_lock(&rdev->gpu_clock_mutex);
>> + WREG32(RLC_CAPTURE_GPU_CLOCK_COUNT, 1);
>> + clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) |
>> + ((uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_MSB) << 32);
>> + mutex_unlock(&rdev->gpu_clock_mutex);
>> + return clock;
>> +}
>> diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h
>> index 7869089..ef4815c 100644
>> --- a/drivers/gpu/drm/radeon/sid.h
>> +++ b/drivers/gpu/drm/radeon/sid.h
>> @@ -698,6 +698,9 @@
>> #define RLC_UCODE_ADDR0xC32C
>> #define RLC_UCODE_DATA0xC330
>>
>> +#define RLC_GPU_CLOCK_COUNT_LSB 0xC338
>> +#define RLC_GPU_CLOCK_COUNT_MSB 0xC33C
>> +#define RLC_CAPTURE_GPU_CLOCK_COUNT 0xC340
>> #define RLC_MC_CNTL 0xC344
>> #define RLC_UCODE_CNTL0xC348
>>
>> diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h
>> index 5805686..dc3a8cd 100644
>> --- a/include/drm/radeon_drm.h
>> +++ b/include/drm/radeon_drm.h
>> @@ -964,6 +964,8 @@ struct drm_radeon_cs {
>> #define RADEON_INFO_IB_VM_MAX_SIZE 0x0f
>> /* max pipes - needed for compute shaders */
>> #define RADEON_INFO_MAX_PIPES 0x10
>> +/* timestamp for GL_ARB_timer_query (OpenGL), returns the current GPU clock
>> */
>> +#define RADEON_INFO_TIMESTAMP 0x11
>>
>> struct drm_radeon_info {
>> uint32_trequest;
>> --
>> 1.7.9.5
>>
>> ___
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[PATCH 3/3] drm/radeon/kms: implement timestamp userspace query
On Thu, Aug 9, 2012 at 11:44 AM, Alex Deucher wrote:
> On Thu, Aug 9, 2012 at 10:57 AM, Jerome Glisse wrote:
>> On Thu, Aug 9, 2012 at 10:34 AM, Marek Ol??k wrote:
>>> Signed-off-by: Marek Ol??k
>>
>> Some comment inline that need a v2 at least for version otherwise
>
> How about the attached updated patch? I'd like to get this series in
> the radeon drm-fixes pull.
>
> Alex
Looks good to me
>>
>> Reviewed-by: Jerome Glisse
>>
>>> ---
>>> drivers/gpu/drm/radeon/r600.c | 12 +++
>>> drivers/gpu/drm/radeon/r600d.h |3 +++
>>> drivers/gpu/drm/radeon/radeon.h|1 +
>>> drivers/gpu/drm/radeon/radeon_asic.h |2 ++
>>> drivers/gpu/drm/radeon/radeon_device.c |1 +
>>> drivers/gpu/drm/radeon/radeon_drv.c|2 +-
>>> drivers/gpu/drm/radeon/radeon_kms.c| 35
>>> ++--
>>> drivers/gpu/drm/radeon/si.c| 11 ++
>>> drivers/gpu/drm/radeon/sid.h |3 +++
>>> include/drm/radeon_drm.h |2 ++
>>> 10 files changed, 65 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
>>> index 637280f..be0e320 100644
>>> --- a/drivers/gpu/drm/radeon/r600.c
>>> +++ b/drivers/gpu/drm/radeon/r600.c
>>> @@ -3789,3 +3789,15 @@ static void r600_pcie_gen2_enable(struct
>>> radeon_device *rdev)
>>> WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
>>> }
>>> }
>>> +
>>> +uint64_t r600_get_gpu_clock(struct radeon_device *rdev)
>>> +{
>>> + uint64_t clock;
>>> +
>>> + mutex_lock(&rdev->gpu_clock_mutex);
>>> + WREG32(RLC_CAPTURE_GPU_CLOCK_COUNT, 1);
>>> + clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) |
>>> + ((uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_MSB) << 32);
>>
>> I keep forgeting about c type rules but i think you want 32ULL
>>
>>> + mutex_unlock(&rdev->gpu_clock_mutex);
>>> + return clock;
>>> +}
>>> diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
>>> index 4b116ae..fd328f4 100644
>>> --- a/drivers/gpu/drm/radeon/r600d.h
>>> +++ b/drivers/gpu/drm/radeon/r600d.h
>>> @@ -602,6 +602,9 @@
>>> #define RLC_HB_WPTR 0x3f1c
>>> #define RLC_HB_WPTR_LSB_ADDR 0x3f14
>>> #define RLC_HB_WPTR_MSB_ADDR 0x3f18
>>> +#define RLC_GPU_CLOCK_COUNT_LSB 0x3f38
>>> +#define RLC_GPU_CLOCK_COUNT_MSB 0x3f3c
>>> +#define RLC_CAPTURE_GPU_CLOCK_COUNT 0x3f40
>>> #define RLC_MC_CNTL 0x3f44
>>> #define RLC_UCODE_CNTL0x3f48
>>> #define RLC_UCODE_ADDR0x3f2c
>>> diff --git a/drivers/gpu/drm/radeon/radeon.h
>>> b/drivers/gpu/drm/radeon/radeon.h
>>> index 5431af2..150097f 100644
>>> --- a/drivers/gpu/drm/radeon/radeon.h
>>> +++ b/drivers/gpu/drm/radeon/radeon.h
>>> @@ -1533,6 +1533,7 @@ struct radeon_device {
>>> unsigneddebugfs_count;
>>> /* virtual memory */
>>> struct radeon_vm_managervm_manager;
>>> + struct mutexgpu_clock_mutex;
>>> };
>>>
>>> int radeon_device_init(struct radeon_device *rdev,
>>> diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
>>> b/drivers/gpu/drm/radeon/radeon_asic.h
>>> index f4af243..cbba387 100644
>>> --- a/drivers/gpu/drm/radeon/radeon_asic.h
>>> +++ b/drivers/gpu/drm/radeon/radeon_asic.h
>>> @@ -371,6 +371,7 @@ void r600_kms_blit_copy(struct radeon_device *rdev,
>>> unsigned num_gpu_pages,
>>> struct radeon_sa_bo *vb);
>>> int r600_mc_wait_for_idle(struct radeon_device *rdev);
>>> +uint64_t r600_get_gpu_clock(struct radeon_device *rdev);
>>>
>>> /*
>>> * rv770,rv730,rv710,rv740
>>> @@ -472,5 +473,6 @@ int si_vm_bind(struct radeon_device *rdev, struct
>>> radeon_vm *vm, int id);
>>> void si_vm_unbind(struct radeon_device *rdev, struct radeon_vm *vm);
>>> void si_vm_tlb_flush(struct radeon_device *rdev, struct radeon_vm *vm);
>>> int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib);
>>> +uint64_t si_get_gpu_clock(struct radeon_device *rdev);
>>>
>>> #endif
>>> diff --git a/drivers/gpu/drm/radeon/radeon_device.c
>>> b/drivers/gpu/drm/radeon/radeon_device.c
>>> index 742af82..d2e2438 100644
>>> --- a/drivers/gpu/drm/radeon/radeon_device.c
>>> +++ b/drivers/gpu/drm/radeon/radeon_device.c
>>> @@ -1009,6 +1009,7 @@ int radeon_device_init(struct radeon_device *rdev,
>>> atomic_set(&rdev->ih.lock, 0);
>>> mutex_init(&rdev->gem.mutex);
>>> mutex_init(&rdev->pm.mutex);
>>> + mutex_init(&rdev->gpu_clock_mutex);
>>> init_rwsem(&rdev->pm.mclk_lock);
>>> init_rwsem(&rdev->exclusive_lock);
>>> init_waitqueue_head(&rdev->irq.vblank_queue);
>>> diff --git a/d
[PATCH v2 1/2] dma-buf: add reference counting for exporter module
On Thu, Aug 09, 2012 at 11:36:21AM +0200, Tomasz Stanislawski wrote: > This patch adds reference counting on a module that exported dma-buf and > implements its operations. This prevents the module from being unloaded while > DMABUF file is in use. Why force all of the modules to be changed "by hand", and not just do this automatically by changing the register function to include the THIS_MODULE macro in it? Much like the pci_register_driver() function is implemented in include/linux/pci.h? That makes it impossible for driver authors to get it wrong, which is always a good sign of a correct api. thanks, greg k-h
[PATCH 1/1] omap: include omap_drm.h independently
omap_drm.h uses data type defined in stdint.h, but that header was not included. omap_drm.h includes drm.h as a local file when it is part of the compiler c flags. This two issues are fixed. New code can include omap_drm.h alone. Signed-off-by: V?ctor Manuel J?quez Leal --- omap/omap_drm.h |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/omap/omap_drm.h b/omap/omap_drm.h index f677cd8..9c6c0e4 100644 --- a/omap/omap_drm.h +++ b/omap/omap_drm.h @@ -29,7 +29,8 @@ #ifndef __OMAP_DRM_H__ #define __OMAP_DRM_H__ -#include "drm.h" +#include +#include /* Please note that modifications to all structs defined here are * subject to backwards-compatibility constraints. -- 1.7.10.4
[PATCH 1/2] radeon: force 2D tiling for MSAA surfaces
On Thu, Aug 9, 2012 at 5:41 PM, Paul Menzel wrote: > Dear Marek, > > > Am Donnerstag, den 09.08.2012, 16:37 +0200 schrieb Marek Ol??k: >> --- >> radeon/radeon_surface.c | 24 ++-- >> 1 file changed, 22 insertions(+), 2 deletions(-) > > [?] > > do you have some numbers indicating an improvement with this change? On > what hardware did you test? I wasn't measuring performance. This patch is actually a fix, because AFAIK 2D tiling is the only mode available for MSAA surfaces. The other tiling modes hang my GPU. Marek
[PATCH] staging: omapdrm: Fix DMM sparse warnings
On Thu, Aug 9, 2012 at 12:14 AM, Andy Gross wrote:
> Fix the following sparse warnings:
>
> drivers/staging/omapdrm/omap_dmm_tiler.c:123:13:
>warning: symbol 'omap_dmm_irq_handler' was not declared.
>Should it be static?
>
> drivers/staging/omapdrm/omap_dmm_tiler.c:370:24:
>warning: Using plain integer as NULL pointer
>
> Signed-off-by: Andy Gross
Signed-off-by: Rob Clark
> ---
> drivers/staging/omapdrm/omap_dmm_tiler.c |4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/staging/omapdrm/omap_dmm_tiler.c
> b/drivers/staging/omapdrm/omap_dmm_tiler.c
> index 8619783..ec7a5c8 100644
> --- a/drivers/staging/omapdrm/omap_dmm_tiler.c
> +++ b/drivers/staging/omapdrm/omap_dmm_tiler.c
> @@ -120,7 +120,7 @@ static int wait_status(struct refill_engine *engine,
> uint32_t wait_mask)
> return 0;
> }
>
> -irqreturn_t omap_dmm_irq_handler(int irq, void *arg)
> +static irqreturn_t omap_dmm_irq_handler(int irq, void *arg)
> {
> struct dmm *dmm = arg;
> uint32_t status = readl(dmm->base + DMM_PAT_IRQSTATUS);
> @@ -367,7 +367,7 @@ struct tiler_block *tiler_reserve_1d(size_t size)
> int num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
>
> if (!block)
> - return 0;
> + return ERR_PTR(-ENOMEM);
>
> block->fmt = TILFMT_PAGE;
>
> --
> 1.7.5.4
>
> --
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> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] radeon: force 2D tiling for MSAA surfaces
On Thu, Aug 9, 2012 at 12:14 PM, Marek Ol??k wrote: > On Thu, Aug 9, 2012 at 5:41 PM, Paul Menzel > wrote: >> Dear Marek, >> >> >> Am Donnerstag, den 09.08.2012, 16:37 +0200 schrieb Marek Ol??k: >>> --- >>> radeon/radeon_surface.c | 24 ++-- >>> 1 file changed, 22 insertions(+), 2 deletions(-) >> >> [?] >> >> do you have some numbers indicating an improvement with this change? On >> what hardware did you test? > > I wasn't measuring performance. This patch is actually a fix, because > AFAIK 2D tiling is the only mode available for MSAA surfaces. The > other tiling modes hang my GPU. AA surfaces can't use linear or 1D tiling modes. They have to be 2D. Resolve targets can use other tiling modes however. Alex
[Bug 40211] texture probleme in wolfenstein enemy territory rv770
https://bugs.freedesktop.org/show_bug.cgi?id=40211 Andreas Boll changed: What|Removed |Added Component|Drivers/DRI/R600|Drivers/Gallium/r600 --- Comment #7 from Andreas Boll 2012-08-09 17:17:43 UTC --- Can you test again with a newer version of mesa? In the meantime debian has mesa-8.0.4 in sid and testing. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[Bug 45018] [bisected] rendering regression and va conflicts since added support for virtual address space on cayman v11
https://bugs.freedesktop.org/show_bug.cgi?id=45018 --- Comment #117 from Alex Deucher 2012-08-09 18:50:34 UTC --- (In reply to comment #116) > > And if someone could explain me what this message/addresses means, I'd > appreciate it. How is it possible that an offset of 0x40 ends up in a > reserved area allocated at 0x80? We must not be offsetting from 0 > obviously. The first 8 MB of the client's VM space are reserved for kernel use and not available for the client to use. The client is not allowed to use an address below 0x80. If an address ends up there, the kernel flags it. That's the message you are seeing. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
