RE: [PATCH v2 4/7] app/testpmd: add insertion by index with pattern option

[Ori Kam]

> -Original Message-
> From: Alexander Kozyrev 
> Sent: Wednesday, September 25, 2024 9:05 PM
> 
> Allow to specify both the rule index and the pattern
> in the flow rule creation command line parameters.
> Both are needed for rte_flow_async_create_by_index_with_pattern().
> 
> flow queue 0 create 0 template_table 2 rule_index 5
>   pattern_template 0 actions_template 0 postpone no pattern eth / end
>   actions count / queue index 1 / end
> 
> Signed-off-by: Alexander Kozyrev 
> ---

Acked-by: Ori Kam 
Best,
Ori

RE: [PATCH v2 6/7] app/testpmd: add jump to table index action

[Ori Kam]

> -Original Message-
> From: Alexander Kozyrev 
> Sent: Wednesday, September 25, 2024 9:06 PM
> 
> Add a new command line options to create the
> RTE_FLOW_ACTION_TYPE_JUMP_TO_TABLE_INDEX action
> from the testpmd command line.
> 
> flow queue 0 create 0 template_table 0 pattern_template 0
>   actions_template 0 postpone no pattern eth / end
>   actions jump_to_table_index table 0x166f9ce00 index 5 / end
> 
> Signed-off-by: Alexander Kozyrev 
> ---

Acked-by: Ori Kam 
Best,
Ori

RE: [PATCH v2 5/7] ethdev: add jump to table index action

[Ori Kam]

> -Original Message-
> From: Alexander Kozyrev 
> Sent: Wednesday, September 25, 2024 9:06 PM
> 
> Introduce the RTE_FLOW_ACTION_TYPE_JUMP_TO_TABLE_INDEX action.
> It redirects packets to a particular index in a flow table.
> 
> Signed-off-by: Alexander Kozyrev 
> ---

Acked-by: Ori Kam 
Best,
Ori

RE: [PATCH v2 7/7] ethdev: add trace points to flow insertion by index

[Ori Kam]

> -Original Message-
> From: Alexander Kozyrev 
> Sent: Wednesday, September 25, 2024 9:06 PM
> 
> Adds trace points for rte_flow rule insertion by index functions:
> rte_flow_async_create_by_index and
> rte_flow_async_create_by_index_with_pattern.
> 
> Signed-off-by: Alexander Kozyrev 
> ---

Acked-by: Ori Kam 
Best,
Ori

RE: [PATCH v2 3/7] ethdev: add flow rule insertion by index with pattern

[Ori Kam]

> -Original Message-
> From: Alexander Kozyrev 
> Sent: Wednesday, September 25, 2024 9:05 PM
> 
> Add a new API to enqueue flow rule creation by index with pattern.
> The new template table rules insertion type,
> index-based insertion with pattern, requires a new flow rule creation
> function with both rule index and pattern provided.
> Packets will match on the provided pattern at the provided index.
> 
> Signed-off-by: Alexander Kozyrev 
> ---

Acked-by: Ori Kam 
Best,
Ori

Re:[PATCH] raw/zxdh: introduce zxdh raw device driver

[Yong Zhang]

Hi thomas,
   
I hope this message finds you well.
I initially submitted the zxdh rawdev driver on June 12th, and the final 
version was submitted on August 12th. Since then, I have not received any 
feedback from the community.
I would appreciate it if you could provide any suggestions for modifications. 
If there is no problem with the submitted driver, please merge it as soon as 
possible.
Thank you for your time and assistance.

Thanks

RE: [PATCH v2 2/7] app/testpmd: add index with pattern insertion type

[Ori Kam]

> -Original Message-
> From: Alexander Kozyrev 
> Sent: Wednesday, September 25, 2024 9:05 PM
> 
> Provide index_with_pattern command line option
> for the template table insertion type.
> 
> flow template_table 0 create table_id 2 group 13 priority 0
>   insertion_type index_with_pattern ingress rules_number 64
>   pattern_template 2 actions_template 2
> 
> Signed-off-by: Alexander Kozyrev 
> ---

Acked-by: Ori Kam 
Best,
Ori

Re: [PATCH v6 1/1] dts: add text parser for testpmd verbose output

[Juraj Linkeš]

diff --git a/dts/framework/remote_session/testpmd_shell.py 
b/dts/framework/remote_session/testpmd_shell.py



@@ -581,6 +581,506 @@ class TestPmdPortStats(TextParser):
  tx_bps: int = field(metadata=TextParser.find_int(r"Tx-bps:\s+(\d+)"))
  
  
+class PacketOffloadFlag(Flag):



+#: RX IEEE1588 L2 Ethernet PT Packet.
+RTE_MBUF_F_RX_IEEE1588_PTP = 1 << 9
+#: RX IEEE1588 L2/L4 timestamped packet.
+RTE_MBUF_F_RX_IEEE1588_TMST = 1 << 10


There are a few instances with two or three consecutive bits set 
expliticly instead with auto(). I don't know if it's better to use 
auto() or the explitic value, just wanted to point it out.




+
+#: FD id reported if FDIR match.
+RTE_MBUF_F_RX_FDIR_ID = 1 << 13
+#: Flexible bytes reported if FDIR match.
+RTE_MBUF_F_RX_FDIR_FLX = 1 << 14
+@classmethod
+def from_str(cls, flags: str) -> Self:


Now that we're doing the same thing as the other classes, I think it 
makes sense to just flat out copy-paste the from_list_string method.



+"""Makes an instance from a string containing whitespace-separated the 
flag members.
+
+Args:
+arr: A string containing ol_flag values.
+
+Returns:
+A new instance of the flag.
+"""
+flag = cls(0)
+for name in flags.split():
+if hasattr(cls, name):


This is still different from the other class. I think making these 
exactly the same would make it clear what needs to be put into the base 
class if we ever create one.



+flag |= cls[name]
+return flag



+
+class RtePTypes(Flag):
+"""Flag representing possible packet types in DPDK verbose output.
+
+Values in this class are derived from definitions in the RTE MBUF ptype 
library in DPDK located
+in lib/mbuf/rte_mbuf_ptype.h. Specifically, the names of values in this 
class should match the
+possible return options from the methods rte_get_ptype_*_name in 
rte_mbuf_ptype.c.


I think these are functions (rte_get_ptype_*_name), not methods.


+"""


You didn't update the docstring here (double backticks (for file and 
function names) and the References: section).




+@classmethod
+def from_str(cls, flags: str) -> Self:


The same comments apply here.

Re: [PATCH v2 1/1] dts: add send_packets to test suites and rework packet addressing

[Juraj Linkeš]

+if num_ip_layers > 0:
+ip_src_is_unset = "src" not in l3_to_use.fields
+ip_dst_is_unset = "dst" not in l3_to_use.fields
+else:
+ip_src_is_unset = None
+ip_dst_is_unset = None

-# The packet is routed from TG egress to TG ingress
-# update l3 addresses
-packet.payload.src = self._tg_ip_address_egress.ip.exploded
-packet.payload.dst = self._tg_ip_address_ingress.ip.exploded
-else:
-# The packet leaves TG towards SUT
   # update l2 addresses
-packet.src = self._tg_port_egress.mac_address
-packet.dst = self._sut_port_ingress.mac_address
+# If `expected` is :data:`True`, the packet enters the TG from 
SUT, otherwise the
+# packet leaves the TG towards the SUT
+if pkt_src_is_unset:
+packet.src = (
+self._sut_port_egress.mac_address
+if expected
+else self._tg_port_egress.mac_address
+)
+if pkt_dst_is_unset:
+packet.dst = (
+self._tg_port_ingress.mac_address
+if expected
+else self._sut_port_ingress.mac_address
+)

-# The packet is routed from TG egress to TG ingress
   # update l3 addresses
-packet.payload.src = self._tg_ip_address_egress.ip.exploded
-packet.payload.dst = self._tg_ip_address_ingress.ip.exploded
+# The packet is routed from TG egress to TG ingress regardless of 
whether it is
+# expected or not.


Is this true? This might've been an error in the original
implementation. If it's expected (that is, the returning packet), it
should be routed from TG ingress to TG egress, no?


I guess I'm not completely sure. It would make sense that the L3
addresses should be switched as well based on either expected or not,
but currently it isn't modified, and os_udp still works which makes me
think the addresses aren't switched by the kernel interfaces, which I
believe is the only time these addresses are actually used (since we
use sendp in scapy).



Right, I went too deep in my thinking and confused myself :-). The path 
of the packet is:

TG egress -> SUT ingress -> SUT egress -> TG ingress

That is just one way path and I mixed the other direction into my 
thinking as well. With just one path, the MAC addresses are going to 
change, but not IP addresses.

RE: [PATCH v2 1/7] ethdev: add insertion by index with pattern

[Ori Kam]

> -Original Message-
> From: Alexander Kozyrev 
> Sent: Wednesday, September 25, 2024 9:05 PM
> 
> There are two flow table rules insertion type today:
> pattern-based insertion when packets match on the pattern and
> index-based insertion when packets always hit at the index.
> We need another mode that allows to match on the pattern at
> the index: insertion by index with pattern.
> 
> Signed-off-by: Alexander Kozyrev 
> ---

Acked-by: Ori Kam 
Best,
Ori

Re: [PATCH v4 1/1] dts: Remove XML-RPC server for Scapy TG and instead use PythonShell

[Juraj Linkeš]

The subject line should start with a lowercase character and it's also 
over the character limit. This fits and basically says the same:

use PythonShell for Scapy instead of XML-RPC

Scapy TG didn't fit but I think the above still works.


diff --git a/dts/framework/remote_session/single_active_interactive_shell.py 
b/dts/framework/remote_session/single_active_interactive_shell.py



@@ -93,9 +94,13 @@ def __init__(
  timeout: float = SETTINGS.timeout,
  app_params: Params = Params(),
  name: str | None = None,
+**kwargs,
  ) -> None:
  """Create an SSH channel during initialization.
  
+Additional key-word arguments can be passed through `kwargs` if needed for fulfilling other


key-word -> keyword


+constructors in the case of multiple-inheritance.


I also didn't notice this hyphen, it shouldn't be there.

These hyphens are in a lot of places, I don't if I caught them all.


diff --git a/dts/framework/testbed_model/traffic_generator/scapy.py 
b/dts/framework/testbed_model/traffic_generator/scapy.py



@@ -6,311 +6,150 @@
  
  A traffic generator used for functional testing, implemented with

  `the Scapy library `_.
-The traffic generator uses an XML-RPC server to run Scapy on the remote TG 
node.
+The traffic generator uses an interactive shell to run Scapy on the remote TG 
node.
  
-The traffic generator uses the :mod:`xmlrpc.server` module to run an XML-RPC server

-in an interactive remote Python SSH session. The communication with the server 
is facilitated
-with a local server proxy from the :mod:`xmlrpc.client` module.
+The traffic generator extends 
:class:`framework.remote_session.python_shell.PythonShell` to
+implement the methods for handling packets by sending commands into the 
interactive shell.


Since this only mentions PythonShell, people could understand that's the 
only thing the tg extends. We should either add a qualifier such as 
additionally extends or just explicitly say it also extends the 
capturing TG (which is also useful information as it tells us which kind 
of TG it is).




+class ScapyTrafficGenerator(PythonShell, CapturingTrafficGenerator):
+"""Provides access to scapy functions on a traffic generator node.



+This class extends the base with remote execution of scapy functions. All 
methods for
+processing packets are implemented using an underlying
+:class:`framework.remote_session.python_shell.PythonShell` which imports 
the Scapy library.



+Because of the dual-inheritance, this class has both methods that wrap 
scapy commands sent into


The hyphen doesn't sound right. And maybe double would be a better term. 
I understand dual to mean two of the same and that doesn't fit for me as 
well.



+the shell and methods that run locally to fulfill traffic generation 
needs. To help make a
+clear distinction between the two, the names of the methods that wrap the 
logic of the
+underlying shell should be prepended with "shell".


I think there would be value in explicitly saying that the shell runs on 
the TG node.




+Note that the order of inheritance is important for this class. In order 
to instantiate this
+class, the abstract methods of 
:class:`~.capturing_traffic_generator.CapturingTrafficGenerator`
+must be implemented. Since some of these methods are implemented in the 
underlying interactive
+shell, according to Python's Method Resolution Order (MRO), the 
interactive shell must come
+first.


I didn't notice this before. Is this because of the close() method? Do 
we need to add any special steps to close the TG? Closing the 
interactive session should be enough, but I wanted to check with you.




+def __init__(self, tg_node: Node, config: ScapyTrafficGeneratorConfig, 
**kwargs):
+"""Extend the constructor with Scapy TG specifics.
  
-def __init__(self, *args, **kwargs):

-"""Extend the XML-RPC server initialization.
+Initializes both the traffic generator and the interactive shell used 
to handle Scapy
+functions. The interactive shell will be started on `tg_node`. The 
additional key-word
+arguments in `kwargs` are used to pass into the constructor for the 
interactive shell.
  
  Args:

-args: The positional arguments that will be passed to the 
superclass's constructor.
-kwargs: The keyword arguments that will be passed to the 
superclass's constructor.
-The `allow_none` argument will be set to :data:`True`.
+tg_node: The node where the traffic generator resides.
+config: The traffic generator's test run configuration.
+kwargs: Keyword arguments all traffic generators must support in 
order to allow for
+multiple-inheritance.


I'm not sure why all and why they must support them. We can just say the 
supported keyword arguments corresdpond to the paramete

Re: [PATCH v1] dts: add send_packets to test_suite

[Juraj Linkeš]

On 25. 9. 2024 20:36, jspew...@iol.unh.edu wrote:

From: Jeremy Spewock 

Currently the only methods provided in the test suite class for sending
packets capture the resulting received traffic after sending. There is,
in some cases, a need to send multiple packets at once while not really
needing to capture any of said received traffic. It is favorable to
avoid capturing received traffic when you don't need it since not all
traffic generators will necessarily be capturing traffic generators.
The method to fulfill this need exists in the traffic generator
already, but this patch exposes the method to test suites.

Depends-on: patch-10 ("dts: rework packet addressing")


This could be in the same series. I wanted this to be in a different 
patch, but both patches could (and should) be in the same series.




Signed-off-by: Jeremy Spewock 
---


The Depends-on: tag should be here, below the three hyphens. [0]

[0] https://doc.dpdk.org/guides/contributing/patches.html#patch-dependencies

Other than that,
Reviewed-by: Juraj Linkeš 

RE: [EXTERNAL] Re: [PATCH v2 1/3] eventdev: introduce event pre-scheduling

[Pavan Nikhilesh Bhagavatula]

> > -Original Message-
> > From: Pavan Nikhilesh Bhagavatula 
> > Sent: Wednesday, September 25, 2024 6:30 AM
> > To: Mattias Rönnblom ; Pathak, Pravin
> > ; Jerin Jacob ; Shijith
> Thotton
> > ; Sevincer, Abdullah
> ;
> > hemant.agra...@nxp.com; sachin.sax...@oss.nxp.com; Van Haaren, Harry
> > ; mattias.ronnb...@ericsson.com;
> > lian...@liangbit.com; Mccarthy, Peter 
> > Cc: dev@dpdk.org
> > Subject: RE: [EXTERNAL] Re: [PATCH v2 1/3] eventdev: introduce event pre-
> > scheduling
> >
> > > On 2024-09-19 15:13, Pavan Nikhilesh Bhagavatula wrote:
> > > >>> From: pbhagavat...@marvell.com 
> > > >>> Sent: Tuesday, September 17, 2024 3:11 AM
> > > >>> To: jer...@marvell.com; sthot...@marvell.com; Sevincer, Abdullah
> > > >>> ; hemant.agra...@nxp.com;
> > > >>> sachin.sax...@oss.nxp.com; Van Haaren, Harry
> > > >> ;
> > > >>> mattias.ronnb...@ericsson.com; lian...@liangbit.com; Mccarthy,
> > > >>> Peter 
> > > >>> Cc: dev@dpdk.org; Pavan Nikhilesh 
> > > >>> Subject: [PATCH v2 1/3] eventdev: introduce event pre-scheduling
> > > >>>
> > > >>> From: Pavan Nikhilesh 
> > > >>>
> > > >>> Event pre-scheduling improves scheduling performance by assigning
> > > events
> > > >> to
> > > >>> event ports in advance when dequeues are issued.
> > > >>> The dequeue operation initiates the pre-schedule operation, which
> > > >> completes in
> > > >>> parallel without affecting the dequeued event flow contexts and
> > > >>> dequeue latency.
> > > >>>
> > > >> Is the prescheduling done to get the event more quickly in the next
> > > dequeue?
> > > >> The first dequeue executes pre-schedule to make events available
> > > >> for the
> > > next
> > > >> dequeue.
> > > >> Is this how it is supposed to work?
> > > >>
> > > >
> > > > Yes, that is correct.
> > > >
> > >
> > > "improves scheduling performance" may be a bit misleading, in that case.
> > > I suggest "reduces scheduling overhead" instead. You can argue it
> > > likely reduces scheduling performance, in certain scenarios. "reduces
> > > scheduling overhead, at the cost of load balancing performance."
> > >
> >
> > In case of OCTEON, we see double the scheduling performance with
> > prescheduling without effecting any priority/weight aspects.
> >
> > > It seems to me that this should be a simple hint-type API, where the
> > > hint is used by the event device to decide if pre-scheduling should be
> > > used or not (assuming pre-scheduling on/off is even an option). The
> > > hint would just be a way for the application to express whether or not
> > > it want the scheduler to prioritize load balancing agility and
> > > port-to-port wall-time latency, or scheduling overhead, which in turn
> > > could potentially be rephrased as the app being throughput or latency/RT-
> > oriented.
> > >
> >
> > The three prescheduling types are designed based on real world use-cases
> that
> > some of our customers require in their applications.
> > Relying on application to provide hits might not be possible in all the 
> > cases as
> it
> > is very timing sensitive.
> >
> >
> > > It could also be useful for the event device to know which priority
> > > levels are to be considered latency-sensitive, and which are
> > > throughput-oriented - maybe in the form of a threshold.
> > >
> > > >>> Event devices can indicate pre-scheduling capabilities using
> > > >>> `RTE_EVENT_DEV_CAP_EVENT_PRESCHEDULE` and
> > > >>> `RTE_EVENT_DEV_CAP_EVENT_PRESCHEDULE_ADAPTIVE` via the
> event
> > > >> device
> > > >>> info function `info.event_dev_cap`.
> 
> What is PRESCHEDULE_ADAPTIVE? Can you please add more description?

Unlike raw PRESCHEDULE where every dequeue triggers a pre-scheduling request in 
parallel, 
PRESCHEDULE_ADAPTIVE will delay issuing pre-scheduling till event device knows 
that the 
currently scheduled context can make forward progress. 
For example, in OCTEON HW does it when it sees that scheduling context held by 
the port is
top/head of the flow.

> This will be more useful as per port configuration instead of device-level
> configuration.

In the patch 2/3 I introduced port level API to control prefetches at an event 
port level.

It is not a port configuration API because Applications might want to 
enable/disable 
prefetching in fastpath. Example use cases we see is to disable pre-scheduling 
when 
application wants to preempt an lcore and reenable it at a later point of time.


> The application can choose a type based on its requirement on the port it is
> serving.
> As Mattias suggested, if this is made HINT flag for port configuration, other
> PMDs can
> Ignore it based on either they may not need it depending on their architecture
> or not support it.
> 

If PMDs support preschedules then it has to advertise via capabilities, 
silently ignoring 
feature configuration is bad.

We can make the fastpath APIs as hints.



> > > >>>
> > > >>> Applications can select the pre-schedule type and configure it
> > > >>> through `rte_event_dev_config.preschedule_type` during
> > > `rt

Re: [PATCH v2 1/1] dts: add send_packets to test suites and rework packet addressing

[Juraj Linkeš]

diff --git a/dts/framework/test_suite.py b/dts/framework/test_suite.py



@@ -243,41 +255,74 @@ def get_expected_packet(self, packet: Packet) -> Packet:
   Returns:
   `packet` with injected L2/L3 addresses.
   """
-return self._adjust_addresses(packet, expected=True)
+return self._adjust_addresses([packet], expected=True)[0]

-def _adjust_addresses(self, packet: Packet, expected: bool = False) -> 
Packet:
+def _adjust_addresses(self, packets: list[Packet], expected: bool = False) 
-> list[Packet]:
   """L2 and L3 address additions in both directions.

+Packets in `packets` will be directly modified in this method. The 
returned list of packets
+however will be copies of the modified packets in order to keep the 
two lists distinct.
+


Do we need to do this? I guess you needed this in a test suite - what is
the reason?


This is actually just me documenting something that was already
happening behind the scenes in this method that I thought would be
helpful for people to know. Right now this method ends in
`Ether(packet.build())` which essentially just copies the packet, but
it does so after the modifications were made. I think there is some
logical reason to do this


Ah, ok, this only documents what already existed. I think this was here 
because packet.build() doesn't return a Packet so a conversion is 
needed. The intention is not to keep the two lists distinct.



which is this method is called internally in
the framework, so it allows the send methods where these packets are
used to essentially modify the list and do whatever they want to/need
to to get the packets sent


There are two usages for this method:
1. To update the packet before it's sent out (so that the proper 
addresses are used),
2. To update a packet, constructed in a test case, that we expect to 
receive, so as to compare with actual received packets. This is used in 
the OS UDP test case which checks that the MAC addresses are updated 
properly (and IP addresses stay the same).



and the only change that is reflected on
the user is the addresses are added.

[PATCH v2] net/nfp: implement the device packet type set interface

[Chaoyong He]

From: Long Wu 

Using the Rx packet offload flag rather than the device
capability to control the packet type offload configuration.
Also implement the device packet type set interface to
let application can set the Rx packet offload flag.

Signed-off-by: Long Wu 
Reviewed-by: Chaoyong He 

---
V2:
* Following the advice from reviewer, abandon the modification of RTE
  layer.
---
 drivers/net/nfp/nfp_ethdev.c |  1 +
 drivers/net/nfp/nfp_net_common.c | 42 +++-
 drivers/net/nfp/nfp_net_common.h |  1 +
 3 files changed, 43 insertions(+), 1 deletion(-)

diff --git a/drivers/net/nfp/nfp_ethdev.c b/drivers/net/nfp/nfp_ethdev.c
index bd35df2dc9..09c15eedac 100644
--- a/drivers/net/nfp/nfp_ethdev.c
+++ b/drivers/net/nfp/nfp_ethdev.c
@@ -932,6 +932,7 @@ static const struct eth_dev_ops nfp_net_eth_dev_ops = {
.xstats_get_names_by_id = nfp_net_xstats_get_names_by_id,
.dev_infos_get  = nfp_net_infos_get,
.dev_supported_ptypes_get = nfp_net_supported_ptypes_get,
+   .dev_ptypes_set = nfp_net_ptypes_set,
.mtu_set= nfp_net_dev_mtu_set,
.mac_addr_set   = nfp_net_set_mac_addr,
.vlan_offload_set   = nfp_net_vlan_offload_set,
diff --git a/drivers/net/nfp/nfp_net_common.c b/drivers/net/nfp/nfp_net_common.c
index 3d916cd147..0b71d55366 100644
--- a/drivers/net/nfp/nfp_net_common.c
+++ b/drivers/net/nfp/nfp_net_common.c
@@ -1459,13 +1459,53 @@ nfp_net_supported_ptypes_get(struct rte_eth_dev *dev, 
size_t *no_of_elements)
return NULL;
 
net_hw = dev->data->dev_private;
-   if ((net_hw->super.ctrl_ext & NFP_NET_CFG_CTRL_PKT_TYPE) == 0)
+   if ((net_hw->super.cap_ext & NFP_NET_CFG_CTRL_PKT_TYPE) == 0)
return NULL;
 
*no_of_elements = RTE_DIM(ptypes);
return ptypes;
 }
 
+int
+nfp_net_ptypes_set(struct rte_eth_dev *dev,
+   uint32_t ptype_mask)
+{
+   int ret;
+   uint32_t update;
+   uint32_t ctrl_ext;
+   struct nfp_hw *hw;
+   struct nfp_net_hw *net_hw;
+
+   net_hw = dev->data->dev_private;
+   hw = &net_hw->super;
+
+   if ((hw->cap_ext & NFP_NET_CFG_CTRL_PKT_TYPE) == 0)
+   return -ENOTSUP;
+
+   ctrl_ext = hw->ctrl_ext;
+   if (ptype_mask == 0) {
+   if ((ctrl_ext & NFP_NET_CFG_CTRL_PKT_TYPE) == 0)
+   return 0;
+
+   ctrl_ext &= ~NFP_NET_CFG_CTRL_PKT_TYPE;
+   } else {
+   if ((ctrl_ext & NFP_NET_CFG_CTRL_PKT_TYPE) != 0)
+   return 0;
+
+   ctrl_ext |= NFP_NET_CFG_CTRL_PKT_TYPE;
+   }
+
+   update = NFP_NET_CFG_UPDATE_GEN;
+
+   ret = nfp_ext_reconfig(hw, ctrl_ext, update);
+   if (ret != 0)
+   return ret;
+
+   hw->ctrl_ext = ctrl_ext;
+
+   return 0;
+}
+
 int
 nfp_rx_queue_intr_enable(struct rte_eth_dev *dev,
uint16_t queue_id)
diff --git a/drivers/net/nfp/nfp_net_common.h b/drivers/net/nfp/nfp_net_common.h
index bebb754ced..3c4d305b01 100644
--- a/drivers/net/nfp/nfp_net_common.h
+++ b/drivers/net/nfp/nfp_net_common.h
@@ -315,6 +315,7 @@ int nfp_net_infos_get(struct rte_eth_dev *dev,
struct rte_eth_dev_info *dev_info);
 const uint32_t *nfp_net_supported_ptypes_get(struct rte_eth_dev *dev,
 size_t *no_of_elements);
+int nfp_net_ptypes_set(struct rte_eth_dev *dev, uint32_t ptype_mask);
 int nfp_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 int nfp_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 void nfp_net_params_setup(struct nfp_net_hw *hw);
-- 
2.39.1

[PATCH v2 14/18] net/cnxk: support Rx burst vector for cn20k

[Nithin Dabilpuram]

Add Rx vector support for cn20k

Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Jerin Jacob 
Signed-off-by: Rahul Bhansali 
Signed-off-by: Pavan Nikhilesh 
---
 drivers/net/cnxk/cn20k_rx.h | 463 +++-
 1 file changed, 459 insertions(+), 4 deletions(-)

diff --git a/drivers/net/cnxk/cn20k_rx.h b/drivers/net/cnxk/cn20k_rx.h
index 22abf7bbd8..d1bf0c615e 100644
--- a/drivers/net/cnxk/cn20k_rx.h
+++ b/drivers/net/cnxk/cn20k_rx.h
@@ -420,6 +420,463 @@ cn20k_nix_flush_recv_pkts(void *rx_queue, struct rte_mbuf 
**rx_pkts, uint16_t pk
return nb_pkts;
 }
 
+#if defined(RTE_ARCH_ARM64)
+
+static __rte_always_inline uint64_t
+nix_vlan_update(const uint64_t w2, uint64_t ol_flags, uint8x16_t *f)
+{
+   if (w2 & BIT_ULL(21) /* vtag0_gone */) {
+   ol_flags |= RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED;
+   *f = vsetq_lane_u16((uint16_t)(w2 >> 32), *f, 5);
+   }
+
+   return ol_flags;
+}
+
+static __rte_always_inline uint64_t
+nix_qinq_update(const uint64_t w2, uint64_t ol_flags, struct rte_mbuf *mbuf)
+{
+   if (w2 & BIT_ULL(23) /* vtag1_gone */) {
+   ol_flags |= RTE_MBUF_F_RX_QINQ | RTE_MBUF_F_RX_QINQ_STRIPPED;
+   mbuf->vlan_tci_outer = (uint16_t)(w2 >> 48);
+   }
+
+   return ol_flags;
+}
+
+#define NIX_PUSH_META_TO_FREE(_mbuf, _laddr, _loff_p)  
\
+   do {
   \
+   *(uint64_t *)((_laddr) + (*(_loff_p) << 3)) = (uint64_t)_mbuf;  
   \
+   *(_loff_p) = *(_loff_p) + 1;
   \
+   /* Mark meta mbuf as put */ 
   \
+   RTE_MEMPOOL_CHECK_COOKIES(_mbuf->pool, (void **)&_mbuf, 1, 0);  
   \
+   } while (0)
+
+static __rte_always_inline uint16_t
+cn20k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts, 
const uint16_t flags,
+  void *lookup_mem, struct cnxk_timesync_info *tstamp, 
uintptr_t lmt_base,
+  uint64_t meta_aura)
+{
+   struct cn20k_eth_rxq *rxq = args;
+   const uint64_t mbuf_initializer =
+   (flags & NIX_RX_VWQE_F) ? *(uint64_t *)args : 
rxq->mbuf_initializer;
+   const uint64x2_t data_off = flags & NIX_RX_VWQE_F ? 
vdupq_n_u64(RTE_PKTMBUF_HEADROOM) :
+   
vdupq_n_u64(rxq->data_off);
+   const uint32_t qmask = flags & NIX_RX_VWQE_F ? 0 : rxq->qmask;
+   const uint64_t wdata = flags & NIX_RX_VWQE_F ? 0 : rxq->wdata;
+   const uintptr_t desc = flags & NIX_RX_VWQE_F ? 0 : rxq->desc;
+   uint64x2_t cq0_w8, cq1_w8, cq2_w8, cq3_w8, mbuf01, mbuf23;
+   uintptr_t cpth0 = 0, cpth1 = 0, cpth2 = 0, cpth3 = 0;
+   uint64_t ol_flags0, ol_flags1, ol_flags2, ol_flags3;
+   uint64x2_t rearm0 = vdupq_n_u64(mbuf_initializer);
+   uint64x2_t rearm1 = vdupq_n_u64(mbuf_initializer);
+   uint64x2_t rearm2 = vdupq_n_u64(mbuf_initializer);
+   uint64x2_t rearm3 = vdupq_n_u64(mbuf_initializer);
+   struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
+   uint8x16_t f0, f1, f2, f3;
+   uintptr_t sa_base = 0;
+   uint16_t packets = 0;
+   uint16_t pkts_left;
+   uint32_t head;
+   uintptr_t cq0;
+
+   (void)lmt_base;
+   (void)meta_aura;
+
+   if (!(flags & NIX_RX_VWQE_F)) {
+   lookup_mem = rxq->lookup_mem;
+   head = rxq->head;
+
+   pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
+   pkts_left = pkts & (NIX_DESCS_PER_LOOP - 1);
+   /* Packets has to be floor-aligned to NIX_DESCS_PER_LOOP */
+   pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP);
+   if (flags & NIX_RX_OFFLOAD_TSTAMP_F)
+   tstamp = rxq->tstamp;
+
+   cq0 = desc + CQE_SZ(head);
+   rte_prefetch0(CQE_PTR_OFF(cq0, 0, 64, flags));
+   rte_prefetch0(CQE_PTR_OFF(cq0, 1, 64, flags));
+   rte_prefetch0(CQE_PTR_OFF(cq0, 2, 64, flags));
+   rte_prefetch0(CQE_PTR_OFF(cq0, 3, 64, flags));
+   } else {
+   RTE_SET_USED(head);
+   }
+
+   while (packets < pkts) {
+   if (!(flags & NIX_RX_VWQE_F)) {
+   /* Exit loop if head is about to wrap and become
+* unaligned.
+*/
+   if (((head + NIX_DESCS_PER_LOOP - 1) & qmask) < 
NIX_DESCS_PER_LOOP) {
+   pkts_left += (pkts - packets);
+   break;
+   }
+
+   cq0 = desc + CQE_SZ(head);
+   } else {
+   cq0 = (uintptr_t)&mbufs[packets];
+   }
+
+   if (flags & NIX_R

[PATCH v2 03/18] common/cnxk: use new NPA aq enq mbox for cn20k

[Nithin Dabilpuram]

From: Ashwin Sekhar T K 

A new mbox npa_cn20k_aq_enq_req has been added
for cn20k. Use this mbox for NPA configurations.

Note that the size of these new mbox request and
response remains same when compared to the older
mboxes. Also the new contexts npa_cn20k_aura_s/
npa_cn20k_pool_s which has been added for cn20k are
also same in size as older npa_aura_s/npa_pool_s.
So, we will be able to typecast these structures
into each other for most cases. Only the fields
that have changed in width/positions need to be
taken care of.

Signed-off-by: Ashwin Sekhar T K 
---
 drivers/common/cnxk/hw/npa.h | 164 ---
 drivers/common/cnxk/roc_mbox.h   |  32 ++
 drivers/common/cnxk/roc_nix_debug.c  |   9 +-
 drivers/common/cnxk/roc_nix_fc.c |  54 ++---
 drivers/common/cnxk/roc_nix_tm_ops.c |  15 ++-
 drivers/common/cnxk/roc_npa.c| 100 ++--
 drivers/common/cnxk/roc_npa_debug.c  |  17 ++-
 7 files changed, 339 insertions(+), 52 deletions(-)

diff --git a/drivers/common/cnxk/hw/npa.h b/drivers/common/cnxk/hw/npa.h
index 891a1b2b5f..4fd1f9a64b 100644
--- a/drivers/common/cnxk/hw/npa.h
+++ b/drivers/common/cnxk/hw/npa.h
@@ -216,10 +216,10 @@ struct npa_aura_op_wdata_s {
uint64_t drop : 1;
 };
 
-/* NPA aura context structure */
+/* NPA aura context structure [CN9K, CN10K] */
 struct npa_aura_s {
uint64_t pool_addr : 64; /* W0 */
-   uint64_t ena : 1;
+   uint64_t ena : 1; /* W1 */
uint64_t rsvd_66_65 : 2;
uint64_t pool_caching : 1;
uint64_t pool_way_mask : 16;
@@ -233,24 +233,24 @@ struct npa_aura_s {
uint64_t shift : 6;
uint64_t rsvd_119_118 : 2;
uint64_t avg_level : 8;
-   uint64_t count : 36;
+   uint64_t count : 36; /* W2 */
uint64_t rsvd_167_164 : 4;
uint64_t nix0_bpid : 9;
uint64_t rsvd_179_177 : 3;
uint64_t nix1_bpid : 9;
uint64_t rsvd_191_189 : 3;
-   uint64_t limit : 36;
+   uint64_t limit : 36; /* W3 */
uint64_t rsvd_231_228 : 4;
uint64_t bp : 8;
uint64_t rsvd_242_240 : 3;
-   uint64_t fc_be : 1; /* [CN10K, .) */
+   uint64_t fc_be : 1; /* [CN10K] */
uint64_t fc_ena : 1;
uint64_t fc_up_crossing : 1;
uint64_t fc_stype : 2;
uint64_t fc_hyst_bits : 4;
uint64_t rsvd_255_252 : 4;
uint64_t fc_addr : 64; /* W4 */
-   uint64_t pool_drop : 8;
+   uint64_t pool_drop : 8; /* W5 */
uint64_t update_time : 16;
uint64_t err_int : 8;
uint64_t err_int_ena : 8;
@@ -262,17 +262,17 @@ struct npa_aura_s {
uint64_t rsvd_371 : 1;
uint64_t err_qint_idx : 7;
uint64_t rsvd_383_379 : 5;
-   uint64_t thresh : 36;
+   uint64_t thresh : 36; /* W6 */
uint64_t rsvd_423_420 : 4;
-   uint64_t fc_msh_dst : 11; /* [CN10K, .) */
+   uint64_t fc_msh_dst : 11; /* [CN10K] */
uint64_t rsvd_447_435 : 13;
uint64_t rsvd_511_448 : 64; /* W7 */
 };
 
-/* NPA pool context structure */
+/* NPA pool context structure [CN9K, CN10K] */
 struct npa_pool_s {
uint64_t stack_base : 64; /* W0 */
-   uint64_t ena : 1;
+   uint64_t ena : 1; /* W1 */
uint64_t nat_align : 1;
uint64_t rsvd_67_66 : 2;
uint64_t stack_caching : 1;
@@ -282,11 +282,11 @@ struct npa_pool_s {
uint64_t rsvd_103_100 : 4;
uint64_t buf_size : 11;
uint64_t rsvd_127_115 : 13;
-   uint64_t stack_max_pages : 32;
+   uint64_t stack_max_pages : 32; /* W2 */
uint64_t stack_pages : 32;
-   uint64_t op_pc : 48;
+   uint64_t op_pc : 48; /* W3 */
uint64_t rsvd_255_240 : 16;
-   uint64_t stack_offset : 4;
+   uint64_t stack_offset : 4; /* W4 */
uint64_t rsvd_263_260 : 4;
uint64_t shift : 6;
uint64_t rsvd_271_270 : 2;
@@ -296,14 +296,14 @@ struct npa_pool_s {
uint64_t fc_stype : 2;
uint64_t fc_hyst_bits : 4;
uint64_t fc_up_crossing : 1;
-   uint64_t fc_be : 1; /* [CN10K, .) */
+   uint64_t fc_be : 1; /* [CN10K] */
uint64_t rsvd_299_298 : 2;
uint64_t update_time : 16;
uint64_t rsvd_319_316 : 4;
uint64_t fc_addr : 64;   /* W5 */
uint64_t ptr_start : 64; /* W6 */
uint64_t ptr_end : 64;   /* W7 */
-   uint64_t rsvd_535_512 : 24;
+   uint64_t rsvd_535_512 : 24; /* W8 */
uint64_t err_int : 8;
uint64_t err_int_ena : 8;
uint64_t thresh_int : 1;
@@ -314,9 +314,9 @@ struct npa_pool_s {
uint64_t rsvd_563 : 1;
uint64_t err_qint_idx : 7;
uint64_t rsvd_575_571 : 5;
-   uint64_t thresh : 36;
+   uint64_t thresh : 36; /* W9 */
uint64_t rsvd_615_612 : 4;
-   uint64_t fc_msh_dst : 11; /* [CN10K, .) */
+   uint64_t fc_msh_dst : 11; /* [CN10K] */
uint64_t rsvd_639_627 : 13;
uint64_t rsvd_703_640 : 64;  /* W10 */
uint64_t rsvd_767_704 : 64;  /* W11 */
@@ -326,6 +326,1

[PATCH v2 10/18] net/cnxk: add cn20k base control path support

[Nithin Dabilpuram]

Add cn20k base control path support for ethdev.

Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Sunil Kumar Kori 
Signed-off-by: Rakesh Kudurumalla 
Signed-off-by: Satha Rao 
Signed-off-by: Rahul Bhansali 
---
 doc/guides/rel_notes/release_24_11.rst |   4 +
 drivers/net/cnxk/cn20k_ethdev.c| 553 +
 drivers/net/cnxk/cn20k_ethdev.h|  11 +
 drivers/net/cnxk/cn20k_rx.h|  33 ++
 drivers/net/cnxk/cn20k_rxtx.h  |  89 
 drivers/net/cnxk/cn20k_tx.h|  35 ++
 drivers/net/cnxk/cnxk_ethdev_dp.h  |   3 +
 drivers/net/cnxk/meson.build   |  11 +-
 8 files changed, 738 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/cnxk/cn20k_ethdev.c
 create mode 100644 drivers/net/cnxk/cn20k_ethdev.h
 create mode 100644 drivers/net/cnxk/cn20k_rx.h
 create mode 100644 drivers/net/cnxk/cn20k_rxtx.h
 create mode 100644 drivers/net/cnxk/cn20k_tx.h

diff --git a/doc/guides/rel_notes/release_24_11.rst 
b/doc/guides/rel_notes/release_24_11.rst
index 3c666ddd10..e7597bace3 100644
--- a/doc/guides/rel_notes/release_24_11.rst
+++ b/doc/guides/rel_notes/release_24_11.rst
@@ -59,6 +59,10 @@ New Features
 
   * Added support for HW mempool in CN20K SoC.
 
+* **Updated Marvell cnxk net driver.**
+
+  * Added support for ethdev in CN20K SoC.
+
 
 Removed Items
 -
diff --git a/drivers/net/cnxk/cn20k_ethdev.c b/drivers/net/cnxk/cn20k_ethdev.c
new file mode 100644
index 00..b4d21fe4be
--- /dev/null
+++ b/drivers/net/cnxk/cn20k_ethdev.c
@@ -0,0 +1,553 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2024 Marvell.
+ */
+#include "cn20k_ethdev.h"
+#include "cn20k_rx.h"
+#include "cn20k_tx.h"
+
+static int
+cn20k_nix_ptypes_set(struct rte_eth_dev *eth_dev, uint32_t ptype_mask)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+
+   if (ptype_mask) {
+   dev->rx_offload_flags |= NIX_RX_OFFLOAD_PTYPE_F;
+   dev->ptype_disable = 0;
+   } else {
+   dev->rx_offload_flags &= ~NIX_RX_OFFLOAD_PTYPE_F;
+   dev->ptype_disable = 1;
+   }
+
+   return 0;
+}
+
+static void
+nix_form_default_desc(struct cnxk_eth_dev *dev, struct cn20k_eth_txq *txq, 
uint16_t qid)
+{
+   union nix_send_hdr_w0_u send_hdr_w0;
+
+   /* Initialize the fields based on basic single segment packet */
+   send_hdr_w0.u = 0;
+   if (dev->tx_offload_flags & NIX_TX_NEED_EXT_HDR) {
+   /* 2(HDR) + 2(EXT_HDR) + 1(SG) + 1(IOVA) = 6/2 - 1 = 2 */
+   send_hdr_w0.sizem1 = 2;
+   if (dev->tx_offload_flags & NIX_TX_OFFLOAD_TSTAMP_F) {
+   /* Default: one seg packet would have:
+* 2(HDR) + 2(EXT) + 1(SG) + 1(IOVA) + 2(MEM)
+* => 8/2 - 1 = 3
+*/
+   send_hdr_w0.sizem1 = 3;
+
+   /* To calculate the offset for send_mem,
+* send_hdr->w0.sizem1 * 2
+*/
+   txq->ts_mem = dev->tstamp.tx_tstamp_iova;
+   }
+   } else {
+   /* 2(HDR) + 1(SG) + 1(IOVA) = 4/2 - 1 = 1 */
+   send_hdr_w0.sizem1 = 1;
+   }
+   send_hdr_w0.sq = qid;
+   txq->send_hdr_w0 = send_hdr_w0.u;
+   rte_wmb();
+}
+
+static int
+cn20k_nix_tx_compl_setup(struct cnxk_eth_dev *dev, struct cn20k_eth_txq *txq, 
struct roc_nix_sq *sq,
+uint16_t nb_desc)
+{
+   struct roc_nix_cq *cq;
+
+   cq = &dev->cqs[sq->cqid];
+   txq->tx_compl.desc_base = (uintptr_t)cq->desc_base;
+   txq->tx_compl.cq_door = cq->door;
+   txq->tx_compl.cq_status = cq->status;
+   txq->tx_compl.wdata = cq->wdata;
+   txq->tx_compl.head = cq->head;
+   txq->tx_compl.qmask = cq->qmask;
+   /* Total array size holding buffers is equal to
+* number of entries in cq and sq
+* max buffer in array = desc in cq + desc in sq
+*/
+   txq->tx_compl.nb_desc_mask = (2 * rte_align32pow2(nb_desc)) - 1;
+   txq->tx_compl.ena = true;
+
+   txq->tx_compl.ptr = (struct rte_mbuf **)plt_zmalloc(
+   txq->tx_compl.nb_desc_mask * sizeof(struct rte_mbuf *), 0);
+   if (!txq->tx_compl.ptr)
+   return -1;
+
+   return 0;
+}
+
+static void
+cn20k_nix_tx_queue_release(struct rte_eth_dev *eth_dev, uint16_t qid)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct roc_nix *nix = &dev->nix;
+   struct cn20k_eth_txq *txq;
+
+   cnxk_nix_tx_queue_release(eth_dev, qid);
+   txq = eth_dev->data->tx_queues[qid];
+
+   if (nix->tx_compl_ena)
+   plt_free(txq->tx_compl.ptr);
+}
+
+static int
+cn20k_nix_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid, uint16_t 
nb_desc,
+unsigned int socket, const struct rte_eth_txconf 
*tx_conf)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+

[PATCH v7 0/1] dts: testpmd verbose parser

[jspewock]

From: Jeremy Spewock 

v7:
 * update from string methods in both PacketOffloadFlag and RtePType to
   match the ones in the rss offload flag
 * update the doc-string in RtePType to have proper references to the
   DPDK libraries where the information is taken from.

Jeremy Spewock (1):
  dts: add text parser for testpmd verbose output

 dts/framework/remote_session/testpmd_shell.py | 563 +-
 dts/framework/utils.py|   3 +
 2 files changed, 564 insertions(+), 2 deletions(-)

-- 
2.46.0

[PATCH v2 02/18] common/cnxk: accommodate change in aura field width

[Nithin Dabilpuram]

From: Ashwin Sekhar T K 

Aura field width has changed from 20 bits to 17 bits in
cn20k. Adjust the bit fields accordingly for register
reads/writes.

Signed-off-by: Ashwin Sekhar T K 
---
 drivers/common/cnxk/roc_npa.h | 24 
 1 file changed, 16 insertions(+), 8 deletions(-)

diff --git a/drivers/common/cnxk/roc_npa.h b/drivers/common/cnxk/roc_npa.h
index 4ad5f044b5..fbf75b2fca 100644
--- a/drivers/common/cnxk/roc_npa.h
+++ b/drivers/common/cnxk/roc_npa.h
@@ -16,6 +16,7 @@
 #else
 #include "roc_io_generic.h"
 #endif
+#include "roc_model.h"
 #include "roc_npa_dp.h"
 
 #define ROC_AURA_OP_LIMIT_MASK (BIT_ULL(36) - 1)
@@ -68,11 +69,12 @@ roc_npa_aura_op_alloc(uint64_t aura_handle, const int drop)
 static inline uint64_t
 roc_npa_aura_op_cnt_get(uint64_t aura_handle)
 {
-   uint64_t wdata;
+   uint64_t wdata, shift;
int64_t *addr;
uint64_t reg;
 
-   wdata = roc_npa_aura_handle_to_aura(aura_handle) << 44;
+   shift = roc_model_is_cn20k() ? 47 : 44;
+   wdata = roc_npa_aura_handle_to_aura(aura_handle) << shift;
addr = (int64_t *)(roc_npa_aura_handle_to_base(aura_handle) +
   NPA_LF_AURA_OP_CNT);
reg = roc_atomic64_add_nosync(wdata, addr);
@@ -87,11 +89,13 @@ static inline void
 roc_npa_aura_op_cnt_set(uint64_t aura_handle, const int sign, uint64_t count)
 {
uint64_t reg = count & (BIT_ULL(36) - 1);
+   uint64_t shift;
 
if (sign)
reg |= BIT_ULL(43); /* CNT_ADD */
 
-   reg |= (roc_npa_aura_handle_to_aura(aura_handle) << 44);
+   shift = roc_model_is_cn20k() ? 47 : 44;
+   reg |= (roc_npa_aura_handle_to_aura(aura_handle) << shift);
 
plt_write64(reg, roc_npa_aura_handle_to_base(aura_handle) +
 NPA_LF_AURA_OP_CNT);
@@ -100,11 +104,12 @@ roc_npa_aura_op_cnt_set(uint64_t aura_handle, const int 
sign, uint64_t count)
 static inline uint64_t
 roc_npa_aura_op_limit_get(uint64_t aura_handle)
 {
-   uint64_t wdata;
+   uint64_t wdata, shift;
int64_t *addr;
uint64_t reg;
 
-   wdata = roc_npa_aura_handle_to_aura(aura_handle) << 44;
+   shift = roc_model_is_cn20k() ? 47 : 44;
+   wdata = roc_npa_aura_handle_to_aura(aura_handle) << shift;
addr = (int64_t *)(roc_npa_aura_handle_to_base(aura_handle) +
   NPA_LF_AURA_OP_LIMIT);
reg = roc_atomic64_add_nosync(wdata, addr);
@@ -119,8 +124,10 @@ static inline void
 roc_npa_aura_op_limit_set(uint64_t aura_handle, uint64_t limit)
 {
uint64_t reg = limit & ROC_AURA_OP_LIMIT_MASK;
+   uint64_t shift;
 
-   reg |= (roc_npa_aura_handle_to_aura(aura_handle) << 44);
+   shift = roc_model_is_cn20k() ? 47 : 44;
+   reg |= (roc_npa_aura_handle_to_aura(aura_handle) << shift);
 
plt_write64(reg, roc_npa_aura_handle_to_base(aura_handle) +
 NPA_LF_AURA_OP_LIMIT);
@@ -129,11 +136,12 @@ roc_npa_aura_op_limit_set(uint64_t aura_handle, uint64_t 
limit)
 static inline uint64_t
 roc_npa_aura_op_available(uint64_t aura_handle)
 {
-   uint64_t wdata;
+   uint64_t wdata, shift;
uint64_t reg;
int64_t *addr;
 
-   wdata = roc_npa_aura_handle_to_aura(aura_handle) << 44;
+   shift = roc_model_is_cn20k() ? 47 : 44;
+   wdata = roc_npa_aura_handle_to_aura(aura_handle) << shift;
addr = (int64_t *)(roc_npa_aura_handle_to_base(aura_handle) +
   NPA_LF_POOL_OP_AVAILABLE);
reg = roc_atomic64_add_nosync(wdata, addr);
-- 
2.34.1

[PATCH v2 06/18] common/cnxk: support NIX queue config for cn20k

[Nithin Dabilpuram]

From: Satha Rao 

Add support to setup NIX RQ, SQ, CQ for cn20k.

Signed-off-by: Satha Rao 
---
 drivers/common/cnxk/roc_nix_fc.c |  52 ++-
 drivers/common/cnxk/roc_nix_inl.c|   2 +
 drivers/common/cnxk/roc_nix_priv.h   |   1 +
 drivers/common/cnxk/roc_nix_queue.c  | 532 ++-
 drivers/common/cnxk/roc_nix_stats.c  |  55 ++-
 drivers/common/cnxk/roc_nix_tm.c |  22 +-
 drivers/common/cnxk/roc_nix_tm_ops.c |  14 +-
 7 files changed, 650 insertions(+), 28 deletions(-)

diff --git a/drivers/common/cnxk/roc_nix_fc.c b/drivers/common/cnxk/roc_nix_fc.c
index 2f72e67993..0676363c58 100644
--- a/drivers/common/cnxk/roc_nix_fc.c
+++ b/drivers/common/cnxk/roc_nix_fc.c
@@ -127,7 +127,7 @@ nix_fc_cq_config_get(struct roc_nix *roc_nix, struct 
roc_nix_fc_cfg *fc_cfg)
aq->qidx = fc_cfg->cq_cfg.rq;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_READ;
-   } else {
+   } else if (roc_model_is_cn10k()) {
struct nix_cn10k_aq_enq_req *aq;
 
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
@@ -136,6 +136,18 @@ nix_fc_cq_config_get(struct roc_nix *roc_nix, struct 
roc_nix_fc_cfg *fc_cfg)
goto exit;
}
 
+   aq->qidx = fc_cfg->cq_cfg.rq;
+   aq->ctype = NIX_AQ_CTYPE_CQ;
+   aq->op = NIX_AQ_INSTOP_READ;
+   } else {
+   struct nix_cn20k_aq_enq_req *aq;
+
+   aq = mbox_alloc_msg_nix_cn20k_aq_enq(mbox);
+   if (!aq) {
+   rc = -ENOSPC;
+   goto exit;
+   }
+
aq->qidx = fc_cfg->cq_cfg.rq;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_READ;
@@ -179,7 +191,7 @@ nix_fc_rq_config_get(struct roc_nix *roc_nix, struct 
roc_nix_fc_cfg *fc_cfg)
aq->qidx = fc_cfg->rq_cfg.rq;
aq->ctype = NIX_AQ_CTYPE_RQ;
aq->op = NIX_AQ_INSTOP_READ;
-   } else {
+   } else if (roc_model_is_cn10k()) {
struct nix_cn10k_aq_enq_req *aq;
 
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
@@ -188,6 +200,18 @@ nix_fc_rq_config_get(struct roc_nix *roc_nix, struct 
roc_nix_fc_cfg *fc_cfg)
goto exit;
}
 
+   aq->qidx = fc_cfg->rq_cfg.rq;
+   aq->ctype = NIX_AQ_CTYPE_RQ;
+   aq->op = NIX_AQ_INSTOP_READ;
+   } else {
+   struct nix_cn20k_aq_enq_req *aq;
+
+   aq = mbox_alloc_msg_nix_cn20k_aq_enq(mbox);
+   if (!aq) {
+   rc = -ENOSPC;
+   goto exit;
+   }
+
aq->qidx = fc_cfg->rq_cfg.rq;
aq->ctype = NIX_AQ_CTYPE_RQ;
aq->op = NIX_AQ_INSTOP_READ;
@@ -270,7 +294,7 @@ nix_fc_cq_config_set(struct roc_nix *roc_nix, struct 
roc_nix_fc_cfg *fc_cfg)
 
aq->cq.bp_ena = !!(fc_cfg->cq_cfg.enable);
aq->cq_mask.bp_ena = ~(aq->cq_mask.bp_ena);
-   } else {
+   } else if (roc_model_is_cn10k()) {
struct nix_cn10k_aq_enq_req *aq;
 
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
@@ -290,6 +314,28 @@ nix_fc_cq_config_set(struct roc_nix *roc_nix, struct 
roc_nix_fc_cfg *fc_cfg)
aq->cq_mask.bp = ~(aq->cq_mask.bp);
}
 
+   aq->cq.bp_ena = !!(fc_cfg->cq_cfg.enable);
+   aq->cq_mask.bp_ena = ~(aq->cq_mask.bp_ena);
+   } else {
+   struct nix_cn20k_aq_enq_req *aq;
+
+   aq = mbox_alloc_msg_nix_cn20k_aq_enq(mbox);
+   if (!aq) {
+   rc = -ENOSPC;
+   goto exit;
+   }
+
+   aq->qidx = fc_cfg->cq_cfg.rq;
+   aq->ctype = NIX_AQ_CTYPE_CQ;
+   aq->op = NIX_AQ_INSTOP_WRITE;
+
+   if (fc_cfg->cq_cfg.enable) {
+   aq->cq.bpid = nix->bpid[fc_cfg->cq_cfg.tc];
+   aq->cq_mask.bpid = ~(aq->cq_mask.bpid);
+   aq->cq.bp = fc_cfg->cq_cfg.cq_drop;
+   aq->cq_mask.bp = ~(aq->cq_mask.bp);
+   }
+
aq->cq.bp_ena = !!(fc_cfg->cq_cfg.enable);
aq->cq_mask.bp_ena = ~(aq->cq_mask.bp_ena);
}
diff --git a/drivers/common/cnxk/roc_nix_inl.c 
b/drivers/common/cnxk/roc_nix_inl.c
index a984ac56d9..a759052973 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -1385,6 +1385,8 @@ roc_nix_inl_dev_rq_get(struct roc_nix_rq *rq, bool enable)
mbox = mbox_get(dev->mbox);
if (roc_model_is_cn9k())
rc = nix_rq_cn9k_cfg(dev, inl_rq, inl_dev->qints, false, 
enable);
+   else if (roc_model_is_cn10k())
+   rc = nix_rq_cn10k_cfg(dev, inl_rq, inl_dev->qints, false, 
enable);
else
rc = nix_rq_cfg(dev, inl_rq, inl_dev

[PATCH v2 09/18] common/cnxk: add RSS support for cn20k

[Nithin Dabilpuram]

From: Satha Rao 

Add RSS configuration support for cn20k.

Signed-off-by: Satha Rao 
---
 drivers/common/cnxk/roc_nix_rss.c | 74 +--
 1 file changed, 70 insertions(+), 4 deletions(-)

diff --git a/drivers/common/cnxk/roc_nix_rss.c 
b/drivers/common/cnxk/roc_nix_rss.c
index 2b88e1360d..fd1472e9b9 100644
--- a/drivers/common/cnxk/roc_nix_rss.c
+++ b/drivers/common/cnxk/roc_nix_rss.c
@@ -70,7 +70,7 @@ nix_cn9k_rss_reta_set(struct nix *nix, uint8_t group,
goto exit;
req = mbox_alloc_msg_nix_aq_enq(mbox);
if (!req) {
-   rc =  NIX_ERR_NO_MEM;
+   rc = NIX_ERR_NO_MEM;
goto exit;
}
}
@@ -93,7 +93,7 @@ nix_cn9k_rss_reta_set(struct nix *nix, uint8_t group,
goto exit;
req = mbox_alloc_msg_nix_aq_enq(mbox);
if (!req) {
-   rc =  NIX_ERR_NO_MEM;
+   rc = NIX_ERR_NO_MEM;
goto exit;
}
}
@@ -115,8 +115,8 @@ nix_cn9k_rss_reta_set(struct nix *nix, uint8_t group,
 }
 
 static int
-nix_rss_reta_set(struct nix *nix, uint8_t group,
-uint16_t reta[ROC_NIX_RSS_RETA_MAX], uint8_t lock_rx_ctx)
+nix_cn10k_rss_reta_set(struct nix *nix, uint8_t group, uint16_t 
reta[ROC_NIX_RSS_RETA_MAX],
+  uint8_t lock_rx_ctx)
 {
struct mbox *mbox = mbox_get((&nix->dev)->mbox);
struct nix_cn10k_aq_enq_req *req;
@@ -178,6 +178,70 @@ nix_rss_reta_set(struct nix *nix, uint8_t group,
return rc;
 }
 
+static int
+nix_rss_reta_set(struct nix *nix, uint8_t group, uint16_t 
reta[ROC_NIX_RSS_RETA_MAX],
+uint8_t lock_rx_ctx)
+{
+   struct mbox *mbox = mbox_get((&nix->dev)->mbox);
+   struct nix_cn20k_aq_enq_req *req;
+   uint16_t idx;
+   int rc;
+
+   for (idx = 0; idx < nix->reta_sz; idx++) {
+   req = mbox_alloc_msg_nix_cn20k_aq_enq(mbox);
+   if (!req) {
+   /* The shared memory buffer can be full.
+* Flush it and retry
+*/
+   rc = mbox_process(mbox);
+   if (rc < 0)
+   goto exit;
+   req = mbox_alloc_msg_nix_cn20k_aq_enq(mbox);
+   if (!req) {
+   rc =  NIX_ERR_NO_MEM;
+   goto exit;
+   }
+   }
+   req->rss.rq = reta[idx];
+   /* Fill AQ info */
+   req->qidx = (group * nix->reta_sz) + idx;
+   req->ctype = NIX_AQ_CTYPE_RSS;
+   req->op = NIX_AQ_INSTOP_INIT;
+
+   if (!lock_rx_ctx)
+   continue;
+
+   req = mbox_alloc_msg_nix_cn20k_aq_enq(mbox);
+   if (!req) {
+   /* The shared memory buffer can be full.
+* Flush it and retry
+*/
+   rc = mbox_process(mbox);
+   if (rc < 0)
+   goto exit;
+   req = mbox_alloc_msg_nix_cn20k_aq_enq(mbox);
+   if (!req) {
+   rc =  NIX_ERR_NO_MEM;
+   goto exit;
+   }
+   }
+   req->rss.rq = reta[idx];
+   /* Fill AQ info */
+   req->qidx = (group * nix->reta_sz) + idx;
+   req->ctype = NIX_AQ_CTYPE_RSS;
+   req->op = NIX_AQ_INSTOP_LOCK;
+   }
+
+   rc = mbox_process(mbox);
+   if (rc < 0)
+   goto exit;
+
+   rc = 0;
+exit:
+   mbox_put(mbox);
+   return rc;
+}
+
 int
 roc_nix_rss_reta_set(struct roc_nix *roc_nix, uint8_t group,
 uint16_t reta[ROC_NIX_RSS_RETA_MAX])
@@ -191,6 +255,8 @@ roc_nix_rss_reta_set(struct roc_nix *roc_nix, uint8_t group,
if (roc_model_is_cn9k())
rc = nix_cn9k_rss_reta_set(nix, group, reta,
   roc_nix->lock_rx_ctx);
+   else if (roc_model_is_cn10k())
+   rc = nix_cn10k_rss_reta_set(nix, group, reta, 
roc_nix->lock_rx_ctx);
else
rc = nix_rss_reta_set(nix, group, reta, roc_nix->lock_rx_ctx);
if (rc)
-- 
2.34.1

[PATCH v2 12/18] net/cnxk: support Tx function select for cn20k

[Nithin Dabilpuram]

Add support to select Tx function based on offload flags
for cn20k.

Signed-off-by: Nithin Dabilpuram 
---
 drivers/net/cnxk/cn20k_ethdev.c   |  80 ++
 drivers/net/cnxk/cn20k_ethdev.h   |   1 +
 drivers/net/cnxk/cn20k_tx.h   | 237 ++
 drivers/net/cnxk/cn20k_tx_select.c| 122 +
 drivers/net/cnxk/meson.build  |  37 +++
 drivers/net/cnxk/tx/cn20k/tx_0_15.c   |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_0_15_mseg.c  |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_0_15_vec.c   |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_0_15_vec_mseg.c  |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_112_127.c|  18 ++
 drivers/net/cnxk/tx/cn20k/tx_112_127_mseg.c   |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_112_127_vec.c|  18 ++
 .../net/cnxk/tx/cn20k/tx_112_127_vec_mseg.c   |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_16_31.c  |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_16_31_mseg.c |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_16_31_vec.c  |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_16_31_vec_mseg.c |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_32_47.c  |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_32_47_mseg.c |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_32_47_vec.c  |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_32_47_vec_mseg.c |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_48_63.c  |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_48_63_mseg.c |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_48_63_vec.c  |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_48_63_vec_mseg.c |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_64_79.c  |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_64_79_mseg.c |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_64_79_vec.c  |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_64_79_vec_mseg.c |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_80_95.c  |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_80_95_mseg.c |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_80_95_vec.c  |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_80_95_vec_mseg.c |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_96_111.c |  18 ++
 drivers/net/cnxk/tx/cn20k/tx_96_111_mseg.c|  18 ++
 drivers/net/cnxk/tx/cn20k/tx_96_111_vec.c |  18 ++
 .../net/cnxk/tx/cn20k/tx_96_111_vec_mseg.c|  18 ++
 drivers/net/cnxk/tx/cn20k/tx_all_offload.c|  39 +++
 38 files changed, 1092 insertions(+)
 create mode 100644 drivers/net/cnxk/cn20k_tx_select.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_0_15.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_0_15_mseg.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_0_15_vec.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_0_15_vec_mseg.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_112_127.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_112_127_mseg.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_112_127_vec.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_112_127_vec_mseg.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_16_31.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_16_31_mseg.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_16_31_vec.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_16_31_vec_mseg.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_32_47.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_32_47_mseg.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_32_47_vec.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_32_47_vec_mseg.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_48_63.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_48_63_mseg.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_48_63_vec.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_48_63_vec_mseg.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_64_79.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_64_79_mseg.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_64_79_vec.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_64_79_vec_mseg.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_80_95.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_80_95_mseg.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_80_95_vec.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_80_95_vec_mseg.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_96_111.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_96_111_mseg.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_96_111_vec.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_96_111_vec_mseg.c
 create mode 100644 drivers/net/cnxk/tx/cn20k/tx_all_offload.c

diff --git a/drivers/net/cnxk/cn20k_ethdev.c b/drivers/net/cnxk/cn20k_ethdev.c
index d1cb3a52bf..4b2f04ba31 100644
--- a/drivers/net/cnxk/cn20k_ethdev.c
+++ b/drivers/net/cnxk/cn20k_ethdev.c
@@ -40,6 +40,78 @@ nix_rx_offload_flags(struct rte_eth_dev *eth_dev)
return flags;
 }
 
+static uint16_t
+nix_tx_offload_flags(struct rte_eth_dev *eth_dev)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   uint64_t conf = dev->tx_offloads;
+   struct roc_nix *nix = &dev->nix;
+   uint16_t flags = 0;
+
+   /* Fastpath is dependent on these enums */
+   RTE_BUILD_

[PATCH v2 11/18] net/cnxk: support Rx function select for cn20k

[Nithin Dabilpuram]

Add support to select Rx function based on offload flags
for cn20k.

Signed-off-by: Nithin Dabilpuram 
---
 drivers/net/cnxk/cn20k_ethdev.c   |  59 -
 drivers/net/cnxk/cn20k_ethdev.h   |   3 +
 drivers/net/cnxk/cn20k_rx.h   | 226 ++
 drivers/net/cnxk/cn20k_rx_select.c| 162 +
 drivers/net/cnxk/meson.build  |  44 
 drivers/net/cnxk/rx/cn20k/rx_0_15.c   |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_0_15_mseg.c  |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_0_15_vec.c   |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_0_15_vec_mseg.c  |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_112_127.c|  20 ++
 drivers/net/cnxk/rx/cn20k/rx_112_127_mseg.c   |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_112_127_vec.c|  20 ++
 .../net/cnxk/rx/cn20k/rx_112_127_vec_mseg.c   |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_16_31.c  |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_16_31_mseg.c |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_16_31_vec.c  |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_16_31_vec_mseg.c |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_32_47.c  |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_32_47_mseg.c |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_32_47_vec.c  |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_32_47_vec_mseg.c |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_48_63.c  |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_48_63_mseg.c |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_48_63_vec.c  |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_48_63_vec_mseg.c |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_64_79.c  |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_64_79_mseg.c |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_64_79_vec.c  |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_64_79_vec_mseg.c |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_80_95.c  |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_80_95_mseg.c |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_80_95_vec.c  |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_80_95_vec_mseg.c |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_96_111.c |  20 ++
 drivers/net/cnxk/rx/cn20k/rx_96_111_mseg.c|  20 ++
 drivers/net/cnxk/rx/cn20k/rx_96_111_vec.c |  20 ++
 .../net/cnxk/rx/cn20k/rx_96_111_vec_mseg.c|  20 ++
 drivers/net/cnxk/rx/cn20k/rx_all_offload.c|  57 +
 38 files changed, 1190 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/cnxk/cn20k_rx_select.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_0_15.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_0_15_mseg.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_0_15_vec.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_0_15_vec_mseg.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_112_127.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_112_127_mseg.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_112_127_vec.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_112_127_vec_mseg.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_16_31.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_16_31_mseg.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_16_31_vec.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_16_31_vec_mseg.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_32_47.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_32_47_mseg.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_32_47_vec.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_32_47_vec_mseg.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_48_63.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_48_63_mseg.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_48_63_vec.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_48_63_vec_mseg.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_64_79.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_64_79_mseg.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_64_79_vec.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_64_79_vec_mseg.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_80_95.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_80_95_mseg.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_80_95_vec.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_80_95_vec_mseg.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_96_111.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_96_111_mseg.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_96_111_vec.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_96_111_vec_mseg.c
 create mode 100644 drivers/net/cnxk/rx/cn20k/rx_all_offload.c

diff --git a/drivers/net/cnxk/cn20k_ethdev.c b/drivers/net/cnxk/cn20k_ethdev.c
index b4d21fe4be..d1cb3a52bf 100644
--- a/drivers/net/cnxk/cn20k_ethdev.c
+++ b/drivers/net/cnxk/cn20k_ethdev.c
@@ -5,6 +5,41 @@
 #include "cn20k_rx.h"
 #include "cn20k_tx.h"
 
+static uint16_t
+nix_rx_offload_flags(struct rte_eth_dev *eth_dev)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct rte_eth_dev_data *data = eth_dev->data;
+   struct rte_eth_conf *conf = &data->dev_conf;
+   struct rte_eth_rxmode *rxmode = &conf->rxmode;
+   uint16_t flags = 0;
+

[PATCH v2 13/18] net/cnxk: support Rx burst scalar for cn20k

[Nithin Dabilpuram]

Add Rx burst support scalar version for cn20k.

Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Jerin Jacob 
Signed-off-by: Rahul Bhansali 
Signed-off-by: Pavan Nikhilesh 
---
 drivers/net/cnxk/cn20k_ethdev.c| 126 +
 drivers/net/cnxk/cn20k_rx.h| 394 -
 drivers/net/cnxk/cn20k_rx_select.c |   6 +-
 drivers/net/cnxk/cn20k_rxtx.h  | 156 
 4 files changed, 674 insertions(+), 8 deletions(-)

diff --git a/drivers/net/cnxk/cn20k_ethdev.c b/drivers/net/cnxk/cn20k_ethdev.c
index 4b2f04ba31..cad7b1316a 100644
--- a/drivers/net/cnxk/cn20k_ethdev.c
+++ b/drivers/net/cnxk/cn20k_ethdev.c
@@ -330,6 +330,33 @@ cn20k_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, 
uint16_t qid, uint16_t nb_
return 0;
 }
 
+static void
+cn20k_nix_rx_queue_meta_aura_update(struct rte_eth_dev *eth_dev)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct cnxk_eth_rxq_sp *rxq_sp;
+   struct cn20k_eth_rxq *rxq;
+   struct roc_nix_rq *rq;
+   int i;
+
+   /* Update Aura handle for fastpath rx queues */
+   for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
+   rq = &dev->rqs[i];
+   rxq = eth_dev->data->rx_queues[i];
+   rxq->meta_aura = rq->meta_aura_handle;
+   rxq->meta_pool = dev->nix.meta_mempool;
+   /* Assume meta packet from normal aura if meta aura is not setup
+*/
+   if (!rxq->meta_aura) {
+   rxq_sp = cnxk_eth_rxq_to_sp(rxq);
+   rxq->meta_aura = rxq_sp->qconf.mp->pool_id;
+   rxq->meta_pool = (uintptr_t)rxq_sp->qconf.mp;
+   }
+   }
+   /* Store mempool in lookup mem */
+   cnxk_nix_lookup_mem_metapool_set(dev);
+}
+
 static int
 cn20k_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qidx)
 {
@@ -371,6 +398,74 @@ cn20k_nix_configure(struct rte_eth_dev *eth_dev)
return 0;
 }
 
+/* Function to enable ptp config for VFs */
+static void
+nix_ptp_enable_vf(struct rte_eth_dev *eth_dev)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+
+   if (nix_recalc_mtu(eth_dev))
+   plt_err("Failed to set MTU size for ptp");
+
+   dev->rx_offload_flags |= NIX_RX_OFFLOAD_TSTAMP_F;
+
+   /* Setting up the function pointers as per new offload flags */
+   cn20k_eth_set_rx_function(eth_dev);
+   cn20k_eth_set_tx_function(eth_dev);
+}
+
+static uint16_t
+nix_ptp_vf_burst(void *queue, struct rte_mbuf **mbufs, uint16_t pkts)
+{
+   struct cn20k_eth_rxq *rxq = queue;
+   struct cnxk_eth_rxq_sp *rxq_sp;
+   struct rte_eth_dev *eth_dev;
+
+   RTE_SET_USED(mbufs);
+   RTE_SET_USED(pkts);
+
+   rxq_sp = cnxk_eth_rxq_to_sp(rxq);
+   eth_dev = rxq_sp->dev->eth_dev;
+   nix_ptp_enable_vf(eth_dev);
+
+   return 0;
+}
+
+static int
+cn20k_nix_ptp_info_update_cb(struct roc_nix *nix, bool ptp_en)
+{
+   struct cnxk_eth_dev *dev = (struct cnxk_eth_dev *)nix;
+   struct rte_eth_dev *eth_dev;
+   struct cn20k_eth_rxq *rxq;
+   int i;
+
+   if (!dev)
+   return -EINVAL;
+
+   eth_dev = dev->eth_dev;
+   if (!eth_dev)
+   return -EINVAL;
+
+   dev->ptp_en = ptp_en;
+
+   for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
+   rxq = eth_dev->data->rx_queues[i];
+   rxq->mbuf_initializer = cnxk_nix_rxq_mbuf_setup(dev);
+   }
+
+   if (roc_nix_is_vf_or_sdp(nix) && !(roc_nix_is_sdp(nix)) && 
!(roc_nix_is_lbk(nix))) {
+   /* In case of VF, setting of MTU cannot be done directly in this
+* function as this is running as part of MBOX request(PF->VF)
+* and MTU setting also requires MBOX message to be
+* sent(VF->PF)
+*/
+   eth_dev->rx_pkt_burst = nix_ptp_vf_burst;
+   rte_mb();
+   }
+
+   return 0;
+}
+
 static int
 cn20k_nix_timesync_enable(struct rte_eth_dev *eth_dev)
 {
@@ -451,11 +546,21 @@ cn20k_nix_dev_start(struct rte_eth_dev *eth_dev)
if (rc)
return rc;
 
+   /* Update VF about data off shifted by 8 bytes if PTP already
+* enabled in PF owning this VF
+*/
+   if (dev->ptp_en && (!roc_nix_is_pf(nix) && (!roc_nix_is_sdp(nix
+   nix_ptp_enable_vf(eth_dev);
+
/* Setting up the rx[tx]_offload_flags due to change
 * in rx[tx]_offloads.
 */
dev->rx_offload_flags |= nix_rx_offload_flags(eth_dev);
dev->tx_offload_flags |= nix_tx_offload_flags(eth_dev);
+
+   if (dev->rx_offload_flags & NIX_RX_OFFLOAD_SECURITY_F)
+   cn20k_nix_rx_queue_meta_aura_update(eth_dev);
+
/* Set flags for Rx Inject feature */
if (roc_idev_nix_rx_inject_get(nix->port_id))
dev->rx_offload_flags |= NIX_RX_SEC_REASSEMBLY_F;
@@ -621,6 +726,20 @@ nix_tm_ops_override(void)
  

[PATCH v2 16/18] net/cnxk: support Tx multi-seg in cn20k

[Nithin Dabilpuram]

Add Tx multi-seg support in scalar for cn20k.

Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Jerin Jacob 
Signed-off-by: Rahul Bhansali 
Signed-off-by: Pavan Nikhilesh 
---
 drivers/net/cnxk/cn20k_tx.h | 352 +++-
 1 file changed, 347 insertions(+), 5 deletions(-)

diff --git a/drivers/net/cnxk/cn20k_tx.h b/drivers/net/cnxk/cn20k_tx.h
index 610d64f21b..3f163285f0 100644
--- a/drivers/net/cnxk/cn20k_tx.h
+++ b/drivers/net/cnxk/cn20k_tx.h
@@ -863,6 +863,183 @@ cn20k_nix_xmit_prepare_tstamp(struct cn20k_eth_txq *txq, 
uintptr_t lmt_addr,
}
 }
 
+static __rte_always_inline uint16_t
+cn20k_nix_prepare_mseg(struct cn20k_eth_txq *txq, struct rte_mbuf *m, struct 
rte_mbuf **extm,
+  uint64_t *cmd, const uint16_t flags)
+{
+   uint64_t prefree = 0, aura0, aura, nb_segs, segdw;
+   struct nix_send_hdr_s *send_hdr;
+   union nix_send_sg_s *sg, l_sg;
+   union nix_send_sg2_s l_sg2;
+   struct rte_mbuf *cookie;
+   struct rte_mbuf *m_next;
+   uint8_t off, is_sg2;
+   uint64_t len, dlen;
+   uint64_t ol_flags;
+   uint64_t *slist;
+
+   send_hdr = (struct nix_send_hdr_s *)cmd;
+
+   if (flags & NIX_TX_NEED_EXT_HDR)
+   off = 2;
+   else
+   off = 0;
+
+   sg = (union nix_send_sg_s *)&cmd[2 + off];
+   len = send_hdr->w0.total;
+   if (flags & NIX_TX_OFFLOAD_SECURITY_F)
+   ol_flags = m->ol_flags;
+
+   /* Start from second segment, first segment is already there */
+   dlen = m->data_len;
+   is_sg2 = 0;
+   l_sg.u = sg->u;
+   /* Clear l_sg.u first seg length that might be stale from vector path */
+   l_sg.u &= ~0xUL;
+   l_sg.u |= dlen;
+   len -= dlen;
+   nb_segs = m->nb_segs - 1;
+   m_next = m->next;
+   m->next = NULL;
+   m->nb_segs = 1;
+   slist = &cmd[3 + off + 1];
+
+   cookie = RTE_MBUF_DIRECT(m) ? m : rte_mbuf_from_indirect(m);
+   /* Set invert df if buffer is not to be freed by H/W */
+   if (flags & NIX_TX_OFFLOAD_MBUF_NOFF_F) {
+   aura = send_hdr->w0.aura;
+   prefree = cn20k_nix_prefree_seg(m, extm, txq, send_hdr, &aura);
+   send_hdr->w0.aura = aura;
+   l_sg.i1 = prefree;
+   }
+
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+   /* Mark mempool object as "put" since it is freed by NIX */
+   if (!prefree)
+   RTE_MEMPOOL_CHECK_COOKIES(cookie->pool, (void **)&cookie, 1, 0);
+   rte_io_wmb();
+#else
+   RTE_SET_USED(cookie);
+#endif
+
+   /* Quickly handle single segmented packets. With this if-condition
+* compiler will completely optimize out the below do-while loop
+* from the Tx handler when NIX_TX_MULTI_SEG_F offload is not set.
+*/
+   if (!(flags & NIX_TX_MULTI_SEG_F))
+   goto done;
+
+   aura0 = send_hdr->w0.aura;
+   m = m_next;
+   if (!m)
+   goto done;
+
+   /* Fill mbuf segments */
+   do {
+   uint64_t iova;
+
+   /* Save the current mbuf properties. These can get cleared in
+* cnxk_nix_prefree_seg()
+*/
+   m_next = m->next;
+   iova = rte_mbuf_data_iova(m);
+   dlen = m->data_len;
+   len -= dlen;
+
+   nb_segs--;
+   aura = aura0;
+   prefree = 0;
+
+   m->next = NULL;
+
+   cookie = RTE_MBUF_DIRECT(m) ? m : rte_mbuf_from_indirect(m);
+   if (flags & NIX_TX_OFFLOAD_MBUF_NOFF_F) {
+   aura = roc_npa_aura_handle_to_aura(m->pool->pool_id);
+   prefree = cn20k_nix_prefree_seg(m, extm, txq, send_hdr, 
&aura);
+   is_sg2 = aura != aura0 && !prefree;
+   }
+
+   if (unlikely(is_sg2)) {
+   /* This mbuf belongs to a different pool and
+* DF bit is not to be set, so use SG2 subdesc
+* so that it is freed to the appropriate pool.
+*/
+
+   /* Write the previous descriptor out */
+   sg->u = l_sg.u;
+
+   /* If the current SG subdc does not have any
+* iovas in it, then the SG2 subdc can overwrite
+* that SG subdc.
+*
+* If the current SG subdc has 2 iovas in it, then
+* the current iova word should be left empty.
+*/
+   slist += (-1 + (int)l_sg.segs);
+   sg = (union nix_send_sg_s *)slist;
+
+   l_sg2.u = l_sg.u & 0xC00; /* LD_TYPE */
+   l_sg2.subdc = NIX_SUBDC_SG2;
+   l_sg2.aura = aura;
+   l_sg2.seg1_size = dlen;
+   l_sg.u =

[PATCH v2 17/18] net/cnxk: support Tx burst vector for cn20k

[Nithin Dabilpuram]

Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Jerin Jacob 
Signed-off-by: Rahul Bhansali 
Signed-off-by: Pavan Nikhilesh 
---
 drivers/net/cnxk/cn20k_tx.h | 1445 ++-
 1 file changed, 1441 insertions(+), 4 deletions(-)

diff --git a/drivers/net/cnxk/cn20k_tx.h b/drivers/net/cnxk/cn20k_tx.h
index 3f163285f0..05c8b80fcb 100644
--- a/drivers/net/cnxk/cn20k_tx.h
+++ b/drivers/net/cnxk/cn20k_tx.h
@@ -219,6 +219,28 @@ cn20k_nix_tx_ext_subs(const uint16_t flags)
   ((flags & (NIX_TX_OFFLOAD_VLAN_QINQ_F | 
NIX_TX_OFFLOAD_TSO_F)) ? 1 : 0);
 }
 
+static __rte_always_inline uint8_t
+cn20k_nix_tx_dwords(const uint16_t flags, const uint8_t segdw)
+{
+   if (!(flags & NIX_TX_MULTI_SEG_F))
+   return cn20k_nix_tx_ext_subs(flags) + 2;
+
+   /* Already everything is accounted for in segdw */
+   return segdw;
+}
+
+static __rte_always_inline uint8_t
+cn20k_nix_pkts_per_vec_brst(const uint16_t flags)
+{
+   return ((flags & NIX_TX_NEED_EXT_HDR) ? 2 : 4) << 
ROC_LMT_LINES_PER_CORE_LOG2;
+}
+
+static __rte_always_inline uint8_t
+cn20k_nix_tx_dwords_per_line(const uint16_t flags)
+{
+   return (flags & NIX_TX_NEED_EXT_HDR) ? ((flags & 
NIX_TX_OFFLOAD_TSTAMP_F) ? 8 : 6) : 8;
+}
+
 static __rte_always_inline uint64_t
 cn20k_nix_tx_steor_data(const uint16_t flags)
 {
@@ -247,6 +269,40 @@ cn20k_nix_tx_steor_data(const uint16_t flags)
return data;
 }
 
+static __rte_always_inline uint8_t
+cn20k_nix_tx_dwords_per_line_seg(const uint16_t flags)
+{
+   return ((flags & NIX_TX_NEED_EXT_HDR) ? (flags & 
NIX_TX_OFFLOAD_TSTAMP_F) ? 8 : 6 : 4);
+}
+
+static __rte_always_inline uint64_t
+cn20k_nix_tx_steor_vec_data(const uint16_t flags)
+{
+   const uint64_t dw_m1 = cn20k_nix_tx_dwords_per_line(flags) - 1;
+   uint64_t data;
+
+   /* This will be moved to addr area */
+   data = dw_m1;
+   /* 15 vector sizes for single seg */
+   data |= dw_m1 << 19;
+   data |= dw_m1 << 22;
+   data |= dw_m1 << 25;
+   data |= dw_m1 << 28;
+   data |= dw_m1 << 31;
+   data |= dw_m1 << 34;
+   data |= dw_m1 << 37;
+   data |= dw_m1 << 40;
+   data |= dw_m1 << 43;
+   data |= dw_m1 << 46;
+   data |= dw_m1 << 49;
+   data |= dw_m1 << 52;
+   data |= dw_m1 << 55;
+   data |= dw_m1 << 58;
+   data |= dw_m1 << 61;
+
+   return data;
+}
+
 static __rte_always_inline void
 cn20k_nix_tx_skeleton(struct cn20k_eth_txq *txq, uint64_t *cmd, const uint16_t 
flags,
  const uint16_t static_sz)
@@ -276,6 +332,33 @@ cn20k_nix_tx_skeleton(struct cn20k_eth_txq *txq, uint64_t 
*cmd, const uint16_t f
}
 }
 
+static __rte_always_inline void
+cn20k_nix_sec_fc_wait_one(struct cn20k_eth_txq *txq)
+{
+   uint64_t nb_desc = txq->cpt_desc;
+   uint64_t fc;
+
+#ifdef RTE_ARCH_ARM64
+   asm volatile(PLT_CPU_FEATURE_PREAMBLE
+"  ldxr %[space], [%[addr]]\n"
+"  cmp %[nb_desc], %[space]\n"
+"  b.hi .Ldne%=\n"
+"  sevl\n"
+".Lrty%=:  wfe \n"
+"  ldxr %[space], [%[addr]]\n"
+"  cmp %[nb_desc], %[space]\n"
+"  b.ls .Lrty%=\n"
+".Ldne%=:  \n"
+: [space] "=&r"(fc)
+: [nb_desc] "r"(nb_desc), [addr] "r"(txq->cpt_fc)
+: "memory");
+#else
+   RTE_SET_USED(fc);
+   while (nb_desc <= __atomic_load_n(txq->cpt_fc, __ATOMIC_RELAXED))
+   ;
+#endif
+}
+
 static __rte_always_inline void
 cn20k_nix_sec_fc_wait(struct cn20k_eth_txq *txq, uint16_t nb_pkts)
 {
@@ -346,6 +429,137 @@ cn20k_nix_sec_fc_wait(struct cn20k_eth_txq *txq, uint16_t 
nb_pkts)
 }
 
 #if defined(RTE_ARCH_ARM64)
+static __rte_always_inline void
+cn20k_nix_prep_sec_vec(struct rte_mbuf *m, uint64x2_t *cmd0, uint64x2_t *cmd1,
+  uintptr_t *nixtx_addr, uintptr_t lbase, uint8_t *lnum, 
uint8_t *loff,
+  uint8_t *shft, uint64_t sa_base, const uint16_t flags)
+{
+   struct cn20k_sec_sess_priv sess_priv;
+   uint32_t pkt_len, dlen_adj, rlen;
+   uint8_t l3l4type, chksum;
+   uint64x2_t cmd01, cmd23;
+   uint8_t l2_len, l3_len;
+   uintptr_t dptr, nixtx;
+   uint64_t ucode_cmd[4];
+   uint64_t *laddr, w0;
+   uint16_t tag;
+   uint64_t sa;
+
+   sess_priv.u64 = *rte_security_dynfield(m);
+
+   if (flags & NIX_TX_NEED_SEND_HDR_W1) {
+   /* Extract l3l4type either from il3il4type or ol3ol4type */
+   if (flags & NIX_TX_OFFLOAD_L3_L4_CSUM_F && flags & 
NIX_TX_OFFLOAD_OL3_OL4_CSUM_F) {

[PATCH v2 15/18] net/cnxk: support Tx burst scalar for cn20k

[Nithin Dabilpuram]

Add scalar Tx support for cn20k.

Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Jerin Jacob 
Signed-off-by: Rahul Bhansali 
Signed-off-by: Pavan Nikhilesh 
---
 drivers/net/cnxk/cn20k_ethdev.c | 127 
 drivers/net/cnxk/cn20k_tx.h | 987 +++-
 2 files changed, 1110 insertions(+), 4 deletions(-)

diff --git a/drivers/net/cnxk/cn20k_ethdev.c b/drivers/net/cnxk/cn20k_ethdev.c
index cad7b1316a..011c5f8362 100644
--- a/drivers/net/cnxk/cn20k_ethdev.c
+++ b/drivers/net/cnxk/cn20k_ethdev.c
@@ -361,6 +361,10 @@ static int
 cn20k_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qidx)
 {
struct cn20k_eth_txq *txq = eth_dev->data->tx_queues[qidx];
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   uint16_t flags = dev->tx_offload_flags;
+   struct roc_nix *nix = &dev->nix;
+   uint32_t head = 0, tail = 0;
int rc;
 
rc = cnxk_nix_tx_queue_stop(eth_dev, qidx);
@@ -370,6 +374,20 @@ cn20k_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, 
uint16_t qidx)
/* Clear fc cache pkts to trigger worker stop */
txq->fc_cache_pkts = 0;
 
+   if ((flags & NIX_TX_OFFLOAD_MBUF_NOFF_F) && txq->tx_compl.ena) {
+   struct roc_nix_sq *sq = &dev->sqs[qidx];
+   do {
+   handle_tx_completion_pkts(txq, flags & NIX_TX_VWQE_F);
+   /* Check if SQ is empty */
+   roc_nix_sq_head_tail_get(nix, sq->qid, &head, &tail);
+   if (head != tail)
+   continue;
+
+   /* Check if completion CQ is empty */
+   roc_nix_cq_head_tail_get(nix, sq->cqid, &head, &tail);
+   } while (head != tail);
+   }
+
return 0;
 }
 
@@ -690,6 +708,112 @@ cn20k_rx_descriptor_dump(const struct rte_eth_dev 
*eth_dev, uint16_t qid, uint16
return 0;
 }
 
+static int
+cn20k_nix_tm_mark_vlan_dei(struct rte_eth_dev *eth_dev, int mark_green, int 
mark_yellow,
+  int mark_red, struct rte_tm_error *error)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct roc_nix *roc_nix = &dev->nix;
+   uint64_t mark_fmt, mark_flag;
+   int rc, i;
+
+   rc = cnxk_nix_tm_mark_vlan_dei(eth_dev, mark_green, mark_yellow, 
mark_red, error);
+
+   if (rc)
+   goto exit;
+
+   mark_fmt = roc_nix_tm_mark_format_get(roc_nix, &mark_flag);
+   if (mark_flag) {
+   dev->tx_offload_flags |= NIX_TX_OFFLOAD_VLAN_QINQ_F;
+   dev->tx_mark = true;
+   } else {
+   dev->tx_mark = false;
+   if (!(dev->tx_offloads & RTE_ETH_TX_OFFLOAD_VLAN_INSERT ||
+ dev->tx_offloads & RTE_ETH_TX_OFFLOAD_QINQ_INSERT))
+   dev->tx_offload_flags &= ~NIX_TX_OFFLOAD_VLAN_QINQ_F;
+   }
+
+   for (i = 0; i < eth_dev->data->nb_tx_queues; i++) {
+   struct cn20k_eth_txq *txq = eth_dev->data->tx_queues[i];
+
+   txq->mark_flag = mark_flag & CNXK_TM_MARK_MASK;
+   txq->mark_fmt = mark_fmt & CNXK_TX_MARK_FMT_MASK;
+   }
+   cn20k_eth_set_tx_function(eth_dev);
+exit:
+   return rc;
+}
+
+static int
+cn20k_nix_tm_mark_ip_ecn(struct rte_eth_dev *eth_dev, int mark_green, int 
mark_yellow, int mark_red,
+struct rte_tm_error *error)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct roc_nix *roc_nix = &dev->nix;
+   uint64_t mark_fmt, mark_flag;
+   int rc, i;
+
+   rc = cnxk_nix_tm_mark_ip_ecn(eth_dev, mark_green, mark_yellow, 
mark_red, error);
+   if (rc)
+   goto exit;
+
+   mark_fmt = roc_nix_tm_mark_format_get(roc_nix, &mark_flag);
+   if (mark_flag) {
+   dev->tx_offload_flags |= NIX_TX_OFFLOAD_VLAN_QINQ_F;
+   dev->tx_mark = true;
+   } else {
+   dev->tx_mark = false;
+   if (!(dev->tx_offloads & RTE_ETH_TX_OFFLOAD_VLAN_INSERT ||
+ dev->tx_offloads & RTE_ETH_TX_OFFLOAD_QINQ_INSERT))
+   dev->tx_offload_flags &= ~NIX_TX_OFFLOAD_VLAN_QINQ_F;
+   }
+
+   for (i = 0; i < eth_dev->data->nb_tx_queues; i++) {
+   struct cn20k_eth_txq *txq = eth_dev->data->tx_queues[i];
+
+   txq->mark_flag = mark_flag & CNXK_TM_MARK_MASK;
+   txq->mark_fmt = mark_fmt & CNXK_TX_MARK_FMT_MASK;
+   }
+   cn20k_eth_set_tx_function(eth_dev);
+exit:
+   return rc;
+}
+
+static int
+cn20k_nix_tm_mark_ip_dscp(struct rte_eth_dev *eth_dev, int mark_green, int 
mark_yellow,
+ int mark_red, struct rte_tm_error *error)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct roc_nix *roc_nix = &dev->nix;
+   uint64_t mark_fmt, mark_flag;
+   int rc, i;
+
+   rc = cnxk_nix_tm_mark_ip_dscp(eth_dev, mark_green, mark_yellow, 
mark_red, error);
+   

[PATCH v2 18/18] net/cnxk: support Tx multi-seg in vector for cn20k

[Nithin Dabilpuram]

Add Tx multi-seg support for cn20k.

Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Jerin Jacob 
Signed-off-by: Rahul Bhansali 
Signed-off-by: Pavan Nikhilesh 
---
 drivers/net/cnxk/cn20k_tx.h | 485 ++--
 1 file changed, 463 insertions(+), 22 deletions(-)

diff --git a/drivers/net/cnxk/cn20k_tx.h b/drivers/net/cnxk/cn20k_tx.h
index 05c8b80fcb..9b6a2e62bd 100644
--- a/drivers/net/cnxk/cn20k_tx.h
+++ b/drivers/net/cnxk/cn20k_tx.h
@@ -1717,8 +1717,301 @@ cn20k_nix_xmit_pkts_mseg(void *tx_queue, uint64_t *ws, 
struct rte_mbuf **tx_pkts
 
 #if defined(RTE_ARCH_ARM64)
 
+static __rte_always_inline void
+cn20k_nix_prepare_tso(struct rte_mbuf *m, union nix_send_hdr_w1_u *w1, union 
nix_send_ext_w0_u *w0,
+ uint64_t ol_flags, const uint64_t flags, const uint64_t 
lso_tun_fmt)
+{
+   uint16_t lso_sb;
+   uint64_t mask;
+
+   if (!(ol_flags & RTE_MBUF_F_TX_TCP_SEG))
+   return;
+
+   mask = -(!w1->il3type);
+   lso_sb = (mask & w1->ol4ptr) + (~mask & w1->il4ptr) + m->l4_len;
+
+   w0->u |= BIT(14);
+   w0->lso_sb = lso_sb;
+   w0->lso_mps = m->tso_segsz;
+   w0->lso_format = NIX_LSO_FORMAT_IDX_TSOV4 + !!(ol_flags & 
RTE_MBUF_F_TX_IPV6);
+   w1->ol4type = NIX_SENDL4TYPE_TCP_CKSUM;
+
+   /* Handle tunnel tso */
+   if ((flags & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F) && (ol_flags & 
RTE_MBUF_F_TX_TUNNEL_MASK)) {
+   const uint8_t is_udp_tun = (CNXK_NIX_UDP_TUN_BITMASK >>
+   ((ol_flags & 
RTE_MBUF_F_TX_TUNNEL_MASK) >> 45)) &
+  0x1;
+   uint8_t shift = is_udp_tun ? 32 : 0;
+
+   shift += (!!(ol_flags & RTE_MBUF_F_TX_OUTER_IPV6) << 4);
+   shift += (!!(ol_flags & RTE_MBUF_F_TX_IPV6) << 3);
+
+   w1->il4type = NIX_SENDL4TYPE_TCP_CKSUM;
+   w1->ol4type = is_udp_tun ? NIX_SENDL4TYPE_UDP_CKSUM : 0;
+   /* Update format for UDP tunneled packet */
+
+   w0->lso_format = (lso_tun_fmt >> shift);
+   }
+}
+
+static __rte_always_inline uint16_t
+cn20k_nix_prepare_mseg_vec_noff(struct cn20k_eth_txq *txq, struct rte_mbuf *m,
+   struct rte_mbuf **extm, uint64_t *cmd, 
uint64x2_t *cmd0,
+   uint64x2_t *cmd1, uint64x2_t *cmd2, uint64x2_t 
*cmd3,
+   const uint32_t flags)
+{
+   uint16_t segdw;
+
+   vst1q_u64(cmd, *cmd0); /* Send hdr */
+   if (flags & NIX_TX_NEED_EXT_HDR) {
+   vst1q_u64(cmd + 2, *cmd2); /* ext hdr */
+   vst1q_u64(cmd + 4, *cmd1); /* sg */
+   } else {
+   vst1q_u64(cmd + 2, *cmd1); /* sg */
+   }
+
+   segdw = cn20k_nix_prepare_mseg(txq, m, extm, cmd, flags);
+
+   if (flags & NIX_TX_OFFLOAD_TSTAMP_F)
+   vst1q_u64(cmd + segdw * 2 - 2, *cmd3);
+
+   return segdw;
+}
+
+static __rte_always_inline void
+cn20k_nix_prepare_mseg_vec_list(struct rte_mbuf *m, uint64_t *cmd, union 
nix_send_hdr_w0_u *sh,
+   union nix_send_sg_s *sg, const uint32_t flags)
+{
+   struct rte_mbuf *m_next;
+   uint64_t ol_flags, len;
+   uint64_t *slist, sg_u;
+   uint16_t nb_segs;
+   uint64_t dlen;
+   int i = 1;
+
+   len = m->pkt_len;
+   ol_flags = m->ol_flags;
+   /* For security we would have already populated the right length */
+   if (flags & NIX_TX_OFFLOAD_SECURITY_F && ol_flags & 
RTE_MBUF_F_TX_SEC_OFFLOAD)
+   len = sh->total;
+   sh->total = len;
+   /* Clear sg->u header before use */
+   sg->u &= 0xFC00;
+   sg_u = sg->u;
+   slist = &cmd[0];
+
+   dlen = m->data_len;
+   len -= dlen;
+   sg_u = sg_u | ((uint64_t)dlen);
+
+   /* Mark mempool object as "put" since it is freed by NIX */
+   RTE_MEMPOOL_CHECK_COOKIES(m->pool, (void **)&m, 1, 0);
+
+   nb_segs = m->nb_segs - 1;
+   m_next = m->next;
+   m->next = NULL;
+   m->nb_segs = 1;
+   m = m_next;
+   /* Fill mbuf segments */
+   do {
+   m_next = m->next;
+   dlen = m->data_len;
+   len -= dlen;
+   sg_u = sg_u | ((uint64_t)dlen << (i << 4));
+   *slist = rte_mbuf_data_iova(m);
+   slist++;
+   i++;
+   nb_segs--;
+   if (i > 2 && nb_segs) {
+   i = 0;
+   /* Next SG subdesc */
+   *(uint64_t *)slist = sg_u & 0xFC00;
+   sg->u = sg_u;
+   sg->segs = 3;
+   sg = (union nix_send_sg_s *)slist;
+   sg_u = sg->u;
+   slist++;
+   }
+   m->next = NULL;
+   /* Mark mempool object as "put" since it is freed by NIX */
+   RTE_MEMPOOL_CHECK_COOKIES(m->pool, (void 

[PATCH v2 00/18] add Marvell cn20k SOC support for mempool and net

[Nithin Dabilpuram]

This series adds support for Marvell cn20k SOC for mempool and
net PMD's.

This series also adds few net/cnxk PMD updates to expose IPsec
features supported by HW that are very custom in nature and
some enhancements for cn10k.


Ashwin Sekhar T K (4):
  mempool/cnxk: add cn20k PCI device ids
  common/cnxk: accommodate change in aura field width
  common/cnxk: use new NPA aq enq mbox for cn20k
  mempool/cnxk: initialize mempool ops for cn20k

Nithin Dabilpuram (9):
  net/cnxk: add cn20k base control path support
  net/cnxk: support Rx function select for cn20k
  net/cnxk: support Tx function select for cn20k
  net/cnxk: support Rx burst scalar for cn20k
  net/cnxk: support Rx burst vector for cn20k
  net/cnxk: support Tx burst scalar for cn20k
  net/cnxk: support Tx multi-seg in cn20k
  net/cnxk: support Tx burst vector for cn20k
  net/cnxk: support Tx multi-seg in vector for cn20k

Satha Rao (5):
  common/cnxk: add cn20k NIX register definitions
  common/cnxk: support NIX queue config for cn20k
  common/cnxk: support bandwidth profile for cn20k
  common/cnxk: support NIX debug for cn20k
  common/cnxk: add RSS support for cn20k

v2:
- Moved out 15 patches to seperate series
- Updated release notes

 doc/guides/rel_notes/release_24_11.rst|8 +
 drivers/common/cnxk/cnxk_telemetry_nix.c  |  260 +-
 drivers/common/cnxk/hw/nix.h  |  524 ++-
 drivers/common/cnxk/hw/npa.h  |  164 +-
 drivers/common/cnxk/hw/rvu.h  |7 +-
 drivers/common/cnxk/roc_mbox.h|   84 +
 drivers/common/cnxk/roc_nix.c |   15 +-
 drivers/common/cnxk/roc_nix_bpf.c |  528 ++-
 drivers/common/cnxk/roc_nix_debug.c   |  243 +-
 drivers/common/cnxk/roc_nix_fc.c  |  106 +-
 drivers/common/cnxk/roc_nix_inl.c |2 +
 drivers/common/cnxk/roc_nix_priv.h|4 +-
 drivers/common/cnxk/roc_nix_queue.c   |  638 ++-
 drivers/common/cnxk/roc_nix_rss.c |   74 +-
 drivers/common/cnxk/roc_nix_stats.c   |   55 +-
 drivers/common/cnxk/roc_nix_tm.c  |   22 +-
 drivers/common/cnxk/roc_nix_tm_ops.c  |   29 +-
 drivers/common/cnxk/roc_npa.c |  100 +-
 drivers/common/cnxk/roc_npa.h |   24 +-
 drivers/common/cnxk/roc_npa_debug.c   |   17 +-
 drivers/mempool/cnxk/cnxk_mempool.c   |2 +
 drivers/mempool/cnxk/cnxk_mempool_ops.c   |2 +-
 drivers/net/cnxk/cn20k_ethdev.c   |  943 +
 drivers/net/cnxk/cn20k_ethdev.h   |   15 +
 drivers/net/cnxk/cn20k_rx.h   | 1100 ++
 drivers/net/cnxk/cn20k_rx_select.c|  160 +
 drivers/net/cnxk/cn20k_rxtx.h |  245 ++
 drivers/net/cnxk/cn20k_tx.h   | 3471 +
 drivers/net/cnxk/cn20k_tx_select.c|  122 +
 drivers/net/cnxk/cnxk_ethdev_dp.h |3 +
 drivers/net/cnxk/meson.build  |   92 +-
 drivers/net/cnxk/rx/cn20k/rx_0_15.c   |   20 +
 drivers/net/cnxk/rx/cn20k/rx_0_15_mseg.c  |   20 +
 drivers/net/cnxk/rx/cn20k/rx_0_15_vec.c   |   20 +
 drivers/net/cnxk/rx/cn20k/rx_0_15_vec_mseg.c  |   20 +
 drivers/net/cnxk/rx/cn20k/rx_112_127.c|   20 +
 drivers/net/cnxk/rx/cn20k/rx_112_127_mseg.c   |   20 +
 drivers/net/cnxk/rx/cn20k/rx_112_127_vec.c|   20 +
 .../net/cnxk/rx/cn20k/rx_112_127_vec_mseg.c   |   20 +
 drivers/net/cnxk/rx/cn20k/rx_16_31.c  |   20 +
 drivers/net/cnxk/rx/cn20k/rx_16_31_mseg.c |   20 +
 drivers/net/cnxk/rx/cn20k/rx_16_31_vec.c  |   20 +
 drivers/net/cnxk/rx/cn20k/rx_16_31_vec_mseg.c |   20 +
 drivers/net/cnxk/rx/cn20k/rx_32_47.c  |   20 +
 drivers/net/cnxk/rx/cn20k/rx_32_47_mseg.c |   20 +
 drivers/net/cnxk/rx/cn20k/rx_32_47_vec.c  |   20 +
 drivers/net/cnxk/rx/cn20k/rx_32_47_vec_mseg.c |   20 +
 drivers/net/cnxk/rx/cn20k/rx_48_63.c  |   20 +
 drivers/net/cnxk/rx/cn20k/rx_48_63_mseg.c |   20 +
 drivers/net/cnxk/rx/cn20k/rx_48_63_vec.c  |   20 +
 drivers/net/cnxk/rx/cn20k/rx_48_63_vec_mseg.c |   20 +
 drivers/net/cnxk/rx/cn20k/rx_64_79.c  |   20 +
 drivers/net/cnxk/rx/cn20k/rx_64_79_mseg.c |   20 +
 drivers/net/cnxk/rx/cn20k/rx_64_79_vec.c  |   20 +
 drivers/net/cnxk/rx/cn20k/rx_64_79_vec_mseg.c |   20 +
 drivers/net/cnxk/rx/cn20k/rx_80_95.c  |   20 +
 drivers/net/cnxk/rx/cn20k/rx_80_95_mseg.c |   20 +
 drivers/net/cnxk/rx/cn20k/rx_80_95_vec.c  |   20 +
 drivers/net/cnxk/rx/cn20k/rx_80_95_vec_mseg.c |   20 +
 drivers/net/cnxk/rx/cn20k/rx_96_111.c |   20 +
 drivers/net/cnxk/rx/cn20k/rx_96_111_mseg.c|   20 +
 drivers/net/cnxk/rx/cn20k/rx_96_111_vec.c |   20 +
 .../net/cnxk/rx/cn20k/rx_96_111_vec_mseg.c|   20 +
 drivers/net/cnxk/rx/cn20k/rx_all_offload.c|   57 +
 drivers/net/cnxk/tx/cn20k/tx_0_15.c   |   18 +
 drivers/net/cnxk/tx/cn20k/tx_0_15_mseg.c  |   18 +
 drivers/net/cnxk/tx/cn20k/tx_0_15_vec

Re: [PATCH v1] dts: add send_packets to test_suite

[Patrick Robb]

Recheck-request: iol-mellanox-Performance

When I enabled this test on Monday I accidentally set the delta threshold
to 1.5% instead of 5%. So the accepted results window was too small and led
to this false positive test fail.

[PATCH v7 1/1] dts: add text parser for testpmd verbose output

[jspewock]

From: Jeremy Spewock 

Multiple test suites from the old DTS framework rely on being able to
consume and interpret the verbose output of testpmd. The new framework
doesn't have an elegant way for handling the verbose output, but test
suites are starting to be written that rely on it. This patch creates a
TextParser class that can be used to extract the verbose information
from any testpmd output and also adjusts the `stop` method of the shell
to return all output that it collected.

Signed-off-by: Jeremy Spewock 
---
 dts/framework/remote_session/testpmd_shell.py | 563 +-
 dts/framework/utils.py|   3 +
 2 files changed, 564 insertions(+), 2 deletions(-)

diff --git a/dts/framework/remote_session/testpmd_shell.py 
b/dts/framework/remote_session/testpmd_shell.py
index 77902a468d..55efc9d455 100644
--- a/dts/framework/remote_session/testpmd_shell.py
+++ b/dts/framework/remote_session/testpmd_shell.py
@@ -32,7 +32,7 @@
 from framework.settings import SETTINGS
 from framework.testbed_model.cpu import LogicalCoreCount, LogicalCoreList
 from framework.testbed_model.sut_node import SutNode
-from framework.utils import StrEnum
+from framework.utils import REGEX_FOR_MAC_ADDRESS, StrEnum
 
 P = ParamSpec("P")
 TestPmdShellMethod = Callable[Concatenate["TestPmdShell", P], Any]
@@ -581,6 +581,532 @@ class TestPmdPortStats(TextParser):
 tx_bps: int = field(metadata=TextParser.find_int(r"Tx-bps:\s+(\d+)"))
 
 
+class PacketOffloadFlag(Flag):
+"""Flag representing the Packet Offload Features Flags in DPDK.
+
+Values in this class are taken from the definitions in the RTE MBUF core 
library in DPDK
+located in ``lib/mbuf/rte_mbuf_core.h``. It is expected that flag values 
in this class will
+match the values they are set to in said DPDK library with one exception; 
all values must be
+unique. For example, the definitions for unknown checksum flags in 
``rte_mbuf_core.h`` are all
+set to :data:`0`, but it is valuable to distinguish between them in this 
framework. For this
+reason flags that are not unique in the DPDK library are set either to 
values within the
+RTE_MBUF_F_FIRST_FREE-RTE_MBUF_F_LAST_FREE range for Rx or shifted 61+ 
bits for Tx.
+
+References:
+DPDK lib: ``lib/mbuf/rte_mbuf_core.h``
+"""
+
+# RX flags
+
+#: The RX packet is a 802.1q VLAN packet, and the tci has been saved in 
mbuf->vlan_tci. If the
+#: flag RTE_MBUF_F_RX_VLAN_STRIPPED is also present, the VLAN header has 
been stripped from
+#: mbuf data, else it is still present.
+RTE_MBUF_F_RX_VLAN = auto()
+
+#: RX packet with RSS hash result.
+RTE_MBUF_F_RX_RSS_HASH = auto()
+
+#: RX packet with FDIR match indicate.
+RTE_MBUF_F_RX_FDIR = auto()
+
+#: This flag is set when the outermost IP header checksum is detected as 
wrong by the hardware.
+RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD = 1 << 5
+
+#: A vlan has been stripped by the hardware and its tci is saved in 
mbuf->vlan_tci. This can
+#: only happen if vlan stripping is enabled in the RX configuration of the 
PMD. When
+#: RTE_MBUF_F_RX_VLAN_STRIPPED is set, RTE_MBUF_F_RX_VLAN must also be set.
+RTE_MBUF_F_RX_VLAN_STRIPPED = auto()
+
+#: No information about the RX IP checksum. Value is 0 in the DPDK library.
+RTE_MBUF_F_RX_IP_CKSUM_UNKNOWN = 1 << 23
+#: The IP checksum in the packet is wrong.
+RTE_MBUF_F_RX_IP_CKSUM_BAD = 1 << 4
+#: The IP checksum in the packet is valid.
+RTE_MBUF_F_RX_IP_CKSUM_GOOD = 1 << 7
+#: The IP checksum is not correct in the packet data, but the integrity of 
the IP header is
+#: verified. Value is RTE_MBUF_F_RX_IP_CKSUM_BAD | 
RTE_MBUF_F_RX_IP_CKSUM_GOOD in the DPDK
+#: library.
+RTE_MBUF_F_RX_IP_CKSUM_NONE = 1 << 24
+
+#: No information about the RX L4 checksum. Value is 0 in the DPDK library.
+RTE_MBUF_F_RX_L4_CKSUM_UNKNOWN = 1 << 25
+#: The L4 checksum in the packet is wrong.
+RTE_MBUF_F_RX_L4_CKSUM_BAD = 1 << 3
+#: The L4 checksum in the packet is valid.
+RTE_MBUF_F_RX_L4_CKSUM_GOOD = 1 << 8
+#: The L4 checksum is not correct in the packet data, but the integrity of 
the L4 data is
+#: verified. Value is RTE_MBUF_F_RX_L4_CKSUM_BAD | 
RTE_MBUF_F_RX_L4_CKSUM_GOOD in the DPDK
+#: library.
+RTE_MBUF_F_RX_L4_CKSUM_NONE = 1 << 26
+
+#: RX IEEE1588 L2 Ethernet PT Packet.
+RTE_MBUF_F_RX_IEEE1588_PTP = 1 << 9
+#: RX IEEE1588 L2/L4 timestamped packet.
+RTE_MBUF_F_RX_IEEE1588_TMST = 1 << 10
+
+#: FD id reported if FDIR match.
+RTE_MBUF_F_RX_FDIR_ID = 1 << 13
+#: Flexible bytes reported if FDIR match.
+RTE_MBUF_F_RX_FDIR_FLX = 1 << 14
+
+#: If both RTE_MBUF_F_RX_QINQ_STRIPPED and RTE_MBUF_F_RX_VLAN_STRIPPED are 
set, the 2 VLANs
+#: have been stripped by the hardware. If RTE_MBUF_F_RX_QINQ_STRIPPED is 
set and
+#: RTE_MBUF_F_RX_VLAN_STRIPPED is unset, only the outer VLAN is removed 
from packet data.
+RTE_MBUF_F

[PATCH v2 04/18] mempool/cnxk: initialize mempool ops for cn20k

[Nithin Dabilpuram]

From: Ashwin Sekhar T K 

Initialize mempool ops for cn20k.

Signed-off-by: Ashwin Sekhar T K 
---
 drivers/mempool/cnxk/cnxk_mempool_ops.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mempool/cnxk/cnxk_mempool_ops.c 
b/drivers/mempool/cnxk/cnxk_mempool_ops.c
index a1aeaee746..bb35e2d1d2 100644
--- a/drivers/mempool/cnxk/cnxk_mempool_ops.c
+++ b/drivers/mempool/cnxk/cnxk_mempool_ops.c
@@ -192,7 +192,7 @@ cnxk_mempool_plt_init(void)
 
if (roc_model_is_cn9k()) {
rte_mbuf_set_platform_mempool_ops("cn9k_mempool_ops");
-   } else if (roc_model_is_cn10k()) {
+   } else if (roc_model_is_cn10k() || roc_model_is_cn20k()) {
rte_mbuf_set_platform_mempool_ops("cn10k_mempool_ops");
rc = cn10k_mempool_plt_init();
}
-- 
2.34.1

Re: [PATCH v8 8/8] net/hns3: support filter registers by module names

[Jie Hai]

Hi, fengchengwen,

Thanks for your review.

On 2024/9/26 9:46, fengchengwen wrote:

On 2024/9/25 14:40, Jie Hai wrote:

This patch support dumping registers which module name is the
`filter` string. The module names are in lower case and so is
the `filter`. Available module names are cmdq, common_pf,
common_vf, ring, tqp_intr, 32_bit_dfx, 64_bit_dfx, bios, igu_egu,
ssu, ppp, rpu, ncsi, rtc, rcb, etc.

Signed-off-by: Jie Hai
---
  doc/guides/nics/hns3.rst |   7 +
  drivers/net/hns3/hns3_regs.c | 257 ---
  2 files changed, 157 insertions(+), 107 deletions(-)

diff --git a/doc/guides/nics/hns3.rst b/doc/guides/nics/hns3.rst
index 97b4686bfabe..20765bd7d145 100644
--- a/doc/guides/nics/hns3.rst
+++ b/doc/guides/nics/hns3.rst
@@ -407,6 +407,13 @@ be provided to avoid scheduling the CPU core used by DPDK 
application threads fo
  other tasks. Before starting the Linux OS, add the kernel isolation boot 
parameter.
  For example, "isolcpus=1-18 nohz_full=1-18 rcu_nocbs=1-18".
  
+Dump registers

+--
+HNS3 supports dumping registers values with their names, and suppotrt filtering

typo of suppotrt


Will correct in V9.

+by module names. The available modules are ``bios``, ``ssu``, ``igu_egu``,

The available modules names?


+``rpu``, ``ncsi``, ``rtc``, ``ppp``, ``rcb``, ``tqp``, ``rtc``, ``cmdq``,
+``common_pf``, ``common_vf``, ``ring``, ``tqp_intr``, ``32_bit_dfx``,
+``64_bit_dfx``, etc.

etc means there are more which don't list above, please don't add it because 
the doc should contain all modules names.


Will remove 'etc' in V9.
  
  Limitations or Known issues

  ---



+static void
+hns3_get_module_names(char *names, uint32_t len)
+{
+   size_t i;
+
+   for (i = 0; i < RTE_DIM(hns3_module_name_map); i++) {
+   strlcat(names, " ", len);
+   strlcat(names, hns3_module_name_map[i].name, len);
+   }
+}
+
+static uint32_t
+hns3_parse_modules_by_filter(struct hns3_hw *hw, const char *filter)
+{
+   struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
+   char names[HNS3_MAX_MODULES_LEN] = {0};
+   uint32_t modules = 0;
+   size_t i;
+
+   if (filter == NULL) {
+   modules = (1 << RTE_DIM(hns3_reg_lists)) - 1;
+   } else {
+   for (i = 0; i < RTE_DIM(hns3_module_name_map); i++) {
+   if (strcmp(filter, hns3_module_name_map[i].name) == 0) {
+   modules |= hns3_module_name_map[i].module;
+   break;
+   }
+   }
+   }
+
+   if (hns->is_vf)
+   modules &= HNS3_VF_MODULES;
+   else
+   modules &= ~HNS3_VF_ONLY_MODULES;
+   if (modules == 0) {
+   hns3_get_module_names(names, HNS3_MAX_MODULES_LEN);

the name is NULL.


I am not sure what problem it is.
You mean the parameter names of hns3_get_module_names?
It is an array and not null for sure. And it is used for the names of 
all modules.

+   hns3_err(hw, "mismatched module name! Available names 
are:\n%s.",

hns3_err already contain \n, please remove this.

This is a new line between the above expression and the name list
to prevent the overall output from being too long.
Not the last of the expression.



+names);
+   }
+   return modules;
  }
  

[PATCH v9 0/8] support dump reigster names and filter

[Jie Hai]

The registers can be dumped through the API rte_eth_dev_get_reg_info.
However, only register values are exported, which is inconvenient for
users to interpret. Therefore, an extension of the structure
"rte_dev_reg_info" and a new API rte_eth_dev_get_reg_info_ext is added
to support the capability of exporting the name of the corresponding
register and filtering by module names.

--
v9:
1. add Acked-by.
2. fix typo and inaccurate expression of hns3.rst.

v8:
1. fix typo on patch[0/8].
2. add Reviewed-bys and Acked-bys.
3. fix potentital memory leak and error information on telemetry.
4. fix on reviews about hns3 driver.

v7: fix doc indention.
--

Jie Hai (8):
  ethdev: support report register names and filter
  ethdev: add telemetry cmd for registers
  net/hns3: remove some basic address dump
  net/hns3: fix dump counter of registers
  net/hns3: remove separators between register module
  net/hns3: refactor register dump
  net/hns3: support report names of registers
  net/hns3: support filter registers by module names

 doc/guides/nics/hns3.rst   |7 +
 doc/guides/rel_notes/release_24_11.rst |8 +
 drivers/net/hns3/hns3_regs.c   | 1384 +++-
 lib/ethdev/ethdev_trace.h  |2 +
 lib/ethdev/rte_dev_info.h  |   11 +
 lib/ethdev/rte_ethdev.c|   38 +
 lib/ethdev/rte_ethdev.h|   29 +
 lib/ethdev/rte_ethdev_telemetry.c  |  130 +++
 lib/ethdev/version.map |1 +
 9 files changed, 1344 insertions(+), 266 deletions(-)

-- 
2.33.0

[PATCH v9 1/8] ethdev: support report register names and filter

[Jie Hai]

This patch adds "filter" and "names" fields to "rte_dev_reg_info"
structure. Names of registers in data fields can be reported and
the registers can be filtered by their module names.

The new API rte_eth_dev_get_reg_info_ext() is added to support
reporting names and filtering by modules. And the original API
rte_eth_dev_get_reg_info() does not use the names and filter fields.
A local variable is used in rte_eth_dev_get_reg_info for
compatibility. If the drivers does not report the names, set them
to "index_XXX", which means the location in the register table.

Signed-off-by: Jie Hai 
Acked-by: Huisong Li 
Acked-by: Chengwen Feng 
Reviewed-by: Ferruh Yigit 
---
 doc/guides/rel_notes/release_24_11.rst |  8 ++
 lib/ethdev/ethdev_trace.h  |  2 ++
 lib/ethdev/rte_dev_info.h  | 11 
 lib/ethdev/rte_ethdev.c| 38 ++
 lib/ethdev/rte_ethdev.h| 29 
 lib/ethdev/version.map |  1 +
 6 files changed, 89 insertions(+)

diff --git a/doc/guides/rel_notes/release_24_11.rst 
b/doc/guides/rel_notes/release_24_11.rst
index 5dd575fb39df..85960e71d0ca 100644
--- a/doc/guides/rel_notes/release_24_11.rst
+++ b/doc/guides/rel_notes/release_24_11.rst
@@ -60,6 +60,11 @@ New Features
   * Added SR-IOV VF support.
   * Added recent 1400/14000 and 15000 models to the supported list.
 
+* **Added support for dumping registers with names and filtering by modules.**
+
+  Added new API functions ``rte_eth_dev_get_reg_info_ext()`` to filter the
+  registers by module names and get the information (names, values and other
+  attributes) of the filtered registers.
 
 Removed Items
 -
@@ -108,6 +113,9 @@ ABI Changes
Also, make sure to start the actual text at the margin.
===
 
+* ethdev: Added ``filter`` and ``names`` fields to ``rte_dev_reg_info``
+  structure for filtering by modules and reporting names of registers.
+
 
 Known Issues
 
diff --git a/lib/ethdev/ethdev_trace.h b/lib/ethdev/ethdev_trace.h
index 3bec87bfdb70..0c4780a09ef5 100644
--- a/lib/ethdev/ethdev_trace.h
+++ b/lib/ethdev/ethdev_trace.h
@@ -1152,6 +1152,8 @@ RTE_TRACE_POINT(
rte_trace_point_emit_u32(info->length);
rte_trace_point_emit_u32(info->width);
rte_trace_point_emit_u32(info->version);
+   rte_trace_point_emit_ptr(info->names);
+   rte_trace_point_emit_ptr(info->filter);
rte_trace_point_emit_int(ret);
 )
 
diff --git a/lib/ethdev/rte_dev_info.h b/lib/ethdev/rte_dev_info.h
index 67cf0ae52668..26b777f9836e 100644
--- a/lib/ethdev/rte_dev_info.h
+++ b/lib/ethdev/rte_dev_info.h
@@ -11,6 +11,11 @@ extern "C" {
 
 #include 
 
+#define RTE_ETH_REG_NAME_SIZE 64
+struct rte_eth_reg_name {
+   char name[RTE_ETH_REG_NAME_SIZE];
+};
+
 /*
  * Placeholder for accessing device registers
  */
@@ -20,6 +25,12 @@ struct rte_dev_reg_info {
uint32_t length; /**< Number of registers to fetch */
uint32_t width; /**< Size of device register */
uint32_t version; /**< Device version */
+   /**
+* Name of target module, filter for target subset of registers.
+* This field could affects register selection for data/length/names.
+*/
+   const char *filter;
+   struct rte_eth_reg_name *names; /**< Registers name saver */
 };
 
 /*
diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
index f1c658f49e80..30ca4a0043c5 100644
--- a/lib/ethdev/rte_ethdev.c
+++ b/lib/ethdev/rte_ethdev.c
@@ -6388,8 +6388,37 @@ rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
 
 int
 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
+{
+   struct rte_dev_reg_info reg_info = { 0 };
+   int ret;
+
+   if (info == NULL) {
+   RTE_ETHDEV_LOG_LINE(ERR,
+   "Cannot get ethdev port %u register info to NULL",
+   port_id);
+   return -EINVAL;
+   }
+
+   reg_info.length = info->length;
+   reg_info.data = info->data;
+
+   ret = rte_eth_dev_get_reg_info_ext(port_id, ®_info);
+   if (ret != 0)
+   return ret;
+
+   info->length = reg_info.length;
+   info->width = reg_info.width;
+   info->version = reg_info.version;
+   info->offset = reg_info.offset;
+
+   return 0;
+}
+
+int
+rte_eth_dev_get_reg_info_ext(uint16_t port_id, struct rte_dev_reg_info *info)
 {
struct rte_eth_dev *dev;
+   uint32_t i;
int ret;
 
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
@@ -6402,12 +6431,21 @@ rte_eth_dev_get_reg_info(uint16_t port_id, struct 
rte_dev_reg_info *info)
return -EINVAL;
}
 
+   if (info->names != NULL && info->length != 0)
+   memset(info->names, 0, sizeof(struct rte_eth_reg_name) * 
info->length);
+
if (*dev->dev_ops->get_reg == NULL)
return -ENOTSUP;
ret

[PATCH v9 5/8] net/hns3: remove separators between register module

[Jie Hai]

Since the driver is going to support reporting names of
all registers, remove the counter and insert of separators
between different register modules.

Signed-off-by: Jie Hai 
Reviewed-by: Huisong Li 
Acked-by: Chengwen Feng 
---
 drivers/net/hns3/hns3_regs.c | 68 ++--
 1 file changed, 18 insertions(+), 50 deletions(-)

diff --git a/drivers/net/hns3/hns3_regs.c b/drivers/net/hns3/hns3_regs.c
index d9c546470dbe..c8e3fb118e4b 100644
--- a/drivers/net/hns3/hns3_regs.c
+++ b/drivers/net/hns3/hns3_regs.c
@@ -10,12 +10,9 @@
 #include "hns3_rxtx.h"
 #include "hns3_regs.h"
 
-#define MAX_SEPARATE_NUM   4
-#define SEPARATOR_VALUE0x
-#define REG_NUM_PER_LINE   4
-#define REG_LEN_PER_LINE   (REG_NUM_PER_LINE * sizeof(uint32_t))
+#define HNS3_64_BIT_REG_OUTPUT_SIZE (sizeof(uint64_t) / sizeof(uint32_t))
 
-static int hns3_get_dfx_reg_line(struct hns3_hw *hw, uint32_t *lines);
+static int hns3_get_dfx_reg_cnt(struct hns3_hw *hw, uint32_t *count);
 
 static const uint32_t cmdq_reg_addrs[] = {HNS3_CMDQ_TX_DEPTH_REG,
  HNS3_CMDQ_TX_TAIL_REG,
@@ -111,23 +108,21 @@ static int
 hns3_get_regs_length(struct hns3_hw *hw, uint32_t *length)
 {
struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
-   uint32_t cmdq_lines, common_lines, ring_lines, tqp_intr_lines;
uint32_t regs_num_32_bit, regs_num_64_bit;
-   uint32_t dfx_reg_lines;
+   uint32_t dfx_reg_cnt;
+   uint32_t common_cnt;
uint32_t len;
int ret;
 
-   cmdq_lines = sizeof(cmdq_reg_addrs) / REG_LEN_PER_LINE + 1;
if (hns->is_vf)
-   common_lines =
-   sizeof(common_vf_reg_addrs) / REG_LEN_PER_LINE + 1;
+   common_cnt = sizeof(common_vf_reg_addrs);
else
-   common_lines = sizeof(common_reg_addrs) / REG_LEN_PER_LINE + 1;
-   ring_lines = sizeof(ring_reg_addrs) / REG_LEN_PER_LINE + 1;
-   tqp_intr_lines = sizeof(tqp_intr_reg_addrs) / REG_LEN_PER_LINE + 1;
+   common_cnt = sizeof(common_reg_addrs);
 
-   len = (cmdq_lines + common_lines + ring_lines * hw->tqps_num +
- tqp_intr_lines * hw->intr_tqps_num) * REG_NUM_PER_LINE;
+   len = sizeof(cmdq_reg_addrs) + common_cnt +
+   sizeof(ring_reg_addrs) * hw->tqps_num +
+   sizeof(tqp_intr_reg_addrs) * hw->intr_tqps_num;
+   len /= sizeof(uint32_t);
 
if (!hns->is_vf) {
ret = hns3_get_regs_num(hw, ®s_num_32_bit, ®s_num_64_bit);
@@ -136,18 +131,16 @@ hns3_get_regs_length(struct hns3_hw *hw, uint32_t *length)
 "ret = %d.", ret);
return ret;
}
-   dfx_reg_lines = regs_num_32_bit * sizeof(uint32_t) /
-   REG_LEN_PER_LINE + 1;
-   dfx_reg_lines += regs_num_64_bit * sizeof(uint64_t) /
-   REG_LEN_PER_LINE + 1;
+   dfx_reg_cnt = regs_num_32_bit +
+ regs_num_64_bit * HNS3_64_BIT_REG_OUTPUT_SIZE;
 
-   ret = hns3_get_dfx_reg_line(hw, &dfx_reg_lines);
+   ret = hns3_get_dfx_reg_cnt(hw, &dfx_reg_cnt);
if (ret) {
hns3_err(hw, "fail to get the number of dfx registers, "
 "ret = %d.", ret);
return ret;
}
-   len += dfx_reg_lines * REG_NUM_PER_LINE;
+   len += dfx_reg_cnt;
}
 
*length = len;
@@ -268,18 +261,6 @@ hns3_get_64_bit_regs(struct hns3_hw *hw, uint32_t 
regs_num, void *data)
return 0;
 }
 
-static int
-hns3_insert_reg_separator(int reg_num, uint32_t *data)
-{
-   int separator_num;
-   int i;
-
-   separator_num = MAX_SEPARATE_NUM - reg_num % REG_NUM_PER_LINE;
-   for (i = 0; i < separator_num; i++)
-   *data++ = SEPARATOR_VALUE;
-   return separator_num;
-}
-
 static int
 hns3_direct_access_regs(struct hns3_hw *hw, uint32_t *data)
 {
@@ -294,7 +275,6 @@ hns3_direct_access_regs(struct hns3_hw *hw, uint32_t *data)
reg_num = sizeof(cmdq_reg_addrs) / sizeof(uint32_t);
for (i = 0; i < reg_num; i++)
*data++ = hns3_read_dev(hw, cmdq_reg_addrs[i]);
-   data += hns3_insert_reg_separator(reg_num, data);
 
if (hns->is_vf)
reg_num = sizeof(common_vf_reg_addrs) / sizeof(uint32_t);
@@ -305,7 +285,6 @@ hns3_direct_access_regs(struct hns3_hw *hw, uint32_t *data)
*data++ = hns3_read_dev(hw, common_vf_reg_addrs[i]);
else
*data++ = hns3_read_dev(hw, common_reg_addrs[i]);
-   data += hns3_insert_reg_separator(reg_num, data);
 
reg_num = sizeof(ring_reg_addrs) / sizeof(uint32_t);
for (j = 0; j < hw->tqps_num; j++) {
@@ -313,7 +292,6 @@ hns3_direct_access_regs(struct hns3_hw *hw, uint32

Re: [PATCH v1] dts: add send_packets to test_suite

[Patrick Robb]

Reviewed-by: Patrick Robb 

Re: [PATCH v6 1/1] dts: add text parser for testpmd verbose output

[Jeremy Spewock]

On Thu, Sep 26, 2024 at 4:25 AM Juraj Linkeš  wrote:
>
>
> > diff --git a/dts/framework/remote_session/testpmd_shell.py 
> > b/dts/framework/remote_session/testpmd_shell.py
>
> > @@ -581,6 +581,506 @@ class TestPmdPortStats(TextParser):
> >   tx_bps: int = field(metadata=TextParser.find_int(r"Tx-bps:\s+(\d+)"))
> >
> >
> > +class PacketOffloadFlag(Flag):
>
> > +#: RX IEEE1588 L2 Ethernet PT Packet.
> > +RTE_MBUF_F_RX_IEEE1588_PTP = 1 << 9
> > +#: RX IEEE1588 L2/L4 timestamped packet.
> > +RTE_MBUF_F_RX_IEEE1588_TMST = 1 << 10
>
> There are a few instances with two or three consecutive bits set
> expliticly instead with auto(). I don't know if it's better to use
> auto() or the explitic value, just wanted to point it out.
>

If it was only two consecutive bits I avoided using auto because I
thought that made it more clear (at least for me, it felt like less
bouncing back and forth). This is a good point though, I also don't
know which is really better.

>
> > +
> > +#: FD id reported if FDIR match.
> > +RTE_MBUF_F_RX_FDIR_ID = 1 << 13
> > +#: Flexible bytes reported if FDIR match.
> > +RTE_MBUF_F_RX_FDIR_FLX = 1 << 14
> > +@classmethod
> > +def from_str(cls, flags: str) -> Self:
>
> Now that we're doing the same thing as the other classes, I think it
> makes sense to just flat out copy-paste the from_list_string method.

Sure, that makes sense to me.

>
> > +"""Makes an instance from a string containing whitespace-separated 
> > the flag members.
> > +
> > +Args:
> > +arr: A string containing ol_flag values.
> > +
> > +Returns:
> > +A new instance of the flag.
> > +"""
> > +flag = cls(0)
> > +for name in flags.split():
> > +if hasattr(cls, name):
>
> This is still different from the other class. I think making these
> exactly the same would make it clear what needs to be put into the base
> class if we ever create one.

Ack.

>
> > +flag |= cls[name]
> > +return flag
>
> > +
> > +class RtePTypes(Flag):
> > +"""Flag representing possible packet types in DPDK verbose output.
> > +
> > +Values in this class are derived from definitions in the RTE MBUF 
> > ptype library in DPDK located
> > +in lib/mbuf/rte_mbuf_ptype.h. Specifically, the names of values in 
> > this class should match the
> > +possible return options from the methods rte_get_ptype_*_name in 
> > rte_mbuf_ptype.c.
>
> I think these are functions (rte_get_ptype_*_name), not methods.
>

Ahh, good call. I wasn't thinking of the distinction when I wrote it.

> > +"""
>
> You didn't update the docstring here (double backticks (for file and
> function names) and the References: section).

Good catch, I'll fix those as well.

>
>
> > +@classmethod
> > +def from_str(cls, flags: str) -> Self:
>
> The same comments apply here.

Ack.

>
>

Re: [PATCH v4 1/1] dts: Remove XML-RPC server for Scapy TG and instead use PythonShell

[Jeremy Spewock]

On Thu, Sep 26, 2024 at 5:12 AM Juraj Linkeš  wrote:
>
> The subject line should start with a lowercase character and it's also
> over the character limit. This fits and basically says the same:
> use PythonShell for Scapy instead of XML-RPC
>
> Scapy TG didn't fit but I think the above still works.
>
> > diff --git 
> > a/dts/framework/remote_session/single_active_interactive_shell.py 
> > b/dts/framework/remote_session/single_active_interactive_shell.py
>
> > @@ -93,9 +94,13 @@ def __init__(
> >   timeout: float = SETTINGS.timeout,
> >   app_params: Params = Params(),
> >   name: str | None = None,
> > +**kwargs,
> >   ) -> None:
> >   """Create an SSH channel during initialization.
> >
> > +Additional key-word arguments can be passed through `kwargs` if 
> > needed for fulfilling other
>
> key-word -> keyword

Ack.

>
> > +constructors in the case of multiple-inheritance.
>
> I also didn't notice this hyphen, it shouldn't be there.
>
> These hyphens are in a lot of places, I don't if I caught them all.

I'm not sure why I put so many, haha. I'll look through and try to
find the rest.

>
> > diff --git a/dts/framework/testbed_model/traffic_generator/scapy.py 
> > b/dts/framework/testbed_model/traffic_generator/scapy.py
>
> > @@ -6,311 +6,150 @@
> >
> >   A traffic generator used for functional testing, implemented with
> >   `the Scapy library `_.
> > -The traffic generator uses an XML-RPC server to run Scapy on the remote TG 
> > node.
> > +The traffic generator uses an interactive shell to run Scapy on the remote 
> > TG node.
> >
> > -The traffic generator uses the :mod:`xmlrpc.server` module to run an 
> > XML-RPC server
> > -in an interactive remote Python SSH session. The communication with the 
> > server is facilitated
> > -with a local server proxy from the :mod:`xmlrpc.client` module.
> > +The traffic generator extends 
> > :class:`framework.remote_session.python_shell.PythonShell` to
> > +implement the methods for handling packets by sending commands into the 
> > interactive shell.
>
> Since this only mentions PythonShell, people could understand that's the
> only thing the tg extends. We should either add a qualifier such as
> additionally extends or just explicitly say it also extends the
> capturing TG (which is also useful information as it tells us which kind
> of TG it is).

Good idea, I'll add this.

>
>
> > +class ScapyTrafficGenerator(PythonShell, CapturingTrafficGenerator):
> > +"""Provides access to scapy functions on a traffic generator node.
>
> > +This class extends the base with remote execution of scapy functions. 
> > All methods for
> > +processing packets are implemented using an underlying
> > +:class:`framework.remote_session.python_shell.PythonShell` which 
> > imports the Scapy library.
>
> > +Because of the dual-inheritance, this class has both methods that wrap 
> > scapy commands sent into
>
> The hyphen doesn't sound right. And maybe double would be a better term.
> I understand dual to mean two of the same and that doesn't fit for me as
> well.

Ack.

>
> > +the shell and methods that run locally to fulfill traffic generation 
> > needs. To help make a
> > +clear distinction between the two, the names of the methods that wrap 
> > the logic of the
> > +underlying shell should be prepended with "shell".
>
> I think there would be value in explicitly saying that the shell runs on
> the TG node.

Ack.

>
>
> > +Note that the order of inheritance is important for this class. In 
> > order to instantiate this
> > +class, the abstract methods of 
> > :class:`~.capturing_traffic_generator.CapturingTrafficGenerator`
> > +must be implemented. Since some of these methods are implemented in 
> > the underlying interactive
> > +shell, according to Python's Method Resolution Order (MRO), the 
> > interactive shell must come
> > +first.
>
> I didn't notice this before. Is this because of the close() method? Do
> we need to add any special steps to close the TG? Closing the
> interactive session should be enough, but I wanted to check with you.

Yes it is because of the close method in the traffic generator. I
think closing the shell should be all we need to do really, there
isn't anything else this traffic generator is really using on the
host.

>
>
> > +def __init__(self, tg_node: Node, config: ScapyTrafficGeneratorConfig, 
> > **kwargs):
> > +"""Extend the constructor with Scapy TG specifics.
> >
> > -def __init__(self, *args, **kwargs):
> > -"""Extend the XML-RPC server initialization.
> > +Initializes both the traffic generator and the interactive shell 
> > used to handle Scapy
> > +functions. The interactive shell will be started on `tg_node`. The 
> > additional key-word
> > +arguments in `kwargs` are used to pass into the constructor for 
> > the interactive shell.
> >
> > 

Re: [PATCH v4 1/1] dts: Remove XML-RPC server for Scapy TG and instead use PythonShell

[Jeremy Spewock]

On Thu, Sep 26, 2024 at 5:12 AM Juraj Linkeš  wrote:
>
> The subject line should start with a lowercase character and it's also
> over the character limit. This fits and basically says the same:
> use PythonShell for Scapy instead of XML-RPC
>
> Scapy TG didn't fit but I think the above still works.
>

I forgot to respond to this too, but these are good points that I
overlooked and I like that wording so I'll update this as well.


>

Re: [PATCH dpdk] mbuf: fix strict aliasing error in allocator

[Patrick Robb]

Recheck-request: iol-mellanox-Performance

When I enabled this test on Monday I accidentally set the delta threshold
to 1.5% instead of 5%. So the accepted results window was too small and led
to this false positive test fail.

[PATCH v5 0/1] dts: replace XML-RPC server

[jspewock]

From: Jeremy Spewock 

v5:
 * renamed commit subject to match contribution guidelines
 * reformatted doc-strings to add more context and clarity
 * removed unnecessary hyphens

Jeremy Spewock (1):
  dts: use PythonShell for Scapy instead of XML-RPC

 .../single_active_interactive_shell.py|   8 +-
 .../traffic_generator/__init__.py |   2 +-
 .../testbed_model/traffic_generator/scapy.py  | 455 +++---
 .../traffic_generator/traffic_generator.py|  15 +-
 dts/framework/utils.py|  15 +
 5 files changed, 196 insertions(+), 299 deletions(-)

-- 
2.46.0

Re: [PATCH v3 1/1] dts: rework packet addressing

[Jeremy Spewock]

On Thu, Sep 26, 2024 at 8:31 AM Juraj Linkeš  wrote:
>
>
> > diff --git a/dts/framework/test_suite.py b/dts/framework/test_suite.py
>
> > +def _adjust_addresses(self, packets: list[Packet], expected: bool = 
> > False) -> list[Packet]:
> > +# The packet is routed from TG egress to TG ingress regardless 
> > of whether it is
> > +# expected or not.
> > +if ip_src_is_unset:
> > +l3_to_use.src = self._tg_ip_address_egress.ip.exploded
> > +
> > +if ip_dst_is_unset:
> > +l3_to_use.dst = self._tg_ip_address_ingress.ip.exploded
>
> So this is where l3_to_use also appears. This could also be in the same
> if branch, right? As you mentioned, ip_src_is_unset is only going to be
> true in that branch.
>
> Now that I look at it, we're mixing the update of l2 addresses (starting
> with pkt_src_is_unset = "src" not in packet.fields) with l3 addresses
> (starting with num_ip_layers right below that). We could first do l2
> addresses, then l3 addresses. And I don't think we even need the
> *_is_unset variables, they're only used once.

That is true, I can change it to work in this way instead.

>
> > +ret_packets.append(Ether(packet.build()))
> >
> > -return Ether(packet.build())
> > +return ret_packets
> >
> >   def verify(self, condition: bool, failure_description: str) -> None:
> >   """Verify `condition` and handle failures.
>

Re: [PATCH v3 1/1] dts: rework packet addressing

[Juraj Linkeš]

diff --git a/dts/framework/test_suite.py b/dts/framework/test_suite.py



+def _adjust_addresses(self, packets: list[Packet], expected: bool = False) 
-> list[Packet]:
+# The packet is routed from TG egress to TG ingress regardless of 
whether it is
+# expected or not.
+if ip_src_is_unset:
+l3_to_use.src = self._tg_ip_address_egress.ip.exploded
+
+if ip_dst_is_unset:
+l3_to_use.dst = self._tg_ip_address_ingress.ip.exploded


So this is where l3_to_use also appears. This could also be in the same 
if branch, right? As you mentioned, ip_src_is_unset is only going to be 
true in that branch.


Now that I look at it, we're mixing the update of l2 addresses (starting 
with pkt_src_is_unset = "src" not in packet.fields) with l3 addresses 
(starting with num_ip_layers right below that). We could first do l2 
addresses, then l3 addresses. And I don't think we even need the 
*_is_unset variables, they're only used once.



+ret_packets.append(Ether(packet.build()))
  
-return Ether(packet.build())

+return ret_packets
  
  def verify(self, condition: bool, failure_description: str) -> None:

  """Verify `condition` and handle failures.

[PATCH v9 7/8] net/hns3: support report names of registers

[Jie Hai]

This patch adds names for register lists, and support report
names of registers. Some registers has different names on
different platform, use names of HIP08 as default names.

Signed-off-by: Jie Hai 
Acked-by: Chengwen Feng 
---
 drivers/net/hns3/hns3_regs.c | 1088 +-
 1 file changed, 955 insertions(+), 133 deletions(-)

diff --git a/drivers/net/hns3/hns3_regs.c b/drivers/net/hns3/hns3_regs.c
index 89858c2b1c09..a0d130302839 100644
--- a/drivers/net/hns3/hns3_regs.c
+++ b/drivers/net/hns3/hns3_regs.c
@@ -14,73 +14,827 @@
 
 static int hns3_get_dfx_reg_cnt(struct hns3_hw *hw, uint32_t *count);
 
-static const uint32_t cmdq_reg_addrs[] = {HNS3_CMDQ_TX_DEPTH_REG,
- HNS3_CMDQ_TX_TAIL_REG,
- HNS3_CMDQ_TX_HEAD_REG,
- HNS3_CMDQ_RX_DEPTH_REG,
- HNS3_CMDQ_RX_TAIL_REG,
- HNS3_CMDQ_RX_HEAD_REG,
- HNS3_VECTOR0_CMDQ_SRC_REG,
- HNS3_CMDQ_INTR_STS_REG,
- HNS3_CMDQ_INTR_EN_REG,
- HNS3_CMDQ_INTR_GEN_REG};
-
-static const uint32_t common_reg_addrs[] = {HNS3_MISC_VECTOR_REG_BASE,
-   HNS3_VECTOR0_OTER_EN_REG,
-   HNS3_MISC_RESET_STS_REG,
-   HNS3_VECTOR0_OTHER_INT_STS_REG,
-   HNS3_GLOBAL_RESET_REG,
-   HNS3_FUN_RST_ING,
-   HNS3_GRO_EN_REG};
-
-static const uint32_t common_vf_reg_addrs[] = {HNS3_MISC_VECTOR_REG_BASE,
-  HNS3_FUN_RST_ING,
-  HNS3_GRO_EN_REG};
-
-static const uint32_t ring_reg_addrs[] = {HNS3_RING_RX_BD_NUM_REG,
- HNS3_RING_RX_BD_LEN_REG,
- HNS3_RING_RX_EN_REG,
- HNS3_RING_RX_MERGE_EN_REG,
- HNS3_RING_RX_TAIL_REG,
- HNS3_RING_RX_HEAD_REG,
- HNS3_RING_RX_FBDNUM_REG,
- HNS3_RING_RX_OFFSET_REG,
- HNS3_RING_RX_FBD_OFFSET_REG,
- HNS3_RING_RX_STASH_REG,
- HNS3_RING_RX_BD_ERR_REG,
- HNS3_RING_TX_BD_NUM_REG,
- HNS3_RING_TX_EN_REG,
- HNS3_RING_TX_PRIORITY_REG,
- HNS3_RING_TX_TC_REG,
- HNS3_RING_TX_MERGE_EN_REG,
- HNS3_RING_TX_TAIL_REG,
- HNS3_RING_TX_HEAD_REG,
- HNS3_RING_TX_FBDNUM_REG,
- HNS3_RING_TX_OFFSET_REG,
- HNS3_RING_TX_EBD_NUM_REG,
- HNS3_RING_TX_EBD_OFFSET_REG,
- HNS3_RING_TX_BD_ERR_REG,
- HNS3_RING_EN_REG};
-
-static const uint32_t tqp_intr_reg_addrs[] = {HNS3_TQP_INTR_CTRL_REG,
- HNS3_TQP_INTR_GL0_REG,
- HNS3_TQP_INTR_GL1_REG,
- HNS3_TQP_INTR_GL2_REG,
- HNS3_TQP_INTR_RL_REG};
+struct hns3_dirt_reg_entry {
+   const char *name;
+   uint32_t addr;
+};
+
+static const struct hns3_dirt_reg_entry cmdq_reg_list[] = {
+   {"cmdq_tx_depth",   HNS3_CMDQ_TX_DEPTH_REG},
+   {"cmdq_tx_tail",HNS3_CMDQ_TX_TAIL_REG},
+   {"cmdq_tx_head",HNS3_CMDQ_TX_HEAD_REG},
+   {"cmdq_rx_depth",   HNS3_CMDQ_RX_DEPTH_REG},
+   {"cmdq_rx_tail",HNS3_CMDQ_RX_TAIL_REG},
+   {"cmdq_rx_head",HNS3_CMDQ_RX_HEAD_REG},
+   {"vector0_cmdq_src",HNS3_VECTOR0_CMDQ_SRC_REG},
+   {"cmdq_intr_sts",   HNS3_CMDQ_INTR_STS_REG},
+   {"cmdq_intr_en",HNS3_CMDQ_INTR_EN_REG},
+   {"cmdq_intr_gen",   HNS3_CMDQ_INTR_GEN_REG},
+};
+
+static const struct hns3_dirt_reg_entry common_reg_list[] = {
+   {"misc_vector_reg_base",HNS3_MISC_VECTOR_REG_BASE},
+   {"vector0_oter_en", HNS3_VECTOR0_OTER_EN_REG},
+   {"misc_reset_sts",  HNS3_MISC_RESET_STS_REG},
+

[PATCH v9 2/8] ethdev: add telemetry cmd for registers

[Jie Hai]

This patch adds a telemetry command for registers dump,
and supports obtaining the registers of a specified module.

In one way, the number of registers that can be exported
is limited by the number of elements carried by dict and
container. In another way, the length of the string
exported by telemetry is limited by MAX_OUTPUT_LEN.
Therefore, when the number of registers to be exported
exceeds, some information will be lost. Warn on the former
case.

An example usage is shown below:
--> /ethdev/regs,0,ring
{
  "/ethdev/regs": {
"registers_length": 318,
"registers_width": 4,
"register_offset": "0x0",
"version": "0x1140011",
"group_0": {
  "Q0_ring_rx_bd_num": "0x0",
  "Q0_ring_rx_bd_len": "0x0",
  ...
  },
"group_1": {
...
},
...
}

Signed-off-by: Jie Hai 
Reviewed-by: Ferruh Yigit 
Acked-by: Chengwen Feng 
---
 lib/ethdev/rte_ethdev_telemetry.c | 130 ++
 1 file changed, 130 insertions(+)

diff --git a/lib/ethdev/rte_ethdev_telemetry.c 
b/lib/ethdev/rte_ethdev_telemetry.c
index 6b873e7abe68..181390691099 100644
--- a/lib/ethdev/rte_ethdev_telemetry.c
+++ b/lib/ethdev/rte_ethdev_telemetry.c
@@ -1395,6 +1395,134 @@ eth_dev_handle_port_tm_node_caps(const char *cmd 
__rte_unused,
return ret;
 }
 
+static void
+eth_dev_add_reg_data(struct rte_tel_data *d, struct rte_dev_reg_info *reg_info,
+uint32_t idx)
+{
+   if (reg_info->width == sizeof(uint32_t))
+   rte_tel_data_add_dict_uint_hex(d, reg_info->names[idx].name,
+   *((uint32_t *)reg_info->data + idx), 0);
+   else
+   rte_tel_data_add_dict_uint_hex(d, reg_info->names[idx].name,
+   *((uint64_t *)reg_info->data + idx), 0);
+}
+
+static int
+eth_dev_store_regs(struct rte_tel_data *d, struct rte_dev_reg_info *reg_info)
+{
+   struct rte_tel_data *groups[RTE_TEL_MAX_DICT_ENTRIES];
+   char group_name[RTE_TEL_MAX_STRING_LEN] = {0};
+   struct rte_tel_data *group = NULL;
+   uint32_t grp_num = 0;
+   uint32_t i, max_cap;
+   int ret;
+
+   rte_tel_data_start_dict(d);
+   rte_tel_data_add_dict_uint(d, "register_length", reg_info->length);
+   rte_tel_data_add_dict_uint(d, "register_width", reg_info->width);
+   rte_tel_data_add_dict_uint_hex(d, "register_offset", reg_info->offset, 
0);
+   rte_tel_data_add_dict_uint_hex(d, "version", reg_info->version, 0);
+
+   max_cap = (RTE_TEL_MAX_DICT_ENTRIES - 4) * RTE_TEL_MAX_DICT_ENTRIES;
+   if (reg_info->length > max_cap) {
+   RTE_ETHDEV_LOG_LINE(WARNING,
+   "Registers to be displayed are reduced from %u to %u 
due to limited capacity",
+   reg_info->length, max_cap);
+   reg_info->length = max_cap;
+   }
+
+   for (i = 0; i < reg_info->length; i++) {
+   if (i % RTE_TEL_MAX_DICT_ENTRIES != 0) {
+   eth_dev_add_reg_data(group, reg_info, i);
+   continue;
+   }
+
+   group = rte_tel_data_alloc();
+   if (group == NULL) {
+   ret = -ENOMEM;
+   RTE_ETHDEV_LOG_LINE(WARNING, "No enough memory for 
group data");
+   goto out;
+   }
+   groups[grp_num++] = group;
+   rte_tel_data_start_dict(group);
+   eth_dev_add_reg_data(group, reg_info, i);
+   }
+
+   for (i = 0; i < grp_num; i++) {
+   snprintf(group_name, RTE_TEL_MAX_STRING_LEN, "group_%u", i);
+   rte_tel_data_add_dict_container(d, group_name, groups[i], 0);
+   }
+   return 0;
+out:
+   for (i = 0; i < grp_num; i++)
+   rte_tel_data_free(groups[i]);
+
+   return ret;
+}
+
+static int
+eth_dev_get_port_regs(int port_id, struct rte_tel_data *d, char *filter)
+{
+   struct rte_dev_reg_info reg_info;
+   int ret;
+
+   memset(®_info, 0, sizeof(reg_info));
+   reg_info.filter = filter;
+
+   ret = rte_eth_dev_get_reg_info_ext(port_id, ®_info);
+   if (ret != 0) {
+   RTE_ETHDEV_LOG_LINE(ERR, "Failed to get device reg info: %d", 
ret);
+   return ret;
+   }
+
+   reg_info.data = calloc(reg_info.length, reg_info.width);
+   if (reg_info.data == NULL) {
+   RTE_ETHDEV_LOG_LINE(ERR, "Failed to allocate memory for 
reg_info.data");
+   return -ENOMEM;
+   }
+
+   reg_info.names = calloc(reg_info.length, sizeof(struct 
rte_eth_reg_name));
+   if (reg_info.names == NULL) {
+   RTE_ETHDEV_LOG_LINE(ERR, "Failed to allocate memory for 
reg_info.names");
+   free(reg_info.data);
+   return -ENOMEM;
+   }
+
+   ret = rte_eth_dev_get_reg_info_ext(port_id, ®_info);
+   if (ret != 0) {
+   RTE_ETHDEV_LOG_LINE(ERR, "Failed to get device reg info: %d", 
ret);
+   ret = -

[PATCH v9 3/8] net/hns3: remove some basic address dump

[Jie Hai]

For security reasons, some address registers are not suitable
to be exposed, remove them.

Cc: sta...@dpdk.org

Signed-off-by: Jie Hai 
Acked-by: Huisong Li
Acked-by: Chengwen Feng 
---
 drivers/net/hns3/hns3_regs.c | 12 ++--
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/drivers/net/hns3/hns3_regs.c b/drivers/net/hns3/hns3_regs.c
index be1be6a89c94..53d829a4fc68 100644
--- a/drivers/net/hns3/hns3_regs.c
+++ b/drivers/net/hns3/hns3_regs.c
@@ -17,13 +17,9 @@
 
 static int hns3_get_dfx_reg_line(struct hns3_hw *hw, uint32_t *lines);
 
-static const uint32_t cmdq_reg_addrs[] = {HNS3_CMDQ_TX_ADDR_L_REG,
- HNS3_CMDQ_TX_ADDR_H_REG,
- HNS3_CMDQ_TX_DEPTH_REG,
+static const uint32_t cmdq_reg_addrs[] = {HNS3_CMDQ_TX_DEPTH_REG,
  HNS3_CMDQ_TX_TAIL_REG,
  HNS3_CMDQ_TX_HEAD_REG,
- HNS3_CMDQ_RX_ADDR_L_REG,
- HNS3_CMDQ_RX_ADDR_H_REG,
  HNS3_CMDQ_RX_DEPTH_REG,
  HNS3_CMDQ_RX_TAIL_REG,
  HNS3_CMDQ_RX_HEAD_REG,
@@ -44,9 +40,7 @@ static const uint32_t common_vf_reg_addrs[] = 
{HNS3_MISC_VECTOR_REG_BASE,
   HNS3_FUN_RST_ING,
   HNS3_GRO_EN_REG};
 
-static const uint32_t ring_reg_addrs[] = {HNS3_RING_RX_BASEADDR_L_REG,
- HNS3_RING_RX_BASEADDR_H_REG,
- HNS3_RING_RX_BD_NUM_REG,
+static const uint32_t ring_reg_addrs[] = {HNS3_RING_RX_BD_NUM_REG,
  HNS3_RING_RX_BD_LEN_REG,
  HNS3_RING_RX_EN_REG,
  HNS3_RING_RX_MERGE_EN_REG,
@@ -57,8 +51,6 @@ static const uint32_t ring_reg_addrs[] = 
{HNS3_RING_RX_BASEADDR_L_REG,
  HNS3_RING_RX_FBD_OFFSET_REG,
  HNS3_RING_RX_STASH_REG,
  HNS3_RING_RX_BD_ERR_REG,
- HNS3_RING_TX_BASEADDR_L_REG,
- HNS3_RING_TX_BASEADDR_H_REG,
  HNS3_RING_TX_BD_NUM_REG,
  HNS3_RING_TX_EN_REG,
  HNS3_RING_TX_PRIORITY_REG,
-- 
2.33.0

[PATCH v9 4/8] net/hns3: fix dump counter of registers

[Jie Hai]

Since the driver dumps the queue interrupt registers according
to the intr_tqps_num, the counter should be the same.

Fixes: acb3260fac5c ("net/hns3: fix dump register out of range")
Fixes: 936eda25e8da ("net/hns3: support dump register")
Cc: sta...@dpdk.org

Signed-off-by: Jie Hai 
Acked-by: Huisong Li 
Acked-by: Chengwen Feng 
---
 drivers/net/hns3/hns3_regs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/hns3/hns3_regs.c b/drivers/net/hns3/hns3_regs.c
index 53d829a4fc68..d9c546470dbe 100644
--- a/drivers/net/hns3/hns3_regs.c
+++ b/drivers/net/hns3/hns3_regs.c
@@ -127,7 +127,7 @@ hns3_get_regs_length(struct hns3_hw *hw, uint32_t *length)
tqp_intr_lines = sizeof(tqp_intr_reg_addrs) / REG_LEN_PER_LINE + 1;
 
len = (cmdq_lines + common_lines + ring_lines * hw->tqps_num +
- tqp_intr_lines * hw->num_msi) * REG_NUM_PER_LINE;
+ tqp_intr_lines * hw->intr_tqps_num) * REG_NUM_PER_LINE;
 
if (!hns->is_vf) {
ret = hns3_get_regs_num(hw, ®s_num_32_bit, ®s_num_64_bit);
-- 
2.33.0

[PATCH v9 6/8] net/hns3: refactor register dump

[Jie Hai]

This patch refactors codes dumping registers from firmware.

Signed-off-by: Jie Hai 
Acked-by: Chengwen Feng 
---
 drivers/net/hns3/hns3_regs.c | 203 ---
 1 file changed, 115 insertions(+), 88 deletions(-)

diff --git a/drivers/net/hns3/hns3_regs.c b/drivers/net/hns3/hns3_regs.c
index c8e3fb118e4b..89858c2b1c09 100644
--- a/drivers/net/hns3/hns3_regs.c
+++ b/drivers/net/hns3/hns3_regs.c
@@ -104,12 +104,93 @@ hns3_get_regs_num(struct hns3_hw *hw, uint32_t 
*regs_num_32_bit,
return 0;
 }
 
+static int
+hns3_get_32_64_regs_cnt(struct hns3_hw *hw, uint32_t *count)
+{
+   uint32_t regs_num_32_bit, regs_num_64_bit;
+   int ret;
+
+   ret = hns3_get_regs_num(hw, ®s_num_32_bit, ®s_num_64_bit);
+   if (ret) {
+   hns3_err(hw, "fail to get the number of registers, "
+"ret = %d.", ret);
+   return ret;
+   }
+
+   *count += regs_num_32_bit + regs_num_64_bit * 
HNS3_64_BIT_REG_OUTPUT_SIZE;
+   return 0;
+}
+
+static int
+hns3_get_dfx_reg_bd_num(struct hns3_hw *hw, uint32_t *bd_num_list,
+   uint32_t list_size)
+{
+#define HNS3_GET_DFX_REG_BD_NUM_SIZE   4
+   struct hns3_cmd_desc desc[HNS3_GET_DFX_REG_BD_NUM_SIZE];
+   uint32_t index, desc_index;
+   uint32_t bd_num;
+   uint32_t i;
+   int ret;
+
+   for (i = 0; i < HNS3_GET_DFX_REG_BD_NUM_SIZE - 1; i++) {
+   hns3_cmd_setup_basic_desc(&desc[i], HNS3_OPC_DFX_BD_NUM, true);
+   desc[i].flag |= rte_cpu_to_le_16(HNS3_CMD_FLAG_NEXT);
+   }
+   /* The last BD does not need a next flag */
+   hns3_cmd_setup_basic_desc(&desc[i], HNS3_OPC_DFX_BD_NUM, true);
+
+   ret = hns3_cmd_send(hw, desc, HNS3_GET_DFX_REG_BD_NUM_SIZE);
+   if (ret) {
+   hns3_err(hw, "fail to get dfx bd num, ret = %d.\n", ret);
+   return ret;
+   }
+
+   /* The first data in the first BD is a reserved field */
+   for (i = 1; i <= list_size; i++) {
+   desc_index = i / HNS3_CMD_DESC_DATA_NUM;
+   index = i % HNS3_CMD_DESC_DATA_NUM;
+   bd_num = rte_le_to_cpu_32(desc[desc_index].data[index]);
+   bd_num_list[i - 1] = bd_num;
+   }
+
+   return 0;
+}
+
+static int
+hns3_get_dfx_reg_cnt(struct hns3_hw *hw, uint32_t *count)
+{
+   int opcode_num = RTE_DIM(hns3_dfx_reg_opcode_list);
+   uint32_t bd_num_list[opcode_num];
+   int ret;
+   int i;
+
+   ret = hns3_get_dfx_reg_bd_num(hw, bd_num_list, opcode_num);
+   if (ret)
+   return ret;
+
+   for (i = 0; i < opcode_num; i++)
+   *count += bd_num_list[i] * HNS3_CMD_DESC_DATA_NUM;
+
+   return 0;
+}
+
+static int
+hns3_get_firmware_reg_cnt(struct hns3_hw *hw, uint32_t *count)
+{
+   int ret;
+
+   ret = hns3_get_32_64_regs_cnt(hw, count);
+   if (ret < 0)
+   return ret;
+
+   return hns3_get_dfx_reg_cnt(hw, count);
+}
+
 static int
 hns3_get_regs_length(struct hns3_hw *hw, uint32_t *length)
 {
struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
-   uint32_t regs_num_32_bit, regs_num_64_bit;
-   uint32_t dfx_reg_cnt;
+   uint32_t dfx_reg_cnt = 0;
uint32_t common_cnt;
uint32_t len;
int ret;
@@ -125,16 +206,7 @@ hns3_get_regs_length(struct hns3_hw *hw, uint32_t *length)
len /= sizeof(uint32_t);
 
if (!hns->is_vf) {
-   ret = hns3_get_regs_num(hw, ®s_num_32_bit, ®s_num_64_bit);
-   if (ret) {
-   hns3_err(hw, "fail to get the number of registers, "
-"ret = %d.", ret);
-   return ret;
-   }
-   dfx_reg_cnt = regs_num_32_bit +
- regs_num_64_bit * HNS3_64_BIT_REG_OUTPUT_SIZE;
-
-   ret = hns3_get_dfx_reg_cnt(hw, &dfx_reg_cnt);
+   ret = hns3_get_firmware_reg_cnt(hw, &dfx_reg_cnt);
if (ret) {
hns3_err(hw, "fail to get the number of dfx registers, "
 "ret = %d.", ret);
@@ -304,41 +376,6 @@ hns3_direct_access_regs(struct hns3_hw *hw, uint32_t *data)
return data - origin_data_ptr;
 }
 
-static int
-hns3_get_dfx_reg_bd_num(struct hns3_hw *hw, uint32_t *bd_num_list,
-   uint32_t list_size)
-{
-#define HNS3_GET_DFX_REG_BD_NUM_SIZE   4
-   struct hns3_cmd_desc desc[HNS3_GET_DFX_REG_BD_NUM_SIZE];
-   uint32_t index, desc_index;
-   uint32_t bd_num;
-   uint32_t i;
-   int ret;
-
-   for (i = 0; i < HNS3_GET_DFX_REG_BD_NUM_SIZE - 1; i++) {
-   hns3_cmd_setup_basic_desc(&desc[i], HNS3_OPC_DFX_BD_NUM, true);
-   desc[i].flag |= rte_cpu_to_le_16(HNS3_CMD_FLAG_NEXT);
-   }
-   /* The last BD does not need a next flag */
-   hns3_cmd_setup_basic_desc(&desc[i], HNS3_OPC_DFX_BD_NUM, true);
-
-   ret = hns3_cmd_send(hw, 

[PATCH v2] app/dma-perf: per device config support

[Amit Prakash Shukla]

Add support to configure device specific config parameters for a
testcase. Example:

lcore_dma0=lcore=11,dev=:00:04.1,dir=mem2dev,raddr=0x3,
coreid=1,pfid=2,vfid=3
lcore_dma1=lcore=12,dev=:00:04.2,dir=dev2mem,raddr=0x2,
coreid=3,pfid=2,vfid=1

Signed-off-by: Amit Prakash Shukla 
Acked-by: Chengwen Feng 
---
v2:
- Resolved review comments.

 app/test-dma-perf/benchmark.c | 318 +-
 app/test-dma-perf/config.ini  |  30 ++--
 app/test-dma-perf/main.c  | 199 ++---
 app/test-dma-perf/main.h  |  20 ++-
 doc/guides/tools/dmaperf.rst  | 107 +---
 5 files changed, 360 insertions(+), 314 deletions(-)

diff --git a/app/test-dma-perf/benchmark.c b/app/test-dma-perf/benchmark.c
index d167adc4d2..5eebb4de77 100644
--- a/app/test-dma-perf/benchmark.c
+++ b/app/test-dma-perf/benchmark.c
@@ -148,11 +148,13 @@ cache_flush_buf(__rte_unused struct rte_mbuf **array,
 
 static int
 vchan_data_populate(uint32_t dev_id, struct rte_dma_vchan_conf *qconf,
-   struct test_configure *cfg)
+   struct test_configure *cfg, uint16_t dev_num)
 {
+   struct vchan_dev_config *vchan_dconfig;
struct rte_dma_info info;
 
-   qconf->direction = cfg->transfer_dir;
+   vchan_dconfig = &cfg->dma_config[dev_num].vchan_dev;
+   qconf->direction = vchan_dconfig->tdir;
 
rte_dma_info_get(dev_id, &info);
if (!(RTE_BIT64(qconf->direction) & info.dev_capa))
@@ -164,16 +166,16 @@ vchan_data_populate(uint32_t dev_id, struct 
rte_dma_vchan_conf *qconf,
case RTE_DMA_DIR_MEM_TO_DEV:
qconf->dst_port.pcie.vfen = 1;
qconf->dst_port.port_type = RTE_DMA_PORT_PCIE;
-   qconf->dst_port.pcie.coreid = cfg->vchan_dev.port.pcie.coreid;
-   qconf->dst_port.pcie.vfid = cfg->vchan_dev.port.pcie.vfid;
-   qconf->dst_port.pcie.pfid = cfg->vchan_dev.port.pcie.pfid;
+   qconf->dst_port.pcie.coreid = vchan_dconfig->port.pcie.coreid;
+   qconf->dst_port.pcie.vfid = vchan_dconfig->port.pcie.vfid;
+   qconf->dst_port.pcie.pfid = vchan_dconfig->port.pcie.pfid;
break;
case RTE_DMA_DIR_DEV_TO_MEM:
qconf->src_port.pcie.vfen = 1;
qconf->src_port.port_type = RTE_DMA_PORT_PCIE;
-   qconf->src_port.pcie.coreid = cfg->vchan_dev.port.pcie.coreid;
-   qconf->src_port.pcie.vfid = cfg->vchan_dev.port.pcie.vfid;
-   qconf->src_port.pcie.pfid = cfg->vchan_dev.port.pcie.pfid;
+   qconf->src_port.pcie.coreid = vchan_dconfig->port.pcie.coreid;
+   qconf->src_port.pcie.vfid = vchan_dconfig->port.pcie.vfid;
+   qconf->src_port.pcie.pfid = vchan_dconfig->port.pcie.pfid;
break;
case RTE_DMA_DIR_MEM_TO_MEM:
case RTE_DMA_DIR_DEV_TO_DEV:
@@ -185,14 +187,15 @@ vchan_data_populate(uint32_t dev_id, struct 
rte_dma_vchan_conf *qconf,
 
 /* Configuration of device. */
 static void
-configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg, uint8_t 
sges_max)
+configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg, uint8_t 
sges_max,
+  uint16_t dev_num)
 {
uint16_t vchan = 0;
struct rte_dma_info info;
struct rte_dma_conf dev_config = { .nb_vchans = 1 };
struct rte_dma_vchan_conf qconf = { 0 };
 
-   if (vchan_data_populate(dev_id, &qconf, cfg) != 0)
+   if (vchan_data_populate(dev_id, &qconf, cfg, dev_num) != 0)
rte_exit(EXIT_FAILURE, "Error with vchan data populate.\n");
 
if (rte_dma_configure(dev_id, &dev_config) != 0)
@@ -219,8 +222,8 @@ configure_dmadev_queue(uint32_t dev_id, struct 
test_configure *cfg, uint8_t sges
 static int
 config_dmadevs(struct test_configure *cfg)
 {
-   struct lcore_dma_map_t *ldm = &cfg->lcore_dma_map;
-   uint32_t nb_workers = ldm->cnt;
+   uint32_t nb_workers = cfg->num_worker;
+   struct lcore_dma_map_t *ldm;
uint32_t i;
int dev_id;
uint16_t nb_dmadevs = 0;
@@ -230,16 +233,17 @@ config_dmadevs(struct test_configure *cfg)
if (cfg->is_sg)
nb_sges = RTE_MAX(cfg->nb_src_sges, cfg->nb_dst_sges);
 
-   for (i = 0; i < ldm->cnt; i++) {
-   dma_name = ldm->dma_names[i];
+   for (i = 0; i < nb_workers; i++) {
+   ldm = &cfg->dma_config[i].lcore_dma_map;
+   dma_name = ldm->dma_names;
dev_id = rte_dma_get_dev_id_by_name(dma_name);
if (dev_id < 0) {
fprintf(stderr, "Error: Fail to find DMA %s.\n", 
dma_name);
goto end;
}
 
-   ldm->dma_ids[i] = dev_id;
-   configure_dmadev_queue(dev_id, cfg, nb_sges);
+   ldm->dma_id = dev_id;
+   configure_dmadev_queue(dev_id, cfg, nb_sges, nb_dmadevs);
++nb_dmadev

[PATCH v9 8/8] net/hns3: support filter registers by module names

[Jie Hai]

This patch support dumping registers which module name is the
`filter` string. The module names are in lower case and so is
the `filter`. Available module names are cmdq, common_pf,
common_vf, ring, tqp_intr, 32_bit_dfx, 64_bit_dfx, bios, igu_egu,
ssu, ppp, rpu, ncsi, rtc, rcb, etc.

Signed-off-by: Jie Hai 
---
 doc/guides/nics/hns3.rst |   7 +
 drivers/net/hns3/hns3_regs.c | 257 ---
 2 files changed, 157 insertions(+), 107 deletions(-)

diff --git a/doc/guides/nics/hns3.rst b/doc/guides/nics/hns3.rst
index 97b4686bfabe..9a2e33ce6954 100644
--- a/doc/guides/nics/hns3.rst
+++ b/doc/guides/nics/hns3.rst
@@ -407,6 +407,13 @@ be provided to avoid scheduling the CPU core used by DPDK 
application threads fo
 other tasks. Before starting the Linux OS, add the kernel isolation boot 
parameter.
 For example, "isolcpus=1-18 nohz_full=1-18 rcu_nocbs=1-18".
 
+Dump registers
+--
+HNS3 supports dumping registers values with their names, and supports filtering
+by module names. The available module names are ``bios``, ``ssu``, ``igu_egu``,
+``rpu``, ``ncsi``, ``rtc``, ``ppp``, ``rcb``, ``tqp``, ``rtc``, ``cmdq``,
+``common_pf``, ``common_vf``, ``ring``, ``tqp_intr``, ``32_bit_dfx``,
+``64_bit_dfx``.
 
 Limitations or Known issues
 ---
diff --git a/drivers/net/hns3/hns3_regs.c b/drivers/net/hns3/hns3_regs.c
index a0d130302839..2e19add21265 100644
--- a/drivers/net/hns3/hns3_regs.c
+++ b/drivers/net/hns3/hns3_regs.c
@@ -12,7 +12,7 @@
 
 #define HNS3_64_BIT_REG_OUTPUT_SIZE (sizeof(uint64_t) / sizeof(uint32_t))
 
-static int hns3_get_dfx_reg_cnt(struct hns3_hw *hw, uint32_t *count);
+#define HNS3_MAX_MODULES_LEN 512
 
 struct hns3_dirt_reg_entry {
const char *name;
@@ -795,11 +795,39 @@ enum hns3_reg_modules {
HNS3_64_BIT_DFX,
 };
 
+#define HNS3_MODULE_MASK(x) RTE_BIT32(x)
+#define HNS3_VF_MODULES (HNS3_MODULE_MASK(HNS3_CMDQ) | 
HNS3_MODULE_MASK(HNS3_COMMON_VF) | \
+HNS3_MODULE_MASK(HNS3_RING) | 
HNS3_MODULE_MASK(HNS3_TQP_INTR))
+#define HNS3_VF_ONLY_MODULES HNS3_MODULE_MASK(HNS3_COMMON_VF)
+
 struct hns3_reg_list {
const void *reg_list;
uint32_t entry_num;
 };
 
+struct {
+   const char *name;
+   uint32_t module;
+} hns3_module_name_map[] = {
+   { "bios",   HNS3_MODULE_MASK(HNS3_BIOS_COMMON) },
+   { "ssu",HNS3_MODULE_MASK(HNS3_SSU_0) | 
HNS3_MODULE_MASK(HNS3_SSU_1) |
+   HNS3_MODULE_MASK(HNS3_SSU_2) },
+   { "igu_egu",HNS3_MODULE_MASK(HNS3_IGU_EGU) },
+   { "rpu",HNS3_MODULE_MASK(HNS3_RPU_0) | 
HNS3_MODULE_MASK(HNS3_RPU_1) },
+   { "ncsi",   HNS3_MODULE_MASK(HNS3_NCSI) },
+   { "rtc",HNS3_MODULE_MASK(HNS3_RTC) },
+   { "ppp",HNS3_MODULE_MASK(HNS3_PPP) },
+   { "rcb",HNS3_MODULE_MASK(HNS3_RCB) },
+   { "tqp",HNS3_MODULE_MASK(HNS3_TQP) },
+   { "cmdq",   HNS3_MODULE_MASK(HNS3_CMDQ) },
+   { "common_pf",  HNS3_MODULE_MASK(HNS3_COMMON_PF) },
+   { "common_vf",  HNS3_MODULE_MASK(HNS3_COMMON_VF) },
+   { "ring",   HNS3_MODULE_MASK(HNS3_RING) },
+   { "tqp_intr",   HNS3_MODULE_MASK(HNS3_TQP_INTR) },
+   { "32_bit_dfx", HNS3_MODULE_MASK(HNS3_32_BIT_DFX) },
+   { "64_bit_dfx", HNS3_MODULE_MASK(HNS3_64_BIT_DFX) },
+};
+
 static struct hns3_reg_list hns3_reg_lists[] = {
[HNS3_BIOS_COMMON]  = { dfx_bios_common_reg_list,   
RTE_DIM(dfx_bios_common_reg_list) },
[HNS3_SSU_0]= { dfx_ssu_reg_0_list, 
RTE_DIM(dfx_ssu_reg_0_list) },
@@ -863,21 +891,58 @@ hns3_get_regs_num(struct hns3_hw *hw, uint32_t 
*regs_num_32_bit,
return 0;
 }
 
-static int
-hns3_get_32_64_regs_cnt(struct hns3_hw *hw, uint32_t *count)
+static const char *
+hns3_get_name_by_module(enum hns3_reg_modules module)
 {
-   uint32_t regs_num_32_bit, regs_num_64_bit;
-   int ret;
+   size_t i;
 
-   ret = hns3_get_regs_num(hw, ®s_num_32_bit, ®s_num_64_bit);
-   if (ret) {
-   hns3_err(hw, "fail to get the number of registers, "
-"ret = %d.", ret);
-   return ret;
+   for (i = 0; i < RTE_DIM(hns3_module_name_map); i++) {
+   if (hns3_module_name_map[i].module && HNS3_MODULE_MASK(module) 
!= 0)
+   return hns3_module_name_map[i].name;
}
+   return "unknown";
+}
 
-   *count += regs_num_32_bit + regs_num_64_bit * 
HNS3_64_BIT_REG_OUTPUT_SIZE;
-   return 0;
+static void
+hns3_get_module_names(char *names, uint32_t len)
+{
+   size_t i;
+
+   for (i = 0; i < RTE_DIM(hns3_module_name_map); i++) {
+   strlcat(names, " ", len);
+   strlcat(names, hns3_module_name_map[i].name, len);
+   }
+}
+
+static uint32_t
+hns3_parse_modules_by_filter(struct hns3_hw *hw, const char *filter)
+{
+   struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
+   char names[HNS3_MAX_MODULES_LEN] = {0};
+

[PATCH v2 05/18] common/cnxk: add cn20k NIX register definitions

[Nithin Dabilpuram]

From: Satha Rao 

Add cn20k NIX register definitions.

Signed-off-by: Satha Rao 
Signed-off-by: Nithin Dabilpuram 
---
 drivers/common/cnxk/hw/nix.h   | 524 +
 drivers/common/cnxk/hw/rvu.h   |   7 +-
 drivers/common/cnxk/roc_mbox.h |  52 
 drivers/common/cnxk/roc_nix.c  |  15 +-
 4 files changed, 533 insertions(+), 65 deletions(-)

diff --git a/drivers/common/cnxk/hw/nix.h b/drivers/common/cnxk/hw/nix.h
index 1720eb3815..dd629a2080 100644
--- a/drivers/common/cnxk/hw/nix.h
+++ b/drivers/common/cnxk/hw/nix.h
@@ -32,7 +32,7 @@
 #define NIX_AF_RX_CFG  (0xd0ull)
 #define NIX_AF_AVG_DELAY   (0xe0ull)
 #define NIX_AF_CINT_DELAY  (0xf0ull)
-#define NIX_AF_VWQE_TIMER  (0xf8ull) /* [CN10K, .) */
+#define NIX_AF_VWQE_TIMER  (0xf8ull) /* [CN10K, CN20K) */
 #define NIX_AF_RX_MCAST_BASE   (0x100ull)
 #define NIX_AF_RX_MCAST_CFG(0x110ull)
 #define NIX_AF_RX_MCAST_BUF_BASE   (0x120ull)
@@ -82,9 +82,11 @@
 #define NIX_AF_RX_DEF_IIP6_DSCP(0x2f0ull) /* [CN10K, .) */
 #define NIX_AF_RX_DEF_OIP6_DSCP(0x2f8ull) /* [CN10K, .) */
 #define NIX_AF_RX_IPSEC_GEN_CFG(0x300ull)
-#define NIX_AF_RX_IPSEC_VWQE_GEN_CFG   (0x310ull) /* [CN10K, .) */
-#define NIX_AF_RX_CPTX_INST_QSEL(a)(0x320ull | (uint64_t)(a) << 3)
-#define NIX_AF_RX_CPTX_CREDIT(a)   (0x360ull | (uint64_t)(a) << 3)
+#define NIX_AF_RX_IPSEC_VWQE_GEN_CFG   (0x310ull) /* [CN10K, CN20K) */
+#define NIX_AF_RX_CPTX_INST_QSEL(a)(0x340ull | (uint64_t)(a) << 16) /* 
[CN20K, .) */
+#define NIX_AF_RX_CPTX_CREDIT(a)   (0x380ull | (uint64_t)(a) << 16) /* 
[CN20K, .) */
+#define NIX_AF_CN9K_RX_CPTX_INST_QSEL(a)(0x320ull | (uint64_t)(a) << 3) /* 
[CN9K, CN20K) */
+#define NIX_AF_CN9K_RX_CPTX_CREDIT(a)  (0x360ull | (uint64_t)(a) << 3) /* 
[CN9K, CN20K) */
 #define NIX_AF_NDC_RX_SYNC (0x3e0ull)
 #define NIX_AF_NDC_TX_SYNC (0x3f0ull)
 #define NIX_AF_AQ_CFG  (0x400ull)
@@ -100,12 +102,14 @@
 #define NIX_AF_RX_LINKX_CFG(a) (0x540ull | (uint64_t)(a) << 16)
 #define NIX_AF_RX_SW_SYNC  (0x550ull)
 #define NIX_AF_RX_LINKX_WRR_CFG(a) (0x560ull | (uint64_t)(a) << 16)
+#define NIX_AF_RQM_ECO  (0x5a0ull)
 #define NIX_AF_SEB_CFG (0x5f0ull) /* [CN10K, .) */
 #define NIX_AF_EXPR_TX_FIFO_STATUS (0x640ull) /* [CN9K, CN10K) */
 #define NIX_AF_NORM_TX_FIFO_STATUS (0x648ull)
 #define NIX_AF_SDP_TX_FIFO_STATUS  (0x650ull)
 #define NIX_AF_TX_NPC_CAPTURE_CONFIG   (0x660ull)
 #define NIX_AF_TX_NPC_CAPTURE_INFO (0x668ull)
+#define NIX_AF_SEB_COALESCE_DBGX(a) (0x670ull | (uint64_t)(a) << 3)
 #define NIX_AF_TX_NPC_CAPTURE_RESPX(a) (0x680ull | (uint64_t)(a) << 3)
 #define NIX_AF_SEB_ACTIVE_CYCLES_PCX(a) (0x6c0ull | (uint64_t)(a) << 3)
 #define NIX_AF_SMQX_CFG(a) (0x700ull | (uint64_t)(a) << 16)
@@ -115,6 +119,7 @@
 #define NIX_AF_SMQX_NXT_HEAD(a)(0x740ull | (uint64_t)(a) << 16)
 #define NIX_AF_SQM_ACTIVE_CYCLES_PC(0x770ull)
 #define NIX_AF_SQM_SCLK_CNT(0x780ull) /* [CN10K, .) */
+#define NIX_AF_DWRR_MTUX(a) (0x790ull | (uint64_t)(a) << 16)
 #define NIX_AF_DWRR_SDP_MTU(0x790ull) /* [CN10K, .) */
 #define NIX_AF_DWRR_RPM_MTU(0x7a0ull) /* [CN10K, .) */
 #define NIX_AF_PSE_CHANNEL_LEVEL   (0x800ull)
@@ -131,6 +136,7 @@
 #define NIX_AF_TX_LINKX_HW_XOFF(a) (0xa30ull | (uint64_t)(a) << 16)
 #define NIX_AF_SDP_LINK_CREDIT (0xa40ull)
 #define NIX_AF_SDP_LINK_CDT_ADJ(0xa50ull) /* [CN10K, .) */
+#define NIX_AF_LINK_CDT_ADJ_ERR(0xaa0ull) /* [CN10K, .) */
 /* [CN9K, CN10K) */
 #define NIX_AF_SDP_SW_XOFFX(a) (0xa60ull | (uint64_t)(a) << 3)
 #define NIX_AF_SDP_HW_XOFFX(a) (0xac0ull | (uint64_t)(a) << 3)
@@ -226,7 +232,7 @@
 #define NIX_AF_TL4X_CIR(a)  (0x1220ull | (uint64_t)(a) << 16)
 #define NIX_AF_TL4X_PIR(a)  (0x1230ull | (uint64_t)(a) << 16)
 #define NIX_AF_TL4X_SCHED_STATE(a)  (0x1240ull | (uint64_t)(a) << 16)
-#define NIX_AF_TL4X_SHAPE_STATE(a)  (0x1250ull | (uint64_t)(a) << 16)
+#define NIX_AF_TL4X_SHAPE_STATE_PIR(a)  (0x1250ull | (uint64_t)(a) << 16)
 #define NIX_AF_TL4X_SW_XOFF(a)  (0x1270ull | (uint64_t)(a) << 16)
 #define NIX_AF_TL4X_TOPOLOGY(a) (0x1280ull | (uint64_t)(a) << 
16)
 #define NIX_AF_TL4X_PARENT(a)   (0x1288ull | (uint64_t)(a) << 16)
@@ -272,6 +278,18 @@
 #define NIX_AF_CINT_TIMERX(a)  (0x1a40ull | (uint64_t)(a) << 18)
 #define NIX_AF_LSO_FORMATX_FIELDX(a, b)
\
(0x1b00ull | (uint64_t)(a) << 16 | (uint64_t)(b) << 3)
+/* [CN10K, .) */
+#define NIX_AF_SPI_TO_SA_KEYX_WAYX(a, b)(0x1c00ull | (uint64_t)(a) << 16 | 
(uint64_t)(b) << 3)
+#define NIX_AF_SPI_TO_SA_VALUEX_WAYX(a, b)  (0x1c40ull | (uint64_t)(a) << 16 | 
(uint64_t)(b) << 3)
+#define NIX_AF_SPI_TO

[PATCH v4 1/1] dts: rework packet addressing

[jspewock]

From: Jeremy Spewock 

This patch updates the _adjust_addresses method of test suites so
that addresses of packets are only modified if the developer did not
configure them beforehand. This allows for developers to have more
control over the content of their packets when sending them through the
framework.

Signed-off-by: Jeremy Spewock 
---
 dts/framework/test_suite.py | 71 +
 1 file changed, 48 insertions(+), 23 deletions(-)

diff --git a/dts/framework/test_suite.py b/dts/framework/test_suite.py
index 051509fb86..b2d8de99e7 100644
--- a/dts/framework/test_suite.py
+++ b/dts/framework/test_suite.py
@@ -225,7 +225,7 @@ def send_packets_and_capture(
 Returns:
 A list of received packets.
 """
-packets = [self._adjust_addresses(packet) for packet in packets]
+packets = self._adjust_addresses(packets)
 return self.tg_node.send_packets_and_capture(
 packets,
 self._tg_port_egress,
@@ -243,41 +243,66 @@ def get_expected_packet(self, packet: Packet) -> Packet:
 Returns:
 `packet` with injected L2/L3 addresses.
 """
-return self._adjust_addresses(packet, expected=True)
+return self._adjust_addresses([packet], expected=True)[0]
 
-def _adjust_addresses(self, packet: Packet, expected: bool = False) -> 
Packet:
+def _adjust_addresses(self, packets: list[Packet], expected: bool = False) 
-> list[Packet]:
 """L2 and L3 address additions in both directions.
 
+Packets in `packets` will be directly modified in this method. The 
returned list of packets
+however will be copies of the modified packets.
+
+Only missing addresses are added to packets, existing addresses will 
not be overridden. If
+any packet in `packets` has multiple IP layers (using GRE, for 
example) only the inner-most
+IP layer will have its addresses adjusted.
+
 Assumptions:
 Two links between SUT and TG, one link is TG -> SUT, the other SUT 
-> TG.
 
 Args:
-packet: The packet to modify.
+packets: The packets to modify.
 expected: If :data:`True`, the direction is SUT -> TG,
 otherwise the direction is TG -> SUT.
-"""
-if expected:
-# The packet enters the TG from SUT
-# update l2 addresses
-packet.src = self._sut_port_egress.mac_address
-packet.dst = self._tg_port_ingress.mac_address
 
-# The packet is routed from TG egress to TG ingress
-# update l3 addresses
-packet.payload.src = self._tg_ip_address_egress.ip.exploded
-packet.payload.dst = self._tg_ip_address_ingress.ip.exploded
-else:
-# The packet leaves TG towards SUT
+Returns:
+A list containing copies of all packets in `packets` after 
modification.
+"""
+ret_packets = []
+for packet in packets:
 # update l2 addresses
-packet.src = self._tg_port_egress.mac_address
-packet.dst = self._sut_port_ingress.mac_address
+# If `expected` is :data:`True`, the packet enters the TG from 
SUT, otherwise the
+# packet leaves the TG towards the SUT.
+
+# The fields parameter of a packet does not include fields of the 
payload, so this can
+# only be the Ether src/dst.
+if "src" not in packet.fields:
+packet.src = (
+self._sut_port_egress.mac_address
+if expected
+else self._tg_port_egress.mac_address
+)
+if "dst" not in packet.fields:
+packet.dst = (
+self._tg_port_ingress.mac_address
+if expected
+else self._sut_port_ingress.mac_address
+)
 
-# The packet is routed from TG egress to TG ingress
 # update l3 addresses
-packet.payload.src = self._tg_ip_address_egress.ip.exploded
-packet.payload.dst = self._tg_ip_address_ingress.ip.exploded
-
-return Ether(packet.build())
+# The packet is routed from TG egress to TG ingress regardless of 
whether it is
+# expected or not.
+num_ip_layers = packet.layers().count(IP)
+if num_ip_layers > 0:
+# Update the last IP layer if there are multiple (the 
framework should be modifying
+# the packet address instead of the tunnel address if there is 
one).
+l3_to_use = packet.getlayer(IP, num_ip_layers)
+if "src" not in l3_to_use.fields:
+l3_to_use.src = self._tg_ip_address_egress.ip.exploded
+
+if "dst" not in l3_to_use.fields:
+l3_to_use.dst = self._tg_ip_address_ingress.ip.exploded
+ret_packets.

[PATCH v4 0/1] dts: adjust packet addressing

[jspewock]

From: Jeremy Spewock 

v4:
 * changed _adjust_addresses so that it doesn't use unneeded variables
 * modify doc-strings

Jeremy Spewock (1):
  dts: rework packet addressing

 dts/framework/test_suite.py | 71 +
 1 file changed, 48 insertions(+), 23 deletions(-)

-- 
2.46.0

Re: [PATCH v1] dts: add send_packets to test_suite

[Jeremy Spewock]

On Thu, Sep 26, 2024 at 5:56 AM Juraj Linkeš  wrote:
>
>
>
> On 25. 9. 2024 20:36, jspew...@iol.unh.edu wrote:
> > From: Jeremy Spewock 
> >
> > Currently the only methods provided in the test suite class for sending
> > packets capture the resulting received traffic after sending. There is,
> > in some cases, a need to send multiple packets at once while not really
> > needing to capture any of said received traffic. It is favorable to
> > avoid capturing received traffic when you don't need it since not all
> > traffic generators will necessarily be capturing traffic generators.
> > The method to fulfill this need exists in the traffic generator
> > already, but this patch exposes the method to test suites.
> >
> > Depends-on: patch-10 ("dts: rework packet addressing")
>
> This could be in the same series. I wanted this to be in a different
> patch, but both patches could (and should) be in the same series.
>

Oops, I just submitted a new version of the other series before seeing
this, I will add this back into that series and resubmit.

> >
> > Signed-off-by: Jeremy Spewock 
> > ---
>
> The Depends-on: tag should be here, below the three hyphens. [0]
>
> [0] https://doc.dpdk.org/guides/contributing/patches.html#patch-dependencies
>

Ack, sorry, I always forget this.

> Other than that,
> Reviewed-by: Juraj Linkeš 
>
>

[PATCH v5 1/2] dts: rework packet addressing

[jspewock]

From: Jeremy Spewock 

This patch updates the _adjust_addresses method of test suites so
that addresses of packets are only modified if the developer did not
configure them beforehand. This allows for developers to have more
control over the content of their packets when sending them through the
framework.

Signed-off-by: Jeremy Spewock 
---
 dts/framework/test_suite.py | 71 +
 1 file changed, 48 insertions(+), 23 deletions(-)

diff --git a/dts/framework/test_suite.py b/dts/framework/test_suite.py
index 051509fb86..b2d8de99e7 100644
--- a/dts/framework/test_suite.py
+++ b/dts/framework/test_suite.py
@@ -225,7 +225,7 @@ def send_packets_and_capture(
 Returns:
 A list of received packets.
 """
-packets = [self._adjust_addresses(packet) for packet in packets]
+packets = self._adjust_addresses(packets)
 return self.tg_node.send_packets_and_capture(
 packets,
 self._tg_port_egress,
@@ -243,41 +243,66 @@ def get_expected_packet(self, packet: Packet) -> Packet:
 Returns:
 `packet` with injected L2/L3 addresses.
 """
-return self._adjust_addresses(packet, expected=True)
+return self._adjust_addresses([packet], expected=True)[0]
 
-def _adjust_addresses(self, packet: Packet, expected: bool = False) -> 
Packet:
+def _adjust_addresses(self, packets: list[Packet], expected: bool = False) 
-> list[Packet]:
 """L2 and L3 address additions in both directions.
 
+Packets in `packets` will be directly modified in this method. The 
returned list of packets
+however will be copies of the modified packets.
+
+Only missing addresses are added to packets, existing addresses will 
not be overridden. If
+any packet in `packets` has multiple IP layers (using GRE, for 
example) only the inner-most
+IP layer will have its addresses adjusted.
+
 Assumptions:
 Two links between SUT and TG, one link is TG -> SUT, the other SUT 
-> TG.
 
 Args:
-packet: The packet to modify.
+packets: The packets to modify.
 expected: If :data:`True`, the direction is SUT -> TG,
 otherwise the direction is TG -> SUT.
-"""
-if expected:
-# The packet enters the TG from SUT
-# update l2 addresses
-packet.src = self._sut_port_egress.mac_address
-packet.dst = self._tg_port_ingress.mac_address
 
-# The packet is routed from TG egress to TG ingress
-# update l3 addresses
-packet.payload.src = self._tg_ip_address_egress.ip.exploded
-packet.payload.dst = self._tg_ip_address_ingress.ip.exploded
-else:
-# The packet leaves TG towards SUT
+Returns:
+A list containing copies of all packets in `packets` after 
modification.
+"""
+ret_packets = []
+for packet in packets:
 # update l2 addresses
-packet.src = self._tg_port_egress.mac_address
-packet.dst = self._sut_port_ingress.mac_address
+# If `expected` is :data:`True`, the packet enters the TG from 
SUT, otherwise the
+# packet leaves the TG towards the SUT.
+
+# The fields parameter of a packet does not include fields of the 
payload, so this can
+# only be the Ether src/dst.
+if "src" not in packet.fields:
+packet.src = (
+self._sut_port_egress.mac_address
+if expected
+else self._tg_port_egress.mac_address
+)
+if "dst" not in packet.fields:
+packet.dst = (
+self._tg_port_ingress.mac_address
+if expected
+else self._sut_port_ingress.mac_address
+)
 
-# The packet is routed from TG egress to TG ingress
 # update l3 addresses
-packet.payload.src = self._tg_ip_address_egress.ip.exploded
-packet.payload.dst = self._tg_ip_address_ingress.ip.exploded
-
-return Ether(packet.build())
+# The packet is routed from TG egress to TG ingress regardless of 
whether it is
+# expected or not.
+num_ip_layers = packet.layers().count(IP)
+if num_ip_layers > 0:
+# Update the last IP layer if there are multiple (the 
framework should be modifying
+# the packet address instead of the tunnel address if there is 
one).
+l3_to_use = packet.getlayer(IP, num_ip_layers)
+if "src" not in l3_to_use.fields:
+l3_to_use.src = self._tg_ip_address_egress.ip.exploded
+
+if "dst" not in l3_to_use.fields:
+l3_to_use.dst = self._tg_ip_address_ingress.ip.exploded
+ret_packets.

[PATCH v5 1/1] dts: use PythonShell for Scapy instead of XML-RPC

[jspewock]

From: Jeremy Spewock 

Previously all scapy commands were handled using an XML-RPC server that
ran on the TGNode. This unnecessarily enforces a minimum Python version
of 3.10 on the server that is being used as a traffic generator and
complicates the implementation of scapy methods. This patch removes the
XML-RPC server completely and instead allows the Scapy TG to extend from
the PythonShell to implement the functionality of a traffic generator.
This is done by importing the Scapy library in the PythonShell and
sending commands directly to the interactive session on the TG Node.

Bugzilla ID: 1374

Signed-off-by: Jeremy Spewock 
---
 .../single_active_interactive_shell.py|   8 +-
 .../traffic_generator/__init__.py |   2 +-
 .../testbed_model/traffic_generator/scapy.py  | 455 +++---
 .../traffic_generator/traffic_generator.py|  15 +-
 dts/framework/utils.py|  15 +
 5 files changed, 196 insertions(+), 299 deletions(-)

diff --git a/dts/framework/remote_session/single_active_interactive_shell.py 
b/dts/framework/remote_session/single_active_interactive_shell.py
index 77a4dcefdf..e3f6424e97 100644
--- a/dts/framework/remote_session/single_active_interactive_shell.py
+++ b/dts/framework/remote_session/single_active_interactive_shell.py
@@ -36,9 +36,10 @@
 from framework.params import Params
 from framework.settings import SETTINGS
 from framework.testbed_model.node import Node
+from framework.utils import MultiInheritanceBaseClass
 
 
-class SingleActiveInteractiveShell(ABC):
+class SingleActiveInteractiveShell(MultiInheritanceBaseClass, ABC):
 """The base class for managing interactive shells.
 
 This class shouldn't be instantiated directly, but instead be extended. It 
contains
@@ -93,9 +94,13 @@ def __init__(
 timeout: float = SETTINGS.timeout,
 app_params: Params = Params(),
 name: str | None = None,
+**kwargs,
 ) -> None:
 """Create an SSH channel during initialization.
 
+Additional keyword arguments can be passed through `kwargs` if needed 
for fulfilling other
+constructors in the case of multiple inheritance.
+
 Args:
 node: The node on which to run start the interactive shell.
 privileged: Enables the shell to run as superuser.
@@ -115,6 +120,7 @@ def __init__(
 self._timeout = timeout
 # Ensure path is properly formatted for the host
 self._update_real_path(self.path)
+super().__init__(node, **kwargs)
 
 def _setup_ssh_channel(self):
 self._ssh_channel = 
self._node.main_session.interactive_session.session.invoke_shell()
diff --git a/dts/framework/testbed_model/traffic_generator/__init__.py 
b/dts/framework/testbed_model/traffic_generator/__init__.py
index 6dac86a224..a319fa5320 100644
--- a/dts/framework/testbed_model/traffic_generator/__init__.py
+++ b/dts/framework/testbed_model/traffic_generator/__init__.py
@@ -36,7 +36,7 @@ def create_traffic_generator(
 """
 match traffic_generator_config:
 case ScapyTrafficGeneratorConfig():
-return ScapyTrafficGenerator(tg_node, traffic_generator_config)
+return ScapyTrafficGenerator(tg_node, traffic_generator_config, 
privileged=True)
 case _:
 raise ConfigurationError(
 f"Unknown traffic generator: 
{traffic_generator_config.traffic_generator_type}"
diff --git a/dts/framework/testbed_model/traffic_generator/scapy.py 
b/dts/framework/testbed_model/traffic_generator/scapy.py
index 13fc1107aa..e46a787ee5 100644
--- a/dts/framework/testbed_model/traffic_generator/scapy.py
+++ b/dts/framework/testbed_model/traffic_generator/scapy.py
@@ -6,311 +6,151 @@
 
 A traffic generator used for functional testing, implemented with
 `the Scapy library `_.
-The traffic generator uses an XML-RPC server to run Scapy on the remote TG 
node.
+The traffic generator uses an interactive shell to run Scapy on the remote TG 
node.
 
-The traffic generator uses the :mod:`xmlrpc.server` module to run an XML-RPC 
server
-in an interactive remote Python SSH session. The communication with the server 
is facilitated
-with a local server proxy from the :mod:`xmlrpc.client` module.
+The traffic generator extends 
:class:`framework.remote_session.python_shell.PythonShell` to
+implement the methods for handling packets by sending commands into the 
interactive shell.
 """
 
-import inspect
-import marshal
+
+import re
 import time
-import types
-import xmlrpc.client
-from xmlrpc.server import SimpleXMLRPCServer
+from typing import ClassVar
 
-import scapy.all  # type: ignore[import-untyped]
+from scapy.compat import base64_bytes  # type: ignore[import-untyped]
 from scapy.layers.l2 import Ether  # type: ignore[import-untyped]
 from scapy.packet import Packet  # type: ignore[import-untyped]
 
 from framework.config import OS, ScapyTrafficGeneratorConfig
 from framework.remote_

[PATCH v5 0/2] dts: adjust packet addressing and add send_packets to test_suite

[jspewock]

From: Jeremy Spewock 

v5:
 * add send_packets patch back into this series but as its own patch

Jeremy Spewock (2):
  dts: rework packet addressing
  dts: add send_packets to test_suite

 dts/framework/test_suite.py| 83 +++---
 dts/framework/testbed_model/tg_node.py |  9 +++
 2 files changed, 69 insertions(+), 23 deletions(-)

-- 
2.46.0

[RFC PATCH v9] mempool: fix mempool cache size

[Morten Brørup]

This patch refactors the mempool cache to fix two bugs:
1. When a mempool is created with a cache size of N objects, the cache was
actually created with a size of 1.5 * N objects.
2. The mempool cache field names did not reflect their purpose;
the "flushthresh" field held the size, and the "size" field held the
number of objects remaining in the cache when returning from a get
operation refilling it from the backend.

Especially the first item could be fatal:
When more objects than a mempool's configured cache size is held in the
mempool's caches associated with other lcores, a rightsized mempool may
unexpectedly run out of objects, causing the application to fail.

Furthermore, this patch introduces two optimizations:
1. The mempool caches are flushed to/filled from the backend in their
entirety, so backend accesses are CPU cache line aligned. (Assuming the
mempool cache size is a multiplum of a CPU cache line size divided by the
size of a pointer.)
2. The unlikely paths in the get and put functions, where the cache is
flushed to/filled from the backend, are moved from the inline functions to
separate helper functions, thereby reducing the code size of the inline
functions.
Note: Accessing the backend for cacheless mempools remains inline.

Various drivers accessing the mempool directly have been updated
accordingly.
These drivers did not update mempool statistics when accessing the mempool
directly, so that is fixed too.

Note: Performance not yet benchmarked.

Signed-off-by: Morten Brørup 
---
v9:
* Removed factor 1.5 from description of cache_size parameter to
  rte_mempool_create().
* Refactored rte_mempool_do_generic_put() to eliminate some gotos.
  No functional change.
* Removed check for n >= RTE_MEMPOOL_CACHE_MAX_SIZE in
  rte_mempool_do_generic_get(); it caused the function to fail when the
  request could not be served from the backend alone, but it could be
  served from the cache and the backend.
* Refactored rte_mempool_do_generic_get_split() to make it shorter.
* When getting objects directly from the backend, use burst size aligned
  with either CPU cache line size or mempool cache size.
v8:
* Rewrote rte_mempool_do_generic_put() to get rid of transaction
  splitting. Use a method similar to the existing put method with fill
  followed by flush if overfilled.
  This also made rte_mempool_do_generic_put_split() obsolete.
* When flushing the cache as much as we can, use burst size aligned with
  either CPU cache line size or mempool cache size.
v7:
* Increased max mempool cache size from 512 to 1024 objects.
  Mainly for CI performance test purposes.
  Originally, the max mempool cache size was 768 objects, and used a fixed
  size array of 1024 objects in the mempool cache structure.
v6:
* Fix v5 incomplete implementation of passing large requests directly to
  the backend.
* Use memcpy instead of rte_memcpy where compiler complains about it.
* Added const to some function parameters.
v5:
* Moved helper functions back into the header file, for improved
  performance.
* Pass large requests directly to the backend. This also simplifies the
  code.
v4:
* Updated subject to reflect that misleading names are considered bugs.
* Rewrote patch description to provide more details about the bugs fixed.
  (Mattias Rönnblom)
* Moved helper functions, not to be inlined, to mempool C file.
  (Mattias Rönnblom)
* Pass requests for n >= RTE_MEMPOOL_CACHE_MAX_SIZE objects known at build
  time directly to backend driver, to avoid calling the helper functions.
  This also fixes the compiler warnings about out of bounds array access.
v3:
* Removed __attribute__(assume).
v2:
* Removed mempool perf test; not part of patch set.
---
 drivers/common/idpf/idpf_common_rxtx_avx512.c |  54 ++--
 drivers/mempool/dpaa/dpaa_mempool.c   |  16 +-
 drivers/mempool/dpaa2/dpaa2_hw_mempool.c  |  14 -
 drivers/net/i40e/i40e_rxtx_vec_avx512.c   |  17 +-
 drivers/net/iavf/iavf_rxtx_vec_avx512.c   |  27 +-
 drivers/net/ice/ice_rxtx_vec_avx512.c |  27 +-
 lib/mempool/mempool_trace.h   |   1 -
 lib/mempool/rte_mempool.c |  12 +-
 lib/mempool/rte_mempool.h | 271 ++
 9 files changed, 200 insertions(+), 239 deletions(-)

diff --git a/drivers/common/idpf/idpf_common_rxtx_avx512.c 
b/drivers/common/idpf/idpf_common_rxtx_avx512.c
index 3b5e124ec8..98535a48f3 100644
--- a/drivers/common/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/common/idpf/idpf_common_rxtx_avx512.c
@@ -1024,21 +1024,13 @@ idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue 
*txq)
rte_lcore_id());
void **cache_objs;
 
-   if (cache == NULL || cache->len == 0)
-   goto normal;
-
-   cache_objs = &cache->objs[cache->len];
-
-   if (n > RTE_MEMPOOL_CACHE_MAX_SIZE) {
-   rte_mempool_ops_enqueue_bulk(mp, (void *)txep, n);
+

[PATCH v5 2/2] dts: add send_packets to test_suite

[jspewock]

From: Jeremy Spewock 

Currently the only methods provided in the test suite class for sending
packets capture the resulting received traffic after sending. There is,
in some cases, a need to send multiple packets at once while not really
needing to capture any of said received traffic. It is favorable to
avoid capturing received traffic when you don't need it since not all
traffic generators will necessarily be capturing traffic generators.
The method to fulfill this need exists in the traffic generator
already, but this patch exposes the method to test suites.

Signed-off-by: Jeremy Spewock 
Reviewed-by: Juraj Linkeš 
Reviewed-by: Patrick Robb 
---
 dts/framework/test_suite.py| 12 
 dts/framework/testbed_model/tg_node.py |  9 +
 2 files changed, 21 insertions(+)

diff --git a/dts/framework/test_suite.py b/dts/framework/test_suite.py
index b2d8de99e7..159071d0e2 100644
--- a/dts/framework/test_suite.py
+++ b/dts/framework/test_suite.py
@@ -234,6 +234,18 @@ def send_packets_and_capture(
 duration,
 )
 
+def send_packets(
+self,
+packets: list[Packet],
+) -> None:
+"""Send packets using the traffic generator and do not capture 
received traffic.
+
+Args:
+packets: Packets to send.
+"""
+packets = self._adjust_addresses(packets)
+self.tg_node.send_packets(packets, self._tg_port_egress)
+
 def get_expected_packet(self, packet: Packet) -> Packet:
 """Inject the proper L2/L3 addresses into `packet`.
 
diff --git a/dts/framework/testbed_model/tg_node.py 
b/dts/framework/testbed_model/tg_node.py
index 19b5b6e74c..4179365abb 100644
--- a/dts/framework/testbed_model/tg_node.py
+++ b/dts/framework/testbed_model/tg_node.py
@@ -83,6 +83,15 @@ def send_packets_and_capture(
 duration,
 )
 
+def send_packets(self, packets: list[Packet], port: Port):
+"""Send packets without capturing resulting received packets.
+
+Args:
+packets: Packets to send.
+port: Port to send the packets on.
+"""
+self.traffic_generator.send_packets(packets, port)
+
 def close(self) -> None:
 """Free all resources used by the node.
 
-- 
2.46.0

[PATCH v2 01/18] mempool/cnxk: add cn20k PCI device ids

[Nithin Dabilpuram]

From: Ashwin Sekhar T K 

Add cn20k PCI device ids.

Signed-off-by: Ashwin Sekhar T K 
---
 doc/guides/rel_notes/release_24_11.rst | 4 
 drivers/mempool/cnxk/cnxk_mempool.c| 2 ++
 2 files changed, 6 insertions(+)

diff --git a/doc/guides/rel_notes/release_24_11.rst 
b/doc/guides/rel_notes/release_24_11.rst
index 0ff70d9057..3c666ddd10 100644
--- a/doc/guides/rel_notes/release_24_11.rst
+++ b/doc/guides/rel_notes/release_24_11.rst
@@ -55,6 +55,10 @@ New Features
  Also, make sure to start the actual text at the margin.
  ===
 
+* **Updated Marvell cnxk mempool driver.**
+
+  * Added support for HW mempool in CN20K SoC.
+
 
 Removed Items
 -
diff --git a/drivers/mempool/cnxk/cnxk_mempool.c 
b/drivers/mempool/cnxk/cnxk_mempool.c
index 1181b6f265..6ff11d8004 100644
--- a/drivers/mempool/cnxk/cnxk_mempool.c
+++ b/drivers/mempool/cnxk/cnxk_mempool.c
@@ -161,6 +161,7 @@ npa_probe(struct rte_pci_driver *pci_drv, struct 
rte_pci_device *pci_dev)
 }
 
 static const struct rte_pci_id npa_pci_map[] = {
+   CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN20KA, PCI_DEVID_CNXK_RVU_NPA_PF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_NPA_PF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_NPA_PF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_NPA_PF),
@@ -172,6 +173,7 @@ static const struct rte_pci_id npa_pci_map[] = {
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KD, PCI_DEVID_CNXK_RVU_NPA_PF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KE, PCI_DEVID_CNXK_RVU_NPA_PF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF9KA, PCI_DEVID_CNXK_RVU_NPA_PF),
+   CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN20KA, PCI_DEVID_CNXK_RVU_NPA_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_NPA_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_NPA_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_NPA_VF),
-- 
2.34.1

[PATCH v3 2/2] dts: add pf smoke testing suite

[jspewock]

From: Jeremy Spewock 

This patch adds a smoke testing suite for Physical Function features.
The goal of this suite is to test some of the most basic features of
DPDK on a physical function and bail out early if any of these features
aren't supported as expected. Unlike DTS smoke tests, these ones are not
included as a switch in the config file and thus are an additional test
suite that developers can include alongside others at their own
discretion.

Signed-off-by: Jeremy Spewock 
---

Depends-on: series-33147 ("dts: adjust packet addressing and add
 send_packets to test_suite")

 dts/framework/config/conf_yaml_schema.json |   3 +-
 dts/tests/TestSuite_pf_smoke_tests.py  | 121 +
 2 files changed, 123 insertions(+), 1 deletion(-)
 create mode 100644 dts/tests/TestSuite_pf_smoke_tests.py

diff --git a/dts/framework/config/conf_yaml_schema.json 
b/dts/framework/config/conf_yaml_schema.json
index df390e8ae2..c15f960318 100644
--- a/dts/framework/config/conf_yaml_schema.json
+++ b/dts/framework/config/conf_yaml_schema.json
@@ -187,7 +187,8 @@
   "enum": [
 "hello_world",
 "os_udp",
-"pmd_buffer_scatter"
+"pmd_buffer_scatter",
+"pf_smoke_tests"
   ]
 },
 "test_target": {
diff --git a/dts/tests/TestSuite_pf_smoke_tests.py 
b/dts/tests/TestSuite_pf_smoke_tests.py
new file mode 100644
index 00..287132e9dd
--- /dev/null
+++ b/dts/tests/TestSuite_pf_smoke_tests.py
@@ -0,0 +1,121 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2024 University of New Hampshire
+"""Physical Function (PF) smoke testing suite.
+
+This test suite tests some of the more common DPDK functionality on a PF. 
Things such as
+jumbroframes, Receive Side Scaling (RSS) functions, and being able to modify 
the number of queues
+at runtime should all be supported by PMDs that are capable of running DPDK. 
Since this is a smoke
+testing suite, it is considered a blocking suite that will stop following ones 
from running.
+"""
+
+from typing import ClassVar
+
+from scapy.layers.inet import IP  # type: ignore[import-untyped]
+from scapy.layers.l2 import Ether  # type: ignore[import-untyped]
+from scapy.packet import Raw  # type: ignore[import-untyped]
+
+from framework.exception import InteractiveCommandExecutionError, 
TestCaseVerifyError
+from framework.params.testpmd import SimpleForwardingModes
+from framework.remote_session.testpmd_shell import TestPmdShell
+from framework.test_suite import TestSuite
+
+
+class TestPfSmokeTests(TestSuite):
+"""DPDK Physical Function Testing Suite.
+
+This test suite is designed to verify the basic functions of DPDK on a PF. 
The MTU of the ports
+on the traffic generator are increased to 9000 to support jumboframes for 
one of the test
+cases, and then reverted back to 1500 once the test suite is complete.
+
+Attributes:
+is_blocking: This test suite will block the execution of all other 
test suites
+in the build target after it.
+"""
+
+is_blocking: ClassVar[bool] = True
+jumbo_frame_len: ClassVar[int] = 9000
+num_queues: int = 4
+
+def set_up_suite(self) -> None:
+"""Increase the MTU of the traffic generator to support jumboframes."""
+for port_link in self._port_links:
+self.tg_node.main_session.configure_port_mtu(self.jumbo_frame_len, 
port_link.tg_port)
+
+def test_jumbo_frame_support(self) -> None:
+"""Verify that the PF is able to send and receive jumboframes."""
+with TestPmdShell(
+self.sut_node,
+max_pkt_len=self.jumbo_frame_len,
+mbuf_size=[self.jumbo_frame_len + 128],
+forward_mode=SimpleForwardingModes.mac,
+) as testpmd:
+testpmd.start()
+# Take 26 bytes off the MTU size to account for Ethernet headers
+payload_len = self.jumbo_frame_len - 26
+packet = Ether() / Raw("X" * payload_len)
+recv = self.send_packet_and_capture(packet)
+self.verify(
+any(hasattr(p, "load") and "X" * 20 in str(p.load) for p in 
recv),
+f"Jumboframe was not received even when MTU was set to 
{self.jumbo_frame_len}.",
+)
+
+def test_rss_functionality(self) -> None:
+"""Test that Receive Side Scaling functions are working as intended.
+
+The primary things to test in this case are that packets that are sent 
with different
+destination IP addresses are handled by different queues and that the 
RSS hash of every
+packet is unique. Verification of these functionalities is done by 
sending packets with
+a unique source MAC addresses so that the packets sent by this test 
suite can be
+differentiated from other packets sent to the same port.
+"""
+with TestPmdShell(
+self.sut_node,
+forward_mode=SimpleForwardingModes.rxonly,
+rx_queues=self.num_queues,
+  

[PATCH v3 1/2] dts: add ability to modify number of queues on a port to testpmd

[jspewock]

From: Jeremy Spewock 

The ability to change the configuration of a port at runtime is a
crucial aspect of DPDK. This patch adds both the steps required to
modify the number of queues on a port at runtime and also the
verification steps to ensure that the command behaved as expected.

Signed-off-by: Jeremy Spewock 
---

Depends-on: patch-144270 ("dts: add VLAN methods to testpmd shell")
Depends-on: patch-144458 ("dts: add text parser for testpmd verbose output")

 dts/framework/remote_session/testpmd_shell.py | 36 +++
 1 file changed, 36 insertions(+)

diff --git a/dts/framework/remote_session/testpmd_shell.py 
b/dts/framework/remote_session/testpmd_shell.py
index 893cf7255c..4325a7d9c5 100644
--- a/dts/framework/remote_session/testpmd_shell.py
+++ b/dts/framework/remote_session/testpmd_shell.py
@@ -1713,6 +1713,42 @@ def extract_verbose_output(output: str) -> 
list[TestPmdVerbosePacket]:
 
out.append(TestPmdVerbosePacket.parse(f"{prev_header}\n{match.group('PACKET')}"))
 return out
 
+def set_num_queues_all(self, num_queues: int, is_rx: bool, verify: bool = 
True) -> None:
+"""Modify the number of Rx/Tx queues configured on all ports.
+
+Args:
+num_queues: Number of queues to set on all ports.
+is_rx: If :data:`True` then the number of Rx queues will be 
modified, otherwise the
+number of Tx queues will be modified.
+verify: If :data:`True` then an additional command will be sent to 
check the info of
+`port_id` and verify that the number of queues is equal to 
`num_queues`.
+
+Raises:
+InteractiveCommandExecutionError: If `verify` is :data:`True` and 
testpmd failed to
+update the number of queues on the ports.
+"""
+queue_type = "rxq" if is_rx else "txq"
+self.stop_all_ports(verify=verify)
+port_config_output = self.send_command(f"port config all {queue_type} 
{num_queues}")
+# ports have to be started before the output can be verified.
+self.start_all_ports(verify=verify)
+if verify:
+all_ports_modified = all(
+queues == num_queues
+for queues in map(
+lambda info: info.rx_queues_num if is_rx else 
info.tx_queues_num,
+self.show_port_info_all(),
+)
+)
+if not all_ports_modified:
+self._logger.debug(
+f"Failed to set number of queues on all ports to "
+f"{num_queues}:\n{port_config_output}"
+)
+raise InteractiveCommandExecutionError(
+"Testpmd failed to update the number of queues on all 
ports."
+)
+
 def _close(self) -> None:
 """Overrides :meth:`~.interactive_shell.close`."""
 self.stop()
-- 
2.46.0

[PATCH v3 0/2] dts: pf_smoke port

[jspewock]

From: Jeremy Spewock 

v3:
 * rebase on next-dts
 * update dependencies

Jeremy Spewock (2):
  dts: add ability to modify number of queues on a port to testpmd
  dts: add pf smoke testing suite

 dts/framework/config/conf_yaml_schema.json|   3 +-
 dts/framework/remote_session/testpmd_shell.py |  36 ++
 dts/tests/TestSuite_pf_smoke_tests.py | 121 ++
 3 files changed, 159 insertions(+), 1 deletion(-)
 create mode 100644 dts/tests/TestSuite_pf_smoke_tests.py

-- 
2.46.0

[PATCH v2 07/18] common/cnxk: support bandwidth profile for cn20k

[Nithin Dabilpuram]

From: Satha Rao 

Add support to setup bandwidth profile config for cn20k
for Rx policier.

Signed-off-by: Satha Rao 
---
 drivers/common/cnxk/roc_nix_bpf.c   | 528 ++--
 drivers/common/cnxk/roc_nix_queue.c | 136 ---
 2 files changed, 425 insertions(+), 239 deletions(-)

diff --git a/drivers/common/cnxk/roc_nix_bpf.c 
b/drivers/common/cnxk/roc_nix_bpf.c
index d60396289b..98c9855a5b 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -547,9 +547,9 @@ roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,
 {
uint64_t exponent_p = 0, mantissa_p = 0, div_exp_p = 0;
struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+   volatile struct nix_band_prof_s *prof, *prof_mask;
struct dev *dev = &nix->dev;
struct mbox *mbox = dev->mbox;
-   struct nix_cn10k_aq_enq_req *aq;
uint32_t policer_timeunit;
uint8_t level_idx;
int rc;
@@ -568,103 +568,122 @@ roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,
if (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID)
return NIX_ERR_PARAM;
 
-   aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox_get(mbox));
-   if (aq == NULL) {
-   rc = -ENOSPC;
-   goto exit;
+   if (roc_model_is_cn10k()) {
+   struct nix_cn10k_aq_enq_req *aq;
+
+   aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox_get(mbox));
+   if (aq == NULL) {
+   rc = -ENOSPC;
+   goto exit;
+   }
+   aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14) | id;
+   aq->ctype = NIX_AQ_CTYPE_BAND_PROF;
+   aq->op = NIX_AQ_INSTOP_WRITE;
+   prof = &aq->prof;
+   prof_mask = &aq->prof_mask;
+   } else {
+   struct nix_cn20k_aq_enq_req *aq;
+
+   aq = mbox_alloc_msg_nix_cn20k_aq_enq(mbox_get(mbox));
+   if (aq == NULL) {
+   rc = -ENOSPC;
+   goto exit;
+   }
+   aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14) | id;
+   aq->ctype = NIX_AQ_CTYPE_BAND_PROF;
+   aq->op = NIX_AQ_INSTOP_WRITE;
+   prof = &aq->prof;
+   prof_mask = &aq->prof_mask;
}
-   aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14) | id;
-   aq->ctype = NIX_AQ_CTYPE_BAND_PROF;
-   aq->op = NIX_AQ_INSTOP_WRITE;
 
-   aq->prof.adjust_exponent = NIX_BPF_DEFAULT_ADJUST_EXPONENT;
-   aq->prof.adjust_mantissa = NIX_BPF_DEFAULT_ADJUST_MANTISSA;
+   prof->adjust_exponent = NIX_BPF_DEFAULT_ADJUST_EXPONENT;
+   prof->adjust_mantissa = NIX_BPF_DEFAULT_ADJUST_MANTISSA;
if (cfg->lmode == ROC_NIX_BPF_LMODE_BYTE)
-   aq->prof.adjust_mantissa = NIX_BPF_DEFAULT_ADJUST_MANTISSA / 2;
+   prof->adjust_mantissa = NIX_BPF_DEFAULT_ADJUST_MANTISSA / 2;
 
-   aq->prof_mask.adjust_exponent = ~(aq->prof_mask.adjust_exponent);
-   aq->prof_mask.adjust_mantissa = ~(aq->prof_mask.adjust_mantissa);
+   prof_mask->adjust_exponent = ~(prof_mask->adjust_exponent);
+   prof_mask->adjust_mantissa = ~(prof_mask->adjust_mantissa);
 
switch (cfg->alg) {
case ROC_NIX_BPF_ALGO_2697:
meter_rate_to_nix(cfg->algo2697.cir, &exponent_p, &mantissa_p,
  &div_exp_p, policer_timeunit);
-   aq->prof.cir_mantissa = mantissa_p;
-   aq->prof.cir_exponent = exponent_p;
+   prof->cir_mantissa = mantissa_p;
+   prof->cir_exponent = exponent_p;
 
meter_burst_to_nix(cfg->algo2697.cbs, &exponent_p, &mantissa_p);
-   aq->prof.cbs_mantissa = mantissa_p;
-   aq->prof.cbs_exponent = exponent_p;
+   prof->cbs_mantissa = mantissa_p;
+   prof->cbs_exponent = exponent_p;
 
meter_burst_to_nix(cfg->algo2697.ebs, &exponent_p, &mantissa_p);
-   aq->prof.pebs_mantissa = mantissa_p;
-   aq->prof.pebs_exponent = exponent_p;
+   prof->pebs_mantissa = mantissa_p;
+   prof->pebs_exponent = exponent_p;
 
-   aq->prof_mask.cir_mantissa = ~(aq->prof_mask.cir_mantissa);
-   aq->prof_mask.cbs_mantissa = ~(aq->prof_mask.cbs_mantissa);
-   aq->prof_mask.pebs_mantissa = ~(aq->prof_mask.pebs_mantissa);
-   aq->prof_mask.cir_exponent = ~(aq->prof_mask.cir_exponent);
-   aq->prof_mask.cbs_exponent = ~(aq->prof_mask.cbs_exponent);
-   aq->prof_mask.pebs_exponent = ~(aq->prof_mask.pebs_exponent);
+   prof_mask->cir_mantissa = ~(prof_mask->cir_mantissa);
+   prof_mask->cbs_mantissa = ~(prof_mask->cbs_mantissa);
+   prof_mask->pebs_mantissa = ~(prof_mask->pebs_mantissa);
+   prof_mask->cir_exponent = ~(prof_mask->cir_exponent);
+   prof_mask->cbs_exponent = ~(

[PATCH v2 08/18] common/cnxk: support NIX debug for cn20k

[Nithin Dabilpuram]

From: Satha Rao 

Add support to dump cn20k queue structs and also provide the same
in telemetry data.

Signed-off-by: Satha Rao 
---
 drivers/common/cnxk/cnxk_telemetry_nix.c | 260 ++-
 drivers/common/cnxk/roc_nix_debug.c  | 234 +++-
 drivers/common/cnxk/roc_nix_priv.h   |   3 +-
 3 files changed, 488 insertions(+), 9 deletions(-)

diff --git a/drivers/common/cnxk/cnxk_telemetry_nix.c 
b/drivers/common/cnxk/cnxk_telemetry_nix.c
index ccae5d7853..abeefafe1e 100644
--- a/drivers/common/cnxk/cnxk_telemetry_nix.c
+++ b/drivers/common/cnxk/cnxk_telemetry_nix.c
@@ -346,7 +346,7 @@ nix_rq_ctx_cn9k(volatile void *qctx, struct plt_tel_data *d)
 }
 
 static void
-nix_rq_ctx(volatile void *qctx, struct plt_tel_data *d)
+nix_rq_ctx_cn10k(volatile void *qctx, struct plt_tel_data *d)
 {
volatile struct nix_cn10k_rq_ctx_s *ctx;
 
@@ -438,6 +438,100 @@ nix_rq_ctx(volatile void *qctx, struct plt_tel_data *d)
CNXK_TEL_DICT_U64(d, ctx, re_pkts, w10_);
 }
 
+static void
+nix_rq_ctx(volatile void *qctx, struct plt_tel_data *d)
+{
+   volatile struct nix_cn20k_rq_ctx_s *ctx;
+
+   ctx = (volatile struct nix_cn20k_rq_ctx_s *)qctx;
+
+   /* W0 */
+   CNXK_TEL_DICT_INT(d, ctx, wqe_aura, w0_);
+   CNXK_TEL_DICT_INT(d, ctx, len_ol3_dis, w0_);
+   CNXK_TEL_DICT_INT(d, ctx, len_ol4_dis, w0_);
+   CNXK_TEL_DICT_INT(d, ctx, len_il3_dis, w0_);
+   CNXK_TEL_DICT_INT(d, ctx, len_il4_dis, w0_);
+   CNXK_TEL_DICT_INT(d, ctx, csum_ol4_dis, w0_);
+   CNXK_TEL_DICT_INT(d, ctx, csum_il4_dis, w0_);
+   CNXK_TEL_DICT_INT(d, ctx, lenerr_dis, w0_);
+   CNXK_TEL_DICT_INT(d, ctx, port_ol4_dis, w0_);
+   CNXK_TEL_DICT_INT(d, ctx, port_il4_dis, w0_);
+   CNXK_TEL_DICT_INT(d, ctx, ena_wqwd, w0);
+   CNXK_TEL_DICT_INT(d, ctx, ipsech_ena, w0);
+   CNXK_TEL_DICT_INT(d, ctx, sso_ena, w0);
+   CNXK_TEL_DICT_INT(d, ctx, ena, w0);
+
+   /* W1 */
+   CNXK_TEL_DICT_INT(d, ctx, chi_ena, w1_);
+   CNXK_TEL_DICT_INT(d, ctx, ipsecd_drop_en, w1_);
+   CNXK_TEL_DICT_INT(d, ctx, pb_stashing, w1_);
+   CNXK_TEL_DICT_INT(d, ctx, lpb_drop_ena, w1_);
+   CNXK_TEL_DICT_INT(d, ctx, spb_drop_ena, w1_);
+   CNXK_TEL_DICT_INT(d, ctx, xqe_drop_ena, w1_);
+   CNXK_TEL_DICT_INT(d, ctx, wqe_caching, w1_);
+   CNXK_TEL_DICT_INT(d, ctx, pb_caching, w1_);
+   CNXK_TEL_DICT_INT(d, ctx, sso_tt, w1_);
+   CNXK_TEL_DICT_INT(d, ctx, sso_grp, w1_);
+   CNXK_TEL_DICT_INT(d, ctx, lpb_aura, w1_);
+   CNXK_TEL_DICT_INT(d, ctx, spb_aura, w1_);
+
+   /* W2 */
+   CNXK_TEL_DICT_INT(d, ctx, xqe_hdr_split, w2_);
+   CNXK_TEL_DICT_INT(d, ctx, xqe_imm_copy, w2_);
+   CNXK_TEL_DICT_INT(d, ctx, band_prof_id_h, w2_);
+   CNXK_TEL_DICT_INT(d, ctx, xqe_imm_size, w2_);
+   CNXK_TEL_DICT_INT(d, ctx, later_skip, w2_);
+   CNXK_TEL_DICT_INT(d, ctx, sso_bp_ena, w2_);
+   CNXK_TEL_DICT_INT(d, ctx, first_skip, w2_);
+   CNXK_TEL_DICT_INT(d, ctx, lpb_sizem1, w2_);
+   CNXK_TEL_DICT_INT(d, ctx, spb_ena, w2_);
+   CNXK_TEL_DICT_INT(d, ctx, spb_high_sizem1, w2_);
+   CNXK_TEL_DICT_INT(d, ctx, wqe_skip, w2_);
+   CNXK_TEL_DICT_INT(d, ctx, spb_sizem1, w2_);
+   CNXK_TEL_DICT_INT(d, ctx, policer_ena, w2_);
+   CNXK_TEL_DICT_INT(d, ctx, band_prof_id_l, w2_);
+
+   /* W3 */
+   CNXK_TEL_DICT_INT(d, ctx, spb_pool_pass, w3_);
+   CNXK_TEL_DICT_INT(d, ctx, spb_pool_drop, w3_);
+   CNXK_TEL_DICT_INT(d, ctx, spb_aura_pass, w3_);
+   CNXK_TEL_DICT_INT(d, ctx, spb_aura_drop, w3_);
+   CNXK_TEL_DICT_INT(d, ctx, wqe_pool_pass, w3_);
+   CNXK_TEL_DICT_INT(d, ctx, wqe_pool_drop, w3_);
+   CNXK_TEL_DICT_INT(d, ctx, xqe_pass, w3_);
+   CNXK_TEL_DICT_INT(d, ctx, xqe_drop, w3_);
+
+   /* W4 */
+   CNXK_TEL_DICT_INT(d, ctx, qint_idx, w4_);
+   CNXK_TEL_DICT_INT(d, ctx, rq_int_ena, w4_);
+   CNXK_TEL_DICT_INT(d, ctx, rq_int, w4_);
+   CNXK_TEL_DICT_INT(d, ctx, lpb_pool_pass, w4_);
+   CNXK_TEL_DICT_INT(d, ctx, lpb_pool_drop, w4_);
+   CNXK_TEL_DICT_INT(d, ctx, lpb_aura_pass, w4_);
+   CNXK_TEL_DICT_INT(d, ctx, lpb_aura_drop, w4_);
+
+   /* W5 */
+   CNXK_TEL_DICT_INT(d, ctx, flow_tagw, w5_);
+   CNXK_TEL_DICT_INT(d, ctx, bad_utag, w5_);
+   CNXK_TEL_DICT_INT(d, ctx, good_utag, w5_);
+   CNXK_TEL_DICT_INT(d, ctx, ltag, w5_);
+
+   /* W6 */
+   CNXK_TEL_DICT_U64(d, ctx, octs, w6_);
+
+   /* W7 */
+   CNXK_TEL_DICT_U64(d, ctx, pkts, w7_);
+
+   /* W8 */
+   CNXK_TEL_DICT_U64(d, ctx, drop_octs, w8_);
+
+   /* W9 */
+   CNXK_TEL_DICT_U64(d, ctx, drop_pkts, w9_);
+
+   /* W10 */
+   CNXK_TEL_DICT_U64(d, ctx, re_pkts, w10_);
+}
+
 static int
 cnxk_tel_nix_rq_ctx(struct roc_nix *roc_nix, uint8_t n, struct plt_tel_data *d)
 {
@@ -459,12 +553,77 @@ cnxk_tel_nix_rq_ctx(struct roc_nix *roc_nix, uint8_t n, 
struct plt_tel_data *d)
 
if (roc_model_is_cn9k())
nix_rq_ct

[PATCH v2 3/3] dts: add vf_smoke tests suite

[jspewock]

From: Jeremy Spewock 

VFs should be tested against the same criteria as PFs, therefore the
smoke testing suite for VFs inherits the same test cases and testing
coverage from the PF smoke testing suite. The primary difference between
the two suites is that VF smoke initially creates virtual functions to
use for testing, and then tears them down at the end of testing and
resets the state of the PFs.

Signed-off-by: Jeremy Spewock 
---
 dts/framework/config/conf_yaml_schema.json |  3 ++-
 dts/tests/TestSuite_vf_smoke_tests.py  | 28 ++
 2 files changed, 30 insertions(+), 1 deletion(-)
 create mode 100644 dts/tests/TestSuite_vf_smoke_tests.py

diff --git a/dts/framework/config/conf_yaml_schema.json 
b/dts/framework/config/conf_yaml_schema.json
index c15f960318..847d3ea598 100644
--- a/dts/framework/config/conf_yaml_schema.json
+++ b/dts/framework/config/conf_yaml_schema.json
@@ -188,7 +188,8 @@
 "hello_world",
 "os_udp",
 "pmd_buffer_scatter",
-"pf_smoke_tests"
+"pf_smoke_tests",
+"vf_smoke_tests"
   ]
 },
 "test_target": {
diff --git a/dts/tests/TestSuite_vf_smoke_tests.py 
b/dts/tests/TestSuite_vf_smoke_tests.py
new file mode 100644
index 00..f9b6098111
--- /dev/null
+++ b/dts/tests/TestSuite_vf_smoke_tests.py
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2024 University of New Hampshire
+"""Virtual Function (VF) smoke testing suite.
+
+The same common DPDK functionality that is tested on physical functions (PFs) 
in
+:class:`.TestSuite_pf_smoke_tests.TestPfSmokeTests` should be tested on VFs. 
Therefore, this test
+suite inherits its test cases from the PF smoke testing suite. The primary 
difference in this
+testing suite is that it creates virtual functions prior to running its test 
cases and then removes
+them and resets the state of the PFs after it is finished.
+"""
+from .TestSuite_pf_smoke_tests import TestPfSmokeTests  # type: 
ignore[import-untyped]
+
+
+class TestVfSmokeTests(TestPfSmokeTests):
+"""VF smoke testing suite."""
+
+def set_up_suite(self) -> None:
+"""Extends :meth:`TestPfSmokeTests.set_up_suite` with methods to 
create Rx/Tx VFs."""
+super().set_up_suite()
+self.sut_egress_port = self.sut_node.create_virtual_functions(1, 
self._sut_port_egress)[0]
+self.sut_ingress_port = self.sut_node.create_virtual_functions(1, 
self._sut_port_ingress)[0]
+
+def tear_down_suite(self) -> None:
+"""Extends :meth:`TestPfSmokeTests.tear_down_suite` with VF cleanup 
and PF rebinding."""
+super().tear_down_suite()
+self.sut_node.remove_virtual_functions(self._sut_port_egress)
+self.sut_node.remove_virtual_functions(self._sut_port_ingress)
+self.sut_node.bind_all_ports_to_driver()
-- 
2.46.0

[PATCH v2 2/3] dts: parameterize ports used in pf_smoke suite

[jspewock]

From: Jeremy Spewock 

Currently the pf_smoke testing suite only uses the default ports for
sending and receiving packets. When looking at that suite in isolation,
this is fine since its primary goal is to test the physical functions
in the test run (which the defaults should represent). However, since
this suite represents the same coverage that should be tested on VFs, it
makes sense to parameterize the ports that are in use in the suite so
that the same test cases can be used for testing VFs.

Signed-off-by: Jeremy Spewock 
---
 dts/tests/TestSuite_pf_smoke_tests.py | 22 +++---
 1 file changed, 19 insertions(+), 3 deletions(-)

diff --git a/dts/tests/TestSuite_pf_smoke_tests.py 
b/dts/tests/TestSuite_pf_smoke_tests.py
index 287132e9dd..984a193e8b 100644
--- a/dts/tests/TestSuite_pf_smoke_tests.py
+++ b/dts/tests/TestSuite_pf_smoke_tests.py
@@ -18,6 +18,7 @@
 from framework.params.testpmd import SimpleForwardingModes
 from framework.remote_session.testpmd_shell import TestPmdShell
 from framework.test_suite import TestSuite
+from framework.testbed_model.port import Port
 
 
 class TestPfSmokeTests(TestSuite):
@@ -35,6 +36,8 @@ class TestPfSmokeTests(TestSuite):
 is_blocking: ClassVar[bool] = True
 jumbo_frame_len: ClassVar[int] = 9000
 num_queues: int = 4
+sut_egress_port: Port | None = None
+sut_ingress_port: Port | None = None
 
 def set_up_suite(self) -> None:
 """Increase the MTU of the traffic generator to support jumboframes."""
@@ -48,12 +51,17 @@ def test_jumbo_frame_support(self) -> None:
 max_pkt_len=self.jumbo_frame_len,
 mbuf_size=[self.jumbo_frame_len + 128],
 forward_mode=SimpleForwardingModes.mac,
+ports=[self.sut_egress_port, self.sut_ingress_port]
+if self.sut_egress_port is not None and self.sut_ingress_port is 
not None
+else None,
 ) as testpmd:
 testpmd.start()
 # Take 26 bytes off the MTU size to account for Ethernet headers
 payload_len = self.jumbo_frame_len - 26
 packet = Ether() / Raw("X" * payload_len)
-recv = self.send_packet_and_capture(packet)
+recv = self.send_packet_and_capture(
+packet, sut_ingress=self.sut_ingress_port, 
sut_egress=self.sut_egress_port
+)
 self.verify(
 any(hasattr(p, "load") and "X" * 20 in str(p.load) for p in 
recv),
 f"Jumboframe was not received even when MTU was set to 
{self.jumbo_frame_len}.",
@@ -73,6 +81,9 @@ def test_rss_functionality(self) -> None:
 forward_mode=SimpleForwardingModes.rxonly,
 rx_queues=self.num_queues,
 tx_queues=self.num_queues,
+ports=[self.sut_egress_port, self.sut_ingress_port]
+if self.sut_egress_port is not None and self.sut_ingress_port is 
not None
+else None,
 ) as testpmd:
 testpmd.set_verbose(1)
 src_max = "00:00:00:00:00:01"
@@ -80,7 +91,7 @@ def test_rss_functionality(self) -> None:
 Ether(src=src_max) / IP(dst=f"192.168.0.{i+1}") for i in 
range(self.num_queues * 4)
 ]
 testpmd.start()
-self.send_packets(send_pkts)
+self.send_packets(send_pkts, sut_ingress=self.sut_ingress_port)
 verbose_stats = TestPmdShell.extract_verbose_output(testpmd.stop())
 # Filter down the packets to only the ones with the correct source 
MAC
 verbose_stats = list(filter(lambda x: x.src_mac == src_max, 
verbose_stats))
@@ -105,7 +116,12 @@ def test_rss_functionality(self) -> None:
 def test_runtime_modify_num_queues(self) -> None:
 """Ensure that the number of queues on a port can be changed at 
runtime."""
 with TestPmdShell(
-self.sut_node, rx_queues=self.num_queues, tx_queues=self.num_queues
+self.sut_node,
+rx_queues=self.num_queues,
+tx_queues=self.num_queues,
+ports=[self.sut_egress_port, self.sut_ingress_port]
+if self.sut_egress_port is not None and self.sut_ingress_port is 
not None
+else None,
 ) as testpmd:
 try:
 testpmd.set_num_queues_all(2, True, verify=True)
-- 
2.46.0

[PATCH v2 1/3] dts: allow specifying ingress port in send_packets

[jspewock]

From: Jeremy Spewock 

In order to use VFs in the framework, methods for sending packets had to
be modified so that they support choosing which ports to use when
sending and receiving. This patch creates the same support for the
send_packets method so that it can be used with VFs.

Signed-off-by: Jeremy Spewock 
---
 dts/framework/test_suite.py | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/dts/framework/test_suite.py b/dts/framework/test_suite.py
index ac927d15ef..5253083896 100644
--- a/dts/framework/test_suite.py
+++ b/dts/framework/test_suite.py
@@ -251,13 +251,18 @@ def send_packets_and_capture(
 def send_packets(
 self,
 packets: list[Packet],
+sut_ingress: Port | None = None,
 ) -> None:
 """Send packets using the traffic generator and do not capture 
received traffic.
 
 Args:
 packets: Packets to send.
+sut_ingress: Optional port to use as the SUT ingress port. 
Defaults to
+`self._sut_port_ingress`.
 """
-packets = self._adjust_addresses(packets)
+if sut_ingress is None:
+sut_ingress = self._sut_port_ingress
+packets = self._adjust_addresses(packets, sut_ingress, 
self._sut_port_egress)
 self.tg_node.send_packets(packets, self._tg_port_egress)
 
 def get_expected_packet(
-- 
2.46.0

[PATCH v2 0/3] dts: port vf_smoke to new DTS

[jspewock]

From: Jeremy Spewock 

v2:
 * rebase on next-dts
 * update dependencies

Depends-on: series-33149 ("dts: pf_smoke port")
Depends-on: series-33109 ("dts: add VFs to the framework")

Jeremy Spewock (3):
  dts: allow specifying ingress port in send_packets
  dts: parameterize ports used in pf_smoke suite
  dts: add vf_smoke tests suite

 dts/framework/config/conf_yaml_schema.json |  3 ++-
 dts/framework/test_suite.py|  7 +-
 dts/tests/TestSuite_pf_smoke_tests.py  | 22 ++---
 dts/tests/TestSuite_vf_smoke_tests.py  | 28 ++
 4 files changed, 55 insertions(+), 5 deletions(-)
 create mode 100644 dts/tests/TestSuite_vf_smoke_tests.py

-- 
2.46.0

[RFC PATCH v10] mempool: fix mempool cache size

[Morten Brørup]

This patch refactors the mempool cache to fix two bugs:
1. When a mempool is created with a cache size of N objects, the cache was
actually created with a size of 1.5 * N objects.
2. The mempool cache field names did not reflect their purpose;
the "flushthresh" field held the size, and the "size" field held the
number of objects remaining in the cache when returning from a get
operation refilling it from the backend.

Especially the first item could be fatal:
When more objects than a mempool's configured cache size is held in the
mempool's caches associated with other lcores, a rightsized mempool may
unexpectedly run out of objects, causing the application to fail.

Furthermore, this patch introduces two optimizations:
1. The mempool caches are flushed to/filled from the backend in their
entirety, so backend accesses are CPU cache line aligned. (Assuming the
mempool cache size is a multiplum of a CPU cache line size divided by the
size of a pointer.)
2. The unlikely paths in the get and put functions, where the cache is
flushed to/filled from the backend, are moved from the inline functions to
separate helper functions, thereby reducing the code size of the inline
functions.
Note: Accessing the backend for cacheless mempools remains inline.

Various drivers accessing the mempool directly have been updated
accordingly.
These drivers did not update mempool statistics when accessing the mempool
directly, so that is fixed too.

Note: Performance not yet benchmarked.

Signed-off-by: Morten Brørup 
---
v10:
* Initialize mempool caches, regardless of size zero.
  This to fix compiler warning about out of bounds access.
v9:
* Removed factor 1.5 from description of cache_size parameter to
  rte_mempool_create().
* Refactored rte_mempool_do_generic_put() to eliminate some gotos.
  No functional change.
* Removed check for n >= RTE_MEMPOOL_CACHE_MAX_SIZE in
  rte_mempool_do_generic_get(); it caused the function to fail when the
  request could not be served from the backend alone, but it could be
  served from the cache and the backend.
* Refactored rte_mempool_do_generic_get_split() to make it shorter.
* When getting objects directly from the backend, use burst size aligned
  with either CPU cache line size or mempool cache size.
v8:
* Rewrote rte_mempool_do_generic_put() to get rid of transaction
  splitting. Use a method similar to the existing put method with fill
  followed by flush if overfilled.
  This also made rte_mempool_do_generic_put_split() obsolete.
* When flushing the cache as much as we can, use burst size aligned with
  either CPU cache line size or mempool cache size.
v7:
* Increased max mempool cache size from 512 to 1024 objects.
  Mainly for CI performance test purposes.
  Originally, the max mempool cache size was 768 objects, and used a fixed
  size array of 1024 objects in the mempool cache structure.
v6:
* Fix v5 incomplete implementation of passing large requests directly to
  the backend.
* Use memcpy instead of rte_memcpy where compiler complains about it.
* Added const to some function parameters.
v5:
* Moved helper functions back into the header file, for improved
  performance.
* Pass large requests directly to the backend. This also simplifies the
  code.
v4:
* Updated subject to reflect that misleading names are considered bugs.
* Rewrote patch description to provide more details about the bugs fixed.
  (Mattias Rönnblom)
* Moved helper functions, not to be inlined, to mempool C file.
  (Mattias Rönnblom)
* Pass requests for n >= RTE_MEMPOOL_CACHE_MAX_SIZE objects known at build
  time directly to backend driver, to avoid calling the helper functions.
  This also fixes the compiler warnings about out of bounds array access.
v3:
* Removed __attribute__(assume).
v2:
* Removed mempool perf test; not part of patch set.
---
 drivers/common/idpf/idpf_common_rxtx_avx512.c |  54 ++--
 drivers/mempool/dpaa/dpaa_mempool.c   |  16 +-
 drivers/mempool/dpaa2/dpaa2_hw_mempool.c  |  14 -
 drivers/net/i40e/i40e_rxtx_vec_avx512.c   |  17 +-
 drivers/net/iavf/iavf_rxtx_vec_avx512.c   |  27 +-
 drivers/net/ice/ice_rxtx_vec_avx512.c |  27 +-
 lib/mempool/mempool_trace.h   |   1 -
 lib/mempool/rte_mempool.c |  20 +-
 lib/mempool/rte_mempool.h | 270 ++
 9 files changed, 202 insertions(+), 244 deletions(-)

diff --git a/drivers/common/idpf/idpf_common_rxtx_avx512.c 
b/drivers/common/idpf/idpf_common_rxtx_avx512.c
index 3b5e124ec8..98535a48f3 100644
--- a/drivers/common/idpf/idpf_common_rxtx_avx512.c
+++ b/drivers/common/idpf/idpf_common_rxtx_avx512.c
@@ -1024,21 +1024,13 @@ idpf_tx_singleq_free_bufs_avx512(struct idpf_tx_queue 
*txq)
rte_lcore_id());
void **cache_objs;
 
-   if (cache == NULL || cache->len == 0)
-   goto normal;
-
-   cache_objs = &cache->objs[cache->len];
-
-   

[PATCH v4 1/2] bbdev: add new function to dump debug information

[Nicolas Chautru]

This provides a new API to dump more debug information
related to the status on a given bbdev queue.
Some of this information is visible at bbdev level.
This also provides a new option dev op, to print more
information at the lower PMD level.
This helps user to troubleshoot issues related to
previous operations provided into a queue causing
possible hard-to-debug negative scenarios.

Signed-off-by: Nicolas Chautru 
Acked-by: Hemant Agrawal 
---
 lib/bbdev/rte_bbdev.c | 213 ++
 lib/bbdev/rte_bbdev.h |  47 +
 lib/bbdev/rte_bbdev_pmd.h |   9 ++
 lib/bbdev/version.map |   4 +
 4 files changed, 273 insertions(+)

diff --git a/lib/bbdev/rte_bbdev.c b/lib/bbdev/rte_bbdev.c
index 13bde3c25b..bd32da79b0 100644
--- a/lib/bbdev/rte_bbdev.c
+++ b/lib/bbdev/rte_bbdev.c
@@ -1190,3 +1190,216 @@ rte_bbdev_enqueue_status_str(enum 
rte_bbdev_enqueue_status status)
rte_bbdev_log(ERR, "Invalid enqueue status");
return NULL;
 }
+
+
+int
+rte_bbdev_queue_ops_dump(uint16_t dev_id, uint16_t queue_id, FILE *f)
+{
+   struct rte_bbdev_queue_data *q_data;
+   struct rte_bbdev_stats *stats;
+   uint16_t i;
+   struct rte_bbdev *dev = get_dev(dev_id);
+
+   VALID_DEV_OR_RET_ERR(dev, dev_id);
+   VALID_QUEUE_OR_RET_ERR(queue_id, dev);
+   VALID_DEV_OPS_OR_RET_ERR(dev, dev_id);
+   VALID_FUNC_OR_RET_ERR(dev->dev_ops->queue_ops_dump, dev_id);
+
+   q_data = &dev->data->queues[queue_id];
+
+   if (f == NULL)
+   return -EINVAL;
+
+   fprintf(f, "Dump of operations on %s queue %d\n",
+   dev->data->name, queue_id);
+   fprintf(f, "  Last Enqueue Status %s\n",
+   rte_bbdev_enqueue_status_str(q_data->enqueue_status));
+   for (i = 0; i < RTE_BBDEV_ENQ_STATUS_SIZE_MAX; i++)
+   if (q_data->queue_stats.enqueue_status_count[i] > 0)
+   fprintf(f, "  Enqueue Status Counters %s %" PRIu64 "\n",
+   rte_bbdev_enqueue_status_str(i),
+   
q_data->queue_stats.enqueue_status_count[i]);
+   stats = &dev->data->queues[queue_id].queue_stats;
+
+   fprintf(f, "  Enqueue Count %" PRIu64 " Warning %" PRIu64 " Error %" 
PRIu64 "\n",
+   stats->enqueued_count, stats->enqueue_warn_count,
+   stats->enqueue_err_count);
+   fprintf(f, "  Dequeue Count %" PRIu64 " Warning %" PRIu64 " Error %" 
PRIu64 "\n",
+   stats->dequeued_count, stats->dequeue_warn_count,
+   stats->dequeue_err_count);
+
+   return dev->dev_ops->queue_ops_dump(dev, queue_id, f);
+}
+
+char *
+rte_bbdev_ops_param_string(void *op, enum rte_bbdev_op_type op_type, char 
*str, uint32_t len)
+{
+   static char partial[1024];
+   struct rte_bbdev_dec_op *op_dec;
+   struct rte_bbdev_enc_op *op_enc;
+   struct rte_bbdev_fft_op *op_fft;
+   struct rte_bbdev_mldts_op *op_mldts;
+
+   rte_iova_t add0 = 0, add1 = 0, add2 = 0, add3 = 0, add4 = 0;
+
+   if (op == NULL) {
+   snprintf(str, len, "Invalid Operation pointer\n");
+   return str;
+   }
+
+   if (op_type == RTE_BBDEV_OP_LDPC_DEC) {
+   op_dec = op;
+   if (op_dec->ldpc_dec.code_block_mode == 
RTE_BBDEV_TRANSPORT_BLOCK)
+   snprintf(partial, sizeof(partial), "C %d Cab %d Ea %d 
Eb %d r %d",
+   op_dec->ldpc_dec.tb_params.c,
+   op_dec->ldpc_dec.tb_params.cab,
+   op_dec->ldpc_dec.tb_params.ea,
+   op_dec->ldpc_dec.tb_params.eb,
+   op_dec->ldpc_dec.tb_params.r);
+   else
+   snprintf(partial, sizeof(partial), "E %d", 
op_dec->ldpc_dec.cb_params.e);
+   if (op_dec->ldpc_dec.input.data != NULL)
+   add0 = 
rte_pktmbuf_iova_offset(op_dec->ldpc_dec.input.data, 0);
+   if (op_dec->ldpc_dec.hard_output.data != NULL)
+   add1 = 
rte_pktmbuf_iova_offset(op_dec->ldpc_dec.hard_output.data, 0);
+   if (op_dec->ldpc_dec.soft_output.data != NULL)
+   add2 = 
rte_pktmbuf_iova_offset(op_dec->ldpc_dec.soft_output.data, 0);
+   if (op_dec->ldpc_dec.harq_combined_input.data != NULL)
+   add3 = 
rte_pktmbuf_iova_offset(op_dec->ldpc_dec.harq_combined_input.data,
+   0);
+   if (op_dec->ldpc_dec.harq_combined_output.data != NULL)
+   add4 = 
rte_pktmbuf_iova_offset(op_dec->ldpc_dec.harq_combined_output.data,
+   0);
+   snprintf(str, len, "op %x st %x BG %d Zc %d Ncb %d qm %d F %d 
Rv %d It %d It %d "
+   "HARQin %d in %" PRIx64 "

Re: [PATCH v9 8/8] net/hns3: support filter registers by module names

[fengchengwen]

Acked-by: Chengwen Feng 

On 2024/9/26 20:42, Jie Hai wrote:
> This patch support dumping registers which module name is the
> `filter` string. The module names are in lower case and so is
> the `filter`. Available module names are cmdq, common_pf,
> common_vf, ring, tqp_intr, 32_bit_dfx, 64_bit_dfx, bios, igu_egu,
> ssu, ppp, rpu, ncsi, rtc, rcb, etc.
> 
> Signed-off-by: Jie Hai 

Re: [PATCH v1] ethdev: fix int overflow in descriptor count logic

[Ferruh Yigit]

On 9/26/2024 3:03 PM, Meade, Niall wrote:
>> From: Ferruh Yigit 
>> Sent: Thursday, September 26, 2024 12:16 AM
>> To: Meade, Niall ; Thomas Monjalon 
>> ; Andrew Rybchenko ; 
>> Roman Zhukov 
>> Cc: dev@dpdk.org 
>> Subject: Re: [PATCH v1] ethdev: fix int overflow in descriptor count logic
> 
>>> The resolution involves upcasting nb_desc to a uint32_t before the
>>> RTE_ALIGN_CEIL macro is applied. This change ensures that the subsequent
>>> call to RTE_ALIGN_FLOOR(nb_desc + (nb_align - 1), nb_align) does not
>>> result in an overflow, as it would when nb_desc is a uint16_t. By using
>>> a uint32_t for these operations, the correct behavior is maintained
>>> without the risk of overflow.
>>>
>>
>> Hi Niall,
> 
> Hi Ferruh,
> 
>> Thanks for the patch.
>>
>> For the 'RTE_ALIGN_CEIL(val, align)' macro, 'align' should be power of
>> two, as 'desc_lim->nb_align' is uint16_t, max value it can get is 2^15.
>> 'val' should be smaller than or equal to 'align', so '*nb_desc' can be
>> maximum 2^15.
>>
>> So RTE_ALIGN_CEIL(2^15-1, 2^15) = 2^15, I think this should work fine
>> (although I didn't test).
>>
>> And even with your uint32_t cast, I think following will fail:
>> RTE_ALIGN_CEIL(2^16-1, 2^15)
>> (again, not tested).
>>
> 
> I tested my code with these values and the behaviour is as expected from
> what I can see.
> At a high level I ran into this issue when passing uint16_tMAX into
> rte_eth_dev_adjust_nb_rx_tx_desc() with the intent of selecting the maximum
> ring descriptor size but the minimum was selected.
> 
>> Or maybe I am missing a case, can you please give some actual numbers to
>> show the problem and the fix?
> 
> Yes sure! If we take an example of val= (2^16)-1 and align= 32.
> RTE_ALIGN_CEIL(val, align) calls RTE_ALIGN_FLOOR(val + align - 1, align). With
> val as a uint16_t this subsequent macro call results in a wrap around for val
> (originally was the max uint16_t and now we are attempting to add align to
> it). The returned value of RTE_ALIGN_CEIL() in this case is 0. This results in
> nb_desc being set to 0, and later set to the minimum ring descriptor size for
> that NIC with *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min).
> 
> While this example is an unreasonably large request for a descriptor ring 
> size,
> the expected behaviour would be that the descriptor ring size defaults back to
> the maximum possible for that particular NIC, not to the minimum which it
> currently does.
> By introducing a uint32_t, the wrap around in RTE_ALIGN_FLOOR() is avoided,
> keeping the large value of nb_desc_32 which is later set to an appropriate 
> size
> in RTE_MIN(*nb_desc_32, desc_lim->nb_max)
> 

I see the problem now, thanks.

When value > (2^16 - align), next aligned value is 2^16, which is
UINT16_MAX + 1, hence wraps to 0, this is kind of expected.

For the relevant code, assuming 'desc_lim->nb_max' & 'desc_lim->nb_min'
are already aligned to 'desc_lim->nb_align', following should fix the
issue, that seems simpler to me, what do you think:

```
if (desc_lim->nb_max != 0)
*nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);

nb_desc_32 = RTE_MAX(nb_desc_32, desc_lim->nb_min);

if (desc_lim->nb_align != 0)
*nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
```

Basically just changing the order of the operations...

It is not easy to see the problem, can you please give sample values in
the commit log (for '*nb_desc', 'nb_align', 'nb_max' & 'nb_min'), that
makes much easier to see why above works.

Re: [PATCH v4] doc: add new driver guidelines

[Ferruh Yigit]

On 9/16/2024 5:28 PM, Stephen Hemminger wrote:
> From: Nandini Persad 
> 
> This document was created to assist contributors in creating DPDK drivers
> and provides suggestions and guidelines on how to upstream effectively.
> 
> Co-authored-by: Ferruh Yigit 
> Co-authored-by: Thomas Monjalon 
> Signed-off-by: Nandini Persad 
> Reviewed-by: Stephen Hemminger 
> Acked-by: Chengwen Feng 
>

Thanks for the update, build warnings and format issues seems fixed.

<...>


> ---
>  doc/guides/contributing/index.rst  |   1 +
>  doc/guides/contributing/new_driver.rst | 207 +
>  2 files changed, 208 insertions(+)
>  create mode 100644 doc/guides/contributing/new_driver.rst
> 
> diff --git a/doc/guides/contributing/index.rst 
> b/doc/guides/contributing/index.rst
> index dcb9b1fbf0..7fc6511361 100644
> --- a/doc/guides/contributing/index.rst
> +++ b/doc/guides/contributing/index.rst
> @@ -15,6 +15,7 @@ Contributor's Guidelines
>  documentation
>  unit_test
>  new_library
> +new_driver
>  patches
>  vulnerability
>  stable
> diff --git a/doc/guides/contributing/new_driver.rst 
> b/doc/guides/contributing/new_driver.rst
> new file mode 100644
> index 00..f95d3b90bc
> --- /dev/null
> +++ b/doc/guides/contributing/new_driver.rst
> @@ -0,0 +1,207 @@
> +.. SPDX-License-Identifier: BSD-3-Clause
> +   Copyright 2024 The DPDK contributors
> +
> +
> +Upstreaming New DPDK Drivers Guide
> +==
> +
>

The title of this guide is:
"Upstreaming New DPDK Drivers Guide"

Title of the document for adding new libraries:
"Adding a new library"

In the index they are next to each other, and different wording looks
inconsistent.
We can simply call this document "Adding a new driver",
or update library one title, but I think better to align them somehow.

<...>

> +Avoid doing the following:
> +
> +* Using PMD specific macros when DPDK macros exist
> +* Including unused headers (process-iwyu.py)
> +* Disabling compiler warnings for driver
> +* #ifdef with driver-defined macros
> +* DPDK version checks (via RTE_VERSION_NUM) in the upstream code
> +* Introducing Public APIs directly from the driver
> +* Adding driver private APIs. If a new feature is needed, it is
> +  better to extend the corresponding framework API
> +
>

Last two items are for the same issue, we sometime call public APIs from
drivers as "driver private APIs".
First one looks simpler, perhaps we can keep that one, but I don't have
strong opinion, as long as we remove the duplication.

<...>

> +
> +Be sure to run the following test tools per patch in a patch series:
>

The list is missing in the patch, it was:

 * checkpatches.sh
 * check-git-log.sh
 * check-meson.py
 * check-doc-vs-code.sh
 * check-spdx-tag.sh
 * Build documentation and validate how output looks

[PATCH v4 2/2] baseband/acc: improvement to logging mechanism

[Nicolas Chautru]

Support the new dev op to dump operations information
related to a given queue tracked internally in PMD.

Signed-off-by: Nicolas Chautru 
Acked-by: Hemant Agrawal 
---
 drivers/baseband/acc/rte_vrb_pmd.c | 59 +-
 1 file changed, 58 insertions(+), 1 deletion(-)

diff --git a/drivers/baseband/acc/rte_vrb_pmd.c 
b/drivers/baseband/acc/rte_vrb_pmd.c
index 585dc49bd6..52e76ec6c1 100644
--- a/drivers/baseband/acc/rte_vrb_pmd.c
+++ b/drivers/baseband/acc/rte_vrb_pmd.c
@@ -1434,6 +1434,62 @@ vrb_queue_intr_disable(struct rte_bbdev *dev, uint16_t 
queue_id)
return 0;
 }
 
+static int
+vrb_queue_ops_dump(struct rte_bbdev *dev, uint16_t queue_id, FILE *f)
+{
+   struct acc_queue *q = dev->data->queues[queue_id].queue_private;
+   struct rte_bbdev_dec_op *op;
+   uint16_t i, int_nb;
+   volatile union acc_info_ring_data *ring_data;
+   uint16_t info_ring_head = q->d->info_ring_head;
+   static char str[1024];
+
+   if (f == NULL) {
+   rte_bbdev_log(ERR, "Invalid File input");
+   return -EINVAL;
+   }
+
+   /** Print generic information on queue status. */
+   fprintf(f, "Dump of operations %s on Queue %d by %s\n",
+   rte_bbdev_op_type_str(q->op_type), queue_id, 
dev->device->driver->name);
+   fprintf(f, "AQ Enqueued %d Dequeued %d Depth %d - Available Enq %d 
Deq %d\n",
+   q->aq_enqueued, q->aq_dequeued, q->aq_depth,
+   acc_ring_avail_enq(q), acc_ring_avail_deq(q));
+
+   /** Print information captured in the info ring. */
+   if (q->d->info_ring != NULL) {
+   fprintf(f, "Info Ring Buffer - Head %d\n", 
q->d->info_ring_head);
+   ring_data = q->d->info_ring + (q->d->info_ring_head & 
ACC_INFO_RING_MASK);
+   while (ring_data->valid) {
+   int_nb = int_from_ring(*ring_data, 
q->d->device_variant);
+   if ((int_nb < ACC_PF_INT_DMA_DL_DESC_IRQ) || (
+   int_nb > ACC_PF_INT_DMA_MLD_DESC_IRQ)) {
+   fprintf(f, "  InfoRing: ITR:%d Info:0x%x",
+   int_nb, 
ring_data->detailed_info);
+   /* Initialize Info Ring entry and move forward. 
*/
+   ring_data->valid = 0;
+   }
+   info_ring_head++;
+   ring_data = q->d->info_ring + (info_ring_head & 
ACC_INFO_RING_MASK);
+   }
+   }
+
+   fprintf(f, "Ring Content - Head %d Tail %d Depth %d\n",
+   q->sw_ring_head, q->sw_ring_tail, q->sw_ring_depth);
+   /** Print information about each operation in the software ring. */
+   for (i = 0; i < q->sw_ring_depth; ++i) {
+   op = (q->ring_addr + i)->req.op_addr;
+   if (op != NULL)
+   fprintf(f, "  %d\tn %d %s", i, (q->ring_addr + 
i)->req.numCBs,
+   rte_bbdev_ops_param_string(op, 
q->op_type,
+   str, sizeof(str)));
+   }
+
+   fprintf(f, "== End of File ==\n");
+
+   return 0;
+}
+
 static const struct rte_bbdev_ops vrb_bbdev_ops = {
.setup_queues = vrb_setup_queues,
.intr_enable = vrb_intr_enable,
@@ -1443,7 +1499,8 @@ static const struct rte_bbdev_ops vrb_bbdev_ops = {
.queue_release = vrb_queue_release,
.queue_stop = vrb_queue_stop,
.queue_intr_enable = vrb_queue_intr_enable,
-   .queue_intr_disable = vrb_queue_intr_disable
+   .queue_intr_disable = vrb_queue_intr_disable,
+   .queue_ops_dump = vrb_queue_ops_dump
 };
 
 /* PCI PF address map. */
-- 
2.34.1

[PATCH v4 0/2] bbdev: dump debug information

[Nicolas Chautru]

v4: updated to remove device error logging part which may use
different mechanism in the future, possibly rte trace point.

v3: updated based on Maxime comments related to passing string
through function prototype. Thanks

v2: updated with comments from Hemant and rebased.

v1: Hi Maxime. 

Adding new support to support troubleshooting. This provides
to the application an API to dump into file information
to help troubleshoot issue on a queue. Some of it is tracked
at bbdev level and some extra information can be tracked
as an option at PMD level. This is for 24.11. 
In practive logging is not enabled at run time, but information
can be dump into file when an issue happens and requires extra
information. This collates now multiple source of errors detected
notably at driver level made more explicit.

Thanks,
Nic

Nicolas Chautru (2):
  bbdev: add new function to dump debug information
  baseband/acc: improvement to logging mechanism

 drivers/baseband/acc/rte_vrb_pmd.c |  59 +++-
 lib/bbdev/rte_bbdev.c  | 213 +
 lib/bbdev/rte_bbdev.h  |  47 +++
 lib/bbdev/rte_bbdev_pmd.h  |   9 ++
 lib/bbdev/version.map  |   4 +
 5 files changed, 331 insertions(+), 1 deletion(-)

-- 
2.34.1

[PATCH v6 2/2] net/bnxt: code refactor for supporting speed lanes

[Damodharam Ammepalli]

Broadcom Thor2 NICs support link mode settings where user
can configure fixed speed and associated supported number of
lanes. This patch does code-refactoring to address proposed
poll mode library design updates.

Signed-off-by: Damodharam Ammepalli 
---
 drivers/net/bnxt/bnxt.h|   3 +
 drivers/net/bnxt/bnxt_ethdev.c | 176 ++---
 drivers/net/bnxt/bnxt_hwrm.c   |  40 ++--
 3 files changed, 200 insertions(+), 19 deletions(-)

diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h
index aaa7ea00cc..667fc84eb2 100644
--- a/drivers/net/bnxt/bnxt.h
+++ b/drivers/net/bnxt/bnxt.h
@@ -328,6 +328,7 @@ struct bnxt_link_info {
uint16_tcfg_auto_link_speeds2_mask;
uint8_t active_lanes;
uint8_t option_flags;
+   uint16_tpmd_speed_lanes;
 };
 
 #define BNXT_COS_QUEUE_COUNT   8
@@ -1219,6 +1220,7 @@ extern int bnxt_logtype_driver;
 #define BNXT_LINK_SPEEDS_V2_VF(bp) (BNXT_VF((bp)) && 
((bp)->link_info->option_flags))
 #define BNXT_LINK_SPEEDS_V2(bp) (((bp)->link_info) && 
(((bp)->link_info->support_speeds_v2) || \
   
BNXT_LINK_SPEEDS_V2_VF((bp
+#define BNXT_MAX_SPEED_LANES 8
 extern const struct rte_flow_ops bnxt_ulp_rte_flow_ops;
 int32_t bnxt_ulp_port_init(struct bnxt *bp);
 void bnxt_ulp_port_deinit(struct bnxt *bp);
@@ -1244,4 +1246,5 @@ int bnxt_flow_meter_ops_get(struct rte_eth_dev *eth_dev, 
void *arg);
 struct bnxt_vnic_info *bnxt_get_default_vnic(struct bnxt *bp);
 struct tf *bnxt_get_tfp_session(struct bnxt *bp, enum bnxt_session_type type);
 uint64_t bnxt_eth_rss_support(struct bnxt *bp);
+uint16_t bnxt_parse_eth_link_speed_v2(struct bnxt *bp);
 #endif
diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c
index e63febe782..c6ad764813 100644
--- a/drivers/net/bnxt/bnxt_ethdev.c
+++ b/drivers/net/bnxt/bnxt_ethdev.c
@@ -122,6 +122,24 @@ static const char *const bnxt_dev_args[] = {
NULL
 };
 
+#define BNXT_SPEEDS_SUPP_SPEED_LANES (RTE_ETH_LINK_SPEED_10G | \
+ RTE_ETH_LINK_SPEED_25G | \
+ RTE_ETH_LINK_SPEED_40G | \
+ RTE_ETH_LINK_SPEED_50G | \
+ RTE_ETH_LINK_SPEED_100G | \
+ RTE_ETH_LINK_SPEED_200G | \
+ RTE_ETH_LINK_SPEED_400G)
+
+static const struct rte_eth_speed_lanes_capa speed_lanes_capa_tbl[] = {
+   { RTE_ETH_SPEED_NUM_10G, RTE_BIT32(1) },
+   { RTE_ETH_SPEED_NUM_25G, RTE_BIT32(1) },
+   { RTE_ETH_SPEED_NUM_40G, RTE_BIT32(4) },
+   { RTE_ETH_SPEED_NUM_50G, RTE_BIT32(1) | RTE_BIT32(2) },
+   { RTE_ETH_SPEED_NUM_100G, RTE_BIT32(1) | RTE_BIT32(2) | RTE_BIT32(4) },
+   { RTE_ETH_SPEED_NUM_200G, RTE_BIT32(2) | RTE_BIT32(4) },
+   { RTE_ETH_SPEED_NUM_400G, RTE_BIT32(4) | RTE_BIT32(8) },
+};
+
 /*
  * cqe-mode = an non-negative 8-bit number
  */
@@ -696,22 +714,50 @@ static inline bool bnxt_force_link_config(struct bnxt *bp)
}
 }
 
-static int bnxt_update_phy_setting(struct bnxt *bp)
+static int bnxt_validate_speed_lanes_change(struct bnxt *bp)
 {
struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
struct rte_eth_link *link = &bp->eth_dev->data->dev_link;
-   struct rte_eth_link new;
uint32_t curr_speed_bit;
int rc;
 
+   /* Check if speed x lanes combo is supported */
+   if (dev_conf->link_speeds)  {
+   rc = bnxt_parse_eth_link_speed_v2(bp);
+   if (rc == 0)
+   return -EINVAL;
+   }
+
+   /* convert to speedbit flag */
+   curr_speed_bit = rte_eth_speed_bitflag((uint32_t)link->link_speed, 1);
+
+   /* check if speed and lanes have changed */
+   if (dev_conf->link_speeds != curr_speed_bit ||
+   bp->link_info->active_lanes != bp->link_info->pmd_speed_lanes)
+   return 1;
+
+   return 0;
+}
+
+static int bnxt_update_phy_setting(struct bnxt *bp)
+{
+   struct rte_eth_link new;
+   int rc, rc1 = 0;
+
rc = bnxt_get_hwrm_link_config(bp, &new);
if (rc) {
PMD_DRV_LOG(ERR, "Failed to get link settings\n");
return rc;
}
 
-   /* convert to speedbit flag */
-   curr_speed_bit = rte_eth_speed_bitflag((uint32_t)link->link_speed, 1);
+   /* Validate speeds2 requirements */
+   if (BNXT_LINK_SPEEDS_V2(bp)) {
+   rc1 = bnxt_validate_speed_lanes_change(bp);
+   if (rc1 == -EINVAL) {
+   PMD_DRV_LOG(ERR, "Failed to set correct lanes\n");
+   return rc1;
+   }
+   }
 
/*
 * Device is not obliged link down in certain scenarios, even
@@ -719,8 +765,7 @@ static int bnxt_update_phy_setting(struct bnxt *bp)
 * to shutdown the port, bnxt_get_hwrm

[PATCH v6 1/2] ethdev: Add link_speed lanes support

[Damodharam Ammepalli]

Update the eth_dev_ops structure with new function vectors
to get, get capabilities and set ethernet link speed lanes.
Update the testpmd to provide required config and information
display infrastructure.

The supporting ethernet controller driver will register callbacks
to avail link speed lanes config and get services. This lanes
configuration is applicable only when the nic is forced to fixed
speeds. In Autonegiation mode, the hardware automatically
negotiates the number of lanes.

These are the new commands.

testpmd> show port 0 speed_lanes capabilities

 Supported speeds Valid lanes
---
 10 Gbps  1
 25 Gbps  1
 40 Gbps  4
 50 Gbps  1 2
 100 Gbps 1 2 4
 200 Gbps 2 4
 400 Gbps 4 8
testpmd>

testpmd>
testpmd> port stop 0
testpmd> port config 0 speed_lanes 4
testpmd> port config 0 speed 20 duplex full
testpmd> port start 0
testpmd>
testpmd> show port info 0

* Infos for port 0  *
MAC address: 14:23:F2:C3:BA:D2
Device name: :b1:00.0
Driver name: net_bnxt
Firmware-version: 228.9.115.0
Connect to socket: 2
memory allocation on the socket: 2
Link status: up
Link speed: 200 Gbps
Active Lanes: 4
Link duplex: full-duplex
Autoneg status: Off

Signed-off-by: Damodharam Ammepalli 
---
 app/test-pmd/cmdline.c | 248 -
 app/test-pmd/config.c  |   4 +
 lib/ethdev/ethdev_driver.h |  91 ++
 lib/ethdev/rte_ethdev.c|  52 
 lib/ethdev/rte_ethdev.h|  83 +
 lib/ethdev/version.map |   5 +
 6 files changed, 482 insertions(+), 1 deletion(-)

diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index b7759e38a8..d616f37039 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -284,6 +284,9 @@ static void cmd_help_long_parsed(void *parsed_result,
 
"dump_log_types\n"
"Dumps the log level for all the dpdk modules\n\n"
+
+   "show port (port_id) speed_lanes capabilities"
+   "   Show speed lanes capabilities of a port.\n\n"
);
}
 
@@ -823,6 +826,9 @@ static void cmd_help_long_parsed(void *parsed_result,
"port config (port_id) txq (queue_id) affinity 
(value)\n"
"Map a Tx queue with an aggregated port "
"of the DPDK port\n\n"
+
+   "port config (port_id|all) speed_lanes (value)\n"
+   "Set number of lanes for all ports or port_id for a 
forced speed\n\n"
);
}
 
@@ -1560,6 +1566,244 @@ static cmdline_parse_inst_t cmd_config_speed_specific = 
{
},
 };
 
+static int
+parse_speed_lanes_cfg(portid_t pid, uint32_t lanes)
+{
+   int ret;
+
+   ret = rte_eth_speed_lanes_set(pid, lanes);
+   if (ret == -ENOTSUP) {
+   fprintf(stderr, "Function not implemented\n");
+   return -1;
+   } else if (ret < 0) {
+   fprintf(stderr, "Set speed lanes failed\n");
+   return -1;
+   }
+
+   return 0;
+}
+
+static void
+show_speed_lanes_capability(unsigned int num, struct rte_eth_speed_lanes_capa 
*speed_lanes_capa)
+{
+   unsigned int i;
+   uint32_t capa;
+
+   printf("\n%-15s %-10s", "Supported-speeds", "Valid-lanes");
+   printf("\n---\n");
+   for (i = 0; i < num; i++) {
+   printf("%-17s ",
+  rte_eth_link_speed_to_str(speed_lanes_capa[i].speed));
+   capa = speed_lanes_capa[i].capa;
+   int s = 0;
+
+   while (capa) {
+   if (capa & 0x1)
+   printf("%-2d ", s);
+   s++;
+   capa = capa >> 1;
+   }
+   printf("\n");
+   }
+}
+
+/* *** display speed lanes per port capabilities *** */
+struct cmd_show_speed_lanes_result {
+   cmdline_fixed_string_t cmd_show;
+   cmdline_fixed_string_t cmd_port;
+   cmdline_fixed_string_t cmd_keyword;
+   portid_t cmd_pid;
+};
+
+static void
+cmd_show_speed_lanes_parsed(void *parsed_result,
+   __rte_unused struct cmdline *cl,
+   __rte_unused void *data)
+{
+   struct cmd_show_speed_lanes_result *res = parsed_result;
+   struct rte_eth_speed_lanes_capa *speed_lanes_capa;
+   unsigned int num;
+   int ret;
+
+   if (!rte_eth_dev_is_valid_port(res->cmd_pid)) {
+   fprintf(stderr, "Invalid port id %u\n", res->cmd_pid);
+   return;
+   }
+
+   ret = rte_eth_speed_lanes_get_capability(res->cmd_pid, NULL, 0);
+   if (ret == -ENOTSUP) {
+   fprintf(stderr, "Function not implemented\n");
+   return;
+   } e

[PATCH v6 0/2] Add link_speed lanes support

[Damodharam Ammepalli]

This patch series is a continuation of the patch set that supports configuring 
speed lanes.
https://patchwork.dpdk.org/project/dpdk/patch/20240708232351.491529-1-damodharam.ammepa...@broadcom.com/

The patchset consists
1) rtelib/testpmd changes (Addressing the comments). Earlier comments are 
available here, 
https://patchwork.dpdk.org/project/dpdk/list/?q=Add%20link_speed%20lanes%20support&archive=both&series=&submitter=&delegate=&state=*

2) Driver implementation of bnxt PMD.

v2->v3 Consolidating the testpmd and rtelib patches into a single patch as 
requested.
v3->v4 Addressed comments and fix help string and documentation.
v4->v5 Addressed comments given in v4 and also driver implementation of bnxt 
PMD.
v5->v6 Removed LANE_xx enums and updated driver source files. Minor help
string fix.

Damodharam Ammepalli (2):
  ethdev: Add link_speed lanes support
  net/bnxt: code refactor for supporting speed lanes

 app/test-pmd/cmdline.c | 248 -
 app/test-pmd/config.c  |   4 +
 drivers/net/bnxt/bnxt.h|   3 +
 drivers/net/bnxt/bnxt_ethdev.c | 176 +--
 drivers/net/bnxt/bnxt_hwrm.c   |  40 +-
 lib/ethdev/ethdev_driver.h |  91 
 lib/ethdev/rte_ethdev.c|  52 +++
 lib/ethdev/rte_ethdev.h|  83 +++
 lib/ethdev/version.map |   5 +
 9 files changed, 682 insertions(+), 20 deletions(-)

-- 
2.43.5


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Re: [PATCH v2 0/7] ethdev: jump to table support

[Ferruh Yigit]

On 9/25/2024 7:05 PM, Alexander Kozyrev wrote:
> Introduce new Flow API JUMP_TO_TABLE_INDEX action.
> It allows bypassing a hierarchy of groups and going directly
> to a specified flow table. That gives a user the flexibility
> to jump between different priorities in a group and eliminates
> the need to do a table lookup in the group hierarchy.
> The JUMP_TO_TABLE_INDEX action forwards a packet to the
> specified rule index inside the index-based flow table.
> 
> The current index-based flow table doesn't do any matching
> on the packet and executes the actions immediately.
> Add a new index-based flow table with pattern matching.
> The JUMP_TO_TABLE_INDEX can redirect a packet to another
> matching criteria at the specified index in this case.
> 
> RFC: https://patchwork.dpdk.org/project/dpdk/patch/20240822202753.3856703-1-
> akozy...@nvidia.com/
> v2: added trace point to flow insertion by index functions.
> 
> Alexander Kozyrev (7):
>   ethdev: add insertion by index with pattern
>   app/testpmd: add index with pattern insertion type
>   ethdev: add flow rule insertion by index with pattern
>   app/testpmd: add insertion by index with pattern option
>   ethdev: add jump to table index action
>   app/testpmd: add jump to table index action
>   ethdev: add trace points to flow insertion by index
>

Series applied to dpdk-next-net/main, thanks.

[PATCH v3] net/nfp: implement the device packet type set interface

[Chaoyong He]

From: Long Wu 

Using the Rx packet offload flag rather than the device
capability to control the packet type offload configuration.
Also implement the device packet type set interface to
let application can set the Rx packet offload flag.

Signed-off-by: Long Wu 
Reviewed-by: Chaoyong He 

---
V3:
* Also add entry in the 'nfp.ini' file.
V2:
* Following the advice from reviewer, abandon the modification of RTE
  layer.
---
 doc/guides/nics/features/nfp.ini |  1 +
 drivers/net/nfp/nfp_ethdev.c |  1 +
 drivers/net/nfp/nfp_net_common.c | 42 +++-
 drivers/net/nfp/nfp_net_common.h |  1 +
 4 files changed, 44 insertions(+), 1 deletion(-)

diff --git a/doc/guides/nics/features/nfp.ini b/doc/guides/nics/features/nfp.ini
index 5b507cfe94..c3c282b288 100644
--- a/doc/guides/nics/features/nfp.ini
+++ b/doc/guides/nics/features/nfp.ini
@@ -22,6 +22,7 @@ QinQ offload = Y
 FEC  = Y
 L3 checksum offload  = Y
 L4 checksum offload  = Y
+Packet type parsing  = Y
 Basic stats  = Y
 Stats per queue  = Y
 Linux= Y
diff --git a/drivers/net/nfp/nfp_ethdev.c b/drivers/net/nfp/nfp_ethdev.c
index bd35df2dc9..09c15eedac 100644
--- a/drivers/net/nfp/nfp_ethdev.c
+++ b/drivers/net/nfp/nfp_ethdev.c
@@ -932,6 +932,7 @@ static const struct eth_dev_ops nfp_net_eth_dev_ops = {
.xstats_get_names_by_id = nfp_net_xstats_get_names_by_id,
.dev_infos_get  = nfp_net_infos_get,
.dev_supported_ptypes_get = nfp_net_supported_ptypes_get,
+   .dev_ptypes_set = nfp_net_ptypes_set,
.mtu_set= nfp_net_dev_mtu_set,
.mac_addr_set   = nfp_net_set_mac_addr,
.vlan_offload_set   = nfp_net_vlan_offload_set,
diff --git a/drivers/net/nfp/nfp_net_common.c b/drivers/net/nfp/nfp_net_common.c
index 3d916cd147..0b71d55366 100644
--- a/drivers/net/nfp/nfp_net_common.c
+++ b/drivers/net/nfp/nfp_net_common.c
@@ -1459,13 +1459,53 @@ nfp_net_supported_ptypes_get(struct rte_eth_dev *dev, 
size_t *no_of_elements)
return NULL;
 
net_hw = dev->data->dev_private;
-   if ((net_hw->super.ctrl_ext & NFP_NET_CFG_CTRL_PKT_TYPE) == 0)
+   if ((net_hw->super.cap_ext & NFP_NET_CFG_CTRL_PKT_TYPE) == 0)
return NULL;
 
*no_of_elements = RTE_DIM(ptypes);
return ptypes;
 }
 
+int
+nfp_net_ptypes_set(struct rte_eth_dev *dev,
+   uint32_t ptype_mask)
+{
+   int ret;
+   uint32_t update;
+   uint32_t ctrl_ext;
+   struct nfp_hw *hw;
+   struct nfp_net_hw *net_hw;
+
+   net_hw = dev->data->dev_private;
+   hw = &net_hw->super;
+
+   if ((hw->cap_ext & NFP_NET_CFG_CTRL_PKT_TYPE) == 0)
+   return -ENOTSUP;
+
+   ctrl_ext = hw->ctrl_ext;
+   if (ptype_mask == 0) {
+   if ((ctrl_ext & NFP_NET_CFG_CTRL_PKT_TYPE) == 0)
+   return 0;
+
+   ctrl_ext &= ~NFP_NET_CFG_CTRL_PKT_TYPE;
+   } else {
+   if ((ctrl_ext & NFP_NET_CFG_CTRL_PKT_TYPE) != 0)
+   return 0;
+
+   ctrl_ext |= NFP_NET_CFG_CTRL_PKT_TYPE;
+   }
+
+   update = NFP_NET_CFG_UPDATE_GEN;
+
+   ret = nfp_ext_reconfig(hw, ctrl_ext, update);
+   if (ret != 0)
+   return ret;
+
+   hw->ctrl_ext = ctrl_ext;
+
+   return 0;
+}
+
 int
 nfp_rx_queue_intr_enable(struct rte_eth_dev *dev,
uint16_t queue_id)
diff --git a/drivers/net/nfp/nfp_net_common.h b/drivers/net/nfp/nfp_net_common.h
index bebb754ced..3c4d305b01 100644
--- a/drivers/net/nfp/nfp_net_common.h
+++ b/drivers/net/nfp/nfp_net_common.h
@@ -315,6 +315,7 @@ int nfp_net_infos_get(struct rte_eth_dev *dev,
struct rte_eth_dev_info *dev_info);
 const uint32_t *nfp_net_supported_ptypes_get(struct rte_eth_dev *dev,
 size_t *no_of_elements);
+int nfp_net_ptypes_set(struct rte_eth_dev *dev, uint32_t ptype_mask);
 int nfp_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 int nfp_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 void nfp_net_params_setup(struct nfp_net_hw *hw);
-- 
2.39.1

RE: [EXTERNAL] Re: [PATCH v2 1/3] eventdev: introduce event pre-scheduling

[Pathak, Pravin]

> -Original Message-
> From: Pavan Nikhilesh Bhagavatula 
> Sent: Thursday, September 26, 2024 6:03 AM
> To: Pathak, Pravin ; Mattias Rönnblom
> ; Jerin Jacob ; Shijith Thotton
> ; Sevincer, Abdullah ;
> hemant.agra...@nxp.com; sachin.sax...@oss.nxp.com; Van Haaren, Harry
> ; mattias.ronnb...@ericsson.com;
> lian...@liangbit.com; Mccarthy, Peter 
> Cc: dev@dpdk.org
> Subject: RE: [EXTERNAL] Re: [PATCH v2 1/3] eventdev: introduce event pre-
> scheduling
> 
> > > -Original Message-
> > > From: Pavan Nikhilesh Bhagavatula 
> > > Sent: Wednesday, September 25, 2024 6:30 AM
> > > To: Mattias Rönnblom ; Pathak, Pravin
> > > ; Jerin Jacob ; Shijith
> > Thotton
> > > ; Sevincer, Abdullah
> > ;
> > > hemant.agra...@nxp.com; sachin.sax...@oss.nxp.com; Van Haaren,
> Harry
> > > ; mattias.ronnb...@ericsson.com;
> > > lian...@liangbit.com; Mccarthy, Peter 
> > > Cc: dev@dpdk.org
> > > Subject: RE: [EXTERNAL] Re: [PATCH v2 1/3] eventdev: introduce event
> > > pre- scheduling
> > >
> > > > On 2024-09-19 15:13, Pavan Nikhilesh Bhagavatula wrote:
> > > > >>> From: pbhagavat...@marvell.com 
> > > > >>> Sent: Tuesday, September 17, 2024 3:11 AM
> > > > >>> To: jer...@marvell.com; sthot...@marvell.com; Sevincer,
> > > > >>> Abdullah ;
> > > > >>> hemant.agra...@nxp.com; sachin.sax...@oss.nxp.com; Van
> Haaren,
> > > > >>> Harry
> > > > >> ;
> > > > >>> mattias.ronnb...@ericsson.com; lian...@liangbit.com; Mccarthy,
> > > > >>> Peter 
> > > > >>> Cc: dev@dpdk.org; Pavan Nikhilesh 
> > > > >>> Subject: [PATCH v2 1/3] eventdev: introduce event
> > > > >>> pre-scheduling
> > > > >>>
> > > > >>> From: Pavan Nikhilesh 
> > > > >>>
> > > > >>> Event pre-scheduling improves scheduling performance by
> > > > >>> assigning
> > > > events
> > > > >> to
> > > > >>> event ports in advance when dequeues are issued.
> > > > >>> The dequeue operation initiates the pre-schedule operation,
> > > > >>> which
> > > > >> completes in
> > > > >>> parallel without affecting the dequeued event flow contexts
> > > > >>> and dequeue latency.
> > > > >>>
> > > > >> Is the prescheduling done to get the event more quickly in the
> > > > >> next
> > > > dequeue?
> > > > >> The first dequeue executes pre-schedule to make events
> > > > >> available for the
> > > > next
> > > > >> dequeue.
> > > > >> Is this how it is supposed to work?
> > > > >>
> > > > >
> > > > > Yes, that is correct.
> > > > >
> > > >
> > > > "improves scheduling performance" may be a bit misleading, in that case.
> > > > I suggest "reduces scheduling overhead" instead. You can argue it
> > > > likely reduces scheduling performance, in certain scenarios.
> > > > "reduces scheduling overhead, at the cost of load balancing
> performance."
> > > >
> > >
> > > In case of OCTEON, we see double the scheduling performance with
> > > prescheduling without effecting any priority/weight aspects.
> > >
> > > > It seems to me that this should be a simple hint-type API, where
> > > > the hint is used by the event device to decide if pre-scheduling
> > > > should be used or not (assuming pre-scheduling on/off is even an
> > > > option). The hint would just be a way for the application to
> > > > express whether or not it want the scheduler to prioritize load
> > > > balancing agility and port-to-port wall-time latency, or
> > > > scheduling overhead, which in turn could potentially be rephrased
> > > > as the app being throughput or latency/RT-
> > > oriented.
> > > >
> > >
> > > The three prescheduling types are designed based on real world
> > > use-cases
> > that
> > > some of our customers require in their applications.
> > > Relying on application to provide hits might not be possible in all
> > > the cases as
> > it
> > > is very timing sensitive.
> > >
> > >
> > > > It could also be useful for the event device to know which
> > > > priority levels are to be considered latency-sensitive, and which
> > > > are throughput-oriented - maybe in the form of a threshold.
> > > >
> > > > >>> Event devices can indicate pre-scheduling capabilities using
> > > > >>> `RTE_EVENT_DEV_CAP_EVENT_PRESCHEDULE` and
> > > > >>> `RTE_EVENT_DEV_CAP_EVENT_PRESCHEDULE_ADAPTIVE` via the
> > event
> > > > >> device
> > > > >>> info function `info.event_dev_cap`.
> >
> > What is PRESCHEDULE_ADAPTIVE? Can you please add more description?
> 
> Unlike raw PRESCHEDULE where every dequeue triggers a pre-scheduling
> request in parallel, PRESCHEDULE_ADAPTIVE will delay issuing pre-scheduling
> till event device knows that the currently scheduled context can make forward
> progress.
> For example, in OCTEON HW does it when it sees that scheduling context held
> by the port is top/head of the flow.

So adaptive can be used by different HWs to handle preschedule dynamically 
based on 
Their implementation. The end aim is to balance fair load balancing
and throughput. Is this understanding correct? I am thinking of using these for 
DLB if
possible. 

> 
> > This will be more useful as per port configuration inste

Re: [PATCH v6 0/2] Add link_speed lanes support

[Ferruh Yigit]

On 9/26/2024 10:43 PM, Damodharam Ammepalli wrote:
> This patch series is a continuation of the patch set that supports 
> configuring speed lanes.
> https://patchwork.dpdk.org/project/dpdk/patch/20240708232351.491529-1-
> damodharam.ammepa...@broadcom.com/
> 
> The patchset consists
> 1) rtelib/testpmd changes (Addressing the comments). Earlier comments are 
> available here, 
> https://patchwork.dpdk.org/project/dpdk/list/?
> q=Add%20link_speed%20lanes%20support&archive=both&series=&submitter=&delegate=&state=*
> 
> 2) Driver implementation of bnxt PMD.
> 
> v2->v3 Consolidating the testpmd and rtelib patches into a single patch as 
> requested.
> v3->v4 Addressed comments and fix help string and documentation.
> v4->v5 Addressed comments given in v4 and also driver implementation of bnxt 
> PMD.
> v5->v6 Removed LANE_xx enums and updated driver source files. Minor help
> string fix.
> 
> Damodharam Ammepalli (2):
>   ethdev: Add link_speed lanes support
>   net/bnxt: code refactor for supporting speed lanes
>

Hi Ajit,

Can you please review the bnxt patch, if it is good I can progress with
the series.

Re: [PATCH v2] net/nfp: implement the device packet type set interface

[Ferruh Yigit]

On 9/26/2024 8:16 AM, Chaoyong He wrote:
> From: Long Wu 
> 
> Using the Rx packet offload flag rather than the device
> capability to control the packet type offload configuration.
> Also implement the device packet type set interface to
> let application can set the Rx packet offload flag.
> 
> Signed-off-by: Long Wu 
> Reviewed-by: Chaoyong He 
> 
> ---
> V2:
> * Following the advice from reviewer, abandon the modification of RTE
>   layer.
> ---
>  drivers/net/nfp/nfp_ethdev.c |  1 +
>  drivers/net/nfp/nfp_net_common.c | 42 +++-
>  drivers/net/nfp/nfp_net_common.h |  1 +
>  3 files changed, 43 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/nfp/nfp_ethdev.c b/drivers/net/nfp/nfp_ethdev.c
> index bd35df2dc9..09c15eedac 100644
> --- a/drivers/net/nfp/nfp_ethdev.c
> +++ b/drivers/net/nfp/nfp_ethdev.c
> @@ -932,6 +932,7 @@ static const struct eth_dev_ops nfp_net_eth_dev_ops = {
>   .xstats_get_names_by_id = nfp_net_xstats_get_names_by_id,
>   .dev_infos_get  = nfp_net_infos_get,
>   .dev_supported_ptypes_get = nfp_net_supported_ptypes_get,
> + .dev_ptypes_set = nfp_net_ptypes_set,
>

Hi Chaoyong,

It looks like nfp support "Packet type parsing", can you please
advertise this feature in the nfp.ini?
I think it is OK to add it into this patch.

Re: [PATCH v6 1/2] ethdev: Add link_speed lanes support

[Ferruh Yigit]

On 9/26/2024 10:43 PM, Damodharam Ammepalli wrote:
> Update the eth_dev_ops structure with new function vectors
> to get, get capabilities and set ethernet link speed lanes.
> Update the testpmd to provide required config and information
> display infrastructure.
> 
> The supporting ethernet controller driver will register callbacks
> to avail link speed lanes config and get services. This lanes
> configuration is applicable only when the nic is forced to fixed
> speeds. In Autonegiation mode, the hardware automatically
> negotiates the number of lanes.
> 
> These are the new commands.
> 
> testpmd> show port 0 speed_lanes capabilities
> 
>  Supported speeds Valid lanes
> ---
>  10 Gbps  1
>  25 Gbps  1
>  40 Gbps  4
>  50 Gbps  1 2
>  100 Gbps 1 2 4
>  200 Gbps 2 4
>  400 Gbps 4 8
> testpmd>
> 
> testpmd>
> testpmd> port stop 0
> testpmd> port config 0 speed_lanes 4
> testpmd> port config 0 speed 20 duplex full
> testpmd> port start 0
> testpmd>
> testpmd> show port info 0
> 
> * Infos for port 0  *
> MAC address: 14:23:F2:C3:BA:D2
> Device name: :b1:00.0
> Driver name: net_bnxt
> Firmware-version: 228.9.115.0
> Connect to socket: 2
> memory allocation on the socket: 2
> Link status: up
> Link speed: 200 Gbps
> Active Lanes: 4
> Link duplex: full-duplex
> Autoneg status: Off
> 
> Signed-off-by: Damodharam Ammepalli 
>

Reviewed-by: Ferruh Yigit 

Suggested patch title:
ethdev: support link speed lanes

<...>

> +/**
> + * @warning
> + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice
> + *
> + * Get Active lanes.
> + *
> + * @param port_id
> + *   The port identifier of the Ethernet device.
> + * @param lanes
> + *   Driver updates lanes with the number of active lanes.
> + *   On a supported NIC on link up, lanes will be a non-zero value 
> irrespective whether the
> + *   link is Autonegotiated or Fixed speed. No information is dispalyed for 
> error.
>

s/dispalyed/displayed/

I can fix while merging