date:20210927

Re: [dpdk-dev] [PATCH v4] net/ice: enable Rx timestamp on Flex Descriptor

2021-09-27 Thread Zhang, Qi Z




> -Original Message-
> From: Su, Simei 
> Sent: Sunday, September 26, 2021 10:05 PM
> To: Zhang, Qi Z 
> Cc: dev@dpdk.org; Wang, Haiyue ; Su, Simei
> 
> Subject: [PATCH v4] net/ice: enable Rx timestamp on Flex Descriptor
> 
> Use the dynamic mbuf to register timestamp field and flag.
> The ice has the feature to dump Rx timestamp value into dynamic mbuf field
> by flex descriptor. This feature is turned on by dev config
> "enable-rx-timestamp". Currently, it's only supported under scalar path.
> 
> Signed-off-by: Simei Su 

Acked-by: Qi Zhang 

Applied to dpdk-next-net-intel.

Thanks
Qi

Re: [dpdk-dev] [PATCH] net/iavf: fix rx queue irqs resource leak

2021-09-27 Thread Zhang, Qi Z




> -Original Message-
> From: dev  On Behalf Of Qiming Chen
> Sent: Friday, September 10, 2021 2:55 PM
> To: dev@dpdk.org
> Cc: Xing, Beilei ; Wu, Jingjing 
> ;
> Qiming Chen ; sta...@dpdk.org
> Subject: [dpdk-dev] [PATCH] net/iavf: fix rx queue irqs resource leak
> 
> In the iavf_config_rx_queues_irqs function, the memory pointed to by the
> intr_handle->intr_vec and qv_map addresses is not released in the subsequent
> hook branch, resulting in resource leakage.
> 
> Fixes: f593944fc988 ("net/iavf: enable IRQ mapping configuration for large
> VF")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Qiming Chen 

Acked-by: Qi Zhang 

Applied to dpdk-next-net-intel.

Thanks
Qi

Re: [dpdk-dev] [PATCH] common/iavf: fix arq resource leak

2021-09-27 Thread Zhang, Qi Z




> -Original Message-
> From: dev  On Behalf Of Qiming Chen
> Sent: Friday, September 10, 2021 11:13 AM
> To: dev@dpdk.org
> Cc: Xing, Beilei ; Wu, Jingjing 
> ;
> Qiming Chen ; sta...@dpdk.org
> Subject: [dpdk-dev] [PATCH] common/iavf: fix arq resource leak
> 
> In the iavf_init_arq function, if an exception occurs in the 
> iavf_config_arq_regs
> function, and the previously applied arq bufs resource is released. This patch
> maintains the same modification as the iavf_init_asq function to roll back
> resources.
> 
> Fixes: 87aca6d8d8a4 ("net/iavf/base: fix command buffer memory leak")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Qiming Chen 

Acked-by: Qi Zhang 

Applied to dpdk-next-net-intel.

Thanks
Qi

Re: [dpdk-dev] [PATCH V2 1/5] pipeline: prepare for variable size headers

2021-09-27 Thread Thomas Monjalon

27/07/2021 19:43, Cristian Dumitrescu:
> The emit instruction that is responsible for pushing headers into the
> output packet is now reading the header length from internal run-time
> structures as opposed to constant value from the instruction opcode.
> 
> Signed-off-by: Cristian Dumitrescu 

Series applied, thanks.

Re: [dpdk-dev] [PATCH v9 1/3] ethdev: add an API to get device configuration info

2021-09-27 Thread Wang, Jie1X




> -Original Message-
> From: Thomas Monjalon 
> Sent: Monday, September 27, 2021 2:19 PM
> To: Wang, Jie1X 
> Cc: dev@dpdk.org; Yigit, Ferruh ;
> andrew.rybche...@oktetlabs.ru; Li, Xiaoyun ; Yang,
> SteveX 
> Subject: Re: [PATCH v9 1/3] ethdev: add an API to get device configuration 
> info
> 
> 26/09/2021 11:20, Jie Wang:
> > This patch adds a new API "rte_eth_dev_conf_info_get()" to help users
> > get device configuration info.
> >
> > Cc: sta...@dpdk.org
> 
> No we don't backport new features.

Ok, I'll remove 'Cc: sta...@dpdk.org'.

> 
> > Signed-off-by: Jie Wang 
> [...]
> > + * Retrieve the configuration of an Ethernet device.
> > + *
> > + * @param port_id
> > + *   The port identifier of the Ethernet device.
> > + * @param dev_conf_info
> > + *   A pointer to a structure of type *rte_eth_conf* to be filled with
> > + *   the configuration of the Ethernet device.
> > + *   And the memory of the structure should be allocated by the caller.
> > + * @return
> > + *   - (0) if successful.
> > + *   - (-ENODEV) if *port_id* invalid.
> > + *   - (-EINVAL) if bad parameter.
> > + */
> > +__rte_experimental
> > +int rte_eth_dev_conf_info_get(uint16_t port_id,
> > +   struct rte_eth_conf *dev_conf_info);
> 
> It does not make sense to me.
> rte_eth_conf is passed by the app to rte_eth_dev_configure.
> Why the app would need to get the same info back?
> 
> 

In rte_eth_dev_configure, dev->data->dev_conf copies the info from 
port->dev_conf, and then the driver updates it. It doesn't same as 
port->dev_conf.
We need to get the updated device configuration.

Re: [dpdk-dev] [PATCH] net/iavf: fix small probabilistic probe failure

2021-09-27 Thread Zhang, Qi Z




> -Original Message-
> From: dev  On Behalf Of Qiming Chen
> Sent: Saturday, September 11, 2021 4:05 PM
> To: dev@dpdk.org
> Cc: Xing, Beilei ; Wu, Jingjing 
> ;
> Qiming Chen ; sta...@dpdk.org
> Subject: [dpdk-dev] [PATCH] net/iavf: fix small probabilistic probe failure
> 
> In the embedded RTOS environment, the x722 controller Ethernet card of the
> d2146nt chip, the vfio user mode driver takes over 8 vf ports in turn, but
> iavf_check_vf_reset_done will probably fail.
> 
> This issue has been discussed with intel&dpdk experts for 3 rounds before, and
> the version matching is no problem, and there is no substantial progress.
> 1) Learning from the implementation of the i40evf kernel driver locally, after
> modifying the polling time from 1 second to 5s,

Increase timeout from 1s to 5s may give bad user experience in the case when a 
vf is not expected to be init successfully due to some wrong ops.
Maybe its better to introduce a compile option or devargs for this?
 

> 2) In the same way, by checking and checking, it is found that the probability
> of vf sending a command to the interrupt thread receiving the message will
> occur for more than 12s, and there is no failure, so the time is adjusted to 
> 15s.
> 
> the repeated restart process took over the start port test, and it was found 
> that
> this probability was reduced to an order of magnitude acceptable to the user.
> 
> The patch cannot fundamentally solve the failure problem, but it greatly slows
> down the probability of the problem. The modification is based on the i40evf
> kernel driver.
> 
> Fixes: 22b123a36d07 ("net/avf: initialize PMD")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Qiming Chen 
> ---
>  drivers/net/iavf/iavf.h   | 2 +-
>  drivers/net/iavf/iavf_vchnl.c | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/iavf/iavf.h b/drivers/net/iavf/iavf.h index
> b3bd078111..b3732d1185 100644
> --- a/drivers/net/iavf/iavf.h
> +++ b/drivers/net/iavf/iavf.h
> @@ -16,7 +16,7 @@
> 
>  #define IAVF_AQ_LEN   32
>  #define IAVF_AQ_BUF_SZ4096
> -#define IAVF_RESET_WAIT_CNT   50
> +#define IAVF_RESET_WAIT_CNT   250
>  #define IAVF_BUF_SIZE_MIN 1024
>  #define IAVF_FRAME_SIZE_MAX   9728
>  #define IAVF_QUEUE_BASE_ADDR_UNIT 128
> diff --git a/drivers/net/iavf/iavf_vchnl.c b/drivers/net/iavf/iavf_vchnl.c 
> index
> 2f39c2077c..25066419b0 100644
> --- a/drivers/net/iavf/iavf_vchnl.c
> +++ b/drivers/net/iavf/iavf_vchnl.c
> @@ -23,7 +23,7 @@
>  #include "iavf.h"
>  #include "iavf_rxtx.h"
> 
> -#define MAX_TRY_TIMES 200
> +#define MAX_TRY_TIMES 1500
>  #define ASQ_DELAY_MS  10
> 
>  static uint32_t
> --
> 2.30.1.windows.1

Re: [dpdk-dev] [PATCH V5 1/4] table: add support learner tables

2021-09-27 Thread Thomas Monjalon

20/09/2021 17:01, Cristian Dumitrescu:
> A learner table is typically used for learning or connection tracking,
> where it allows for the implementation of the "add on miss" scenario:
> whenever the lookup key is not found in the table (lookup miss), the
> data plane can decide to add this key to the table with a given action
> with no control plane intervention. Likewise, the table keys expire
> based on a configurable timeout and are automatically deleted from the
> table with no control plane intervention.
> 
> Signed-off-by: Cristian Dumitrescu 

Series applied, thanks.

[dpdk-dev] [PATCH v5 0/2] support IOMMU for DMA device

2021-09-27 Thread Xuan Ding

This series supports DMA device to use vfio in async vhost.

The first patch extends the capability of current vfio dma mapping
API to allow partial unmapping for adjacent memory if the platform
does not support partial unmapping. The second patch involves the
IOMMU programming for guest memory in async vhost.

v5:
* Fix issue of a pointer be freed early.

v4:
* Fix a format issue.

v3:
* Move the async_map_status flag to virtio_net structure to avoid
ABI breaking.

v2:
* Add rte_errno filtering for some devices bound in the kernel driver.
* Add a flag to check the status of region mapping.
* Fix one typo.

Xuan Ding (2):
  vfio: allow partially unmapping adjacent memory
  vhost: enable IOMMU for async vhost

 lib/eal/linux/eal_vfio.c | 338 ++-
 lib/vhost/vhost.h|   4 +
 lib/vhost/vhost_user.c   | 114 -
 3 files changed, 344 insertions(+), 112 deletions(-)

-- 
2.17.1

[dpdk-dev] [PATCH v5 1/2] vfio: allow partially unmapping adjacent memory

2021-09-27 Thread Xuan Ding

Currently, if we map a memory area A, then map a separate memory area B
that by coincidence happens to be adjacent to A, current implementation
will merge these two segments into one, and if partial unmapping is not
supported, these segments will then be only allowed to be unmapped in
one go. In other words, given segments A and B that are adjacent, it
is currently not possible to map A, then map B, then unmap A.

Fix this by adding a notion of "chunk size", which will allow
subdividing segments into equally sized segments whenever we are dealing
with an IOMMU that does not support partial unmapping. With this change,
we will still be able to merge adjacent segments, but only if they are
of the same size. If we keep with our above example, adjacent segments A
and B will be stored as separate segments if they are of different
sizes.

Signed-off-by: Anatoly Burakov 
Signed-off-by: Xuan Ding 
---
 lib/eal/linux/eal_vfio.c | 338 ++-
 1 file changed, 228 insertions(+), 110 deletions(-)

diff --git a/lib/eal/linux/eal_vfio.c b/lib/eal/linux/eal_vfio.c
index 25add2fa5d..657c89ca58 100644
--- a/lib/eal/linux/eal_vfio.c
+++ b/lib/eal/linux/eal_vfio.c
@@ -31,9 +31,10 @@
  */
 #define VFIO_MAX_USER_MEM_MAPS 256
 struct user_mem_map {
-   uint64_t addr;
-   uint64_t iova;
-   uint64_t len;
+   uint64_t addr;  /**< start VA */
+   uint64_t iova;  /**< start IOVA */
+   uint64_t len;   /**< total length of the mapping */
+   uint64_t chunk; /**< this mapping can be split in chunks of this size */
 };
 
 struct user_mem_maps {
@@ -95,7 +96,8 @@ static const struct vfio_iommu_type iommu_types[] = {
 static int
 is_null_map(const struct user_mem_map *map)
 {
-   return map->addr == 0 && map->iova == 0 && map->len == 0;
+   return map->addr == 0 && map->iova == 0 &&
+   map->len == 0 && map->chunk == 0;
 }
 
 /* we may need to merge user mem maps together in case of user 
mapping/unmapping
@@ -129,41 +131,90 @@ user_mem_map_cmp(const void *a, const void *b)
if (umm_a->len > umm_b->len)
return 1;
 
+   if (umm_a->chunk < umm_b->chunk)
+   return -1;
+   if (umm_a->chunk > umm_b->chunk)
+   return 1;
+
return 0;
 }
 
-/* adjust user map entry. this may result in shortening of existing map, or in
- * splitting existing map in two pieces.
+/*
+ * Take in an address range and list of current mappings, and produce a list of
+ * mappings that will be kept.
  */
+static int
+process_maps(struct user_mem_map *src, size_t src_len,
+   struct user_mem_map newmap[2], uint64_t vaddr, uint64_t len)
+{
+   struct user_mem_map *src_first = &src[0];
+   struct user_mem_map *src_last = &src[src_len - 1];
+   struct user_mem_map *dst_first = &newmap[0];
+   /* we can get at most two new segments */
+   struct user_mem_map *dst_last = &newmap[1];
+   uint64_t first_off = vaddr - src_first->addr;
+   uint64_t last_off = (src_last->addr + src_last->len) - (vaddr + len);
+   int newmap_len = 0;
+
+   if (first_off != 0) {
+   dst_first->addr = src_first->addr;
+   dst_first->iova = src_first->iova;
+   dst_first->len = first_off;
+   dst_first->chunk = src_first->chunk;
+
+   newmap_len++;
+   }
+   if (last_off != 0) {
+   /* if we had start offset, we have two segments */
+   struct user_mem_map *last =
+   first_off == 0 ? dst_first : dst_last;
+   last->addr = (src_last->addr + src_last->len) - last_off;
+   last->iova = (src_last->iova + src_last->len) - last_off;
+   last->len = last_off;
+   last->chunk = src_last->chunk;
+
+   newmap_len++;
+   }
+   return newmap_len;
+}
+
+/* erase certain maps from the list */
 static void
-adjust_map(struct user_mem_map *src, struct user_mem_map *end,
-   uint64_t remove_va_start, uint64_t remove_len)
-{
-   /* if va start is same as start address, we're simply moving start */
-   if (remove_va_start == src->addr) {
-   src->addr += remove_len;
-   src->iova += remove_len;
-   src->len -= remove_len;
-   } else if (remove_va_start + remove_len == src->addr + src->len) {
-   /* we're shrinking mapping from the end */
-   src->len -= remove_len;
-   } else {
-   /* we're blowing a hole in the middle */
-   struct user_mem_map tmp;
-   uint64_t total_len = src->len;
+delete_maps(struct user_mem_maps *user_mem_maps, struct user_mem_map *del_maps,
+   size_t n_del)
+{
+   int i;
+   size_t j;
+
+   for (i = 0, j = 0; i < VFIO_MAX_USER_MEM_MAPS && j < n_del; i++) {
+   struct user_mem_map *left = &user_mem_maps->maps[i];
+   struct user_mem_map *right =

[dpdk-dev] [PATCH v5 2/2] vhost: enable IOMMU for async vhost

2021-09-27 Thread Xuan Ding

The use of IOMMU has many advantages, such as isolation and address
translation. This patch extends the capbility of DMA engine to use
IOMMU if the DMA engine is bound to vfio.

When set memory table, the guest memory will be mapped
into the default container of DPDK.

Signed-off-by: Xuan Ding 
---
 lib/vhost/vhost.h  |   4 ++
 lib/vhost/vhost_user.c | 114 -
 2 files changed, 116 insertions(+), 2 deletions(-)

diff --git a/lib/vhost/vhost.h b/lib/vhost/vhost.h
index d98ca8adfa..8b8df3897b 100644
--- a/lib/vhost/vhost.h
+++ b/lib/vhost/vhost.h
@@ -370,6 +370,10 @@ struct virtio_net {
int16_t broadcast_rarp;
uint32_tnr_vring;
int async_copy;
+
+   /* Record the dma map status for each region. */
+   bool*async_map_status;
+
int extbuf;
int linearbuf;
struct vhost_virtqueue  *virtqueue[VHOST_MAX_QUEUE_PAIRS * 2];
diff --git a/lib/vhost/vhost_user.c b/lib/vhost/vhost_user.c
index 29a4c9af60..7ffb679304 100644
--- a/lib/vhost/vhost_user.c
+++ b/lib/vhost/vhost_user.c
@@ -45,6 +45,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include "iotlb.h"
 #include "vhost.h"
@@ -141,6 +143,63 @@ get_blk_size(int fd)
return ret == -1 ? (uint64_t)-1 : (uint64_t)stat.st_blksize;
 }
 
+static int
+async_dma_map(struct rte_vhost_mem_region *region, bool *dma_map_success, bool 
do_map)
+{
+   uint64_t host_iova;
+   int ret = 0;
+
+   host_iova = rte_mem_virt2iova((void 
*)(uintptr_t)region->host_user_addr);
+   if (do_map) {
+   /* Add mapped region into the default container of DPDK. */
+   ret = rte_vfio_container_dma_map(RTE_VFIO_DEFAULT_CONTAINER_FD,
+region->host_user_addr,
+host_iova,
+region->size);
+   *dma_map_success = ret == 0;
+
+   if (ret) {
+   /*
+* DMA device may bind with kernel driver, in this case,
+* we don't need to program IOMMU manually. However, if 
no
+* device is bound with vfio/uio in DPDK, and vfio 
kernel
+* module is loaded, the API will still be called and 
return
+* with ENODEV/ENOSUP.
+*
+* DPDK VFIO only returns ENODEV/ENOSUP in very similar
+* situations(VFIO either unsupported, or supported
+* but no devices found). Either way, no mappings could 
be
+* performed. We treat it as normal case in async path.
+*/
+   if (rte_errno == ENODEV && rte_errno == ENOTSUP)
+   return 0;
+
+   VHOST_LOG_CONFIG(ERR, "DMA engine map failed\n");
+   return ret;
+
+   }
+
+   } else {
+   /* No need to do vfio unmap if the map failed. */
+   if (!*dma_map_success)
+   return 0;
+
+   /* Remove mapped region from the default container of DPDK. */
+   ret = 
rte_vfio_container_dma_unmap(RTE_VFIO_DEFAULT_CONTAINER_FD,
+  region->host_user_addr,
+  host_iova,
+  region->size);
+   if (ret) {
+   VHOST_LOG_CONFIG(ERR, "DMA engine unmap failed\n");
+   return ret;
+   }
+   /* Clear the flag once the unmap succeeds. */
+   *dma_map_success = 0;
+   }
+
+   return ret;
+}
+
 static void
 free_mem_region(struct virtio_net *dev)
 {
@@ -153,6 +212,9 @@ free_mem_region(struct virtio_net *dev)
for (i = 0; i < dev->mem->nregions; i++) {
reg = &dev->mem->regions[i];
if (reg->host_user_addr) {
+   if (dev->async_copy && rte_vfio_is_enabled("vfio"))
+   async_dma_map(reg, &dev->async_map_status[i], 
false);
+
munmap(reg->mmap_addr, reg->mmap_size);
close(reg->fd);
}
@@ -203,6 +265,11 @@ vhost_backend_cleanup(struct virtio_net *dev)
}
 
dev->postcopy_listening = 0;
+
+   if (dev->async_map_status) {
+   rte_free(dev->async_map_status);
+   dev->async_map_status = NULL;
+   }
 }
 
 static void
@@ -621,6 +688,17 @@ numa_realloc(struct virtio_net *dev, int index)
}
dev->mem = mem;
 
+   if (dev->async_copy && rte_vfio_is_enabled("vfio")) {
+   dev->async_map_status = 
rte_zmalloc_so

Re: [dpdk-dev] [PATCH v9 1/3] ethdev: add an API to get device configuration info

2021-09-27 Thread Thomas Monjalon

27/09/2021 09:21, Wang, Jie1X:
> From: Thomas Monjalon 
> > 26/09/2021 11:20, Jie Wang:
> > > This patch adds a new API "rte_eth_dev_conf_info_get()" to help users
> > > get device configuration info.
> > [...]
> > > + * Retrieve the configuration of an Ethernet device.
> > > + *
> > > + * @param port_id
> > > + *   The port identifier of the Ethernet device.
> > > + * @param dev_conf_info
> > > + *   A pointer to a structure of type *rte_eth_conf* to be filled with
> > > + *   the configuration of the Ethernet device.
> > > + *   And the memory of the structure should be allocated by the caller.
> > > + * @return
> > > + *   - (0) if successful.
> > > + *   - (-ENODEV) if *port_id* invalid.
> > > + *   - (-EINVAL) if bad parameter.
> > > + */
> > > +__rte_experimental
> > > +int rte_eth_dev_conf_info_get(uint16_t port_id,
> > > + struct rte_eth_conf *dev_conf_info);
> > 
> > It does not make sense to me.
> > rte_eth_conf is passed by the app to rte_eth_dev_configure.
> > Why the app would need to get the same info back?
> > 
> > 
> 
> In rte_eth_dev_configure, dev->data->dev_conf copies the info from 
> port->dev_conf, and then the driver updates it. It doesn't same as 
> port->dev_conf.
> We need to get the updated device configuration.

OK I see.
Please update the commit log to explain this.

[dpdk-dev] [PATCH v2 01/27] common/cnxk: update policer MBOX APIs and HW definitions

2021-09-27 Thread skori

From: Sunil Kumar Kori 

To support ingress policer on CN10K, MBOX interfaces and HW
definitions are synced.

Signed-off-by: Sunil Kumar Kori 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/common/cnxk/hw/nix.h   | 13 ++---
 drivers/common/cnxk/roc_mbox.h | 34 +-
 2 files changed, 43 insertions(+), 4 deletions(-)

diff --git a/drivers/common/cnxk/hw/nix.h b/drivers/common/cnxk/hw/nix.h
index 6b86002ead..53cdfbb142 100644
--- a/drivers/common/cnxk/hw/nix.h
+++ b/drivers/common/cnxk/hw/nix.h
@@ -692,9 +692,16 @@
 #define NIX_RX_BAND_PROF_ACTIONRESULT_DROP (0x1ull) /* [CN10K, .) */
 #define NIX_RX_BAND_PROF_ACTIONRESULT_RED  (0x2ull) /* [CN10K, .) */
 
-#define NIX_RX_BAND_PROF_LAYER_LEAF   (0x0ull) /* [CN10K, .) */
-#define NIX_RX_BAND_PROF_LAYER_MIDDLE (0x1ull) /* [CN10K, .) */
-#define NIX_RX_BAND_PROF_LAYER_TOP(0x2ull) /* [CN10K, .) */
+#define NIX_RX_BAND_PROF_LAYER_LEAF(0x0ull) /* [CN10K, .) */
+#define NIX_RX_BAND_PROF_LAYER_INVALID (0x1ull) /* [CN10K, .) */
+#define NIX_RX_BAND_PROF_LAYER_MIDDLE  (0x2ull) /* [CN10K, .) */
+#define NIX_RX_BAND_PROF_LAYER_TOP (0x3ull) /* [CN10K, .) */
+#define NIX_RX_BAND_PROF_LAYER_MAX (0x4ull) /* [CN10K, .) */
+
+#define NIX_RX_BAND_PROF_PC_MODE_VLAN (0x0ull) /* [CN10K, .) */
+#define NIX_RX_BAND_PROF_PC_MODE_DSCP (0x1ull) /* [CN10K, .) */
+#define NIX_RX_BAND_PROF_PC_MODE_GEN  (0x2ull) /* [CN10K, .) */
+#define NIX_RX_BAND_PROF_PC_MODE_RSVD (0x3ull) /* [CN10K, .) */
 
 #define NIX_RX_COLORRESULT_GREEN  (0x0ull) /* [CN10K, .) */
 #define NIX_RX_COLORRESULT_YELLOW (0x1ull) /* [CN10K, .) */
diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h
index b5da931b81..c8b97e9aee 100644
--- a/drivers/common/cnxk/roc_mbox.h
+++ b/drivers/common/cnxk/roc_mbox.h
@@ -234,7 +234,11 @@ struct mbox_msghdr {
  nix_inline_ipsec_lf_cfg, msg_rsp)\
M(NIX_CN10K_AQ_ENQ, 0x801b, nix_cn10k_aq_enq, nix_cn10k_aq_enq_req,\
  nix_cn10k_aq_enq_rsp)\
-   M(NIX_GET_HW_INFO, 0x801c, nix_get_hw_info, msg_req, nix_hw_info)
+   M(NIX_GET_HW_INFO, 0x801c, nix_get_hw_info, msg_req, nix_hw_info)  \
+   M(NIX_BANDPROF_ALLOC, 0x801d, nix_bandprof_alloc,  \
+ nix_bandprof_alloc_req, nix_bandprof_alloc_rsp)  \
+   M(NIX_BANDPROF_FREE, 0x801e, nix_bandprof_free, nix_bandprof_free_req, \
+ msg_rsp)
 
 /* Messages initiated by AF (range 0xC00 - 0xDFF) */
 #define MBOX_UP_CGX_MESSAGES   
\
@@ -771,6 +775,10 @@ struct nix_cn10k_aq_enq_req {
__io struct nix_rsse_s rss;
/* Valid when op == WRITE/INIT and ctype == NIX_AQ_CTYPE_MCE */
__io struct nix_rx_mce_s mce;
+   /* Valid when op == WRITE/INIT and
+* ctype == NIX_AQ_CTYPE_BAND_PROF
+*/
+   __io struct nix_band_prof_s prof;
};
/* Mask data when op == WRITE (1=write, 0=don't write) */
union {
@@ -784,6 +792,8 @@ struct nix_cn10k_aq_enq_req {
__io struct nix_rsse_s rss_mask;
/* Valid when op == WRITE and ctype == NIX_AQ_CTYPE_MCE */
__io struct nix_rx_mce_s mce_mask;
+   /* Valid when op == WRITE and ctype == NIX_AQ_CTYPE_BAND_PROF */
+   __io struct nix_band_prof_s prof_mask;
};
 };
 
@@ -795,6 +805,7 @@ struct nix_cn10k_aq_enq_rsp {
struct nix_cq_ctx_s cq;
struct nix_rsse_s rss;
struct nix_rx_mce_s mce;
+   struct nix_band_prof_s prof;
};
 };
 
@@ -1129,6 +1140,27 @@ struct nix_hw_info {
uint16_t __io rsvd[15];
 };
 
+struct nix_bandprof_alloc_req {
+   struct mbox_msghdr hdr;
+   /* Count of profiles needed per layer */
+   uint16_t __io prof_count[NIX_RX_BAND_PROF_LAYER_MAX];
+};
+
+struct nix_bandprof_alloc_rsp {
+   struct mbox_msghdr hdr;
+   uint16_t __io prof_count[NIX_RX_BAND_PROF_LAYER_MAX];
+
+#define BANDPROF_PER_PFFUNC 64
+   uint16_t __io prof_idx[NIX_RX_BAND_PROF_LAYER_MAX][BANDPROF_PER_PFFUNC];
+};
+
+struct nix_bandprof_free_req {
+   struct mbox_msghdr hdr;
+   uint8_t __io free_all;
+   uint16_t __io prof_count[NIX_RX_BAND_PROF_LAYER_MAX];
+   uint16_t __io prof_idx[NIX_RX_BAND_PROF_LAYER_MAX][BANDPROF_PER_PFFUNC];
+};
+
 /* SSO mailbox error codes
  * Range 501 - 600.
  */
-- 
2.25.1

[dpdk-dev] [PATCH v2 02/27] common/cnxk: support RoC API to get level to index

2021-09-27 Thread skori

From: Sunil Kumar Kori 

CN10K platform supports policer up to 3 level of hierarchy.
Implement RoC API to get corresponding index for given level.

Signed-off-by: Sunil Kumar Kori 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/common/cnxk/meson.build|  1 +
 drivers/common/cnxk/roc_nix.h  | 11 +++
 drivers/common/cnxk/roc_nix_bpf.c  | 22 ++
 drivers/common/cnxk/roc_nix_priv.h |  1 +
 drivers/common/cnxk/version.map|  1 +
 5 files changed, 36 insertions(+)
 create mode 100644 drivers/common/cnxk/roc_nix_bpf.c

diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build
index 8a551d15d6..62901e66e7 100644
--- a/drivers/common/cnxk/meson.build
+++ b/drivers/common/cnxk/meson.build
@@ -25,6 +25,7 @@ sources = files(
 'roc_mbox.c',
 'roc_model.c',
 'roc_nix.c',
+'roc_nix_bpf.c',
 'roc_nix_debug.c',
 'roc_nix_fc.c',
 'roc_nix_irq.c',
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index b0e6fabe31..1488c24f59 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -6,6 +6,8 @@
 #define _ROC_NIX_H_
 
 /* Constants */
+#define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF
+
 enum roc_nix_rss_reta_sz {
ROC_NIX_RSS_RETA_SZ_64 = 64,
ROC_NIX_RSS_RETA_SZ_128 = 128,
@@ -29,6 +31,12 @@ enum roc_nix_vlan_type {
ROC_NIX_VLAN_TYPE_OUTER = 0x02,
 };
 
+enum roc_nix_bpf_level_flag {
+   ROC_NIX_BPF_LEVEL_F_LEAF = BIT(0),
+   ROC_NIX_BPF_LEVEL_F_MID = BIT(1),
+   ROC_NIX_BPF_LEVEL_F_TOP = BIT(2),
+};
+
 struct roc_nix_vlan_config {
uint32_t type;
union {
@@ -468,6 +476,9 @@ int __roc_api roc_nix_tm_rsrc_count(struct roc_nix *roc_nix,
 int __roc_api roc_nix_tm_node_name_get(struct roc_nix *roc_nix,
   uint32_t node_id, char *buf,
   size_t buflen);
+/* Ingress Policer API */
+uint8_t __roc_api
+roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
 /* MAC */
 int __roc_api roc_nix_mac_rxtx_start_stop(struct roc_nix *roc_nix, bool start);
diff --git a/drivers/common/cnxk/roc_nix_bpf.c 
b/drivers/common/cnxk/roc_nix_bpf.c
new file mode 100644
index 00..b588cc16e4
--- /dev/null
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include "roc_api.h"
+#include "roc_priv.h"
+
+uint8_t
+roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)
+{
+   uint8_t idx;
+
+   if (level_f & ROC_NIX_BPF_LEVEL_F_LEAF)
+   idx = 0;
+   else if (level_f & ROC_NIX_BPF_LEVEL_F_MID)
+   idx = 1;
+   else if (level_f & ROC_NIX_BPF_LEVEL_F_TOP)
+   idx = 2;
+   else
+   idx = ROC_NIX_BPF_LEVEL_IDX_INVALID;
+   return idx;
+}
diff --git a/drivers/common/cnxk/roc_nix_priv.h 
b/drivers/common/cnxk/roc_nix_priv.h
index 9dc0c88a6f..94040fc744 100644
--- a/drivers/common/cnxk/roc_nix_priv.h
+++ b/drivers/common/cnxk/roc_nix_priv.h
@@ -170,6 +170,7 @@ enum nix_err_status {
NIX_ERR_INVALID_RANGE,
NIX_ERR_INTERNAL,
NIX_ERR_OP_NOTSUP,
+   NIX_ERR_HW_NOTSUP,
NIX_ERR_QUEUE_INVALID_RANGE,
NIX_ERR_AQ_READ_FAILED,
NIX_ERR_AQ_WRITE_FAILED,
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 5df2e56ce6..c19f74fe91 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -77,6 +77,7 @@ INTERNAL {
roc_model;
roc_se_auth_key_set;
roc_se_ciph_key_set;
+   roc_nix_bpf_level_to_idx;
roc_nix_cq_dump;
roc_nix_cq_fini;
roc_nix_cq_init;
-- 
2.25.1

[dpdk-dev] [PATCH v2 03/27] common/cnxk: support RoC API to get profile count

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement interface to get available profile count for given
nixlf.

Signed-off-by: Sunil Kumar Kori 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/common/cnxk/roc_nix.h |  5 
 drivers/common/cnxk/roc_nix_bpf.c | 46 +++
 drivers/common/cnxk/version.map   |  1 +
 3 files changed, 52 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 1488c24f59..3d3e169977 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -7,6 +7,7 @@
 
 /* Constants */
 #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF
+#define ROC_NIX_BPF_LEVEL_MAX3
 
 enum roc_nix_rss_reta_sz {
ROC_NIX_RSS_RETA_SZ_64 = 64,
@@ -477,6 +478,10 @@ int __roc_api roc_nix_tm_node_name_get(struct roc_nix 
*roc_nix,
   uint32_t node_id, char *buf,
   size_t buflen);
 /* Ingress Policer API */
+int __roc_api
+roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask,
+ uint16_t count[ROC_NIX_BPF_LEVEL_MAX] /* Out */);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c 
b/drivers/common/cnxk/roc_nix_bpf.c
index b588cc16e4..af9dffa90c 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -5,6 +5,14 @@
 #include "roc_api.h"
 #include "roc_priv.h"
 
+#define NIX_MAX_BPF_COUNT_LEAF_LAYER 64
+#define NIX_MAX_BPF_COUNT_MID_LAYER  8
+#define NIX_MAX_BPF_COUNT_TOP_LAYER  1
+
+#define NIX_BPF_LEVEL_F_MASK   
\
+   (ROC_NIX_BPF_LEVEL_F_LEAF | ROC_NIX_BPF_LEVEL_F_MID |  \
+ROC_NIX_BPF_LEVEL_F_TOP)
+
 uint8_t
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)
 {
@@ -20,3 +28,41 @@ roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)
idx = ROC_NIX_BPF_LEVEL_IDX_INVALID;
return idx;
 }
+
+int
+roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask,
+ uint16_t count[ROC_NIX_BPF_LEVEL_MAX])
+{
+   uint8_t mask = lvl_mask & NIX_BPF_LEVEL_F_MASK;
+   uint8_t leaf_idx, mid_idx, top_idx;
+
+   PLT_SET_USED(roc_nix);
+
+   if (roc_model_is_cn9k())
+   return NIX_ERR_HW_NOTSUP;
+
+   if (!mask)
+   return NIX_ERR_PARAM;
+
+   /* Currently No MBOX interface is available to get number
+* of bandwidth profiles. So numbers per level are hard coded,
+* considering 3 RPM blocks and each block has 4 LMAC's.
+* So total 12 physical interfaces are in system. Each interface
+* supports following bandwidth profiles.
+*/
+
+   leaf_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_LEAF);
+   mid_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_MID);
+   top_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_TOP);
+
+   if (leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID)
+   count[leaf_idx] = NIX_MAX_BPF_COUNT_LEAF_LAYER;
+
+   if (mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID)
+   count[mid_idx] = NIX_MAX_BPF_COUNT_MID_LAYER;
+
+   if (top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID)
+   count[top_idx] = NIX_MAX_BPF_COUNT_TOP_LAYER;
+
+   return 0;
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index c19f74fe91..790a32e2e0 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -77,6 +77,7 @@ INTERNAL {
roc_model;
roc_se_auth_key_set;
roc_se_ciph_key_set;
+   roc_nix_bpf_count_get;
roc_nix_bpf_level_to_idx;
roc_nix_cq_dump;
roc_nix_cq_fini;
-- 
2.25.1

[dpdk-dev] [PATCH v2 04/27] common/cnxk: support RoC API to alloc bandwidth profiles

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement RoC API to allocate HW resources i.e. bandwidth
profiles for policer processing on CN10K platform.

Signed-off-by: Sunil Kumar Kori 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/common/cnxk/roc_nix.h |  11 
 drivers/common/cnxk/roc_nix_bpf.c | 104 ++
 drivers/common/cnxk/version.map   |   1 +
 3 files changed, 116 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 3d3e169977..b55333a01c 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -6,6 +6,7 @@
 #define _ROC_NIX_H_
 
 /* Constants */
+#define ROC_NIX_BPF_PER_PFFUNC   64
 #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF
 #define ROC_NIX_BPF_LEVEL_MAX3
 
@@ -38,6 +39,12 @@ enum roc_nix_bpf_level_flag {
ROC_NIX_BPF_LEVEL_F_TOP = BIT(2),
 };
 
+struct roc_nix_bpf_objs {
+   uint16_t level;
+   uint16_t count;
+   uint16_t ids[ROC_NIX_BPF_PER_PFFUNC];
+};
+
 struct roc_nix_vlan_config {
uint32_t type;
union {
@@ -482,6 +489,10 @@ int __roc_api
 roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask,
  uint16_t count[ROC_NIX_BPF_LEVEL_MAX] /* Out */);
 
+int __roc_api roc_nix_bpf_alloc(struct roc_nix *roc_nix, uint8_t lvl_mask,
+   uint16_t per_lvl_cnt[ROC_NIX_BPF_LEVEL_MAX],
+   struct roc_nix_bpf_objs *profs /* Out */);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c 
b/drivers/common/cnxk/roc_nix_bpf.c
index af9dffa90c..06394bda07 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -13,6 +13,19 @@
(ROC_NIX_BPF_LEVEL_F_LEAF | ROC_NIX_BPF_LEVEL_F_MID |  \
 ROC_NIX_BPF_LEVEL_F_TOP)
 
+static uint8_t sw_to_hw_lvl_map[] = {NIX_RX_BAND_PROF_LAYER_LEAF,
+NIX_RX_BAND_PROF_LAYER_MIDDLE,
+NIX_RX_BAND_PROF_LAYER_TOP};
+
+static inline struct mbox *
+get_mbox(struct roc_nix *roc_nix)
+{
+   struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+   struct dev *dev = &nix->dev;
+
+   return dev->mbox;
+}
+
 uint8_t
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)
 {
@@ -66,3 +79,94 @@ roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t 
lvl_mask,
 
return 0;
 }
+
+int
+roc_nix_bpf_alloc(struct roc_nix *roc_nix, uint8_t lvl_mask,
+ uint16_t per_lvl_cnt[ROC_NIX_BPF_LEVEL_MAX],
+ struct roc_nix_bpf_objs *profs)
+{
+   uint8_t mask = lvl_mask & NIX_BPF_LEVEL_F_MASK;
+   struct mbox *mbox = get_mbox(roc_nix);
+   struct nix_bandprof_alloc_req *req;
+   struct nix_bandprof_alloc_rsp *rsp;
+   uint8_t leaf_idx, mid_idx, top_idx;
+   int rc = -ENOSPC, i;
+
+   if (roc_model_is_cn9k())
+   return NIX_ERR_HW_NOTSUP;
+
+   if (!mask)
+   return NIX_ERR_PARAM;
+
+   leaf_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_LEAF);
+   mid_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_MID);
+   top_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_TOP);
+
+   if ((leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) &&
+   (per_lvl_cnt[leaf_idx] > NIX_MAX_BPF_COUNT_LEAF_LAYER))
+   return NIX_ERR_INVALID_RANGE;
+
+   if ((mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) &&
+   (per_lvl_cnt[mid_idx] > NIX_MAX_BPF_COUNT_MID_LAYER))
+   return NIX_ERR_INVALID_RANGE;
+
+   if ((top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) &&
+   (per_lvl_cnt[top_idx] > NIX_MAX_BPF_COUNT_TOP_LAYER))
+   return NIX_ERR_INVALID_RANGE;
+
+   req = mbox_alloc_msg_nix_bandprof_alloc(mbox);
+   if (req == NULL)
+   goto exit;
+
+   if (leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {
+   req->prof_count[sw_to_hw_lvl_map[leaf_idx]] =
+   per_lvl_cnt[leaf_idx];
+   }
+
+   if (mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {
+   req->prof_count[sw_to_hw_lvl_map[mid_idx]] =
+   per_lvl_cnt[mid_idx];
+   }
+
+   if (top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {
+   req->prof_count[sw_to_hw_lvl_map[top_idx]] =
+   per_lvl_cnt[top_idx];
+   }
+
+   rc = mbox_process_msg(mbox, (void *)&rsp);
+   if (rc)
+   goto exit;
+
+   if (leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {
+   profs[leaf_idx].level = leaf_idx;
+   profs[leaf_idx].count =
+   rsp->prof_count[sw_to_hw_lvl_map[leaf_idx]];
+   for (i = 0; i < profs[leaf_idx].count; i++) {
+   profs[leaf_idx].ids[i] =
+   rsp->prof_id

[dpdk-dev] [PATCH v2 05/27] common/cnxk: support RoC API to free bandwidth profiles

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement RoC interface to free HW bandwidth profiles on
CN10K platform.

Signed-off-by: Sunil Kumar Kori 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/common/cnxk/roc_nix.h |  6 +
 drivers/common/cnxk/roc_nix_bpf.c | 40 +++
 drivers/common/cnxk/version.map   |  2 ++
 3 files changed, 48 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index b55333a01c..bf451ecdbc 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -493,6 +493,12 @@ int __roc_api roc_nix_bpf_alloc(struct roc_nix *roc_nix, 
uint8_t lvl_mask,
uint16_t per_lvl_cnt[ROC_NIX_BPF_LEVEL_MAX],
struct roc_nix_bpf_objs *profs /* Out */);
 
+int __roc_api roc_nix_bpf_free(struct roc_nix *roc_nix,
+  struct roc_nix_bpf_objs *profs,
+  uint8_t num_prof);
+
+int __roc_api roc_nix_bpf_free_all(struct roc_nix *roc_nix);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c 
b/drivers/common/cnxk/roc_nix_bpf.c
index 06394bda07..41d31bc6cd 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -170,3 +170,43 @@ roc_nix_bpf_alloc(struct roc_nix *roc_nix, uint8_t 
lvl_mask,
 exit:
return rc;
 }
+
+int
+roc_nix_bpf_free(struct roc_nix *roc_nix, struct roc_nix_bpf_objs *profs,
+uint8_t num_prof)
+{
+   struct mbox *mbox = get_mbox(roc_nix);
+   struct nix_bandprof_free_req *req;
+   uint8_t level;
+   int i, j;
+
+   if (num_prof >= NIX_RX_BAND_PROF_LAYER_MAX)
+   return NIX_ERR_INVALID_RANGE;
+
+   req = mbox_alloc_msg_nix_bandprof_free(mbox);
+   if (req == NULL)
+   return -ENOSPC;
+
+   for (i = 0; i < num_prof; i++) {
+   level = sw_to_hw_lvl_map[profs[i].level];
+   req->prof_count[level] = profs[i].count;
+   for (j = 0; j < profs[i].count; j++)
+   req->prof_idx[level][j] = profs[i].ids[j];
+   }
+
+   return mbox_process(mbox);
+}
+
+int
+roc_nix_bpf_free_all(struct roc_nix *roc_nix)
+{
+   struct mbox *mbox = get_mbox(roc_nix);
+   struct nix_bandprof_free_req *req;
+
+   req = mbox_alloc_msg_nix_bandprof_free(mbox);
+   if (req == NULL)
+   return -ENOSPC;
+
+   req->free_all = true;
+   return mbox_process(mbox);
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 81e76919b5..c45d524d65 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -79,6 +79,8 @@ INTERNAL {
roc_se_ciph_key_set;
roc_nix_bpf_alloc;
roc_nix_bpf_count_get;
+   roc_nix_bpf_free;
+   roc_nix_bpf_free_all;
roc_nix_bpf_level_to_idx;
roc_nix_cq_dump;
roc_nix_cq_fini;
-- 
2.25.1

[dpdk-dev] [PATCH v2 06/27] common/cnxk: support RoC API to configure bandwidth profile

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement RoC API to configure HW bandwidth profile for
CN10K platform.

Signed-off-by: Sunil Kumar Kori 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/common/cnxk/roc_nix.h | 108 ++
 drivers/common/cnxk/roc_nix_bpf.c | 231 ++
 drivers/common/cnxk/version.map   |   1 +
 3 files changed, 340 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index bf451ecdbc..af9bbb659c 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -10,6 +10,54 @@
 #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF
 #define ROC_NIX_BPF_LEVEL_MAX3
 
+/** NIX rate limits */
+#define MAX_RATE_DIV_EXP  12
+#define MAX_RATE_EXPONENT 0xf
+#define MAX_RATE_MANTISSA 0xff
+
+#define NIX_METER_RATE_CONST 200ULL
+
+/* NIX rate calculation in Bits/Sec
+ * PIR_ADD = ((256 + NIX_*_PIR[RATE_MANTISSA])
+ * << NIX_*_PIR[RATE_EXPONENT]) / 256
+ * PIR = (2E6 * PIR_ADD / (1 << NIX_*_PIR[RATE_DIVIDER_EXPONENT]))
+ *
+ * CIR_ADD = ((256 + NIX_*_CIR[RATE_MANTISSA])
+ * << NIX_*_CIR[RATE_EXPONENT]) / 256
+ * CIR = (2E6 * CIR_ADD / (CCLK_TICKS << NIX_*_CIR[RATE_DIVIDER_EXPONENT]))
+ */
+#define METER_RATE(exponent, mantissa, div_exp)
\
+   ((NIX_METER_RATE_CONST * ((256 + (mantissa)) << (exponent))) / \
+(((1ull << (div_exp)) * 256)))
+
+/* Meter rate limits in Bits/Sec */
+#define ROC_NIX_BPF_RATE_MIN METER_RATE(0, 0, MAX_RATE_DIV_EXP)
+#define ROC_NIX_BPF_RATE_MAX METER_RATE(MAX_RATE_EXPONENT, MAX_RATE_MANTISSA, 
0)
+
+#define ROC_NIX_DEFAULT_ADJUST_MANTISSA 511
+#define ROC_NIX_DEFAULT_ADJUST_EXPONENT 0
+
+/** NIX burst limits */
+#define MAX_BURST_EXPONENT 0xf
+#define MAX_BURST_MANTISSA 0xff
+
+/* NIX burst calculation
+ * PIR_BURST = ((256 + NIX_*_PIR[BURST_MANTISSA])
+ * << (NIX_*_PIR[BURST_EXPONENT] + 1))
+ * / 256
+ *
+ * CIR_BURST = ((256 + NIX_*_CIR[BURST_MANTISSA])
+ * << (NIX_*_CIR[BURST_EXPONENT] + 1))
+ * / 256
+ */
+#define METER_BURST(exponent, mantissa)
\
+   (((256 + (mantissa)) << ((exponent) + 1)) / 256)
+
+/** Meter burst limits */
+#define ROC_NIX_BPF_BURST_MIN METER_BURST(0, 0)
+#define ROC_NIX_BPF_BURST_MAX  
\
+   METER_BURST(MAX_BURST_EXPONENT, MAX_BURST_MANTISSA)
+
 enum roc_nix_rss_reta_sz {
ROC_NIX_RSS_RETA_SZ_64 = 64,
ROC_NIX_RSS_RETA_SZ_128 = 128,
@@ -39,6 +87,62 @@ enum roc_nix_bpf_level_flag {
ROC_NIX_BPF_LEVEL_F_TOP = BIT(2),
 };
 
+enum roc_nix_bpf_color {
+   ROC_NIX_BPF_COLOR_GREEN,
+   ROC_NIX_BPF_COLOR_YELLOW,
+   ROC_NIX_BPF_COLOR_RED,
+   ROC_NIX_BPF_COLOR_MAX
+};
+
+enum roc_nix_bpf_algo {
+   ROC_NIX_BPF_ALGO_NONE,
+   ROC_NIX_BPF_ALGO_2698,
+   ROC_NIX_BPF_ALGO_4115,
+   ROC_NIX_BPF_ALGO_2697
+};
+
+enum roc_nix_bpf_lmode { ROC_NIX_BPF_LMODE_BYTE, ROC_NIX_BPF_LMODE_PACKET };
+
+enum roc_nix_bpf_action {
+   ROC_NIX_BPF_ACTION_PASS,
+   ROC_NIX_BPF_ACTION_DROP,
+   ROC_NIX_BPF_ACTION_RED
+};
+
+struct roc_nix_bpf_cfg {
+   enum roc_nix_bpf_algo alg;
+   enum roc_nix_bpf_lmode lmode;
+   union {
+   /* Valid when *alg* is set to ROC_NIX_BPF_ALGO_2697. */
+   struct {
+   uint64_t cir;
+   uint64_t cbs;
+   uint64_t ebs;
+   } algo2697;
+
+   /* Valid when *alg* is set to ROC_NIX_BPF_ALGO_2698. */
+   struct {
+   uint64_t cir;
+   uint64_t pir;
+   uint64_t cbs;
+   uint64_t pbs;
+   } algo2698;
+
+   /* Valid when *alg* is set to ROC_NIX_BPF_ALGO_4115. */
+   struct {
+   uint64_t cir;
+   uint64_t eir;
+   uint64_t cbs;
+   uint64_t ebs;
+   } algo4115;
+   };
+
+   enum roc_nix_bpf_action action[ROC_NIX_BPF_COLOR_MAX];
+
+   /* Reserved for future config*/
+   uint32_t rsvd[3];
+};
+
 struct roc_nix_bpf_objs {
uint16_t level;
uint16_t count;
@@ -499,6 +603,10 @@ int __roc_api roc_nix_bpf_free(struct roc_nix *roc_nix,
 
 int __roc_api roc_nix_bpf_free_all(struct roc_nix *roc_nix);
 
+int __roc_api roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,
+enum roc_nix_bpf_level_flag lvl_flag,
+struct roc_nix_bpf_cfg *cfg);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c 
b/drivers/common/cnxk/roc_nix_bpf.c
index 41d31bc6cd..b1a427caaf 100644
--- a/drivers

[dpdk-dev] [PATCH v2 07/27] common/cnxk: support RoC API to toggle profile state

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement RoC API to enable or disable HW bandwidth profiles
on CN10K platform.

Signed-off-by: Sunil Kumar Kori 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/common/cnxk/roc_nix.h |  4 
 drivers/common/cnxk/roc_nix_bpf.c | 39 +++
 drivers/common/cnxk/version.map   |  1 +
 3 files changed, 44 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index af9bbb659c..b4995cd014 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -262,6 +262,7 @@ struct roc_nix_stats_queue {
 struct roc_nix_rq {
/* Input parameters */
uint16_t qid;
+   uint16_t bpf_id;
uint64_t aura_handle;
bool ipsech_ena;
uint16_t first_skip;
@@ -607,6 +608,9 @@ int __roc_api roc_nix_bpf_config(struct roc_nix *roc_nix, 
uint16_t id,
 enum roc_nix_bpf_level_flag lvl_flag,
 struct roc_nix_bpf_cfg *cfg);
 
+int __roc_api roc_nix_bpf_ena_dis(struct roc_nix *roc_nix, uint16_t id,
+ struct roc_nix_rq *rq, bool enable);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c 
b/drivers/common/cnxk/roc_nix_bpf.c
index b1a427caaf..4dcf4cd5b9 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -441,3 +441,42 @@ roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,
 
return mbox_process(mbox);
 }
+
+int
+roc_nix_bpf_ena_dis(struct roc_nix *roc_nix, uint16_t id, struct roc_nix_rq 
*rq,
+   bool enable)
+{
+   struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+   struct mbox *mbox = get_mbox(roc_nix);
+   struct nix_cn10k_aq_enq_req *aq;
+   int rc;
+
+   if (roc_model_is_cn9k())
+   return NIX_ERR_HW_NOTSUP;
+
+   if (rq->qid >= nix->nb_rx_queues)
+   return NIX_ERR_QUEUE_INVALID_RANGE;
+
+   aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+   if (aq == NULL)
+   return -ENOSPC;
+   aq->qidx = rq->qid;
+   aq->ctype = NIX_AQ_CTYPE_RQ;
+   aq->op = NIX_AQ_INSTOP_WRITE;
+
+   aq->rq.policer_ena = enable;
+   aq->rq_mask.policer_ena = ~(aq->rq_mask.policer_ena);
+   if (enable) {
+   aq->rq.band_prof_id = id;
+   aq->rq_mask.band_prof_id = ~(aq->rq_mask.band_prof_id);
+   }
+
+   rc = mbox_process(mbox);
+   if (rc)
+   goto exit;
+
+   rq->bpf_id = id;
+
+exit:
+   return rc;
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 6a009eaf35..4c5adb8212 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -80,6 +80,7 @@ INTERNAL {
roc_nix_bpf_alloc;
roc_nix_bpf_config;
roc_nix_bpf_count_get;
+   roc_nix_bpf_ena_dis;
roc_nix_bpf_free;
roc_nix_bpf_free_all;
roc_nix_bpf_level_to_idx;
-- 
2.25.1

[dpdk-dev] [PATCH v2 08/27] common/cnxk: support RoC API to dump bandwidth profile

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement RoC API to dump bandwidth profile on CN10K
platform.

Signed-off-by: Sunil Kumar Kori 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/common/cnxk/roc_nix.h  |  3 ++
 drivers/common/cnxk/roc_nix_bpf.c  | 86 ++
 drivers/common/cnxk/roc_platform.h |  1 +
 drivers/common/cnxk/version.map|  1 +
 4 files changed, 91 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index b4995cd014..de8d41e42e 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -611,6 +611,9 @@ int __roc_api roc_nix_bpf_config(struct roc_nix *roc_nix, 
uint16_t id,
 int __roc_api roc_nix_bpf_ena_dis(struct roc_nix *roc_nix, uint16_t id,
  struct roc_nix_rq *rq, bool enable);
 
+int __roc_api roc_nix_bpf_dump(struct roc_nix *roc_nix, uint16_t id,
+  enum roc_nix_bpf_level_flag lvl_flag);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c 
b/drivers/common/cnxk/roc_nix_bpf.c
index 4dcf4cd5b9..1e495159f4 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -123,6 +123,60 @@ meter_burst_to_nix(uint64_t value, uint64_t *exponent_p, 
uint64_t *mantissa_p)
return METER_BURST(exponent, mantissa);
 }
 
+static inline void
+nix_lf_bpf_dump(__io struct nix_band_prof_s *bpf)
+{
+   plt_dump("W0: cir_mantissa  \t\t\t%d\nW0: pebs_mantissa \t\t\t0x%03x",
+bpf->cir_mantissa, bpf->pebs_mantissa);
+   plt_dump("W0: peir_matissa \t\t\t\t%d\nW0: cbs_exponent \t\t\t%d",
+bpf->peir_mantissa, bpf->cbs_exponent);
+   plt_dump("W0: cir_exponent \t\t\t%d\nW0: pebs_exponent \t\t\t%d",
+bpf->cir_exponent, bpf->pebs_exponent);
+   plt_dump("W0: peir_exponent \t\t\t%d\n", bpf->peir_exponent);
+   plt_dump("W0: tnl_ena \t\t\t%d\n", bpf->tnl_ena);
+   plt_dump("W0: icolor \t\t\t%d\n", bpf->icolor);
+   plt_dump("W0: pc_mode \t\t\t%d\n", bpf->pc_mode);
+   plt_dump("W1: hl_en \t\t%d\nW1: band_prof_id \t\t%d", bpf->hl_en,
+bpf->band_prof_id);
+   plt_dump("W1: meter_algo \t\t%d\nW1: rc_action \t\t%d", bpf->meter_algo,
+bpf->rc_action);
+   plt_dump("W1: yc_action \t\t\t%d\nW1: gc_action \t\t\t%d",
+bpf->yc_action, bpf->gc_action);
+   plt_dump("W1: adjust_mantissa\t\t\t%d\nW1: adjust_exponent \t\t\t%d",
+bpf->adjust_mantissa, bpf->adjust_exponent);
+   plt_dump("W1: rdiv \t\t\t%d\n", bpf->rdiv);
+   plt_dump("W1: l_select \t\t%d\nW2: lmode \t\t%d", bpf->l_sellect,
+bpf->lmode);
+   plt_dump("W1: cbs_mantissa \t\t\t%d\n", bpf->cbs_mantissa);
+   plt_dump("W2: tsa \t\t\t0x%" PRIx64 "\n", (uint64_t)bpf->ts);
+   plt_dump("W3: c_accum \t\t%d\nW3: pe_accum \t\t%d", bpf->c_accum,
+bpf->pe_accum);
+   plt_dump("W4: green_pkt_pass \t\t\t0x%" PRIx64 "",
+(uint64_t)bpf->green_pkt_pass);
+   plt_dump("W5: yellow_pkt_pass \t\t\t0x%" PRIx64 "",
+(uint64_t)bpf->yellow_pkt_pass);
+   plt_dump("W6: red_pkt_pass \t\t\t0x%" PRIx64 "",
+(uint64_t)bpf->red_pkt_pass);
+   plt_dump("W7: green_octs_pass \t\t\t0x%" PRIx64 "",
+(uint64_t)bpf->green_octs_pass);
+   plt_dump("W8: yellow_octs_pass \t\t\t0x%" PRIx64 "",
+(uint64_t)bpf->yellow_octs_pass);
+   plt_dump("W9: red_octs_pass \t\t\t0x%" PRIx64 "",
+(uint64_t)bpf->red_octs_pass);
+   plt_dump("W10: green_pkt_drop \t\t\t0x%" PRIx64 "",
+(uint64_t)bpf->green_pkt_drop);
+   plt_dump("W11: yellow_pkt_drop \t\t\t0x%" PRIx64 "",
+(uint64_t)bpf->yellow_pkt_drop);
+   plt_dump("W12: red_pkt_drop \t\t\t0x%" PRIx64 "",
+(uint64_t)bpf->red_pkt_drop);
+   plt_dump("W13: green_octs_drop \t\t\t0x%" PRIx64 "",
+(uint64_t)bpf->green_octs_drop);
+   plt_dump("W14: yellow_octs_drop \t\t\t0x%" PRIx64 "",
+(uint64_t)bpf->yellow_octs_drop);
+   plt_dump("W15: red_octs_drop \t\t\t0x%" PRIx64 "",
+(uint64_t)bpf->red_octs_drop);
+}
+
 uint8_t
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)
 {
@@ -480,3 +534,35 @@ roc_nix_bpf_ena_dis(struct roc_nix *roc_nix, uint16_t id, 
struct roc_nix_rq *rq,
 exit:
return rc;
 }
+
+int
+roc_nix_bpf_dump(struct roc_nix *roc_nix, uint16_t id,
+enum roc_nix_bpf_level_flag lvl_flag)
+{
+   struct mbox *mbox = get_mbox(roc_nix);
+   struct nix_cn10k_aq_enq_rsp *rsp;
+   struct nix_cn10k_aq_enq_req *aq;
+   uint8_t level_idx;
+   int rc;
+
+   if (roc_model_is_cn9k())
+   return NIX_ERR_HW_NOTSUP;
+
+   level_idx =

[dpdk-dev] [PATCH v2 09/27] common/cnxk: support RoC API to setup precolor table

2021-09-27 Thread skori

From: Sunil Kumar Kori 

For initial coloring of input packet, CN10K platform maintains
precolor table for VLAN, DSCP and Generic. Implement RoC
interface to setup pre color table.

Signed-off-by: Sunil Kumar Kori 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/common/cnxk/roc_nix.h |  20 
 drivers/common/cnxk/roc_nix_bpf.c | 193 ++
 drivers/common/cnxk/version.map   |   1 +
 3 files changed, 214 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index de8d41e42e..4090826a03 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -87,6 +87,15 @@ enum roc_nix_bpf_level_flag {
ROC_NIX_BPF_LEVEL_F_TOP = BIT(2),
 };
 
+enum roc_nix_bpf_pc_mode {
+   ROC_NIX_BPF_PC_MODE_VLAN_INNER,
+   ROC_NIX_BPF_PC_MODE_VLAN_OUTER,
+   ROC_NIX_BPF_PC_MODE_DSCP_INNER,
+   ROC_NIX_BPF_PC_MODE_DSCP_OUTER,
+   ROC_NIX_BPF_PC_MODE_GEN_INNER,
+   ROC_NIX_BPF_PC_MODE_GEN_OUTER
+};
+
 enum roc_nix_bpf_color {
ROC_NIX_BPF_COLOR_GREEN,
ROC_NIX_BPF_COLOR_YELLOW,
@@ -149,6 +158,13 @@ struct roc_nix_bpf_objs {
uint16_t ids[ROC_NIX_BPF_PER_PFFUNC];
 };
 
+struct roc_nix_bpf_precolor {
+#define ROC_NIX_BPF_PRE_COLOR_MAX 64
+   uint8_t count;
+   enum roc_nix_bpf_pc_mode mode;
+   enum roc_nix_bpf_color color[ROC_NIX_BPF_PRE_COLOR_MAX];
+};
+
 struct roc_nix_vlan_config {
uint32_t type;
union {
@@ -614,6 +630,10 @@ int __roc_api roc_nix_bpf_ena_dis(struct roc_nix *roc_nix, 
uint16_t id,
 int __roc_api roc_nix_bpf_dump(struct roc_nix *roc_nix, uint16_t id,
   enum roc_nix_bpf_level_flag lvl_flag);
 
+int __roc_api roc_nix_bpf_pre_color_tbl_setup(
+   struct roc_nix *roc_nix, uint16_t id,
+   enum roc_nix_bpf_level_flag lvl_flag, struct roc_nix_bpf_precolor *tbl);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c 
b/drivers/common/cnxk/roc_nix_bpf.c
index 1e495159f4..5099d22570 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -9,6 +9,10 @@
 #define NIX_MAX_BPF_COUNT_MID_LAYER  8
 #define NIX_MAX_BPF_COUNT_TOP_LAYER  1
 
+#define NIX_BPF_PRECOLOR_GEN_TABLE_SIZE 16
+#define NIX_BPF_PRECOLOR_VLAN_TABLE_SIZE 16
+#define NIX_BPF_PRECOLOR_DSCP_TABLE_SIZE 64
+
 #define NIX_BPF_LEVEL_F_MASK   
\
(ROC_NIX_BPF_LEVEL_F_LEAF | ROC_NIX_BPF_LEVEL_F_MID |  \
 ROC_NIX_BPF_LEVEL_F_TOP)
@@ -177,6 +181,107 @@ nix_lf_bpf_dump(__io struct nix_band_prof_s *bpf)
 (uint64_t)bpf->red_octs_drop);
 }
 
+static inline void
+nix_precolor_conv_table_write(struct roc_nix *roc_nix, uint64_t val,
+ uint32_t off)
+{
+   struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+   int64_t *addr;
+
+   addr = PLT_PTR_ADD(nix->base, off);
+   /* FIXME: Currently writing to this register throwing kernel dump.
+* plt_write64(val, addr);
+*/
+   PLT_SET_USED(val);
+   PLT_SET_USED(addr);
+}
+
+static uint8_t
+nix_precolor_vlan_table_update(struct roc_nix *roc_nix,
+  struct roc_nix_bpf_precolor *tbl)
+{
+   uint64_t val = 0, i;
+   uint8_t tn_ena;
+   uint32_t off;
+
+   for (i = 0; i < tbl->count; i++)
+   val |= (((uint64_t)tbl->color[i]) << (2 * i));
+
+   if (tbl->mode == ROC_NIX_BPF_PC_MODE_VLAN_INNER) {
+   off = NIX_LF_RX_VLAN1_COLOR_CONV;
+   tn_ena = true;
+   } else {
+   off = NIX_LF_RX_VLAN0_COLOR_CONV;
+   tn_ena = false;
+   }
+
+   nix_precolor_conv_table_write(roc_nix, val, off);
+   return tn_ena;
+}
+
+static uint8_t
+nix_precolor_inner_dscp_table_update(struct roc_nix *roc_nix,
+struct roc_nix_bpf_precolor *tbl)
+{
+   uint64_t val_lo = 0, val_hi = 0, i, j;
+
+   for (i = 0, j = 0; i < (tbl->count / 2); i++, j++)
+   val_lo |= (((uint64_t)tbl->color[i]) << (2 * j));
+
+   for (j = 0; i < tbl->count; i++, j++)
+   val_hi |= (((uint64_t)tbl->color[i]) << (2 * j));
+
+   nix_precolor_conv_table_write(roc_nix, val_lo,
+ NIX_LF_RX_IIP_COLOR_CONV_LO);
+   nix_precolor_conv_table_write(roc_nix, val_hi,
+ NIX_LF_RX_IIP_COLOR_CONV_HI);
+
+   return true;
+}
+
+static uint8_t
+nix_precolor_outer_dscp_table_update(struct roc_nix *roc_nix,
+struct roc_nix_bpf_precolor *tbl)
+{
+   uint64_t val_lo = 0, val_hi = 0, i, j;
+
+   for (i = 0, j = 0; i < (tbl->count / 2); i++, j++)
+   val_lo |= (((uint64_t)tbl->color[i]) << (2 * j));
+
+   for (j = 0; i < tbl->c

[dpdk-dev] [PATCH v2 10/27] common/cnxk: support RoC API to connect bandwidth profiles

2021-09-27 Thread skori

From: Sunil Kumar Kori 

To maintain chain of bandwidth profiles, they needs to be
connected. Implement RoC API to connect two bandwidth profiles
at different levels.

Signed-off-by: Sunil Kumar Kori 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/common/cnxk/roc_nix.h |  6 ++
 drivers/common/cnxk/roc_nix_bpf.c | 36 +++
 drivers/common/cnxk/version.map   |  1 +
 3 files changed, 43 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 4090826a03..ec279f1f6c 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -7,6 +7,7 @@
 
 /* Constants */
 #define ROC_NIX_BPF_PER_PFFUNC   64
+#define ROC_NIX_BPF_ID_INVALID   0x
 #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF
 #define ROC_NIX_BPF_LEVEL_MAX3
 
@@ -634,6 +635,11 @@ int __roc_api roc_nix_bpf_pre_color_tbl_setup(
struct roc_nix *roc_nix, uint16_t id,
enum roc_nix_bpf_level_flag lvl_flag, struct roc_nix_bpf_precolor *tbl);
 
+/* Use ROC_NIX_BPF_ID_INVALID as dst_id to disconnect */
+int __roc_api roc_nix_bpf_connect(struct roc_nix *roc_nix,
+ enum roc_nix_bpf_level_flag lvl_flag,
+ uint16_t src_id, uint16_t dst_id);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c 
b/drivers/common/cnxk/roc_nix_bpf.c
index 5099d22570..579ea9b81c 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -759,3 +759,39 @@ roc_nix_bpf_pre_color_tbl_setup(struct roc_nix *roc_nix, 
uint16_t id,
 exit:
return rc;
 }
+
+int
+roc_nix_bpf_connect(struct roc_nix *roc_nix,
+   enum roc_nix_bpf_level_flag lvl_flag, uint16_t src_id,
+   uint16_t dst_id)
+{
+   struct mbox *mbox = get_mbox(roc_nix);
+   struct nix_cn10k_aq_enq_req *aq;
+   uint8_t level_idx;
+
+   if (roc_model_is_cn9k())
+   return NIX_ERR_HW_NOTSUP;
+
+   level_idx = roc_nix_bpf_level_to_idx(lvl_flag);
+   if (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID)
+   return NIX_ERR_PARAM;
+
+   aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+   if (aq == NULL)
+   return -ENOSPC;
+   aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14) | src_id;
+   aq->ctype = NIX_AQ_CTYPE_BAND_PROF;
+   aq->op = NIX_AQ_INSTOP_WRITE;
+
+   if (dst_id == ROC_NIX_BPF_ID_INVALID) {
+   aq->prof.hl_en = false;
+   aq->prof_mask.hl_en = ~(aq->prof_mask.hl_en);
+   } else {
+   aq->prof.hl_en = true;
+   aq->prof.band_prof_id = dst_id;
+   aq->prof_mask.hl_en = ~(aq->prof_mask.hl_en);
+   aq->prof_mask.band_prof_id = ~(aq->prof_mask.band_prof_id);
+   }
+
+   return mbox_process(mbox);
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index a08fbe6013..c04a8ca9da 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -79,6 +79,7 @@ INTERNAL {
roc_se_ciph_key_set;
roc_nix_bpf_alloc;
roc_nix_bpf_config;
+   roc_nix_bpf_connect;
roc_nix_bpf_count_get;
roc_nix_bpf_dump;
roc_nix_bpf_ena_dis;
-- 
2.25.1

[dpdk-dev] [PATCH v2 11/27] common/cnxk: support RoC API to get stats to index

2021-09-27 Thread skori

From: Sunil Kumar Kori 

CN10K platform supports different stats for HW bandwidth profiles.
Implement RoC API to get index for given stats type.

Signed-off-by: Sunil Kumar Kori 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/common/cnxk/roc_nix.h | 18 
 drivers/common/cnxk/roc_nix_bpf.c | 34 +++
 drivers/common/cnxk/version.map   |  1 +
 3 files changed, 53 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index ec279f1f6c..cb465959b8 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -10,6 +10,7 @@
 #define ROC_NIX_BPF_ID_INVALID   0x
 #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF
 #define ROC_NIX_BPF_LEVEL_MAX3
+#define ROC_NIX_BPF_STATS_MAX12
 
 /** NIX rate limits */
 #define MAX_RATE_DIV_EXP  12
@@ -119,6 +120,21 @@ enum roc_nix_bpf_action {
ROC_NIX_BPF_ACTION_RED
 };
 
+enum roc_nix_bpf_stats {
+   ROC_NIX_BPF_GREEN_PKT_F_PASS = BIT_ULL(0),
+   ROC_NIX_BPF_GREEN_OCTS_F_PASS = BIT_ULL(1),
+   ROC_NIX_BPF_GREEN_PKT_F_DROP = BIT_ULL(2),
+   ROC_NIX_BPF_GREEN_OCTS_F_DROP = BIT_ULL(3),
+   ROC_NIX_BPF_YELLOW_PKT_F_PASS = BIT_ULL(4),
+   ROC_NIX_BPF_YELLOW_OCTS_F_PASS = BIT_ULL(5),
+   ROC_NIX_BPF_YELLOW_PKT_F_DROP = BIT_ULL(6),
+   ROC_NIX_BPF_YELLOW_OCTS_F_DROP = BIT_ULL(7),
+   ROC_NIX_BPF_RED_PKT_F_PASS = BIT_ULL(8),
+   ROC_NIX_BPF_RED_OCTS_F_PASS = BIT_ULL(9),
+   ROC_NIX_BPF_RED_PKT_F_DROP = BIT_ULL(10),
+   ROC_NIX_BPF_RED_OCTS_F_DROP = BIT_ULL(11),
+};
+
 struct roc_nix_bpf_cfg {
enum roc_nix_bpf_algo alg;
enum roc_nix_bpf_lmode lmode;
@@ -643,6 +659,8 @@ int __roc_api roc_nix_bpf_connect(struct roc_nix *roc_nix,
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
+uint8_t __roc_api roc_nix_bpf_stats_to_idx(enum roc_nix_bpf_stats lvl_flag);
+
 /* MAC */
 int __roc_api roc_nix_mac_rxtx_start_stop(struct roc_nix *roc_nix, bool start);
 int __roc_api roc_nix_mac_link_event_start_stop(struct roc_nix *roc_nix,
diff --git a/drivers/common/cnxk/roc_nix_bpf.c 
b/drivers/common/cnxk/roc_nix_bpf.c
index 579ea9b81c..5d39f26add 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -298,6 +298,40 @@ roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag 
level_f)
return idx;
 }
 
+uint8_t
+roc_nix_bpf_stats_to_idx(enum roc_nix_bpf_stats level_f)
+{
+   uint8_t idx;
+
+   if (level_f & ROC_NIX_BPF_GREEN_PKT_F_PASS)
+   idx = 0;
+   else if (level_f & ROC_NIX_BPF_GREEN_OCTS_F_PASS)
+   idx = 1;
+   else if (level_f & ROC_NIX_BPF_GREEN_PKT_F_DROP)
+   idx = 2;
+   else if (level_f & ROC_NIX_BPF_GREEN_OCTS_F_DROP)
+   idx = 3;
+   else if (level_f & ROC_NIX_BPF_YELLOW_PKT_F_PASS)
+   idx = 4;
+   else if (level_f & ROC_NIX_BPF_YELLOW_OCTS_F_PASS)
+   idx = 5;
+   else if (level_f & ROC_NIX_BPF_YELLOW_PKT_F_DROP)
+   idx = 6;
+   else if (level_f & ROC_NIX_BPF_YELLOW_OCTS_F_DROP)
+   idx = 7;
+   else if (level_f & ROC_NIX_BPF_RED_PKT_F_PASS)
+   idx = 8;
+   else if (level_f & ROC_NIX_BPF_RED_OCTS_F_PASS)
+   idx = 9;
+   else if (level_f & ROC_NIX_BPF_RED_PKT_F_DROP)
+   idx = 10;
+   else if (level_f & ROC_NIX_BPF_RED_OCTS_F_DROP)
+   idx = 11;
+   else
+   idx = ROC_NIX_BPF_STATS_MAX;
+   return idx;
+}
+
 int
 roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask,
  uint16_t count[ROC_NIX_BPF_LEVEL_MAX])
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index c04a8ca9da..5d4bdd57a9 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -87,6 +87,7 @@ INTERNAL {
roc_nix_bpf_free_all;
roc_nix_bpf_level_to_idx;
roc_nix_bpf_pre_color_tbl_setup;
+   roc_nix_bpf_stats_to_idx;
roc_nix_cq_dump;
roc_nix_cq_fini;
roc_nix_cq_init;
-- 
2.25.1

[dpdk-dev] [PATCH v2 12/27] common/cnxk: support RoC API to read profile statistics

2021-09-27 Thread skori

From: Sunil Kumar Kori 

CN10K platform provides statistics per bandwidth profile and
per nixlf. Implement RoC API to read stats for given bandwidth
profile.

Signed-off-by: Sunil Kumar Kori 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/common/cnxk/roc_nix.h |   9 ++
 drivers/common/cnxk/roc_nix_bpf.c | 197 ++
 drivers/common/cnxk/version.map   |   2 +
 3 files changed, 208 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index cb465959b8..1ad8a0ca04 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -656,6 +656,15 @@ int __roc_api roc_nix_bpf_connect(struct roc_nix *roc_nix,
  enum roc_nix_bpf_level_flag lvl_flag,
  uint16_t src_id, uint16_t dst_id);
 
+int __roc_api
+roc_nix_bpf_stats_read(struct roc_nix *roc_nix, uint16_t id, uint64_t mask,
+  enum roc_nix_bpf_level_flag lvl_flag,
+  uint64_t stats[ROC_NIX_BPF_STATS_MAX] /* Out */);
+
+int __roc_api
+roc_nix_bpf_lf_stats_read(struct roc_nix *roc_nix, uint64_t mask,
+ uint64_t stats[ROC_NIX_BPF_STATS_MAX] /* Out */);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c 
b/drivers/common/cnxk/roc_nix_bpf.c
index 5d39f26add..137d2260bb 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -17,6 +17,9 @@
(ROC_NIX_BPF_LEVEL_F_LEAF | ROC_NIX_BPF_LEVEL_F_MID |  \
 ROC_NIX_BPF_LEVEL_F_TOP)
 
+#define NIX_RD_STATS(val)  plt_read64(nix->base + NIX_LF_RX_STATX(val))
+#define NIX_RST_STATS(val) plt_write64(0, nix->base + NIX_LF_RX_STATX(val))
+
 static uint8_t sw_to_hw_lvl_map[] = {NIX_RX_BAND_PROF_LAYER_LEAF,
 NIX_RX_BAND_PROF_LAYER_MIDDLE,
 NIX_RX_BAND_PROF_LAYER_TOP};
@@ -829,3 +832,197 @@ roc_nix_bpf_connect(struct roc_nix *roc_nix,
 
return mbox_process(mbox);
 }
+
+int
+roc_nix_bpf_stats_read(struct roc_nix *roc_nix, uint16_t id, uint64_t mask,
+  enum roc_nix_bpf_level_flag lvl_flag,
+  uint64_t stats[ROC_NIX_BPF_STATS_MAX])
+{
+   uint8_t yellow_pkt_pass, yellow_octs_pass, yellow_pkt_drop;
+   uint8_t green_octs_drop, yellow_octs_drop, red_octs_drop;
+   uint8_t green_pkt_pass, green_octs_pass, green_pkt_drop;
+   uint8_t red_pkt_pass, red_octs_pass, red_pkt_drop;
+   struct mbox *mbox = get_mbox(roc_nix);
+   struct nix_cn10k_aq_enq_rsp *rsp;
+   struct nix_cn10k_aq_enq_req *aq;
+   uint8_t level_idx;
+   int rc;
+
+   if (roc_model_is_cn9k())
+   return NIX_ERR_HW_NOTSUP;
+
+   level_idx = roc_nix_bpf_level_to_idx(lvl_flag);
+   if (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID)
+   return NIX_ERR_PARAM;
+
+   aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+   if (aq == NULL)
+   return -ENOSPC;
+   aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14 | id);
+   aq->ctype = NIX_AQ_CTYPE_BAND_PROF;
+   aq->op = NIX_AQ_INSTOP_READ;
+   rc = mbox_process_msg(mbox, (void *)&rsp);
+   if (rc)
+   return rc;
+
+   green_pkt_pass =
+   roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_GREEN_PKT_F_PASS);
+   green_octs_pass =
+   roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_GREEN_OCTS_F_PASS);
+   green_pkt_drop =
+   roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_GREEN_PKT_F_DROP);
+   green_octs_drop =
+   roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_GREEN_OCTS_F_DROP);
+   yellow_pkt_pass =
+   roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_YELLOW_PKT_F_PASS);
+   yellow_octs_pass =
+   roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_YELLOW_OCTS_F_PASS);
+   yellow_pkt_drop =
+   roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_YELLOW_PKT_F_DROP);
+   yellow_octs_drop =
+   roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_YELLOW_OCTS_F_DROP);
+   red_pkt_pass =
+   roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_RED_PKT_F_PASS);
+   red_octs_pass =
+   roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_RED_OCTS_F_PASS);
+   red_pkt_drop =
+   roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_RED_PKT_F_DROP);
+   red_octs_drop =
+   roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_RED_OCTS_F_DROP);
+
+   if (green_pkt_pass != ROC_NIX_BPF_STATS_MAX)
+   stats[green_pkt_pass] = rsp->prof.green_pkt_pass;
+
+   if (green_octs_pass != ROC_NIX_BPF_STATS_MAX)
+   stats[green_octs_pass] = rsp->prof.green_octs_pass;
+
+   if (green_pkt_drop != ROC_NIX_BPF_STATS_MAX)
+   stats[green_pkt_drop] =

[dpdk-dev] [PATCH v2 13/27] common/cnxk: support RoC API to reset profile stats

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement RoC API to reset stats per bandwidth profile
or per nixlf.

Signed-off-by: Sunil Kumar Kori 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/common/cnxk/roc_nix.h |   7 ++
 drivers/common/cnxk/roc_nix_bpf.c | 113 ++
 drivers/common/cnxk/version.map   |   2 +
 3 files changed, 122 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 1ad8a0ca04..c1a561928e 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -661,10 +661,17 @@ roc_nix_bpf_stats_read(struct roc_nix *roc_nix, uint16_t 
id, uint64_t mask,
   enum roc_nix_bpf_level_flag lvl_flag,
   uint64_t stats[ROC_NIX_BPF_STATS_MAX] /* Out */);
 
+int __roc_api roc_nix_bpf_stats_reset(struct roc_nix *roc_nix, uint16_t id,
+ uint64_t mask,
+ enum roc_nix_bpf_level_flag lvl_flag);
+
 int __roc_api
 roc_nix_bpf_lf_stats_read(struct roc_nix *roc_nix, uint64_t mask,
  uint64_t stats[ROC_NIX_BPF_STATS_MAX] /* Out */);
 
+int __roc_api roc_nix_bpf_lf_stats_reset(struct roc_nix *roc_nix,
+uint64_t mask);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c 
b/drivers/common/cnxk/roc_nix_bpf.c
index 137d2260bb..220d78ed84 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -929,6 +929,86 @@ roc_nix_bpf_stats_read(struct roc_nix *roc_nix, uint16_t 
id, uint64_t mask,
return 0;
 }
 
+int
+roc_nix_bpf_stats_reset(struct roc_nix *roc_nix, uint16_t id, uint64_t mask,
+   enum roc_nix_bpf_level_flag lvl_flag)
+{
+   struct mbox *mbox = get_mbox(roc_nix);
+   struct nix_cn10k_aq_enq_req *aq;
+   uint8_t level_idx;
+
+   if (roc_model_is_cn9k())
+   return NIX_ERR_HW_NOTSUP;
+
+   level_idx = roc_nix_bpf_level_to_idx(lvl_flag);
+   if (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID)
+   return NIX_ERR_PARAM;
+
+   aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+   if (aq == NULL)
+   return -ENOSPC;
+   aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14 | id);
+   aq->ctype = NIX_AQ_CTYPE_BAND_PROF;
+   aq->op = NIX_AQ_INSTOP_WRITE;
+
+   if (mask & ROC_NIX_BPF_GREEN_PKT_F_PASS) {
+   aq->prof.green_pkt_pass = 0;
+   aq->prof_mask.green_pkt_pass = ~(aq->prof_mask.green_pkt_pass);
+   }
+   if (mask & ROC_NIX_BPF_GREEN_OCTS_F_PASS) {
+   aq->prof.green_octs_pass = 0;
+   aq->prof_mask.green_octs_pass =
+   ~(aq->prof_mask.green_octs_pass);
+   }
+   if (mask & ROC_NIX_BPF_GREEN_PKT_F_DROP) {
+   aq->prof.green_pkt_drop = 0;
+   aq->prof_mask.green_pkt_drop = ~(aq->prof_mask.green_pkt_drop);
+   }
+   if (mask & ROC_NIX_BPF_GREEN_OCTS_F_DROP) {
+   aq->prof.green_octs_drop = 0;
+   aq->prof_mask.green_octs_drop =
+   ~(aq->prof_mask.green_octs_drop);
+   }
+   if (mask & ROC_NIX_BPF_YELLOW_PKT_F_PASS) {
+   aq->prof.yellow_pkt_pass = 0;
+   aq->prof_mask.yellow_pkt_pass =
+   ~(aq->prof_mask.yellow_pkt_pass);
+   }
+   if (mask & ROC_NIX_BPF_YELLOW_OCTS_F_PASS) {
+   aq->prof.yellow_octs_pass = 0;
+   aq->prof_mask.yellow_octs_pass =
+   ~(aq->prof_mask.yellow_octs_pass);
+   }
+   if (mask & ROC_NIX_BPF_YELLOW_PKT_F_DROP) {
+   aq->prof.yellow_pkt_drop = 0;
+   aq->prof_mask.yellow_pkt_drop =
+   ~(aq->prof_mask.yellow_pkt_drop);
+   }
+   if (mask & ROC_NIX_BPF_YELLOW_OCTS_F_DROP) {
+   aq->prof.yellow_octs_drop = 0;
+   aq->prof_mask.yellow_octs_drop =
+   ~(aq->prof_mask.yellow_octs_drop);
+   }
+   if (mask & ROC_NIX_BPF_RED_PKT_F_PASS) {
+   aq->prof.red_pkt_pass = 0;
+   aq->prof_mask.red_pkt_pass = ~(aq->prof_mask.red_pkt_pass);
+   }
+   if (mask & ROC_NIX_BPF_RED_OCTS_F_PASS) {
+   aq->prof.red_octs_pass = 0;
+   aq->prof_mask.red_octs_pass = ~(aq->prof_mask.red_octs_pass);
+   }
+   if (mask & ROC_NIX_BPF_RED_PKT_F_DROP) {
+   aq->prof.red_pkt_drop = 0;
+   aq->prof_mask.red_pkt_drop = ~(aq->prof_mask.red_pkt_drop);
+   }
+   if (mask & ROC_NIX_BPF_RED_OCTS_F_DROP) {
+   aq->prof.red_octs_drop = 0;
+   aq->prof_mask.red_octs_drop = ~(aq->prof_mask.red_octs_drop);
+   }
+
+   return mbox_process(mbox);
+}
+
 int
 roc_nix_bpf_lf_stats_read(struct roc_nix *roc_nix,

[dpdk-dev] [PATCH v2 14/27] common/cnxk: support meter in action list

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Meter action is added in supported action list.

Signed-off-by: Sunil Kumar Kori 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/common/cnxk/roc_npc.c | 3 +++
 drivers/common/cnxk/roc_npc.h | 7 ++-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c
index 52a54b3990..8f88e254b3 100644
--- a/drivers/common/cnxk/roc_npc.c
+++ b/drivers/common/cnxk/roc_npc.c
@@ -447,6 +447,9 @@ npc_parse_actions(struct npc *npc, const struct 
roc_npc_attr *attr,
case ROC_NPC_ACTION_TYPE_VLAN_PCP_INSERT:
req_act |= ROC_NPC_ACTION_TYPE_VLAN_PCP_INSERT;
break;
+   case ROC_NPC_ACTION_TYPE_METER:
+   req_act |= ROC_NPC_ACTION_TYPE_METER;
+   break;
default:
errcode = NPC_ERR_ACTION_NOTSUP;
goto err_exit;
diff --git a/drivers/common/cnxk/roc_npc.h b/drivers/common/cnxk/roc_npc.h
index 4d6f8f8cd9..86365df754 100644
--- a/drivers/common/cnxk/roc_npc.h
+++ b/drivers/common/cnxk/roc_npc.h
@@ -58,7 +58,7 @@ struct roc_npc_flow_item_raw {
const uint8_t *pattern; /**< Byte string to look for. */
 };
 
-#define ROC_NPC_MAX_ACTION_COUNT 12
+#define ROC_NPC_MAX_ACTION_COUNT 17
 
 enum roc_npc_action_type {
ROC_NPC_ACTION_TYPE_END = (1 << 0),
@@ -77,6 +77,7 @@ enum roc_npc_action_type {
ROC_NPC_ACTION_TYPE_VLAN_INSERT = (1 << 13),
ROC_NPC_ACTION_TYPE_VLAN_ETHTYPE_INSERT = (1 << 14),
ROC_NPC_ACTION_TYPE_VLAN_PCP_INSERT = (1 << 15),
+   ROC_NPC_ACTION_TYPE_METER = (1 << 16),
 };
 
 struct roc_npc_action {
@@ -110,6 +111,10 @@ struct roc_npc_action_of_set_vlan_pcp {
uint8_t vlan_pcp; /**< VLAN priority. */
 };
 
+struct roc_npc_action_meter {
+   uint32_t mtr_id; /**< Meter id to be applied. > */
+};
+
 struct roc_npc_attr {
uint32_t priority;  /**< Rule priority level within group. */
uint32_t ingress : 1;   /**< Rule applies to ingress traffic. */
-- 
2.25.1

[dpdk-dev] [PATCH v2 15/27] net/cnxk: support meter ops get API

2021-09-27 Thread skori

From: Sunil Kumar Kori 

To enable support for ingress meter, supported operations
are exposed for CN10K platform.

Signed-off-by: Sunil Kumar Kori 
Signed-off-by: Rakesh Kudurumalla 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/net/cnxk/cn10k_ethdev.c |  1 +
 drivers/net/cnxk/cn10k_ethdev.h |  2 ++
 drivers/net/cnxk/cn10k_ethdev_mtr.c | 18 ++
 drivers/net/cnxk/meson.build|  1 +
 4 files changed, 22 insertions(+)
 create mode 100644 drivers/net/cnxk/cn10k_ethdev_mtr.c

diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c
index 7caec6cf14..8c1f6a4408 100644
--- a/drivers/net/cnxk/cn10k_ethdev.c
+++ b/drivers/net/cnxk/cn10k_ethdev.c
@@ -457,6 +457,7 @@ nix_eth_dev_ops_override(void)
cnxk_eth_dev_ops.dev_ptypes_set = cn10k_nix_ptypes_set;
cnxk_eth_dev_ops.timesync_enable = cn10k_nix_timesync_enable;
cnxk_eth_dev_ops.timesync_disable = cn10k_nix_timesync_disable;
+   cnxk_eth_dev_ops.mtr_ops_get = cn10k_nix_mtr_ops_get;
 }
 
 static void
diff --git a/drivers/net/cnxk/cn10k_ethdev.h b/drivers/net/cnxk/cn10k_ethdev.h
index 8b6e0f2b3f..117aa2a62d 100644
--- a/drivers/net/cnxk/cn10k_ethdev.h
+++ b/drivers/net/cnxk/cn10k_ethdev.h
@@ -38,4 +38,6 @@ struct cn10k_eth_rxq {
 void cn10k_eth_set_rx_function(struct rte_eth_dev *eth_dev);
 void cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev);
 
+/* MTR */
+int cn10k_nix_mtr_ops_get(struct rte_eth_dev *dev, void *ops);
 #endif /* __CN10K_ETHDEV_H__ */
diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c 
b/drivers/net/cnxk/cn10k_ethdev_mtr.c
new file mode 100644
index 00..9b46032858
--- /dev/null
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include "cn10k_ethdev.h"
+#include 
+
+const struct rte_mtr_ops nix_mtr_ops = {
+};
+
+int
+cn10k_nix_mtr_ops_get(struct rte_eth_dev *dev, void *ops)
+{
+   RTE_SET_USED(dev);
+
+   *(const void **)ops = &nix_mtr_ops;
+   return 0;
+}
diff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build
index d4cdd1744a..91afc1de4c 100644
--- a/drivers/net/cnxk/meson.build
+++ b/drivers/net/cnxk/meson.build
@@ -35,6 +35,7 @@ sources += files(
 # CN10K
 sources += files(
 'cn10k_ethdev.c',
+'cn10k_ethdev_mtr.c',
 'cn10k_rte_flow.c',
 'cn10k_rx.c',
 'cn10k_rx_mseg.c',
-- 
2.25.1

[dpdk-dev] [PATCH v2 16/27] net/cnxk: support ops to get meter capabilities

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement ethdev operation to get meter capabilities for
CN10K platform.

Signed-off-by: Sunil Kumar Kori 
Signed-off-by: Rakesh Kudurumalla 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/net/cnxk/cn10k_ethdev_mtr.c | 48 +
 1 file changed, 48 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c 
b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 9b46032858..f87871f149 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -5,7 +5,55 @@
 #include "cn10k_ethdev.h"
 #include 
 
+#define NIX_MTR_COUNT_MAX  73 /* 64(leaf) + 8(mid) + 1(top) */
+#define NIX_MTR_COUNT_PER_FLOW 3  /* 1(leaf) + 1(mid) + 1(top) */
+
+static struct rte_mtr_capabilities mtr_capa = {
+   .n_max = NIX_MTR_COUNT_MAX,
+   .n_shared_max = NIX_MTR_COUNT_PER_FLOW,
+   /* .identical = , */
+   .shared_identical = true,
+   /* .shared_n_flows_per_mtr_max = ,*/
+   .chaining_n_mtrs_per_flow_max = NIX_MTR_COUNT_PER_FLOW,
+   .chaining_use_prev_mtr_color_supported = true,
+   .chaining_use_prev_mtr_color_enforced = true,
+   .meter_srtcm_rfc2697_n_max = NIX_MTR_COUNT_MAX,
+   .meter_trtcm_rfc2698_n_max = NIX_MTR_COUNT_MAX,
+   .meter_trtcm_rfc4115_n_max = NIX_MTR_COUNT_MAX,
+   .meter_rate_max = ROC_NIX_BPF_RATE_MAX / 8, /* Bytes per second */
+   .meter_policy_n_max = NIX_MTR_COUNT_MAX,
+   .color_aware_srtcm_rfc2697_supported = true,
+   .color_aware_trtcm_rfc2698_supported = true,
+   .color_aware_trtcm_rfc4115_supported = true,
+   .srtcm_rfc2697_byte_mode_supported = true,
+   .srtcm_rfc2697_packet_mode_supported = true,
+   .trtcm_rfc2698_byte_mode_supported = true,
+   .trtcm_rfc2698_packet_mode_supported = true,
+   .trtcm_rfc4115_byte_mode_supported = true,
+   .trtcm_rfc4115_packet_mode_supported = true,
+   .stats_mask = RTE_MTR_STATS_N_PKTS_GREEN | RTE_MTR_STATS_N_PKTS_YELLOW |
+ RTE_MTR_STATS_N_PKTS_RED | RTE_MTR_STATS_N_PKTS_DROPPED |
+ RTE_MTR_STATS_N_BYTES_GREEN |
+ RTE_MTR_STATS_N_BYTES_YELLOW | RTE_MTR_STATS_N_BYTES_RED |
+ RTE_MTR_STATS_N_BYTES_DROPPED};
+
+static int
+cn10k_nix_mtr_capabilities_get(struct rte_eth_dev *dev,
+  struct rte_mtr_capabilities *capa,
+  struct rte_mtr_error *error)
+{
+   RTE_SET_USED(dev);
+
+   if (!capa)
+   return -rte_mtr_error_set(error, EINVAL,
+ RTE_MTR_ERROR_TYPE_MTR_PARAMS, NULL,
+ "NULL input parameter");
+   *capa = mtr_capa;
+   return 0;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
+   .capabilities_get = cn10k_nix_mtr_capabilities_get,
 };
 
 int
-- 
2.25.1

[dpdk-dev] [PATCH v2 17/27] net/cnxk: support ops to create meter profile

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement API to add meter profile for CN10K platform.

Signed-off-by: Sunil Kumar Kori 
Signed-off-by: Rakesh Kudurumalla 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/net/cnxk/cn10k_ethdev_mtr.c | 138 
 drivers/net/cnxk/cnxk_ethdev.c  |  14 +++
 drivers/net/cnxk/cnxk_ethdev.h  |  13 +++
 3 files changed, 165 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c 
b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index f87871f149..dadfd1c0ff 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -37,6 +37,106 @@ static struct rte_mtr_capabilities mtr_capa = {
  RTE_MTR_STATS_N_BYTES_YELLOW | RTE_MTR_STATS_N_BYTES_RED |
  RTE_MTR_STATS_N_BYTES_DROPPED};
 
+static struct cnxk_mtr_profile_node *
+nix_mtr_profile_find(struct cnxk_eth_dev *dev, uint32_t profile_id)
+{
+   struct cnxk_mtr_profiles *fmps = &dev->mtr_profiles;
+   struct cnxk_mtr_profile_node *fmp;
+
+   TAILQ_FOREACH(fmp, fmps, next)
+   if (profile_id == fmp->id)
+   return fmp;
+
+   return NULL;
+}
+
+static int
+nix_mtr_profile_validate(struct cnxk_eth_dev *dev, uint32_t profile_id,
+struct rte_mtr_meter_profile *profile,
+struct rte_mtr_error *error)
+{
+   int rc = 0;
+
+   PLT_SET_USED(dev);
+
+   if (profile == NULL)
+   return -rte_mtr_error_set(error, EINVAL,
+ RTE_MTR_ERROR_TYPE_METER_PROFILE,
+ NULL, "Meter profile is null.");
+
+   if (profile_id == UINT32_MAX)
+   return -rte_mtr_error_set(error, EINVAL,
+ RTE_MTR_ERROR_TYPE_METER_PROFILE_ID,
+ NULL, "Meter profile id not valid.");
+
+   switch (profile->alg) {
+   case RTE_MTR_SRTCM_RFC2697:
+   if (profile->srtcm_rfc2697.cir > mtr_capa.meter_rate_max)
+   rc = -rte_mtr_error_set(error, EINVAL,
+   RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL,
+   "CIR exceeds max meter rate");
+
+   if (profile->srtcm_rfc2697.cbs > ROC_NIX_BPF_BURST_MAX)
+   rc = -rte_mtr_error_set(error, EINVAL,
+   RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL,
+   "CBS exceeds max meter burst size");
+
+   if (profile->srtcm_rfc2697.ebs > ROC_NIX_BPF_BURST_MAX)
+   rc = -rte_mtr_error_set(error, EINVAL,
+   RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL,
+   "EBS exceeds max meter burst size");
+   break;
+
+   case RTE_MTR_TRTCM_RFC2698:
+   if (profile->trtcm_rfc2698.cir > mtr_capa.meter_rate_max)
+   rc = -rte_mtr_error_set(error, EINVAL,
+   RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL,
+   "CIR exceeds max meter rate");
+
+   if (profile->trtcm_rfc2698.pir > mtr_capa.meter_rate_max)
+   rc = -rte_mtr_error_set(error, EINVAL,
+   RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL,
+   "PIR exceeds max meter rate");
+
+   if (profile->trtcm_rfc2698.cbs > ROC_NIX_BPF_BURST_MAX)
+   rc = -rte_mtr_error_set(error, EINVAL,
+   RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL,
+   "CBS exceeds max meter burst size");
+
+   if (profile->trtcm_rfc2698.pbs > ROC_NIX_BPF_BURST_MAX)
+   rc = -rte_mtr_error_set(error, EINVAL,
+   RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL,
+   "PBS exceeds max meter burst size");
+   break;
+
+   case RTE_MTR_TRTCM_RFC4115:
+   if ((profile->trtcm_rfc4115.cir + profile->trtcm_rfc4115.eir) >
+   mtr_capa.meter_rate_max)
+   rc = -rte_mtr_error_set(error, EINVAL,
+   RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL,
+   "PIR + EIR exceeds max rate");
+
+   if (profile->trtcm_rfc4115.cbs > ROC_NIX_BPF_BURST_MAX)
+   rc = -rte_mtr_error_set(error, EINVAL,
+   RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL,
+   "CBS exceeds max meter burst size");
+
+   if (profile->trtcm_rfc4115.ebs > ROC_NIX_BPF_BURST_MAX)
+   rc = -rte_mtr_error_set(error, EINVAL,
+   RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL,
+   "PBS exceeds max meter burst si

[dpdk-dev] [PATCH v2 18/27] net/cnxk: support ops to delete meter profile

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement API to delete meter profile for CN10K platform.

Signed-off-by: Sunil Kumar Kori 
Signed-off-by: Rakesh Kudurumalla 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/net/cnxk/cn10k_ethdev_mtr.c | 30 +
 1 file changed, 30 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c 
b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index dadfd1c0ff..cc21462880 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -189,9 +189,39 @@ cn10k_nix_mtr_profile_add(struct rte_eth_dev *eth_dev, 
uint32_t profile_id,
return 0;
 }
 
+static int
+cn10k_nix_mtr_profile_delete(struct rte_eth_dev *eth_dev, uint32_t profile_id,
+struct rte_mtr_error *error)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct cnxk_mtr_profile_node *fmp;
+
+   if (profile_id == UINT32_MAX)
+   return -rte_mtr_error_set(error, EINVAL,
+ RTE_MTR_ERROR_TYPE_METER_PROFILE_ID,
+ NULL, "Meter profile id not valid.");
+
+   fmp = nix_mtr_profile_find(dev, profile_id);
+   if (fmp == NULL)
+   return -rte_mtr_error_set(error, ENOENT,
+ RTE_MTR_ERROR_TYPE_METER_PROFILE_ID,
+ &profile_id,
+ "Meter profile is invalid.");
+
+   if (fmp->ref_cnt)
+   return -rte_mtr_error_set(error, EBUSY,
+ RTE_MTR_ERROR_TYPE_METER_PROFILE_ID,
+ NULL, "Meter profile is in use.");
+
+   TAILQ_REMOVE(&dev->mtr_profiles, fmp, next);
+   plt_free(fmp);
+   return 0;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
.capabilities_get = cn10k_nix_mtr_capabilities_get,
.meter_profile_add = cn10k_nix_mtr_profile_add,
+   .meter_profile_delete = cn10k_nix_mtr_profile_delete,
 };
 
 int
-- 
2.25.1

[dpdk-dev] [PATCH v2 19/27] net/cnxk: support ops to validate meter policy

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement API to validate meter policy for CN10K platform.

Signed-off-by: Sunil Kumar Kori 
Signed-off-by: Rakesh Kudurumalla 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/net/cnxk/cn10k_ethdev_mtr.c | 49 +
 1 file changed, 49 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c 
b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index cc21462880..922b06cb2b 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -218,10 +218,59 @@ cn10k_nix_mtr_profile_delete(struct rte_eth_dev *eth_dev, 
uint32_t profile_id,
return 0;
 }
 
+static int
+cn10k_nix_mtr_policy_validate(struct rte_eth_dev *dev,
+ struct rte_mtr_meter_policy_params *policy,
+ struct rte_mtr_error *error)
+{
+   static const char *const action_color[] = {"Green", "Yellow", "Red"};
+   bool supported[RTE_COLORS] = {false, false, false};
+   const struct rte_flow_action *action;
+   char message[1024];
+   uint32_t i;
+
+   RTE_SET_USED(dev);
+
+   if (!policy)
+   return 0; /* Nothing to be validated */
+
+   for (i = 0; i < RTE_COLORS; i++) {
+   if (policy->actions[i]) {
+   for (action = policy->actions[i];
+action->type != RTE_FLOW_ACTION_TYPE_END;
+action++) {
+   if (action->type == RTE_FLOW_ACTION_TYPE_METER)
+   supported[i] = true;
+
+   if (action->type == RTE_FLOW_ACTION_TYPE_DROP)
+   supported[i] = true;
+
+   if (!supported[i]) {
+   sprintf(message,
+   "%s action is not valid",
+   action_color[i]);
+   return -rte_mtr_error_set(error,
+ ENOTSUP,
+ RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
+ message);
+   }
+   }
+   } else {
+   sprintf(message, "%s action is null", action_color[i]);
+   return -rte_mtr_error_set(error, EINVAL,
+   RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
+   message);
+   }
+   }
+
+   return 0;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
.capabilities_get = cn10k_nix_mtr_capabilities_get,
.meter_profile_add = cn10k_nix_mtr_profile_add,
.meter_profile_delete = cn10k_nix_mtr_profile_delete,
+   .meter_policy_validate = cn10k_nix_mtr_policy_validate,
 };
 
 int
-- 
2.25.1

[dpdk-dev] [PATCH v2 20/27] net/cnxk: support ops to create meter policy

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement API to add meter policy for CN10K platform.

Signed-off-by: Sunil Kumar Kori 
Signed-off-by: Rakesh Kudurumalla 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/net/cnxk/cn10k_ethdev_mtr.c | 84 +
 drivers/net/cnxk/cnxk_ethdev.c  |  1 +
 drivers/net/cnxk/cnxk_ethdev.h  | 31 +++
 3 files changed, 116 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c 
b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 922b06cb2b..14f33cfe91 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -50,6 +50,18 @@ nix_mtr_profile_find(struct cnxk_eth_dev *dev, uint32_t 
profile_id)
return NULL;
 }
 
+static struct cnxk_mtr_policy_node *
+nix_mtr_policy_find(struct cnxk_eth_dev *dev, uint32_t meter_policy_id)
+{
+   struct cnxk_mtr_policy *fmps = &dev->mtr_policy;
+   struct cnxk_mtr_policy_node *fmp;
+
+   TAILQ_FOREACH(fmp, fmps, next)
+   if (meter_policy_id == fmp->id)
+   return fmp;
+   return NULL;
+}
+
 static int
 nix_mtr_profile_validate(struct cnxk_eth_dev *dev, uint32_t profile_id,
 struct rte_mtr_meter_profile *profile,
@@ -266,11 +278,83 @@ cn10k_nix_mtr_policy_validate(struct rte_eth_dev *dev,
return 0;
 }
 
+static void
+cn10k_fill_policy_actions(struct cnxk_mtr_policy_node *fmp,
+ struct rte_mtr_meter_policy_params *policy)
+
+{
+   const struct rte_flow_action *action;
+   const struct rte_flow_action_meter *mtr;
+   int i;
+
+   for (i = 0; i < RTE_COLORS; i++) {
+   if (policy->actions[i]) {
+   for (action = policy->actions[i];
+action->type != RTE_FLOW_ACTION_TYPE_END;
+action++) {
+   if (action->type ==
+   RTE_FLOW_ACTION_TYPE_METER) {
+   fmp->actions[i].action_fate =
+   action->type;
+   mtr = (const struct
+  rte_flow_action_meter *)
+ action->conf;
+   fmp->actions[i].mtr_id = mtr->mtr_id;
+   }
+
+   if (action->type == RTE_FLOW_ACTION_TYPE_DROP) {
+   fmp->actions[i].action_fate =
+   action->type;
+   }
+   }
+   }
+   }
+}
+
+static int
+cn10k_nix_mtr_policy_add(struct rte_eth_dev *eth_dev, uint32_t policy_id,
+struct rte_mtr_meter_policy_params *policy,
+struct rte_mtr_error *error)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct cnxk_mtr_policy *fmps = &dev->mtr_policy;
+   struct cnxk_mtr_policy_node *fmp;
+   int rc;
+
+   fmp = nix_mtr_policy_find(dev, policy_id);
+   if (fmp) {
+   return -rte_mtr_error_set(error, EEXIST,
+ RTE_MTR_ERROR_TYPE_METER_POLICY_ID,
+ NULL, "Policy already exist");
+   }
+
+   fmp = plt_zmalloc(sizeof(struct cnxk_mtr_policy_node), ROC_ALIGN);
+   if (fmp == NULL) {
+   return -rte_mtr_error_set(error, ENOMEM,
+ RTE_MTR_ERROR_TYPE_UNSPECIFIED, NULL,
+ "Memory allocation failure");
+   } else {
+   rc = cn10k_nix_mtr_policy_validate(eth_dev, policy, error);
+   if (rc)
+   goto exit;
+   }
+
+   fmp->id = policy_id;
+   cn10k_fill_policy_actions(fmp, policy);
+   TAILQ_INSERT_TAIL(fmps, fmp, next);
+   return 0;
+
+exit:
+   plt_free(fmp);
+   return rc;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
.capabilities_get = cn10k_nix_mtr_capabilities_get,
.meter_profile_add = cn10k_nix_mtr_profile_add,
.meter_profile_delete = cn10k_nix_mtr_profile_delete,
.meter_policy_validate = cn10k_nix_mtr_policy_validate,
+   .meter_policy_add = cn10k_nix_mtr_policy_add,
 };
 
 int
diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index e952aa5ec5..9e75060513 100644
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -508,6 +508,7 @@ static int
 nix_ingress_policer_setup(struct cnxk_eth_dev *dev)
 {
TAILQ_INIT(&dev->mtr_profiles);
+   TAILQ_INIT(&dev->mtr_policy);
 
return 0;
 }
diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
index 2b9b5beb83..4e45061c86 100644
--- a/d

[dpdk-dev] [PATCH v2 21/27] net/cnxk: support ops to delete meter policy

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement API to delete meter policy for CN10K platform.

Signed-off-by: Sunil Kumar Kori 
Signed-off-by: Rakesh Kudurumalla 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/net/cnxk/cn10k_ethdev_mtr.c | 26 ++
 1 file changed, 26 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c 
b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 14f33cfe91..46f0bdd5fc 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -349,12 +349,38 @@ cn10k_nix_mtr_policy_add(struct rte_eth_dev *eth_dev, 
uint32_t policy_id,
return rc;
 }
 
+static int
+cn10k_nix_mtr_policy_delete(struct rte_eth_dev *eth_dev, uint32_t policy_id,
+   struct rte_mtr_error *error)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct cnxk_mtr_policy_node *fmp;
+
+   fmp = nix_mtr_policy_find(dev, policy_id);
+   if (fmp == NULL) {
+   return -rte_mtr_error_set(error, ENOENT,
+ RTE_MTR_ERROR_TYPE_METER_POLICY_ID,
+ NULL, "No policy found");
+   }
+
+   if (fmp->ref_cnt)
+   return -rte_mtr_error_set(error, EBUSY,
+ RTE_MTR_ERROR_TYPE_METER_POLICY_ID,
+ NULL, "Meter policy is in use.");
+
+   TAILQ_REMOVE(&dev->mtr_policy, fmp, next);
+   plt_free(fmp);
+
+   return 0;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
.capabilities_get = cn10k_nix_mtr_capabilities_get,
.meter_profile_add = cn10k_nix_mtr_profile_add,
.meter_profile_delete = cn10k_nix_mtr_profile_delete,
.meter_policy_validate = cn10k_nix_mtr_policy_validate,
.meter_policy_add = cn10k_nix_mtr_policy_add,
+   .meter_policy_delete = cn10k_nix_mtr_policy_delete,
 };
 
 int
-- 
2.25.1

[dpdk-dev] [PATCH v2 22/27] net/cnxk: support ops to create meter

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement API to create meter instance for CN10K platform.

Signed-off-by: Sunil Kumar Kori 
Signed-off-by: Rakesh Kudurumalla 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/net/cnxk/cn10k_ethdev_mtr.c | 76 +
 drivers/net/cnxk/cnxk_ethdev.c  |  1 +
 drivers/net/cnxk/cnxk_ethdev.h  | 22 +
 3 files changed, 99 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c 
b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 46f0bdd5fc..9a8459d919 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -37,6 +37,18 @@ static struct rte_mtr_capabilities mtr_capa = {
  RTE_MTR_STATS_N_BYTES_YELLOW | RTE_MTR_STATS_N_BYTES_RED |
  RTE_MTR_STATS_N_BYTES_DROPPED};
 
+static struct cnxk_meter_node *
+nix_mtr_find(struct cnxk_eth_dev *dev, uint32_t meter_id)
+{
+   struct cnxk_mtr *fms = &dev->mtr;
+   struct cnxk_meter_node *fm;
+
+   TAILQ_FOREACH(fm, fms, next)
+   if (meter_id == fm->id)
+   return fm;
+   return NULL;
+}
+
 static struct cnxk_mtr_profile_node *
 nix_mtr_profile_find(struct cnxk_eth_dev *dev, uint32_t profile_id)
 {
@@ -374,6 +386,69 @@ cn10k_nix_mtr_policy_delete(struct rte_eth_dev *eth_dev, 
uint32_t policy_id,
return 0;
 }
 
+static int
+cn10k_nix_mtr_create(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
+struct rte_mtr_params *params, int shared,
+struct rte_mtr_error *error)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct cnxk_mtr_profile_node *profile;
+   struct cnxk_mtr_policy_node *policy;
+   struct cnxk_mtr *fm = &dev->mtr;
+   struct cnxk_meter_node *mtr;
+
+   RTE_SET_USED(shared);
+
+   if (params == NULL)
+   return -rte_mtr_error_set(error, ENOENT,
+ RTE_MTR_ERROR_TYPE_MTR_PARAMS, NULL,
+ "Meter params are invalid.");
+
+   profile = nix_mtr_profile_find(dev, params->meter_profile_id);
+   if (profile == NULL)
+   return -rte_mtr_error_set(error, ENOENT,
+ RTE_MTR_ERROR_TYPE_METER_PROFILE_ID,
+ ¶ms->meter_profile_id,
+ "Meter profile is invalid.");
+
+   policy = nix_mtr_policy_find(dev, params->meter_policy_id);
+   if (policy == NULL)
+   return -rte_mtr_error_set(error, ENOENT,
+ RTE_MTR_ERROR_TYPE_METER_POLICY_ID,
+ ¶ms->meter_policy_id,
+ "Meter policy is invalid.");
+
+   mtr = nix_mtr_find(dev, mtr_id);
+   if (mtr == NULL) {
+   mtr = plt_zmalloc(sizeof(struct cnxk_meter_node), ROC_ALIGN);
+   if (mtr == NULL) {
+   return -rte_mtr_error_set(error, ENOMEM,
+   RTE_MTR_ERROR_TYPE_UNSPECIFIED, NULL,
+   "Meter memory alloc failed.");
+   } else {
+   mtr->id = mtr_id;
+   mtr->profile = profile;
+   mtr->policy = policy;
+   mtr->params = *params;
+   mtr->bpf_id = ROC_NIX_BPF_ID_INVALID;
+   mtr->prev_id = ROC_NIX_BPF_ID_INVALID;
+   mtr->next_id = ROC_NIX_BPF_ID_INVALID;
+   mtr->is_prev = false;
+   mtr->is_next = false;
+   mtr->level = ROC_NIX_BPF_LEVEL_IDX_INVALID;
+   }
+   } else {
+   return -rte_mtr_error_set(error, EEXIST,
+ RTE_MTR_ERROR_TYPE_MTR_ID,
+ NULL, "Meter already exist");
+   }
+
+   profile->ref_cnt++;
+   policy->ref_cnt++;
+   TAILQ_INSERT_TAIL(fm, mtr, next);
+   return 0;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
.capabilities_get = cn10k_nix_mtr_capabilities_get,
.meter_profile_add = cn10k_nix_mtr_profile_add,
@@ -381,6 +456,7 @@ const struct rte_mtr_ops nix_mtr_ops = {
.meter_policy_validate = cn10k_nix_mtr_policy_validate,
.meter_policy_add = cn10k_nix_mtr_policy_add,
.meter_policy_delete = cn10k_nix_mtr_policy_delete,
+   .create = cn10k_nix_mtr_create,
 };
 
 int
diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index 9e75060513..4c12715756 100644
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -509,6 +509,7 @@ nix_ingress_policer_setup(struct cnxk_eth_dev *dev)
 {
TAILQ_INIT(&dev->mtr_profiles);
TAILQ_INIT(&dev->mtr_policy);
+   TAILQ_INIT(&dev->

[dpdk-dev] [PATCH v2 23/27] net/cnxk: support ops to delete meter

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement API to delete meter instance for CN10K platform.

Signed-off-by: Sunil Kumar Kori 
Signed-off-by: Rakesh Kudurumalla 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/net/cnxk/cn10k_ethdev_mtr.c | 79 +
 1 file changed, 79 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c 
b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 9a8459d919..8bd70df2ed 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -8,6 +8,10 @@
 #define NIX_MTR_COUNT_MAX  73 /* 64(leaf) + 8(mid) + 1(top) */
 #define NIX_MTR_COUNT_PER_FLOW 3  /* 1(leaf) + 1(mid) + 1(top) */
 
+static const enum roc_nix_bpf_level_flag lvl_map[] = {ROC_NIX_BPF_LEVEL_F_LEAF,
+ ROC_NIX_BPF_LEVEL_F_MID,
+ ROC_NIX_BPF_LEVEL_F_TOP};
+
 static struct rte_mtr_capabilities mtr_capa = {
.n_max = NIX_MTR_COUNT_MAX,
.n_shared_max = NIX_MTR_COUNT_PER_FLOW,
@@ -449,6 +453,80 @@ cn10k_nix_mtr_create(struct rte_eth_dev *eth_dev, uint32_t 
mtr_id,
return 0;
 }
 
+static int
+cn10k_nix_mtr_destroy(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
+ struct rte_mtr_error *error)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct roc_nix_bpf_objs profs = {0};
+   struct cnxk_mtr *fm = &dev->mtr;
+   struct roc_nix *nix = &dev->nix;
+   struct cnxk_meter_node *mtr;
+   int rc = 0;
+
+   mtr = nix_mtr_find(dev, mtr_id);
+   if (mtr == NULL) {
+   return -rte_mtr_error_set(error, ENOENT,
+ RTE_MTR_ERROR_TYPE_MTR_ID, &mtr_id,
+ "Meter id is invalid.");
+   }
+
+   if (mtr->ref_cnt) {
+   return -rte_mtr_error_set(error, EADDRINUSE,
+ RTE_MTR_ERROR_TYPE_MTR_ID, &mtr_id,
+ "Meter id in use.");
+   }
+
+   switch (lvl_map[mtr->level]) {
+   case ROC_NIX_BPF_LEVEL_F_LEAF:
+   if (mtr->is_next) {
+   rc = roc_nix_bpf_connect(nix, ROC_NIX_BPF_LEVEL_F_LEAF,
+mtr_id,
+ROC_NIX_BPF_ID_INVALID);
+   }
+   break;
+   case ROC_NIX_BPF_LEVEL_F_MID:
+   if (mtr->is_prev) {
+   rc = roc_nix_bpf_connect(nix, ROC_NIX_BPF_LEVEL_F_LEAF,
+mtr->prev_id,
+ROC_NIX_BPF_ID_INVALID);
+   }
+   if (mtr->is_next) {
+   rc = roc_nix_bpf_connect(nix, ROC_NIX_BPF_LEVEL_F_MID,
+mtr_id,
+ROC_NIX_BPF_ID_INVALID);
+   }
+   break;
+   case ROC_NIX_BPF_LEVEL_F_TOP:
+   if (mtr->is_prev) {
+   rc = roc_nix_bpf_connect(nix, ROC_NIX_BPF_LEVEL_F_MID,
+mtr->prev_id,
+ROC_NIX_BPF_ID_INVALID);
+   }
+   break;
+   default:
+   return -rte_mtr_error_set(error, EINVAL,
+ RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
+ "Invalid meter level");
+   }
+
+   if (rc)
+   goto exit;
+
+   profs.level = mtr->level;
+   profs.count = 1;
+   profs.ids[0] = mtr->bpf_id;
+   rc = roc_nix_bpf_free(nix, &profs, 1);
+   if (rc)
+   goto exit;
+
+   TAILQ_REMOVE(fm, mtr, next);
+   plt_free(fm);
+
+exit:
+   return rc;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
.capabilities_get = cn10k_nix_mtr_capabilities_get,
.meter_profile_add = cn10k_nix_mtr_profile_add,
@@ -457,6 +535,7 @@ const struct rte_mtr_ops nix_mtr_ops = {
.meter_policy_add = cn10k_nix_mtr_policy_add,
.meter_policy_delete = cn10k_nix_mtr_policy_delete,
.create = cn10k_nix_mtr_create,
+   .destroy = cn10k_nix_mtr_destroy,
 };
 
 int
-- 
2.25.1

[dpdk-dev] [PATCH v2 24/27] net/cnxk: support ops to enable/disable meter

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement API to enable or disable meter instance for
CN10K platform.

Signed-off-by: Sunil Kumar Kori 
Signed-off-by: Rakesh Kudurumalla 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/net/cnxk/cn10k_ethdev_mtr.c | 60 +
 1 file changed, 60 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c 
b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 8bd70df2ed..2f82bd08ec 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -527,6 +527,64 @@ cn10k_nix_mtr_destroy(struct rte_eth_dev *eth_dev, 
uint32_t mtr_id,
return rc;
 }
 
+static int
+cn10k_nix_mtr_enable(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
+struct rte_mtr_error *error)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct roc_nix *nix = &dev->nix;
+   struct cnxk_meter_node *mtr;
+   struct roc_nix_rq *rq;
+   uint32_t i;
+   int rc = 0;
+
+   mtr = nix_mtr_find(dev, mtr_id);
+   if (mtr == NULL) {
+   return -rte_mtr_error_set(error, ENOENT,
+ RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
+ "Meter id is invalid.");
+   }
+
+   if (mtr->level != 0)
+   return 0;
+
+   for (i = 0; i < mtr->rq_num; i++) {
+   rq = &dev->rqs[mtr->rq_id[i]];
+   rc |= roc_nix_bpf_ena_dis(nix, mtr->bpf_id, rq, true);
+   }
+
+   return rc;
+}
+
+static int
+cn10k_nix_mtr_disable(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
+ struct rte_mtr_error *error)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct roc_nix *nix = &dev->nix;
+   struct cnxk_meter_node *mtr;
+   struct roc_nix_rq *rq;
+   uint32_t i;
+   int rc = 0;
+
+   mtr = nix_mtr_find(dev, mtr_id);
+   if (mtr == NULL) {
+   return -rte_mtr_error_set(error, ENOENT,
+ RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
+ "Meter id is invalid.");
+   }
+
+   if (mtr->level != 0)
+   return 0;
+
+   for (i = 0; i < mtr->rq_num; i++) {
+   rq = &dev->rqs[mtr->rq_id[i]];
+   rc |= roc_nix_bpf_ena_dis(nix, mtr->bpf_id, rq, false);
+   }
+
+   return rc;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
.capabilities_get = cn10k_nix_mtr_capabilities_get,
.meter_profile_add = cn10k_nix_mtr_profile_add,
@@ -536,6 +594,8 @@ const struct rte_mtr_ops nix_mtr_ops = {
.meter_policy_delete = cn10k_nix_mtr_policy_delete,
.create = cn10k_nix_mtr_create,
.destroy = cn10k_nix_mtr_destroy,
+   .meter_enable = cn10k_nix_mtr_enable,
+   .meter_disable = cn10k_nix_mtr_disable,
 };
 
 int
-- 
2.25.1

[dpdk-dev] [PATCH v2 25/27] net/cnxk: support ops to update precolor DSCP table

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement API to update DSCP table for pre-coloring for
incoming packet per nixlf for CN10K platform.

Signed-off-by: Sunil Kumar Kori 
Signed-off-by: Rakesh Kudurumalla 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/net/cnxk/cn10k_ethdev_mtr.c | 43 +
 1 file changed, 43 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c 
b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 2f82bd08ec..63abcb9788 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -585,6 +585,48 @@ cn10k_nix_mtr_disable(struct rte_eth_dev *eth_dev, 
uint32_t mtr_id,
return rc;
 }
 
+static int
+cn10k_nix_mtr_dscp_table_update(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
+   enum rte_color *dscp_table,
+   struct rte_mtr_error *error)
+{
+   enum roc_nix_bpf_color nix_dscp_tbl[ROC_NIX_BPF_PRE_COLOR_MAX];
+   enum roc_nix_bpf_color color_map[] = {ROC_NIX_BPF_COLOR_GREEN,
+ ROC_NIX_BPF_COLOR_YELLOW,
+ ROC_NIX_BPF_COLOR_RED};
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   uint8_t lvl_flag = ROC_NIX_BPF_LEVEL_F_LEAF;
+   struct roc_nix_bpf_precolor table;
+   struct roc_nix *nix = &dev->nix;
+   int rc, i;
+
+   if (!dscp_table) {
+   for (i = 0; i < ROC_NIX_BPF_PRE_COLOR_MAX; i++)
+   nix_dscp_tbl[i] = ROC_NIX_BPF_COLOR_GREEN;
+   } else {
+   for (i = 0; i < ROC_NIX_BPF_PRE_COLOR_MAX; i++)
+   nix_dscp_tbl[i] = color_map[dscp_table[i]];
+   }
+
+   table.count = ROC_NIX_BPF_PRE_COLOR_MAX;
+   table.mode = ROC_NIX_BPF_PC_MODE_DSCP_OUTER;
+   for (i = 0; i < ROC_NIX_BPF_PRE_COLOR_MAX; i++)
+   table.color[i] = nix_dscp_tbl[i];
+
+   rc = roc_nix_bpf_pre_color_tbl_setup(nix, mtr_id, lvl_flag, &table);
+   if (rc) {
+   rte_mtr_error_set(error, rc, RTE_MTR_ERROR_TYPE_UNSPECIFIED,
+ NULL, NULL);
+   goto exit;
+   }
+
+   for (i = 0; i < ROC_NIX_BPF_PRE_COLOR_MAX; i++)
+   dev->precolor_tbl[i] = nix_dscp_tbl[i];
+
+exit:
+   return rc;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
.capabilities_get = cn10k_nix_mtr_capabilities_get,
.meter_profile_add = cn10k_nix_mtr_profile_add,
@@ -596,6 +638,7 @@ const struct rte_mtr_ops nix_mtr_ops = {
.destroy = cn10k_nix_mtr_destroy,
.meter_enable = cn10k_nix_mtr_enable,
.meter_disable = cn10k_nix_mtr_disable,
+   .meter_dscp_table_update = cn10k_nix_mtr_dscp_table_update,
 };
 
 int
-- 
2.25.1

[dpdk-dev] [PATCH v2 26/27] net/cnxk: support ops to read/update meter stats

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Implement API to read and update stats corresponding to
given meter instance for CN10K platform.

Signed-off-by: Sunil Kumar Kori 
Signed-off-by: Rakesh Kudurumalla 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 drivers/net/cnxk/cn10k_ethdev_mtr.c | 141 
 1 file changed, 141 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c 
b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 63abcb9788..c0482d1418 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -8,6 +8,21 @@
 #define NIX_MTR_COUNT_MAX  73 /* 64(leaf) + 8(mid) + 1(top) */
 #define NIX_MTR_COUNT_PER_FLOW 3  /* 1(leaf) + 1(mid) + 1(top) */
 
+#define NIX_BPF_STATS_MASK_ALL 
\
+   {  \
+   ROC_NIX_BPF_GREEN_PKT_F_PASS | ROC_NIX_BPF_GREEN_OCTS_F_PASS | \
+   ROC_NIX_BPF_GREEN_PKT_F_DROP | \
+   ROC_NIX_BPF_GREEN_OCTS_F_DROP |\
+   ROC_NIX_BPF_YELLOW_PKT_F_PASS |\
+   ROC_NIX_BPF_YELLOW_OCTS_F_PASS |   \
+   ROC_NIX_BPF_YELLOW_PKT_F_DROP |\
+   ROC_NIX_BPF_YELLOW_OCTS_F_DROP |   \
+   ROC_NIX_BPF_RED_PKT_F_PASS |   \
+   ROC_NIX_BPF_RED_OCTS_F_PASS |  \
+   ROC_NIX_BPF_RED_PKT_F_DROP |   \
+   ROC_NIX_BPF_RED_OCTS_F_DROP\
+   }
+
 static const enum roc_nix_bpf_level_flag lvl_map[] = {ROC_NIX_BPF_LEVEL_F_LEAF,
  ROC_NIX_BPF_LEVEL_F_MID,
  ROC_NIX_BPF_LEVEL_F_TOP};
@@ -627,6 +642,130 @@ cn10k_nix_mtr_dscp_table_update(struct rte_eth_dev 
*eth_dev, uint32_t mtr_id,
return rc;
 }
 
+static int
+cn10k_nix_mtr_stats_update(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
+  uint64_t stats_mask, struct rte_mtr_error *error)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct cnxk_meter_node *mtr;
+
+   if (!stats_mask)
+   return -rte_mtr_error_set(error, EINVAL,
+ RTE_MTR_ERROR_TYPE_MTR_PARAMS, NULL,
+ "no bit is set to stats mask");
+
+   mtr = nix_mtr_find(dev, mtr_id);
+   if (mtr == NULL) {
+   return -rte_mtr_error_set(error, ENOENT,
+ RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
+ "Meter object not found");
+   }
+
+   mtr->params.stats_mask = stats_mask;
+   return 0;
+}
+
+static int
+cn10k_nix_mtr_stats_read(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
+struct rte_mtr_stats *stats, uint64_t *stats_mask,
+int clear, struct rte_mtr_error *error)
+{
+   uint8_t yellow_pkt_pass, yellow_octs_pass, yellow_pkt_drop;
+   uint8_t green_octs_drop, yellow_octs_drop, red_octs_drop;
+   uint8_t green_pkt_pass, green_octs_pass, green_pkt_drop;
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   uint8_t red_pkt_pass, red_octs_pass, red_pkt_drop;
+   uint64_t bpf_stats[ROC_NIX_BPF_STATS_MAX] = {0};
+   uint8_t lvl_flag = ROC_NIX_BPF_LEVEL_F_LEAF;
+   uint64_t mask = NIX_BPF_STATS_MASK_ALL;
+   struct roc_nix *nix = &dev->nix;
+   struct cnxk_meter_node *mtr;
+   int rc;
+
+   if (!stats)
+   return -rte_mtr_error_set(error, EINVAL,
+ RTE_MTR_ERROR_TYPE_MTR_PARAMS, NULL,
+ "stats pointer is NULL");
+
+   mtr = nix_mtr_find(dev, mtr_id);
+   if (mtr == NULL) {
+   return -rte_mtr_error_set(error, ENOENT,
+ RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
+ "Meter object not found");
+   }
+
+   rc = roc_nix_bpf_stats_read(nix, mtr->bpf_id, mask, lvl_flag,
+   bpf_stats);
+   if (rc) {
+   rte_mtr_error_set(error, rc, RTE_MTR_ERROR_TYPE_UNSPECIFIED,
+ NULL, NULL);
+   goto exit;
+   }
+
+   green_pkt_pass = roc_nix_bpf_stats_to_idx(ROC_NIX_BPF_GREEN_PKT_F_PASS);
+   green_octs_pass =
+   roc_nix_bpf_stats_to_idx(ROC_NIX_BPF_GREEN_OCTS_F_PASS);
+   green_pkt_drop = roc_nix_bpf_stats_to_idx(ROC_NIX_BPF_GREEN_PKT_F_DROP);
+   green_octs_drop =
+   roc_nix_bpf_st

[dpdk-dev] [PATCH v2 27/27] net/cnxk: support meter action to flow create

2021-09-27 Thread skori

From: Sunil Kumar Kori 

Meters are configured per flow using rte_flow_create API.
Implement support for meter action applied on the flow.

Signed-off-by: Sunil Kumar Kori 
Signed-off-by: Rakesh Kudurumalla 
---
v2:
 - Rebase support on latest DPDK
 - Handled multilevel chaining for linear hierarchy
 - Review comments incorporated

 doc/guides/nics/features/cnxk.ini|   1 +
 doc/guides/nics/features/cnxk_vf.ini |   1 +
 drivers/net/cnxk/cn10k_ethdev_mtr.c  | 388 +++
 drivers/net/cnxk/cn10k_rte_flow.c| 155 ++-
 drivers/net/cnxk/cnxk_ethdev.h   |  15 ++
 drivers/net/cnxk/cnxk_rte_flow.c |   4 +
 6 files changed, 563 insertions(+), 1 deletion(-)

diff --git a/doc/guides/nics/features/cnxk.ini 
b/doc/guides/nics/features/cnxk.ini
index 5d456257bd..7bbce7dafc 100644
--- a/doc/guides/nics/features/cnxk.ini
+++ b/doc/guides/nics/features/cnxk.ini
@@ -78,6 +78,7 @@ count= Y
 drop = Y
 flag = Y
 mark = Y
+meter= Y
 of_pop_vlan  = Y
 of_push_vlan = Y
 of_set_vlan_pcp  = Y
diff --git a/doc/guides/nics/features/cnxk_vf.ini 
b/doc/guides/nics/features/cnxk_vf.ini
index 7b4299f0be..89802a27f9 100644
--- a/doc/guides/nics/features/cnxk_vf.ini
+++ b/doc/guides/nics/features/cnxk_vf.ini
@@ -70,6 +70,7 @@ count= Y
 drop = Y
 flag = Y
 mark = Y
+meter= Y
 of_pop_vlan  = Y
 of_push_vlan = Y
 of_set_vlan_pcp  = Y
diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c 
b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index c0482d1418..75193b3db1 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -790,3 +790,391 @@ cn10k_nix_mtr_ops_get(struct rte_eth_dev *dev, void *ops)
*(const void **)ops = &nix_mtr_ops;
return 0;
 }
+
+int
+nix_mtr_validate(struct rte_eth_dev *eth_dev, uint32_t id)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct cnxk_mtr_profile_node *profile;
+   struct cnxk_mtr_policy_node *policy;
+   struct cnxk_meter_node *mtr;
+
+   mtr = nix_mtr_find(dev, id);
+   if (mtr == NULL)
+   return -EINVAL;
+
+   profile = nix_mtr_profile_find(dev, mtr->params.meter_profile_id);
+   if (profile == NULL)
+   return -EINVAL;
+
+   policy = nix_mtr_policy_find(dev, mtr->params.meter_policy_id);
+   if (policy == NULL)
+   return -EINVAL;
+
+   return 0;
+}
+
+int
+nix_mtr_policy_act_get(struct rte_eth_dev *eth_dev, uint32_t id,
+  struct cnxk_mtr_policy_node **policy_act)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct cnxk_mtr_policy_node *policy;
+   struct cnxk_meter_node *mtr;
+
+   mtr = nix_mtr_find(dev, id);
+   if (mtr == NULL)
+   return -EINVAL;
+
+   policy = nix_mtr_policy_find(dev, mtr->params.meter_policy_id);
+   if (policy == NULL)
+   return -EINVAL;
+
+   *policy_act = policy;
+
+   return 0;
+}
+
+int
+nix_mtr_rq_update(struct rte_eth_dev *eth_dev, uint32_t id, uint32_t queue_num,
+ const uint16_t *queue)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct cnxk_meter_node *mtr;
+   uint32_t i;
+
+   mtr = nix_mtr_find(dev, id);
+   if (mtr == NULL)
+   return -EINVAL;
+
+   mtr->rq_id = plt_zmalloc(queue_num * sizeof(uint32_t), ROC_ALIGN);
+   if (mtr->rq_id == NULL)
+   return -ENOMEM;
+
+   mtr->rq_num = queue_num;
+   for (i = 0; i < queue_num; i++)
+   mtr->rq_id[i] = queue[i];
+
+   return 0;
+}
+
+int
+nix_mtr_chain_reset(struct rte_eth_dev *eth_dev, uint32_t cur_id)
+{
+   struct cnxk_meter_node *mtr[ROC_NIX_BPF_LEVEL_MAX] = {0};
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   uint32_t mtr_id = cur_id;
+   int i = 0;
+
+   for (i = 0; i < ROC_NIX_BPF_LEVEL_MAX; i++) {
+   mtr[i] = nix_mtr_find(dev, mtr_id);
+   if (mtr[i])
+   mtr_id = mtr[i]->next_id;
+   }
+   for (i = 0; i < ROC_NIX_BPF_LEVEL_MAX; i++) {
+   if (mtr[i]) {
+   mtr[i]->level = ROC_NIX_BPF_LEVEL_IDX_INVALID;
+   mtr[i]->prev_id = ROC_NIX_BPF_ID_INVALID;
+   mtr[i]->next_id = ROC_NIX_BPF_ID_INVALID;
+   mtr[i]->is_prev = false;
+   mtr[i]->is_next = false;
+   }
+   }
+   return 0;
+}
+
+int
+nix_mtr_chain_update(struct rte_eth_dev *eth_dev, uint32_t cur_id,
+uint32_t prev_id, uint32_t next_id)
+{
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct cnxk_meter_node *mtr;
+
+   mtr = nix_mtr_find(dev, cur_id);
+   if (mtr == NULL)
+   return -EINVAL;
+
+

[dpdk-dev] [PATCH v5] net/ice: support IEEE 1588 PTP

2021-09-27 Thread Simei Su

Add ice support for new ethdev APIs to enable/disable and read/write/adjust
IEEE1588 PTP timestamps. Currently, only scalar path supports 1588 PTP,
vector path doesn't.

The example command for running ptpclient is as below:
./build/examples/dpdk-ptpclient -c 1 -n 3 -- -T 0 -p 0x1

Signed-off-by: Simei Su 
---
v5:
* Refine patch title and commit log.
* Simplify judge logic in ice_timesync_enable and ice_program_hw_rx_queue.
* Add flag reset in ice_timesync_disable. 

v4:
* Rework code to consider ice_dev_start and ice_timesync_enable order.

v3:
* Rework code to support scalar path only.
* Update the doc/guides/nics/features/ice.ini to add "Timesync" feature.
* Add release notes.

v2:
* Change patchset to one patch based on share code update.
* Change per device offload to per queue offload.

 doc/guides/nics/features/ice.ini   |   1 +
 doc/guides/rel_notes/release_21_11.rst |   1 +
 drivers/net/ice/ice_ethdev.c   | 201 -
 drivers/net/ice/ice_ethdev.h   |   6 +
 drivers/net/ice/ice_rxtx.c |  41 ++-
 drivers/net/ice/ice_rxtx.h |   1 +
 6 files changed, 248 insertions(+), 3 deletions(-)

diff --git a/doc/guides/nics/features/ice.ini b/doc/guides/nics/features/ice.ini
index e066787..a7978d2 100644
--- a/doc/guides/nics/features/ice.ini
+++ b/doc/guides/nics/features/ice.ini
@@ -43,6 +43,7 @@ Linux= Y
 Windows  = Y
 x86-32   = Y
 x86-64   = Y
+Timesync = Y
 
 [rte_flow items]
 ah   = Y
diff --git a/doc/guides/rel_notes/release_21_11.rst 
b/doc/guides/rel_notes/release_21_11.rst
index 8e29833..33527ed 100644
--- a/doc/guides/rel_notes/release_21_11.rst
+++ b/doc/guides/rel_notes/release_21_11.rst
@@ -82,6 +82,7 @@ New Features
   * Added 1PPS out support by a devargs.
   * Added IPv4 and L4(TCP/UDP/SCTP) checksum hash support in RSS flow.
   * Added DEV_RX_OFFLOAD_TIMESTAMP support.
+  * Added timesync API support under scalar path.
 
 * **Updated Marvell cnxk ethdev driver.**
 
diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index 6b85f68..0f457dc 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -18,6 +18,7 @@
 #include "base/ice_flow.h"
 #include "base/ice_dcb.h"
 #include "base/ice_common.h"
+#include "base/ice_ptp_hw.h"
 
 #include "rte_pmd_ice.h"
 #include "ice_ethdev.h"
@@ -32,6 +33,8 @@
 #define ICE_ONE_PPS_OUT_ARG   "pps_out"
 #define ICE_RX_LOW_LATENCY_ARG"rx_low_latency"
 
+#define ICE_CYCLECOUNTER_MASK  0xULL
+
 uint64_t ice_timestamp_dynflag;
 int ice_timestamp_dynfield_offset = -1;
 
@@ -45,7 +48,6 @@ static const char * const ice_valid_args[] = {
NULL
 };
 
-#define NSEC_PER_SEC  10
 #define PPS_OUT_DELAY_NS  1
 
 static const struct rte_mbuf_dynfield ice_proto_xtr_metadata_param = {
@@ -151,6 +153,18 @@ static int ice_dev_udp_tunnel_port_add(struct rte_eth_dev 
*dev,
struct rte_eth_udp_tunnel *udp_tunnel);
 static int ice_dev_udp_tunnel_port_del(struct rte_eth_dev *dev,
struct rte_eth_udp_tunnel *udp_tunnel);
+static int ice_timesync_enable(struct rte_eth_dev *dev);
+static int ice_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
+ struct timespec *timestamp,
+ uint32_t flags);
+static int ice_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
+ struct timespec *timestamp);
+static int ice_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta);
+static int ice_timesync_read_time(struct rte_eth_dev *dev,
+ struct timespec *timestamp);
+static int ice_timesync_write_time(struct rte_eth_dev *dev,
+  const struct timespec *timestamp);
+static int ice_timesync_disable(struct rte_eth_dev *dev);
 
 static const struct rte_pci_id pci_id_ice_map[] = {
{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_BACKPLANE) },
@@ -234,6 +248,13 @@ static const struct eth_dev_ops ice_eth_dev_ops = {
.udp_tunnel_port_del  = ice_dev_udp_tunnel_port_del,
.tx_done_cleanup  = ice_tx_done_cleanup,
.get_monitor_addr = ice_get_monitor_addr,
+   .timesync_enable  = ice_timesync_enable,
+   .timesync_read_rx_timestamp   = ice_timesync_read_rx_timestamp,
+   .timesync_read_tx_timestamp   = ice_timesync_read_tx_timestamp,
+   .timesync_adjust_time = ice_timesync_adjust_time,
+   .timesync_read_time   = ice_timesync_read_time,
+   .timesync_write_time  = ice_timesync_write_time,
+   .timesync_disable = ice_timesync_disable,
 };
 
 /* store statistics names and its offset in stats structure */
@@ -5487,6 +5508,184 @@ ice_dev_udp_tunnel_port_del(struct rte_eth_dev *dev,
 }
 
 static int
+ice_timesyn

Re: [dpdk-dev] [PATCH] net/bnxt: improve error recovery information messages

2021-09-27 Thread Ajit Khaparde

On Thu, Sep 23, 2021 at 9:57 PM Kalesh A P
 wrote:
>
> From: Kalesh AP 
>
> The error recovery async event messages are often mistaken
> for errors. Improved the wording to clarify the meaning of
> these events.
> Also, take the first step towards more inclusive language.
> The references to master will be changed to primary.
> For example: "bnxt_is_master_func" will be renamed to
> "bnxt_is_primary_func()".
>
> Signed-off-by: Kalesh AP 
> Reviewed-by: Ajit Khaparde 
> Reviewed-by: Somnath Kotur 
Patch applied to dpdk-next-net-brcm. Thanks

> ---
>  drivers/net/bnxt/bnxt.h|  6 +++---
>  drivers/net/bnxt/bnxt_cpr.c| 33 ++---
>  drivers/net/bnxt/bnxt_cpr.h|  2 +-
>  drivers/net/bnxt/bnxt_ethdev.c | 16 
>  drivers/net/bnxt/bnxt_hwrm.c   |  4 ++--
>  5 files changed, 32 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h
> index a64b138..5121d05 100644
> --- a/drivers/net/bnxt/bnxt.h
> +++ b/drivers/net/bnxt/bnxt.h
> @@ -501,9 +501,9 @@ struct bnxt_ctx_mem_buf_info {
>  struct bnxt_error_recovery_info {
> /* All units in milliseconds */
> uint32_tdriver_polling_freq;
> -   uint32_tmaster_func_wait_period;
> +   uint32_tprimary_func_wait_period;
> uint32_tnormal_func_wait_period;
> -   uint32_tmaster_func_wait_period_after_reset;
> +   uint32_tprimary_func_wait_period_after_reset;
> uint32_tmax_bailout_time_after_reset;
>  #define BNXT_FW_STATUS_REG 0
>  #define BNXT_FW_HEARTBEAT_CNT_REG  1
> @@ -520,7 +520,7 @@ struct bnxt_error_recovery_info {
> uint8_t delay_after_reset[BNXT_NUM_RESET_REG];
>  #define BNXT_FLAG_ERROR_RECOVERY_HOST  BIT(0)
>  #define BNXT_FLAG_ERROR_RECOVERY_CO_CPUBIT(1)
> -#define BNXT_FLAG_MASTER_FUNC  BIT(2)
> +#define BNXT_FLAG_PRIMARY_FUNC BIT(2)
>  #define BNXT_FLAG_RECOVERY_ENABLED BIT(3)
> uint32_tflags;
>
> diff --git a/drivers/net/bnxt/bnxt_cpr.c b/drivers/net/bnxt/bnxt_cpr.c
> index 12230dc..63ff02a 100644
> --- a/drivers/net/bnxt/bnxt_cpr.c
> +++ b/drivers/net/bnxt/bnxt_cpr.c
> @@ -120,6 +120,7 @@ void bnxt_handle_async_event(struct bnxt *bp,
> struct bnxt_error_recovery_info *info;
> uint32_t event_data;
> uint32_t data1, data2;
> +   uint32_t status;
>
> data1 = rte_le_to_cpu_32(async_cmp->event_data1);
> data2 = rte_le_to_cpu_32(async_cmp->event_data2);
> @@ -188,24 +189,26 @@ void bnxt_handle_async_event(struct bnxt *bp,
> if (!info)
> return;
>
> -   PMD_DRV_LOG(INFO, "Port %u: Error recovery async event 
> received\n",
> -   port_id);
> -
> event_data = data1 & EVENT_DATA1_FLAGS_MASK;
>
> -   if (event_data & EVENT_DATA1_FLAGS_MASTER_FUNC)
> -   info->flags |= BNXT_FLAG_MASTER_FUNC;
> -   else
> -   info->flags &= ~BNXT_FLAG_MASTER_FUNC;
> -
> -   if (event_data & EVENT_DATA1_FLAGS_RECOVERY_ENABLED)
> +   if (event_data & EVENT_DATA1_FLAGS_RECOVERY_ENABLED) {
> info->flags |= BNXT_FLAG_RECOVERY_ENABLED;
> -   else
> +   } else {
> info->flags &= ~BNXT_FLAG_RECOVERY_ENABLED;
> +   PMD_DRV_LOG(INFO, "Driver recovery watchdog is 
> disabled\n");
> +   return;
> +   }
> +
> +   if (event_data & EVENT_DATA1_FLAGS_MASTER_FUNC)
> +   info->flags |= BNXT_FLAG_PRIMARY_FUNC;
> +   else
> +   info->flags &= ~BNXT_FLAG_PRIMARY_FUNC;
>
> -   PMD_DRV_LOG(INFO, "Port %u: recovery enabled(%d), master 
> function(%d)\n",
> -   port_id, bnxt_is_recovery_enabled(bp),
> -   bnxt_is_master_func(bp));
> +   status = bnxt_read_fw_status_reg(bp, BNXT_FW_STATUS_REG);
> +   PMD_DRV_LOG(INFO,
> +   "Port: %u Driver recovery watchdog, role: %s, FW 
> status: 0x%x (%s)\n",
> +   port_id, bnxt_is_primary_func(bp) ? "primary" : 
> "backup", status,
> +   (status == BNXT_FW_STATUS_HEALTHY) ? "healthy" : 
> "unhealthy");
>
> if (bp->flags & BNXT_FLAG_FW_HEALTH_CHECK_SCHEDULED)
> return;
> @@ -361,9 +364,9 @@ int bnxt_event_hwrm_resp_handler(struct bnxt *bp, struct 
> cmpl_base *cmp)
> return evt;
>  }
>
> -bool bnxt_is_master_func(struct bnxt *bp)
> +bool bnxt_is_primary_func(struct bnxt *bp)
>  {
> -   if (bp->recovery_info->flags & BNXT_FLAG_MASTER_FUNC)
> +   if (bp->recovery_info->flags & BNXT_FLAG_PRIMARY_FUNC)
> return true;
>
> return false;
> diff --git a/drivers/net/bnxt/bnxt_cpr.h

Re: [dpdk-dev] [PATCH] [v2] vdpa/ifc: increase readability in function

2021-09-27 Thread Wang, Xiao W

Hi,

> -Original Message-
> From: jilei chen 
> Sent: Monday, September 27, 2021 4:12 PM
> To: Wang, Xiao W 
> Cc: dev@dpdk.org
> Subject: [PATCH] [v2] vdpa/ifc: increase readability in function
> 
> Optimize several parameters form order to better readability
To the best of my English knowledge, there's a grammar error here.

How about changing it to:
Use bool type for function's switch parameter, this could avoid passing "1" or 
"0"
which is not reader friendly.

BRs,
Xiao

> 
> Signed-off-by: jilei chen 
> ---
> v2:
> * Concise subject of the patch
> * Optimize function parameters
> ---
>  drivers/vdpa/ifc/ifcvf_vdpa.c | 16 
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/vdpa/ifc/ifcvf_vdpa.c b/drivers/vdpa/ifc/ifcvf_vdpa.c
> index 1dc813d0a3..365da2a8b9 100644
> --- a/drivers/vdpa/ifc/ifcvf_vdpa.c
> +++ b/drivers/vdpa/ifc/ifcvf_vdpa.c
> @@ -182,7 +182,7 @@ ifcvf_vfio_setup(struct ifcvf_internal *internal)
>  }
> 
>  static int
> -ifcvf_dma_map(struct ifcvf_internal *internal, int do_map)
> +ifcvf_dma_map(struct ifcvf_internal *internal, bool do_map)
>  {
>   uint32_t i;
>   int ret;
> @@ -538,11 +538,11 @@ update_datapath(struct ifcvf_internal *internal)
>   if (!rte_atomic32_read(&internal->running) &&
>   (rte_atomic32_read(&internal->started) &&
>rte_atomic32_read(&internal->dev_attached))) {
> - ret = ifcvf_dma_map(internal, 1);
> + ret = ifcvf_dma_map(internal, true);
>   if (ret)
>   goto err;
> 
> - ret = vdpa_enable_vfio_intr(internal, 0);
> + ret = vdpa_enable_vfio_intr(internal, false);
>   if (ret)
>   goto err;
> 
> @@ -568,7 +568,7 @@ update_datapath(struct ifcvf_internal *internal)
>   if (ret)
>   goto err;
> 
> - ret = ifcvf_dma_map(internal, 0);
> + ret = ifcvf_dma_map(internal, false);
>   if (ret)
>   goto err;
> 
> @@ -850,7 +850,7 @@ ifcvf_sw_fallback_switchover(struct ifcvf_internal
> *internal)
>   goto error;
> 
>   /* set up interrupt for interrupt relay */
> - ret = vdpa_enable_vfio_intr(internal, 1);
> + ret = vdpa_enable_vfio_intr(internal, true);
>   if (ret)
>   goto unmap;
> 
> @@ -875,7 +875,7 @@ ifcvf_sw_fallback_switchover(struct ifcvf_internal
> *internal)
>  unset_intr:
>   vdpa_disable_vfio_intr(internal);
>  unmap:
> - ifcvf_dma_map(internal, 0);
> + ifcvf_dma_map(internal, false);
>  error:
>   return -1;
>  }
> @@ -934,7 +934,7 @@ ifcvf_dev_close(int vid)
>   vdpa_disable_vfio_intr(internal);
> 
>   /* unset DMA map for guest memory */
> - ifcvf_dma_map(internal, 0);
> + ifcvf_dma_map(internal, false);
> 
>   internal->sw_fallback_running = false;
>   } else {
> @@ -1130,7 +1130,7 @@ ifcvf_set_vring_state(int vid, int vring, int state)
>   }
> 
>   if (state && !hw->vring[vring].enable) {
> - ret = vdpa_enable_vfio_intr(internal, 0);
> + ret = vdpa_enable_vfio_intr(internal, false);
>   if (ret)
>   return ret;
>   }
> --
> 2.12.2
> 
>

[dpdk-dev] [Bug 815] Incorrect average cycles print in Service Summary

2021-09-27 Thread bugzilla

https://bugs.dpdk.org/show_bug.cgi?id=815

Bug ID: 815
   Summary: Incorrect average cycles print in Service Summary
   Product: DPDK
   Version: 20.11
  Hardware: All
OS: All
Status: UNCONFIRMED
  Severity: normal
  Priority: Normal
 Component: eventdev
  Assignee: dev@dpdk.org
  Reporter: heng.w...@ericsson.com
  Target Milestone: ---

The avg is incorrect in the service summary:

[ Services ]
Services Summary
  red_0: stats 1calls 4116836818cycles 1895089655988avg: 0
  txa_0: stats 1calls 1074980347cycles 377139519878 avg:
350
  rte_event_eth_rx_adapter_0: stats 1   calls 871649367 cycles 2820073051742   
avg: 3235
  worker_service: stats 1   calls 3522889906cycles 1017830212880   
avg: 0
  timer_service: stats 1calls 3326551197cycles 748157460934
avg: 0

The avg in the last 2 rows are incorrect. I think it might be some race
condition between the service run updating the cycles, and the service print
accessing the cycles.

-- 
You are receiving this mail because:
You are the assignee for the bug.

Re: [dpdk-dev] [EXT] [PATCH v4 02/10] security: add UDP params for IPsec NAT-T

2021-09-27 Thread Nicolau, Radu




On 9/24/2021 10:11 AM, Hemant Agrawal wrote:



On 9/6/2021 4:39 PM, Nicolau, Radu wrote:


On 9/5/2021 3:19 PM, Akhil Goyal wrote:

Hi Radu,

Add support for specifying UDP port params for UDP encapsulation 
option.


Signed-off-by: Declan Doherty 
Signed-off-by: Radu Nicolau 
Signed-off-by: Abhijit Sinha 
Signed-off-by: Daniel Martin Buckley 

Do we really need to specify the port numbers for NAT-T?
I suppose they are fixed as 4500.
Could you please specify what the user need to set here for session
creation?


From what I'm seeing here 
https://datatracker.ietf.org/doc/html/rfc3948#section-2.1 there is no 
requirement in general for UDP encapsulation so I think it's better 
to make the API flexible as to allow any port to be used.



This section states that :

o  the Source Port and Destination Port MUST be the same as that used by IKE 
traffic,

IKE usages port 4500

am I missing something?



I think there's enough confusion in the RFCs so I think it's better to 
keep this option flexible:


For example https://datatracker.ietf.org/doc/html/rfc5996#section-2.23:


It is a common practice of NATs to translate TCP and UDP port numbers
as well as addresses and use the port numbers of inbound packets to
decide which internal node should get a given packet.  For this
reason, even though IKE packets MUST be sent to and from UDP port 500
or 4500, they MUST be accepted coming from any port and responses
MUST be sent to the port from whence they came.  This is because the
ports may be modified as the packets pass through NATs.  Similarly,
IP addresses of the IKE endpoints are generally not included in the
IKE payloads because the payloads are cryptographically protected and
could not be transparently modified by NATs.

Re: [dpdk-dev] [PATCH v4 18/18] net/i40e: fix redefinition warning

2021-09-27 Thread Xing, Beilei




> -Original Message-
> From: Zhang, RobinX 
> Sent: Monday, September 6, 2021 10:03 AM
> To: dev@dpdk.org
> Cc: Xing, Beilei ; Zhang, Qi Z ;
> Zhang, Helin ; Wu, Jingjing ;
> remy.hor...@intel.com; jijiang@intel.com; jing.d.c...@intel.com; Zhu,
> Heqing ; Liang, Cunming
> ; Lu, Wenzhuo ; Zhang,
> Roy Fan ; Chilikin, Andrey
> ; echau...@redhat.com; Guo, Junfeng
> ; Yang, SteveX ; Zhang,
> RobinX 
> Subject: [PATCH v4 18/18] net/i40e: fix redefinition warning
> 
> After update i40e share code, there will be a redefinition compile warning.
> This patch fix the situation by remove duplicate definition in i40e_ethdev.c
> 
> Fixes: eef2daf2e199 ("net/i40e: fix link update no wait")
Need to cc stable?

> 
> Signed-off-by: Robin Zhang 
> ---
>  drivers/net/i40e/i40e_ethdev.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index 7b230e2ed1..4fc44dc5e2 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -2886,7 +2886,6 @@ static __rte_always_inline void
> update_link_reg(struct i40e_hw *hw, struct rte_eth_link *link)  {
>  /* Link status registers and values*/
> -#define I40E_PRTMAC_LINKSTA  0x001E2420
>  #define I40E_REG_LINK_UP 0x4080
>  #define I40E_PRTMAC_MACC 0x001E24E0
>  #define I40E_REG_MACC_25GB   0x0002
> @@ -2899,7 +2898,7 @@ update_link_reg(struct i40e_hw *hw, struct
> rte_eth_link *link)
>   uint32_t link_speed;
>   uint32_t reg_val;
> 
> - reg_val = I40E_READ_REG(hw, I40E_PRTMAC_LINKSTA);
> + reg_val = I40E_READ_REG(hw, I40E_PRTMAC_LINKSTA(0));
>   link_speed = reg_val & I40E_REG_SPEED_MASK;
>   reg_val &= I40E_REG_LINK_UP;
>   link->link_status = (reg_val == I40E_REG_LINK_UP) ? 1 : 0;
> --
> 2.25.1

[dpdk-dev] [PATCH] vdpa/ifc: increase readability in function

2021-09-27 Thread jilei chen

Optimize several parameters form order to better readability

Signed-off-by: jilei chen 
---
 drivers/vdpa/ifc/ifcvf_vdpa.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/vdpa/ifc/ifcvf_vdpa.c b/drivers/vdpa/ifc/ifcvf_vdpa.c
index 1dc813d0a3..365da2a8b9 100644
--- a/drivers/vdpa/ifc/ifcvf_vdpa.c
+++ b/drivers/vdpa/ifc/ifcvf_vdpa.c
@@ -182,7 +182,7 @@ ifcvf_vfio_setup(struct ifcvf_internal *internal)
 }
 
 static int
-ifcvf_dma_map(struct ifcvf_internal *internal, int do_map)
+ifcvf_dma_map(struct ifcvf_internal *internal, bool do_map)
 {
uint32_t i;
int ret;
@@ -538,11 +538,11 @@ update_datapath(struct ifcvf_internal *internal)
if (!rte_atomic32_read(&internal->running) &&
(rte_atomic32_read(&internal->started) &&
 rte_atomic32_read(&internal->dev_attached))) {
-   ret = ifcvf_dma_map(internal, 1);
+   ret = ifcvf_dma_map(internal, true);
if (ret)
goto err;
 
-   ret = vdpa_enable_vfio_intr(internal, 0);
+   ret = vdpa_enable_vfio_intr(internal, false);
if (ret)
goto err;
 
@@ -568,7 +568,7 @@ update_datapath(struct ifcvf_internal *internal)
if (ret)
goto err;
 
-   ret = ifcvf_dma_map(internal, 0);
+   ret = ifcvf_dma_map(internal, false);
if (ret)
goto err;
 
@@ -850,7 +850,7 @@ ifcvf_sw_fallback_switchover(struct ifcvf_internal 
*internal)
goto error;
 
/* set up interrupt for interrupt relay */
-   ret = vdpa_enable_vfio_intr(internal, 1);
+   ret = vdpa_enable_vfio_intr(internal, true);
if (ret)
goto unmap;
 
@@ -875,7 +875,7 @@ ifcvf_sw_fallback_switchover(struct ifcvf_internal 
*internal)
 unset_intr:
vdpa_disable_vfio_intr(internal);
 unmap:
-   ifcvf_dma_map(internal, 0);
+   ifcvf_dma_map(internal, false);
 error:
return -1;
 }
@@ -934,7 +934,7 @@ ifcvf_dev_close(int vid)
vdpa_disable_vfio_intr(internal);
 
/* unset DMA map for guest memory */
-   ifcvf_dma_map(internal, 0);
+   ifcvf_dma_map(internal, false);
 
internal->sw_fallback_running = false;
} else {
@@ -1130,7 +1130,7 @@ ifcvf_set_vring_state(int vid, int vring, int state)
}
 
if (state && !hw->vring[vring].enable) {
-   ret = vdpa_enable_vfio_intr(internal, 0);
+   ret = vdpa_enable_vfio_intr(internal, false);
if (ret)
return ret;
}
-- 
2.12.2

[dpdk-dev] [PATCH] [v2] vdpa/ifc: increase readability in function

2021-09-27 Thread jilei chen

Optimize several parameters form order to better readability

Signed-off-by: jilei chen 
---
v2:
* Concise subject of the patch
* Optimize function parameters
---
 drivers/vdpa/ifc/ifcvf_vdpa.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/vdpa/ifc/ifcvf_vdpa.c b/drivers/vdpa/ifc/ifcvf_vdpa.c
index 1dc813d0a3..365da2a8b9 100644
--- a/drivers/vdpa/ifc/ifcvf_vdpa.c
+++ b/drivers/vdpa/ifc/ifcvf_vdpa.c
@@ -182,7 +182,7 @@ ifcvf_vfio_setup(struct ifcvf_internal *internal)
 }
 
 static int
-ifcvf_dma_map(struct ifcvf_internal *internal, int do_map)
+ifcvf_dma_map(struct ifcvf_internal *internal, bool do_map)
 {
uint32_t i;
int ret;
@@ -538,11 +538,11 @@ update_datapath(struct ifcvf_internal *internal)
if (!rte_atomic32_read(&internal->running) &&
(rte_atomic32_read(&internal->started) &&
 rte_atomic32_read(&internal->dev_attached))) {
-   ret = ifcvf_dma_map(internal, 1);
+   ret = ifcvf_dma_map(internal, true);
if (ret)
goto err;
 
-   ret = vdpa_enable_vfio_intr(internal, 0);
+   ret = vdpa_enable_vfio_intr(internal, false);
if (ret)
goto err;
 
@@ -568,7 +568,7 @@ update_datapath(struct ifcvf_internal *internal)
if (ret)
goto err;
 
-   ret = ifcvf_dma_map(internal, 0);
+   ret = ifcvf_dma_map(internal, false);
if (ret)
goto err;
 
@@ -850,7 +850,7 @@ ifcvf_sw_fallback_switchover(struct ifcvf_internal 
*internal)
goto error;
 
/* set up interrupt for interrupt relay */
-   ret = vdpa_enable_vfio_intr(internal, 1);
+   ret = vdpa_enable_vfio_intr(internal, true);
if (ret)
goto unmap;
 
@@ -875,7 +875,7 @@ ifcvf_sw_fallback_switchover(struct ifcvf_internal 
*internal)
 unset_intr:
vdpa_disable_vfio_intr(internal);
 unmap:
-   ifcvf_dma_map(internal, 0);
+   ifcvf_dma_map(internal, false);
 error:
return -1;
 }
@@ -934,7 +934,7 @@ ifcvf_dev_close(int vid)
vdpa_disable_vfio_intr(internal);
 
/* unset DMA map for guest memory */
-   ifcvf_dma_map(internal, 0);
+   ifcvf_dma_map(internal, false);
 
internal->sw_fallback_running = false;
} else {
@@ -1130,7 +1130,7 @@ ifcvf_set_vring_state(int vid, int vring, int state)
}
 
if (state && !hw->vring[vring].enable) {
-   ret = vdpa_enable_vfio_intr(internal, 0);
+   ret = vdpa_enable_vfio_intr(internal, false);
if (ret)
return ret;
}
-- 
2.12.2

[dpdk-dev] [PATCH] [v3] vdpa/ifc: increase readability in function

2021-09-27 Thread jilei chen

Use bool type for function's switch parameter,
this could avoid passing "1" or "0" which is not reader friendly.

Signed-off-by: jilei chen 
---
v3:
* Update inappropriate description

v2:
* Concise subject of the patch
* Optimize function parameters
---
 drivers/vdpa/ifc/ifcvf_vdpa.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/vdpa/ifc/ifcvf_vdpa.c b/drivers/vdpa/ifc/ifcvf_vdpa.c
index 1dc813d0a3..365da2a8b9 100644
--- a/drivers/vdpa/ifc/ifcvf_vdpa.c
+++ b/drivers/vdpa/ifc/ifcvf_vdpa.c
@@ -182,7 +182,7 @@ ifcvf_vfio_setup(struct ifcvf_internal *internal)
 }
 
 static int
-ifcvf_dma_map(struct ifcvf_internal *internal, int do_map)
+ifcvf_dma_map(struct ifcvf_internal *internal, bool do_map)
 {
uint32_t i;
int ret;
@@ -538,11 +538,11 @@ update_datapath(struct ifcvf_internal *internal)
if (!rte_atomic32_read(&internal->running) &&
(rte_atomic32_read(&internal->started) &&
 rte_atomic32_read(&internal->dev_attached))) {
-   ret = ifcvf_dma_map(internal, 1);
+   ret = ifcvf_dma_map(internal, true);
if (ret)
goto err;
 
-   ret = vdpa_enable_vfio_intr(internal, 0);
+   ret = vdpa_enable_vfio_intr(internal, false);
if (ret)
goto err;
 
@@ -568,7 +568,7 @@ update_datapath(struct ifcvf_internal *internal)
if (ret)
goto err;
 
-   ret = ifcvf_dma_map(internal, 0);
+   ret = ifcvf_dma_map(internal, false);
if (ret)
goto err;
 
@@ -850,7 +850,7 @@ ifcvf_sw_fallback_switchover(struct ifcvf_internal 
*internal)
goto error;
 
/* set up interrupt for interrupt relay */
-   ret = vdpa_enable_vfio_intr(internal, 1);
+   ret = vdpa_enable_vfio_intr(internal, true);
if (ret)
goto unmap;
 
@@ -875,7 +875,7 @@ ifcvf_sw_fallback_switchover(struct ifcvf_internal 
*internal)
 unset_intr:
vdpa_disable_vfio_intr(internal);
 unmap:
-   ifcvf_dma_map(internal, 0);
+   ifcvf_dma_map(internal, false);
 error:
return -1;
 }
@@ -934,7 +934,7 @@ ifcvf_dev_close(int vid)
vdpa_disable_vfio_intr(internal);
 
/* unset DMA map for guest memory */
-   ifcvf_dma_map(internal, 0);
+   ifcvf_dma_map(internal, false);
 
internal->sw_fallback_running = false;
} else {
@@ -1130,7 +1130,7 @@ ifcvf_set_vring_state(int vid, int vring, int state)
}
 
if (state && !hw->vring[vring].enable) {
-   ret = vdpa_enable_vfio_intr(internal, 0);
+   ret = vdpa_enable_vfio_intr(internal, false);
if (ret)
return ret;
}
-- 
2.12.2

Re: [dpdk-dev] [PATCH v2 02/15] crypto: add total raw buffer length

2021-09-27 Thread Ananyev, Konstantin


Hi Akhil,

> > > On 9/21/2021 12:58 AM, Akhil Goyal wrote:
> > > >>> From: Gagandeep Singh 
> > > >>>
> > > >>> The current crypto raw data vectors is extended to support
> > > >>> rte_security usecases, where we need total data length to know
> > > >>> how much additional memory space is available in buffer other
> > > >>> than data length so that driver/HW can write expanded size
> > > >>> data after encryption.
> > > >>>
> > > >>> Signed-off-by: Gagandeep Singh 
> > > >>> Acked-by: Akhil Goyal 
> > > >>> ---
> > > >>>   lib/cryptodev/rte_crypto_sym.h | 6 ++
> > > >>>   1 file changed, 6 insertions(+)
> > > >>>
> > > >>> diff --git a/lib/cryptodev/rte_crypto_sym.h
> > > >> b/lib/cryptodev/rte_crypto_sym.h
> > > >>> index dcc0bd5933..e5cef1fb72 100644
> > > >>> --- a/lib/cryptodev/rte_crypto_sym.h
> > > >>> +++ b/lib/cryptodev/rte_crypto_sym.h
> > > >>> @@ -37,6 +37,8 @@ struct rte_crypto_vec {
> > > >>>   rte_iova_t iova;
> > > >>>   /** length of the data buffer */
> > > >>>   uint32_t len;
> > > >>> + /** total buffer length*/
> > > >>> + uint32_t tot_len;
> > > >>>   };
> > > >>>
> > > >>>   /**
> > > >>> @@ -980,12 +982,14 @@ rte_crypto_mbuf_to_vec(const struct
> > rte_mbuf
> > > >> *mb, uint32_t ofs, uint32_t len,
> > > >>>   seglen = mb->data_len - ofs;
> > > >>>   if (len <= seglen) {
> > > >>>   vec[0].len = len;
> > > >>> + vec[0].tot_len = mb->buf_len;
> > > >> That doesn't look right.
> > > >> We should take into a count mbuf headroom and input offset.
> > > >> Something like:
> > > >> vec[0].tot_len = mb->buf_len - rte_pktmbuf_headroom(m) - ofs;
> > > >> Same in other places below.
> > > >>
> > > > I believe the packet can expand into headroom based on the protocol
> > support.
> > > Yes, total length is representing the total buffer length available. The
> > > security protocol shall take care of the headroom and offsets.
> >
> > Hmm, and how it will now how many bytes are in head-room, and how
> > many are in tail-room?
> > We either need to provide values for both, or assume that only tail-room is
> > available for the driver.
> I believe it should be starting point where output can be written till the 
> end of buffer.

Right, that's:
base = rte_pktmbuf_mtod_offset(mb, void *, ofs); 

> There should not be any headroom and tailroom for raw buffers.

I am not talking about raw buffers, what I am saying that some space in the mbuf
might be already occupied, that's why we have data_off inside rte_mbuf, etc. 

> It should be mbuf->buf_len - ofs.

No, it should be:
len = mb->buf_len - rte_pktmbuf_headroom(m) - ofs;
Otherwise PMD can overwrite memory beyond its buf_len.

Re: [dpdk-dev] [PATCH v4 18/18] net/i40e: fix redefinition warning

2021-09-27 Thread Zhang, RobinX

Hi, Beilei

> -Original Message-
> From: Xing, Beilei 
> Sent: Monday, September 27, 2021 5:18 PM
> To: Zhang, RobinX ; dev@dpdk.org
> Cc: Zhang, Qi Z ; Zhang, Helin
> ; Wu, Jingjing ;
> remy.hor...@intel.com; jijiang@intel.com; jing.d.c...@intel.com; Zhu,
> Heqing ; Liang, Cunming
> ; Lu, Wenzhuo ; Zhang,
> Roy Fan ; Chilikin, Andrey
> ; echau...@redhat.com; Guo, Junfeng
> ; Yang, SteveX 
> Subject: RE: [PATCH v4 18/18] net/i40e: fix redefinition warning
> 
> 
> 
> > -Original Message-
> > From: Zhang, RobinX 
> > Sent: Monday, September 6, 2021 10:03 AM
> > To: dev@dpdk.org
> > Cc: Xing, Beilei ; Zhang, Qi Z
> > ; Zhang, Helin ; Wu,
> > Jingjing ; remy.hor...@intel.com;
> > jijiang@intel.com; jing.d.c...@intel.com; Zhu, Heqing
> > ; Liang, Cunming ; Lu,
> > Wenzhuo ; Zhang, Roy Fan
> > ; Chilikin, Andrey
> > ; echau...@redhat.com; Guo, Junfeng
> > ; Yang, SteveX ; Zhang,
> > RobinX 
> > Subject: [PATCH v4 18/18] net/i40e: fix redefinition warning
> >
> > After update i40e share code, there will be a redefinition compile warning.
> > This patch fix the situation by remove duplicate definition in
> > i40e_ethdev.c
> >
> > Fixes: eef2daf2e199 ("net/i40e: fix link update no wait")
> Need to cc stable?

This patch is dependent on share code, so cannot cc stable.

> 
> >
> > Signed-off-by: Robin Zhang 
> > ---
> >  drivers/net/i40e/i40e_ethdev.c | 3 +--
> >  1 file changed, 1 insertion(+), 2 deletions(-)
> >
> > diff --git a/drivers/net/i40e/i40e_ethdev.c
> > b/drivers/net/i40e/i40e_ethdev.c index 7b230e2ed1..4fc44dc5e2 100644
> > --- a/drivers/net/i40e/i40e_ethdev.c
> > +++ b/drivers/net/i40e/i40e_ethdev.c
> > @@ -2886,7 +2886,6 @@ static __rte_always_inline void
> > update_link_reg(struct i40e_hw *hw, struct rte_eth_link *link)  {
> >  /* Link status registers and values*/
> > -#define I40E_PRTMAC_LINKSTA0x001E2420
> >  #define I40E_REG_LINK_UP   0x4080
> >  #define I40E_PRTMAC_MACC   0x001E24E0
> >  #define I40E_REG_MACC_25GB 0x0002
> > @@ -2899,7 +2898,7 @@ update_link_reg(struct i40e_hw *hw, struct
> > rte_eth_link *link)
> > uint32_t link_speed;
> > uint32_t reg_val;
> >
> > -   reg_val = I40E_READ_REG(hw, I40E_PRTMAC_LINKSTA);
> > +   reg_val = I40E_READ_REG(hw, I40E_PRTMAC_LINKSTA(0));
> > link_speed = reg_val & I40E_REG_SPEED_MASK;
> > reg_val &= I40E_REG_LINK_UP;
> > link->link_status = (reg_val == I40E_REG_LINK_UP) ? 1 : 0;
> > --
> > 2.25.1

Re: [dpdk-dev] [PATCH v5 12/12] raw/ioat: deprecate ioat rawdev driver

2021-09-27 Thread Walsh, Conor

> From: Richardson, Bruce 
> Sent: Friday 24 September 2021 17:57
> To: Walsh, Conor 
> Cc: fengcheng...@huawei.com; jer...@marvell.com; Laatz, Kevin
> ; dev@dpdk.org
> Subject: Re: [PATCH v5 12/12] raw/ioat: deprecate ioat rawdev driver
> 
> On Fri, Sep 24, 2021 at 02:33:35PM +, Conor Walsh wrote:
> > Deprecate the rawdev IOAT driver as both IOAT and IDXD drivers have
> > moved to dmadev.
> >
> > Signed-off-by: Conor Walsh 
> > ---
> 
> This probably needs a release note entry for it too.
> With such a RN addition, feel free to add my acked-by.

Thanks Bruce, I will add a deprecation notice in v6.
/Conor.

> 
> >  MAINTAINERS | 2 +-
> >  doc/guides/rawdevs/ioat.rst | 4 
> >  2 files changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index ccabba9169..a4bcd2d024 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -1322,7 +1322,7 @@ T: git://dpdk.org/next/dpdk-next-net-intel
> >  F: drivers/raw/ifpga/
> >  F: doc/guides/rawdevs/ifpga.rst
> >
> > -IOAT Rawdev
> > +IOAT Rawdev - DEPRECATED
> >  M: Bruce Richardson 
> >  F: drivers/raw/ioat/
> >  F: doc/guides/rawdevs/ioat.rst
> > diff --git a/doc/guides/rawdevs/ioat.rst b/doc/guides/rawdevs/ioat.rst
> > index a65530bd30..98d15dd032 100644
> > --- a/doc/guides/rawdevs/ioat.rst
> > +++ b/doc/guides/rawdevs/ioat.rst
> > @@ -6,6 +6,10 @@
> >  IOAT Rawdev Driver
> >  ===
> >
> > +.. warning::
> > +As of DPDK 21.11 the rawdev implementation of the IOAT driver has
> been deprecated.
> > +Please use the dmadev library instead.
> > +
> >  The ``ioat`` rawdev driver provides a poll-mode driver (PMD) for Intel\
> |reg|
> >  Data Streaming Accelerator `(Intel DSA)
> >   accelerator>`_ and for Intel\ |reg|
> > --
> > 2.25.1
> >

Re: [dpdk-dev] [PATCH v4 00/18] i40e base code update

2021-09-27 Thread Xing, Beilei



> -Original Message-
> From: Zhang, RobinX 
> Sent: Monday, September 6, 2021 10:03 AM
> To: dev@dpdk.org
> Cc: Xing, Beilei ; Zhang, Qi Z ;
> Zhang, Helin ; Wu, Jingjing ;
> remy.hor...@intel.com; jijiang@intel.com; jing.d.c...@intel.com; Zhu,
> Heqing ; Liang, Cunming
> ; Lu, Wenzhuo ; Zhang,
> Roy Fan ; Chilikin, Andrey
> ; echau...@redhat.com; Guo, Junfeng
> ; Yang, SteveX ; Zhang,
> RobinX 
> Subject: [PATCH v4 00/18] i40e base code update
> 
> update i40e base code.
> 
> source code of i40e driver:
> cid-i40e.2021.08.16.tar.gz
> 
> changelog in i40e share repo:
> From 59a080f4fafe ("i40e-shared: Add opcode 0x0406 and 0x0416 to Linux
> support") To 2c7aab559654 ("i40e-shared: Add defines related to DDP")
> 
> The following commits are ignored:
> cb9139e3bce8 ("i40e-shared: Fix not blinking X722 with x557 PHY via ‘ethtool
> -p'")
> c09d4f9cf390 ("i40e-shared: i40e-shared: Fix build warning -Wformat related
> to integer size")
> ff8a1abc6c17 ("i40e-shared: Fix build warning with __packed") 59a080f4fafe
> ("i40e-shared: Add opcode 0x0406 and 0x0416 to Linux
> support")
> 
> v4:
> - update base code to cid-i40e.2021.08.16
> v3:
> - there has a fix patch contains two issues, split it into two patches
> v2:
> - refine commit messages and macro name
> 
> Robin Zhang (18):
>   net/i40e/base: add new versions of send ASQ command functions
>   net/i40e/base: add support for Min Rollback Revision for 4 more X722
> modules
>   net/i40e/base: set TSA table values when parsing CEE configuration
>   net/i40e/base: define new Shadow RAM pointers
>   net/i40e/base: fix PHY type identifiers for 2.5G and 5G adapters
>   net/i40e/base: fix PF reset failed
>   net/i40e/base: fix update link data for X722
>   net/i40e/base: fix AOC media type reported by ethtool
>   net/i40e/base: add flags and fields for double vlan processing
>   net/i40e/base: fix headers to match functions
>   net/i40e/base: fix potentially uninitialized variables in NVM code
>   net/i40e/base: fix checksum is used before return value is checked
>   net/i40e/base: add defs for MAC frequency calculation if no link
>   net/i40e/base: separate kernel allocated rx_bi rings from AF_XDP rings
>   net/i40e/base: Update FVL FW API version to 1.15
>   net/i40e/base: add defines related to DDP
>   net/i40e/base: update version in readme
>   net/i40e: fix redefinition warning
> 
>  drivers/net/i40e/base/README|   2 +-
>  drivers/net/i40e/base/i40e_adminq.c |  79 +--
>  drivers/net/i40e/base/i40e_adminq_cmd.h |  55 ++--
>  drivers/net/i40e/base/i40e_common.c | 175 +++-
>  drivers/net/i40e/base/i40e_dcb.c|  10 +-
>  drivers/net/i40e/base/i40e_lan_hmc.c|   2 +-
>  drivers/net/i40e/base/i40e_nvm.c|   7 +-
>  drivers/net/i40e/base/i40e_prototype.h  |  17 +++
>  drivers/net/i40e/base/i40e_register.h   |  10 ++
>  drivers/net/i40e/base/i40e_type.h   |  26 +++-
>  drivers/net/i40e/i40e_ethdev.c  |   3 +-
>  11 files changed, 318 insertions(+), 68 deletions(-)
> 
> --
> 2.25.1

Acked-by: Beilei Xing

Re: [dpdk-dev] [PATCH v2 1/9] drivers/crypto: introduce IPsec-mb framework

2021-09-27 Thread Power, Ciara

Hi Thomas,

>-Original Message-
>From: Thomas Monjalon 
>Sent: Thursday 23 September 2021 16:46
>To: Power, Ciara ; Zhang, Roy Fan
>
>Cc: dev@dpdk.org; Bronowski, PiotrX ;
>gak...@marvell.com; De Lara Guarch, Pablo
>; Ray Kinsella 
>Subject: Re: [PATCH v2 1/9] drivers/crypto: introduce IPsec-mb framework
>
>23/09/2021 17:28, Ciara Power:
>> From: Fan Zhang 
>>
>> This patch introduces the new framework making all common code of SW
>> crypto PMDs implementations built on top of intel-ipsec-mb library
>> shareable, also helps to reduce future effort on the code maintenance
>> and feature updates.
>
>Which PMD is it supposed to replace?
>I guess it runs only on x86?
>Please be more specific in the description above, thanks.
>

The 5 crypto PMDs that are combined into this IPsec-mb PMD in subsequent 
patches are:
- AESNI_MB
- AESNI_GCM
- KASUMI
- SNOW3G
- ZUC

There is no change from the user point of view for these PMDs, they still run 
on x86 as before and use the same EAL arguments.
I can add more detail in the v3 of this patch.

Thanks,
Ciara

[dpdk-dev] [PATCH] ip_frag: modify the fragment offset and mf

2021-09-27 Thread huichao cai

From: huichao cai 

According to RFC791,the fragment offset value should be
calculated based on the long datagram,the more fragments flag
for the last fragment carries the same value as the long datagram.

Signed-off-by: huichao cai 
---
 lib/ip_frag/rte_ipv4_fragmentation.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/lib/ip_frag/rte_ipv4_fragmentation.c 
b/lib/ip_frag/rte_ipv4_fragmentation.c
index 2e7739d..fead5a9 100644
--- a/lib/ip_frag/rte_ipv4_fragmentation.c
+++ b/lib/ip_frag/rte_ipv4_fragmentation.c
@@ -75,7 +75,7 @@ static inline void __free_fragments(struct rte_mbuf *mb[], 
uint32_t num)
uint32_t out_pkt_pos, in_seg_data_pos;
uint32_t more_in_segs;
uint16_t fragment_offset, flag_offset, frag_size, header_len;
-   uint16_t frag_bytes_remaining;
+   uint16_t frag_bytes_remaining, not_last_frag;
 
/*
 * Formal parameter checking.
@@ -116,7 +116,9 @@ static inline void __free_fragments(struct rte_mbuf *mb[], 
uint32_t num)
in_seg = pkt_in;
in_seg_data_pos = header_len;
out_pkt_pos = 0;
-   fragment_offset = 0;
+   fragment_offset = (uint16_t)((flag_offset &
+   RTE_IPV4_HDR_OFFSET_MASK) << RTE_IPV4_HDR_FO_SHIFT);
+   not_last_frag = (uint16_t)(flag_offset & IPV4_HDR_MF_MASK);
 
more_in_segs = 1;
while (likely(more_in_segs)) {
@@ -186,7 +188,8 @@ static inline void __free_fragments(struct rte_mbuf *mb[], 
uint32_t num)
 
__fill_ipv4hdr_frag(out_hdr, in_hdr, header_len,
(uint16_t)out_pkt->pkt_len,
-   flag_offset, fragment_offset, more_in_segs);
+   flag_offset, fragment_offset,
+   not_last_frag || more_in_segs);
 
fragment_offset = (uint16_t)(fragment_offset +
out_pkt->pkt_len - header_len);
-- 
1.8.3.1

[dpdk-dev] [PATCH] [v3] vdpa/ifc: increase readability in function

2021-09-27 Thread jilei chen

Use bool type for function's switch parameter,
this could avoid passing "1" or "0" which is not reader friendly.

Signed-off-by: jilei chen 
---
v3:
* Update inappropriate description

v2:
* Concise subject of the patch
* Optimize function parameters
---
 drivers/vdpa/ifc/ifcvf_vdpa.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/vdpa/ifc/ifcvf_vdpa.c b/drivers/vdpa/ifc/ifcvf_vdpa.c
index 1dc813d0a3..365da2a8b9 100644
--- a/drivers/vdpa/ifc/ifcvf_vdpa.c
+++ b/drivers/vdpa/ifc/ifcvf_vdpa.c
@@ -182,7 +182,7 @@ ifcvf_vfio_setup(struct ifcvf_internal *internal)
 }
 
 static int
-ifcvf_dma_map(struct ifcvf_internal *internal, int do_map)
+ifcvf_dma_map(struct ifcvf_internal *internal, bool do_map)
 {
uint32_t i;
int ret;
@@ -538,11 +538,11 @@ update_datapath(struct ifcvf_internal *internal)
if (!rte_atomic32_read(&internal->running) &&
(rte_atomic32_read(&internal->started) &&
 rte_atomic32_read(&internal->dev_attached))) {
-   ret = ifcvf_dma_map(internal, 1);
+   ret = ifcvf_dma_map(internal, true);
if (ret)
goto err;
 
-   ret = vdpa_enable_vfio_intr(internal, 0);
+   ret = vdpa_enable_vfio_intr(internal, false);
if (ret)
goto err;
 
@@ -568,7 +568,7 @@ update_datapath(struct ifcvf_internal *internal)
if (ret)
goto err;
 
-   ret = ifcvf_dma_map(internal, 0);
+   ret = ifcvf_dma_map(internal, false);
if (ret)
goto err;
 
@@ -850,7 +850,7 @@ ifcvf_sw_fallback_switchover(struct ifcvf_internal 
*internal)
goto error;
 
/* set up interrupt for interrupt relay */
-   ret = vdpa_enable_vfio_intr(internal, 1);
+   ret = vdpa_enable_vfio_intr(internal, true);
if (ret)
goto unmap;
 
@@ -875,7 +875,7 @@ ifcvf_sw_fallback_switchover(struct ifcvf_internal 
*internal)
 unset_intr:
vdpa_disable_vfio_intr(internal);
 unmap:
-   ifcvf_dma_map(internal, 0);
+   ifcvf_dma_map(internal, false);
 error:
return -1;
 }
@@ -934,7 +934,7 @@ ifcvf_dev_close(int vid)
vdpa_disable_vfio_intr(internal);
 
/* unset DMA map for guest memory */
-   ifcvf_dma_map(internal, 0);
+   ifcvf_dma_map(internal, false);
 
internal->sw_fallback_running = false;
} else {
@@ -1130,7 +1130,7 @@ ifcvf_set_vring_state(int vid, int vring, int state)
}
 
if (state && !hw->vring[vring].enable) {
-   ret = vdpa_enable_vfio_intr(internal, 0);
+   ret = vdpa_enable_vfio_intr(internal, false);
if (ret)
return ret;
}
-- 
2.12.2

Re: [dpdk-dev] [PATCH V3 01/24] pipeline: move data structures to internal header file

2021-09-27 Thread Thomas Monjalon

13/09/2021 18:44, Cristian Dumitrescu:
> Start to consolidate the data structures and inline functions required
> by the pipeline instructions into an internal header file.
> 
> Signed-off-by: Cristian Dumitrescu 

Series applied, thanks.

Re: [dpdk-dev] [PATCH] pipeline: improve handling of learner table action arguments

2021-09-27 Thread Thomas Monjalon

14/09/2021 21:00, Cristian Dumitrescu:
> The arguments of actions that are learned are now specified as part of
> the learn instruction as opposed to being statically specified as part
> of the learner table configuration.
> 
> Signed-off-by: Cristian Dumitrescu 

Applied, thanks.

Re: [dpdk-dev] [PATCH] pipeline: remove experimental tag from API

2021-09-27 Thread Thomas Monjalon

01/09/2021 14:20, Jasvinder Singh:
> These APIs were introduced in 18.05, therefore removing
> experimental tag to promote them to stable state.
> 
> Signed-off-by: Jasvinder Singh 
> ---
>  lib/pipeline/rte_port_in_action.h | 10 --
>  lib/pipeline/rte_table_action.h   | 18 --
>  lib/pipeline/version.map  | 16 ++--
>  3 files changed, 6 insertions(+), 38 deletions(-)

Cristian, please can you check whether you intend to keep these functions in 
future?
If they are candidate to be removed, there is no point to promote them.

[dpdk-dev] [PATCH v6 00/12] dma: add dmadev driver for ioat devices

2021-09-27 Thread Conor Walsh

This patchset adds a dmadev driver and associated documentation to support
Intel QuickData Technology devices, part of the Intel I/O Acceleration
Technology (Intel I/OAT). This driver is intended to ultimately replace
the current IOAT part of the IOAT rawdev driver.
This patchset passes all the driver tests added in the dmadev test suite.

NOTE: This patchset has several dependencies:
 - v23 of the dmadev set [1]
 - v6 of the dmadev test suite [2]
 - v6 of the IDXD driver [3]

[1] http://patches.dpdk.org/project/dpdk/list/?series=19140
[2] http://patches.dpdk.org/project/dpdk/list/?series=19138
[3] http://patches.dpdk.org/project/dpdk/list/?series=19144

---

v6:
 - Added rawdev IOAT deprecation notice to deprecation.rst

v5:
 - Updated to v23 of the dmadev lib.
 - Removed experimental tag for driver from MAINTAINERS.
 - Seperated IOAT and IDXD announcements in release notes.
 - Added missing check for rte_dma_get_dev_id in destroy.
 - Fixed memleak in destroy caused by NULL pointer.
 - Rewrote part of the docs to reduce duplication with DMA and IDXD.
 - Added patch to deprecate the rawdev IOAT driver.
 - Reworked destroy and close functions.
 - Added RTE_DMA_CAPA_HANDLES_ERRORS flag for IOAT versions >=3.4.
 - Other minor changes to IOAT driver.

v4:
 - Changes needed to update from dmadev v21 to v22.
 - Fixed 32-bit build.
 - Made stats reset logic easier to understand.

v3:
 - Added burst capacity function.
 - Stop function now waits for suspend rather than just using a sleep.
 - Changed from vchan idle to vchan status function.
 - Other minor changes to update from dmadev v19 to v21.

v2:
 - Rebased on the above patchsets.
 - Added support for the vchan idle function.
 - Stop function now suspends IOAT channel to allow for reconfig.
 - dmadev_autotest can now be run multiple times using the IOAT driver
   without errors.
 - Added devbind updates for DMA devices
 - Removed some logically dead code found by coverity in the

Conor Walsh (12):
  dma/ioat: add device probe and removal functions
  dma/ioat: create dmadev instances on PCI probe
  dma/ioat: add datapath structures
  dma/ioat: add configuration functions
  dma/ioat: add start and stop functions
  dma/ioat: add data path job submission functions
  dma/ioat: add data path completion functions
  dma/ioat: add statistics
  dma/ioat: add support for vchan status function
  dma/ioat: add burst capacity function
  devbind: move ioat device IDs to dmadev category
  raw/ioat: deprecate ioat rawdev driver

 MAINTAINERS|   8 +-
 doc/guides/dmadevs/index.rst   |   2 +
 doc/guides/dmadevs/ioat.rst| 131 +
 doc/guides/rawdevs/ioat.rst|   4 +
 doc/guides/rel_notes/deprecation.rst   |   7 +
 doc/guides/rel_notes/release_21_11.rst |   6 +
 drivers/dma/ioat/ioat_dmadev.c | 738 +
 drivers/dma/ioat/ioat_hw_defs.h| 295 ++
 drivers/dma/ioat/ioat_internal.h   |  47 ++
 drivers/dma/ioat/meson.build   |   7 +
 drivers/dma/ioat/version.map   |   3 +
 drivers/dma/meson.build|   1 +
 usertools/dpdk-devbind.py  |   6 +-
 13 files changed, 1250 insertions(+), 5 deletions(-)
 create mode 100644 doc/guides/dmadevs/ioat.rst
 create mode 100644 drivers/dma/ioat/ioat_dmadev.c
 create mode 100644 drivers/dma/ioat/ioat_hw_defs.h
 create mode 100644 drivers/dma/ioat/ioat_internal.h
 create mode 100644 drivers/dma/ioat/meson.build
 create mode 100644 drivers/dma/ioat/version.map

-- 
2.25.1

[dpdk-dev] [PATCH v6 01/12] dma/ioat: add device probe and removal functions

2021-09-27 Thread Conor Walsh

Add the basic device probe/remove skeleton code and initial documentation
for new IOAT DMA driver. Maintainers update is also included in this
patch.

Signed-off-by: Conor Walsh 
Reviewed-by: Kevin Laatz 
Reviewed-by: Chengwen Feng 
---
 MAINTAINERS|  6 +++
 doc/guides/dmadevs/index.rst   |  2 +
 doc/guides/dmadevs/ioat.rst| 69 ++
 doc/guides/rel_notes/release_21_11.rst |  6 +++
 drivers/dma/ioat/ioat_dmadev.c | 69 ++
 drivers/dma/ioat/ioat_hw_defs.h| 35 +
 drivers/dma/ioat/ioat_internal.h   | 20 
 drivers/dma/ioat/meson.build   |  7 +++
 drivers/dma/ioat/version.map   |  3 ++
 drivers/dma/meson.build|  1 +
 10 files changed, 218 insertions(+)
 create mode 100644 doc/guides/dmadevs/ioat.rst
 create mode 100644 drivers/dma/ioat/ioat_dmadev.c
 create mode 100644 drivers/dma/ioat/ioat_hw_defs.h
 create mode 100644 drivers/dma/ioat/ioat_internal.h
 create mode 100644 drivers/dma/ioat/meson.build
 create mode 100644 drivers/dma/ioat/version.map

diff --git a/MAINTAINERS b/MAINTAINERS
index 497219e948..ccabba9169 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1209,6 +1209,12 @@ M: Kevin Laatz 
 F: drivers/dma/idxd/
 F: doc/guides/dmadevs/idxd.rst
 
+Intel IOAT
+M: Bruce Richardson 
+M: Conor Walsh 
+F: drivers/dma/ioat/
+F: doc/guides/dmadevs/ioat.rst
+
 
 RegEx Drivers
 -
diff --git a/doc/guides/dmadevs/index.rst b/doc/guides/dmadevs/index.rst
index 5d4abf880e..c59f4b5c92 100644
--- a/doc/guides/dmadevs/index.rst
+++ b/doc/guides/dmadevs/index.rst
@@ -12,3 +12,5 @@ an application through DMA API.
:numbered:
 
idxd
+   ioat
+
diff --git a/doc/guides/dmadevs/ioat.rst b/doc/guides/dmadevs/ioat.rst
new file mode 100644
index 00..9ae1d8a2ad
--- /dev/null
+++ b/doc/guides/dmadevs/ioat.rst
@@ -0,0 +1,69 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+Copyright(c) 2021 Intel Corporation.
+
+.. include:: 
+
+IOAT DMA Device Driver
+===
+
+The ``ioat`` dmadev driver provides a poll-mode driver (PMD) for Intel\
+|reg| QuickData Technology which is part of part of Intel\ |reg| I/O
+Acceleration Technology (`Intel I/OAT
+`_).
+This PMD, when used on supported hardware, allows data copies, for example,
+cloning packet data, to be accelerated by IOAT hardware rather than having to
+be done by software, freeing up CPU cycles for other tasks.
+
+Hardware Requirements
+--
+
+The ``dpdk-devbind.py`` script, included with DPDK, can be used to show the
+presence of supported hardware. Running ``dpdk-devbind.py --status-dev dma``
+will show all the DMA devices on the system, IOAT devices are included in this
+list. For Intel\ |reg| IOAT devices, the hardware will often be listed as
+"Crystal Beach DMA", or "CBDMA" or on some newer systems '0b00' due to the
+absence of pci-id database entries for them at this point.
+
+.. note::
+Error handling is not supported by this driver on hardware prior to
+Intel Ice Lake. Unsupported systems include Broadwell, Skylake and
+Cascade Lake.
+
+Compilation
+
+
+For builds using ``meson`` and ``ninja``, the driver will be built when the
+target platform is x86-based. No additional compilation steps are necessary.
+
+Device Setup
+-
+
+Intel\ |reg| IOAT devices will need to be bound to a suitable DPDK-supported
+user-space IO driver such as ``vfio-pci`` in order to be used by DPDK.
+
+The ``dpdk-devbind.py`` script can be used to view the state of the devices 
using::
+
+   $ dpdk-devbind.py --status-dev dma
+
+The ``dpdk-devbind.py`` script can also be used to bind devices to a suitable 
driver.
+For example::
+
+   $ dpdk-devbind.py -b vfio-pci 00:01.0 00:01.1
+
+Device Probing and Initialization
+~~
+
+For devices bound to a suitable DPDK-supported driver (``vfio-pci``), the HW
+devices will be found as part of the device scan done at application
+initialization time without the need to pass parameters to the application.
+
+If the application does not require all the devices available an allowlist can
+be used in the same way that other DPDK devices use them.
+
+For example::
+
+   $ dpdk-test -a 
+
+Once probed successfully, the device will appear as a ``dmadev``, that is a
+"DMA device type" inside DPDK, and can be accessed using APIs from the
+``rte_dmadev`` library.
diff --git a/doc/guides/rel_notes/release_21_11.rst 
b/doc/guides/rel_notes/release_21_11.rst
index c980e729f8..e34957069f 100644
--- a/doc/guides/rel_notes/release_21_11.rst
+++ b/doc/guides/rel_notes/release_21_11.rst
@@ -103,6 +103,12 @@ New Features
   The IDXD dmadev driver provide device drivers for the Intel DSA devices.
   This device driver can be used through the generic dmadev API.
 
+* **Added IOAT dmadev driver implem

[dpdk-dev] [PATCH v6 02/12] dma/ioat: create dmadev instances on PCI probe

2021-09-27 Thread Conor Walsh

When a suitable device is found during the PCI probe, create a dmadev
instance for each channel. Internal structures and HW definitions required
for device creation are also included.

Signed-off-by: Conor Walsh 
Reviewed-by: Kevin Laatz 
---
 drivers/dma/ioat/ioat_dmadev.c   | 102 ++-
 drivers/dma/ioat/ioat_hw_defs.h  |  45 ++
 drivers/dma/ioat/ioat_internal.h |  27 
 3 files changed, 172 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/ioat/ioat_dmadev.c b/drivers/dma/ioat/ioat_dmadev.c
index f3491d45b1..df3c72363a 100644
--- a/drivers/dma/ioat/ioat_dmadev.c
+++ b/drivers/dma/ioat/ioat_dmadev.c
@@ -4,6 +4,7 @@
 
 #include 
 #include 
+#include 
 
 #include "ioat_internal.h"
 
@@ -14,6 +15,103 @@ RTE_LOG_REGISTER_DEFAULT(ioat_pmd_logtype, INFO);
 #define IOAT_PMD_NAME dmadev_ioat
 #define IOAT_PMD_NAME_STR RTE_STR(IOAT_PMD_NAME)
 
+/* Create a DMA device. */
+static int
+ioat_dmadev_create(const char *name, struct rte_pci_device *dev)
+{
+   static const struct rte_dma_dev_ops ioat_dmadev_ops = { };
+
+   struct rte_dma_dev *dmadev = NULL;
+   struct ioat_dmadev *ioat = NULL;
+   int retry = 0;
+
+   if (!name) {
+   IOAT_PMD_ERR("Invalid name of the device!");
+   return -EINVAL;
+   }
+
+   /* Allocate device structure. */
+   dmadev = rte_dma_pmd_allocate(name, dev->device.numa_node, 
sizeof(*ioat));
+   if (dmadev == NULL) {
+   IOAT_PMD_ERR("Unable to allocate dma device");
+   return -ENOMEM;
+   }
+
+   dmadev->device = &dev->device;
+
+   dmadev->dev_private = dmadev->data->dev_private;
+
+   dmadev->dev_ops = &ioat_dmadev_ops;
+
+   ioat = dmadev->data->dev_private;
+   ioat->regs = dev->mem_resource[0].addr;
+   ioat->doorbell = &ioat->regs->dmacount;
+   ioat->qcfg.nb_desc = 0;
+   ioat->desc_ring = NULL;
+   ioat->version = ioat->regs->cbver;
+
+   /* Do device initialization - reset and set error behaviour. */
+   if (ioat->regs->chancnt != 1)
+   IOAT_PMD_WARN("%s: Channel count == %d\n", __func__,
+   ioat->regs->chancnt);
+
+   /* Locked by someone else. */
+   if (ioat->regs->chanctrl & IOAT_CHANCTRL_CHANNEL_IN_USE) {
+   IOAT_PMD_WARN("%s: Channel appears locked\n", __func__);
+   ioat->regs->chanctrl = 0;
+   }
+
+   /* clear any previous errors */
+   if (ioat->regs->chanerr != 0) {
+   uint32_t val = ioat->regs->chanerr;
+   ioat->regs->chanerr = val;
+   }
+
+   ioat->regs->chancmd = IOAT_CHANCMD_SUSPEND;
+   rte_delay_ms(1);
+   ioat->regs->chancmd = IOAT_CHANCMD_RESET;
+   rte_delay_ms(1);
+   while (ioat->regs->chancmd & IOAT_CHANCMD_RESET) {
+   ioat->regs->chainaddr = 0;
+   rte_delay_ms(1);
+   if (++retry >= 200) {
+   IOAT_PMD_ERR("%s: cannot reset device. CHANCMD=%#"PRIx8
+   ", CHANSTS=%#"PRIx64", 
CHANERR=%#"PRIx32"\n",
+   __func__,
+   ioat->regs->chancmd,
+   ioat->regs->chansts,
+   ioat->regs->chanerr);
+   rte_dma_pmd_release(name);
+   return -EIO;
+   }
+   }
+   ioat->regs->chanctrl = IOAT_CHANCTRL_ANY_ERR_ABORT_EN |
+   IOAT_CHANCTRL_ERR_COMPLETION_EN;
+
+   dmadev->state = RTE_DMA_DEV_READY;
+
+   return 0;
+
+}
+
+/* Destroy a DMA device. */
+static int
+ioat_dmadev_destroy(const char *name)
+{
+   int ret;
+
+   if (!name) {
+   IOAT_PMD_ERR("Invalid device name");
+   return -EINVAL;
+   }
+
+   ret = rte_dma_pmd_release(name);
+   if (ret)
+   IOAT_PMD_DEBUG("Device cleanup failed");
+
+   return 0;
+}
+
 /* Probe DMA device. */
 static int
 ioat_dmadev_probe(struct rte_pci_driver *drv, struct rte_pci_device *dev)
@@ -24,7 +122,7 @@ ioat_dmadev_probe(struct rte_pci_driver *drv, struct 
rte_pci_device *dev)
IOAT_PMD_INFO("Init %s on NUMA node %d", name, dev->device.numa_node);
 
dev->device.driver = &drv->driver;
-   return 0;
+   return ioat_dmadev_create(name, dev);
 }
 
 /* Remove DMA device. */
@@ -38,7 +136,7 @@ ioat_dmadev_remove(struct rte_pci_device *dev)
IOAT_PMD_INFO("Closing %s on NUMA node %d",
name, dev->device.numa_node);
 
-   return 0;
+   return ioat_dmadev_destroy(name);
 }
 
 static const struct rte_pci_id pci_id_ioat_map[] = {
diff --git a/drivers/dma/ioat/ioat_hw_defs.h b/drivers/dma/ioat/ioat_hw_defs.h
index eeabba41ef..73bdf548b3 100644
--- a/drivers/dma/ioat/ioat_hw_defs.h
+++ b/drivers/dma/ioat/ioat_hw_defs.h
@@ -11,6 +11,8 @@ extern "C" {
 
 #include 
 
+#define IOAT_PCI_CHANERR_IN

[dpdk-dev] [PATCH v6 03/12] dma/ioat: add datapath structures

2021-09-27 Thread Conor Walsh

Add data structures required for the data path of IOAT devices.

Signed-off-by: Conor Walsh 
Signed-off-by: Bruce Richardson 
Reviewed-by: Kevin Laatz 
---
 drivers/dma/ioat/ioat_dmadev.c  |  63 +-
 drivers/dma/ioat/ioat_hw_defs.h | 215 
 2 files changed, 277 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/ioat/ioat_dmadev.c b/drivers/dma/ioat/ioat_dmadev.c
index df3c72363a..b132283ba5 100644
--- a/drivers/dma/ioat/ioat_dmadev.c
+++ b/drivers/dma/ioat/ioat_dmadev.c
@@ -15,11 +15,72 @@ RTE_LOG_REGISTER_DEFAULT(ioat_pmd_logtype, INFO);
 #define IOAT_PMD_NAME dmadev_ioat
 #define IOAT_PMD_NAME_STR RTE_STR(IOAT_PMD_NAME)
 
+/* Dump DMA device info. */
+static int
+ioat_dev_dump(const struct rte_dma_dev *dev, FILE *f)
+{
+   struct ioat_dmadev *ioat = dev->dev_private;
+   uint64_t chansts_masked = ioat->regs->chansts & IOAT_CHANSTS_STATUS;
+   uint32_t chanerr = ioat->regs->chanerr;
+   uint64_t mask = (ioat->qcfg.nb_desc - 1);
+   char ver = ioat->version;
+   fprintf(f, "= IOAT =\n");
+   fprintf(f, "  IOAT version: %d.%d\n", ver >> 4, ver & 0xF);
+   fprintf(f, "  Channel status: %s [0x%"PRIx64"]\n",
+   chansts_readable[chansts_masked], chansts_masked);
+   fprintf(f, "  ChainADDR: 0x%"PRIu64"\n", ioat->regs->chainaddr);
+   if (chanerr == 0) {
+   fprintf(f, "  No Channel Errors\n");
+   } else {
+   fprintf(f, "  ChanERR: 0x%"PRIu32"\n", chanerr);
+   if (chanerr & IOAT_CHANERR_INVALID_SRC_ADDR_MASK)
+   fprintf(f, "Invalid Source Address\n");
+   if (chanerr & IOAT_CHANERR_INVALID_DST_ADDR_MASK)
+   fprintf(f, "Invalid Destination Address\n");
+   if (chanerr & IOAT_CHANERR_INVALID_LENGTH_MASK)
+   fprintf(f, "Invalid Descriptor Length\n");
+   if (chanerr & IOAT_CHANERR_DESCRIPTOR_READ_ERROR_MASK)
+   fprintf(f, "Descriptor Read Error\n");
+   if ((chanerr & ~(IOAT_CHANERR_INVALID_SRC_ADDR_MASK |
+   IOAT_CHANERR_INVALID_DST_ADDR_MASK |
+   IOAT_CHANERR_INVALID_LENGTH_MASK |
+   IOAT_CHANERR_DESCRIPTOR_READ_ERROR_MASK)) != 0)
+   fprintf(f, "Unknown Error(s)\n");
+   }
+   fprintf(f, "== Private Data ==\n");
+   fprintf(f, "  Config: { ring_size: %u }\n", ioat->qcfg.nb_desc);
+   fprintf(f, "  Status: 0x%"PRIx64"\n", ioat->status);
+   fprintf(f, "  Status IOVA: 0x%"PRIx64"\n", ioat->status_addr);
+   fprintf(f, "  Status ADDR: %p\n", &ioat->status);
+   fprintf(f, "  Ring IOVA: 0x%"PRIx64"\n", ioat->ring_addr);
+   fprintf(f, "  Ring ADDR: 0x%"PRIx64"\n", ioat->desc_ring[0].next-64);
+   fprintf(f, "  Next write: %"PRIu16"\n", ioat->next_write);
+   fprintf(f, "  Next read: %"PRIu16"\n", ioat->next_read);
+   struct ioat_dma_hw_desc *desc_ring = &ioat->desc_ring[(ioat->next_write 
- 1) & mask];
+   fprintf(f, "  Last Descriptor Written {\n");
+   fprintf(f, "Size: %"PRIu32"\n", desc_ring->size);
+   fprintf(f, "Control: 0x%"PRIx32"\n", desc_ring->u.control_raw);
+   fprintf(f, "Src: 0x%"PRIx64"\n", desc_ring->src_addr);
+   fprintf(f, "Dest: 0x%"PRIx64"\n", desc_ring->dest_addr);
+   fprintf(f, "Next: 0x%"PRIx64"\n", desc_ring->next);
+   fprintf(f, "  }\n");
+   fprintf(f, "  Next Descriptor {\n");
+   fprintf(f, "Size: %"PRIu32"\n", ioat->desc_ring[ioat->next_read & 
mask].size);
+   fprintf(f, "Src: 0x%"PRIx64"\n", ioat->desc_ring[ioat->next_read & 
mask].src_addr);
+   fprintf(f, "Dest: 0x%"PRIx64"\n", ioat->desc_ring[ioat->next_read & 
mask].dest_addr);
+   fprintf(f, "Next: 0x%"PRIx64"\n", ioat->desc_ring[ioat->next_read & 
mask].next);
+   fprintf(f, "  }\n");
+
+   return 0;
+}
+
 /* Create a DMA device. */
 static int
 ioat_dmadev_create(const char *name, struct rte_pci_device *dev)
 {
-   static const struct rte_dma_dev_ops ioat_dmadev_ops = { };
+   static const struct rte_dma_dev_ops ioat_dmadev_ops = {
+   .dev_dump = ioat_dev_dump,
+   };
 
struct rte_dma_dev *dmadev = NULL;
struct ioat_dmadev *ioat = NULL;
diff --git a/drivers/dma/ioat/ioat_hw_defs.h b/drivers/dma/ioat/ioat_hw_defs.h
index 73bdf548b3..dc3493a78f 100644
--- a/drivers/dma/ioat/ioat_hw_defs.h
+++ b/drivers/dma/ioat/ioat_hw_defs.h
@@ -15,6 +15,7 @@ extern "C" {
 
 #define IOAT_VER_3_0   0x30
 #define IOAT_VER_3_3   0x33
+#define IOAT_VER_3_4   0x34
 
 #define IOAT_VENDOR_ID 0x8086
 #define IOAT_DEVICE_ID_SKX 0x2021
@@ -43,6 +44,14 @@ extern "C" {
 #define IOAT_CHANCTRL_ERR_COMPLETION_EN0x0004
 #define IOAT_CHANCTRL_INT_REARM0x0001
 
+/* DMA Channel Capabilities */
+#define

[dpdk-dev] [PATCH v6 04/12] dma/ioat: add configuration functions

2021-09-27 Thread Conor Walsh

Add functions for device configuration. The info_get and close functions
are included here also. info_get can be useful for checking successful
configuration and close is used by the dmadev api when releasing a
configured device.

Signed-off-by: Conor Walsh 
Reviewed-by: Kevin Laatz 
---
 doc/guides/dmadevs/ioat.rst|  19 ++
 drivers/dma/ioat/ioat_dmadev.c | 107 +
 2 files changed, 126 insertions(+)

diff --git a/doc/guides/dmadevs/ioat.rst b/doc/guides/dmadevs/ioat.rst
index 9ae1d8a2ad..b1f847d273 100644
--- a/doc/guides/dmadevs/ioat.rst
+++ b/doc/guides/dmadevs/ioat.rst
@@ -67,3 +67,22 @@ For example::
 Once probed successfully, the device will appear as a ``dmadev``, that is a
 "DMA device type" inside DPDK, and can be accessed using APIs from the
 ``rte_dmadev`` library.
+
+Using IOAT DMAdev Devices
+--
+
+To use IOAT devices from an application, the ``dmadev`` API can be used.
+
+Device Configuration
+~
+
+Refer to the :ref:`Device Configuration ` and
+:ref:`Configuration of Virtual DMA Channels ` 
sections
+of the dmadev library documentation for details on device configuration API 
usage.
+
+IOAT configuration requirements:
+
+* ``ring_size`` must be a power of two, between 64 and 4096.
+* Only one ``vchan`` is supported per device.
+* Silent mode is not supported.
+* The transfer direction must be set to ``RTE_DMA_DIR_MEM_TO_MEM`` to copy 
from memory to memory.
diff --git a/drivers/dma/ioat/ioat_dmadev.c b/drivers/dma/ioat/ioat_dmadev.c
index b132283ba5..92c4e2b04f 100644
--- a/drivers/dma/ioat/ioat_dmadev.c
+++ b/drivers/dma/ioat/ioat_dmadev.c
@@ -12,9 +12,112 @@ static struct rte_pci_driver ioat_pmd_drv;
 
 RTE_LOG_REGISTER_DEFAULT(ioat_pmd_logtype, INFO);
 
+#define DESC_SZ sizeof(struct ioat_dma_hw_desc)
+
 #define IOAT_PMD_NAME dmadev_ioat
 #define IOAT_PMD_NAME_STR RTE_STR(IOAT_PMD_NAME)
 
+/* Configure a device. */
+static int
+ioat_dev_configure(struct rte_dma_dev *dev __rte_unused, const struct 
rte_dma_conf *dev_conf,
+   uint32_t conf_sz)
+{
+   if (sizeof(struct rte_dma_conf) != conf_sz)
+   return -EINVAL;
+
+   if (dev_conf->nb_vchans != 1)
+   return -EINVAL;
+
+   return 0;
+}
+
+/* Setup a virtual channel for IOAT, only 1 vchan is supported. */
+static int
+ioat_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan __rte_unused,
+   const struct rte_dma_vchan_conf *qconf, uint32_t qconf_sz)
+{
+   struct ioat_dmadev *ioat = dev->dev_private;
+   uint16_t max_desc = qconf->nb_desc;
+   int i;
+
+   if (sizeof(struct rte_dma_vchan_conf) != qconf_sz)
+   return -EINVAL;
+
+   ioat->qcfg = *qconf;
+
+   if (!rte_is_power_of_2(max_desc)) {
+   max_desc = rte_align32pow2(max_desc);
+   IOAT_PMD_DEBUG("DMA dev %u using %u descriptors", 
dev->data->dev_id, max_desc);
+   ioat->qcfg.nb_desc = max_desc;
+   }
+
+   /* In case we are reconfiguring a device, free any existing memory. */
+   rte_free(ioat->desc_ring);
+
+   ioat->desc_ring = rte_zmalloc(NULL, sizeof(*ioat->desc_ring) * 
max_desc, 0);
+   if (ioat->desc_ring == NULL)
+   return -ENOMEM;
+
+   ioat->ring_addr = rte_mem_virt2iova(ioat->desc_ring);
+
+   ioat->status_addr = rte_mem_virt2iova(ioat) + offsetof(struct 
ioat_dmadev, status);
+
+   /* Ensure all counters are reset, if reconfiguring/restarting device. */
+   ioat->next_read = 0;
+   ioat->next_write = 0;
+   ioat->last_write = 0;
+   ioat->offset = 0;
+   ioat->failure = 0;
+
+   /* Configure descriptor ring - each one points to next. */
+   for (i = 0; i < ioat->qcfg.nb_desc; i++) {
+   ioat->desc_ring[i].next = ioat->ring_addr +
+   (((i + 1) % ioat->qcfg.nb_desc) * DESC_SZ);
+   }
+
+   return 0;
+}
+
+/* Get device information of a device. */
+static int
+ioat_dev_info_get(const struct rte_dma_dev *dev, struct rte_dma_info *info, 
uint32_t size)
+{
+   struct ioat_dmadev *ioat = dev->dev_private;
+   if (size < sizeof(*info))
+   return -EINVAL;
+   info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM |
+   RTE_DMA_CAPA_OPS_COPY |
+   RTE_DMA_CAPA_OPS_FILL;
+   if (ioat->version >= IOAT_VER_3_4)
+   info->dev_capa |= RTE_DMA_CAPA_HANDLES_ERRORS;
+   info->max_vchans = 1;
+   info->min_desc = 32;
+   info->max_desc = 4096;
+   return 0;
+}
+
+/* Close a configured device. */
+static int
+ioat_dev_close(struct rte_dma_dev *dev)
+{
+   struct ioat_dmadev *ioat;
+
+   if (!dev) {
+   IOAT_PMD_ERR("Invalid device");
+   return -EINVAL;
+   }
+
+   ioat = dev->dev_private;
+   if (!ioat) {
+   IOAT_PMD_ERR("Error getting dev_private");
+   return -EINVAL;
+   }
+
+   rte_free(ioat->desc_r

[dpdk-dev] [PATCH v6 05/12] dma/ioat: add start and stop functions

2021-09-27 Thread Conor Walsh

Add start, stop and recover functions for IOAT devices.

Signed-off-by: Conor Walsh 
Signed-off-by: Bruce Richardson 
Reviewed-by: Kevin Laatz 
---
 doc/guides/dmadevs/ioat.rst|  3 ++
 drivers/dma/ioat/ioat_dmadev.c | 92 ++
 2 files changed, 95 insertions(+)

diff --git a/doc/guides/dmadevs/ioat.rst b/doc/guides/dmadevs/ioat.rst
index b1f847d273..d93d28023f 100644
--- a/doc/guides/dmadevs/ioat.rst
+++ b/doc/guides/dmadevs/ioat.rst
@@ -86,3 +86,6 @@ IOAT configuration requirements:
 * Only one ``vchan`` is supported per device.
 * Silent mode is not supported.
 * The transfer direction must be set to ``RTE_DMA_DIR_MEM_TO_MEM`` to copy 
from memory to memory.
+
+Once configured, the device can then be made ready for use by calling the
+``rte_dma_start()`` API.
diff --git a/drivers/dma/ioat/ioat_dmadev.c b/drivers/dma/ioat/ioat_dmadev.c
index 92c4e2b04f..96bf55135f 100644
--- a/drivers/dma/ioat/ioat_dmadev.c
+++ b/drivers/dma/ioat/ioat_dmadev.c
@@ -78,6 +78,96 @@ ioat_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan 
__rte_unused,
return 0;
 }
 
+/* Recover IOAT device. */
+static inline int
+__ioat_recover(struct ioat_dmadev *ioat)
+{
+   uint32_t chanerr, retry = 0;
+   uint16_t mask = ioat->qcfg.nb_desc - 1;
+
+   /* Clear any channel errors. Reading and writing to chanerr does this. 
*/
+   chanerr = ioat->regs->chanerr;
+   ioat->regs->chanerr = chanerr;
+
+   /* Reset Channel. */
+   ioat->regs->chancmd = IOAT_CHANCMD_RESET;
+
+   /* Write new chain address to trigger state change. */
+   ioat->regs->chainaddr = ioat->desc_ring[(ioat->next_read - 1) & 
mask].next;
+   /* Ensure channel control and status addr are correct. */
+   ioat->regs->chanctrl = IOAT_CHANCTRL_ANY_ERR_ABORT_EN |
+   IOAT_CHANCTRL_ERR_COMPLETION_EN;
+   ioat->regs->chancmp = ioat->status_addr;
+
+   /* Allow HW time to move to the ARMED state. */
+   do {
+   rte_pause();
+   retry++;
+   } while (ioat->regs->chansts != IOAT_CHANSTS_ARMED && retry < 200);
+
+   /* Exit as failure if device is still HALTED. */
+   if (ioat->regs->chansts != IOAT_CHANSTS_ARMED)
+   return -1;
+
+   /* Store next write as offset as recover will move HW and SW ring out 
of sync. */
+   ioat->offset = ioat->next_read;
+
+   /* Prime status register with previous address. */
+   ioat->status = ioat->desc_ring[(ioat->next_read - 2) & mask].next;
+
+   return 0;
+}
+
+/* Start a configured device. */
+static int
+ioat_dev_start(struct rte_dma_dev *dev)
+{
+   struct ioat_dmadev *ioat = dev->dev_private;
+
+   if (ioat->qcfg.nb_desc == 0 || ioat->desc_ring == NULL)
+   return -EBUSY;
+
+   /* Inform hardware of where the descriptor ring is. */
+   ioat->regs->chainaddr = ioat->ring_addr;
+   /* Inform hardware of where to write the status/completions. */
+   ioat->regs->chancmp = ioat->status_addr;
+
+   /* Prime the status register to be set to the last element. */
+   ioat->status = ioat->ring_addr + ((ioat->qcfg.nb_desc - 1) * DESC_SZ);
+
+   printf("IOAT.status: %s [0x%"PRIx64"]\n",
+   chansts_readable[ioat->status & IOAT_CHANSTS_STATUS],
+   ioat->status);
+
+   if ((ioat->regs->chansts & IOAT_CHANSTS_STATUS) == IOAT_CHANSTS_HALTED) 
{
+   IOAT_PMD_WARN("Device HALTED on start, attempting to 
recover\n");
+   if (__ioat_recover(ioat) != 0) {
+   IOAT_PMD_ERR("Device couldn't be recovered");
+   return -1;
+   }
+   }
+
+   return 0;
+}
+
+/* Stop a configured device. */
+static int
+ioat_dev_stop(struct rte_dma_dev *dev)
+{
+   struct ioat_dmadev *ioat = dev->dev_private;
+   uint32_t retry = 0;
+
+   ioat->regs->chancmd = IOAT_CHANCMD_SUSPEND;
+
+   do {
+   rte_pause();
+   retry++;
+   } while ((ioat->regs->chansts & IOAT_CHANSTS_STATUS) != 
IOAT_CHANSTS_SUSPENDED
+   && retry < 200);
+
+   return ((ioat->regs->chansts & IOAT_CHANSTS_STATUS) == 
IOAT_CHANSTS_SUSPENDED) ? 0 : -1;
+}
+
 /* Get device information of a device. */
 static int
 ioat_dev_info_get(const struct rte_dma_dev *dev, struct rte_dma_info *info, 
uint32_t size)
@@ -186,6 +276,8 @@ ioat_dmadev_create(const char *name, struct rte_pci_device 
*dev)
.dev_configure = ioat_dev_configure,
.dev_dump = ioat_dev_dump,
.dev_info_get = ioat_dev_info_get,
+   .dev_start = ioat_dev_start,
+   .dev_stop = ioat_dev_stop,
.vchan_setup = ioat_vchan_setup,
};
 
-- 
2.25.1

[dpdk-dev] [PATCH v6 06/12] dma/ioat: add data path job submission functions

2021-09-27 Thread Conor Walsh

Add data path functions for enqueuing and submitting operations to
IOAT devices.

Signed-off-by: Conor Walsh 
Reviewed-by: Kevin Laatz 
Reviewed-by: Chengwen Feng 
---
 doc/guides/dmadevs/ioat.rst|  9 
 drivers/dma/ioat/ioat_dmadev.c | 92 ++
 2 files changed, 101 insertions(+)

diff --git a/doc/guides/dmadevs/ioat.rst b/doc/guides/dmadevs/ioat.rst
index d93d28023f..ec8ce5a8e5 100644
--- a/doc/guides/dmadevs/ioat.rst
+++ b/doc/guides/dmadevs/ioat.rst
@@ -89,3 +89,12 @@ IOAT configuration requirements:
 
 Once configured, the device can then be made ready for use by calling the
 ``rte_dma_start()`` API.
+
+Performing Data Copies
+~~~
+
+Refer to the :ref:`Enqueue / Dequeue APIs ` section of 
the dmadev library
+documentation for details on operation enqueue and submission API usage.
+
+It is expected that, for efficiency reasons, a burst of operations will be 
enqueued to the
+device via multiple enqueue calls between calls to the ``rte_dma_submit()`` 
function.
diff --git a/drivers/dma/ioat/ioat_dmadev.c b/drivers/dma/ioat/ioat_dmadev.c
index 96bf55135f..0e92c80fb0 100644
--- a/drivers/dma/ioat/ioat_dmadev.c
+++ b/drivers/dma/ioat/ioat_dmadev.c
@@ -5,6 +5,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "ioat_internal.h"
 
@@ -17,6 +18,12 @@ RTE_LOG_REGISTER_DEFAULT(ioat_pmd_logtype, INFO);
 #define IOAT_PMD_NAME dmadev_ioat
 #define IOAT_PMD_NAME_STR RTE_STR(IOAT_PMD_NAME)
 
+/* IOAT operations. */
+enum rte_ioat_ops {
+   ioat_op_copy = 0,   /* Standard DMA Operation */
+   ioat_op_fill/* Block Fill */
+};
+
 /* Configure a device. */
 static int
 ioat_dev_configure(struct rte_dma_dev *dev __rte_unused, const struct 
rte_dma_conf *dev_conf,
@@ -208,6 +215,87 @@ ioat_dev_close(struct rte_dma_dev *dev)
return 0;
 }
 
+/* Trigger hardware to begin performing enqueued operations. */
+static inline void
+__submit(struct ioat_dmadev *ioat)
+{
+   *ioat->doorbell = ioat->next_write - ioat->offset;
+
+   ioat->last_write = ioat->next_write;
+}
+
+/* External submit function wrapper. */
+static int
+ioat_submit(struct rte_dma_dev *dev, uint16_t qid __rte_unused)
+{
+   struct ioat_dmadev *ioat = (struct ioat_dmadev *)dev->dev_private;
+
+   __submit(ioat);
+
+   return 0;
+}
+
+/* Write descriptor for enqueue. */
+static inline int
+__write_desc(struct rte_dma_dev *dev, uint32_t op, uint64_t src, phys_addr_t 
dst,
+   unsigned int length, uint64_t flags)
+{
+   struct ioat_dmadev *ioat = dev->dev_private;
+   uint16_t ret;
+   const unsigned short mask = ioat->qcfg.nb_desc - 1;
+   const unsigned short read = ioat->next_read;
+   unsigned short write = ioat->next_write;
+   const unsigned short space = mask + read - write;
+   struct ioat_dma_hw_desc *desc;
+
+   if (space == 0)
+   return -ENOSPC;
+
+   ioat->next_write = write + 1;
+   write &= mask;
+
+   desc = &ioat->desc_ring[write];
+   desc->size = length;
+   desc->u.control_raw = (uint32_t)((op << IOAT_CMD_OP_SHIFT) |
+   (1 << IOAT_COMP_UPDATE_SHIFT));
+
+   /* In IOAT the fence ensures that all operations including the current 
one
+* are completed before moving on, DMAdev assumes that the fence ensures
+* all operations before the current one are completed before starting
+* the current one, so in IOAT we set the fence for the previous 
descriptor.
+*/
+   if (flags & RTE_DMA_OP_FLAG_FENCE)
+   ioat->desc_ring[(write - 1) & mask].u.control.fence = 1;
+
+   desc->src_addr = src;
+   desc->dest_addr = dst;
+
+   rte_prefetch0(&ioat->desc_ring[ioat->next_write & mask]);
+
+   ret = (uint16_t)(ioat->next_write - 1);
+
+   if (flags & RTE_DMA_OP_FLAG_SUBMIT)
+   __submit(ioat);
+
+   return ret;
+}
+
+/* Enqueue a fill operation onto the ioat device. */
+static int
+ioat_enqueue_fill(struct rte_dma_dev *dev, uint16_t qid __rte_unused, uint64_t 
pattern,
+   rte_iova_t dst, unsigned int length, uint64_t flags)
+{
+   return __write_desc(dev, ioat_op_fill, pattern, dst, length, flags);
+}
+
+/* Enqueue a copy operation onto the ioat device. */
+static int
+ioat_enqueue_copy(struct rte_dma_dev *dev, uint16_t qid __rte_unused, 
rte_iova_t src,
+   rte_iova_t dst, unsigned int length, uint64_t flags)
+{
+   return __write_desc(dev, ioat_op_copy, src, dst, length, flags);
+}
+
 /* Dump DMA device info. */
 static int
 ioat_dev_dump(const struct rte_dma_dev *dev, FILE *f)
@@ -303,6 +391,10 @@ ioat_dmadev_create(const char *name, struct rte_pci_device 
*dev)
 
dmadev->dev_ops = &ioat_dmadev_ops;
 
+   dmadev->copy = ioat_enqueue_copy;
+   dmadev->fill = ioat_enqueue_fill;
+   dmadev->submit = ioat_submit;
+
ioat = dmadev->data->dev_private;
ioat->regs = dev->mem_resource[0].addr;
ioat->d

[dpdk-dev] [PATCH v6 07/12] dma/ioat: add data path completion functions

2021-09-27 Thread Conor Walsh

Add the data path functions for gathering completed operations
from IOAT devices.

Signed-off-by: Conor Walsh 
Signed-off-by: Kevin Laatz 
Acked-by: Bruce Richardson 
---
 doc/guides/dmadevs/ioat.rst|  33 +++-
 drivers/dma/ioat/ioat_dmadev.c | 141 +
 2 files changed, 173 insertions(+), 1 deletion(-)

diff --git a/doc/guides/dmadevs/ioat.rst b/doc/guides/dmadevs/ioat.rst
index ec8ce5a8e5..fc1b3131c7 100644
--- a/doc/guides/dmadevs/ioat.rst
+++ b/doc/guides/dmadevs/ioat.rst
@@ -94,7 +94,38 @@ Performing Data Copies
 ~~~
 
 Refer to the :ref:`Enqueue / Dequeue APIs ` section of 
the dmadev library
-documentation for details on operation enqueue and submission API usage.
+documentation for details on operation enqueue, submission and completion API 
usage.
 
 It is expected that, for efficiency reasons, a burst of operations will be 
enqueued to the
 device via multiple enqueue calls between calls to the ``rte_dma_submit()`` 
function.
+
+When gathering completions, ``rte_dma_completed()`` should be used, up until 
the point an error
+occurs with an operation. If an error was encountered, 
``rte_dma_completed_status()`` must be used
+to reset the device and continue processing operations. This function will 
also gather the status
+of each individual operation which is filled in to the ``status`` array 
provided as parameter
+by the application.
+
+The status codes supported by IOAT are:
+
+* ``RTE_DMA_STATUS_SUCCESSFUL``: The operation was successful.
+* ``RTE_DMA_STATUS_INVALID_SRC_ADDR``: The operation failed due to an invalid 
source address.
+* ``RTE_DMA_STATUS_INVALID_DST_ADDR``: The operation failed due to an invalid 
destination address.
+* ``RTE_DMA_STATUS_INVALID_LENGTH``: The operation failed due to an invalid 
descriptor length.
+* ``RTE_DMA_STATUS_DESCRIPTOR_READ_ERROR``: The device could not read the 
descriptor.
+* ``RTE_DMA_STATUS_ERROR_UNKNOWN``: The operation failed due to an unspecified 
error.
+
+The following code shows how to retrieve the number of successfully completed
+copies within a burst and then uses ``rte_dma_completed_status()`` to check
+which operation failed and reset the device to continue processing operations:
+
+.. code-block:: C
+
+   enum rte_dma_status_code status[COMP_BURST_SZ];
+   uint16_t count, idx, status_count;
+   bool error = 0;
+
+   count = rte_dma_completed(dev_id, vchan, COMP_BURST_SZ, &idx, &error);
+
+   if (error){
+  status_count = rte_dma_completed_status(dev_id, vchan, COMP_BURST_SZ, 
&idx, status);
+   }
diff --git a/drivers/dma/ioat/ioat_dmadev.c b/drivers/dma/ioat/ioat_dmadev.c
index 0e92c80fb0..b2b7ebb3db 100644
--- a/drivers/dma/ioat/ioat_dmadev.c
+++ b/drivers/dma/ioat/ioat_dmadev.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "ioat_internal.h"
 
@@ -355,6 +356,144 @@ ioat_dev_dump(const struct rte_dma_dev *dev, FILE *f)
return 0;
 }
 
+/* Returns the index of the last completed operation. */
+static inline uint16_t
+__get_last_completed(const struct ioat_dmadev *ioat, int *state)
+{
+   /* Status register contains the address of the completed operation */
+   uint64_t status = ioat->status;
+
+   /* lower 3 bits indicate "transfer status" : active, idle, halted.
+* We can ignore bit 0.
+*/
+   *state = status & IOAT_CHANSTS_STATUS;
+
+   /* If we are just after recovering from an error the address returned by
+* status will be 0, in this case we return the offset - 1 as the last
+* completed. If not return the status value minus the chainaddr which
+* gives us an offset into the ring. Right shifting by 6 (divide by 64)
+* gives the index of the completion from the HW point of view and 
adding
+* the offset translates the ring index from HW to SW point of view.
+*/
+   if ((status & ~IOAT_CHANSTS_STATUS) == 0)
+   return ioat->offset - 1;
+
+   return (status - ioat->ring_addr) >> 6;
+}
+
+/* Translates IOAT ChanERRs to DMA error codes. */
+static inline enum rte_dma_status_code
+__translate_status_ioat_to_dma(uint32_t chanerr)
+{
+   if (chanerr & IOAT_CHANERR_INVALID_SRC_ADDR_MASK)
+   return RTE_DMA_STATUS_INVALID_SRC_ADDR;
+   else if (chanerr & IOAT_CHANERR_INVALID_DST_ADDR_MASK)
+   return RTE_DMA_STATUS_INVALID_DST_ADDR;
+   else if (chanerr & IOAT_CHANERR_INVALID_LENGTH_MASK)
+   return RTE_DMA_STATUS_INVALID_LENGTH;
+   else if (chanerr & IOAT_CHANERR_DESCRIPTOR_READ_ERROR_MASK)
+   return RTE_DMA_STATUS_DESCRIPTOR_READ_ERROR;
+   else
+   return RTE_DMA_STATUS_ERROR_UNKNOWN;
+}
+
+/* Returns details of operations that have been completed. */
+static uint16_t
+ioat_completed(struct rte_dma_dev *dev, uint16_t qid __rte_unused, const 
uint16_t max_ops,
+   uint16_t *last_idx, bool *has_error)
+{
+   struct ioat_dmadev *ioat = dev->dev_private;
+

[dpdk-dev] [PATCH v6 08/12] dma/ioat: add statistics

2021-09-27 Thread Conor Walsh

Add statistic tracking for operations in IOAT.

Signed-off-by: Conor Walsh 
Reviewed-by: Kevin Laatz 
Acked-by: Bruce Richardson 
---
 drivers/dma/ioat/ioat_dmadev.c | 43 ++
 1 file changed, 43 insertions(+)

diff --git a/drivers/dma/ioat/ioat_dmadev.c b/drivers/dma/ioat/ioat_dmadev.c
index b2b7ebb3db..20ae364318 100644
--- a/drivers/dma/ioat/ioat_dmadev.c
+++ b/drivers/dma/ioat/ioat_dmadev.c
@@ -77,6 +77,9 @@ ioat_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan 
__rte_unused,
ioat->offset = 0;
ioat->failure = 0;
 
+   /* Reset Stats. */
+   ioat->stats = (struct rte_dma_stats){0};
+
/* Configure descriptor ring - each one points to next. */
for (i = 0; i < ioat->qcfg.nb_desc; i++) {
ioat->desc_ring[i].next = ioat->ring_addr +
@@ -222,6 +225,8 @@ __submit(struct ioat_dmadev *ioat)
 {
*ioat->doorbell = ioat->next_write - ioat->offset;
 
+   ioat->stats.submitted += (uint16_t)(ioat->next_write - 
ioat->last_write);
+
ioat->last_write = ioat->next_write;
 }
 
@@ -352,6 +357,10 @@ ioat_dev_dump(const struct rte_dma_dev *dev, FILE *f)
fprintf(f, "Dest: 0x%"PRIx64"\n", ioat->desc_ring[ioat->next_read & 
mask].dest_addr);
fprintf(f, "Next: 0x%"PRIx64"\n", ioat->desc_ring[ioat->next_read & 
mask].next);
fprintf(f, "  }\n");
+   fprintf(f, "  Key Stats { submitted: %"PRIu64", comp: %"PRIu64", 
failed: %"PRIu64" }\n",
+   ioat->stats.submitted,
+   ioat->stats.completed,
+   ioat->stats.errors);
 
return 0;
 }
@@ -441,6 +450,9 @@ ioat_completed(struct rte_dma_dev *dev, uint16_t qid 
__rte_unused, const uint16_
*last_idx = ioat->next_read - 2;
}
 
+   ioat->stats.completed += count;
+   ioat->stats.errors += fails;
+
return count;
 }
 
@@ -491,9 +503,38 @@ ioat_completed_status(struct rte_dma_dev *dev, uint16_t 
qid __rte_unused,
 
*last_idx = ioat->next_read - 1;
 
+   ioat->stats.completed += count;
+   ioat->stats.errors += fails;
+
return count;
 }
 
+/* Retrieve the generic stats of a DMA device. */
+static int
+ioat_stats_get(const struct rte_dma_dev *dev, uint16_t vchan __rte_unused,
+   struct rte_dma_stats *rte_stats, uint32_t size)
+{
+   struct rte_dma_stats *stats = (&((struct ioat_dmadev 
*)dev->dev_private)->stats);
+
+   if (size < sizeof(rte_stats))
+   return -EINVAL;
+   if (rte_stats == NULL)
+   return -EINVAL;
+
+   *rte_stats = *stats;
+   return 0;
+}
+
+/* Reset the generic stat counters for the DMA device. */
+static int
+ioat_stats_reset(struct rte_dma_dev *dev, uint16_t vchan __rte_unused)
+{
+   struct ioat_dmadev *ioat = dev->dev_private;
+
+   ioat->stats = (struct rte_dma_stats){0};
+   return 0;
+}
+
 /* Create a DMA device. */
 static int
 ioat_dmadev_create(const char *name, struct rte_pci_device *dev)
@@ -505,6 +546,8 @@ ioat_dmadev_create(const char *name, struct rte_pci_device 
*dev)
.dev_info_get = ioat_dev_info_get,
.dev_start = ioat_dev_start,
.dev_stop = ioat_dev_stop,
+   .stats_get = ioat_stats_get,
+   .stats_reset = ioat_stats_reset,
.vchan_setup = ioat_vchan_setup,
};
 
-- 
2.25.1

[dpdk-dev] [PATCH v6 09/12] dma/ioat: add support for vchan status function

2021-09-27 Thread Conor Walsh

Add support for the rte_dmadev_vchan_status API call.

Signed-off-by: Conor Walsh 
Reviewed-by: Kevin Laatz 
Acked-by: Bruce Richardson 
---
 drivers/dma/ioat/ioat_dmadev.c | 21 +
 1 file changed, 21 insertions(+)

diff --git a/drivers/dma/ioat/ioat_dmadev.c b/drivers/dma/ioat/ioat_dmadev.c
index 20ae364318..fe01a3b1db 100644
--- a/drivers/dma/ioat/ioat_dmadev.c
+++ b/drivers/dma/ioat/ioat_dmadev.c
@@ -535,6 +535,26 @@ ioat_stats_reset(struct rte_dma_dev *dev, uint16_t vchan 
__rte_unused)
return 0;
 }
 
+/* Check if the IOAT device is idle. */
+static int
+ioat_vchan_status(const struct rte_dma_dev *dev, uint16_t vchan __rte_unused,
+   enum rte_dma_vchan_status *status)
+{
+   int state = 0;
+   const struct ioat_dmadev *ioat = dev->dev_private;
+   const uint16_t mask = ioat->qcfg.nb_desc - 1;
+   const uint16_t last = __get_last_completed(ioat, &state);
+
+   if (state == IOAT_CHANSTS_HALTED || state == IOAT_CHANSTS_SUSPENDED)
+   *status = RTE_DMA_VCHAN_HALTED_ERROR;
+   else if (last == ((ioat->next_write - 1) & mask))
+   *status = RTE_DMA_VCHAN_IDLE;
+   else
+   *status = RTE_DMA_VCHAN_ACTIVE;
+
+   return 0;
+}
+
 /* Create a DMA device. */
 static int
 ioat_dmadev_create(const char *name, struct rte_pci_device *dev)
@@ -548,6 +568,7 @@ ioat_dmadev_create(const char *name, struct rte_pci_device 
*dev)
.dev_stop = ioat_dev_stop,
.stats_get = ioat_stats_get,
.stats_reset = ioat_stats_reset,
+   .vchan_status = ioat_vchan_status,
.vchan_setup = ioat_vchan_setup,
};
 
-- 
2.25.1

[dpdk-dev] [PATCH v6 10/12] dma/ioat: add burst capacity function

2021-09-27 Thread Conor Walsh

Adds the ability to find the remaining space in the IOAT ring.

Signed-off-by: Conor Walsh 
Signed-off-by: Kevin Laatz 
Acked-by: Bruce Richardson 
---
 drivers/dma/ioat/ioat_dmadev.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/drivers/dma/ioat/ioat_dmadev.c b/drivers/dma/ioat/ioat_dmadev.c
index fe01a3b1db..6c783ec94f 100644
--- a/drivers/dma/ioat/ioat_dmadev.c
+++ b/drivers/dma/ioat/ioat_dmadev.c
@@ -509,6 +509,19 @@ ioat_completed_status(struct rte_dma_dev *dev, uint16_t 
qid __rte_unused,
return count;
 }
 
+/* Get the remaining capacity of the ring. */
+static uint16_t
+ioat_burst_capacity(const struct rte_dma_dev *dev, uint16_t vchan __rte_unused)
+{
+   struct ioat_dmadev *ioat = dev->data->dev_private;
+   unsigned short size = ioat->qcfg.nb_desc - 1;
+   unsigned short read = ioat->next_read;
+   unsigned short write = ioat->next_write;
+   unsigned short space = size - (write - read);
+
+   return space;
+}
+
 /* Retrieve the generic stats of a DMA device. */
 static int
 ioat_stats_get(const struct rte_dma_dev *dev, uint16_t vchan __rte_unused,
@@ -594,6 +607,7 @@ ioat_dmadev_create(const char *name, struct rte_pci_device 
*dev)
 
dmadev->dev_ops = &ioat_dmadev_ops;
 
+   dmadev->burst_capacity = ioat_burst_capacity;
dmadev->completed = ioat_completed;
dmadev->completed_status = ioat_completed_status;
dmadev->copy = ioat_enqueue_copy;
-- 
2.25.1

[dpdk-dev] [PATCH v6 11/12] devbind: move ioat device IDs to dmadev category

2021-09-27 Thread Conor Walsh

Move Intel IOAT devices from Misc to DMA devices.

Signed-off-by: Conor Walsh 
Reviewed-by: Kevin Laatz 
Reviewed-by: Bruce Richardson 
---
 usertools/dpdk-devbind.py | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/usertools/dpdk-devbind.py b/usertools/dpdk-devbind.py
index 15d438715f..4a72229622 100755
--- a/usertools/dpdk-devbind.py
+++ b/usertools/dpdk-devbind.py
@@ -69,14 +69,12 @@
 network_devices = [network_class, cavium_pkx, avp_vnic, ifpga_class]
 baseband_devices = [acceleration_class]
 crypto_devices = [encryption_class, intel_processor_class]
-dma_devices = [intel_idxd_spr]
+dma_devices = [intel_idxd_spr, intel_ioat_bdw, intel_ioat_icx, intel_ioat_skx]
 eventdev_devices = [cavium_sso, cavium_tim, intel_dlb, octeontx2_sso]
 mempool_devices = [cavium_fpa, octeontx2_npa]
 compress_devices = [cavium_zip]
 regex_devices = [octeontx2_ree]
-misc_devices = [cnxk_bphy, cnxk_bphy_cgx, intel_ioat_bdw, intel_ioat_skx, 
intel_ioat_icx,
-intel_ntb_skx, intel_ntb_icx,
-octeontx2_dma]
+misc_devices = [cnxk_bphy, cnxk_bphy_cgx, intel_ntb_skx, intel_ntb_icx, 
octeontx2_dma]
 
 # global dict ethernet devices present. Dictionary indexed by PCI address.
 # Each device within this is itself a dictionary of device properties
-- 
2.25.1

[dpdk-dev] [PATCH v6 12/12] raw/ioat: deprecate ioat rawdev driver

2021-09-27 Thread Conor Walsh

Deprecate the rawdev IOAT driver as both IOAT and IDXD drivers have
moved to dmadev.

Signed-off-by: Conor Walsh 
Acked-by: Kevin Laatz 
Acked-by: Bruce Richardson 
---
 MAINTAINERS  | 2 +-
 doc/guides/rawdevs/ioat.rst  | 4 
 doc/guides/rel_notes/deprecation.rst | 7 +++
 3 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index ccabba9169..a4bcd2d024 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1322,7 +1322,7 @@ T: git://dpdk.org/next/dpdk-next-net-intel
 F: drivers/raw/ifpga/
 F: doc/guides/rawdevs/ifpga.rst
 
-IOAT Rawdev
+IOAT Rawdev - DEPRECATED
 M: Bruce Richardson 
 F: drivers/raw/ioat/
 F: doc/guides/rawdevs/ioat.rst
diff --git a/doc/guides/rawdevs/ioat.rst b/doc/guides/rawdevs/ioat.rst
index a65530bd30..98d15dd032 100644
--- a/doc/guides/rawdevs/ioat.rst
+++ b/doc/guides/rawdevs/ioat.rst
@@ -6,6 +6,10 @@
 IOAT Rawdev Driver
 ===
 
+.. warning::
+As of DPDK 21.11 the rawdev implementation of the IOAT driver has been 
deprecated.
+Please use the dmadev library instead.
+
 The ``ioat`` rawdev driver provides a poll-mode driver (PMD) for Intel\ |reg|
 Data Streaming Accelerator `(Intel DSA)
 `_ and 
for Intel\ |reg|
diff --git a/doc/guides/rel_notes/deprecation.rst 
b/doc/guides/rel_notes/deprecation.rst
index 59445a6f42..b1dbb45802 100644
--- a/doc/guides/rel_notes/deprecation.rst
+++ b/doc/guides/rel_notes/deprecation.rst
@@ -284,3 +284,10 @@ Deprecation Notices
   reserved bytes to 2 (from 3), and use 1 byte to indicate warnings and other
   information from the crypto/security operation. This field will be used to
   communicate events such as soft expiry with IPsec in lookaside mode.
+
+* raw/ioat: The ``ioat`` rawdev driver has been deprecated, since it's
+  functionality is provided through the new ``dmadev`` infrastructure.
+  To continue to use hardware previously supported by the ``ioat`` rawdev 
driver,
+  applications should be updated to use the ``dmadev`` library instead,
+  with the underlying HW-functionality being provided by the ``ioat`` or
+  ``idxd`` dma drivers
-- 
2.25.1

Re: [dpdk-dev] [PATCH] net/bnxt: remove code to initialize SRAM slice node

2021-09-27 Thread Ferruh Yigit

On 9/25/2021 3:24 PM, Ajit Khaparde wrote:
> From: Kishore Padmanabha 
> 
> Remove the code to initialize SRAM slice mode explicitly. The
> code is redundanat as the memory allocated is initialized to
> zero by the rte_zmalloc. This fixes the compilation issue for
> uninitialized pointer when debug optimized configuration is used.
> 
> Signed-off-by: Kishore Padmanabha 
> Reviewed-by: Farah Smith 
> Reviewed-by: Ajit Khaparde 

Squashed into relevant commit [1] in next-net, thanks.

[1]
net/bnxt: add SRAM manager model

Re: [dpdk-dev] [PATCH v4 18/18] net/i40e: fix redefinition warning

2021-09-27 Thread Kevin Traynor


Hi,

On 27/09/2021 10:30, Zhang, RobinX wrote:

Hi, Beilei


-Original Message-
From: Xing, Beilei 
Sent: Monday, September 27, 2021 5:18 PM
To: Zhang, RobinX ; dev@dpdk.org
Cc: Zhang, Qi Z ; Zhang, Helin
; Wu, Jingjing ;
remy.hor...@intel.com; jijiang@intel.com; jing.d.c...@intel.com; Zhu,
Heqing ; Liang, Cunming
; Lu, Wenzhuo ; Zhang,
Roy Fan ; Chilikin, Andrey
; echau...@redhat.com; Guo, Junfeng
; Yang, SteveX 
Subject: RE: [PATCH v4 18/18] net/i40e: fix redefinition warning




-Original Message-
From: Zhang, RobinX 
Sent: Monday, September 6, 2021 10:03 AM
To: dev@dpdk.org
Cc: Xing, Beilei ; Zhang, Qi Z
; Zhang, Helin ; Wu,
Jingjing ; remy.hor...@intel.com;
jijiang@intel.com; jing.d.c...@intel.com; Zhu, Heqing
; Liang, Cunming ; Lu,
Wenzhuo ; Zhang, Roy Fan
; Chilikin, Andrey
; echau...@redhat.com; Guo, Junfeng
; Yang, SteveX ; Zhang,
RobinX 
Subject: [PATCH v4 18/18] net/i40e: fix redefinition warning

After update i40e share code, there will be a redefinition compile warning.
This patch fix the situation by remove duplicate definition in
i40e_ethdev.c

Fixes: eef2daf2e199 ("net/i40e: fix link update no wait")

Need to cc stable?


This patch is dependent on share code, so cannot cc stable.



I don't think the original definition should be the fixes commit, unless 
it was incorrect before these patches.


This warning was introduced by the redefining in patch 13/18. It would 
be better to fix 13/18 to not introduce the warning, rather than 
introduce a warning and fix it at the end of the series.






Signed-off-by: Robin Zhang 
---
  drivers/net/i40e/i40e_ethdev.c | 3 +--
  1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c
b/drivers/net/i40e/i40e_ethdev.c index 7b230e2ed1..4fc44dc5e2 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -2886,7 +2886,6 @@ static __rte_always_inline void
update_link_reg(struct i40e_hw *hw, struct rte_eth_link *link)  {
  /* Link status registers and values*/
-#define I40E_PRTMAC_LINKSTA0x001E2420
  #define I40E_REG_LINK_UP  0x4080
  #define I40E_PRTMAC_MACC  0x001E24E0
  #define I40E_REG_MACC_25GB0x0002
@@ -2899,7 +2898,7 @@ update_link_reg(struct i40e_hw *hw, struct
rte_eth_link *link)
uint32_t link_speed;
uint32_t reg_val;

-   reg_val = I40E_READ_REG(hw, I40E_PRTMAC_LINKSTA);
+   reg_val = I40E_READ_REG(hw, I40E_PRTMAC_LINKSTA(0));
link_speed = reg_val & I40E_REG_SPEED_MASK;
reg_val &= I40E_REG_LINK_UP;
link->link_status = (reg_val == I40E_REG_LINK_UP) ? 1 : 0;
--
2.25.1

Re: [dpdk-dev] [PATCH v4 18/18] net/i40e: fix redefinition warning

2021-09-27 Thread Zhang, Qi Z



> -Original Message-
> From: Kevin Traynor 
> Sent: Monday, September 27, 2021 6:38 PM
> To: Zhang, RobinX ; Xing, Beilei
> ; dev@dpdk.org
> Cc: Zhang, Qi Z ; Zhang, Helin ;
> Wu, Jingjing ; remy.hor...@intel.com;
> jijiang@intel.com; jing.d.c...@intel.com; Zhu, Heqing
> ; Liang, Cunming ; Lu,
> Wenzhuo ; Zhang, Roy Fan
> ; Chilikin, Andrey ;
> echau...@redhat.com; Guo, Junfeng ; Yang, SteveX
> 
> Subject: Re: [dpdk-dev] [PATCH v4 18/18] net/i40e: fix redefinition warning
> 
> Hi,
> 
> On 27/09/2021 10:30, Zhang, RobinX wrote:
> > Hi, Beilei
> >
> >> -Original Message-
> >> From: Xing, Beilei 
> >> Sent: Monday, September 27, 2021 5:18 PM
> >> To: Zhang, RobinX ; dev@dpdk.org
> >> Cc: Zhang, Qi Z ; Zhang, Helin
> >> ; Wu, Jingjing ;
> >> remy.hor...@intel.com; jijiang@intel.com; jing.d.c...@intel.com;
> >> Zhu, Heqing ; Liang, Cunming
> >> ; Lu, Wenzhuo ;
> Zhang,
> >> Roy Fan ; Chilikin, Andrey
> >> ; echau...@redhat.com; Guo, Junfeng
> >> ; Yang, SteveX 
> >> Subject: RE: [PATCH v4 18/18] net/i40e: fix redefinition warning
> >>
> >>
> >>
> >>> -Original Message-
> >>> From: Zhang, RobinX 
> >>> Sent: Monday, September 6, 2021 10:03 AM
> >>> To: dev@dpdk.org
> >>> Cc: Xing, Beilei ; Zhang, Qi Z
> >>> ; Zhang, Helin ; Wu,
> >>> Jingjing ; remy.hor...@intel.com;
> >>> jijiang@intel.com; jing.d.c...@intel.com; Zhu, Heqing
> >>> ; Liang, Cunming ;
> >>> Lu, Wenzhuo ; Zhang, Roy Fan
> >>> ; Chilikin, Andrey
> >>> ; echau...@redhat.com; Guo, Junfeng
> >>> ; Yang, SteveX ;
> >>> Zhang, RobinX 
> >>> Subject: [PATCH v4 18/18] net/i40e: fix redefinition warning
> >>>
> >>> After update i40e share code, there will be a redefinition compile 
> >>> warning.
> >>> This patch fix the situation by remove duplicate definition in
> >>> i40e_ethdev.c
> >>>
> >>> Fixes: eef2daf2e199 ("net/i40e: fix link update no wait")
> >> Need to cc stable?
> >
> > This patch is dependent on share code, so cannot cc stable.
> >
> 
> I don't think the original definition should be the fixes commit, unless it 
> was
> incorrect before these patches.
> 
> This warning was introduced by the redefining in patch 13/18. It would be
> better to fix 13/18 to not introduce the warning, rather than introduce a
> warning and fix it at the end of the series.

+1

If fix a patch belong to the same set, please squash them into 1.

> 
> >>
> >>>
> >>> Signed-off-by: Robin Zhang 
> >>> ---
> >>>   drivers/net/i40e/i40e_ethdev.c | 3 +--
> >>>   1 file changed, 1 insertion(+), 2 deletions(-)
> >>>
> >>> diff --git a/drivers/net/i40e/i40e_ethdev.c
> >>> b/drivers/net/i40e/i40e_ethdev.c index 7b230e2ed1..4fc44dc5e2 100644
> >>> --- a/drivers/net/i40e/i40e_ethdev.c
> >>> +++ b/drivers/net/i40e/i40e_ethdev.c
> >>> @@ -2886,7 +2886,6 @@ static __rte_always_inline void
> >>> update_link_reg(struct i40e_hw *hw, struct rte_eth_link *link)  {
> >>>   /* Link status registers and values*/
> >>> -#define I40E_PRTMAC_LINKSTA  0x001E2420
> >>>   #define I40E_REG_LINK_UP0x4080
> >>>   #define I40E_PRTMAC_MACC0x001E24E0
> >>>   #define I40E_REG_MACC_25GB  0x0002
> >>> @@ -2899,7 +2898,7 @@ update_link_reg(struct i40e_hw *hw, struct
> >>> rte_eth_link *link)
> >>>   uint32_t link_speed;
> >>>   uint32_t reg_val;
> >>>
> >>> - reg_val = I40E_READ_REG(hw, I40E_PRTMAC_LINKSTA);
> >>> + reg_val = I40E_READ_REG(hw, I40E_PRTMAC_LINKSTA(0));
> >>>   link_speed = reg_val & I40E_REG_SPEED_MASK;
> >>>   reg_val &= I40E_REG_LINK_UP;
> >>>   link->link_status = (reg_val == I40E_REG_LINK_UP) ? 1 : 0;
> >>> --
> >>> 2.25.1
> >

Re: [dpdk-dev] [RFC PATCH 2/2] ethdev: add capability to keep indirect actions on restart

2021-09-27 Thread Dmitry Kozlyuk

2021-09-01 11:55 (UTC+0300), Dmitry Kozlyuk:
> rte_flow_action_handle_create() did not mention what happens
> with an indirect action when a device is stopped, possibly reconfigured,
> and started again. It is natural for some indirect actions to be
> persistent, like counters and meters; keeping others just saves
> application time and complexity. However, not all PMDs can support it.
> It is proposed to add a device capability to indicate if indirect actions
> are kept across the above sequence or implicitly destroyed.
> 
> It may happen that in the future a PMD acquires support for a type of
> indirect actions that it cannot keep across a restart. It is undesirable
> to stop advertising the capability so that applications that don't use
> actions of the problematic type can still take advantage of it.
> This is why PMDs are allowed to keep only a subset of indirect actions
> provided that the vendor mandatorily documents it.
> 
> If the device is being reconfigured in a way that is incompatible with
> an existing indirect action, PMD is required to report an error.
> This is mandatory, because flow API does not supply users with
> capabilities, so this is the only way for a user to learn that
> configuration is invalid. For example, if queue count changes and RSS
> indirect action specifies queues that are going away, the user must
> update the action before removing the queues or remove the action and
> all flow rules that were using it.
> 
> Signed-off-by: Dmitry Kozlyuk 
> Acked-by: Matan Azrad 
> Acked-by: Ori Kam 
> ---
>  doc/guides/prog_guide/rte_flow.rst | 12 
>  lib/ethdev/rte_ethdev.h|  5 +
>  2 files changed, 17 insertions(+)
> 
> [...]

Hello, any opinions?

Just noticed that I forgot to Cc everyone in the cover letter with context:

http://inbox.dpdk.org/dev/20210901085516.3647814-1-dkozl...@nvidia.com/

Re: [dpdk-dev] [PATCH] ethdev: group constant definitions in Doxygen

2021-09-27 Thread Ferruh Yigit

On 9/23/2021 5:35 PM, Kevin Traynor wrote:
> On 30/08/2021 11:42, Thomas Monjalon wrote:
>> A lot of flags are parts of a group but are documented alone.
>> The Doxygen syntax @{ and @} for grouping is used
>> to make flags appear together and have a common description.
>>
>> Some Rx/Tx offload flags and RSS definitions are not grouped
>> because they need to be all properly documented first.
>>
>> Signed-off-by: Thomas Monjalon
>> ---
>>   lib/ethdev/rte_ethdev.h | 71 -
>>   1 file changed, 48 insertions(+), 23 deletions(-)
> 
> lgtm, this is a nice enhancement when reading the api guide.
> 
> Acked-by: Kevin Traynor 
> 

Converting to explicit acks:
Acked-by: Ferruh Yigit 
Acked-by: Andrew Rybchenko 


Applied to dpdk-next-net/main, thanks.

[dpdk-dev] [PATCH] net/mlx5: fix Tx metadata endianness in data path

2021-09-27 Thread Bing Zhao

The metadata can be set in the mbuf dynamic field and then used in
flow rules steering for egress direction. The hardware requires
network order for both the insertion of a rule and sending a packet.
Indeed, there is no strict restriction for the endianness. The order
for sending a packet and its steering rule should be consistent.

In the past, there was no endianness conversion due to the
performance reason. The flow rule converted the metadata into little
endian for hardware (if needed) and the packet hit the flow rule also
with little endian.

After the metadata was converted to big endian, the missing adaption
in the data path resulted in a flow miss of the egress packets.

Converting the metadata to big endian before posting a WQE to the
hardware solves this issue.

Fixes: b57e414b48c0 ("net/mlx5: convert meta register to big-endian")
Cc: akozy...@nvidia.com
Cc: sta...@dpdk.org

Signed-off-by: Bing Zhao 
Acked-by: Viacheslav Ovsiienko 
---
 drivers/net/mlx5/mlx5_tx.h | 14 +-
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_tx.h b/drivers/net/mlx5/mlx5_tx.h
index 1a35919371..77d6069755 100644
--- a/drivers/net/mlx5/mlx5_tx.h
+++ b/drivers/net/mlx5/mlx5_tx.h
@@ -953,7 +953,8 @@ mlx5_tx_eseg_none(struct mlx5_txq_data *__rte_restrict txq 
__rte_unused,
/* Fill metadata field if needed. */
es->metadata = MLX5_TXOFF_CONFIG(METADATA) ?
   loc->mbuf->ol_flags & PKT_TX_DYNF_METADATA ?
-  *RTE_FLOW_DYNF_METADATA(loc->mbuf) : 0 : 0;
+  rte_cpu_to_be_32(*RTE_FLOW_DYNF_METADATA(loc->mbuf)) :
+  0 : 0;
/* Engage VLAN tag insertion feature if requested. */
if (MLX5_TXOFF_CONFIG(VLAN) &&
loc->mbuf->ol_flags & PKT_TX_VLAN_PKT) {
@@ -1013,7 +1014,8 @@ mlx5_tx_eseg_dmin(struct mlx5_txq_data *__rte_restrict 
txq __rte_unused,
/* Fill metadata field if needed. */
es->metadata = MLX5_TXOFF_CONFIG(METADATA) ?
   loc->mbuf->ol_flags & PKT_TX_DYNF_METADATA ?
-  *RTE_FLOW_DYNF_METADATA(loc->mbuf) : 0 : 0;
+  rte_cpu_to_be_32(*RTE_FLOW_DYNF_METADATA(loc->mbuf)) :
+  0 : 0;
psrc = rte_pktmbuf_mtod(loc->mbuf, uint8_t *);
es->inline_hdr_sz = RTE_BE16(MLX5_ESEG_MIN_INLINE_SIZE);
es->inline_data = *(unaligned_uint16_t *)psrc;
@@ -1096,7 +1098,8 @@ mlx5_tx_eseg_data(struct mlx5_txq_data *__rte_restrict 
txq,
/* Fill metadata field if needed. */
es->metadata = MLX5_TXOFF_CONFIG(METADATA) ?
   loc->mbuf->ol_flags & PKT_TX_DYNF_METADATA ?
-  *RTE_FLOW_DYNF_METADATA(loc->mbuf) : 0 : 0;
+  rte_cpu_to_be_32(*RTE_FLOW_DYNF_METADATA(loc->mbuf)) :
+  0 : 0;
psrc = rte_pktmbuf_mtod(loc->mbuf, uint8_t *);
es->inline_hdr_sz = rte_cpu_to_be_16(inlen);
es->inline_data = *(unaligned_uint16_t *)psrc;
@@ -1308,7 +1311,8 @@ mlx5_tx_eseg_mdat(struct mlx5_txq_data *__rte_restrict 
txq,
/* Fill metadata field if needed. */
es->metadata = MLX5_TXOFF_CONFIG(METADATA) ?
   loc->mbuf->ol_flags & PKT_TX_DYNF_METADATA ?
-  *RTE_FLOW_DYNF_METADATA(loc->mbuf) : 0 : 0;
+  rte_cpu_to_be_32(*RTE_FLOW_DYNF_METADATA(loc->mbuf)) :
+  0 : 0;
MLX5_ASSERT(inlen >= MLX5_ESEG_MIN_INLINE_SIZE);
pdst = (uint8_t *)&es->inline_data;
if (MLX5_TXOFF_CONFIG(VLAN) && vlan) {
@@ -2470,7 +2474,7 @@ mlx5_tx_match_empw(struct mlx5_txq_data *__rte_restrict 
txq,
/* Fill metadata field if needed. */
if (MLX5_TXOFF_CONFIG(METADATA) &&
es->metadata != (loc->mbuf->ol_flags & PKT_TX_DYNF_METADATA ?
-*RTE_FLOW_DYNF_METADATA(loc->mbuf) : 0))
+   rte_cpu_to_be_32(*RTE_FLOW_DYNF_METADATA(loc->mbuf)) : 0))
return false;
/* Legacy MPW can send packets with the same length only. */
if (MLX5_TXOFF_CONFIG(MPW) &&
-- 
2.27.0

Re: [dpdk-dev] [PATCH v3] Enable AddressSanitizer feature on DPDK

2021-09-27 Thread Burakov, Anatoly


On 18-Sep-21 8:41 AM, zhihongx.p...@intel.com wrote:

From: Zhihong Peng 

AddressSanitizer (ASan) is a google memory error detect
standard tool. It could help to detect use-after-free and
{heap,stack,global}-buffer overflow bugs in C/C++ programs,
print detailed error information when error happens, large
improve debug efficiency.

By referring to its implementation algorithm
(https://github.com/google/sanitizers/wiki/AddressSanitizerAlgorithm),
enable heap-buffer-overflow and use-after-free functions on dpdk.
DPDK ASAN function currently only supports on Linux x86_64.

Here is an example of heap-buffer-overflow bug:
 ..
 char *p = rte_zmalloc(NULL, 7, 0);
 p[7] = 'a';
 ..

Here is an example of use-after-free bug:
 ..
 char *p = rte_zmalloc(NULL, 7, 0);
 rte_free(p);
 *p = 'a';
 ..

If you want to use this feature,
you need to add below compilation options when compiling code:
-Dbuildtype=debug -Db_lundef=false -Db_sanitize=address
"-Dbuildtype=debug": Display code information when coredump occurs
in the program.
"-Db_lundef=false": It is enabled by default, and needs to be
disabled when using asan.

Signed-off-by: Xueqin Lin 
Signed-off-by: Zhihong Peng 
---
  doc/guides/prog_guide/asan.rst  | 130 ++
  doc/guides/prog_guide/index.rst |   1 +
  lib/eal/common/malloc_elem.c|  26 -
  lib/eal/common/malloc_elem.h| 184 +++-
  lib/eal/common/malloc_heap.c|  12 +++
  lib/eal/common/rte_malloc.c |   9 +-
  lib/pipeline/rte_swx_pipeline.c |   4 +-
  7 files changed, 359 insertions(+), 7 deletions(-)
  create mode 100644 doc/guides/prog_guide/asan.rst

diff --git a/doc/guides/prog_guide/asan.rst b/doc/guides/prog_guide/asan.rst
new file mode 100644
index 00..a0589d9b8a
--- /dev/null
+++ b/doc/guides/prog_guide/asan.rst
@@ -0,0 +1,130 @@
+.. Copyright (c) <2021>, Intel Corporation
+   All rights reserved.
+
+Memory error detect standard tool - AddressSanitizer(Asan)
+==
+
+AddressSanitizer (ASan) is a google memory error detect
+standard tool. It could help to detect use-after-free and
+{heap,stack,global}-buffer overflow bugs in C/C++ programs,
+print detailed error information when error happens, large
+improve debug efficiency.
+
+By referring to its implementation algorithm
+(https://github.com/google/sanitizers/wiki/AddressSanitizerAlgorithm),
+enabled heap-buffer-overflow and use-after-free functions on dpdk.
+DPDK ASAN function currently only supports on Linux x86_64.


I think the description is a little to wordy and unnecessarily redundant 
(pun intended!) in places. Suggested rewording:


`AddressSanitizer 
` (ASan) is 
a widely-used debugging tool to detect memory access errors. It helps 
detect issues like use-after-free, various kinds of buffer overruns in 
C/C++ programs, and other similar errors, as well as printing out 
detailed debug information whenever an error is detected.


DPDK ASan functionality is currently only supported Linux x86_64.


+
+AddressSanitizer is a part of LLVM(3.1+)and GCC(4.8+).
+
+Example heap-buffer-overflow error
+--
+
+Following error was reported when Asan was enabled::
+
+Applied 9 bytes of memory, but accessed the 10th byte of memory,
+so heap-buffer-overflow appeared.
+
+Below code results in this error::
+
+char *p = rte_zmalloc(NULL, 9, 0);
+if (!p) {
+printf("rte_zmalloc error.");
+return -1;
+}
+p[9] = 'a';
+
+The error log::
+
+==49433==ERROR: AddressSanitizer: heap-buffer-overflow on address 
0x7f773fafa249 at pc 0x5556b13bdae4 bp 0x7ffeb4965e40 sp 0x7ffeb4965e30 WRITE 
of size 1 at 0x7f773fafa249 thread T0
+#0 0x5556b13bdae3 in asan_heap_buffer_overflow 
../app/test/test_asan_heap_buffer_overflow.c:25
+#1 0x5556b043e9d4 in cmd_autotest_parsed ../app/test/commands.c:71
+#2 0x5556b1cdd4b0 in cmdline_parse ../lib/cmdline/cmdline_parse.c:290
+#3 0x5556b1cd8987 in cmdline_valid_buffer ../lib/cmdline/cmdline.c:26
+#4 0x5556b1ce477a in rdline_char_in ../lib/cmdline/cmdline_rdline.c:421
+#5 0x5556b1cd923e in cmdline_in ../lib/cmdline/cmdline.c:149
+#6 0x5556b1cd9769 in cmdline_interact ../lib/cmdline/cmdline.c:223
+#7 0x5556b045f53b in main ../app/test/test.c:234
+#8 0x7f7f1eba90b2 in __libc_start_main 
(/lib/x86_64-linux-gnu/libc.so.6+0x270b2)
+#9 0x5556b043e70d in _start 
(/home/pzh/yyy/x86_64-native-linuxapp-gcc/app/test/dpdk-test+0x7ce70d)
+
+Address 0x7f773fafa249 is a wild pointer.
+SUMMARY: AddressSanitizer: heap-buffer-overflow 
../app/test/test_asan_heap_buffer_overflow.c:25 in asan_heap_buffer_overflow
+Shadow bytes around the buggy address:
+0x0fef67f573f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+0x0fef67f57400: fa fa 00 00 00 00 00 00 00

Re: [dpdk-dev] [PATCH v4 00/18] i40e base code update

2021-09-27 Thread Zhang, Qi Z



> -Original Message-
> From: Xing, Beilei 
> Sent: Monday, September 27, 2021 5:42 PM
> To: Zhang, RobinX ; dev@dpdk.org
> Cc: Zhang, Qi Z ; Zhang, Helin ;
> Wu, Jingjing ; remy.hor...@intel.com;
> jijiang@intel.com; jing.d.c...@intel.com; Zhu, Heqing
> ; Liang, Cunming ; Lu,
> Wenzhuo ; Zhang, Roy Fan
> ; Chilikin, Andrey ;
> echau...@redhat.com; Guo, Junfeng ; Yang, SteveX
> 
> Subject: RE: [PATCH v4 00/18] i40e base code update
> 
> 
> 
> > -Original Message-
> > From: Zhang, RobinX 
> > Sent: Monday, September 6, 2021 10:03 AM
> > To: dev@dpdk.org
> > Cc: Xing, Beilei ; Zhang, Qi Z
> > ; Zhang, Helin ; Wu,
> > Jingjing ; remy.hor...@intel.com;
> > jijiang@intel.com; jing.d.c...@intel.com; Zhu, Heqing
> > ; Liang, Cunming ; Lu,
> > Wenzhuo ; Zhang, Roy Fan
> > ; Chilikin, Andrey
> > ; echau...@redhat.com; Guo, Junfeng
> > ; Yang, SteveX ; Zhang,
> > RobinX 
> > Subject: [PATCH v4 00/18] i40e base code update
> >
> > update i40e base code.
> >
> > source code of i40e driver:
> > cid-i40e.2021.08.16.tar.gz
> >
> > changelog in i40e share repo:
> > From 59a080f4fafe ("i40e-shared: Add opcode 0x0406 and 0x0416 to Linux
> > support") To 2c7aab559654 ("i40e-shared: Add defines related to DDP")
> >
> > The following commits are ignored:
> > cb9139e3bce8 ("i40e-shared: Fix not blinking X722 with x557 PHY via
> > ‘ethtool
> > -p'")
> > c09d4f9cf390 ("i40e-shared: i40e-shared: Fix build warning -Wformat
> > related to integer size")
> > ff8a1abc6c17 ("i40e-shared: Fix build warning with __packed")
> > 59a080f4fafe
> > ("i40e-shared: Add opcode 0x0406 and 0x0416 to Linux
> > support")
> >
> > v4:
> > - update base code to cid-i40e.2021.08.16
> > v3:
> > - there has a fix patch contains two issues, split it into two patches
> > v2:
> > - refine commit messages and macro name
> >
> > Robin Zhang (18):
> >   net/i40e/base: add new versions of send ASQ command functions
> >   net/i40e/base: add support for Min Rollback Revision for 4 more X722
> > modules
> >   net/i40e/base: set TSA table values when parsing CEE configuration
> >   net/i40e/base: define new Shadow RAM pointers
> >   net/i40e/base: fix PHY type identifiers for 2.5G and 5G adapters
> >   net/i40e/base: fix PF reset failed
> >   net/i40e/base: fix update link data for X722
> >   net/i40e/base: fix AOC media type reported by ethtool
> >   net/i40e/base: add flags and fields for double vlan processing
> >   net/i40e/base: fix headers to match functions
> >   net/i40e/base: fix potentially uninitialized variables in NVM code
> >   net/i40e/base: fix checksum is used before return value is checked
> >   net/i40e/base: add defs for MAC frequency calculation if no link
> >   net/i40e/base: separate kernel allocated rx_bi rings from AF_XDP rings
> >   net/i40e/base: Update FVL FW API version to 1.15
> >   net/i40e/base: add defines related to DDP
> >   net/i40e/base: update version in readme
> >   net/i40e: fix redefinition warning
> >
> >  drivers/net/i40e/base/README|   2 +-
> >  drivers/net/i40e/base/i40e_adminq.c |  79 +--
> >  drivers/net/i40e/base/i40e_adminq_cmd.h |  55 ++--
> >  drivers/net/i40e/base/i40e_common.c | 175
> +++-
> >  drivers/net/i40e/base/i40e_dcb.c|  10 +-
> >  drivers/net/i40e/base/i40e_lan_hmc.c|   2 +-
> >  drivers/net/i40e/base/i40e_nvm.c|   7 +-
> >  drivers/net/i40e/base/i40e_prototype.h  |  17 +++
> >  drivers/net/i40e/base/i40e_register.h   |  10 ++
> >  drivers/net/i40e/base/i40e_type.h   |  26 +++-
> >  drivers/net/i40e/i40e_ethdev.c  |   3 +-
> >  11 files changed, 318 insertions(+), 68 deletions(-)
> >
> > --
> > 2.25.1
> 
> Acked-by: Beilei Xing 

Applied to dpdk-next-net-intel after squash patch 18/18 into patch 13/18.

Thanks
Qi

>

Re: [dpdk-dev] [PATCH v4 1/2] Enable ASan for memory detector on DPDK

2021-09-27 Thread Burakov, Anatoly


On 24-Sep-21 10:52 AM, Olivier Matz wrote:

Hi Zhihong,

On Fri, Sep 24, 2021 at 02:16:29AM +, zhihongx.p...@intel.com wrote:

From: Zhihong Peng 

AddressSanitizer (ASan) is a google memory error detect
standard tool. It could help to detect use-after-free and
{heap,stack,global}-buffer overflow bugs in C/C++ programs,
print detailed error information when error happens, large
improve debug efficiency.

By referring to its implementation algorithm
(https://github.com/google/sanitizers/wiki/AddressSanitizerAlgorithm),
enable heap-buffer-overflow and use-after-free functions on dpdk.
DPDK ASan function currently only supports on Linux x86_64.
Support other platforms, need to define ASAN_SHADOW_OFFSET value according
to google ASan document.

Here is an example of heap-buffer-overflow bug:
 ..
 char *p = rte_zmalloc(NULL, 7, 0);
 p[7] = 'a';
 ..

Here is an example of use-after-free bug:
 ..
 char *p = rte_zmalloc(NULL, 7, 0);
 rte_free(p);
 *p = 'a';
 ..

If you want to use this feature,
you need to add below compilation options when compiling code:
-Dbuildtype=debug -Db_lundef=false -Db_sanitize=address
"-Dbuildtype=debug": This is a non-essential option. When this option
is added, if a memory error occurs, ASan can clearly show where the
code is wrong.
"-Db_lundef=false": When use clang to compile DPDK, this option must
be added.

Note:
a) The issue of ASan wild pointer is that dpdk ASan tool is not fully
adapted to google ASan. For example: Address 0x7fe2ffafa240 is a wild
pointer.
b) Centos needs to install libasan separately.
c) If the program uses DPDK cmdline, when a memory bug occurs, need
to execute the "stty echo" command.

Signed-off-by: Xueqin Lin 
Signed-off-by: Zhihong Peng 


Thank you for this patch, this looks quite useful.

Do you know what is the performance impact of enabling ASan?

Do you think a similar approach could be applied to mempools?


It would be a bit difficult, because mempools aren't actually allocating 
anything, they're just juggling pointers. A lot of times, an "allocated" 
mbuf wouldn't actually be allocated, and just sitting in the mempool 
cache, being "free" while still not present in the mempool.


Also, obviously, any such functionality (be it ASan for rte_malloc, or 
ASan for mempools) will necessarily only work inside one process, and 
will not support multiprocess.




Regards,
Olivier




--
Thanks,
Anatoly

Re: [dpdk-dev] [PATCH v5 2/2] vhost: enable IOMMU for async vhost

2021-09-27 Thread Burakov, Anatoly


On 27-Sep-21 8:48 AM, Xuan Ding wrote:

The use of IOMMU has many advantages, such as isolation and address
translation. This patch extends the capbility of DMA engine to use
IOMMU if the DMA engine is bound to vfio.

When set memory table, the guest memory will be mapped
into the default container of DPDK.

Signed-off-by: Xuan Ding 
---




/* Flush IOTLB cache as previous HVAs are now invalid */
@@ -1329,6 +1424,17 @@ vhost_user_set_mem_table(struct virtio_net **pdev, 
struct VhostUserMsg *msg,
goto free_guest_pages;
}
  
+	if (dev->async_copy) {

+   dev->async_map_status = 
rte_zmalloc_socket("async-dma-map-status",
+   sizeof(bool) * memory->nregions, 0, 
numa_node);


Would it be useful to sanity check this to make sure we're not leaking 
memory?


--
Thanks,
Anatoly

Re: [dpdk-dev] [PATCH v6 02/10] security: add UDP params for IPsec NAT-T

2021-09-27 Thread Nicolau, Radu




On 9/23/2021 1:43 PM, Ananyev, Konstantin wrote:

Add support for specifying UDP port params for UDP encapsulation option.
RFC3948 section-2.1 does not enforce using specific the UDP ports for
UDP-Encapsulated ESP Header

Signed-off-by: Declan Doherty 
Signed-off-by: Radu Nicolau 
Signed-off-by: Abhijit Sinha 
Signed-off-by: Daniel Martin Buckley 
Acked-by: Fan Zhang 
---
  lib/security/rte_security.h | 8 
  1 file changed, 8 insertions(+)

diff --git a/lib/security/rte_security.h b/lib/security/rte_security.h
index 495a228915..84ba1b08f8 100644
--- a/lib/security/rte_security.h
+++ b/lib/security/rte_security.h
@@ -112,6 +112,12 @@ struct rte_security_ipsec_tunnel_param {
};
  };

+struct rte_security_ipsec_udp_param {
+
+   uint16_t sport;
+   uint16_t dport;
+};

Would it be worth to have ability to access 32-bits at once.
Something like:
union rte_security_ipsec_udp_param {
uint32_t raw;
struct {
uint16_t sport, dport;
};
};
?


TBH I don't see any reason to access them as a 32b value...





+
  /**
   * IPsec Security Association option flags
   */
@@ -224,6 +230,8 @@ struct rte_security_ipsec_xform {
/**< IPsec SA Mode - transport/tunnel */
struct rte_security_ipsec_tunnel_param tunnel;
/**< Tunnel parameters, NULL for transport mode */
+   struct rte_security_ipsec_udp_param udp;
+   /**< UDP parameters, ignored when udp_encap option not specified */

Any reason to insert it into the middle of the xform struct?
Why not to the end?
I can't see any good reason I guess it just looked better, I will move 
it at the end.

Re: [dpdk-dev] [PATCH v6 03/10] security: add ESN field to ipsec_xform

2021-09-27 Thread Nicolau, Radu




On 9/23/2021 1:46 PM, Ananyev, Konstantin wrote:

Update ipsec_xform definition to include ESN field.
This allows the application to control the ESN starting value.

Signed-off-by: Declan Doherty 
Signed-off-by: Radu Nicolau 
Signed-off-by: Abhijit Sinha 
Signed-off-by: Daniel Martin Buckley 
Acked-by: Fan Zhang 
Acked-by: Anoob Joseph 
---
  lib/security/rte_security.h | 8 
  1 file changed, 8 insertions(+)

diff --git a/lib/security/rte_security.h b/lib/security/rte_security.h
index 84ba1b08f8..1bd09e3cc2 100644
--- a/lib/security/rte_security.h
+++ b/lib/security/rte_security.h
@@ -240,6 +240,14 @@ struct rte_security_ipsec_xform {
 */
uint32_t mss;
/**< IPsec payload Maximum Segment Size */
+   union {
+   uint64_t value;
+   struct {
+   uint32_t low;
+   uint32_t hi;

Do we really need low/hi here?
As I remember ESN is 64bit value, no?
The low and high halves are managed differently so I think for better 
consistency it's easier to have them as such.

[dpdk-dev] [PATCH 00/11] NXP DPAAx Bus and PMD changes

2021-09-27 Thread nipun . gupta

From: Nipun Gupta 

This series adds new functionality related to flow redirection,
multiple ordered tx enqueues, generating HW hash key etc.
It also updates the MC firmware version and includes a fix in
dpaxx library.

Gagandeep Singh (1):
  common/dpaax: fix paddr to vaddr invalid conversion

Hemant Agrawal (4):
  bus/fslmc: updated MC FW to 10.28
  bus/fslmc: add qbman debug APIs support
  net/dpaa2: add debug print for MTU set for jumbo
  net/dpaa2: add function to generate HW hash key

Jun Yang (2):
  net/dpaa2: support Tx flow redirection action
  net/dpaa2: support multiple Tx queues enqueue for ordered

Nipun Gupta (2):
  raw/dpaa2_qdma: use correct params for config and queue setup
  raw/dpaa2_qdma: remove checks for lcore ID

Rohit Raj (1):
  net/dpaa: add comments to explain driver behaviour

Vanshika Shukla (1):
  net/dpaa2: update RSS to support additional distributions

 drivers/bus/fslmc/mc/dpdmai.c |   4 +-
 drivers/bus/fslmc/mc/fsl_dpdmai.h |  21 +-
 drivers/bus/fslmc/mc/fsl_dpdmai_cmd.h |  15 +-
 drivers/bus/fslmc/mc/fsl_dpmng.h  |   4 +-
 drivers/bus/fslmc/mc/fsl_dpopr.h  |   7 +-
 .../bus/fslmc/qbman/include/fsl_qbman_debug.h | 203 +-
 drivers/bus/fslmc/qbman/qbman_debug.c | 623 ++
 drivers/bus/fslmc/qbman/qbman_portal.c|   6 +
 drivers/common/dpaax/dpaax_iova_table.h   |   8 +-
 drivers/event/dpaa2/dpaa2_eventdev.c  |  12 +-
 drivers/net/dpaa/dpaa_fmc.c   |   8 +-
 drivers/net/dpaa2/base/dpaa2_hw_dpni.c|  70 +-
 drivers/net/dpaa2/base/dpaa2_tlu_hash.c   | 149 +
 drivers/net/dpaa2/dpaa2_ethdev.c  |   9 +-
 drivers/net/dpaa2/dpaa2_ethdev.h  |  11 +-
 drivers/net/dpaa2/dpaa2_flow.c| 116 +++-
 drivers/net/dpaa2/dpaa2_rxtx.c| 142 
 drivers/net/dpaa2/mc/dpdmux.c |  43 ++
 drivers/net/dpaa2/mc/dpni.c   |  48 +-
 drivers/net/dpaa2/mc/dprtc.c  |  78 ++-
 drivers/net/dpaa2/mc/fsl_dpdmux.h |   6 +
 drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h |   9 +
 drivers/net/dpaa2/mc/fsl_dpkg.h   |   6 +-
 drivers/net/dpaa2/mc/fsl_dpni.h   | 147 -
 drivers/net/dpaa2/mc/fsl_dpni_cmd.h   |  55 +-
 drivers/net/dpaa2/mc/fsl_dprtc.h  |  19 +-
 drivers/net/dpaa2/mc/fsl_dprtc_cmd.h  |  25 +-
 drivers/net/dpaa2/meson.build |   1 +
 drivers/net/dpaa2/rte_pmd_dpaa2.h |  19 +
 drivers/net/dpaa2/version.map |   3 +
 drivers/raw/dpaa2_qdma/dpaa2_qdma.c   |  26 +-
 drivers/raw/dpaa2_qdma/rte_pmd_dpaa2_qdma.h   |   8 +-
 32 files changed, 1788 insertions(+), 113 deletions(-)
 create mode 100644 drivers/net/dpaa2/base/dpaa2_tlu_hash.c

-- 
2.17.1

[dpdk-dev] [PATCH 01/11] bus/fslmc: updated MC FW to 10.28

2021-09-27 Thread nipun . gupta

From: Hemant Agrawal 

Updating MC firmware support APIs to be latest. It supports
improved DPDMUX (SRIOV equivalent) for traffic split between
dpnis and additional PTP APIs.

Signed-off-by: Hemant Agrawal 
---
 drivers/bus/fslmc/mc/dpdmai.c |   4 +-
 drivers/bus/fslmc/mc/fsl_dpdmai.h |  21 -
 drivers/bus/fslmc/mc/fsl_dpdmai_cmd.h |  15 ++--
 drivers/bus/fslmc/mc/fsl_dpmng.h  |   4 +-
 drivers/bus/fslmc/mc/fsl_dpopr.h  |   7 +-
 drivers/net/dpaa2/dpaa2_ethdev.c  |   2 +-
 drivers/net/dpaa2/mc/dpdmux.c |  43 +
 drivers/net/dpaa2/mc/dpni.c   |  48 ++
 drivers/net/dpaa2/mc/dprtc.c  |  78 +++-
 drivers/net/dpaa2/mc/fsl_dpdmux.h |   6 ++
 drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h |   9 ++
 drivers/net/dpaa2/mc/fsl_dpkg.h   |   6 +-
 drivers/net/dpaa2/mc/fsl_dpni.h   | 124 ++
 drivers/net/dpaa2/mc/fsl_dpni_cmd.h   |  55 +---
 drivers/net/dpaa2/mc/fsl_dprtc.h  |  19 +++-
 drivers/net/dpaa2/mc/fsl_dprtc_cmd.h  |  25 +-
 16 files changed, 401 insertions(+), 65 deletions(-)

diff --git a/drivers/bus/fslmc/mc/dpdmai.c b/drivers/bus/fslmc/mc/dpdmai.c
index dcb9d516a1..9c2f3bf9d5 100644
--- a/drivers/bus/fslmc/mc/dpdmai.c
+++ b/drivers/bus/fslmc/mc/dpdmai.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2018 NXP
+ * Copyright 2018-2021 NXP
  */
 
 #include 
@@ -116,6 +116,7 @@ int dpdmai_create(struct fsl_mc_io *mc_io,
cmd_params->num_queues = cfg->num_queues;
cmd_params->priorities[0] = cfg->priorities[0];
cmd_params->priorities[1] = cfg->priorities[1];
+   cmd_params->options = cpu_to_le32(cfg->adv.options);
 
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -299,6 +300,7 @@ int dpdmai_get_attributes(struct fsl_mc_io *mc_io,
attr->id = le32_to_cpu(rsp_params->id);
attr->num_of_priorities = rsp_params->num_of_priorities;
attr->num_of_queues = rsp_params->num_of_queues;
+   attr->options = le32_to_cpu(rsp_params->options);
 
return 0;
 }
diff --git a/drivers/bus/fslmc/mc/fsl_dpdmai.h 
b/drivers/bus/fslmc/mc/fsl_dpdmai.h
index 19328c00a0..5af8ed48c0 100644
--- a/drivers/bus/fslmc/mc/fsl_dpdmai.h
+++ b/drivers/bus/fslmc/mc/fsl_dpdmai.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2018 NXP
+ * Copyright 2018-2021 NXP
  */
 
 #ifndef __FSL_DPDMAI_H
@@ -36,15 +36,32 @@ int dpdmai_close(struct fsl_mc_io *mc_io,
 uint32_t cmd_flags,
 uint16_t token);
 
+/* DPDMAI options */
+
+/**
+ * Enable individual Congestion Groups usage per each priority queue
+ * If this option is not enabled then only one CG is used for all priority
+ * queues
+ * If this option is enabled then a separate specific CG is used for each
+ * individual priority queue.
+ * In this case the priority queue must be specified via congestion 
notification
+ * API
+ */
+#define DPDMAI_OPT_CG_PER_PRIORITY 0x0001
+
 /**
  * struct dpdmai_cfg - Structure representing DPDMAI configuration
  * @priorities: Priorities for the DMA hardware processing; valid priorities 
are
  * configured with values 1-8; the entry following last valid entry
  * should be configured with 0
+ * @options: dpdmai options
  */
 struct dpdmai_cfg {
uint8_t num_queues;
uint8_t priorities[DPDMAI_PRIO_NUM];
+   struct {
+   uint32_t options;
+   } adv;
 };
 
 int dpdmai_create(struct fsl_mc_io *mc_io,
@@ -81,11 +98,13 @@ int dpdmai_reset(struct fsl_mc_io *mc_io,
  * struct dpdmai_attr - Structure representing DPDMAI attributes
  * @id: DPDMAI object ID
  * @num_of_priorities: number of priorities
+ * @options: dpdmai options
  */
 struct dpdmai_attr {
int id;
uint8_t num_of_priorities;
uint8_t num_of_queues;
+   uint32_t options;
 };
 
 __rte_internal
diff --git a/drivers/bus/fslmc/mc/fsl_dpdmai_cmd.h 
b/drivers/bus/fslmc/mc/fsl_dpdmai_cmd.h
index 7e122de4ef..c8f6b990f8 100644
--- a/drivers/bus/fslmc/mc/fsl_dpdmai_cmd.h
+++ b/drivers/bus/fslmc/mc/fsl_dpdmai_cmd.h
@@ -1,32 +1,33 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2018 NXP
+ * Copyright 2017-2018, 2020-2021 NXP
  */
-
 #ifndef _FSL_DPDMAI_CMD_H
 #define _FSL_DPDMAI_CMD_H
 
 /* DPDMAI Version */
 #define DPDMAI_VER_MAJOR   3
-#define DPDMAI_VER_MINOR   3
+#define DPDMAI_VER_MINOR   4
 
 /* Command versioning */
 #define DPDMAI_CMD_BASE_VERSION1
 #define DPDMAI_CMD_VERSION_2   2
+#define DPDMAI_CMD_VERSION_3   3
 #define DPDMAI_CMD_ID_OFFSET   4
 
 #define DPDMAI_CMD(id) ((id << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_BASE_VERSION)
 #define DPDMAI_CMD_V2(id) ((id << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_VERSION_2)
+#define DPDMAI_CMD_V3(id) ((id << DPDMAI_CMD_ID_OFFSET) | DPDMAI_CMD_VERSION_3)
 
 /* Command IDs */
 #define DPDMAI_CMDID_CLOSE DPDMAI_CMD(0x8

[dpdk-dev] [PATCH 02/11] net/dpaa2: support Tx flow redirection action

2021-09-27 Thread nipun . gupta

From: Jun Yang 

TX redirection support by flow action RTE_FLOW_ACTION_TYPE_PHY_PORT
and RTE_FLOW_ACTION_TYPE_PORT_ID

This action is executed by HW to forward packets between ports.
If the ingress packets match the rule, the packets are switched
without software involved and perf is improved as well.

Signed-off-by: Jun Yang 
---
 drivers/net/dpaa2/dpaa2_ethdev.c |   5 ++
 drivers/net/dpaa2/dpaa2_ethdev.h |   1 +
 drivers/net/dpaa2/dpaa2_flow.c   | 116 +++
 drivers/net/dpaa2/mc/fsl_dpni.h  |  23 ++
 4 files changed, 132 insertions(+), 13 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 560b79151b..9cf55c0f0b 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -2822,6 +2822,11 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
return ret;
 }
 
+int dpaa2_dev_is_dpaa2(struct rte_eth_dev *dev)
+{
+   return dev->device->driver == &rte_dpaa2_pmd.driver;
+}
+
 static int
 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
struct rte_dpaa2_device *dpaa2_dev)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index b9c729f6cd..3f34d7ecff 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -240,6 +240,7 @@ uint16_t dummy_dev_tx(void *queue, struct rte_mbuf **bufs, 
uint16_t nb_pkts);
 void dpaa2_dev_free_eqresp_buf(uint16_t eqresp_ci);
 void dpaa2_flow_clean(struct rte_eth_dev *dev);
 uint16_t dpaa2_dev_tx_conf(void *queue)  __rte_unused;
+int dpaa2_dev_is_dpaa2(struct rte_eth_dev *dev);
 
 int dpaa2_timesync_enable(struct rte_eth_dev *dev);
 int dpaa2_timesync_disable(struct rte_eth_dev *dev);
diff --git a/drivers/net/dpaa2/dpaa2_flow.c b/drivers/net/dpaa2/dpaa2_flow.c
index bfe17c350a..5de886ec5e 100644
--- a/drivers/net/dpaa2/dpaa2_flow.c
+++ b/drivers/net/dpaa2/dpaa2_flow.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2018-2020 NXP
+ * Copyright 2018-2021 NXP
  */
 
 #include 
@@ -30,10 +30,10 @@
 int mc_l4_port_identification;
 
 static char *dpaa2_flow_control_log;
-static int dpaa2_flow_miss_flow_id =
+static uint16_t dpaa2_flow_miss_flow_id =
DPNI_FS_MISS_DROP;
 
-#define FIXED_ENTRY_SIZE 54
+#define FIXED_ENTRY_SIZE DPNI_MAX_KEY_SIZE
 
 enum flow_rule_ipaddr_type {
FLOW_NONE_IPADDR,
@@ -83,9 +83,18 @@ static const
 enum rte_flow_action_type dpaa2_supported_action_type[] = {
RTE_FLOW_ACTION_TYPE_END,
RTE_FLOW_ACTION_TYPE_QUEUE,
+   RTE_FLOW_ACTION_TYPE_PHY_PORT,
+   RTE_FLOW_ACTION_TYPE_PORT_ID,
RTE_FLOW_ACTION_TYPE_RSS
 };
 
+static const
+enum rte_flow_action_type dpaa2_supported_fs_action_type[] = {
+   RTE_FLOW_ACTION_TYPE_QUEUE,
+   RTE_FLOW_ACTION_TYPE_PHY_PORT,
+   RTE_FLOW_ACTION_TYPE_PORT_ID
+};
+
 /* Max of enum rte_flow_item_type + 1, for both IPv4 and IPv6*/
 #define DPAA2_FLOW_ITEM_TYPE_GENERIC_IP (RTE_FLOW_ITEM_TYPE_META + 1)
 
@@ -2937,6 +2946,19 @@ dpaa2_configure_flow_raw(struct rte_flow *flow,
return 0;
 }
 
+static inline int dpaa2_fs_action_supported(
+   enum rte_flow_action_type action)
+{
+   int i;
+
+   for (i = 0; i < (int)(sizeof(dpaa2_supported_fs_action_type) /
+   sizeof(enum rte_flow_action_type)); 
i++) {
+   if (action == dpaa2_supported_fs_action_type[i])
+   return 1;
+   }
+
+   return 0;
+}
 /* The existing QoS/FS entry with IP address(es)
  * needs update after
  * new extract(s) are inserted before IP
@@ -3115,7 +3137,7 @@ dpaa2_flow_entry_update(
}
}
 
-   if (curr->action != RTE_FLOW_ACTION_TYPE_QUEUE) {
+   if (!dpaa2_fs_action_supported(curr->action)) {
curr = LIST_NEXT(curr, next);
continue;
}
@@ -3253,6 +3275,43 @@ dpaa2_flow_verify_attr(
return 0;
 }
 
+static inline struct rte_eth_dev *
+dpaa2_flow_redirect_dev(struct dpaa2_dev_priv *priv,
+   const struct rte_flow_action *action)
+{
+   const struct rte_flow_action_phy_port *phy_port;
+   const struct rte_flow_action_port_id *port_id;
+   int idx = -1;
+   struct rte_eth_dev *dest_dev;
+
+   if (action->type == RTE_FLOW_ACTION_TYPE_PHY_PORT) {
+   phy_port = (const struct rte_flow_action_phy_port *)
+   action->conf;
+   if (!phy_port->original)
+   idx = phy_port->index;
+   } else if (action->type == RTE_FLOW_ACTION_TYPE_PORT_ID) {
+   port_id = (const struct rte_flow_action_port_id *)
+   action->conf;
+   if (!port_id->original)
+   idx = port_id->id;
+   } else {
+   return NULL;
+   }
+
+   if (idx >= 0) {
+   if (!rte_eth_dev_is_valid_port(idx))
+

[dpdk-dev] [PATCH 03/11] bus/fslmc: add qbman debug APIs support

2021-09-27 Thread nipun . gupta

From: Hemant Agrawal 

Add support for debugging qbman FQs

Signed-off-by: Youri Querry 
Signed-off-by: Roy Pledge 
Signed-off-by: Hemant Agrawal 
Signed-off-by: Nipun Gupta 
---
 .../bus/fslmc/qbman/include/fsl_qbman_debug.h | 203 +-
 drivers/bus/fslmc/qbman/qbman_debug.c | 623 ++
 drivers/bus/fslmc/qbman/qbman_portal.c|   6 +
 3 files changed, 826 insertions(+), 6 deletions(-)

diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_debug.h 
b/drivers/bus/fslmc/qbman/include/fsl_qbman_debug.h
index 54096e8774..fa02bc928e 100644
--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_debug.h
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_debug.h
@@ -1,13 +1,118 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright (C) 2015 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2018-2020 NXP
  */
 #ifndef _FSL_QBMAN_DEBUG_H
 #define _FSL_QBMAN_DEBUG_H
 
-#include 
 
 struct qbman_swp;
+/* Buffer pool query commands */
+struct qbman_bp_query_rslt {
+   uint8_t verb;
+   uint8_t rslt;
+   uint8_t reserved[4];
+   uint8_t bdi;
+   uint8_t state;
+   uint32_t fill;
+   uint32_t hdptr;
+   uint16_t swdet;
+   uint16_t swdxt;
+   uint16_t hwdet;
+   uint16_t hwdxt;
+   uint16_t swset;
+   uint16_t swsxt;
+   uint16_t vbpid;
+   uint16_t icid;
+   uint64_t bpscn_addr;
+   uint64_t bpscn_ctx;
+   uint16_t hw_targ;
+   uint8_t dbe;
+   uint8_t reserved2;
+   uint8_t sdcnt;
+   uint8_t hdcnt;
+   uint8_t sscnt;
+   uint8_t reserved3[9];
+};
+
+int qbman_bp_query(struct qbman_swp *s, uint32_t bpid,
+  struct qbman_bp_query_rslt *r);
+int qbman_bp_get_bdi(struct qbman_bp_query_rslt *r);
+int qbman_bp_get_va(struct qbman_bp_query_rslt *r);
+int qbman_bp_get_wae(struct qbman_bp_query_rslt *r);
+uint16_t qbman_bp_get_swdet(struct qbman_bp_query_rslt  *r);
+uint16_t qbman_bp_get_swdxt(struct qbman_bp_query_rslt  *r);
+uint16_t qbman_bp_get_hwdet(struct qbman_bp_query_rslt  *r);
+uint16_t qbman_bp_get_hwdxt(struct qbman_bp_query_rslt  *r);
+uint16_t qbman_bp_get_swset(struct qbman_bp_query_rslt  *r);
+uint16_t qbman_bp_get_swsxt(struct qbman_bp_query_rslt  *r);
+uint16_t qbman_bp_get_vbpid(struct qbman_bp_query_rslt  *r);
+uint16_t qbman_bp_get_icid(struct qbman_bp_query_rslt  *r);
+int qbman_bp_get_pl(struct qbman_bp_query_rslt  *r);
+uint64_t qbman_bp_get_bpscn_addr(struct qbman_bp_query_rslt  *r);
+uint64_t qbman_bp_get_bpscn_ctx(struct qbman_bp_query_rslt  *r);
+uint16_t qbman_bp_get_hw_targ(struct qbman_bp_query_rslt  *r);
+int qbman_bp_has_free_bufs(struct qbman_bp_query_rslt  *r);
+uint32_t qbman_bp_num_free_bufs(struct qbman_bp_query_rslt  *r);
+int qbman_bp_is_depleted(struct qbman_bp_query_rslt  *r);
+int qbman_bp_is_surplus(struct qbman_bp_query_rslt  *r);
+uint32_t qbman_bp_get_hdptr(struct qbman_bp_query_rslt  *r);
+uint32_t qbman_bp_get_sdcnt(struct qbman_bp_query_rslt  *r);
+uint32_t qbman_bp_get_hdcnt(struct qbman_bp_query_rslt  *r);
+uint32_t qbman_bp_get_sscnt(struct qbman_bp_query_rslt  *r);
+
+/* FQ query function for programmable fields */
+struct qbman_fq_query_rslt {
+   uint8_t verb;
+   uint8_t rslt;
+   uint8_t reserved[8];
+   uint16_t cgid;
+   uint16_t dest_wq;
+   uint8_t reserved2;
+   uint8_t fq_ctrl;
+   uint16_t ics_cred;
+   uint16_t td_thresh;
+   uint16_t oal_oac;
+   uint8_t reserved3;
+   uint8_t mctl;
+   uint64_t fqd_ctx;
+   uint16_t icid;
+   uint16_t reserved4;
+   uint32_t vfqid;
+   uint32_t fqid_er;
+   uint16_t opridsz;
+   uint8_t reserved5[18];
+};
+
+int qbman_fq_query(struct qbman_swp *s, uint32_t fqid,
+  struct qbman_fq_query_rslt *r);
+uint8_t qbman_fq_attr_get_fqctrl(struct qbman_fq_query_rslt *r);
+uint16_t qbman_fq_attr_get_cgrid(struct qbman_fq_query_rslt *r);
+uint16_t qbman_fq_attr_get_destwq(struct qbman_fq_query_rslt *r);
+uint16_t qbman_fq_attr_get_tdthresh(struct qbman_fq_query_rslt *r);
+int qbman_fq_attr_get_oa_ics(struct qbman_fq_query_rslt *r);
+int qbman_fq_attr_get_oa_cgr(struct qbman_fq_query_rslt *r);
+uint16_t qbman_fq_attr_get_oal(struct qbman_fq_query_rslt *r);
+int qbman_fq_attr_get_bdi(struct qbman_fq_query_rslt *r);
+int qbman_fq_attr_get_ff(struct qbman_fq_query_rslt *r);
+int qbman_fq_attr_get_va(struct qbman_fq_query_rslt *r);
+int qbman_fq_attr_get_ps(struct qbman_fq_query_rslt *r);
+int qbman_fq_attr_get_pps(struct qbman_fq_query_rslt *r);
+uint16_t qbman_fq_attr_get_icid(struct qbman_fq_query_rslt *r);
+int qbman_fq_attr_get_pl(struct qbman_fq_query_rslt *r);
+uint32_t qbman_fq_attr_get_vfqid(struct qbman_fq_query_rslt *r);
+uint32_t qbman_fq_attr_get_erfqid(struct qbman_fq_query_rslt *r);
+uint16_t qbman_fq_attr_get_opridsz(struct qbman_fq_query_rslt *r);
+
+/* FQ query command for non-programmable fields*/
+enum qbman_fq_schedstate_e {
+   qbman_fq_schedstate_oos = 0,
+   qbman_fq_sche

[dpdk-dev] [PATCH 05/11] net/dpaa2: add debug print for MTU set for jumbo

2021-09-27 Thread nipun . gupta

From: Hemant Agrawal 

This patch adds a debug print for MTU configured on the
device when jumbo frames are enabled.

Signed-off-by: Hemant Agrawal 
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 9cf55c0f0b..275656fbe4 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -573,6 +573,8 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
dev->data->dev_conf.rxmode.max_rx_pkt_len -
RTE_ETHER_HDR_LEN - RTE_ETHER_CRC_LEN -
VLAN_TAG_SIZE;
+   DPAA2_PMD_INFO("MTU configured for the device: 
%d",
+   dev->data->mtu);
} else {
return -1;
}
-- 
2.17.1

[dpdk-dev] [PATCH 04/11] net/dpaa2: support multiple Tx queues enqueue for ordered

2021-09-27 Thread nipun . gupta

From: Jun Yang 

Support the tx enqueue in order queue mode, where the
queue id for each event may be different.

Signed-off-by: Jun Yang 
---
 drivers/event/dpaa2/dpaa2_eventdev.c |  12 ++-
 drivers/net/dpaa2/dpaa2_ethdev.h |   3 +
 drivers/net/dpaa2/dpaa2_rxtx.c   | 142 +++
 drivers/net/dpaa2/version.map|   1 +
 4 files changed, 154 insertions(+), 4 deletions(-)

diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c 
b/drivers/event/dpaa2/dpaa2_eventdev.c
index 5ccf22f77f..28f3bbca9a 100644
--- a/drivers/event/dpaa2/dpaa2_eventdev.c
+++ b/drivers/event/dpaa2/dpaa2_eventdev.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2017,2019 NXP
+ * Copyright 2017,2019-2021 NXP
  */
 
 #include 
@@ -1002,16 +1002,20 @@ dpaa2_eventdev_txa_enqueue(void *port,
   struct rte_event ev[],
   uint16_t nb_events)
 {
-   struct rte_mbuf *m = (struct rte_mbuf *)ev[0].mbuf;
+   void *txq[32];
+   struct rte_mbuf *m[32];
uint8_t qid, i;
 
RTE_SET_USED(port);
 
for (i = 0; i < nb_events; i++) {
-   qid = rte_event_eth_tx_adapter_txq_get(m);
-   rte_eth_tx_burst(m->port, qid, &m, 1);
+   m[i] = (struct rte_mbuf *)ev[i].mbuf;
+   qid = rte_event_eth_tx_adapter_txq_get(m[i]);
+   txq[i] = rte_eth_devices[m[i]->port].data->tx_queues[qid];
}
 
+   dpaa2_dev_tx_multi_txq_ordered(txq, m, nb_events);
+
return nb_events;
 }
 
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 3f34d7ecff..07a6811dd2 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -236,6 +236,9 @@ void dpaa2_dev_process_ordered_event(struct qbman_swp *swp,
 uint16_t dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts);
 uint16_t dpaa2_dev_tx_ordered(void *queue, struct rte_mbuf **bufs,
  uint16_t nb_pkts);
+uint16_t dpaa2_dev_tx_multi_txq_ordered(void **queue,
+   struct rte_mbuf **bufs, uint16_t nb_pkts);
+
 uint16_t dummy_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts);
 void dpaa2_dev_free_eqresp_buf(uint16_t eqresp_ci);
 void dpaa2_flow_clean(struct rte_eth_dev *dev);
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index f40369e2c3..447063b3c3 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -1445,6 +1445,148 @@ dpaa2_set_enqueue_descriptor(struct dpaa2_queue 
*dpaa2_q,
*dpaa2_seqn(m) = DPAA2_INVALID_MBUF_SEQN;
 }
 
+__rte_internal uint16_t
+dpaa2_dev_tx_multi_txq_ordered(void **queue,
+   struct rte_mbuf **bufs, uint16_t nb_pkts)
+{
+   /* Function to transmit the frames to multiple queues respectively.*/
+   uint32_t loop, retry_count;
+   int32_t ret;
+   struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
+   uint32_t frames_to_send;
+   struct rte_mempool *mp;
+   struct qbman_eq_desc eqdesc[MAX_TX_RING_SLOTS];
+   struct dpaa2_queue *dpaa2_q[MAX_TX_RING_SLOTS];
+   struct qbman_swp *swp;
+   uint16_t bpid;
+   struct rte_mbuf *mi;
+   struct rte_eth_dev_data *eth_data;
+   struct dpaa2_dev_priv *priv;
+   struct dpaa2_queue *order_sendq;
+
+   if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
+   ret = dpaa2_affine_qbman_swp();
+   if (ret) {
+   DPAA2_PMD_ERR(
+   "Failed to allocate IO portal, tid: %d\n",
+   rte_gettid());
+   return 0;
+   }
+   }
+   swp = DPAA2_PER_LCORE_PORTAL;
+
+   for (loop = 0; loop < nb_pkts; loop++) {
+   dpaa2_q[loop] = (struct dpaa2_queue *)queue[loop];
+   eth_data = dpaa2_q[loop]->eth_data;
+   priv = eth_data->dev_private;
+   qbman_eq_desc_clear(&eqdesc[loop]);
+   if (*dpaa2_seqn(*bufs) && priv->en_ordered) {
+   order_sendq = (struct dpaa2_queue *)priv->tx_vq[0];
+   dpaa2_set_enqueue_descriptor(order_sendq,
+(*bufs),
+&eqdesc[loop]);
+   } else {
+   qbman_eq_desc_set_no_orp(&eqdesc[loop],
+DPAA2_EQ_RESP_ERR_FQ);
+   qbman_eq_desc_set_fq(&eqdesc[loop],
+dpaa2_q[loop]->fqid);
+   }
+
+   retry_count = 0;
+   while (qbman_result_SCN_state(dpaa2_q[loop]->cscn)) {
+   retry_count++;
+   /* Retry for some time before giving up */
+   if (retry_count > CONG_RETRY_COUNT)
+   goto send_frames;
+   }

[dpdk-dev] [PATCH 06/11] net/dpaa2: add function to generate HW hash key

2021-09-27 Thread nipun . gupta

From: Hemant Agrawal 

This patch add support to generate the hash key in software
equivalent to WRIOP key generation.

Signed-off-by: Hemant Agrawal 
---
 drivers/net/dpaa2/base/dpaa2_tlu_hash.c | 149 
 drivers/net/dpaa2/meson.build   |   1 +
 drivers/net/dpaa2/rte_pmd_dpaa2.h   |  19 +++
 drivers/net/dpaa2/version.map   |   2 +
 4 files changed, 171 insertions(+)
 create mode 100644 drivers/net/dpaa2/base/dpaa2_tlu_hash.c

diff --git a/drivers/net/dpaa2/base/dpaa2_tlu_hash.c 
b/drivers/net/dpaa2/base/dpaa2_tlu_hash.c
new file mode 100644
index 00..e92f4f03ed
--- /dev/null
+++ b/drivers/net/dpaa2/base/dpaa2_tlu_hash.c
@@ -0,0 +1,149 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2021 NXP
+ */
+#include 
+#include 
+#include 
+#include 
+
+static unsigned int sbox(unsigned int x)
+{
+   unsigned int a, b, c, d;
+   unsigned int oa, ob, oc, od;
+
+   a = x & 0x1;
+   b = (x >> 1) & 0x1;
+   c = (x >> 2) & 0x1;
+   d = (x >> 3) & 0x1;
+
+   oa = ((a & ~b & ~c & d) | (~a & b) | (~a & ~c & ~d) | (b & c)) & 0x1;
+   ob = ((a & ~b & d) | (~a & c & ~d) | (b & ~c)) & 0x1;
+   oc = ((a & ~b & c) | (a & ~b & ~d) | (~a & b & ~d) | (~a & c & ~d) |
+(b & c & d)) & 0x1;
+   od = ((a & ~b & c) | (~a & b & ~c) | (a & b & ~d) | (~a & c & d)) & 0x1;
+
+   return ((od << 3) | (oc << 2) | (ob << 1) | oa);
+}
+
+static unsigned int sbox_tbl[16];
+
+static int pbox_tbl[16] = {5, 9, 0, 13,
+   7, 2, 11, 14,
+   1, 4, 12, 8,
+   3, 15, 6, 10 };
+
+static unsigned int mix_tbl[8][16];
+
+static unsigned int stage(unsigned int input)
+{
+   int sbox_out = 0;
+   int pbox_out = 0;
+
+   // mix
+   input ^= input >> 16; // xor lower
+   input ^= input << 16; // move original lower to upper
+
+   // printf("%08x\n",input);
+
+   for (int i = 0; i < 32; i += 4)// sbox stage
+   sbox_out |= (sbox_tbl[(input >> i) & 0xf]) << i;
+
+   // permutation
+   for (int i = 0; i < 16; i++)
+   pbox_out |= ((sbox_out >> i) & 0x10001) << pbox_tbl[i];
+
+   return pbox_out;
+}
+
+static unsigned int fast_stage(unsigned int input)
+{
+   int pbox_out = 0;
+
+   // mix
+   input ^= input >> 16; // xor lower
+   input ^= input << 16; // move original lower to upper
+
+   for (int i = 0; i < 32; i += 4) // sbox stage
+   pbox_out |= mix_tbl[i >> 2][(input >> i) & 0xf];
+
+   return pbox_out;
+}
+
+static unsigned int fast_hash32(unsigned int x)
+{
+   for (int i = 0; i < 4; i++)
+   x = fast_stage(x);
+   return x;
+}
+
+static unsigned int
+byte_crc32(unsigned char data/* new byte for the crc calculation */,
+  unsigned old_crc/* crc result of the last iteration */)
+{
+   int i;
+   unsigned int crc, polynom = 0xedb88320;
+   /* the polynomial is built on the reversed version of
+* the CRC polynomial with out the x64 element.
+*/
+
+   crc = old_crc;
+   for (i = 0; i < 8; i++, data >>= 1)
+   crc = (crc >> 1) ^ (((crc ^ data) & 0x1) ? polynom : 0);
+   /* xor with polynomial is lsb of crc^data is 1 */
+
+   return crc;
+}
+
+static unsigned int crc32_table[256];
+
+static void init_crc32_table(void)
+{
+   int i;
+
+   for (i = 0; i < 256; i++)
+   crc32_table[i] = byte_crc32((unsigned char)i, 0LL);
+}
+
+static unsigned int
+crc32_string(unsigned char *data,
+int size, unsigned int old_crc)
+{
+   unsigned int crc;
+
+   crc = old_crc;
+   for (int i = 0; i < size; i++)
+   crc = (crc >> 8) ^ crc32_table[(crc ^ data[i]) & 0xff];
+
+   return crc;
+}
+
+static void hash_init(void)
+{
+   init_crc32_table();
+
+   for (int i = 0; i < 16; i++)
+   sbox_tbl[i] = sbox(i);
+
+   for (int i = 0; i < 32; i += 4)
+   for (int j = 0; j < 16; j++) {
+   // (a,b)
+   // (b,a^b)=(X,Y)
+   // (X^Y,X)
+   unsigned int input = (0x ^ (8 << i)) | (j << i);
+
+   input ^= input << 16; // (X^Y,Y)
+   input ^= input >> 16; // (X^Y,X)
+   mix_tbl[i >> 2][j] = stage(input);
+   //printf("aaa %08x\n", stage(input));
+   }
+}
+
+uint32_t rte_pmd_dpaa2_get_tlu_hash(uint8_t *data, int size)
+{
+   static int init;
+
+   if (~init)
+   hash_init();
+   init = 1;
+   return fast_hash32(crc32_string(data, size, 0x0));
+}
diff --git a/drivers/net/dpaa2/meson.build b/drivers/net/dpaa2/meson.build
index 20eaf0b8e4..4a6397d09e 100644
--- a/drivers/net/dpaa2/meson.build
+++ b/drivers/net/dpaa2/meson.build
@@ -20,6 +20,7 @@ sources = files(
 'mc/dpkg.c',
 'mc/dpdmux.c',
 'mc/dpni.c',
+   'base/d

[dpdk-dev] [PATCH 07/11] net/dpaa2: update RSS to support additional distributions

2021-09-27 Thread nipun . gupta

From: Vanshika Shukla 

This patch updates the RSS support to support following additional
distributions:
- VLAN
- ESP
- AH
- PPPOE

Signed-off-by: Vanshika Shukla 
---
 drivers/net/dpaa2/base/dpaa2_hw_dpni.c | 70 +-
 drivers/net/dpaa2/dpaa2_ethdev.h   |  7 ++-
 2 files changed, 75 insertions(+), 2 deletions(-)

diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c 
b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
index 641e7027f1..08f49af768 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
@@ -210,6 +210,10 @@ dpaa2_distset_to_dpkg_profile_cfg(
int l2_configured = 0, l3_configured = 0;
int l4_configured = 0, sctp_configured = 0;
int mpls_configured = 0;
+   int vlan_configured = 0;
+   int esp_configured = 0;
+   int ah_configured = 0;
+   int pppoe_configured = 0;
 
memset(kg_cfg, 0, sizeof(struct dpkg_profile_cfg));
while (req_dist_set) {
@@ -217,6 +221,7 @@ dpaa2_distset_to_dpkg_profile_cfg(
dist_field = 1ULL << loop;
switch (dist_field) {
case ETH_RSS_L2_PAYLOAD:
+   case ETH_RSS_ETH:
 
if (l2_configured)
break;
@@ -231,7 +236,70 @@ dpaa2_distset_to_dpkg_profile_cfg(
kg_cfg->extracts[i].extract.from_hdr.type =
DPKG_FULL_FIELD;
i++;
-   break;
+   break;
+
+   case ETH_RSS_PPPOE:
+   if (pppoe_configured)
+   break;
+   kg_cfg->extracts[i].extract.from_hdr.prot =
+   NET_PROT_PPPOE;
+   kg_cfg->extracts[i].extract.from_hdr.field =
+   NH_FLD_PPPOE_SID;
+   kg_cfg->extracts[i].type =
+   DPKG_EXTRACT_FROM_HDR;
+   kg_cfg->extracts[i].extract.from_hdr.type =
+   DPKG_FULL_FIELD;
+   i++;
+   break;
+
+   case ETH_RSS_ESP:
+   if (esp_configured)
+   break;
+   esp_configured = 1;
+
+   kg_cfg->extracts[i].extract.from_hdr.prot =
+   NET_PROT_IPSEC_ESP;
+   kg_cfg->extracts[i].extract.from_hdr.field =
+   NH_FLD_IPSEC_ESP_SPI;
+   kg_cfg->extracts[i].type =
+   DPKG_EXTRACT_FROM_HDR;
+   kg_cfg->extracts[i].extract.from_hdr.type =
+   DPKG_FULL_FIELD;
+   i++;
+   break;
+
+   case ETH_RSS_AH:
+   if (ah_configured)
+   break;
+   ah_configured = 1;
+
+   kg_cfg->extracts[i].extract.from_hdr.prot =
+   NET_PROT_IPSEC_AH;
+   kg_cfg->extracts[i].extract.from_hdr.field =
+   NH_FLD_IPSEC_AH_SPI;
+   kg_cfg->extracts[i].type =
+   DPKG_EXTRACT_FROM_HDR;
+   kg_cfg->extracts[i].extract.from_hdr.type =
+   DPKG_FULL_FIELD;
+   i++;
+   break;
+
+   case ETH_RSS_C_VLAN:
+   case ETH_RSS_S_VLAN:
+   if (vlan_configured)
+   break;
+   vlan_configured = 1;
+
+   kg_cfg->extracts[i].extract.from_hdr.prot =
+   NET_PROT_VLAN;
+   kg_cfg->extracts[i].extract.from_hdr.field =
+   NH_FLD_VLAN_TCI;
+   kg_cfg->extracts[i].type =
+   DPKG_EXTRACT_FROM_HDR;
+   kg_cfg->extracts[i].extract.from_hdr.type =
+   DPKG_FULL_FIELD;
+   i++;
+   break;
 
case ETH_RSS_MPLS:
 
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 07a6811dd2..e1fe14c8b4 100644
--- a/drivers/net/dpaa2/dpaa2_e

[dpdk-dev] [PATCH 08/11] net/dpaa: add comments to explain driver behaviour

2021-09-27 Thread nipun . gupta

From: Rohit Raj 

This patch adds comment to explain how dpaa_port_fmc_ccnode_parse
function is working to get the HW queue from FMC policy file

Signed-off-by: Rohit Raj 
---
 drivers/net/dpaa/dpaa_fmc.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/net/dpaa/dpaa_fmc.c b/drivers/net/dpaa/dpaa_fmc.c
index 5195053361..f8c9360311 100644
--- a/drivers/net/dpaa/dpaa_fmc.c
+++ b/drivers/net/dpaa/dpaa_fmc.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2017-2020 NXP
+ * Copyright 2017-2021 NXP
  */
 
 /* System headers */
@@ -338,6 +338,12 @@ static int dpaa_port_fmc_ccnode_parse(struct fman_if *fif,
fqid = keys_params->key_params[j].cc_next_engine_params
.params.enqueue_params.new_fqid;
 
+   /* We read DPDK queue from last classification rule present in
+* FMC policy file. Hence, this check is required here.
+* Also, the last classification rule in FMC policy file must
+* have userspace queue so that it can be used by DPDK
+* application.
+*/
if (keys_params->key_params[j].cc_next_engine_params
.next_engine != e_IOC_FM_PCD_DONE) {
DPAA_PMD_WARN("FMC CC next engine not support");
-- 
2.17.1

[dpdk-dev] [PATCH 09/11] raw/dpaa2_qdma: use correct params for config and queue setup

2021-09-27 Thread nipun . gupta

From: Nipun Gupta 

RAW configure and Queue setup APIs support size parameter for
configure. This patch supports the same for DPAA2 QDMA PMD APIs

Signed-off-by: Nipun Gupta 
---
 drivers/raw/dpaa2_qdma/dpaa2_qdma.c | 12 +---
 drivers/raw/dpaa2_qdma/rte_pmd_dpaa2_qdma.h |  8 
 2 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/drivers/raw/dpaa2_qdma/dpaa2_qdma.c 
b/drivers/raw/dpaa2_qdma/dpaa2_qdma.c
index c961e18d67..2048c2c514 100644
--- a/drivers/raw/dpaa2_qdma/dpaa2_qdma.c
+++ b/drivers/raw/dpaa2_qdma/dpaa2_qdma.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2018-2020 NXP
+ * Copyright 2018-2021 NXP
  */
 
 #include 
@@ -1146,8 +1146,11 @@ dpaa2_qdma_configure(const struct rte_rawdev *rawdev,
 
DPAA2_QDMA_FUNC_TRACE();
 
-   if (config_size != sizeof(*qdma_config))
+   if (config_size != sizeof(*qdma_config)) {
+   DPAA2_QDMA_ERR("Config size mismatch. Expected %ld, Got: %ld",
+   sizeof(*qdma_config), config_size);
return -EINVAL;
+   }
 
/* In case QDMA device is not in stopped state, return -EBUSY */
if (qdma_dev->state == 1) {
@@ -1247,8 +1250,11 @@ dpaa2_qdma_queue_setup(struct rte_rawdev *rawdev,
 
DPAA2_QDMA_FUNC_TRACE();
 
-   if (conf_size != sizeof(*q_config))
+   if (conf_size != sizeof(*q_config)) {
+   DPAA2_QDMA_ERR("Config size mismatch. Expected %ld, Got: %ld",
+   sizeof(*q_config), conf_size);
return -EINVAL;
+   }
 
rte_spinlock_lock(&qdma_dev->lock);
 
diff --git a/drivers/raw/dpaa2_qdma/rte_pmd_dpaa2_qdma.h 
b/drivers/raw/dpaa2_qdma/rte_pmd_dpaa2_qdma.h
index cc1ac25451..1314474271 100644
--- a/drivers/raw/dpaa2_qdma/rte_pmd_dpaa2_qdma.h
+++ b/drivers/raw/dpaa2_qdma/rte_pmd_dpaa2_qdma.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2018-2020 NXP
+ * Copyright 2018-2021 NXP
  */
 
 #ifndef __RTE_PMD_DPAA2_QDMA_H__
@@ -177,13 +177,13 @@ struct rte_qdma_queue_config {
 #define rte_qdma_info rte_rawdev_info
 #define rte_qdma_start(id) rte_rawdev_start(id)
 #define rte_qdma_reset(id) rte_rawdev_reset(id)
-#define rte_qdma_configure(id, cf) rte_rawdev_configure(id, cf)
+#define rte_qdma_configure(id, cf, sz) rte_rawdev_configure(id, cf, sz)
 #define rte_qdma_dequeue_buffers(id, buf, num, ctxt) \
rte_rawdev_dequeue_buffers(id, buf, num, ctxt)
 #define rte_qdma_enqueue_buffers(id, buf, num, ctxt) \
rte_rawdev_enqueue_buffers(id, buf, num, ctxt)
-#define rte_qdma_queue_setup(id, qid, cfg) \
-   rte_rawdev_queue_setup(id, qid, cfg)
+#define rte_qdma_queue_setup(id, qid, cfg, sz) \
+   rte_rawdev_queue_setup(id, qid, cfg, sz)
 
 /*TODO introduce per queue stats API in rawdew */
 /**
-- 
2.17.1

[dpdk-dev] [PATCH 10/11] raw/dpaa2_qdma: remove checks for lcore ID

2021-09-27 Thread nipun . gupta

From: Nipun Gupta 

There is no need for preventional check of rte_lcore_id() in
data path. This patch removes the same.

Signed-off-by: Nipun Gupta 
---
 drivers/raw/dpaa2_qdma/dpaa2_qdma.c | 14 --
 1 file changed, 14 deletions(-)

diff --git a/drivers/raw/dpaa2_qdma/dpaa2_qdma.c 
b/drivers/raw/dpaa2_qdma/dpaa2_qdma.c
index 2048c2c514..807a3694cd 100644
--- a/drivers/raw/dpaa2_qdma/dpaa2_qdma.c
+++ b/drivers/raw/dpaa2_qdma/dpaa2_qdma.c
@@ -1389,13 +1389,6 @@ dpaa2_qdma_enqueue(struct rte_rawdev *rawdev,
&dpdmai_dev->qdma_dev->vqs[e_context->vq_id];
int ret;
 
-   /* Return error in case of wrong lcore_id */
-   if (rte_lcore_id() != qdma_vq->lcore_id) {
-   DPAA2_QDMA_ERR("QDMA enqueue for vqid %d on wrong core",
-   e_context->vq_id);
-   return -EINVAL;
-   }
-
ret = qdma_vq->enqueue_job(qdma_vq, e_context->job, nb_jobs);
if (ret < 0) {
DPAA2_QDMA_ERR("DPDMAI device enqueue failed: %d", ret);
@@ -1428,13 +1421,6 @@ dpaa2_qdma_dequeue(struct rte_rawdev *rawdev,
return -EINVAL;
}
 
-   /* Return error in case of wrong lcore_id */
-   if (rte_lcore_id() != (unsigned int)(qdma_vq->lcore_id)) {
-   DPAA2_QDMA_WARN("QDMA dequeue for vqid %d on wrong core",
-   context->vq_id);
-   return -1;
-   }
-
/* Only dequeue when there are pending jobs on VQ */
if (qdma_vq->num_enqueues == qdma_vq->num_dequeues)
return 0;
-- 
2.17.1

[dpdk-dev] [PATCH 11/11] common/dpaax: fix paddr to vaddr invalid conversion

2021-09-27 Thread nipun . gupta

From: Gagandeep Singh 

If some of the VA entries of table are somehow not populated and are
NULL, it can add offset to NULL and return the invalid VA in PA to
VA conversion.

In this patch, adding a check if the VA entry has valid address only
then add offset and return VA.

Fixes: 2f3d633aa593 ("common/dpaax: add library for PA/VA translation table")
Cc: sta...@dpdk.org

Signed-off-by: Gagandeep Singh 
Signed-off-by: Nipun Gupta 
---
 drivers/common/dpaax/dpaax_iova_table.h | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/common/dpaax/dpaax_iova_table.h 
b/drivers/common/dpaax/dpaax_iova_table.h
index 230fba8ba0..d7087ee7ca 100644
--- a/drivers/common/dpaax/dpaax_iova_table.h
+++ b/drivers/common/dpaax/dpaax_iova_table.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2018 NXP
+ * Copyright 2018-2021 NXP
  */
 
 #ifndef _DPAAX_IOVA_TABLE_H_
@@ -101,6 +101,12 @@ dpaax_iova_table_get_va(phys_addr_t paddr) {
 
/* paddr > entry->start && paddr <= entry->(start+len) */
index = (paddr_align - entry[i].start)/DPAAX_MEM_SPLIT;
+   /* paddr is within range, but no vaddr entry ever written
+* at index
+*/
+   if ((void *)entry[i].pages[index] == NULL)
+   return NULL;
+
vaddr = (void *)((uintptr_t)entry[i].pages[index] + offset);
break;
} while (1);
-- 
2.17.1

[dpdk-dev] [PATCH 0/8] net/mlx5: support more than 255 representors

2021-09-27 Thread Xueming Li

This patch set supports representor number of a PF to be more than 255.
CX6 and current OFED driver supports maxium 512 SFs. CX5 supports max 255 SFs.

Xueming Li (8):
  common/mlx5: add netlink API to get RDMA port state
  net/mlx5: use netlink when IB port greater than 255
  net/mlx5: improve Verbs flow priority discover for scalable
  net/mlx5: check DevX to support more Verb ports
  net/mlx5: support flow item port of switch manager
  net/mlx5: supports flow item of normal Tx queue
  net/mlx5: fix internal root table flow priroity
  net/mlx5: enable DevX Tx queue creation

 drivers/common/mlx5/linux/meson.build |   2 +
 drivers/common/mlx5/linux/mlx5_nl.c   | 116 +++---
 drivers/common/mlx5/linux/mlx5_nl.h   |   3 +
 drivers/common/mlx5/version.map   |   1 +
 drivers/net/mlx5/linux/mlx5_os.c  | 114 -
 drivers/net/mlx5/mlx5.h   |   2 +
 drivers/net/mlx5/mlx5_devx.c  |  10 +--
 drivers/net/mlx5/mlx5_devx.h  |   2 +
 drivers/net/mlx5/mlx5_flow.c  |  81 +-
 drivers/net/mlx5/mlx5_flow.h  |   7 +-
 drivers/net/mlx5/mlx5_flow_dv.c   |  44 --
 drivers/net/mlx5/mlx5_flow_verbs.c|   8 ++
 drivers/net/mlx5/mlx5_trigger.c   |  11 ++-
 13 files changed, 276 insertions(+), 125 deletions(-)

-- 
2.33.0

[dpdk-dev] [PATCH 1/8] common/mlx5: add netlink API to get RDMA port state

2021-09-27 Thread Xueming Li

Introduce netlink api to get rdma port state.

Signed-off-by: Xueming Li 
---
 drivers/common/mlx5/linux/meson.build |   2 +
 drivers/common/mlx5/linux/mlx5_nl.c   | 116 +++---
 drivers/common/mlx5/linux/mlx5_nl.h   |   3 +
 drivers/common/mlx5/version.map   |   1 +
 4 files changed, 94 insertions(+), 28 deletions(-)

diff --git a/drivers/common/mlx5/linux/meson.build 
b/drivers/common/mlx5/linux/meson.build
index cbea58f557d..2dcd27b7786 100644
--- a/drivers/common/mlx5/linux/meson.build
+++ b/drivers/common/mlx5/linux/meson.build
@@ -175,6 +175,8 @@ has_sym_args = [
 'RDMA_NLDEV_ATTR_DEV_NAME' ],
 [ 'HAVE_RDMA_NLDEV_ATTR_PORT_INDEX', 'rdma/rdma_netlink.h',
 'RDMA_NLDEV_ATTR_PORT_INDEX' ],
+[ 'HAVE_RDMA_NLDEV_ATTR_PORT_STATE', 'rdma/rdma_netlink.h',
+'RDMA_NLDEV_ATTR_PORT_STATE' ],
 [ 'HAVE_RDMA_NLDEV_ATTR_NDEV_INDEX', 'rdma/rdma_netlink.h',
 'RDMA_NLDEV_ATTR_NDEV_INDEX' ],
 [ 'HAVE_MLX5_DR_FLOW_DUMP', 'infiniband/mlx5dv.h',
diff --git a/drivers/common/mlx5/linux/mlx5_nl.c 
b/drivers/common/mlx5/linux/mlx5_nl.c
index 9120a697fd5..3e775e58b14 100644
--- a/drivers/common/mlx5/linux/mlx5_nl.c
+++ b/drivers/common/mlx5/linux/mlx5_nl.c
@@ -78,6 +78,9 @@
 #ifndef HAVE_RDMA_NLDEV_ATTR_PORT_INDEX
 #define RDMA_NLDEV_ATTR_PORT_INDEX 3
 #endif
+#ifndef HAVE_RDMA_NLDEV_ATTR_PORT_STATE
+#define RDMA_NLDEV_ATTR_PORT_STATE 12
+#endif
 #ifndef HAVE_RDMA_NLDEV_ATTR_NDEV_INDEX
 #define RDMA_NLDEV_ATTR_NDEV_INDEX 50
 #endif
@@ -160,14 +163,16 @@ struct mlx5_nl_mac_addr {
 #define MLX5_NL_CMD_GET_IB_INDEX (1 << 1)
 #define MLX5_NL_CMD_GET_NET_INDEX (1 << 2)
 #define MLX5_NL_CMD_GET_PORT_INDEX (1 << 3)
+#define MLX5_NL_CMD_GET_PORT_STATE (1 << 4)
 
 /** Data structure used by mlx5_nl_cmdget_cb(). */
-struct mlx5_nl_ifindex_data {
+struct mlx5_nl_port_info {
const char *name; /**< IB device name (in). */
uint32_t flags; /**< found attribute flags (out). */
uint32_t ibindex; /**< IB device index (out). */
uint32_t ifindex; /**< Network interface index (out). */
uint32_t portnum; /**< IB device max port number (out). */
+   uint16_t state; /**< IB device port state (out). */
 };
 
 uint32_t atomic_sn;
@@ -966,8 +971,8 @@ mlx5_nl_allmulti(int nlsk_fd, unsigned int iface_idx, int 
enable)
 static int
 mlx5_nl_cmdget_cb(struct nlmsghdr *nh, void *arg)
 {
-   struct mlx5_nl_ifindex_data *data = arg;
-   struct mlx5_nl_ifindex_data local = {
+   struct mlx5_nl_port_info *data = arg;
+   struct mlx5_nl_port_info local = {
.flags = 0,
};
size_t off = NLMSG_HDRLEN;
@@ -1000,6 +1005,10 @@ mlx5_nl_cmdget_cb(struct nlmsghdr *nh, void *arg)
local.portnum = *(uint32_t *)payload;
local.flags |= MLX5_NL_CMD_GET_PORT_INDEX;
break;
+   case RDMA_NLDEV_ATTR_PORT_STATE:
+   local.state = *(uint8_t *)payload;
+   local.flags |= MLX5_NL_CMD_GET_PORT_STATE;
+   break;
default:
break;
}
@@ -1016,6 +1025,7 @@ mlx5_nl_cmdget_cb(struct nlmsghdr *nh, void *arg)
data->ibindex = local.ibindex;
data->ifindex = local.ifindex;
data->portnum = local.portnum;
+   data->state = local.state;
}
return 0;
 error:
@@ -1024,7 +1034,7 @@ mlx5_nl_cmdget_cb(struct nlmsghdr *nh, void *arg)
 }
 
 /**
- * Get index of network interface associated with some IB device.
+ * Get port info of network interface associated with some IB device.
  *
  * This is the only somewhat safe method to avoid resorting to heuristics
  * when faced with port representors. Unfortunately it requires at least
@@ -1036,23 +1046,19 @@ mlx5_nl_cmdget_cb(struct nlmsghdr *nh, void *arg)
  *   IB device name.
  * @param[in] pindex
  *   IB device port index, starting from 1
+ * @param[out] data
+ *   Pointer to port info.
  * @return
- *   A valid (nonzero) interface index on success, 0 otherwise and rte_errno
- *   is set.
+ *   A nonzero value on success, 0 otherwise and rte_errno is set.
  */
-unsigned int
-mlx5_nl_ifindex(int nl, const char *name, uint32_t pindex)
+static int
+mlx5_nl_port_info(int nl, const char *name, uint32_t pindex,
+ struct mlx5_nl_port_info *data)
 {
-   struct mlx5_nl_ifindex_data data = {
-   .name = name,
-   .flags = 0,
-   .ibindex = 0, /* Determined during first pass. */
-   .ifindex = 0, /* Determined during second pass. */
-   };
union {
struct nlmsghdr nh;
uint8_t buf[NLMSG_HDRLEN +
-   NLA_HDRLEN + NLA_ALIGN(sizeof(data.ibindex)) +
+   NLA_HDRLEN + NLA_ALIGN(sizeof(data->ibindex)) +
NLA_HDRLEN + NLA_ALIGN(sizeof(pinde

[dpdk-dev] [PATCH 3/8] net/mlx5: improve Verbs flow priority discover for scalable

2021-09-27 Thread Xueming Li

To detect number flow Verbs flow priorities, PMD try to create Verbs
flows in different priority. While Verbs is not designed to support
ports larger than 255.

When DevX supported by kernel driver, 16 Verbs priorities must be
supported, no need to create Verbs flows.

Signed-off-by: Xueming Li 
---
 drivers/net/mlx5/mlx5_flow_verbs.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/net/mlx5/mlx5_flow_verbs.c 
b/drivers/net/mlx5/mlx5_flow_verbs.c
index b93fd4d2c96..93bffa4a0b9 100644
--- a/drivers/net/mlx5/mlx5_flow_verbs.c
+++ b/drivers/net/mlx5/mlx5_flow_verbs.c
@@ -83,6 +83,11 @@ mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
int i;
int priority = 0;
 
+#ifdef HAVE_MLX5DV_DR_DEVX_PORT
+   /* If DevX supported, driver must support 16 verbs flow priorities. */
+   priority = RTE_DIM(priority_map_5);
+   goto out;
+#endif
if (!drop->qp) {
rte_errno = ENOTSUP;
return -rte_errno;
@@ -109,6 +114,9 @@ mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
dev->data->port_id, priority);
return -rte_errno;
}
+#ifdef HAVE_MLX5DV_DR_DEVX_PORT
+out:
+#endif
DRV_LOG(INFO, "port %u supported flow priorities:"
" 0-%d for ingress or egress root table,"
" 0-%d for non-root table or transfer root table.",
-- 
2.33.0

[dpdk-dev] [PATCH 6/8] net/mlx5: supports flow item of normal Tx queue

2021-09-27 Thread Xueming Li

Extends txq flow pattern to support both hairpin and regular txq.

Signed-off-by: Xueming Li 
---
 drivers/net/mlx5/mlx5_flow_dv.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index d4242a4aa8d..e388e2d5e10 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -10916,22 +10916,22 @@ flow_dv_translate_item_tx_queue(struct rte_eth_dev 
*dev,
void *misc_v =
MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
struct mlx5_txq_ctrl *txq;
-   uint32_t queue;
-
+   uint32_t queue, mask;
 
queue_m = (const void *)item->mask;
-   if (!queue_m)
-   return;
queue_v = (const void *)item->spec;
if (!queue_v)
return;
txq = mlx5_txq_get(dev, queue_v->queue);
if (!txq)
return;
-   queue = txq->obj->sq->id;
-   MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
-   MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
-queue & queue_m->queue);
+   if (txq->type == MLX5_TXQ_TYPE_HAIRPIN)
+   queue = txq->obj->sq->id;
+   else
+   queue = txq->obj->sq_obj.sq->id;
+   mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
+   MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
+   MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
mlx5_txq_release(dev, queue_v->queue);
 }
 
-- 
2.33.0

[dpdk-dev] [PATCH 2/8] net/mlx5: use netlink when IB port greater than 255

2021-09-27 Thread Xueming Li

IB spec doesn't allow 255 ports on a single HCA, port number of 256 was
cast to u8 value 0 which invalid to ibv_query_port()

This patch invoke netlink api to query port state when port number
greater than 255.

Signed-off-by: Xueming Li 
---
 drivers/net/mlx5/linux/mlx5_os.c | 39 
 1 file changed, 25 insertions(+), 14 deletions(-)

diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index 470b16cb9ad..79ab789df43 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -956,7 +956,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 {
const struct mlx5_switch_info *switch_info = &spawn->info;
struct mlx5_dev_ctx_shared *sh = NULL;
-   struct ibv_port_attr port_attr;
+   struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
struct mlx5dv_context dv_attr = { .comp_mask = 0 };
struct rte_eth_dev *eth_dev = NULL;
struct mlx5_priv *priv = NULL;
@@ -976,6 +976,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
int own_domain_id = 0;
uint16_t port_id;
struct mlx5_port_info vport_info = { .query_flags = 0 };
+   int nl_rdma = -1;
int i;
 
/* Determine if this port representor is supposed to be spawned. */
@@ -1170,19 +1171,29 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
" old OFED/rdma-core version or firmware configuration");
 #endif
config->mpls_en = mpls_en;
+   nl_rdma = mlx5_nl_init(NETLINK_RDMA);
/* Check port status. */
-   err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
-   if (err) {
-   DRV_LOG(ERR, "port query failed: %s", strerror(err));
-   goto error;
-   }
-   if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
-   DRV_LOG(ERR, "port is not configured in Ethernet mode");
-   err = EINVAL;
-   goto error;
+   if (spawn->phys_port <= UINT8_MAX) {
+   /* Legacy Verbs api only support u8 port number. */
+   err = mlx5_glue->query_port(sh->ctx, spawn->phys_port,
+   &port_attr);
+   if (err) {
+   DRV_LOG(ERR, "port query failed: %s", strerror(err));
+   goto error;
+   }
+   if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
+   DRV_LOG(ERR, "port is not configured in Ethernet mode");
+   err = EINVAL;
+   goto error;
+   }
+   } else if (nl_rdma >= 0) {
+   /* IB doesn't allow more than 255 ports, must be Ethernet. */
+   port_attr.state = mlx5_nl_port_state(nl_rdma,
+   ((struct ibv_device *)spawn->phys_dev)->name,
+   spawn->phys_port);
}
if (port_attr.state != IBV_PORT_ACTIVE)
-   DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
+   DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
mlx5_glue->port_state_str(port_attr.state),
port_attr.state);
/* Allocate private eth device data. */
@@ -1199,7 +1210,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
priv->pci_dev = spawn->pci_dev;
priv->mtu = RTE_ETHER_MTU;
/* Some internal functions rely on Netlink sockets, open them now. */
-   priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
+   priv->nl_socket_rdma = nl_rdma;
priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
priv->representor = !!switch_info->representor;
priv->master = !!switch_info->master;
@@ -1910,8 +1921,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
mlx5_os_free_shared_dr(priv);
if (priv->nl_socket_route >= 0)
close(priv->nl_socket_route);
-   if (priv->nl_socket_rdma >= 0)
-   close(priv->nl_socket_rdma);
if (priv->vmwa_context)
mlx5_vlan_vmwa_exit(priv->vmwa_context);
if (eth_dev && priv->drop_queue.hrxq)
@@ -1935,6 +1944,8 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
}
if (sh)
mlx5_free_shared_dev_ctx(sh);
+   if (nl_rdma >= 0)
+   close(nl_rdma);
MLX5_ASSERT(err > 0);
rte_errno = err;
return NULL;
-- 
2.33.0

[dpdk-dev] [PATCH 7/8] net/mlx5: fix internal root table flow priroity

2021-09-27 Thread Xueming Li

When creating internal transfer flow on root table with lowerest
priority, the flow was created with u32 priority. It was wrong since
the flow is created in kernel and  max priority supported is 16.

This patch fixes this by adding internal flow check.

Fixes: 5f8ae44dd454 ("net/mlx5: enlarge maximal flow priority")

Signed-off-by: Xueming Li 
---
 drivers/net/mlx5/mlx5_flow.c| 7 +--
 drivers/net/mlx5/mlx5_flow.h| 4 ++--
 drivers/net/mlx5/mlx5_flow_dv.c | 3 ++-
 3 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index c914a7120cc..8dc79340f2d 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -980,13 +980,15 @@ mlx5_get_lowest_priority(struct rte_eth_dev *dev,
  *   Pointer to device flow rule attributes.
  * @param[in] subpriority
  *   The priority based on the items.
+ * @param[in] external
+ *   Flow is user flow.
  * @return
  *   The matcher priority of the flow.
  */
 uint16_t
 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
  const struct rte_flow_attr *attr,
- uint32_t subpriority)
+ uint32_t subpriority, bool external)
 {
uint16_t priority = (uint16_t)attr->priority;
struct mlx5_priv *priv = dev->data->dev_private;
@@ -997,7 +999,8 @@ mlx5_get_matcher_priority(struct rte_eth_dev *dev,
return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
}
if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
-   priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
+   priority = external ?
+  MLX5_NON_ROOT_FLOW_MAX_PRIO : priv->config.flow_prio;
return priority * 3 + subpriority;
 }
 
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 861e18fb3b1..1e31d25f319 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -1434,8 +1434,8 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev 
*dev, int32_t priority,
 uint32_t mlx5_get_lowest_priority(struct rte_eth_dev *dev,
const struct rte_flow_attr *attr);
 uint16_t mlx5_get_matcher_priority(struct rte_eth_dev *dev,
-const struct rte_flow_attr *attr,
-uint32_t subpriority);
+  const struct rte_flow_attr *attr,
+  uint32_t subpriority, bool external);
 int mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 enum mlx5_feature_name feature,
 uint32_t id,
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index e388e2d5e10..3744f3e5917 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -13633,7 +13633,8 @@ flow_dv_translate(struct rte_eth_dev *dev,
matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
matcher.mask.size);
matcher.priority = mlx5_get_matcher_priority(dev, attr,
-   matcher.priority);
+matcher.priority,
+dev_flow->external);
/**
 * When creating meter drop flow in drop table, using original
 * 5-tuple match, the matcher priority should be lower than
-- 
2.33.0

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