Re: [dpdk-dev] [PATCH v2] common/mlx5: add provider query port support to glue library

[Raslan Darawsheh]

Hi,

> -Original Message-
> From: Slava Ovsiienko 
> Sent: Saturday, June 19, 2021 3:49 PM
> To: dev@dpdk.org
> Cc: Raslan Darawsheh ; Matan Azrad
> ; NBU-Contact-Thomas Monjalon
> ; sta...@dpdk.org
> Subject: [PATCH v2] common/mlx5: add provider query port support to glue
> library
> 
> The rdma-core mlx5 provider introduced the port attributes query
> API since version v35.0 - the mlx5dv_query_port routine. In order
> to support this change in the rdma-core the conditional compilation
> flag HAVE_MLX5DV_DR_DEVX_PORT_V35 is introduced by the this patch.
> 
> In the OFED rdma-core version the new compatible mlx5dv_query_port
> routine was introduced as well, replacing the existing proprietary
> mlx5dv_query_devx_port routine. The proprietary routine was
> controlled in PMD code with HAVE_MLX5DV_DR_DEVX_PORT conditional
> flag.
> 
> Currently, the OFED rdma-core library contains both versions of
> port query API. And this version is a transitional one, there are
> the plans to remove the proprietary mlx5dv_query_devx_port routine
> and the HAVE_MLX5DV_DR_DEVX_PORT flag in PMD will not work anymore.
> 
> We had one more dependency on this flag in the code (for the
> mlx5dv_dr_action_create_dest_ib_port routine) and the patch
> fixes mentioned dependency also, by introducing the new
> dedicated conditional flag - HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT.
> 
> This patch is highly desirable to be provided in DPDK LTS releases
> due to it covers the major compatibility issue.
> 
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Viacheslav Ovsiienko 
> Acked-by: Matan Azrad 

Removed v1, 
V2 applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh

Re: [dpdk-dev] [PATCH] common/mlx5: fix Netlink port name attribute padding

[Raslan Darawsheh]

Hi,

> -Original Message-
> From: Slava Ovsiienko 
> Sent: Saturday, June 19, 2021 4:56 PM
> To: dev@dpdk.org
> Cc: Raslan Darawsheh ; Matan Azrad
> ; sta...@dpdk.org
> Subject: [PATCH] common/mlx5: fix Netlink port name attribute padding
> 
> On some kernels the string attributes within Netlink reply messages might be
> not padded with zeroes (in cases when string length is aligned with 4-byte
> boundary).
> This caused wrong physical port names recognition and
> mlx5 PMD load failures.
> 
> Fixes: 30a86157f6d5 ("net/mlx5: support PF representor")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Viacheslav Ovsiienko 
> ---
Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh

[dpdk-dev] [Bug 745] performance-thread build failure with clang 12.0.1

[bugzilla]

https://bugs.dpdk.org/show_bug.cgi?id=745

Bug ID: 745
   Summary: performance-thread build failure with clang 12.0.1
   Product: DPDK
   Version: unspecified
  Hardware: All
OS: All
Status: UNCONFIRMED
  Severity: normal
  Priority: Normal
 Component: examples
  Assignee: dev@dpdk.org
  Reporter: alia...@nvidia.com
  Target Milestone: ---

"""
$ meson --werror -Dexamples=all build && ninja-build -C build
...
...
../examples/performance-thread/pthread_shim/main.c:75:2: error: 'pthread_yield'
is deprecated: pthread_yield is deprecated, use sched_yield instead
[-Werror,-Wdeprecated-declarations]
pthread_yield();
^
/usr/include/pthread.h:478:3: note: 'pthread_yield' has been explicitly marked
deprecated here
  __attribute_deprecated_msg__ ("\
  ^
/usr/include/sys/cdefs.h:292:19: note: expanded from macro
'__attribute_deprecated_msg__'
 __attribute__ ((__deprecated__ (msg)))
"""

Reproduces on main (8050b61).

OS: Fedora 35 (rawhide)
meson: 0.58.0
ninja-build: 1.10.2
clang: 12.0.1 (Fedora 12.0.1~rc1-3.fc35)

clang version 12.0.0 in Fedora 34 doesn't reproduce.

-- 
You are receiving this mail because:
You are the assignee for the bug.

[dpdk-dev] [PATCH v3 01/13] net/cnxk: add multi seg Rx vector routine

[pbhagavatula]

From: Pavan Nikhilesh 

Add multi-segment Rx vector routine, form the primary mbufs using
vector path switch to scalar path when extracting segments.

Signed-off-by: Pavan Nikhilesh 
---
 Depends-on: http://patches.dpdk.org/project/dpdk/list/?series=17394

 v3 Changes:
 - Spell check.

 drivers/net/cnxk/cn10k_rx.c  | 31 +++--
 drivers/net/cnxk/cn10k_rx.h  | 51 +---
 drivers/net/cnxk/cn10k_rx_vec_mseg.c | 17 ++
 drivers/net/cnxk/cn9k_rx.c   | 31 +++--
 drivers/net/cnxk/cn9k_rx.h   | 51 +---
 drivers/net/cnxk/cn9k_rx_vec_mseg.c  | 18 ++
 drivers/net/cnxk/meson.build |  2 ++
 7 files changed, 157 insertions(+), 44 deletions(-)
 create mode 100644 drivers/net/cnxk/cn10k_rx_vec_mseg.c
 create mode 100644 drivers/net/cnxk/cn9k_rx_vec_mseg.c

diff --git a/drivers/net/cnxk/cn10k_rx.c b/drivers/net/cnxk/cn10k_rx.c
index 5c956c06b4..3a9fd71309 100644
--- a/drivers/net/cnxk/cn10k_rx.c
+++ b/drivers/net/cnxk/cn10k_rx.c
@@ -29,6 +29,8 @@ pick_rx_func(struct rte_eth_dev *eth_dev,
[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_CHECKSUM_F)]
[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_PTYPE_F)]
[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_RSS_F)];
+
+   rte_atomic_thread_fence(__ATOMIC_RELEASE);
 }

 void
@@ -60,20 +62,29 @@ cn10k_eth_set_rx_function(struct rte_eth_dev *eth_dev)
 #undef R
};

-   /* For PTP enabled, scalar rx function should be chosen as most of the
-* PTP apps are implemented to rx burst 1 pkt.
-*/
-   if (dev->scalar_ena || dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
-   pick_rx_func(eth_dev, nix_eth_rx_burst);
-   else
-   pick_rx_func(eth_dev, nix_eth_rx_vec_burst);
+   const eth_rx_burst_t nix_eth_rx_vec_burst_mseg[2][2][2][2][2][2] = {
+#define R(name, f5, f4, f3, f2, f1, f0, flags) 
\
+   [f5][f4][f3][f2][f1][f0] = cn10k_nix_recv_pkts_vec_mseg_##name,

-   if (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)
-   pick_rx_func(eth_dev, nix_eth_rx_burst_mseg);
+   NIX_RX_FASTPATH_MODES
+#undef R
+   };

/* Copy multi seg version with no offload for tear down sequence */
if (rte_eal_process_type() == RTE_PROC_PRIMARY)
dev->rx_pkt_burst_no_offload =
nix_eth_rx_burst_mseg[0][0][0][0][0][0];
-   rte_mb();
+
+   /* For PTP enabled, scalar rx function should be chosen as most of the
+* PTP apps are implemented to rx burst 1 pkt.
+*/
+   if (dev->scalar_ena || dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP) {
+   if (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)
+   return pick_rx_func(eth_dev, nix_eth_rx_burst_mseg);
+   return pick_rx_func(eth_dev, nix_eth_rx_burst);
+   }
+
+   if (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)
+   return pick_rx_func(eth_dev, nix_eth_rx_vec_burst_mseg);
+   return pick_rx_func(eth_dev, nix_eth_rx_vec_burst);
 }
diff --git a/drivers/net/cnxk/cn10k_rx.h b/drivers/net/cnxk/cn10k_rx.h
index 1cc37cbaa0..5926ff7f46 100644
--- a/drivers/net/cnxk/cn10k_rx.h
+++ b/drivers/net/cnxk/cn10k_rx.h
@@ -119,8 +119,15 @@ nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct 
rte_mbuf *mbuf,

sg = *(const uint64_t *)(rx + 1);
nb_segs = (sg >> 48) & 0x3;
-   mbuf->nb_segs = nb_segs;
+
+   if (nb_segs == 1) {
+   mbuf->next = NULL;
+   return;
+   }
+
+   mbuf->pkt_len = rx->pkt_lenm1 + 1;
mbuf->data_len = sg & 0x;
+   mbuf->nb_segs = nb_segs;
sg = sg >> 16;

eol = ((const rte_iova_t *)(rx + 1) + ((rx->desc_sizem1 + 1) << 1));
@@ -195,15 +202,14 @@ cn10k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, 
const uint32_t tag,
ol_flags = nix_update_match_id(rx->match_id, ol_flags, mbuf);

mbuf->ol_flags = ol_flags;
-   *(uint64_t *)(&mbuf->rearm_data) = val;
mbuf->pkt_len = len;
+   mbuf->data_len = len;
+   *(uint64_t *)(&mbuf->rearm_data) = val;

-   if (flag & NIX_RX_MULTI_SEG_F) {
+   if (flag & NIX_RX_MULTI_SEG_F)
nix_cqe_xtract_mseg(rx, mbuf, val);
-   } else {
-   mbuf->data_len = len;
+   else
mbuf->next = NULL;
-   }
 }

 static inline uint16_t
@@ -481,16 +487,34 @@ cn10k_nix_recv_pkts_vector(void *rx_queue, struct 
rte_mbuf **rx_pkts,
vst1q_u64((uint64_t *)mbuf2->rearm_data, rearm2);
vst1q_u64((uint64_t *)mbuf3->rearm_data, rearm3);

-   /* Update that no more segments */
-   mbuf0->next = NULL;
-   mbuf1->next = NULL;
-   mbuf2->next = NULL;
-   mbuf3->next = NULL;
-
/* Store the mbufs to rx_pkts */
vst1q_u64((uint64_t *)&rx_pkts[pack

[dpdk-dev] [PATCH v3 02/13] net/cnxk: enable ptp processing in vector Rx

[pbhagavatula]

From: Pavan Nikhilesh 

Enable PTP offload in vector Rx burst function, use vector path
for processing mbufs and finally switch to scalar when extracting
timestamp.

Signed-off-by: Pavan Nikhilesh 
---
 drivers/net/cnxk/cn10k_ethdev.c |   1 -
 drivers/net/cnxk/cn10k_rx.c |   5 +-
 drivers/net/cnxk/cn10k_rx.h | 124 
 drivers/net/cnxk/cn10k_rx_vec.c |   3 -
 drivers/net/cnxk/cn9k_ethdev.c  |   1 -
 drivers/net/cnxk/cn9k_rx.c  |   5 +-
 drivers/net/cnxk/cn9k_rx.h  | 124 
 drivers/net/cnxk/cn9k_rx_vec.c  |   3 -
 drivers/net/cnxk/cnxk_ethdev.h  |  19 ++---
 9 files changed, 232 insertions(+), 53 deletions(-)

diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c
index b079edbd35..7caec6cf14 100644
--- a/drivers/net/cnxk/cn10k_ethdev.c
+++ b/drivers/net/cnxk/cn10k_ethdev.c
@@ -301,7 +301,6 @@ nix_ptp_enable_vf(struct rte_eth_dev *eth_dev)
if (nix_recalc_mtu(eth_dev))
plt_err("Failed to set MTU size for ptp");
 
-   dev->scalar_ena = true;
dev->rx_offload_flags |= NIX_RX_OFFLOAD_TSTAMP_F;
 
/* Setting up the function pointers as per new offload flags */
diff --git a/drivers/net/cnxk/cn10k_rx.c b/drivers/net/cnxk/cn10k_rx.c
index 3a9fd71309..69e767ac3d 100644
--- a/drivers/net/cnxk/cn10k_rx.c
+++ b/drivers/net/cnxk/cn10k_rx.c
@@ -75,10 +75,7 @@ cn10k_eth_set_rx_function(struct rte_eth_dev *eth_dev)
dev->rx_pkt_burst_no_offload =
nix_eth_rx_burst_mseg[0][0][0][0][0][0];
 
-   /* For PTP enabled, scalar rx function should be chosen as most of the
-* PTP apps are implemented to rx burst 1 pkt.
-*/
-   if (dev->scalar_ena || dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP) {
+   if (dev->scalar_ena) {
if (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)
return pick_rx_func(eth_dev, nix_eth_rx_burst_mseg);
return pick_rx_func(eth_dev, nix_eth_rx_burst);
diff --git a/drivers/net/cnxk/cn10k_rx.h b/drivers/net/cnxk/cn10k_rx.h
index 5926ff7f46..d9572b19e7 100644
--- a/drivers/net/cnxk/cn10k_rx.h
+++ b/drivers/net/cnxk/cn10k_rx.h
@@ -109,7 +109,7 @@ nix_update_match_id(const uint16_t match_id, uint64_t 
ol_flags,
 
 static __rte_always_inline void
 nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,
-   uint64_t rearm)
+   uint64_t rearm, const uint16_t flags)
 {
const rte_iova_t *iova_list;
struct rte_mbuf *head;
@@ -125,8 +125,10 @@ nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct 
rte_mbuf *mbuf,
return;
}
 
-   mbuf->pkt_len = rx->pkt_lenm1 + 1;
-   mbuf->data_len = sg & 0x;
+   mbuf->pkt_len = (rx->pkt_lenm1 + 1) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
+  CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
+   mbuf->data_len = (sg & 0x) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
+ CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
mbuf->nb_segs = nb_segs;
sg = sg >> 16;
 
@@ -207,7 +209,7 @@ cn10k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const 
uint32_t tag,
*(uint64_t *)(&mbuf->rearm_data) = val;
 
if (flag & NIX_RX_MULTI_SEG_F)
-   nix_cqe_xtract_mseg(rx, mbuf, val);
+   nix_cqe_xtract_mseg(rx, mbuf, val, flag);
else
mbuf->next = NULL;
 }
@@ -272,8 +274,9 @@ cn10k_nix_recv_pkts(void *rx_queue, struct rte_mbuf 
**rx_pkts, uint16_t pkts,
  flags);
cnxk_nix_mbuf_to_tstamp(mbuf, rxq->tstamp,
(flags & NIX_RX_OFFLOAD_TSTAMP_F),
-   (uint64_t *)((uint8_t *)mbuf + data_off)
-   );
+   (flags & NIX_RX_MULTI_SEG_F),
+   (uint64_t *)((uint8_t *)mbuf
+   + data_off));
rx_pkts[packets++] = mbuf;
roc_prefetch_store_keep(mbuf);
head++;
@@ -469,6 +472,99 @@ cn10k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf 
**rx_pkts,
mbuf3);
}
 
+   if (flags & NIX_RX_OFFLOAD_TSTAMP_F) {
+   const uint16x8_t len_off = {
+   0,   /* ptype   0:15 */
+   0,   /* ptype  16:32 */
+   CNXK_NIX_TIMESYNC_RX_OFFSET, /* pktlen  0:15*/
+   0,   /* pktlen 16:32 */
+   CNXK_NIX_TIMESYNC_RX_OFFSET, /* datalen 0:15 */
+   0,
+   0,
+   0}

[dpdk-dev] [PATCH v3 03/13] net/cnxk: enable VLAN processing in vector Tx

[pbhagavatula]

From: Pavan Nikhilesh 

Enable VLAN offload in vector Tx burst function.

Signed-off-by: Pavan Nikhilesh 
---
 drivers/net/cnxk/cn10k_tx.c |   3 +-
 drivers/net/cnxk/cn10k_tx.h | 125 +++
 drivers/net/cnxk/cn10k_tx_vec.c |   3 +-
 drivers/net/cnxk/cn9k_tx.c  |   3 +-
 drivers/net/cnxk/cn9k_tx.h  | 128 
 drivers/net/cnxk/cn9k_tx_vec.c  |   3 +-
 6 files changed, 227 insertions(+), 38 deletions(-)

diff --git a/drivers/net/cnxk/cn10k_tx.c b/drivers/net/cnxk/cn10k_tx.c
index 18694dc704..05bc163a40 100644
--- a/drivers/net/cnxk/cn10k_tx.c
+++ b/drivers/net/cnxk/cn10k_tx.c
@@ -69,8 +69,7 @@ cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev)
 
if (dev->scalar_ena ||
(dev->tx_offload_flags &
-(NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSTAMP_F |
- NIX_TX_OFFLOAD_TSO_F)))
+(NIX_TX_OFFLOAD_TSTAMP_F | NIX_TX_OFFLOAD_TSO_F)))
pick_tx_func(eth_dev, nix_eth_tx_burst);
else
pick_tx_func(eth_dev, nix_eth_tx_vec_burst);
diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h
index 8b1446f25c..1e16978584 100644
--- a/drivers/net/cnxk/cn10k_tx.h
+++ b/drivers/net/cnxk/cn10k_tx.h
@@ -62,9 +62,14 @@ cn10k_nix_tx_ext_subs(const uint16_t flags)
 static __rte_always_inline uint8_t
 cn10k_nix_pkts_per_vec_brst(const uint16_t flags)
 {
-   RTE_SET_USED(flags);
-   /* We can pack up to 4 packets per LMTLINE if there are no offloads. */
-   return 4 << ROC_LMT_LINES_PER_CORE_LOG2;
+   return ((flags & NIX_TX_NEED_EXT_HDR) ? 2 : 4)
+  << ROC_LMT_LINES_PER_CORE_LOG2;
+}
+
+static __rte_always_inline uint8_t
+cn10k_nix_tx_dwords_per_line(const uint16_t flags)
+{
+   return (flags & NIX_TX_NEED_EXT_HDR) ? 6 : 8;
 }
 
 static __rte_always_inline uint64_t
@@ -98,10 +103,9 @@ cn10k_nix_tx_steor_data(const uint16_t flags)
 static __rte_always_inline uint64_t
 cn10k_nix_tx_steor_vec_data(const uint16_t flags)
 {
-   const uint64_t dw_m1 = 0x7;
+   const uint64_t dw_m1 = cn10k_nix_tx_dwords_per_line(flags) - 1;
uint64_t data;
 
-   RTE_SET_USED(flags);
/* This will be moved to addr area */
data = dw_m1;
/* 15 vector sizes for single seg */
@@ -690,11 +694,14 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, struct 
rte_mbuf **tx_pkts,
 {
uint64x2_t dataoff_iova0, dataoff_iova1, dataoff_iova2, dataoff_iova3;
uint64x2_t len_olflags0, len_olflags1, len_olflags2, len_olflags3;
-   uint64x2_t cmd0[NIX_DESCS_PER_LOOP], cmd1[NIX_DESCS_PER_LOOP];
+   uint64x2_t cmd0[NIX_DESCS_PER_LOOP], cmd1[NIX_DESCS_PER_LOOP],
+   cmd2[NIX_DESCS_PER_LOOP];
uint64_t *mbuf0, *mbuf1, *mbuf2, *mbuf3, data, pa;
uint64x2_t senddesc01_w0, senddesc23_w0;
uint64x2_t senddesc01_w1, senddesc23_w1;
uint16_t left, scalar, burst, i, lmt_id;
+   uint64x2_t sendext01_w0, sendext23_w0;
+   uint64x2_t sendext01_w1, sendext23_w1;
uint64x2_t sgdesc01_w0, sgdesc23_w0;
uint64x2_t sgdesc01_w1, sgdesc23_w1;
struct cn10k_eth_txq *txq = tx_queue;
@@ -720,6 +727,14 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf 
**tx_pkts,
sgdesc01_w0 = vld1q_dup_u64(&txq->sg_w0);
sgdesc23_w0 = sgdesc01_w0;
 
+   /* Load command defaults into vector variables. */
+   if (flags & NIX_TX_NEED_EXT_HDR) {
+   sendext01_w0 = vld1q_dup_u64(&txq->cmd[0]);
+   sendext23_w0 = sendext01_w0;
+   sendext01_w1 = vdupq_n_u64(12 | 12U << 24);
+   sendext23_w1 = sendext01_w1;
+   }
+
/* Get LMT base address and LMT ID as lcore id */
ROC_LMT_BASE_ID_GET(laddr, lmt_id);
left = pkts;
@@ -738,6 +753,13 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf 
**tx_pkts,
senddesc23_w0 = senddesc01_w0;
sgdesc23_w0 = sgdesc01_w0;
 
+   /* Clear vlan enables. */
+   if (flags & NIX_TX_NEED_EXT_HDR) {
+   sendext01_w1 = vbicq_u64(sendext01_w1,
+vdupq_n_u64(0x30000));
+   sendext23_w1 = sendext01_w1;
+   }
+
/* Move mbufs to iova */
mbuf0 = (uint64_t *)tx_pkts[0];
mbuf1 = (uint64_t *)tx_pkts[1];
@@ -1303,6 +1325,52 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, struct 
rte_mbuf **tx_pkts,
senddesc01_w0 = vorrq_u64(senddesc01_w0, xmask01);
senddesc23_w0 = vorrq_u64(senddesc23_w0, xmask23);
 
+   if (flags & NIX_TX_OFFLOAD_VLAN_QINQ_F) {
+   /* Tx ol_flag for vlan. */
+   const uint64x2_t olv = {PKT_TX_VLAN, PKT_TX_VLAN};
+   /* Bit enable for VLAN1 */
+   const uint64x2_t mlv = {BIT_ULL(49), BIT_ULL(49)};
+   /*

[dpdk-dev] [PATCH v3 04/13] net/cnxk: enable ptp processing in vector Tx

[pbhagavatula]

From: Pavan Nikhilesh 

Enable PTP offload in vector Tx burst function. Since, we can
no-longer use a single LMT line for burst of 4, split the LMT
into two and transmit twice.

Signed-off-by: Pavan Nikhilesh 
---
 drivers/net/cnxk/cn10k_tx.c |   4 +-
 drivers/net/cnxk/cn10k_tx.h | 109 +++-
 drivers/net/cnxk/cn10k_tx_vec.c |   5 +-
 drivers/net/cnxk/cn9k_tx.c  |   4 +-
 drivers/net/cnxk/cn9k_tx.h  | 105 ++
 drivers/net/cnxk/cn9k_tx_vec.c  |   5 +-
 6 files changed, 192 insertions(+), 40 deletions(-)

diff --git a/drivers/net/cnxk/cn10k_tx.c b/drivers/net/cnxk/cn10k_tx.c
index 05bc163a40..c4c3e65704 100644
--- a/drivers/net/cnxk/cn10k_tx.c
+++ b/drivers/net/cnxk/cn10k_tx.c
@@ -67,9 +67,7 @@ cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev)
 #undef T
};
 
-   if (dev->scalar_ena ||
-   (dev->tx_offload_flags &
-(NIX_TX_OFFLOAD_TSTAMP_F | NIX_TX_OFFLOAD_TSO_F)))
+   if (dev->scalar_ena || (dev->tx_offload_flags & NIX_TX_OFFLOAD_TSO_F))
pick_tx_func(eth_dev, nix_eth_tx_burst);
else
pick_tx_func(eth_dev, nix_eth_tx_vec_burst);
diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h
index 1e16978584..8af6799ff6 100644
--- a/drivers/net/cnxk/cn10k_tx.h
+++ b/drivers/net/cnxk/cn10k_tx.h
@@ -69,7 +69,9 @@ cn10k_nix_pkts_per_vec_brst(const uint16_t flags)
 static __rte_always_inline uint8_t
 cn10k_nix_tx_dwords_per_line(const uint16_t flags)
 {
-   return (flags & NIX_TX_NEED_EXT_HDR) ? 6 : 8;
+   return (flags & NIX_TX_NEED_EXT_HDR) ?
+((flags & NIX_TX_OFFLOAD_TSTAMP_F) ? 8 : 6) :
+8;
 }
 
 static __rte_always_inline uint64_t
@@ -695,13 +697,15 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, struct 
rte_mbuf **tx_pkts,
uint64x2_t dataoff_iova0, dataoff_iova1, dataoff_iova2, dataoff_iova3;
uint64x2_t len_olflags0, len_olflags1, len_olflags2, len_olflags3;
uint64x2_t cmd0[NIX_DESCS_PER_LOOP], cmd1[NIX_DESCS_PER_LOOP],
-   cmd2[NIX_DESCS_PER_LOOP];
+   cmd2[NIX_DESCS_PER_LOOP], cmd3[NIX_DESCS_PER_LOOP];
uint64_t *mbuf0, *mbuf1, *mbuf2, *mbuf3, data, pa;
uint64x2_t senddesc01_w0, senddesc23_w0;
uint64x2_t senddesc01_w1, senddesc23_w1;
uint16_t left, scalar, burst, i, lmt_id;
uint64x2_t sendext01_w0, sendext23_w0;
uint64x2_t sendext01_w1, sendext23_w1;
+   uint64x2_t sendmem01_w0, sendmem23_w0;
+   uint64x2_t sendmem01_w1, sendmem23_w1;
uint64x2_t sgdesc01_w0, sgdesc23_w0;
uint64x2_t sgdesc01_w1, sgdesc23_w1;
struct cn10k_eth_txq *txq = tx_queue;
@@ -733,6 +737,12 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf 
**tx_pkts,
sendext23_w0 = sendext01_w0;
sendext01_w1 = vdupq_n_u64(12 | 12U << 24);
sendext23_w1 = sendext01_w1;
+   if (flags & NIX_TX_OFFLOAD_TSTAMP_F) {
+   sendmem01_w0 = vld1q_dup_u64(&txq->cmd[2]);
+   sendmem23_w0 = sendmem01_w0;
+   sendmem01_w1 = vld1q_dup_u64(&txq->cmd[3]);
+   sendmem23_w1 = sendmem01_w1;
+   }
}
 
/* Get LMT base address and LMT ID as lcore id */
@@ -760,6 +770,17 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf 
**tx_pkts,
sendext23_w1 = sendext01_w1;
}
 
+   if (flags & NIX_TX_OFFLOAD_TSTAMP_F) {
+   /* Reset send mem alg to SETTSTMP from SUB*/
+   sendmem01_w0 = vbicq_u64(sendmem01_w0,
+vdupq_n_u64(BIT_ULL(59)));
+   /* Reset send mem address to default. */
+   sendmem01_w1 =
+   vbicq_u64(sendmem01_w1, vdupq_n_u64(0xF));
+   sendmem23_w0 = sendmem01_w0;
+   sendmem23_w1 = sendmem01_w1;
+   }
+
/* Move mbufs to iova */
mbuf0 = (uint64_t *)tx_pkts[0];
mbuf1 = (uint64_t *)tx_pkts[1];
@@ -1371,6 +1392,44 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, struct 
rte_mbuf **tx_pkts,
sendext23_w1 = vorrq_u64(sendext23_w1, ytmp128);
}
 
+   if (flags & NIX_TX_OFFLOAD_TSTAMP_F) {
+   /* Tx ol_flag for timestam. */
+   const uint64x2_t olf = {PKT_TX_IEEE1588_TMST,
+   PKT_TX_IEEE1588_TMST};
+   /* Set send mem alg to SUB. */
+   const uint64x2_t alg = {BIT_ULL(59), BIT_ULL(59)};
+   /* Increment send mem address by 8. */
+   const uint64x2_t addr = {0x8, 0x8};
+
+   xtmp128 = vzip1q_u64(len_olflags0, len_olflags1);
+ 

[dpdk-dev] [PATCH v3 05/13] net/cnxk: enable TSO processing in vector Tx

[pbhagavatula]

From: Pavan Nikhilesh 

Enable TSO offload in vector Tx burst function.

Signed-off-by: Pavan Nikhilesh 
---
 drivers/net/cnxk/cn10k_tx.c |  2 +-
 drivers/net/cnxk/cn10k_tx.h | 97 +
 drivers/net/cnxk/cn10k_tx_vec.c |  5 +-
 drivers/net/cnxk/cn9k_tx.c  |  2 +-
 drivers/net/cnxk/cn9k_tx.h  | 94 
 drivers/net/cnxk/cn9k_tx_vec.c  |  5 +-
 6 files changed, 199 insertions(+), 6 deletions(-)

diff --git a/drivers/net/cnxk/cn10k_tx.c b/drivers/net/cnxk/cn10k_tx.c
index c4c3e65704..d06879163f 100644
--- a/drivers/net/cnxk/cn10k_tx.c
+++ b/drivers/net/cnxk/cn10k_tx.c
@@ -67,7 +67,7 @@ cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev)
 #undef T
};
 
-   if (dev->scalar_ena || (dev->tx_offload_flags & NIX_TX_OFFLOAD_TSO_F))
+   if (dev->scalar_ena)
pick_tx_func(eth_dev, nix_eth_tx_burst);
else
pick_tx_func(eth_dev, nix_eth_tx_vec_burst);
diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h
index 8af6799ff6..26797581e7 100644
--- a/drivers/net/cnxk/cn10k_tx.h
+++ b/drivers/net/cnxk/cn10k_tx.h
@@ -689,6 +689,46 @@ cn10k_nix_xmit_pkts_mseg(void *tx_queue, struct rte_mbuf 
**tx_pkts,
 
 #if defined(RTE_ARCH_ARM64)
 
+static __rte_always_inline void
+cn10k_nix_prepare_tso(struct rte_mbuf *m, union nix_send_hdr_w1_u *w1,
+ union nix_send_ext_w0_u *w0, uint64_t ol_flags,
+ const uint64_t flags, const uint64_t lso_tun_fmt)
+{
+   uint16_t lso_sb;
+   uint64_t mask;
+
+   if (!(ol_flags & PKT_TX_TCP_SEG))
+   return;
+
+   mask = -(!w1->il3type);
+   lso_sb = (mask & w1->ol4ptr) + (~mask & w1->il4ptr) + m->l4_len;
+
+   w0->u |= BIT(14);
+   w0->lso_sb = lso_sb;
+   w0->lso_mps = m->tso_segsz;
+   w0->lso_format = NIX_LSO_FORMAT_IDX_TSOV4 + !!(ol_flags & PKT_TX_IPV6);
+   w1->ol4type = NIX_SENDL4TYPE_TCP_CKSUM;
+
+   /* Handle tunnel tso */
+   if ((flags & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F) &&
+   (ol_flags & PKT_TX_TUNNEL_MASK)) {
+   const uint8_t is_udp_tun =
+   (CNXK_NIX_UDP_TUN_BITMASK >>
+((ol_flags & PKT_TX_TUNNEL_MASK) >> 45)) &
+   0x1;
+   uint8_t shift = is_udp_tun ? 32 : 0;
+
+   shift += (!!(ol_flags & PKT_TX_OUTER_IPV6) << 4);
+   shift += (!!(ol_flags & PKT_TX_IPV6) << 3);
+
+   w1->il4type = NIX_SENDL4TYPE_TCP_CKSUM;
+   w1->ol4type = is_udp_tun ? NIX_SENDL4TYPE_UDP_CKSUM : 0;
+   /* Update format for UDP tunneled packet */
+
+   w0->lso_format = (lso_tun_fmt >> shift);
+   }
+}
+
 #define NIX_DESCS_PER_LOOP 4
 static __rte_always_inline uint16_t
 cn10k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts,
@@ -723,6 +763,11 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf 
**tx_pkts,
 
/* Reduce the cached count */
txq->fc_cache_pkts -= pkts;
+   /* Perform header writes before barrier for TSO */
+   if (flags & NIX_TX_OFFLOAD_TSO_F) {
+   for (i = 0; i < pkts; i++)
+   cn10k_nix_xmit_prepare_tso(tx_pkts[i], flags);
+   }
 
senddesc01_w0 = vld1q_dup_u64(&txq->send_hdr_w0);
senddesc23_w0 = senddesc01_w0;
@@ -781,6 +826,13 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf 
**tx_pkts,
sendmem23_w1 = sendmem01_w1;
}
 
+   if (flags & NIX_TX_OFFLOAD_TSO_F) {
+   /* Clear the LSO enable bit. */
+   sendext01_w0 = vbicq_u64(sendext01_w0,
+vdupq_n_u64(BIT_ULL(14)));
+   sendext23_w0 = sendext01_w0;
+   }
+
/* Move mbufs to iova */
mbuf0 = (uint64_t *)tx_pkts[0];
mbuf1 = (uint64_t *)tx_pkts[1];
@@ -1430,6 +1482,51 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, struct 
rte_mbuf **tx_pkts,
cmd3[3] = vzip2q_u64(sendmem23_w0, sendmem23_w1);
}
 
+   if (flags & NIX_TX_OFFLOAD_TSO_F) {
+   const uint64_t lso_fmt = txq->lso_tun_fmt;
+   uint64_t sx_w0[NIX_DESCS_PER_LOOP];
+   uint64_t sd_w1[NIX_DESCS_PER_LOOP];
+
+   /* Extract SD W1 as we need to set L4 types. */
+   vst1q_u64(sd_w1, senddesc01_w1);
+   vst1q_u64(sd_w1 + 2, senddesc23_w1);
+
+   /* Extract SX W0 as we need to set LSO fields. */
+   vst1q_u64(sx_w0, sendext01_w0);
+   vst1q_u64(sx_w0 + 2, sendext23_w0);
+
+   /* Extract ol_flags. */
+   xtmp128 = vzip1q_u64(len_olflags0, len_olflags1);
+   ytmp128 = vzip1q_u64(len_olflags2, len_o

[dpdk-dev] [PATCH v3 06/13] net/cnxk: add multi seg Tx vector routine

[pbhagavatula]

From: Pavan Nikhilesh 

Add multi segment Tx vector routine.

Signed-off-by: Pavan Nikhilesh 
---
 drivers/net/cnxk/cn10k_tx.c  |  20 +-
 drivers/net/cnxk/cn10k_tx.h  | 388 +--
 drivers/net/cnxk/cn10k_tx_vec_mseg.c |  24 ++
 drivers/net/cnxk/cn9k_tx.c   |  20 +-
 drivers/net/cnxk/cn9k_tx.h   | 272 ++-
 drivers/net/cnxk/cn9k_tx_vec_mseg.c  |  24 ++
 drivers/net/cnxk/meson.build |   6 +-
 7 files changed, 709 insertions(+), 45 deletions(-)
 create mode 100644 drivers/net/cnxk/cn10k_tx_vec_mseg.c
 create mode 100644 drivers/net/cnxk/cn9k_tx_vec_mseg.c

diff --git a/drivers/net/cnxk/cn10k_tx.c b/drivers/net/cnxk/cn10k_tx.c
index d06879163f..1f30bab59a 100644
--- a/drivers/net/cnxk/cn10k_tx.c
+++ b/drivers/net/cnxk/cn10k_tx.c
@@ -67,13 +67,23 @@ cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev)
 #undef T
};
 
-   if (dev->scalar_ena)
+   const eth_tx_burst_t nix_eth_tx_vec_burst_mseg[2][2][2][2][2][2] = {
+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags) 
\
+   [f5][f4][f3][f2][f1][f0] = cn10k_nix_xmit_pkts_vec_mseg_##name,
+
+   NIX_TX_FASTPATH_MODES
+#undef T
+   };
+
+   if (dev->scalar_ena) {
pick_tx_func(eth_dev, nix_eth_tx_burst);
-   else
+   if (dev->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
+   pick_tx_func(eth_dev, nix_eth_tx_burst_mseg);
+   } else {
pick_tx_func(eth_dev, nix_eth_tx_vec_burst);
-
-   if (dev->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
-   pick_tx_func(eth_dev, nix_eth_tx_burst_mseg);
+   if (dev->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
+   pick_tx_func(eth_dev, nix_eth_tx_vec_burst_mseg);
+   }
 
rte_mb();
 }
diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h
index 26797581e7..532b53b319 100644
--- a/drivers/net/cnxk/cn10k_tx.h
+++ b/drivers/net/cnxk/cn10k_tx.h
@@ -42,6 +42,13 @@
}  \
} while (0)
 
+/* Encoded number of segments to number of dwords macro, each value of nb_segs
+ * is encoded as 4bits.
+ */
+#define NIX_SEGDW_MAGIC 0x76654432210ULL
+
+#define NIX_NB_SEGS_TO_SEGDW(x) ((NIX_SEGDW_MAGIC >> ((x) << 2)) & 0xF)
+
 #define LMT_OFF(lmt_addr, lmt_num, offset) 
\
(void *)((lmt_addr) + ((lmt_num) << ROC_LMT_LINE_SIZE_LOG2) + (offset))
 
@@ -102,6 +109,14 @@ cn10k_nix_tx_steor_data(const uint16_t flags)
return data;
 }
 
+static __rte_always_inline uint8_t
+cn10k_nix_tx_dwords_per_line_seg(const uint16_t flags)
+{
+   return ((flags & NIX_TX_NEED_EXT_HDR) ?
+ (flags & NIX_TX_OFFLOAD_TSTAMP_F) ? 8 : 6 :
+ 4);
+}
+
 static __rte_always_inline uint64_t
 cn10k_nix_tx_steor_vec_data(const uint16_t flags)
 {
@@ -729,7 +744,244 @@ cn10k_nix_prepare_tso(struct rte_mbuf *m, union 
nix_send_hdr_w1_u *w1,
}
 }
 
+static __rte_always_inline void
+cn10k_nix_prepare_mseg_vec_list(struct rte_mbuf *m, uint64_t *cmd,
+   union nix_send_hdr_w0_u *sh,
+   union nix_send_sg_s *sg, const uint32_t flags)
+{
+   struct rte_mbuf *m_next;
+   uint64_t *slist, sg_u;
+   uint16_t nb_segs;
+   int i = 1;
+
+   sh->total = m->pkt_len;
+   /* Clear sg->u header before use */
+   sg->u &= 0xFC00;
+   sg_u = sg->u;
+   slist = &cmd[0];
+
+   sg_u = sg_u | ((uint64_t)m->data_len);
+
+   nb_segs = m->nb_segs - 1;
+   m_next = m->next;
+
+   /* Set invert df if buffer is not to be freed by H/W */
+   if (flags & NIX_TX_OFFLOAD_MBUF_NOFF_F)
+   sg_u |= (cnxk_nix_prefree_seg(m) << 55);
+   /* Mark mempool object as "put" since it is freed by NIX */
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+   if (!(sg_u & (1ULL << 55)))
+   __mempool_check_cookies(m->pool, (void **)&m, 1, 0);
+   rte_io_wmb();
+#endif
+
+   m = m_next;
+   /* Fill mbuf segments */
+   do {
+   m_next = m->next;
+   sg_u = sg_u | ((uint64_t)m->data_len << (i << 4));
+   *slist = rte_mbuf_data_iova(m);
+   /* Set invert df if buffer is not to be freed by H/W */
+   if (flags & NIX_TX_OFFLOAD_MBUF_NOFF_F)
+   sg_u |= (cnxk_nix_prefree_seg(m) << (i + 55));
+   /* Mark mempool object as "put" since it is freed by NIX
+*/
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+   if (!(sg_u & (1ULL << (i + 55
+   __mempool_check_cookies(m->pool, (void **)&m, 1, 0);
+   rte_io_wmb();
+#endif
+   slist++;
+   i++;
+   nb_segs--;
+   if (i > 2 && nb_segs) {
+   i = 0;
+   

[dpdk-dev] [PATCH v3 07/13] event/cnxk: add Rx adapter support

[pbhagavatula]

From: Pavan Nikhilesh 

Add support for event eth Rx adapter.
Resize cn10k workslot fastpath structure to fit in 64B cacheline size.

Signed-off-by: Pavan Nikhilesh 
---
 doc/guides/eventdevs/cnxk.rst|  28 
 doc/guides/rel_notes/release_21_08.rst   |   5 +
 drivers/common/cnxk/roc_nix.h|   3 +
 drivers/common/cnxk/roc_nix_fc.c |  78 ++
 drivers/common/cnxk/roc_nix_priv.h   |   3 +-
 drivers/common/cnxk/version.map  |   1 +
 drivers/event/cnxk/cn10k_eventdev.c  | 107 +++---
 drivers/event/cnxk/cn10k_worker.c|   7 +-
 drivers/event/cnxk/cn10k_worker.h|  32 +++--
 drivers/event/cnxk/cn9k_eventdev.c   |  89 
 drivers/event/cnxk/cn9k_worker.h |   4 +
 drivers/event/cnxk/cnxk_eventdev.c   |   2 +
 drivers/event/cnxk/cnxk_eventdev.h   |  43 --
 drivers/event/cnxk/cnxk_eventdev_adptr.c | 176 +++
 drivers/event/cnxk/meson.build   |   9 +-
 15 files changed, 540 insertions(+), 47 deletions(-)

diff --git a/doc/guides/eventdevs/cnxk.rst b/doc/guides/eventdevs/cnxk.rst
index 36da3800cc..b7e82c1273 100644
--- a/doc/guides/eventdevs/cnxk.rst
+++ b/doc/guides/eventdevs/cnxk.rst
@@ -39,6 +39,10 @@ Features of the OCTEON cnxk SSO PMD are:
   time granularity of 2.5us on CN9K and 1us on CN10K.
 - Up to 256 TIM rings a.k.a event timer adapters.
 - Up to 8 rings traversed in parallel.
+- HW managed packets enqueued from ethdev to eventdev exposed through event eth
+  RX adapter.
+- N:1 ethernet device Rx queue to Event queue mapping.
+- Full Rx offload support defined through ethdev queue configuration.
 
 Prerequisites and Compilation procedure
 ---
@@ -93,6 +97,15 @@ Runtime Config Options
 
 -a 0002:0e:00.0,qos=[1-50-50-50]
 
+- ``Force Rx Back pressure``
+
+   Force Rx back pressure when same mempool is used across ethernet device
+   connected to event device.
+
+   For example::
+
+  -a 0002:0e:00.0,force_rx_bp=1
+
 - ``TIM disable NPA``
 
   By default chunks are allocated from NPA then TIM can automatically free
@@ -160,3 +173,18 @@ Debugging Options
+---++---+
| 2 | TIM| --log-level='pmd\.event\.cnxk\.timer,8'   |
+---++---+
+
+Limitations
+---
+
+Rx adapter support
+~~
+
+Using the same mempool for all the ethernet device ports connected to
+event device would cause back pressure to be asserted only on the first
+ethernet device.
+Back pressure is automatically disabled when using same mempool for all the
+ethernet devices connected to event device to override this applications can
+use `force_rx_bp=1` device arguments.
+Using unique mempool per each ethernet device is recommended when they are
+connected to event device.
diff --git a/doc/guides/rel_notes/release_21_08.rst 
b/doc/guides/rel_notes/release_21_08.rst
index 31e49e1a56..3892c8017a 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -60,6 +60,11 @@ New Features
   * Added net/cnxk driver which provides the support for the integrated 
ethernet
 device.
 
+* **Added support for Marvell CN10K, CN9K, event Rx adapter.**
+
+  * Added Rx adapter support for event/cnxk when the ethernet device requested 
is
+net/cnxk.
+
 
 Removed Items
 -
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index bb69027956..76613fe84e 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -514,6 +514,9 @@ int __roc_api roc_nix_fc_mode_set(struct roc_nix *roc_nix,
 
 enum roc_nix_fc_mode __roc_api roc_nix_fc_mode_get(struct roc_nix *roc_nix);
 
+void __roc_api rox_nix_fc_npa_bp_cfg(struct roc_nix *roc_nix, uint64_t pool_id,
+uint8_t ena, uint8_t force);
+
 /* NPC */
 int __roc_api roc_nix_npc_promisc_ena_dis(struct roc_nix *roc_nix, int enable);
 
diff --git a/drivers/common/cnxk/roc_nix_fc.c b/drivers/common/cnxk/roc_nix_fc.c
index 47be8aa3f8..f17eba4169 100644
--- a/drivers/common/cnxk/roc_nix_fc.c
+++ b/drivers/common/cnxk/roc_nix_fc.c
@@ -249,3 +249,81 @@ roc_nix_fc_mode_set(struct roc_nix *roc_nix, enum 
roc_nix_fc_mode mode)
 exit:
return rc;
 }
+
+void
+rox_nix_fc_npa_bp_cfg(struct roc_nix *roc_nix, uint64_t pool_id, uint8_t ena,
+ uint8_t force)
+{
+   struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+   struct npa_lf *lf = idev_npa_obj_get();
+   struct npa_aq_enq_req *req;
+   struct npa_aq_enq_rsp *rsp;
+   struct mbox *mbox;
+   uint32_t limit;
+   int rc;
+
+   if (roc_nix_is_sdp(roc_nix))
+   return;
+
+   if (!lf)
+   return;
+   mbox = lf->mbox;
+
+   req = mbox_alloc_msg_npa_aq_enq(mbox);
+   if (req == NULL)
+   return;
+
+   re

[dpdk-dev] [PATCH v3 08/13] event/cnxk: add Rx adapter fastpath ops

[pbhagavatula]

From: Pavan Nikhilesh 

Add support for event eth Rx adapter fastpath operations.

Signed-off-by: Pavan Nikhilesh 
---
 drivers/event/cnxk/cn10k_eventdev.c   | 136 +++-
 drivers/event/cnxk/cn10k_worker.c |  54 
 drivers/event/cnxk/cn10k_worker.h |  97 +-
 drivers/event/cnxk/cn10k_worker_deq.c |  44 +++
 drivers/event/cnxk/cn10k_worker_deq_burst.c   |  29 ++
 drivers/event/cnxk/cn10k_worker_deq_tmo.c |  72 +
 drivers/event/cnxk/cn9k_eventdev.c| 305 +-
 drivers/event/cnxk/cn9k_worker.c  | 117 ---
 drivers/event/cnxk/cn9k_worker.h  | 174 --
 drivers/event/cnxk/cn9k_worker_deq.c  |  44 +++
 drivers/event/cnxk/cn9k_worker_deq_burst.c|  29 ++
 drivers/event/cnxk/cn9k_worker_deq_tmo.c  |  72 +
 drivers/event/cnxk/cn9k_worker_dual_deq.c |  53 +++
 .../event/cnxk/cn9k_worker_dual_deq_burst.c   |  30 ++
 drivers/event/cnxk/cn9k_worker_dual_deq_tmo.c |  89 +
 drivers/event/cnxk/cnxk_eventdev.h|   1 +
 drivers/event/cnxk/meson.build|   9 +
 17 files changed, 1124 insertions(+), 231 deletions(-)
 create mode 100644 drivers/event/cnxk/cn10k_worker_deq.c
 create mode 100644 drivers/event/cnxk/cn10k_worker_deq_burst.c
 create mode 100644 drivers/event/cnxk/cn10k_worker_deq_tmo.c
 create mode 100644 drivers/event/cnxk/cn9k_worker_deq.c
 create mode 100644 drivers/event/cnxk/cn9k_worker_deq_burst.c
 create mode 100644 drivers/event/cnxk/cn9k_worker_deq_tmo.c
 create mode 100644 drivers/event/cnxk/cn9k_worker_dual_deq.c
 create mode 100644 drivers/event/cnxk/cn9k_worker_dual_deq_burst.c
 create mode 100644 drivers/event/cnxk/cn9k_worker_dual_deq_tmo.c

diff --git a/drivers/event/cnxk/cn10k_eventdev.c 
b/drivers/event/cnxk/cn10k_eventdev.c
index 2060c8fe84..ba7d95fff7 100644
--- a/drivers/event/cnxk/cn10k_eventdev.c
+++ b/drivers/event/cnxk/cn10k_eventdev.c
@@ -237,17 +237,141 @@ static void
 cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)
 {
struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
+   const event_dequeue_t sso_hws_deq[2][2][2][2][2][2] = {
+#define R(name, f5, f4, f3, f2, f1, f0, flags) 
\
+   [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_##name,
+   NIX_RX_FASTPATH_MODES
+#undef R
+   };
+
+   const event_dequeue_burst_t sso_hws_deq_burst[2][2][2][2][2][2] = {
+#define R(name, f5, f4, f3, f2, f1, f0, flags) 
\
+   [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_burst_##name,
+   NIX_RX_FASTPATH_MODES
+#undef R
+   };
+
+   const event_dequeue_t sso_hws_tmo_deq[2][2][2][2][2][2] = {
+#define R(name, f5, f4, f3, f2, f1, f0, flags) 
\
+   [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_##name,
+   NIX_RX_FASTPATH_MODES
+#undef R
+   };
+
+   const event_dequeue_burst_t sso_hws_tmo_deq_burst[2][2][2][2][2][2] = {
+#define R(name, f5, f4, f3, f2, f1, f0, flags) 
\
+   [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_burst_##name,
+   NIX_RX_FASTPATH_MODES
+#undef R
+   };
+
+   const event_dequeue_t sso_hws_deq_seg[2][2][2][2][2][2] = {
+#define R(name, f5, f4, f3, f2, f1, f0, flags) 
\
+   [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_seg_##name,
+   NIX_RX_FASTPATH_MODES
+#undef R
+   };
+
+   const event_dequeue_burst_t sso_hws_deq_seg_burst[2][2][2][2][2][2] = {
+#define R(name, f5, f4, f3, f2, f1, f0, flags) 
\
+   [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_seg_burst_##name,
+   NIX_RX_FASTPATH_MODES
+#undef R
+   };
+
+   const event_dequeue_t sso_hws_tmo_deq_seg[2][2][2][2][2][2] = {
+#define R(name, f5, f4, f3, f2, f1, f0, flags) 
\
+   [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_seg_##name,
+   NIX_RX_FASTPATH_MODES
+#undef R
+   };
+
+   const event_dequeue_burst_t
+   sso_hws_tmo_deq_seg_burst[2][2][2][2][2][2] = {
+#define R(name, f5, f4, f3, f2, f1, f0, flags) 
\
+   [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_seg_burst_##name,
+   NIX_RX_FASTPATH_MODES
+#undef R
+   };
 
event_dev->enqueue = cn10k_sso_hws_enq;
event_dev->enqueue_burst = cn10k_sso_hws_enq_burst;
event_dev->enqueue_new_burst = cn10k_sso_hws_enq_new_burst;
event_dev->enqueue_forward_burst = cn10k_sso_hws_enq_fwd_burst;
-
-   event_dev->dequeue = cn10k_sso_hws_deq;
-   event_dev->dequeue_burst = cn10k_sso_hws_deq_burst;
-   if (dev->is_timeout_deq) {
-   event_dev->dequeue = cn10k_sso_hws_tmo_deq;
-   event_dev->dequeue_burst = cn10k_sso_hws_tmo_deq_burst;
+   if (dev->rx_offloads & NIX_RX_MULTI_SEG

[dpdk-dev] [PATCH v3 09/13] event/cnxk: add Tx adapter support

[pbhagavatula]

From: Pavan Nikhilesh 

Add support for event eth Tx adapter.

Signed-off-by: Pavan Nikhilesh 
---
 doc/guides/eventdevs/cnxk.rst|   4 +-
 doc/guides/rel_notes/release_21_08.rst   |   6 +-
 drivers/event/cnxk/cn10k_eventdev.c  |  91 ++
 drivers/event/cnxk/cn9k_eventdev.c   | 117 +++
 drivers/event/cnxk/cnxk_eventdev.h   |  21 +++-
 drivers/event/cnxk/cnxk_eventdev_adptr.c | 106 
 6 files changed, 339 insertions(+), 6 deletions(-)

diff --git a/doc/guides/eventdevs/cnxk.rst b/doc/guides/eventdevs/cnxk.rst
index b7e82c1273..6fdccc2ab4 100644
--- a/doc/guides/eventdevs/cnxk.rst
+++ b/doc/guides/eventdevs/cnxk.rst
@@ -42,7 +42,9 @@ Features of the OCTEON cnxk SSO PMD are:
 - HW managed packets enqueued from ethdev to eventdev exposed through event eth
   RX adapter.
 - N:1 ethernet device Rx queue to Event queue mapping.
-- Full Rx offload support defined through ethdev queue configuration.
+- Lockfree Tx from event eth Tx adapter using ``DEV_TX_OFFLOAD_MT_LOCKFREE``
+  capability while maintaining receive packet order.
+- Full Rx/Tx offload support defined through ethdev queue configuration.
 
 Prerequisites and Compilation procedure
 ---
diff --git a/doc/guides/rel_notes/release_21_08.rst 
b/doc/guides/rel_notes/release_21_08.rst
index 3892c8017a..80ff93269c 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -60,10 +60,10 @@ New Features
   * Added net/cnxk driver which provides the support for the integrated 
ethernet
 device.
 
-* **Added support for Marvell CN10K, CN9K, event Rx adapter.**
+* **Added support for Marvell CN10K, CN9K, event Rx/Tx adapter.**
 
-  * Added Rx adapter support for event/cnxk when the ethernet device requested 
is
-net/cnxk.
+  * Added Rx/Tx adapter support for event/cnxk when the ethernet device 
requested
+is net/cnxk.
 
 
 Removed Items
diff --git a/drivers/event/cnxk/cn10k_eventdev.c 
b/drivers/event/cnxk/cn10k_eventdev.c
index ba7d95fff7..8a9b04a3db 100644
--- a/drivers/event/cnxk/cn10k_eventdev.c
+++ b/drivers/event/cnxk/cn10k_eventdev.c
@@ -44,6 +44,7 @@ cn10k_sso_init_hws_mem(void *arg, uint8_t port_id)
/* First cache line is reserved for cookie */
ws = (struct cn10k_sso_hws *)((uint8_t *)ws + RTE_CACHE_LINE_SIZE);
ws->base = roc_sso_hws_base_get(&dev->sso, port_id);
+   ws->tx_base = ws->base;
ws->hws_id = port_id;
ws->swtag_req = 0;
ws->gw_wdata = cn10k_sso_gw_mode_wdata(dev);
@@ -233,6 +234,39 @@ cn10k_sso_rsrc_init(void *arg, uint8_t hws, uint8_t hwgrp)
return roc_sso_rsrc_init(&dev->sso, hws, hwgrp);
 }
 
+static int
+cn10k_sso_updt_tx_adptr_data(const struct rte_eventdev *event_dev)
+{
+   struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
+   int i;
+
+   if (dev->tx_adptr_data == NULL)
+   return 0;
+
+   for (i = 0; i < dev->nb_event_ports; i++) {
+   struct cn10k_sso_hws *ws = event_dev->data->ports[i];
+   void *ws_cookie;
+
+   ws_cookie = cnxk_sso_hws_get_cookie(ws);
+   ws_cookie = rte_realloc_socket(
+   ws_cookie,
+   sizeof(struct cnxk_sso_hws_cookie) +
+   sizeof(struct cn10k_sso_hws) +
+   (sizeof(uint64_t) * (dev->max_port_id + 1) *
+RTE_MAX_QUEUES_PER_PORT),
+   RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
+   if (ws_cookie == NULL)
+   return -ENOMEM;
+   ws = RTE_PTR_ADD(ws_cookie, sizeof(struct cnxk_sso_hws_cookie));
+   memcpy(&ws->tx_adptr_data, dev->tx_adptr_data,
+  sizeof(uint64_t) * (dev->max_port_id + 1) *
+  RTE_MAX_QUEUES_PER_PORT);
+   event_dev->data->ports[i] = ws;
+   }
+
+   return 0;
+}
+
 static void
 cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)
 {
@@ -493,6 +527,10 @@ cn10k_sso_start(struct rte_eventdev *event_dev)
 {
int rc;
 
+   rc = cn10k_sso_updt_tx_adptr_data(event_dev);
+   if (rc < 0)
+   return rc;
+
rc = cnxk_sso_start(event_dev, cn10k_sso_hws_reset,
cn10k_sso_hws_flush_events);
if (rc < 0)
@@ -595,6 +633,55 @@ cn10k_sso_rx_adapter_queue_del(const struct rte_eventdev 
*event_dev,
return cnxk_sso_rx_adapter_queue_del(event_dev, eth_dev, rx_queue_id);
 }
 
+static int
+cn10k_sso_tx_adapter_caps_get(const struct rte_eventdev *dev,
+ const struct rte_eth_dev *eth_dev, uint32_t *caps)
+{
+   int ret;
+
+   RTE_SET_USED(dev);
+   ret = strncmp(eth_dev->device->driver->name, "net_cn10k", 8);
+   if (ret)
+   *caps = 0;
+   else
+   *caps = RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT;
+
+   retur

[dpdk-dev] [PATCH v3 10/13] event/cnxk: add Tx adapter fastpath ops

[pbhagavatula]

From: Pavan Nikhilesh 

Add support for event eth Tx adapter fastpath operations.

Signed-off-by: Pavan Nikhilesh 
---
 drivers/event/cnxk/cn10k_eventdev.c   | 38 
 drivers/event/cnxk/cn10k_worker.h | 67 ++
 drivers/event/cnxk/cn10k_worker_tx_enq.c  | 23 +
 drivers/event/cnxk/cn10k_worker_tx_enq_seg.c  | 23 +
 drivers/event/cnxk/cn9k_eventdev.c| 81 +
 drivers/event/cnxk/cn9k_worker.h  | 87 +++
 drivers/event/cnxk/cn9k_worker_dual_tx_enq.c  | 23 +
 .../event/cnxk/cn9k_worker_dual_tx_enq_seg.c  | 23 +
 drivers/event/cnxk/cn9k_worker_tx_enq.c   | 23 +
 drivers/event/cnxk/cn9k_worker_tx_enq_seg.c   | 23 +
 drivers/event/cnxk/meson.build|  6 ++
 11 files changed, 417 insertions(+)
 create mode 100644 drivers/event/cnxk/cn10k_worker_tx_enq.c
 create mode 100644 drivers/event/cnxk/cn10k_worker_tx_enq_seg.c
 create mode 100644 drivers/event/cnxk/cn9k_worker_dual_tx_enq.c
 create mode 100644 drivers/event/cnxk/cn9k_worker_dual_tx_enq_seg.c
 create mode 100644 drivers/event/cnxk/cn9k_worker_tx_enq.c
 create mode 100644 drivers/event/cnxk/cn9k_worker_tx_enq_seg.c

diff --git a/drivers/event/cnxk/cn10k_eventdev.c 
b/drivers/event/cnxk/cn10k_eventdev.c
index 8a9b04a3db..e462f770c5 100644
--- a/drivers/event/cnxk/cn10k_eventdev.c
+++ b/drivers/event/cnxk/cn10k_eventdev.c
@@ -328,6 +328,23 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)
 #undef R
};
 
+   /* Tx modes */
+   const event_tx_adapter_enqueue
+   sso_hws_tx_adptr_enq[2][2][2][2][2][2] = {
+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags) 
\
+   [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_tx_adptr_enq_##name,
+   NIX_TX_FASTPATH_MODES
+#undef T
+   };
+
+   const event_tx_adapter_enqueue
+   sso_hws_tx_adptr_enq_seg[2][2][2][2][2][2] = {
+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags) 
\
+   [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_tx_adptr_enq_seg_##name,
+   NIX_TX_FASTPATH_MODES
+#undef T
+   };
+
event_dev->enqueue = cn10k_sso_hws_enq;
event_dev->enqueue_burst = cn10k_sso_hws_enq_burst;
event_dev->enqueue_new_burst = cn10k_sso_hws_enq_new_burst;
@@ -407,6 +424,27 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
}
}
+
+   if (dev->tx_offloads & NIX_TX_MULTI_SEG_F) {
+   /* [SEC] [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */
+   event_dev->txa_enqueue = sso_hws_tx_adptr_enq_seg
+   [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]
+   [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]
+   [!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]
+   [!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]
+   [!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]
+   [!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)];
+   } else {
+   event_dev->txa_enqueue = sso_hws_tx_adptr_enq
+   [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]
+   [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]
+   [!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]
+   [!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]
+   [!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]
+   [!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)];
+   }
+
+   event_dev->txa_enqueue_same_dest = event_dev->txa_enqueue;
 }
 
 static void
diff --git a/drivers/event/cnxk/cn10k_worker.h 
b/drivers/event/cnxk/cn10k_worker.h
index b724083caa..3c90c85009 100644
--- a/drivers/event/cnxk/cn10k_worker.h
+++ b/drivers/event/cnxk/cn10k_worker.h
@@ -11,6 +11,7 @@
 
 #include "cn10k_ethdev.h"
 #include "cn10k_rx.h"
+#include "cn10k_tx.h"
 
 /* SSO Operations */
 
@@ -251,4 +252,70 @@ uint16_t __rte_hot cn10k_sso_hws_enq_fwd_burst(void *port,
 NIX_RX_FASTPATH_MODES
 #undef R
 
+static __rte_always_inline const struct cn10k_eth_txq *
+cn10k_sso_hws_xtract_meta(struct rte_mbuf *m,
+ const uint64_t txq_data[][RTE_MAX_QUEUES_PER_PORT])
+{
+   return (const struct cn10k_eth_txq *)
+   txq_data[m->port][rte_event_eth_tx_adapter_txq_get(m)];
+}
+
+static __rte_always_inline uint16_t
+cn10k_sso_hws_event_tx(struct cn10k_sso_hws *ws, struct rte_event *ev,
+  uint64_t *cmd,
+  const uint64_t txq_data[][RTE_MAX_QUEUES_PER_PORT],
+  const uint32_t flags)
+{
+   const struct cn10k_eth_txq *txq;
+   struct rte_mbuf *m = ev->mbuf;
+   uint16_t ref_cnt = m->refcnt;
+   uintptr_

[dpdk-dev] [PATCH v3 12/13] event/cnxk: add Rx event vector fastpath

[pbhagavatula]

From: Pavan Nikhilesh 

Add Rx event vector fastpath to convert HW defined metadata into
rte_mbuf and rte_event_vector.

Signed-off-by: Pavan Nikhilesh 
---
 doc/guides/rel_notes/release_21_08.rst |   1 +
 drivers/event/cnxk/cn10k_worker.h  |  56 +++
 drivers/net/cnxk/cn10k_rx.h| 200 +++--
 drivers/net/cnxk/cn10k_rx_vec.c|   2 +-
 drivers/net/cnxk/cn10k_rx_vec_mseg.c   |   5 +-
 5 files changed, 179 insertions(+), 85 deletions(-)

diff --git a/doc/guides/rel_notes/release_21_08.rst 
b/doc/guides/rel_notes/release_21_08.rst
index 80ff93269c..11ccc9bcb5 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -64,6 +64,7 @@ New Features
 
   * Added Rx/Tx adapter support for event/cnxk when the ethernet device 
requested
 is net/cnxk.
+  * Add support for event vectorization for Rx adapter.
 
 
 Removed Items
diff --git a/drivers/event/cnxk/cn10k_worker.h 
b/drivers/event/cnxk/cn10k_worker.h
index 3c90c85009..7a48a6b17d 100644
--- a/drivers/event/cnxk/cn10k_worker.h
+++ b/drivers/event/cnxk/cn10k_worker.h
@@ -5,6 +5,8 @@
 #ifndef __CN10K_WORKER_H__
 #define __CN10K_WORKER_H__
 
+#include 
+
 #include "cnxk_ethdev.h"
 #include "cnxk_eventdev.h"
 #include "cnxk_worker.h"
@@ -101,6 +103,49 @@ cn10k_wqe_to_mbuf(uint64_t wqe, const uint64_t mbuf, 
uint8_t port_id,
  mbuf_init | ((uint64_t)port_id) << 48, flags);
 }
 
+static __rte_always_inline void
+cn10k_process_vwqe(uintptr_t vwqe, uint16_t port_id, const uint32_t flags,
+  void *lookup_mem, void *tstamp)
+{
+   uint64_t mbuf_init = 0x10001ULL | RTE_PKTMBUF_HEADROOM |
+(flags & NIX_RX_OFFLOAD_TSTAMP_F ? 8 : 0);
+   struct rte_event_vector *vec;
+   uint16_t nb_mbufs, non_vec;
+   uint64_t **wqe;
+
+   mbuf_init |= ((uint64_t)port_id) << 48;
+   vec = (struct rte_event_vector *)vwqe;
+   wqe = vec->u64s;
+
+   nb_mbufs = RTE_ALIGN_FLOOR(vec->nb_elem, NIX_DESCS_PER_LOOP);
+   nb_mbufs = cn10k_nix_recv_pkts_vector(&mbuf_init, vec->mbufs, nb_mbufs,
+ flags | NIX_RX_VWQE_F, lookup_mem,
+ tstamp);
+   wqe += nb_mbufs;
+   non_vec = vec->nb_elem - nb_mbufs;
+
+   while (non_vec) {
+   struct nix_cqe_hdr_s *cqe = (struct nix_cqe_hdr_s *)wqe[0];
+   struct rte_mbuf *mbuf;
+   uint64_t tstamp_ptr;
+
+   mbuf = (struct rte_mbuf *)((char *)cqe -
+  sizeof(struct rte_mbuf));
+   cn10k_nix_cqe_to_mbuf(cqe, cqe->tag, mbuf, lookup_mem,
+ mbuf_init, flags);
+   /* Extracting tstamp, if PTP enabled*/
+   tstamp_ptr = *(uint64_t *)(((struct nix_wqe_hdr_s *)cqe) +
+  CNXK_SSO_WQE_SG_PTR);
+   cnxk_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, tstamp,
+   flags & NIX_RX_OFFLOAD_TSTAMP_F,
+   flags & NIX_RX_MULTI_SEG_F,
+   (uint64_t *)tstamp_ptr);
+   wqe[0] = (uint64_t *)mbuf;
+   non_vec--;
+   wqe++;
+   }
+}
+
 static __rte_always_inline uint16_t
 cn10k_sso_hws_get_work(struct cn10k_sso_hws *ws, struct rte_event *ev,
   const uint32_t flags, void *lookup_mem)
@@ -152,6 +197,17 @@ cn10k_sso_hws_get_work(struct cn10k_sso_hws *ws, struct 
rte_event *ev,
flags & NIX_RX_MULTI_SEG_F,
(uint64_t *)tstamp_ptr);
gw.u64[1] = mbuf;
+   } else if (CNXK_EVENT_TYPE_FROM_TAG(gw.u64[0]) ==
+  RTE_EVENT_TYPE_ETHDEV_VECTOR) {
+   uint8_t port = CNXK_SUB_EVENT_FROM_TAG(gw.u64[0]);
+   __uint128_t vwqe_hdr = *(__uint128_t *)gw.u64[1];
+
+   vwqe_hdr = ((vwqe_hdr >> 64) & 0xFFF) | BIT_ULL(31) |
+  ((vwqe_hdr & 0x) << 48) |
+  ((uint64_t)port << 32);
+   *(uint64_t *)gw.u64[1] = (uint64_t)vwqe_hdr;
+   cn10k_process_vwqe(gw.u64[1], port, flags, lookup_mem,
+  ws->tstamp);
}
}
 
diff --git a/drivers/net/cnxk/cn10k_rx.h b/drivers/net/cnxk/cn10k_rx.h
index d9572b19e7..a506a867ca 100644
--- a/drivers/net/cnxk/cn10k_rx.h
+++ b/drivers/net/cnxk/cn10k_rx.h
@@ -21,6 +21,7 @@
  * Defining it from backwards to denote its been
  * not used as offload flags to pick function
  */
+#define NIX_RX_VWQE_F BIT(14)
 #define NIX_RX_MULTI_SEG_F BIT(15)
 
 #define CNXK_NIX_CQ_ENTRY_SZ 128
@@ -28,6 +29,11 @@
 #define CQE_CAST(x) ((struct nix_cqe_hdr_s *)(x)

[dpdk-dev] [PATCH v3 13/13] event/cnxk: add Tx event vector fastpath

[pbhagavatula]

From: Pavan Nikhilesh 

Add Tx event vector fastpath, integrate event vector Tx routine
into Tx burst.

Signed-off-by: Pavan Nikhilesh 
---
 doc/guides/eventdevs/cnxk.rst  |   1 +
 doc/guides/rel_notes/release_21_08.rst |   2 +-
 drivers/common/cnxk/roc_sso.h  |  23 ++
 drivers/event/cnxk/cn10k_eventdev.c|   3 +-
 drivers/event/cnxk/cn10k_worker.h  | 104 +++--
 drivers/event/cnxk/cn9k_worker.h   |   4 +-
 drivers/event/cnxk/cnxk_worker.h   |  22 --
 drivers/net/cnxk/cn10k_tx.c|   2 +-
 drivers/net/cnxk/cn10k_tx.h|  52 +
 drivers/net/cnxk/cn10k_tx_mseg.c   |   3 +-
 drivers/net/cnxk/cn10k_tx_vec.c|   2 +-
 drivers/net/cnxk/cn10k_tx_vec_mseg.c   |   2 +-
 12 files changed, 167 insertions(+), 53 deletions(-)

diff --git a/doc/guides/eventdevs/cnxk.rst b/doc/guides/eventdevs/cnxk.rst
index 0297cd3d5f..53560d3830 100644
--- a/doc/guides/eventdevs/cnxk.rst
+++ b/doc/guides/eventdevs/cnxk.rst
@@ -47,6 +47,7 @@ Features of the OCTEON cnxk SSO PMD are:
 - Full Rx/Tx offload support defined through ethdev queue configuration.
 - HW managed event vectorization on CN10K for packets enqueued from ethdev to
   eventdev configurable per each Rx queue in Rx adapter.
+- Event vector transmission via Tx adapter.
 
 Prerequisites and Compilation procedure
 ---
diff --git a/doc/guides/rel_notes/release_21_08.rst 
b/doc/guides/rel_notes/release_21_08.rst
index 11ccc9bcb5..9e49cb27d7 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -64,7 +64,7 @@ New Features
 
   * Added Rx/Tx adapter support for event/cnxk when the ethernet device 
requested
 is net/cnxk.
-  * Add support for event vectorization for Rx adapter.
+  * Add support for event vectorization for Rx/Tx adapter.
 
 
 Removed Items
diff --git a/drivers/common/cnxk/roc_sso.h b/drivers/common/cnxk/roc_sso.h
index a6030e7d8a..316c6ccd59 100644
--- a/drivers/common/cnxk/roc_sso.h
+++ b/drivers/common/cnxk/roc_sso.h
@@ -44,6 +44,29 @@ struct roc_sso {
uint8_t reserved[ROC_SSO_MEM_SZ] __plt_cache_aligned;
 } __plt_cache_aligned;
 
+static __rte_always_inline void
+roc_sso_hws_head_wait(uintptr_t tag_op)
+{
+#ifdef RTE_ARCH_ARM64
+   uint64_t tag;
+
+   asm volatile(PLT_CPU_FEATURE_PREAMBLE
+"  ldr %[tag], [%[tag_op]] \n"
+"  tbnz %[tag], 35, done%= \n"
+"  sevl\n"
+"rty%=:wfe \n"
+"  ldr %[tag], [%[tag_op]] \n"
+"  tbz %[tag], 35, rty%=   \n"
+"done%=:   \n"
+: [tag] "=&r"(tag)
+: [tag_op] "r"(tag_op));
+#else
+   /* Wait for the SWTAG/SWTAG_FULL operation */
+   while (!(plt_read64(tag_op) & BIT_ULL(35)))
+   ;
+#endif
+}
+
 /* SSO device initialization */
 int __roc_api roc_sso_dev_init(struct roc_sso *roc_sso);
 int __roc_api roc_sso_dev_fini(struct roc_sso *roc_sso);
diff --git a/drivers/event/cnxk/cn10k_eventdev.c 
b/drivers/event/cnxk/cn10k_eventdev.c
index e85fa4785d..6f37c5bd23 100644
--- a/drivers/event/cnxk/cn10k_eventdev.c
+++ b/drivers/event/cnxk/cn10k_eventdev.c
@@ -782,7 +782,8 @@ cn10k_sso_tx_adapter_caps_get(const struct rte_eventdev 
*dev,
if (ret)
*caps = 0;
else
-   *caps = RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT;
+   *caps = RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT |
+   RTE_EVENT_ETH_TX_ADAPTER_CAP_EVENT_VECTOR;
 
return 0;
 }
diff --git a/drivers/event/cnxk/cn10k_worker.h 
b/drivers/event/cnxk/cn10k_worker.h
index 7a48a6b17d..9cc0992063 100644
--- a/drivers/event/cnxk/cn10k_worker.h
+++ b/drivers/event/cnxk/cn10k_worker.h
@@ -308,29 +308,120 @@ uint16_t __rte_hot cn10k_sso_hws_enq_fwd_burst(void 
*port,
 NIX_RX_FASTPATH_MODES
 #undef R
 
-static __rte_always_inline const struct cn10k_eth_txq *
+static __rte_always_inline struct cn10k_eth_txq *
 cn10k_sso_hws_xtract_meta(struct rte_mbuf *m,
  const uint64_t txq_data[][RTE_MAX_QUEUES_PER_PORT])
 {
-   return (const struct cn10k_eth_txq *)
+   return (struct cn10k_eth_txq *)
txq_data[m->port][rte_event_eth_tx_adapter_txq_get(m)];
 }
 
+static __rte_always_inline void
+cn10k_sso_vwqe_split_tx(struct rte_mbuf **mbufs, uint16_t nb_mbufs,
+   uint64_t *cmd, uint16_t lmt_id, uintptr_t lmt_addr,
+   uint8_t sched_type, uintptr_t base,
+   const uint64_t txq_data[][RTE_MAX_QUEUES_PER_PORT],
+   const uint32_t flags)
+{
+   uint16_t port[4], queue[4];
+   struct cn10k_eth_txq *txq;
+   uint16_t i, j;
+   uintptr_t pa;
+
+   for (

[dpdk-dev] [PATCH v3 11/13] event/cnxk: add Rx adapter vector support

[pbhagavatula]

From: Pavan Nikhilesh 

Add event vector support for cnxk event Rx adapter, add control path
APIs to get vector limits and ability to configure event vectorization
on a given Rx queue.

Signed-off-by: Pavan Nikhilesh 
---
 doc/guides/eventdevs/cnxk.rst|   2 +
 drivers/event/cnxk/cn10k_eventdev.c  | 106 ++-
 drivers/event/cnxk/cnxk_eventdev.h   |   2 +
 drivers/event/cnxk/cnxk_eventdev_adptr.c |  25 ++
 drivers/net/cnxk/cnxk_ethdev.h   |   2 +-
 5 files changed, 135 insertions(+), 2 deletions(-)

diff --git a/doc/guides/eventdevs/cnxk.rst b/doc/guides/eventdevs/cnxk.rst
index 6fdccc2ab4..0297cd3d5f 100644
--- a/doc/guides/eventdevs/cnxk.rst
+++ b/doc/guides/eventdevs/cnxk.rst
@@ -45,6 +45,8 @@ Features of the OCTEON cnxk SSO PMD are:
 - Lockfree Tx from event eth Tx adapter using ``DEV_TX_OFFLOAD_MT_LOCKFREE``
   capability while maintaining receive packet order.
 - Full Rx/Tx offload support defined through ethdev queue configuration.
+- HW managed event vectorization on CN10K for packets enqueued from ethdev to
+  eventdev configurable per each Rx queue in Rx adapter.
 
 Prerequisites and Compilation procedure
 ---
diff --git a/drivers/event/cnxk/cn10k_eventdev.c 
b/drivers/event/cnxk/cn10k_eventdev.c
index e462f770c5..e85fa4785d 100644
--- a/drivers/event/cnxk/cn10k_eventdev.c
+++ b/drivers/event/cnxk/cn10k_eventdev.c
@@ -610,7 +610,8 @@ cn10k_sso_rx_adapter_caps_get(const struct rte_eventdev 
*event_dev,
else
*caps = RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT |
RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ |
-   RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID;
+   RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID |
+   RTE_EVENT_ETH_RX_ADAPTER_CAP_EVENT_VECTOR;
 
return 0;
 }
@@ -671,6 +672,105 @@ cn10k_sso_rx_adapter_queue_del(const struct rte_eventdev 
*event_dev,
return cnxk_sso_rx_adapter_queue_del(event_dev, eth_dev, rx_queue_id);
 }
 
+static int
+cn10k_sso_rx_adapter_vector_limits(
+   const struct rte_eventdev *dev, const struct rte_eth_dev *eth_dev,
+   struct rte_event_eth_rx_adapter_vector_limits *limits)
+{
+   struct cnxk_eth_dev *cnxk_eth_dev;
+   int ret;
+
+   RTE_SET_USED(dev);
+   ret = strncmp(eth_dev->device->driver->name, "net_cn10k", 8);
+   if (ret)
+   return -ENOTSUP;
+
+   cnxk_eth_dev = cnxk_eth_pmd_priv(eth_dev);
+   limits->log2_sz = true;
+   limits->min_sz = 1 << ROC_NIX_VWQE_MIN_SIZE_LOG2;
+   limits->max_sz = 1 << ROC_NIX_VWQE_MAX_SIZE_LOG2;
+   limits->min_timeout_ns =
+   (roc_nix_get_vwqe_interval(&cnxk_eth_dev->nix) + 1) * 100;
+   limits->max_timeout_ns = BITMASK_ULL(8, 0) * limits->min_timeout_ns;
+
+   return 0;
+}
+
+static int
+cnxk_sso_rx_adapter_vwqe_enable(struct cnxk_eth_dev *cnxk_eth_dev,
+   uint16_t port_id, uint16_t rq_id, uint16_t sz,
+   uint64_t tmo_ns, struct rte_mempool *vmp)
+{
+   struct roc_nix_rq *rq;
+
+   rq = &cnxk_eth_dev->rqs[rq_id];
+
+   if (!rq->sso_ena)
+   return -EINVAL;
+   if (rq->flow_tag_width == 0)
+   return -EINVAL;
+
+   rq->vwqe_ena = 1;
+   rq->vwqe_first_skip = 0;
+   rq->vwqe_aura_handle = roc_npa_aura_handle_to_aura(vmp->pool_id);
+   rq->vwqe_max_sz_exp = rte_log2_u32(sz);
+   rq->vwqe_wait_tmo =
+   tmo_ns /
+   ((roc_nix_get_vwqe_interval(&cnxk_eth_dev->nix) + 1) * 100);
+   rq->tag_mask = (port_id & 0xF) << 20;
+   rq->tag_mask |=
+   (((port_id >> 4) & 0xF) | (RTE_EVENT_TYPE_ETHDEV_VECTOR << 4))
+   << 24;
+
+   return roc_nix_rq_modify(&cnxk_eth_dev->nix, rq, 0);
+}
+
+static int
+cn10k_sso_rx_adapter_vector_config(
+   const struct rte_eventdev *event_dev, const struct rte_eth_dev *eth_dev,
+   int32_t rx_queue_id,
+   const struct rte_event_eth_rx_adapter_event_vector_config *config)
+{
+   struct cnxk_eth_dev *cnxk_eth_dev;
+   struct cnxk_sso_evdev *dev;
+   int i, rc;
+
+   rc = strncmp(eth_dev->device->driver->name, "net_cn10k", 8);
+   if (rc)
+   return -EINVAL;
+
+   dev = cnxk_sso_pmd_priv(event_dev);
+   cnxk_eth_dev = cnxk_eth_pmd_priv(eth_dev);
+   if (rx_queue_id < 0) {
+   for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
+   cnxk_sso_updt_xae_cnt(dev, config->vector_mp,
+ RTE_EVENT_TYPE_ETHDEV_VECTOR);
+   rc = cnxk_sso_xae_reconfigure(
+   (struct rte_eventdev *)(uintptr_t)event_dev);
+   rc = cnxk_sso_rx_adapter_vwqe_enable(
+   cnxk_eth_dev, eth_dev->data->port_id, i,
+   config->vector_sz, conf

Re: [dpdk-dev] [PATCH v13 02/10] eal/windows: add necessary macros

[Dmitry Kozlyuk]

2021-05-05 12:12 (UTC-0700), Jie Zhou:
> Add required macros by testpmd on Windows in rte_os_shim.h
> 
> Signed-off-by: Jie Zhou 
> Signed-off-by: Jie Zhou 
> Acked-by: Tal Shnaiderman 
> ---
>  lib/eal/windows/include/rte_os_shim.h | 9 +
>  1 file changed, 9 insertions(+)
> 
> diff --git a/lib/eal/windows/include/rte_os_shim.h 
> b/lib/eal/windows/include/rte_os_shim.h
> index 1b314733b..3763cae62 100644
> --- a/lib/eal/windows/include/rte_os_shim.h
> +++ b/lib/eal/windows/include/rte_os_shim.h
> @@ -21,6 +21,7 @@
>  #define strdup(str) _strdup(str)
>  #define strtok_r(str, delim, saveptr) strtok_s(str, delim, saveptr)
>  #ifndef RTE_TOOLCHAIN_GCC
> +#define strcasecmp _stricmp
>  #define strncasecmp(s1, s2, count) _strnicmp(s1, s2, count)
>  #endif

Please use macros with arguments, like in the next line.
This provides better error messages at call site
and IDE display a nice hint knowing the parameters.

>  
> @@ -38,6 +39,14 @@
>  #define IPPROTO_SCTP 132
>  #endif
>  
> +#ifndef IPDEFTTL
> +#define IPDEFTTL 64
> +#endif
> +
> +#ifndef S_ISREG
> +#define S_ISREG(mode)  (((mode)&S_IFMT) == S_IFREG)
> +#endif
> +

Missing spaces around `&`.

>  #ifdef RTE_TOOLCHAIN_GCC
>  
>  #define TIME_UTC 1

Re: [dpdk-dev] [PATCH v13 03/10] eal/windows: add device event stubs

[Dmitry Kozlyuk]

2021-05-05 12:12 (UTC-0700), Jie Zhou:
> Add device event stubs in eal_dev.c for Windows
> 
> Signed-off-by: Jie Zhou 
> Signed-off-by: Jie Zhou 
> Acked-by: Tal Shnaiderman 

Acked-by: Dmitry Kozlyuk 

Re: [dpdk-dev] [PATCH v13 04/10] eal/Windows: add clock_gettime on Windows

[Dmitry Kozlyuk]

2021-05-05 12:12 (UTC-0700), Jie Zhou:
> Add clock_gettime on Windows in rte_os_shim.h
> 
> Signed-off-by: Jie Zhou 
> Signed-off-by: Jie Zhou 
> ---
>  lib/eal/windows/include/rte_os_shim.h | 38 +++
>  1 file changed, 38 insertions(+)
> 
> diff --git a/lib/eal/windows/include/rte_os_shim.h 
> b/lib/eal/windows/include/rte_os_shim.h
> index 3763cae62..cd1f53dfa 100644
> --- a/lib/eal/windows/include/rte_os_shim.h
> +++ b/lib/eal/windows/include/rte_os_shim.h
> @@ -77,4 +77,42 @@ rte_timespec_get(struct timespec *now, int base)
>  
>  #endif /* RTE_TOOLCHAIN_GCC */
>  
> +/* Identifier for system-wide realtime clock. */
> +#define CLOCK_REALTIME  0
> +/* Monotonic system-wide clock. */
> +#define CLOCK_MONOTONIC 1
> +/* High-resolution timer from the CPU. */
> +#define CLOCK_PROCESS_CPUTIME_ID2
> +/* Thread-specific CPU-time clock. */
> +#define CLOCK_THREAD_CPUTIME_ID 3

Are the last two constants needed?

> +
> +#define NS_PER_SEC 1E9

NS_PER_SEC isn't provided by any interface that we shim,
but it can be defined by applications (like testpmd does),
so it's better to make this constant private to rte_clock_gettime().

IMO, we should provide such constants with RTE_ prefix someday.
rte_time.h provides NSEC_PER_SEC without RTE_ prefix already.

> +
> +typedef int clockid_t;
> +
> +static inline int
> +rte_clock_gettime(clockid_t clock_id, struct timespec *tp)
> +{
> + LARGE_INTEGER pf, pc;
> + LONGLONG nsec;
> + switch (clock_id) {
> + case CLOCK_REALTIME:
> + if (timespec_get(tp, TIME_UTC) != TIME_UTC)
> + return -1;
> + return 0;
> + case CLOCK_MONOTONIC:
> + if (QueryPerformanceFrequency(&pf) == 0)
> + return -1;
> + if (QueryPerformanceCounter(&pc) == 0)
> + return -1;

These calls never fail on any supported Windows version.

> + nsec = pc.QuadPart * NS_PER_SEC / pf.QuadPart;
> + tp->tv_sec = nsec / NS_PER_SEC;
> + tp->tv_nsec = nsec - tp->tv_sec * NS_PER_SEC;
> + return 0;
> + default:
> + return -1;

By clock_getttime() contract, errno must be set to ENOTSUP here.

> + }
> +}
> +#define clock_gettime(clock_id, tp) rte_clock_gettime(clock_id, tp)
> +
>  #endif /* _RTE_OS_SHIM_ */

Re: [dpdk-dev] [PATCH v13 05/10] app/testpmd: resolve name collisions

[Dmitry Kozlyuk]

2021-05-05 12:12 (UTC-0700), Jie Zhou:
> Resolve name collisions with Windows types
> 
> Signed-off-by: Jie Zhou 
> Signed-off-by: Jie Zhou 
> Acked-by: Tal Shnaiderman 

Acked-by: Dmitry Kozlyuk 

Re: [dpdk-dev] [PATCH v13 08/10] app/testpmd: fix headers inclusion

[Dmitry Kozlyuk]

2021-05-05 12:12 (UTC-0700), Jie Zhou:
> - Include rte_os_shim.h in testpmd.h
> - Remove redundant headers
> 
> Signed-off-by: Jie Zhou 
> Signed-off-by: Jie Zhou 
> Acked-by: Tal Shnaiderman 

It would be logical to merge this patch with the previous one.

Re: [dpdk-dev] [PATCH v13 09/10] app/testpmd: fix unused function warnings

[Dmitry Kozlyuk]

2021-05-05 12:12 (UTC-0700), Jie Zhou:
> Function print_fdir_mask and print_fdir_flex_payload is only called
> when either i40e or ixgbe presents. Add #if defined to remove
> "unused function" compilation warning.
> 
> Signed-off-by: Jie Zhou 
> Signed-off-by: Jie Zhou 
> Acked-by: Tal Shnaiderman 
> ---
>  app/test-pmd/config.c | 82 +--
>  1 file changed, 41 insertions(+), 41 deletions(-)

Code inside #ifdef isn't compile-checked, it's better to avoid.
The only case we can't is when i40e or ixgbe API is called directly.
I'd rather remove #ifdef whenever possible and mark maybe-unused entities,
like this:

diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index 3723317ab4..97a577fec0 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -4488,8 +4488,6 @@ flowtype_to_str(uint16_t flow_type)
return NULL;
 }
 
-#if defined(RTE_NET_I40E) || defined(RTE_NET_IXGBE)
-
 static inline void
 print_fdir_mask(struct rte_eth_fdir_masks *mask)
 {
@@ -4590,6 +4588,9 @@ get_fdir_info(portid_t port_id, struct rte_eth_fdir_info 
*fdir_info,
 {
int ret = -ENOTSUP;
 
+   RTE_SET_USED(fdir_info);
+   RTE_SET_USED(fdir_stat);
+
 #ifdef RTE_NET_I40E
if (ret == -ENOTSUP) {
ret = rte_pmd_i40e_get_fdir_info(port_id, fdir_info);
@@ -4686,8 +4687,6 @@ fdir_get_infos(portid_t port_id)
   fdir_stats_border, fdir_stats_border);
 }
 
-#endif /* RTE_NET_I40E || RTE_NET_IXGBE */
-
 void
 fdir_set_flex_mask(portid_t port_id, struct rte_eth_fdir_flex_mask *cfg)
 {
diff --git a/app/test-pmd/testpmd.h b/app/test-pmd/testpmd.h
index d61a055bdd..a40ee902e8 100644
--- a/app/test-pmd/testpmd.h
+++ b/app/test-pmd/testpmd.h
@@ -917,9 +917,7 @@ int all_ports_stopped(void);
 int port_is_stopped(portid_t port_id);
 int port_is_started(portid_t port_id);
 void pmd_test_exit(void);
-#if defined(RTE_NET_I40E) || defined(RTE_NET_IXGBE)
 void fdir_get_infos(portid_t port_id);
-#endif
 void fdir_set_flex_mask(portid_t port_id,
   struct rte_eth_fdir_flex_mask *cfg);
 void fdir_set_flex_payload(portid_t port_id,

Re: [dpdk-dev] [PATCH v13 10/10] app/testpmd: enable building testpmd on Windows

[Dmitry Kozlyuk]

2021-05-05 12:12 (UTC-0700), Jie Zhou:
> From: Jie Zhou 
> 
> - Disable unsupported Apps on Windows
> - Enable building of testpmd on Windows
> 
> Signed-off-by: Jie Zhou 
> Signed-off-by: Jie Zhou 
> Acked-by: Tal Shnaiderman 

Acked-by: Dmitry Kozlyuk 

Re: [dpdk-dev] [PATCH v2 1/6] eal: add function that sets thread name

[Dmitry Kozlyuk]

2021-06-18 18:57 (UTC-0700), Narcisa Ana Maria Vasile:
> From: Narcisa Vasile 
> 
> Implement function that sets the name of a thread.
> On Windows, SetThreadDescription() is used. Use GetProcAddress()
> to obtain the address of the function for MinGW compatibility.
> 
> Depends-on: series-17402 ("eal: Add EAL API for threading")
> 
> Signed-off-by: Narcisa Vasile 
> ---
>  lib/eal/common/rte_thread.c  | 17 ++
>  lib/eal/include/rte_thread.h | 18 +++
>  lib/eal/version.map  |  1 +
>  lib/eal/windows/rte_thread.c | 60 
>  4 files changed, 96 insertions(+)
[...]
> diff --git a/lib/eal/include/rte_thread.h b/lib/eal/include/rte_thread.h
> index 40da83467b..c65cfd8c9e 100644
> --- a/lib/eal/include/rte_thread.h
> +++ b/lib/eal/include/rte_thread.h
> @@ -24,6 +24,8 @@ extern "C" {
>  
>  #include 
>  
> +#define RTE_THREAD_MAX_DESCRIPTION_LENGTH   16
> +

Why export this constant?

>  /**
>   * Thread id descriptor.
>   */
> @@ -439,6 +441,22 @@ int rte_thread_barrier_wait(rte_thread_barrier *barrier);
>  __rte_experimental
>  int rte_thread_barrier_destroy(rte_thread_barrier *barrier);
>  
> +/**
> + * Set the name of the thread represented by 'thread_id'.
> + *
> + * @param thread_id
> + *   The id of the thread.
> + *
> + * @param name
> + *   Thread name to set.
> + *
> + * @return
> + *   On success, return 0.
> + *On failure, return a positive errno-style error number.

Typo: extra space.

> + */
> +__rte_experimental
> +int rte_thread_name_set(rte_thread_t thread_id, const char *name);
> +

There is `rte_thread_setname(pthread_t id, const char * name, size_t len)`.
I assume it should be deprecated in favor of this new API
via a notice in `deprecation.rst`.

>  /**
>   * Create a TLS data key visible to all threads in the process.
>   * the created key is later used to get/set a value.
> diff --git a/lib/eal/version.map b/lib/eal/version.map
> index 6645f60a78..2a566c04af 100644
> --- a/lib/eal/version.map
> +++ b/lib/eal/version.map
> @@ -443,6 +443,7 @@ EXPERIMENTAL {
>   rte_thread_barrier_init;
>   rte_thread_barrier_wait;
>   rte_thread_barrier_destroy;
> + rte_thread_name_set;
>  };
>  
>  INTERNAL {
> diff --git a/lib/eal/windows/rte_thread.c b/lib/eal/windows/rte_thread.c
> index b2ff16f51f..995ae2491d 100644
> --- a/lib/eal/windows/rte_thread.c
> +++ b/lib/eal/windows/rte_thread.c
> @@ -556,6 +556,66 @@ rte_thread_barrier_destroy(rte_thread_barrier *barrier)
>   return 0;
>  }
>  
> +typedef HRESULT
> +(*SetThreadDescription_type)(HANDLE thread_handle, PCWSTR 
> thread_description);
> +
> +int
> +rte_thread_name_set(rte_thread_t thread_id, const char *name)
> +{
> + int ret = 0;
> + size_t count;
> + HRESULT hr;
> + HANDLE thread_handle = NULL;
> + WCHAR w_name[RTE_THREAD_MAX_DESCRIPTION_LENGTH];
> + HMODULE kernel_lib = NULL;
> + SetThreadDescription_type SetThreadDescription_ptr;
> +
> + static const char library_name[] = "kernel32.dll";
> + static const char function[] = "SetThreadDescription";
> +
> + kernel_lib = LoadLibraryA(library_name);
> + if (kernel_lib == NULL) {
> + ret = thread_log_last_error("LoadLibraryA(\"kernel32.dll\")");
> + goto cleanup;
> + }

Rather then locate the function every time (kernel32.dll is always loaded),
what do you think of using `RTE_INIT`/`RTE_FINI` for that?

> +
> + SetThreadDescription_ptr = (SetThreadDescription_type)(
> + (void *)GetProcAddress(kernel_lib, function));
> + if (SetThreadDescription_ptr == NULL) {
> + ret = thread_log_last_error("GetProcAddress(\"kernel32.dll\", 
> \"SetThreadDescription\")");
> + goto cleanup;
> + }
> +
> + thread_handle = OpenThread(THREAD_SET_LIMITED_INFORMATION, FALSE,
> + thread_id.opaque_id);
> + if (thread_handle == NULL) {
> + ret = thread_log_last_error("OpenThread()");
> + goto cleanup;
> + }
> +
> + count = mbstowcs(w_name, name, RTE_THREAD_MAX_DESCRIPTION_LENGTH);

It's better to use `RTE_DIM(w_name)`, this way named constant is not needed.

> + if (count < 0) {
> + RTE_LOG(DEBUG, EAL, "Invalid thread name!\n");
> + ret = EINVAL;
> + goto cleanup;
> + }
> +
> + hr = SetThreadDescription_ptr(thread_handle, w_name);
> + if (FAILED(hr)) {
> + ret = thread_log_last_error("SetThreadDescription()");
> + goto cleanup;
> + }
> +
> +cleanup:
> + if (kernel_lib != NULL)
> + FreeLibrary(kernel_lib);
> + if (thread_handle != NULL) {
> + CloseHandle(thread_handle);
> + thread_handle = NULL;

Such local variable assignments on cleanup are useless.

> + }
> + return ret;
> +}
> +
>  int
>  rte_thread_key_create(rte_thread_key *key,
>   __rte_unused void (*destructor)(void *))

Re: [dpdk-dev] [PATCH v8 1/2] config/arm: select most suitable -march for kunpeng soc

[fengchengwen]

Hi, Thomas

Another patch '[dpdk-dev] [PATCH v8 2/2] net/hns3: refactor SVE code compile 
method'
has nothing to do with this patch (they're just in the same patchset) and has 
been
reviewed by ARM guys.

So please review it, thanks.


On 2021/6/18 7:33, Honnappa Nagarahalli wrote:
> 
> 
>>
>> 24/05/2021 15:23, Chengwen Feng:
>>> Currently, the soc_kunpeng930 declares '-march=armv8.2-a+crypto+sve',
>>> but some compiler doesn't recognize the march because it doesn't
>>> support sve.
>>>
>>> To solve this bug we use the following scheme:
>>> 1. Define 'march_base' tuple which defines support march, it should
>>> arrange from lower to higher.
>>> e.g. 'march_base': ['-march=armv8.1-a', '-march=armv8.2-a'] 2. Define
>>> 'march_feature' tuple which defines support feature.
>>> e.g. 'march_feature': ['crypto', 'sve']
>>> Note: If user defined 'march_feature', it also needs to define a valid
>>> 'march_base' because 'march_feature' depends on 'march_base' when
>>> checking validity.
>>> 3. Select the most suitable march+feature combination based on
>>> 'march_base' and 'march_feature' tuples.
>>> 4. Use the selected march+feature combination as the default
>>> machine_args.
>>>
>>> Fixes: 7cf32a22b240 ("config/arm: add Hisilicon kunpeng")
>>>
>>> Signed-off-by: Chengwen Feng 
>>
>> This patch is still not accepted.
>> Arm maintainers, what is missing?
>> Is it rejected?
> Juraj is working on a more generalized solution. Not sure how it will turn 
> out. It would be good to wait.
> 
>>
>>
>>
> 
> 
> .
> 

Re: [dpdk-dev] [PATCH v3] build: fix SVE compile error with gcc8.3

[fengchengwen]

Hi, Thomas

This patch already reviewed by ARM guys.

Please review it, thanks


On 2021/6/12 15:07, fengchengwen wrote:
> Friendly ping
> 
> 
> On 2021/5/27 15:12, Fengchengwen wrote:
>> Hi, Thomas
>>
>> Could you review this patch? Thanks
>>
>>
>> From:Ruifeng Wang 
>> To:Fengchengwen ;Thomas Monjalon 
>> ;ferruh.yigit 
>> Cc:dev ;Richardson, Bruce 
>> ;vladimir.medvedkin 
>> ;viktorin ;Jerin 
>> Jacob ;nd 
>> Date:2021-05-25 14:02:20
>> Subject:RE: [PATCH v3] build: fix SVE compile error with gcc8.3
>>
>>> -Original Message-
>>> From: Chengwen Feng < 
>>> fengcheng...@huawei.com>
>>> Sent: Friday, May 21, 2021 9:53 AM
>>> To: tho...@monjalon.net; 
>>> ferruh.yi...@intel.com; Ruifeng Wang
>>> < ruifeng.w...@arm.com>
>>> Cc: dev@dpdk.org; 
>>> bruce.richard...@intel.com;
>>> vladimir.medved...@intel.com; 
>>> vikto...@rehivetech.com;
>>> jer...@marvell.com
>>> Subject: [PATCH v3] build: fix SVE compile error with gcc8.3
>>>
>>> If the target machine has SVE feature (e.g. "-march=armv8.2-a+sve'), and the
>>> compiler are gcc8.3, it will compile error:
>>>In file included from ../dpdk-next-net/lib/eal/common/
>>>eal_common_options.c:38:
>>>../dpdk-next-net/lib/eal/arm/include/rte_vect.h:13:10: fatal
>>>error: arm_sve.h: No such file or directory
>>>#include 
>>>   ^~~
>>>compilation terminated.
>>>
>>> The root cause is that gcc8.3 supports SVE (the macro __ARM_FEATURE_SVE
>>> was 1), but it doesn't support SVE ACLE [1].
>>>
>>> The solution:
>>> a) Detect compiler whether support SVE ACLE, if support then define
>>> CC_SVE_ACLE_SUPPORT macro.
>>> b) Use the CC_SVE_ACLE_SUPPORT macro to include SVE header file.
>>>
>>> [1] ACLE: Arm C Language Extensions, the SVE ACLE header file is
>>> , user should include it when writing ACLE SVE code.
>>>
>>> Fixes: 67b68824a82d ("lpm/arm: support SVE")
>>>
>>> Signed-off-by: Chengwen Feng < 
>>> fengcheng...@huawei.com>
>>> ---
>>> v3:
>>> * double-indent 'cc.check_header('arm_sve.h')' line
>>> * move set 'CC_SVE_ACLE_SUPPORT' logic to the back (not in the middle
>>>   of compile_time_cpuflags setting)
>>> * fix minor syntax error in commit log
>>> v2:
>>> * modify title start with 'build'
>>>
>>> ---
>>> config/arm/meson.build | 5 +
>>> lib/eal/arm/include/rte_vect.h | 2 +-
>>> lib/lpm/rte_lpm.h  | 2 +-
>>> 3 files changed, 7 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/config/arm/meson.build b/config/arm/meson.build index
>>> e83a56e..08299b0 100644
>>> --- a/config/arm/meson.build
>>> +++ b/config/arm/meson.build
>>> @@ -488,3 +488,8 @@ if cc.get_define('__ARM_FEATURE_CRYPTO', args:
>>> machine_args) != ''
>>>  compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
>>>  'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2'] endif
>>> +
>>> +if (cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and
>>> +cc.check_header('arm_sve.h'))
>>> +dpdk_conf.set('CC_SVE_ACLE_SUPPORT', 1) endif
>>> diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h
>>> index 093e912..277b656 100644
>>> --- a/lib/eal/arm/include/rte_vect.h
>>> +++ b/lib/eal/arm/include/rte_vect.h
>>> @@ -9,7 +9,7 @@
>>> #include "generic/rte_vect.h"
>>> #include "rte_debug.h"
>>> #include "arm_neon.h"
>>> -#ifdef __ARM_FEATURE_SVE
>>> +#ifdef CC_SVE_ACLE_SUPPORT
>>> #include 
>>> #endif
>>>
>>> diff --git a/lib/lpm/rte_lpm.h b/lib/lpm/rte_lpm.h index 28b5768..9262814
>>> 100644
>>> --- a/lib/lpm/rte_lpm.h
>>> +++ b/lib/lpm/rte_lpm.h
>>> @@ -402,7 +402,7 @@ rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t
>>> ip, uint32_t hop[4],
>>>uint32_t defv);
>>>
>>> #if defined(RTE_ARCH_ARM)
>>> -#ifdef __ARM_FEATURE_SVE
>>> +#ifdef CC_SVE_ACLE_SUPPORT
>>> #include "rte_lpm_sve.h"
>>> #else
>>> #include "rte_lpm_neon.h"
>>> --
>>> 2.8.1
>>
>> Acked-by: Ruifeng Wang < ruifeng.w...@arm.com>
>>

Re: [dpdk-dev] [PATCH] config/arm: add checking SVE cpuflag

[fengchengwen]

Hi, ARM guys, Thomas

Could you help review this patch ?

Thanks

On 2021/5/21 11:33, Chengwen Feng wrote:
> If compiled with SVE feature (e.g. "-march=armv8.2-a+sve'), the binary
> could not run on non-SVE platform else it will encounter illegal
> instruction [1].
> 
> This patch fixes it by add 'RTE_CPUFLAG_SVE' to compile_time_cpuflags,
> so that rte_cpu_is_supported() will print meaningful log under above
> situation.
> 
> [1] http://mails.dpdk.org/archives/dev/2021-May/209124.html
> 
> Signed-off-by: Chengwen Feng 
> ---
>  config/arm/meson.build | 4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/config/arm/meson.build b/config/arm/meson.build
> index e83a56e..9b147c0 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -480,6 +480,10 @@ if (cc.get_define('__ARM_NEON', args: machine_args) != 
> '' or
>  compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
>  endif
>  
> +if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''
> +compile_time_cpuflags += ['RTE_CPUFLAG_SVE']
> +endif
> +
>  if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
>  compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
>  endif
> 

Re: [dpdk-dev] [PATCH V6] config/arm: add Qualcomm Centriq 2400 part number

[Ruifeng Wang]

> -Original Message-
> From: Thomas Monjalon 
> Sent: Friday, June 18, 2021 4:58 PM
> To: Ruifeng Wang ; Thierry Herbelot
> 
> Cc: dev@dpdk.org; jer...@marvell.com; Honnappa Nagarahalli
> ; Juraj Linkeš
> ; nd 
> Subject: Re: [PATCH V6] config/arm: add Qualcomm Centriq 2400 part
> number
> 
> 18/06/2021 10:53, Thierry Herbelot:
> > On 6/18/21 10:51 AM, Thomas Monjalon wrote:
> > > 18/06/2021 04:09, Ruifeng Wang:
> > >> From: Thierry Herbelot 
> > >>>   'part_number_config': {
> > >>> -'0xc00': {'machine_args':  ['-march=armv8-a+crc']}
> > >>> +'0x800': {'machine_args':  ['-march=armv8-a+crc']},
> > >>> +'0xc00': {'machine_args':  ['-march=armv8-a+crc']},
> > >> Nit, redundant comma at the end of the line.
> > >
> > > What is redundant?
> >
> > The comma at the end of the second line is not necessary.
> 
> It is a good practice to have comma like other lines, so no need to update 
> this
> line when adding more.
> 
Looked at style in the rest of the file. Just wanted them to be aligned.
I'm fine with a trailing comma at the last line.

Acked-by: Ruifeng Wang 

[dpdk-dev] [PATCH v2] app/procinfo: add device registers dump

[Min Hu (Connor)]

From: Chengchang Tang 

This patch add support for dump the device registers from a running
application. It can help developers locate the problem.

Signed-off-by: Chengchang Tang 
Signed-off-by: Min Hu (Connor) 
---
v2:
* some logs are adjusted and error string are printed after
file operation fails.
---
 app/proc-info/main.c | 94 +++-
 1 file changed, 93 insertions(+), 1 deletion(-)

diff --git a/app/proc-info/main.c b/app/proc-info/main.c
index b9587f7..553d686 100644
--- a/app/proc-info/main.c
+++ b/app/proc-info/main.c
@@ -94,6 +94,9 @@ static char *mempool_name;
 /**< Enable iter mempool. */
 static uint32_t enable_iter_mempool;
 static char *mempool_iter_name;
+/**< Enable dump regs. */
+static uint32_t enable_dump_regs;
+static char *dump_regs_file_prefix;
 
 /**< display usage */
 static void
@@ -119,7 +122,8 @@ proc_info_usage(const char *prgname)
"  --show-crypto: to display crypto information\n"
"  --show-ring[=name]: to display ring information\n"
"  --show-mempool[=name]: to display mempool information\n"
-   "  --iter-mempool=name: iterate mempool elements to display 
content\n",
+   "  --iter-mempool=name: iterate mempool elements to display 
content\n"
+   "  --dump-regs=file-prefix: dump reg to file with the 
file-prefix\n",
prgname);
 }
 
@@ -226,6 +230,7 @@ proc_info_parse_args(int argc, char **argv)
{"show-ring", optional_argument, NULL, 0},
{"show-mempool", optional_argument, NULL, 0},
{"iter-mempool", required_argument, NULL, 0},
+   {"dump-regs", required_argument, NULL, 0},
{NULL, 0, 0, 0}
};
 
@@ -288,6 +293,10 @@ proc_info_parse_args(int argc, char **argv)
"iter-mempool", MAX_LONG_OPT_SZ)) {
enable_iter_mempool = 1;
mempool_iter_name = optarg;
+   } else if (!strncmp(long_option[option_index].name,
+   "dump-regs", MAX_LONG_OPT_SZ)) {
+   enable_dump_regs = 1;
+   dump_regs_file_prefix = optarg;
}
break;
case 1:
@@ -1349,6 +1358,87 @@ iter_mempool(char *name)
}
 }
 
+static void
+dump_regs(char *file_prefix)
+{
+#define MAX_FILE_NAME_SZ (MAX_LONG_OPT_SZ + 10)
+   char file_name[MAX_FILE_NAME_SZ];
+   struct rte_dev_reg_info reg_info;
+   struct rte_eth_dev_info dev_info;
+   unsigned char *buf_data;
+   size_t buf_size;
+   FILE *fp_regs;
+   uint16_t i;
+   int ret;
+
+   snprintf(bdr_str, MAX_STRING_LEN, " dump - Port REG");
+   STATS_BDR_STR(10, bdr_str);
+
+   RTE_ETH_FOREACH_DEV(i) {
+   /* Skip if port is not in mask */
+   if ((enabled_port_mask & (1ul << i)) == 0)
+   continue;
+
+   snprintf(bdr_str, MAX_STRING_LEN, " Port (%u)", i);
+   STATS_BDR_STR(5, bdr_str);
+
+   memset(®_info, 0, sizeof(reg_info));
+   memset(&dev_info, 0, sizeof(dev_info));
+
+   ret = rte_eth_dev_info_get(i, &dev_info);
+   if (ret) {
+   printf("Error getting device info: %d\n", ret);
+   continue;
+   }
+
+   ret = rte_eth_dev_get_reg_info(i, ®_info);
+   if (ret) {
+   printf("Error getting device reg info: %d\n", ret);
+   continue;
+   }
+
+   buf_size = reg_info.length * reg_info.width;
+   buf_data = malloc(buf_size);
+   if (buf_data == NULL) {
+   printf("Error allocating %zu bytes buffer\n", buf_size);
+   continue;
+   }
+
+   reg_info.data = buf_data;
+   reg_info.length = 0;
+   ret = rte_eth_dev_get_reg_info(i, ®_info);
+   if (ret) {
+   printf("Error getting regs from device: %d\n", ret);
+   free(buf_data);
+   continue;
+   }
+
+   snprintf(file_name, MAX_FILE_NAME_SZ, "%s-port%u",
+   file_prefix, i);
+   fp_regs = fopen(file_name, "wb");
+   if (fp_regs == NULL) {
+   printf("Error during opening '%s' for writing: %s\n",
+   file_name, strerror(errno));
+   } else {
+   size_t nr_written;
+
+   nr_written = fwrite(buf_data, 1, buf_size, fp_regs);
+   if (nr_written != buf_size)
+   printf("Error during writing %s: %s\n",
+ 

Re: [dpdk-dev] [PATCH v2 0/4] support AVF RSS and FDIR for GRE tunnel packet

[Zhang, Qi Z]

> -Original Message-
> From: Wu, Wenjun1 
> Sent: Wednesday, June 2, 2021 10:25 AM
> To: dev@dpdk.org; Zhang, Qi Z ; Wu, Jingjing
> ; Xing, Beilei 
> Cc: Wu, Wenjun1 
> Subject: [PATCH v2 0/4] support AVF RSS and FDIR for GRE tunnel packet
> 
> [PATCH v2 1/4] net/iavf: support flow pattern for GRE [PATCH v2 2/4]
> common/iavf: add header types for GRE [PATCH v2 3/4] net/iavf: support AVF
> RSS for GRE tunnel packet [PATCH v2 4/4] net/iavf: support AVF FDIR for GRE
> tunnel packet
> 
> v2:
> * Delete the share code patch, because it is not necessary for this
>   patch set.
> * Delete the definition of ETH_RSS_GRE and related dependencies,
>   because GRE header is not needed for hash input set.
> 
> Wenjun Wu (4):
>   net/iavf: support flow pattern for GRE
>   common/iavf: add header types for GRE
>   net/iavf: support AVF RSS for GRE tunnel packet
>   net/iavf: support AVF FDIR for GRE tunnel packet
> 
>  drivers/common/iavf/virtchnl.h   |   1 +
>  drivers/net/iavf/iavf_fdir.c |  55 ++
>  drivers/net/iavf/iavf_generic_flow.c | 105 +++
> drivers/net/iavf/iavf_generic_flow.h |  14 
>  drivers/net/iavf/iavf_hash.c |  27 +--
>  5 files changed, 197 insertions(+), 5 deletions(-)
> 
> --
> 2.25.1

Acked-by: Qi Zhang 

Applied to dpdk-next-net-intel.

Thanks
Qi

Re: [dpdk-dev] [PATCH] net/i40e: fix wrong data path selection in secondary process

[Zhang, Qi Z]

> -Original Message-
> From: Yu, DapengX 
> Sent: Wednesday, June 9, 2021 3:05 PM
> To: Xing, Beilei 
> Cc: dev@dpdk.org; Zhang, Qi Z ; Yu, DapengX
> ; sta...@dpdk.org
> Subject: [PATCH] net/i40e: fix wrong data path selection in secondary process
> 
> From: Dapeng Yu 
> 
> The flag use_avx2 and use_avx512 are defined as local variables, they will not
> be aware by the secondary process, then wrong data path is selected. Fix the
> issue by moving them into struct i40e_adapter.
> 
> Fixes: 6ada10deac66 ("net/i40e: remove devarg use-latest-supported-vec")
> Fixes: e6a6a138919f ("net/i40e: add AVX512 vector path")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Dapeng Yu 

Acked-by: Qi Zhang 

Applied to dpdk-next-net-intel.

Thanks
Qi

Re: [dpdk-dev] [PATCH] net/i40e: fix data path corrupt on secondary process

[Zhang, Qi Z]

> -Original Message-
> From: Yu, DapengX 
> Sent: Wednesday, June 9, 2021 3:06 PM
> To: Xing, Beilei 
> Cc: dev@dpdk.org; Zhang, Qi Z ; Yu, DapengX
> ; sta...@dpdk.org
> Subject: [PATCH] net/i40e: fix data path corrupt on secondary process
> 
> From: Dapeng Yu 
> 
> The rte_eth_devices array is not in share memory, it should not be referenced
> by i40e_adapter which is shared by primary and secondary.
> Any process set i40e_adapter->eth_dev will corrupt another process'
> context.
> 
> The patch removed the field "eth_dev" from i40e_adapter.
> Now, when the data paths try to access the rte_eth_dev_data instance, they
> should replace adapter->eth_dev->data with adapter->pf.dev_data.
> 
> Fixes: 2bedd7277a10 ("net/i40e: print real global changes")
> Fixes: 4861cde46116 ("i40e: new poll mode driver")
> Fixes: be6c228d4da3 ("i40e: support Rx interrupt")
> Fixes: 8e109464c022 ("i40e: allow vector Rx and Tx usage")
> Fixes: 1d169e9dafb8 ("net/i40e: support cloud filter with L4 port")
> Fixes: a778a1fa2e4e ("i40e: set up and initialize flow director")
> Fixes: 460d1679586e ("drivers/net: delete HW rings while freeing queues")
> Fixes: b0ea2716e05b ("net/i40e: add flow flush function")
> Fixes: ef4c16fd9148 ("net/i40e: refactor RSS flow")
> Fixes: 819a5c14d1dd ("net/i40e: fix null checks")
> Fixes: e0cb96204b71 ("net/i40e: add support for representor ports")

Just need to list the patch that bring the issue (in this case it is the one 
that add a non-shared point into a structure that will be shared)
, all following up patches are not guilty.

> Cc: sta...@dpdk.org
> 
> Signed-off-by: Dapeng Yu 

Re: [dpdk-dev] [PATCH] kni: fix wrong mbuf alloc count in kni_allocate_mbufs

[wangyunjian]

> -Original Message-
> From: Ferruh Yigit [mailto:ferruh.yi...@intel.com]
> Sent: Friday, June 18, 2021 9:37 PM
> To: wangyunjian ; dev@dpdk.org
> Cc: liucheng (J) ; dingxiaoxiong
> 
> Subject: Re: [dpdk-dev] [PATCH] kni: fix wrong mbuf alloc count in
> kni_allocate_mbufs
> 
> On 5/31/2021 1:09 PM, wangyunjian wrote:
> > From: Yunjian Wang 
> >
> > In kni_allocate_mbufs(), we alloc mbuf for alloc_q as this code.
> > allocq_free = (kni->alloc_q->read - kni->alloc_q->write - 1) \
> > & (MAX_MBUF_BURST_NUM - 1);
> > The value of allocq_free maybe zero (e.g 32 & (32 - 1) = 0), and it
> > will not fill the alloc_q. When the alloc_q's free count is zero, it
> > will drop the packet in kernel kni.
> >
> 
> nack
> 
> Both 'read' & 'write' pointers can be max 'len-1', so 'read - write - 1' 
> can't be
> 'len'.
> For above example first part can't be '32'.
> 
> But if you are observing a problem, can you please describe it a little more, 
> it
> may be because of something else.

The ring size is 1024. After init, write = read = 0. Then we fill kni->alloc_q 
to full. At this time, write = 1023, read = 0.
Then the kernel send 32 packets to userspace. At this time, write = 1023, read 
= 32.
And then the userspace recieve this 32 packets. Then fill the kni->alloc_q, (32 
- 1023 - 1)&31 = 0, fill nothing.
...
Then the kernel send 32 packets to userspace. At this time, write = 1023, read 
= 992.
And then the userspace recieve this 32 packets. Then fill the kni->alloc_q, 
(992 - 1023 - 1)&31 = 0, fill nothing.
Then the kernel send 32 packets to userspace. The kni->alloc_q only has 31 
mbufs and will drop one packet.

Absolutely, this is a special scene. Normally, it will fill some mbufs 
everytime, but may not enough for the kernel to use.
In this patch, we always keep the kni->alloc_q to full for the kernel to use.

Thanks

> 
> > In this patch, we set the allocq_free as the min between
> > MAX_MBUF_BURST_NUM and the free count of the alloc_q.
> >
> > Signed-off-by: Cheng Liu 
> > Signed-off-by: Yunjian Wang 
> > ---
> >  lib/kni/rte_kni.c | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/lib/kni/rte_kni.c b/lib/kni/rte_kni.c index
> > 9dae6a8d7c..20d8f20cef 100644
> > --- a/lib/kni/rte_kni.c
> > +++ b/lib/kni/rte_kni.c
> > @@ -677,8 +677,9 @@ kni_allocate_mbufs(struct rte_kni *kni)
> > return;
> > }
> >
> > -   allocq_free = (kni->alloc_q->read - kni->alloc_q->write - 1)
> > -   & (MAX_MBUF_BURST_NUM - 1);
> > +   allocq_free = kni_fifo_free_count(kni->alloc_q);
> > +   allocq_free = (allocq_free > MAX_MBUF_BURST_NUM) ?
> > + MAX_MBUF_BURST_NUM : allocq_free;
> > for (i = 0; i < allocq_free; i++) {
> > pkts[i] = rte_pktmbuf_alloc(kni->pktmbuf_pool);
> > if (unlikely(pkts[i] == NULL)) {
> >

Re: [dpdk-dev] [PATCH v3] vhost: enable IOMMU for async vhost

[Hu, Jiayu]

Hi Maxime,

> -Original Message-
> From: Maxime Coquelin 
> Sent: Saturday, June 19, 2021 12:18 AM
> To: Ding, Xuan ; Xia, Chenbo 
> Cc: dev@dpdk.org; Hu, Jiayu ; Pai G, Sunil
> ; Richardson, Bruce ;
> Van Haaren, Harry ; Liu, Yong
> 
> Subject: Re: [PATCH v3] vhost: enable IOMMU for async vhost
> 
> Hi Xuan,
> 
> On 6/3/21 7:30 PM, xuan.d...@intel.com wrote:
> > From: Xuan Ding 
> >
> > For async copy, it is unsafe to directly use the physical address.
> > And current address translation from GPA to HPA via SW also takes CPU
> > cycles, these can all benefit from IOMMU.
> >
> > Since the existing DMA engine supports to use platform IOMMU, this
> > patch enables IOMMU for async vhost, which defines IOAT devices to use
> > virtual address instead of physical address.
> 
> We have to keep in mind a generic DMA api is coming, and maybe we want a
> SW implementation of a dmadev based on memcpy at least for
> testing/debugging purpose.

Agree, we need to support SW fallback, and I think this is also what this
patch wants to do. Originally, vhost passes IOVA to DMA callbacks; if
DPDK in PA mode, we cannot fallback to SW copy. In this patch, vhost
passes both VA for pktmbuf and guest's buffer to DMA callbacks, which
makes SW fallback possible.

In terms of generic DMA api, no matter it uses VA or IOVA as buffer addresses,
I think this design can work, as DMA callback implementations can do address
translation anyway.

> 
> > When set memory table, the frontend's memory will be mapped to the
> > default container of DPDK where IOAT devices have been added into.
> > When DMA copy fails, the virtual address provided to IOAT devices also
> > allow us fallback to SW copy or PA copy.
> >
> > With IOMMU enabled, to use IOAT devices:
> > 1. IOAT devices must be binded to vfio-pci, rather than igb_uio.
> > 2. DPDK must use "--iova-mode=va".
> 
> I think this is problematic, at least we need to check the right iova mode has
> been selected, but even with doing that it is limiting.
> 
> What prevent us to reuse add_guest_pages() alogrithm to implement
> IOVA_AS_PA?

In the original design, vfio doesn't work, as vhost doesn't programs iommu
table with guest's memory. Specifically, if DPDK is in VA mode, IOVA passed
to DMA callback is VA, but IOMMU cannot find corresponding PA for guest
buffers; if DPDK is in PA mode, IOVA passed to DMA callback is PA. In this case,
there are random errors for guest buffers when VT-d is enabled, as IOMMU
behavior is uncertain. I think supporting vfio is one of reasons of this patch.

One concern about this patch is how to handle when IOVA is PA. If IOVA is PA,
IOMMU cannot find correct PA for pktmbuf via VA passed by vhost. But can
DMA callback translate VA to PA before calling ioat/dmadev API? IMHO, IOVA
as PA with vfio is not a recommended configuration. Do you think it's a must
for vhost to support this case?

Thanks,
Jiayu

> 
> >
> > Signed-off-by: Xuan Ding 
> > ---
> >
> > v3:
> > * Fixed some typos.
> >
> > v2:
> > * Fixed a format issue.
> > * Added the dma unmap logic when device is closed.
> > ---
> >  doc/guides/prog_guide/vhost_lib.rst |  20 +
> >  lib/vhost/vhost_user.c  | 125 +---
> >  lib/vhost/virtio_net.c  |  30 +++
> >  3 files changed, 69 insertions(+), 106 deletions(-)
> >
> > diff --git a/doc/guides/prog_guide/vhost_lib.rst
> > b/doc/guides/prog_guide/vhost_lib.rst
> > index d18fb98910..5777f0da96 100644
> > --- a/doc/guides/prog_guide/vhost_lib.rst
> > +++ b/doc/guides/prog_guide/vhost_lib.rst
> > @@ -420,3 +420,23 @@ Finally, a set of device ops is defined for device
> specific operations:
> >  * ``get_notify_area``
> >
> >Called to get the notify area info of the queue.
> > +
> > +Vhost async data path
> > +-
> > +
> > +* Address mode
> > +
> > +  Modern IOAT devices support to use the IOMMU, which can avoid using
> > + the unsafe HPA. Besides, the CPU cycles took by SW to translate from
> > + GPA to HPA can also be saved. So IOAT devices are defined to use
> > + virtual address instead of physical address.
> > +
> > +  With IOMMU enabled, to use IOAT devices:
> > +  1. IOAT devices must be binded to vfio-pci, rather than igb_uio.
> > +  2. DPDK must use ``--iova-mode=va``.
> > +
> > +* Fallback
> > +
> > +  When the DMA copy fails, the user who implements the transfer_data
> > + callback can fallback to SW copy or fallback to PA copy through
> > + rte_mem_virt2iova().
> > diff --git a/lib/vhost/vhost_user.c b/lib/vhost/vhost_user.c index
> > 8f0eba6412..c33fa784ff 100644
> > --- a/lib/vhost/vhost_user.c
> > +++ b/lib/vhost/vhost_user.c
> > @@ -45,6 +45,7 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >
> >  #include "iotlb.h"
> >  #include "vhost.h"
> > @@ -141,6 +142,34 @@ get_blk_size(int fd)
> > return ret == -1 ? (uint64_t)-1 : (uint64_t)stat.st_blksize;  }
> >
> > +static int
> > +async_dma_map(struct rte_vhost_mem_region *region, bool do_map) {
> > +   

Re: [dpdk-dev] [PATCH] net/ice: fix integer overflow when computing max_pkt_len

[Zhang, Qi Z]

> -Original Message-
> From: Tudor Cornea 
> Sent: Tuesday, June 15, 2021 6:39 PM
> To: Yang, Qiming ; Zhang, Qi Z
> 
> Cc: dev@dpdk.org; Tudor Cornea 
> Subject: [PATCH] net/ice: fix integer overflow when computing max_pkt_len
> 
> The len variable, used in the computation of max_pkt_len could overflow, if
> used to store the result of the following computation:
> 
> ICE_SUPPORT_CHAIN_NUM * rxq->rx_buf_len
> 
> Since, we could define the mbuf size to have a large value (i.e 13312), and
> ICE_SUPPORT_CHAIN_NUM is defined as 5, the computation mentioned above
> could potentially result in a value which might be bigger than MAX_USHORT.
> 
> The result will be that Jumbo Frames will not work properly
> 
> Signed-off-by: Tudor Cornea 

Acked-by: Qi Zhang 

Applied to dpdk-next-net-intel after adding missing fixline and cc stable

Fixes: 1b009275e2c8 ("net/ice: add Rx queue init in DCF")
Cc: sta...@dpdk.org

Thanks
Qi

Re: [dpdk-dev] [PATCH] config/arm: add checking SVE cpuflag

[Ruifeng Wang]

> -Original Message-
> From: Chengwen Feng 
> Sent: Friday, May 21, 2021 11:34 AM
> To: tho...@monjalon.net; ferruh.yi...@intel.com
> Cc: dev@dpdk.org; vikto...@rehivetech.com; Ruifeng Wang
> ; jer...@marvell.com;
> bruce.richard...@intel.com
> Subject: [PATCH] config/arm: add checking SVE cpuflag
> 
> If compiled with SVE feature (e.g. "-march=armv8.2-a+sve'), the binary could
> not run on non-SVE platform else it will encounter illegal instruction [1].
> 
> This patch fixes it by add 'RTE_CPUFLAG_SVE' to compile_time_cpuflags, so
> that rte_cpu_is_supported() will print meaningful log under above situation.
> 
> [1] http://mails.dpdk.org/archives/dev/2021-May/209124.html
> 
> Signed-off-by: Chengwen Feng 
> ---
>  config/arm/meson.build | 4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/config/arm/meson.build b/config/arm/meson.build index
> e83a56e..9b147c0 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -480,6 +480,10 @@ if (cc.get_define('__ARM_NEON', args:
> machine_args) != '' or
>  compile_time_cpuflags += ['RTE_CPUFLAG_NEON']  endif
> 
> +if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''
> +compile_time_cpuflags += ['RTE_CPUFLAG_SVE'] endif
> +
>  if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
>  compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']  endif
> --
> 2.8.1
Thanks for the patch.
Acked-by: Ruifeng Wang 

[dpdk-dev] [PATCH v2 00/14] i40e base code update

[Robin Zhang]

update i40e base code.

source code of i40e driver:
cid-i40e.2021.04.29.tar.gz

changelog in share repo:
>From 59a080f4fafe ("i40e-shared: Add opcode 0x0406 and 0x0416 to Linux
support") To bedcbea1063 ("i40e-shared: Fix potentially uninitialized
variables in NVM code")

The following commits are ignored:
cb9139e3bce8 ("i40e-shared: Fix not blinking X722 with x557 PHY via
‘ethtool -p'")
c09d4f9cf390 ("i40e-shared: i40e-shared: Fix build warning -Wformat
related to integer size")
ff8a1abc6c17 ("i40e-shared: Fix build warning with __packed")
59a080f4fafe ("i40e-shared: Add opcode 0x0406 and 0x0416 to Linux
support")

v2:
- refine commit messages and macro name

Robin Zhang (14):
  net/i40e/base: add new versions of send ASQ command functions
  net/i40e/base: update FW API version to 1.14
  net/i40e/base: add support for Min Rollback Revision for 4 more X722
modules
  net/i40e/base: set TSA table values when parsing CEE configuration
  net/i40e/base: define new Shadow RAM pointers
  net/i40e/base: fix PHY type identifiers for 2.5G and 5G adapters
  net/i40e/base: fix PF reset failed
  net/i40e/base: fix update link data for X722
  net/i40e/base: fix AOC media type reported by ethtool
  net/i40e/base: add flags and fields for double vlan processing
  net/i40e/base: 10GBASE-ER Optical modules recognition
  net/i40e/base: fix headers to match functions
  net/i40e/base: fix potentially uninitialized variables in NVM code
  net/i40e/base: update version in readme

 drivers/net/i40e/base/README|   2 +-
 drivers/net/i40e/base/i40e_adminq.c |  79 +--
 drivers/net/i40e/base/i40e_adminq_cmd.h |  48 +--
 drivers/net/i40e/base/i40e_common.c | 176 +++-
 drivers/net/i40e/base/i40e_dcb.c|  10 +-
 drivers/net/i40e/base/i40e_lan_hmc.c|   2 +-
 drivers/net/i40e/base/i40e_nvm.c|   7 +-
 drivers/net/i40e/base/i40e_prototype.h  |  17 +++
 drivers/net/i40e/base/i40e_type.h   |  12 +-
 9 files changed, 288 insertions(+), 65 deletions(-)

-- 
2.25.1

[dpdk-dev] [PATCH v2 01/14] net/i40e/base: add new versions of send ASQ command functions

[Robin Zhang]

ASQ send command functions are returning only i40e status codes
yet some calling functions also need Admin Queue status
that is stored in hw->aq.asq_last_status. Since hw object
is stored on a heap it introduces a possibility for
a race condition in access to hw if calling function is not
fast enough to read hw->aq.asq_last_status before next
send ASQ command is executed.

Added new versions of send ASQ command functions that return
Admin Queue status on the stack to avoid race conditions
in access to hw->aq.asq_last_status.
Added new _v2 version of i40e_aq_remove_macvlan and i40e_aq_add_macvlan
that is using new _v2 versions of ASQ send command functions and
returns the Admin Queue status on the stack.

Signed-off-by: Sylwester Dziedziuch 
Signed-off-by: Robin Zhang 
---
 drivers/net/i40e/base/i40e_adminq.c|  73 +++--
 drivers/net/i40e/base/i40e_common.c| 139 ++---
 drivers/net/i40e/base/i40e_prototype.h |  17 +++
 3 files changed, 205 insertions(+), 24 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_adminq.c 
b/drivers/net/i40e/base/i40e_adminq.c
index 0da45f03e4..eafacbdbec 100644
--- a/drivers/net/i40e/base/i40e_adminq.c
+++ b/drivers/net/i40e/base/i40e_adminq.c
@@ -834,7 +834,7 @@ STATIC bool i40e_asq_done(struct i40e_hw *hw)
 }
 
 /**
- *  i40e_asq_send_command - send command to Admin Queue
+ *  i40e_asq_send_command_exec - send command to Admin Queue
  *  @hw: pointer to the hw struct
  *  @desc: prefilled descriptor describing the command (non DMA mem)
  *  @buff: buffer to use for indirect commands
@@ -844,11 +844,12 @@ STATIC bool i40e_asq_done(struct i40e_hw *hw)
  *  This is the main send command driver routine for the Admin Queue send
  *  queue.  It runs the queue, cleans the queue, etc
  **/
-enum i40e_status_code i40e_asq_send_command(struct i40e_hw *hw,
-   struct i40e_aq_desc *desc,
-   void *buff, /* can be NULL */
-   u16  buff_size,
-   struct i40e_asq_cmd_details *cmd_details)
+STATIC enum i40e_status_code
+i40e_asq_send_command_exec(struct i40e_hw *hw,
+  struct i40e_aq_desc *desc,
+  void *buff, /* can be NULL */
+  u16  buff_size,
+  struct i40e_asq_cmd_details *cmd_details)
 {
enum i40e_status_code status = I40E_SUCCESS;
struct i40e_dma_mem *dma_buff = NULL;
@@ -858,8 +859,6 @@ enum i40e_status_code i40e_asq_send_command(struct i40e_hw 
*hw,
u16  retval = 0;
u32  val = 0;
 
-   i40e_acquire_spinlock(&hw->aq.asq_spinlock);
-
hw->aq.asq_last_status = I40E_AQ_RC_OK;
 
if (hw->aq.asq.count == 0) {
@@ -1042,6 +1041,64 @@ enum i40e_status_code i40e_asq_send_command(struct 
i40e_hw *hw,
}
 
 asq_send_command_error:
+   return status;
+}
+
+/**
+ *  i40e_asq_send_command - send command to Admin Queue
+ *  @hw: pointer to the hw struct
+ *  @desc: prefilled descriptor describing the command (non DMA mem)
+ *  @buff: buffer to use for indirect commands
+ *  @buff_size: size of buffer for indirect commands
+ *  @cmd_details: pointer to command details structure
+ *
+ *  Acquires the lock and calls the main send command execution
+ *  routine.
+ **/
+enum i40e_status_code
+i40e_asq_send_command(struct i40e_hw *hw,
+ struct i40e_aq_desc *desc,
+ void *buff, /* can be NULL */
+ u16  buff_size,
+ struct i40e_asq_cmd_details *cmd_details)
+{
+   enum i40e_status_code status = I40E_SUCCESS;
+
+   i40e_acquire_spinlock(&hw->aq.asq_spinlock);
+   status = i40e_asq_send_command_exec(hw, desc, buff, buff_size,
+   cmd_details);
+   i40e_release_spinlock(&hw->aq.asq_spinlock);
+   return status;
+}
+
+/**
+ *  i40e_asq_send_command_v2 - send command to Admin Queue
+ *  @hw: pointer to the hw struct
+ *  @desc: prefilled descriptor describing the command (non DMA mem)
+ *  @buff: buffer to use for indirect commands
+ *  @buff_size: size of buffer for indirect commands
+ *  @cmd_details: pointer to command details structure
+ *  @aq_status: pointer to Admin Queue status return value
+ *
+ *  Acquires the lock and calls the main send command execution
+ *  routine. Returns the last Admin Queue status in aq_status
+ *  to avoid race conditions in access to hw->aq.asq_last_status.
+ **/
+enum i40e_status_code
+i40e_asq_send_command_v2(struct i40e_hw *hw,
+struct i40e_aq_desc *desc,
+void *buff, /* can be NULL */
+u16  buff_size,
+struct i40e_asq_cmd_details *cmd_details,
+enum i40e_admin_queue_err *aq_status)
+{
+   enum i40e_status_code status = I40E_SUCCESS;
+
+   i40e_acquire_spinlock(&hw->aq.asq_spinlock);
+   status = i40e_asq_

[dpdk-dev] [PATCH v2 02/14] net/i40e/base: update FW API version to 1.14

[Robin Zhang]

Update FW increment API version to 1.14

Signed-off-by: Sylwester Dziedziuch 
Signed-off-by: Robin Zhang 
---
 drivers/net/i40e/base/i40e_adminq_cmd.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h 
b/drivers/net/i40e/base/i40e_adminq_cmd.h
index 2ca41db5d3..b5ac74787b 100644
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -13,7 +13,7 @@
 
 #define I40E_FW_API_VERSION_MAJOR  0x0001
 #define I40E_FW_API_VERSION_MINOR_X722 0x000B
-#define I40E_FW_API_VERSION_MINOR_X710 0x000C
+#define I40E_FW_API_VERSION_MINOR_X710 0x000E
 
 #define I40E_FW_MINOR_VERSION(_h) ((_h)->mac.type == I40E_MAC_XL710 ? \
I40E_FW_API_VERSION_MINOR_X710 : \
-- 
2.25.1

[dpdk-dev] [PATCH v2 03/14] net/i40e/base: add support for Min Rollback Revision for 4 more X722 modules

[Robin Zhang]

This change increments X722 API version and adds new constants related to
the extended implementation of Security Version Opt-In.

Signed-off-by: Stanislaw Grzeszczak 
Signed-off-by: Robin Zhang 
---
 drivers/net/i40e/base/i40e_adminq_cmd.h | 16 ++--
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h 
b/drivers/net/i40e/base/i40e_adminq_cmd.h
index b5ac74787b..a73a08aae6 100644
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -12,7 +12,7 @@
  */
 
 #define I40E_FW_API_VERSION_MAJOR  0x0001
-#define I40E_FW_API_VERSION_MINOR_X722 0x000B
+#define I40E_FW_API_VERSION_MINOR_X722 0x000C
 #define I40E_FW_API_VERSION_MINOR_X710 0x000E
 
 #define I40E_FW_MINOR_VERSION(_h) ((_h)->mac.type == I40E_MAC_XL710 ? \
@@ -2425,11 +2425,15 @@ struct i40e_aqc_rollback_revision_update {
u8  optin_mode; /* bool */
 #define I40E_AQ_RREV_OPTION_MODE   0x01
u8  module_selected;
-#define I40E_AQ_RREV_MODULE_PCIE_ANALOG0
-#define I40E_AQ_RREV_MODULE_PHY_ANALOG 1
-#define I40E_AQ_RREV_MODULE_OPTION_ROM 2
-#define I40E_AQ_RREV_MODULE_EMP_IMAGE  3
-#define I40E_AQ_RREV_MODULE_PE_IMAGE   4
+#define I40E_AQ_RREV_MODULE_PCIE_ANALOG0
+#define I40E_AQ_RREV_MODULE_PHY_ANALOG 1
+#define I40E_AQ_RREV_MODULE_OPTION_ROM 2
+#define I40E_AQ_RREV_MODULE_EMP_IMAGE  3
+#define I40E_AQ_RREV_MODULE_PE_IMAGE   4
+#define I40E_AQ_RREV_MODULE_PHY_PLL_O_CONFIGURATION5
+#define I40E_AQ_RREV_MODULE_PHY_0_CONFIGURATION6
+#define I40E_AQ_RREV_MODULE_PHY_PLL_1_CONFIGURATION7
+#define I40E_AQ_RREV_MODULE_PHY_1_CONFIGURATION8
u8  reserved1[2];
u32 min_rrev;
u8  reserved2[8];
-- 
2.25.1

[dpdk-dev] [PATCH v2 04/14] net/i40e/base: set TSA table values when parsing CEE configuration

[Robin Zhang]

Driver did not Set TSA table values when parsing CEE configuration
obtained from FW.

Signed-off-by: Pawel Malinowski 
Signed-off-by: Robin Zhang 
---
 drivers/net/i40e/base/i40e_dcb.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/net/i40e/base/i40e_dcb.c b/drivers/net/i40e/base/i40e_dcb.c
index 388af3d64d..27b52bc365 100644
--- a/drivers/net/i40e/base/i40e_dcb.c
+++ b/drivers/net/i40e/base/i40e_dcb.c
@@ -315,9 +315,15 @@ static void i40e_parse_cee_pgcfg_tlv(struct 
i40e_cee_feat_tlv *tlv,
 *|pg0|pg1|pg2|pg3|pg4|pg5|pg6|pg7|
 *-
 */
-   for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
+   for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
etscfg->tcbwtable[i] = buf[offset++];
 
+   if (etscfg->prioritytable[i] == I40E_CEE_PGID_STRICT)
+   dcbcfg->etscfg.tsatable[i] = I40E_IEEE_TSA_STRICT;
+   else
+   dcbcfg->etscfg.tsatable[i] = I40E_IEEE_TSA_ETS;
+   }
+
/* Number of TCs supported (1 octet) */
etscfg->maxtcs = buf[offset];
 }
-- 
2.25.1

[dpdk-dev] [PATCH v2 05/14] net/i40e/base: define new Shadow RAM pointers

[Robin Zhang]

Add definitions for Shadow RAM pointers: 6th FPA module, 5th FPA module
in X722 and Preservation Rules Module.

Signed-off-by: Stanislaw Grzeszczak 
Signed-off-by: Robin Zhang 
---
 drivers/net/i40e/base/i40e_type.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/i40e/base/i40e_type.h 
b/drivers/net/i40e/base/i40e_type.h
index cf41345834..e5a3729183 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -1555,6 +1555,9 @@ struct i40e_hw_port_stats {
 #define I40E_SR_FEATURE_CONFIGURATION_PTR  0x49
 #define I40E_SR_CONFIGURATION_METADATA_PTR 0x4D
 #define I40E_SR_IMMEDIATE_VALUES_PTR   0x4E
+#define I40E_SR_PRESERVATION_RULES_PTR 0x70
+#define I40E_X722_SR_5TH_FREE_PROVISION_AREA_PTR   0x71
+#define I40E_SR_6TH_FREE_PROVISION_AREA_PTR0x71
 
 /* Auxiliary field, mask and shift definition for Shadow RAM and NVM Flash */
 #define I40E_SR_VPD_MODULE_MAX_SIZE1024
-- 
2.25.1

[dpdk-dev] [PATCH v2 06/14] net/i40e/base: fix PHY type identifiers for 2.5G and 5G adapters

[Robin Zhang]

Unlike other supported adapters, 2.5G and 5G use different
PHY type identifiers for reading/writing PHY settings
and for reading link status. This commit intruduces
separate PHY identifiers for these two operation types.

Fixes: 988ed63c7441 ("net/i40e/base: add support for Carlsville device")
Cc: sta...@dpdk.org

Signed-off-by: Dawid Lukwinski 
Signed-off-by: Robin Zhang 
---
 drivers/net/i40e/base/i40e_adminq_cmd.h | 6 --
 drivers/net/i40e/base/i40e_common.c | 4 ++--
 drivers/net/i40e/base/i40e_type.h   | 8 ++--
 3 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h 
b/drivers/net/i40e/base/i40e_adminq_cmd.h
index a73a08aae6..1aafe1de38 100644
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -1947,8 +1947,10 @@ enum i40e_aq_phy_type {
I40E_PHY_TYPE_25GBASE_LR= 0x22,
I40E_PHY_TYPE_25GBASE_AOC   = 0x23,
I40E_PHY_TYPE_25GBASE_ACC   = 0x24,
-   I40E_PHY_TYPE_2_5GBASE_T= 0x30,
-   I40E_PHY_TYPE_5GBASE_T  = 0x31,
+   I40E_PHY_TYPE_2_5GBASE_T= 0x26,
+   I40E_PHY_TYPE_5GBASE_T  = 0x27,
+   I40E_PHY_TYPE_2_5GBASE_T_LINK_STATUS= 0x30,
+   I40E_PHY_TYPE_5GBASE_T_LINK_STATUS  = 0x31,
I40E_PHY_TYPE_MAX,
I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP   = 0xFD,
I40E_PHY_TYPE_EMPTY = 0xFE,
diff --git a/drivers/net/i40e/base/i40e_common.c 
b/drivers/net/i40e/base/i40e_common.c
index 32642f3e2b..ceedec68bf 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -1280,8 +1280,8 @@ STATIC enum i40e_media_type i40e_get_media_type(struct 
i40e_hw *hw)
break;
case I40E_PHY_TYPE_100BASE_TX:
case I40E_PHY_TYPE_1000BASE_T:
-   case I40E_PHY_TYPE_2_5GBASE_T:
-   case I40E_PHY_TYPE_5GBASE_T:
+   case I40E_PHY_TYPE_2_5GBASE_T_LINK_STATUS:
+   case I40E_PHY_TYPE_5GBASE_T_LINK_STATUS:
case I40E_PHY_TYPE_10GBASE_T:
media = I40E_MEDIA_TYPE_BASET;
break;
diff --git a/drivers/net/i40e/base/i40e_type.h 
b/drivers/net/i40e/base/i40e_type.h
index e5a3729183..0323887550 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -329,12 +329,8 @@ struct i40e_phy_info {
 I40E_PHY_TYPE_OFFSET)
 #define I40E_CAP_PHY_TYPE_25GBASE_ACC BIT_ULL(I40E_PHY_TYPE_25GBASE_ACC + \
 I40E_PHY_TYPE_OFFSET)
-/* Offset for 2.5G/5G PHY Types value to bit number conversion */
-#define I40E_PHY_TYPE_OFFSET2 (-10)
-#define I40E_CAP_PHY_TYPE_2_5GBASE_T BIT_ULL(I40E_PHY_TYPE_2_5GBASE_T + \
-I40E_PHY_TYPE_OFFSET2)
-#define I40E_CAP_PHY_TYPE_5GBASE_T BIT_ULL(I40E_PHY_TYPE_5GBASE_T + \
-I40E_PHY_TYPE_OFFSET2)
+#define I40E_CAP_PHY_TYPE_2_5GBASE_T BIT_ULL(I40E_PHY_TYPE_2_5GBASE_T)
+#define I40E_CAP_PHY_TYPE_5GBASE_T BIT_ULL(I40E_PHY_TYPE_5GBASE_T)
 #define I40E_HW_CAP_MAX_GPIO   30
 #define I40E_HW_CAP_MDIO_PORT_MODE_MDIO0
 #define I40E_HW_CAP_MDIO_PORT_MODE_I2C 1
-- 
2.25.1

[dpdk-dev] [PATCH v2 07/14] net/i40e/base: fix PF reset failed

[Robin Zhang]

PF has to delete all the filters during reset.
If it is fully loaded with filters then it is possible
that it will take more than 200 ms to finish the reset
resulting in timeout during pf_reset and
PF reset failed, -15 error indication.
Increasing the timeout value for PF reset from 200 to 1000
to give PF more time to finish reset if it is loaded with filters.

Fixes: 1e32378f0774 ("i40e/base: increase PF reset max loop limit")
Cc: sta...@dpdk.org

Signed-off-by: Sylwester Dziedziuch 
Signed-off-by: Robin Zhang 
---
 drivers/net/i40e/base/i40e_common.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/i40e/base/i40e_common.c 
b/drivers/net/i40e/base/i40e_common.c
index ceedec68bf..aa424e6010 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -1341,7 +1341,7 @@ STATIC enum i40e_status_code i40e_poll_globr(struct 
i40e_hw *hw,
return I40E_ERR_RESET_FAILED;
 }
 
-#define I40E_PF_RESET_WAIT_COUNT   200
+#define I40E_PF_RESET_WAIT_COUNT   1000
 /**
  * i40e_pf_reset - Reset the PF
  * @hw: pointer to the hardware structure
-- 
2.25.1

[dpdk-dev] [PATCH v2 08/14] net/i40e/base: fix update link data for X722

[Robin Zhang]

The X722 card has 'Link Type' information elsewhere than the X710.
Previously, for all cards, the 'Link Type' information was retrieved by
opcode 0x0607 and this value was wrong for all X722 cards.
Now this information for X722 only is taken by opcode 0x0600
(function: i40e_aq_get_phy_capabilities) instead of an opcode
0x0607 (function: i40e_aq_get_link_info).
All other parameters read by opcode 0x0607 unchanged.

Fixes: e6691b428eb1 ("i40e/base: fix PHY NVM interaction")
Fixes: 75c3de654ead ("net/i40e/base: fix long link down notification time")
Cc: sta...@dpdk.org

Signed-off-by: Jaroslaw Gawin 
Signed-off-by: Robin Zhang 
---
 drivers/net/i40e/base/i40e_common.c | 14 ++
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_common.c 
b/drivers/net/i40e/base/i40e_common.c
index aa424e6010..ef061a6b63 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -2078,6 +2078,9 @@ enum i40e_status_code i40e_aq_get_link_info(struct 
i40e_hw *hw,
 hw->aq.fw_min_ver < 40)) && hw_link_info->phy_type == 0xE)
hw_link_info->phy_type = I40E_PHY_TYPE_10GBASE_SFPP_CU;
 
+   /* 'Get Link Status' response data structure from X722 FW has
+* different format and does not contain this information
+*/
if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE &&
hw->mac.type != I40E_MAC_X722) {
__le32 tmp;
@@ -2948,10 +2951,13 @@ enum i40e_status_code i40e_update_link_info(struct 
i40e_hw *hw)
return status;
 
/* extra checking needed to ensure link info to user is timely */
-   if ((hw->phy.link_info.link_info & I40E_AQ_MEDIA_AVAILABLE) &&
-   ((hw->phy.link_info.link_info & I40E_AQ_LINK_UP) ||
-!(hw->phy.link_info_old.link_info & I40E_AQ_LINK_UP))) {
-   status = i40e_aq_get_phy_capabilities(hw, false, false,
+   if (((hw->phy.link_info.link_info & I40E_AQ_MEDIA_AVAILABLE) &&
+((hw->phy.link_info.link_info & I40E_AQ_LINK_UP) ||
+ !(hw->phy.link_info_old.link_info & I40E_AQ_LINK_UP))) ||
+   hw->mac.type == I40E_MAC_X722) {
+   status = i40e_aq_get_phy_capabilities(hw, false,
+ hw->mac.type ==
+ I40E_MAC_X722,
  &abilities, NULL);
if (status)
return status;
-- 
2.25.1

[dpdk-dev] [PATCH v2 09/14] net/i40e/base: fix AOC media type reported by ethtool

[Robin Zhang]

For Active Optical Cable (AOC) the correct media type is "Fibre",
not "Direct Attach Copper".

Fixes: d749d4d89969 ("i40e/base: add AOC PHY types")
Fixes: aa153cc89ff0 ("net/i40e/base: add new PHY types for 25G AOC and
ACC")
Cc: sta...@dpdk.org

Signed-off-by: Dawid Lukwinski 
Signed-off-by: Robin Zhang 
---
 drivers/net/i40e/base/i40e_common.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_common.c 
b/drivers/net/i40e/base/i40e_common.c
index ef061a6b63..2ca6a13e79 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -1276,6 +1276,9 @@ STATIC enum i40e_media_type i40e_get_media_type(struct 
i40e_hw *hw)
case I40E_PHY_TYPE_40GBASE_LR4:
case I40E_PHY_TYPE_25GBASE_LR:
case I40E_PHY_TYPE_25GBASE_SR:
+   case I40E_PHY_TYPE_10GBASE_AOC:
+   case I40E_PHY_TYPE_25GBASE_AOC:
+   case I40E_PHY_TYPE_40GBASE_AOC:
media = I40E_MEDIA_TYPE_FIBER;
break;
case I40E_PHY_TYPE_100BASE_TX:
@@ -1290,10 +1293,7 @@ STATIC enum i40e_media_type i40e_get_media_type(struct 
i40e_hw *hw)
case I40E_PHY_TYPE_10GBASE_CR1:
case I40E_PHY_TYPE_40GBASE_CR4:
case I40E_PHY_TYPE_10GBASE_SFPP_CU:
-   case I40E_PHY_TYPE_40GBASE_AOC:
-   case I40E_PHY_TYPE_10GBASE_AOC:
case I40E_PHY_TYPE_25GBASE_CR:
-   case I40E_PHY_TYPE_25GBASE_AOC:
case I40E_PHY_TYPE_25GBASE_ACC:
media = I40E_MEDIA_TYPE_DA;
break;
-- 
2.25.1

[dpdk-dev] [PATCH v2 10/14] net/i40e/base: add flags and fields for double vlan processing

[Robin Zhang]

Add flags for outer vlan and include set port parameters in Linux
compilation.
Add flags, which describe port and switch state for both double vlan
functionality and outer vlan processing.

Signed-off-by: Przemyslaw Patynowski 
Signed-off-by: Robin Zhang 
---
 drivers/net/i40e/base/i40e_adminq_cmd.h | 22 --
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h 
b/drivers/net/i40e/base/i40e_adminq_cmd.h
index 1aafe1de38..646cfd0398 100644
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -768,6 +768,7 @@ struct i40e_aqc_set_switch_config {
 #define I40E_AQ_SET_SWITCH_CFG_PROMISC 0x0001
 #define I40E_AQ_SET_SWITCH_CFG_L2_FILTER   0x0002
 #define I40E_AQ_SET_SWITCH_CFG_HW_ATR_EVICT0x0004
+#define I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN  0x0008
__le16  valid_flags;
/* The ethertype in switch_tag is dropped on ingress and used
 * internally by the switch. Set this to zero for the default
@@ -904,7 +905,7 @@ struct i40e_aqc_vsi_properties_data {
u8  sec_reserved;
/* VLAN section */
__le16  pvid; /* VLANS include priority bits */
-   __le16  fcoe_pvid;
+   __le16  outer_vlan;
u8  port_vlan_flags;
 #define I40E_AQ_VSI_PVLAN_MODE_SHIFT   0x00
 #define I40E_AQ_VSI_PVLAN_MODE_MASK(0x03 << \
@@ -920,7 +921,24 @@ struct i40e_aqc_vsi_properties_data {
 #define I40E_AQ_VSI_PVLAN_EMOD_STR_UP  0x08
 #define I40E_AQ_VSI_PVLAN_EMOD_STR 0x10
 #define I40E_AQ_VSI_PVLAN_EMOD_NOTHING 0x18
-   u8  pvlan_reserved[3];
+   u8  outer_vlan_flags;
+#define I40E_AQ_VSI_OVLAN_MODE_SHIFT   0x00
+#define I40E_AQ_VSI_OVLAN_MODE_MASK(0x03 << \
+I40E_AQ_VSI_OVLAN_MODE_SHIFT)
+#define I40E_AQ_VSI_OVLAN_MODE_UNTAGGED0x01
+#define I40E_AQ_VSI_OVLAN_MODE_TAGGED  0x02
+#define I40E_AQ_VSI_OVLAN_MODE_ALL 0x03
+#define I40E_AQ_VSI_OVLAN_INSERT_PVID  0x04
+#define I40E_AQ_VSI_OVLAN_EMOD_SHIFT   0x03
+#define I40E_AQ_VSI_OVLAN_EMOD_MASK(0x03 <<\
+I40E_AQ_VSI_OVLAN_EMOD_SHIFT)
+#define I40E_AQ_VSI_OVLAN_EMOD_SHOW_ALL0x00
+#define I40E_AQ_VSI_OVLAN_EMOD_SHOW_UP 0x01
+#define I40E_AQ_VSI_OVLAN_EMOD_HIDE_ALL0x02
+#define I40E_AQ_VSI_OVLAN_EMOD_NOTHING 0x03
+#define I40E_AQ_VSI_OVLAN_CTRL_ENA 0x04
+
+   u8  pvlan_reserved[2];
/* ingress egress up sections */
__le32  ingress_table; /* bitmap, 3 bits per up */
 #define I40E_AQ_VSI_UP_TABLE_UP0_SHIFT 0
-- 
2.25.1

[dpdk-dev] [PATCH v2 11/14] net/i40e/base: 10GBASE-ER Optical modules recognition

[Robin Zhang]

This change adds a new PHY type for 10GBASE-ER modules.

Signed-off-by: Stanislaw Grzeszczak 
Signed-off-by: Robin Zhang 
---
 drivers/net/i40e/base/i40e_adminq_cmd.h | 2 ++
 drivers/net/i40e/base/i40e_common.c | 1 +
 drivers/net/i40e/base/i40e_type.h   | 1 +
 3 files changed, 4 insertions(+)

diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h 
b/drivers/net/i40e/base/i40e_adminq_cmd.h
index 646cfd0398..c41dc71cdf 100644
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -1945,6 +1945,7 @@ enum i40e_aq_phy_type {
I40E_PHY_TYPE_40GBASE_AOC   = 0xD,
I40E_PHY_TYPE_UNRECOGNIZED  = 0xE,
I40E_PHY_TYPE_UNSUPPORTED   = 0xF,
+   I40E_PHY_TYPE_10GBASE_ER= 0x10,
I40E_PHY_TYPE_100BASE_TX= 0x11,
I40E_PHY_TYPE_1000BASE_T= 0x12,
I40E_PHY_TYPE_10GBASE_T = 0x13,
@@ -1991,6 +1992,7 @@ enum i40e_aq_phy_type {
BIT_ULL(I40E_PHY_TYPE_40GBASE_AOC) | \
BIT_ULL(I40E_PHY_TYPE_UNRECOGNIZED) | \
BIT_ULL(I40E_PHY_TYPE_UNSUPPORTED) | \
+   BIT_ULL(I40E_PHY_TYPE_10GBASE_ER) | \
BIT_ULL(I40E_PHY_TYPE_100BASE_TX) | \
BIT_ULL(I40E_PHY_TYPE_1000BASE_T) | \
BIT_ULL(I40E_PHY_TYPE_10GBASE_T) | \
diff --git a/drivers/net/i40e/base/i40e_common.c 
b/drivers/net/i40e/base/i40e_common.c
index 2ca6a13e79..e077bf8fd3 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -1268,6 +1268,7 @@ STATIC enum i40e_media_type i40e_get_media_type(struct 
i40e_hw *hw)
enum i40e_media_type media;
 
switch (hw->phy.link_info.phy_type) {
+   case I40E_PHY_TYPE_10GBASE_ER:
case I40E_PHY_TYPE_10GBASE_SR:
case I40E_PHY_TYPE_10GBASE_LR:
case I40E_PHY_TYPE_1000BASE_SX:
diff --git a/drivers/net/i40e/base/i40e_type.h 
b/drivers/net/i40e/base/i40e_type.h
index 0323887550..86b9eeeb43 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -294,6 +294,7 @@ struct i40e_phy_info {
 #define I40E_CAP_PHY_TYPE_10GBASE_CR1_CU BIT_ULL(I40E_PHY_TYPE_10GBASE_CR1_CU)
 #define I40E_CAP_PHY_TYPE_10GBASE_AOC BIT_ULL(I40E_PHY_TYPE_10GBASE_AOC)
 #define I40E_CAP_PHY_TYPE_40GBASE_AOC BIT_ULL(I40E_PHY_TYPE_40GBASE_AOC)
+#define I40E_CAP_PHY_TYPE_10GBASE_ER BIT_ULL(I40E_PHY_TYPE_10GBASE_ER)
 #define I40E_CAP_PHY_TYPE_100BASE_TX BIT_ULL(I40E_PHY_TYPE_100BASE_TX)
 #define I40E_CAP_PHY_TYPE_1000BASE_T BIT_ULL(I40E_PHY_TYPE_1000BASE_T)
 #define I40E_CAP_PHY_TYPE_10GBASE_T BIT_ULL(I40E_PHY_TYPE_10GBASE_T)
-- 
2.25.1

[dpdk-dev] [PATCH v2 12/14] net/i40e/base: fix headers to match functions

[Robin Zhang]

Fix several kernel-doc warnings when building with W=1. These changes
are only to comments.

Fixes: 8db9e2a1b232 ("i40e: base driver")
Fixes: 842ea1996335 ("i40e/base: save link module type")
Fixes: fd72a2284a89 ("i40e/base: support LED blinking with new PHY")
Fixes: 788fc17b2dec ("i40e/base: support proxy config for X722")
Cc: sta...@dpdk.org

Signed-off-by: Jesse Brandeburg 
Signed-off-by: Robin Zhang 
---
 drivers/net/i40e/base/i40e_common.c  | 10 +-
 drivers/net/i40e/base/i40e_dcb.c |  2 +-
 drivers/net/i40e/base/i40e_lan_hmc.c |  2 +-
 drivers/net/i40e/base/i40e_nvm.c |  2 +-
 4 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_common.c 
b/drivers/net/i40e/base/i40e_common.c
index e077bf8fd3..3f3896aea4 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -2678,7 +2678,7 @@ enum i40e_status_code i40e_aq_set_vsi_vlan_promisc(struct 
i40e_hw *hw,
 }
 
 /**
- * i40e_get_vsi_params - get VSI configuration info
+ * i40e_aq_get_vsi_params - get VSI configuration info
  * @hw: pointer to the hw struct
  * @vsi_ctx: pointer to a vsi context struct
  * @cmd_details: pointer to command details structure or NULL
@@ -2939,7 +2939,7 @@ enum i40e_status_code i40e_get_link_status(struct i40e_hw 
*hw, bool *link_up)
 }
 
 /**
- * i40e_updatelink_status - update status of the HW network link
+ * i40e_update_link_info - update status of the HW network link
  * @hw: pointer to the hw struct
  **/
 enum i40e_status_code i40e_update_link_info(struct i40e_hw *hw)
@@ -4831,7 +4831,7 @@ enum i40e_status_code i40e_aq_del_udp_tunnel(struct 
i40e_hw *hw, u8 index,
 }
 
 /**
- * i40e_aq_get_switch_resource_alloc (0x0204)
+ * i40e_aq_get_switch_resource_alloc - command (0x0204) to get allocations
  * @hw: pointer to the hw struct
  * @num_entries: pointer to u8 to store the number of resource entries returned
  * @buf: pointer to a user supplied buffer.  This buffer must be large enough
@@ -6978,7 +6978,7 @@ u8 i40e_get_phy_address(struct i40e_hw *hw, u8 dev_num)
 }
 
 /**
- * i40e_blink_phy_led
+ * i40e_blink_phy_link_led
  * @hw: pointer to the HW structure
  * @time: time how long led will blinks in secs
  * @interval: gap between LED on and off in msecs
@@ -7825,7 +7825,7 @@ enum i40e_status_code i40e_aq_set_arp_proxy_config(struct 
i40e_hw *hw,
 }
 
 /**
- * i40e_aq_opc_set_ns_proxy_table_entry
+ * i40e_aq_set_ns_proxy_table_entry
  * @hw: pointer to the HW structure
  * @ns_proxy_table_entry: pointer to NS table entry command struct
  * @cmd_details: pointer to command details
diff --git a/drivers/net/i40e/base/i40e_dcb.c b/drivers/net/i40e/base/i40e_dcb.c
index 27b52bc365..8f9b7e823f 100644
--- a/drivers/net/i40e/base/i40e_dcb.c
+++ b/drivers/net/i40e/base/i40e_dcb.c
@@ -235,7 +235,7 @@ static void i40e_parse_ieee_app_tlv(struct 
i40e_lldp_org_tlv *tlv,
 }
 
 /**
- * i40e_parse_ieee_etsrec_tlv
+ * i40e_parse_ieee_tlv
  * @tlv: IEEE 802.1Qaz TLV
  * @dcbcfg: Local store to update ETS REC data
  *
diff --git a/drivers/net/i40e/base/i40e_lan_hmc.c 
b/drivers/net/i40e/base/i40e_lan_hmc.c
index d3969396f0..d3bd683ff3 100644
--- a/drivers/net/i40e/base/i40e_lan_hmc.c
+++ b/drivers/net/i40e/base/i40e_lan_hmc.c
@@ -516,7 +516,7 @@ enum i40e_status_code i40e_configure_lan_hmc(struct i40e_hw 
*hw,
 }
 
 /**
- * i40e_delete_hmc_object - remove hmc objects
+ * i40e_delete_lan_hmc_object - remove hmc objects
  * @hw: pointer to the HW structure
  * @info: pointer to i40e_hmc_delete_obj_info struct
  *
diff --git a/drivers/net/i40e/base/i40e_nvm.c b/drivers/net/i40e/base/i40e_nvm.c
index 561ed21136..67e58cc195 100644
--- a/drivers/net/i40e/base/i40e_nvm.c
+++ b/drivers/net/i40e/base/i40e_nvm.c
@@ -7,7 +7,7 @@
 #include "i40e_prototype.h"
 
 /**
- * i40e_init_nvm_ops - Initialize NVM function pointers
+ * i40e_init_nvm - Initialize NVM function pointers
  * @hw: pointer to the HW structure
  *
  * Setup the function pointers and the NVM info structure. Should be called
-- 
2.25.1

[dpdk-dev] [PATCH v2 13/14] net/i40e/base: fix potentially uninitialized variables in NVM code

[Robin Zhang]

The status of i40e_read_nvm_word is not checked, so variables set
from this function could be used uninitialized. In this case, preserve
the existing flow that does not block initialization by initializing
these values from the start.

The variable checksum from i40e_calc_nvm_checksum is used before return
value is checked. Fix this logic.

Fixes: 8d6c51fcd24b ("i40e/base: get OEM version")
Fixes: 2db70574247b ("net/i40e/base: limit PF/VF specific code to that driver 
only")
Fixes: 8db9e2a1b232 ("i40e: base driver")
Fixes: 3ed6c3246f43 ("i40e/base: handle AQ timeout when releasing NVM")
Cc: sta...@dpdk.org

Signed-off-by: Christopher Pau 
Signed-off-by: Robin Zhang 
---
 drivers/net/i40e/base/i40e_adminq.c | 6 --
 drivers/net/i40e/base/i40e_nvm.c| 5 +++--
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_adminq.c 
b/drivers/net/i40e/base/i40e_adminq.c
index eafacbdbec..d27ccde29a 100644
--- a/drivers/net/i40e/base/i40e_adminq.c
+++ b/drivers/net/i40e/base/i40e_adminq.c
@@ -648,8 +648,10 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw)
 {
struct i40e_adminq_info *aq = &hw->aq;
enum i40e_status_code ret_code;
-   u16 cfg_ptr, oem_hi, oem_lo;
-   u16 eetrack_lo, eetrack_hi;
+   u16 oem_hi = 0, oem_lo = 0;
+   u16 eetrack_hi = 0;
+   u16 eetrack_lo = 0;
+   u16 cfg_ptr = 0;
int retry = 0;
 
/* verify input for valid configuration */
diff --git a/drivers/net/i40e/base/i40e_nvm.c b/drivers/net/i40e/base/i40e_nvm.c
index 67e58cc195..f385042601 100644
--- a/drivers/net/i40e/base/i40e_nvm.c
+++ b/drivers/net/i40e/base/i40e_nvm.c
@@ -755,10 +755,11 @@ enum i40e_status_code i40e_update_nvm_checksum(struct 
i40e_hw *hw)
DEBUGFUNC("i40e_update_nvm_checksum");
 
ret_code = i40e_calc_nvm_checksum(hw, &checksum);
-   le_sum = CPU_TO_LE16(checksum);
-   if (ret_code == I40E_SUCCESS)
+   if (ret_code == I40E_SUCCESS) {
+   le_sum = CPU_TO_LE16(checksum);
ret_code = i40e_write_nvm_aq(hw, 0x00, I40E_SR_SW_CHECKSUM_WORD,
 1, &le_sum, true);
+   }
 
return ret_code;
 }
-- 
2.25.1

[dpdk-dev] [PATCH v2 14/14] net/i40e/base: update version in readme

[Robin Zhang]

Update base code version in README.

Signed-off-by: Robin Zhang 
---
 drivers/net/i40e/base/README | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/i40e/base/README b/drivers/net/i40e/base/README
index 6af2993116..c84764005b 100644
--- a/drivers/net/i40e/base/README
+++ b/drivers/net/i40e/base/README
@@ -6,7 +6,7 @@ Intel® I40E driver
 ==
 
 This directory contains source code of FreeBSD i40e driver of version
-cid-i40e.2020.08.27.tar.gz released by the team which develops
+cid-i40e.2021.04.29.tar.gz released by the team which develops
 basic drivers for any i40e NIC. The directory of base/ contains the
 original source package.
 This driver is valid for the product(s) listed below
-- 
2.25.1

Re: [dpdk-dev] [PATCH 13/14] net/i40e/base: fix potentially uninitialized variables in NVM code

[Xing, Beilei]

> -Original Message-
> From: Zhang, RobinX 
> Sent: Friday, June 18, 2021 2:39 PM
> To: dev@dpdk.org
> Cc: Xing, Beilei ; Guo, Junfeng
> ; Yang, SteveX ; Zhang,
> RobinX ; sta...@dpdk.org; Pau, Christopher
> 
> Subject: [PATCH 13/14] net/i40e/base: fix potentially uninitialized variables 
> in
> NVM code

Seems there're 2 fixes in the patch, please split them.

> 
> The status of i40e_read_nvm_word is not checked, so variables set from this
> function could be used uninitialized. In this case, preserve the existing flow
> that does not block initialization by initializing these values from the 
> start.
> 
> The variable checksum from i40e_calc_nvm_checksum is used before return
> value is checked. Fix this logic.
> 
> Fixes: 8d6c51fcd24b ("i40e/base: get OEM version")
> Fixes: 2db70574247b ("net/i40e/base: limit PF/VF specific code to that driver
> only")
> Fixes: 8db9e2a1b232 ("i40e: base driver")
> Fixes: 3ed6c3246f43 ("i40e/base: handle AQ timeout when releasing NVM")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Christopher Pau 
> Signed-off-by: Robin Zhang 
> ---
>  drivers/net/i40e/base/i40e_adminq.c | 6 --
>  drivers/net/i40e/base/i40e_nvm.c| 5 +++--
>  2 files changed, 7 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/i40e/base/i40e_adminq.c
> b/drivers/net/i40e/base/i40e_adminq.c
> index eafacbdbec..d27ccde29a 100644
> --- a/drivers/net/i40e/base/i40e_adminq.c
> +++ b/drivers/net/i40e/base/i40e_adminq.c
> @@ -648,8 +648,10 @@ enum i40e_status_code i40e_init_adminq(struct
> i40e_hw *hw)  {
>   struct i40e_adminq_info *aq = &hw->aq;
>   enum i40e_status_code ret_code;
> - u16 cfg_ptr, oem_hi, oem_lo;
> - u16 eetrack_lo, eetrack_hi;
> + u16 oem_hi = 0, oem_lo = 0;
> + u16 eetrack_hi = 0;
> + u16 eetrack_lo = 0;
> + u16 cfg_ptr = 0;
>   int retry = 0;
> 
>   /* verify input for valid configuration */ diff --git
> a/drivers/net/i40e/base/i40e_nvm.c b/drivers/net/i40e/base/i40e_nvm.c
> index 67e58cc195..f385042601 100644
> --- a/drivers/net/i40e/base/i40e_nvm.c
> +++ b/drivers/net/i40e/base/i40e_nvm.c
> @@ -755,10 +755,11 @@ enum i40e_status_code
> i40e_update_nvm_checksum(struct i40e_hw *hw)
>   DEBUGFUNC("i40e_update_nvm_checksum");
> 
>   ret_code = i40e_calc_nvm_checksum(hw, &checksum);
> - le_sum = CPU_TO_LE16(checksum);
> - if (ret_code == I40E_SUCCESS)
> + if (ret_code == I40E_SUCCESS) {
> + le_sum = CPU_TO_LE16(checksum);
>   ret_code = i40e_write_nvm_aq(hw, 0x00,
> I40E_SR_SW_CHECKSUM_WORD,
>1, &le_sum, true);
> + }
> 
>   return ret_code;
>  }
> --
> 2.25.1