Re: [dpdk-dev] [PATCH v4 4/4] examples/ifpga: add example for opae ifpga API
Hi Weil,
Could you pls fix compilation issues and coding style issues? Thanks a lot.
Thanks,
Rosen
> -Original Message-
> From: Huang, Wei
> Sent: Wednesday, December 30, 2020 15:46
> To: dev@dpdk.org; Xu, Rosen ; Zhang, Qi Z
>
> Cc: sta...@dpdk.org; Zhang, Tianfei ; Huang, Wei
>
> Subject: [PATCH v4 4/4] examples/ifpga: add example for opae ifpga API
>
> An example application shows how to use opae ifpga APIs.
> You can test each API by running corresponding command.
>
> Signed-off-by: Wei Huang
> ---
> examples/ifpga/Makefile| 45 ++
> examples/ifpga/commands.c | 1321
>
> examples/ifpga/commands.h | 16 +
> examples/ifpga/main.c | 38 ++
> examples/ifpga/meson.build | 13 +
> examples/meson.build |2 +-
> 6 files changed, 1434 insertions(+), 1 deletion(-) create mode 100644
> examples/ifpga/Makefile create mode 100644 examples/ifpga/commands.c
> create mode 100644 examples/ifpga/commands.h create mode 100644
> examples/ifpga/main.c create mode 100644 examples/ifpga/meson.build
>
> diff --git a/examples/ifpga/Makefile b/examples/ifpga/Makefile new file
> mode 100644 index 0..6bfd5c8b4
> --- /dev/null
> +++ b/examples/ifpga/Makefile
> @@ -0,0 +1,45 @@
> +# SPDX-License-Identifier: BSD-3-Clause # Copyright(c) 2020-2021 Intel
> +Corporation
> +
> +# binary name
> +APP = ifpga
> +
> +# all source are stored in SRCS-y
> +SRCS-y := main.c commands.c
> +
> +# Build using pkg-config variables if possible ifneq ($(shell
> +pkg-config --exists libdpdk && echo 0),0) $(error "no installation of
> +DPDK found") endif
> +
> +all: static
> +.PHONY: shared static
> +shared: build/$(APP)-shared
> + ln -sf $(APP)-shared build/$(APP)
> +static: build/$(APP)-static
> + ln -sf $(APP)-static build/$(APP)
> +
> +PKGCONF ?= pkg-config
> +
> +PC_FILE := $(shell $(PKGCONF) --path libdpdk 2>/dev/null) CFLAGS += -O3
> +$(shell $(PKGCONF) --cflags libdpdk) -I../../drivers/raw/ifpga
> +LDFLAGS_SHARED = $(shell $(PKGCONF) --libs libdpdk) -lrte_bus_pci \
> + -lrte_bus_ifpga -lrte_bus_vdev -lrte_raw_ifpga \
> + -lrte_net_i40e -lrte_net_ipn3ke LDFLAGS_STATIC =
> +$(shell $(PKGCONF) --static --libs libdpdk)
> +
> +CFLAGS += -DALLOW_EXPERIMENTAL_API
> +
> +build/$(APP)-shared: $(SRCS-y) Makefile $(PC_FILE) | build
> + $(CC) $(CFLAGS) $(SRCS-y) -o $@ $(LDFLAGS) $(LDFLAGS_SHARED)
> +
> +build/$(APP)-static: $(SRCS-y) Makefile $(PC_FILE) | build
> + $(CC) $(CFLAGS) $(SRCS-y) -o $@ $(LDFLAGS) $(LDFLAGS_STATIC)
> +
> +build:
> + @mkdir -p $@
> +
> +.PHONY: clean
> +clean:
> + rm -f build/$(APP) build/$(APP)-static build/$(APP)-shared
> + test -d build && rmdir -p build || true
> diff --git a/examples/ifpga/commands.c b/examples/ifpga/commands.c new
> file mode 100644 index 0..91ade26c7
> --- /dev/null
> +++ b/examples/ifpga/commands.c
> @@ -0,0 +1,1321 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2020-2021 Intel Corporation.
> + * All rights reserved.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "commands.h"
> +
> +static int parse_pciaddr(const char *bdf, opae_pci_device *id) {
> + size_t len = 0;
> + unsigned int domain = 0;
> + unsigned int bus = 0;
> + unsigned int devid = 0;
> + unsigned int function = 0;
> +
> + if (!bdf || !id)
> + return -EINVAL;
> +
> + len = strlen(bdf);
> + if ((len < 5) || (len > 12))
> + return -EINVAL;
> +
> + len = sscanf(bdf, "%x:%x:%x.%d", &domain, &bus, &devid,
> &function);
> + if (len == 4) {
> + snprintf(id->bdf, sizeof(id->bdf), "%04x:%02x:%02x.%d",
> + domain, bus, devid, function);
> + } else {
> + len = sscanf(bdf, "%x:%x.%d", &bus, &devid, &function);
> + if (len == 3) {
> + snprintf(id->bdf, sizeof(id->bdf),
> "%04x:%02x:%02x.%d",
> + 0, bus, devid, function);
> + } else {
> + return -EINVAL;
> + }
> + }
> + return 0;
> +}
> +
> +static void uuid_to_str(opae_uuid *id, uuid_str *str) {
> + uint8_t *b = NULL;
> + char *p = NULL;
> + int i, j;
> +
> + if (!id || !str)
> + return;
> +
> + b = &id->b[15];
> + p = str->s;
> + for (i = 0; i < 4; i++, b--, p += 2)
> + sprintf(p, "%02x", *b);
> + sprintf(p++, "-");
> + for (i = 0; i < 3; i++) {
> + for (j = 0; j < 2; j++, b--, p += 2)
> + sprintf(p, "%02x", *b);
> + sprintf(p++, "-");
> + }
> + for (i = 0; i < 6; i++, b--, p += 2)
> + sprintf(p, "%02x", *b);
> +}
> +
> +/* *** GET API VERSION *** */
> +struct cmd_version_result {
> + cmdline_fixed_string_t cmd;
> +};
> +
> +static void cmd_version_parsed(_
Re: [dpdk-dev] [PATCH v4 3/4] raw/ifpga: add opae API for Cyborg
Hi Wei,
Could you pls fix coding style issues? Thanks a lot.
Thanks,
Rosen
> -Original Message-
> From: Huang, Wei
> Sent: Wednesday, December 30, 2020 15:46
> To: dev@dpdk.org; Xu, Rosen ; Zhang, Qi Z
>
> Cc: sta...@dpdk.org; Zhang, Tianfei ; Huang, Wei
>
> Subject: [PATCH v4 3/4] raw/ifpga: add opae API for Cyborg
>
> Cyborg is part of OpenStack, it needs some OPAE type APIs to manage
> PACs (Programmable Acceleration Card) with Intel FPGA. Below major
> functions are added to meets Cyborg requirements.
> 1. opae_init_eal() set up EAL environment.
> 2. opae_cleanup_eal() clean up EAL environment.
> 3. opae_enumerate() searches PAC with specific FPGA.
> 4. opae_get_property() gets properties of FPGA.
> 5. opae_partial_reconfigure() perform partial configuration on FPGA.
> 6. opae_get_image_info() gets information of image file.
> 7. opae_update_flash() updates FPGA flash with specific image file.
> 8. opae_cancel_flash_update() cancel process of FPGA flash update.
> 9. opae_probe_device() manually probe specific FPGA with ifpga driver.
> 10. opae_remove_device() manually remove specific FPGA from ifpga driver.
> 11. opae_bind_driver() binds specific FPGA with specified kernel driver.
> 12. opae_unbind_driver() unbinds specific FPGA from kernel driver.
> 13. opae_reboot_device() reboots specific FPGA (do reconfiguration).
>
> Signed-off-by: Wei Huang
> ---
> v2: fix typo in commit log and ifpga_opae_api.h
> ---
> v3: fix coding style issue in ifpga_opae_api.c
> ---
> v4: enclose macro PCI_EXT_CAP_ID in parentheses
> ---
> drivers/raw/ifpga/ifpga_opae_api.c | 1801
>
> drivers/raw/ifpga/ifpga_opae_api.h | 245
> drivers/raw/ifpga/ifpga_rawdev.c | 152 ++-
> drivers/raw/ifpga/ifpga_rawdev.h | 15 +
> drivers/raw/ifpga/meson.build |4 +-
> 5 files changed, 2210 insertions(+), 7 deletions(-)
> create mode 100644 drivers/raw/ifpga/ifpga_opae_api.c
> create mode 100644 drivers/raw/ifpga/ifpga_opae_api.h
>
> diff --git a/drivers/raw/ifpga/ifpga_opae_api.c
> b/drivers/raw/ifpga/ifpga_opae_api.c
> new file mode 100644
> index 0..9210092ab
> --- /dev/null
> +++ b/drivers/raw/ifpga/ifpga_opae_api.c
> @@ -0,0 +1,1801 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2020 Intel Corporation
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include "base/opae_hw_api.h"
> +#include "base/ifpga_sec_mgr.h"
> +#include "ifpga_rawdev.h"
> +#include "ifpga_opae_api.h"
> +
> +
> +int opae_log_level;
> +FILE *opae_log_file;
> +
> +static opae_api_version api_ver = {21, 2, 0};
> +static int eal_inited;
> +static uint32_t dev_aer[2] = {0};
> +
> +static const char * const log_level_name[] = {"CRITICAL", "ERROR",
> + "WARNING", "INFORMATION", "DEBUG"};
> +static const char * const proc_type_name[] = {"NON-DPDK", "PRIMARY",
> + "SECONDARY"};
> +static const char * const platform_name[] = {"Vista Creek", "Rush Creek",
> + "Darby Creek", "Lightning Creek"};
> +static const char * const release_name[] = {"Pre-Alpha", "Alpha", "Beta",
> "PV"};
> +static const char * const interface_type[] = {"8x10G", "4x25G", "2x1x25G",
> + "4x25G+2x25G", "2x2x25G", "2x1x25Gx2FVL", "1x2x25G"};
> +static const char * const kdrv[] = {OPAE_KDRV_UNKNOWN,
> OPAE_KDRV_IGB_UIO,
> + OPAE_KDRV_VFIO_PCI, OPAE_KDRV_UIO_PCI};
> +
> +RTE_INIT(init_api_env)
> +{
> + eal_inited = 0;
> + opae_log_level = OPAE_LOG_ERR;
> + opae_log_file = NULL;
> + ifpga_rawdev_logtype = 0;
> +
> + opae_log_info("API environment is initialized\n");
> +}
> +
> +RTE_FINI(clean_api_env)
> +{
> + if (opae_log_file) {
> + fclose(opae_log_file);
> + opae_log_file = NULL;
> + }
> + opae_log_info("API environment is cleaned\n");
> +}
> +
> +void opae_get_api_version(opae_api_version *version)
> +{
> + if (version)
> + memcpy(version, &api_ver, sizeof(opae_api_version));
> + opae_log_info("API version is %u.%u.%u\n",
> + api_ver.major, api_ver.minor, api_ver.micro);
> +}
> +
> +int opae_set_log_level(int level)
> +{
> + if ((level >= OPAE_LOG_API) && (level <= OPAE_LOG_DEBUG))
> + opae_log_level = level;
> + opae_log_api("Current log level is %s\n",
> + log_level_name[opae_log_level]);
> + return opae_log_level;
> +}
> +
> +int opae_set_log_file(char *path, int clean)
> +{
> + FILE *f = NULL;
> + time_t start;
> + struct tm *lt = NULL;
> +
> + if (path) {
> + if (clean)
> + f = fopen(path, "w+");
> + else
> + f = fopen(path, "a+");
> +
> + if (f) {
> + if (opae_log_file) {
> + fclose(opae_log_file);
> + opae_log_file = NULL;
> + }
> + time(&start);
> +
Re: [dpdk-dev] [PATCH v14 00/12] Arm build options rework
> > 30/12/2020 20:09, Andrew Boyer: > > > > > On Dec 23, 2020, at 6:47 AM, Juraj Linkeš > wrote: > > > > > > The current way of specifying Arm configuration options is > > > insufficient since we can't identify the SoC we're building for from > > > the MIDR information. For example, we can't distinguish between > > > N1SDP, Graviton2 or Ampere Altra. > > > > > > Add a way to specify the cpu count and numa node count for cross > > > builds and aarch64 -> aarch64 (SoC) builds. > > > > > > > Hello Juraj, > > This is great, you have solved a problem for me before I even knew > > there was one. (We have two SoCs with the same id and pn, but > > different core counts etc.) > > > > Can anyone fill me in on how and when this patchset is going to be taken? > Will it go to dpdk-next-net, or to some other branch? > > It should go in the main branch. > I cannot commit on any date, but for sure it would help if you can do a > detailed review, thanks. Testing on your SoC would be of great help. >
Re: [dpdk-dev] [PATCH v6] eal: add generic thread-local-storage functions
On Wed, 30 Dec 2020 13:12:44 +0200, Tal Shnaiderman wrote: > Add support for tls functionality in EAL. > > The following functions are added: > rte_thread_tls_create_key - function to create a tls data key. > rte_thread_tls_delete_key - function to delete a tls data key. > rte_thread_tls_set_value - function to set value bound to the tls key > rte_thread_tls_get_value - function to get value bound to the tls key > > tls key will be defined by the new type rte_tls_key > > Windows implementation is under librte_eal/windows and > implemented using WIN32 API for Windows only. > > common implementation is under librte_eal/common and > implemented using pthread for UNIX and Windows compilation > using extenral pthread libraries, when supported. > > Signed-off-by: Tal Shnaiderman > --- > v3: switch from pthread shim to generic eal implementation [DmitryK] > v4: modify file names, function names, move unix code to common > for future external pthreads support [DmitryK] > v5: rename var used for extenal pthreads, add description in > meson_options.txt. [DmitryK] > v6: remove external_pthread support as it collide with pthread > shim implementation [DmitryK] > --- Acked-by: Dmitry Kozlyuk
