[dpdk-dev] [PATCH] lib/eventdev: fix null pointer dereferences coverity issue

[Chaitanya Babu Talluri]

One issue caught by Coverity 340075
*deref_ptr: Directly dereferencing pointer qp_info.

In eca_enq_to_cryptodev() qp_info dereferenced without
null check in both session and sessionless crypto ops.

The fix is to access qp_info after null check.

Coverity issue: 340075
Fixes: 7901eac340 ("eventdev: add crypto adapter implementation")
Cc: sta...@dpdk.org

Signed-off-by: Chaitanya Babu Talluri 
---
 lib/librte_eventdev/rte_event_crypto_adapter.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/librte_eventdev/rte_event_crypto_adapter.c 
b/lib/librte_eventdev/rte_event_crypto_adapter.c
index 22d910816..4f3f57348 100644
--- a/lib/librte_eventdev/rte_event_crypto_adapter.c
+++ b/lib/librte_eventdev/rte_event_crypto_adapter.c
@@ -356,7 +356,7 @@ eca_enq_to_cryptodev(struct rte_event_crypto_adapter 
*adapter,
cdev_id = m_data->request_info.cdev_id;
qp_id = m_data->request_info.queue_pair_id;
qp_info = &adapter->cdevs[cdev_id].qpairs[qp_id];
-   if (!qp_info->qp_enabled) {
+   if ((qp_info == NULL) || (!qp_info->qp_enabled)) {
rte_pktmbuf_free(crypto_op->sym->m_src);
rte_crypto_op_free(crypto_op);
continue;
@@ -372,7 +372,7 @@ eca_enq_to_cryptodev(struct rte_event_crypto_adapter 
*adapter,
cdev_id = m_data->request_info.cdev_id;
qp_id = m_data->request_info.queue_pair_id;
qp_info = &adapter->cdevs[cdev_id].qpairs[qp_id];
-   if (!qp_info->qp_enabled) {
+   if ((qp_info == NULL) || (!qp_info->qp_enabled)) {
rte_pktmbuf_free(crypto_op->sym->m_src);
rte_crypto_op_free(crypto_op);
continue;
-- 
2.17.2

Re: [dpdk-dev] [PATCH v2 01/10] build: add an option to enable LTO build

[Ray Kinsella]

On 19/09/2019 16:16, Bruce Richardson wrote:
> On Thu, Sep 19, 2019 at 02:28:04PM +0100, Ray Kinsella wrote:
>>
>>
>> On 19/09/2019 13:35, Andrzej Ostruszka wrote:
>>> On 9/18/19 3:32 PM, Ray Kinsella wrote:
>> ...>
>>> Compilation time is much longer.  In a normal hack|fix/compile/repeat
>>> cycle with "compile" part being simple "make" the link time might be a
>>> bit annoying.  So I imagine keeping LTO off for the most part of the dev
>>> cycle and then at the end when doing release/cleanup turn LTO on - to
>>> either get release build ready or to get some set of warnings that you
>>> address before yet another attempt to release build.  
>>
>> Well look, I would say a few things.
>>
>> 1. I see build times going down dramatically with Meson/Ninja in any case.
> 
> In the general case yes, but mainly it helps if you have a large number of
> cores. For anyone building in a CI with only a couple of cores, meson+ninja
> isn't going to help much.
> 
> /Bruce
> 

Very true, and I completely acknowledge that LTO adds compilation time.
I would just like to see it in or out, not another build time option.

Ray K

[dpdk-dev] [PATCH v5 1/6] examples/ioat: create sample app on ioat driver usage

[Marcin Baran]

From: Pawel Modrak 

A new sample app demonstrating use of driver for CBDMA.
The app receives packets, performs software or hardware
copy, changes packets' MAC addresses (if enabled) and
forwards them. The change covers ports initialization,
closing connection and argument parsing.

Signed-off-by: Pawel Modrak 
Signed-off-by: Marcin Baran 
---
 examples/Makefile |   3 +
 examples/ioat/Makefile|  54 +
 examples/ioat/ioatfwd.c   | 439 ++
 examples/ioat/meson.build |  15 ++
 examples/meson.build  |   1 +
 5 files changed, 512 insertions(+)
 create mode 100644 examples/ioat/Makefile
 create mode 100644 examples/ioat/ioatfwd.c
 create mode 100644 examples/ioat/meson.build

diff --git a/examples/Makefile b/examples/Makefile
index de11dd487..3cb313d7d 100644
--- a/examples/Makefile
+++ b/examples/Makefile
@@ -23,6 +23,9 @@ DIRS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += fips_validation
 DIRS-$(CONFIG_RTE_LIBRTE_FLOW_CLASSIFY) += flow_classify
 DIRS-y += flow_filtering
 DIRS-y += helloworld
+ifeq ($(CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV),y)
+DIRS-$(CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV) += ioat
+endif
 DIRS-$(CONFIG_RTE_LIBRTE_PIPELINE) += ip_pipeline
 ifeq ($(CONFIG_RTE_LIBRTE_LPM),y)
 DIRS-$(CONFIG_RTE_IP_FRAG) += ip_reassembly
diff --git a/examples/ioat/Makefile b/examples/ioat/Makefile
new file mode 100644
index 0..2a4d1da2d
--- /dev/null
+++ b/examples/ioat/Makefile
@@ -0,0 +1,54 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2019 Intel Corporation
+
+# binary name
+APP = ioatfwd
+
+# all source are stored in SRCS-y
+SRCS-y := ioatfwd.c
+
+# Build using pkg-config variables if possible
+ifeq ($(shell pkg-config --exists libdpdk && echo 0),0)
+
+all: shared
+.PHONY: shared static
+shared: build/$(APP)-shared
+   ln -sf $(APP)-shared build/$(APP)
+static: build/$(APP)-static
+   ln -sf $(APP)-static build/$(APP)
+
+PC_FILE := $(shell pkg-config --path libdpdk)
+CFLAGS += -O3 $(shell pkg-config --cflags libdpdk)
+LDFLAGS_SHARED = $(shell pkg-config --libs libdpdk)
+LDFLAGS_STATIC = -Wl,-Bstatic $(shell pkg-config --static --libs libdpdk)
+
+build/$(APP)-shared: $(SRCS-y) Makefile $(PC_FILE) | build
+   $(CC) $(CFLAGS) $(SRCS-y) -o $@ $(LDFLAGS) $(LDFLAGS_SHARED)
+
+build/$(APP)-static: $(SRCS-y) Makefile $(PC_FILE) | build
+   $(CC) $(CFLAGS) $(SRCS-y) -o $@ $(LDFLAGS) $(LDFLAGS_STATIC)
+
+build:
+   @mkdir -p $@
+
+.PHONY: clean
+clean:
+   rm -f build/$(APP) build/$(APP)-static build/$(APP)-shared
+   test -d build && rmdir -p build || true
+
+else # Build using legacy build system
+ifeq ($(RTE_SDK),)
+$(error "Please define RTE_SDK environment variable")
+endif
+
+# Default target, detect a build directory, by looking for a path with a 
.config
+RTE_TARGET ?= $(notdir $(abspath $(dir $(firstword $(wildcard 
$(RTE_SDK)/*/.config)
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+
+CFLAGS += -O3
+CFLAGS += $(WERROR_FLAGS)
+
+include $(RTE_SDK)/mk/rte.extapp.mk
+endif
diff --git a/examples/ioat/ioatfwd.c b/examples/ioat/ioatfwd.c
new file mode 100644
index 0..977ea6a61
--- /dev/null
+++ b/examples/ioat/ioatfwd.c
@@ -0,0 +1,439 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2019 Intel Corporation
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+/* size of ring used for software copying between rx and tx. */
+#define RTE_LOGTYPE_IOAT RTE_LOGTYPE_USER1
+#define MAX_PKT_BURST 32
+#define MEMPOOL_CACHE_SIZE 512
+#define MIN_POOL_SIZE 65536U
+#define CMD_LINE_OPT_MAC_UPDATING "mac-updating"
+#define CMD_LINE_OPT_NO_MAC_UPDATING "no-mac-updating"
+#define CMD_LINE_OPT_PORTMASK "portmask"
+#define CMD_LINE_OPT_NB_QUEUE "nb-queue"
+#define CMD_LINE_OPT_COPY_TYPE "copy-type"
+#define CMD_LINE_OPT_RING_SIZE "ring-size"
+
+/* configurable number of RX/TX ring descriptors */
+#define RX_DEFAULT_RINGSIZE 1024
+#define TX_DEFAULT_RINGSIZE 1024
+
+/* max number of RX queues per port */
+#define MAX_RX_QUEUES_COUNT 8
+
+struct rxtx_port_config {
+   /* common config */
+   uint16_t rxtx_port;
+   uint16_t nb_queues;
+   /* for software copy mode */
+   struct rte_ring *rx_to_tx_ring;
+   /* for IOAT rawdev copy mode */
+   uint16_t ioat_ids[MAX_RX_QUEUES_COUNT];
+};
+
+struct rxtx_transmission_config {
+   struct rxtx_port_config ports[RTE_MAX_ETHPORTS];
+   uint16_t nb_ports;
+   uint16_t nb_lcores;
+};
+
+typedef enum copy_mode_t {
+#define COPY_MODE_SW "sw"
+   COPY_MODE_SW_NUM,
+#define COPY_MODE_IOAT "rawdev"
+   COPY_MODE_IOAT_NUM,
+   COPY_MODE_INVALID_NUM,
+   COPY_MODE_SIZE_NUM = COPY_MODE_INVALID_NUM
+} copy_mode_t;
+
+/* mask of enabled ports */
+static uint32_t ioat_enabled_port_mask;
+
+/* number of RX queues per port */
+static uint16_t nb_queues = 1;
+
+/* MAC updating enabled by default. */
+static int mac_updating = 1;
+
+/* hardare copy mode enabled by default. */
+static copy_mode_t copy_mod

[dpdk-dev] [PATCH v5 2/6] examples/ioat: add software copy support

[Marcin Baran]

Added support for copying packets
using software copy mode and MAC address
changing. The copies are processed using
one lcore.

Signed-off-by: Marcin Baran 
Signed-off-by: Pawel Modrak 
---
 examples/ioat/ioatfwd.c | 211 +++-
 1 file changed, 188 insertions(+), 23 deletions(-)

diff --git a/examples/ioat/ioatfwd.c b/examples/ioat/ioatfwd.c
index 977ea6a61..3a092c6cf 100644
--- a/examples/ioat/ioatfwd.c
+++ b/examples/ioat/ioatfwd.c
@@ -13,7 +13,7 @@
 #include 
 #include 
 
-/* size of ring used for software copying between rx and tx. */
+ /* size of ring used for software copying between rx and tx. */
 #define RTE_LOGTYPE_IOAT RTE_LOGTYPE_USER1
 #define MAX_PKT_BURST 32
 #define MEMPOOL_CACHE_SIZE 512
@@ -89,6 +89,142 @@ static struct rte_ether_addr 
ioat_ports_eth_addr[RTE_MAX_ETHPORTS];
 static struct rte_eth_dev_tx_buffer *tx_buffer[RTE_MAX_ETHPORTS];
 struct rte_mempool *ioat_pktmbuf_pool;
 
+static void
+update_mac_addrs(struct rte_mbuf *m, uint32_t dest_portid)
+{
+   struct rte_ether_hdr *eth;
+   void *tmp;
+
+   eth = rte_pktmbuf_mtod(m, struct rte_ether_hdr *);
+
+   /* 02:00:00:00:00:xx - overwriting 2 bytes of source address but
+* it's acceptable cause it gets overwritten by rte_ether_addr_copy
+*/
+   tmp = ð->d_addr.addr_bytes[0];
+   *((uint64_t *)tmp) = 0x0002 + ((uint64_t)dest_portid << 40);
+
+   /* src addr */
+   rte_ether_addr_copy(&ioat_ports_eth_addr[dest_portid], ð->s_addr);
+}
+
+static inline void
+pktmbuf_sw_copy(struct rte_mbuf *src, struct rte_mbuf *dst)
+{
+   /* Copy packet metadata */
+   rte_memcpy(&dst->rearm_data,
+   &src->rearm_data,
+   offsetof(struct rte_mbuf, cacheline1)
+   - offsetof(struct rte_mbuf, rearm_data));
+
+   /* Copy packet data */
+   rte_memcpy(rte_pktmbuf_mtod(dst, char *),
+   rte_pktmbuf_mtod(src, char *), src->data_len);
+}
+
+/* Receive packets on one port and enqueue to IOAT rawdev or rte_ring. */
+static void
+ioat_rx_port(struct rxtx_port_config *rx_config)
+{
+   uint32_t nb_rx, nb_enq, i, j;
+   struct rte_mbuf *pkts_burst[MAX_PKT_BURST];
+
+   for (i = 0; i < rx_config->nb_queues; i++) {
+
+   nb_rx = rte_eth_rx_burst(rx_config->rxtx_port, i,
+   pkts_burst, MAX_PKT_BURST);
+
+   if (nb_rx == 0)
+   continue;
+
+   /* Perform packet software copy, free source packets */
+   int ret;
+   struct rte_mbuf *pkts_burst_copy[MAX_PKT_BURST];
+
+   ret = rte_mempool_get_bulk(ioat_pktmbuf_pool,
+   (void *)pkts_burst_copy, nb_rx);
+
+   if (unlikely(ret < 0))
+   rte_exit(EXIT_FAILURE,
+   "Unable to allocate memory.\n");
+
+   for (j = 0; j < nb_rx; j++)
+   pktmbuf_sw_copy(pkts_burst[j],
+   pkts_burst_copy[j]);
+
+   rte_mempool_put_bulk(ioat_pktmbuf_pool,
+   (void *)pkts_burst, nb_rx);
+
+   nb_enq = rte_ring_enqueue_burst(
+   rx_config->rx_to_tx_ring,
+   (void *)pkts_burst_copy, nb_rx, NULL);
+
+   /* Free any not enqueued packets. */
+   rte_mempool_put_bulk(ioat_pktmbuf_pool,
+   (void *)&pkts_burst_copy[nb_enq],
+   nb_rx - nb_enq);
+   }
+}
+
+/* Transmit packets from IOAT rawdev/rte_ring for one port. */
+static void
+ioat_tx_port(struct rxtx_port_config *tx_config)
+{
+   uint32_t i, nb_dq = 0;
+   struct rte_mbuf *mbufs_dst[MAX_PKT_BURST];
+
+   /* Deque the mbufs from rx_to_tx_ring. */
+   nb_dq = rte_ring_dequeue_burst(tx_config->rx_to_tx_ring,
+   (void *)mbufs_dst, MAX_PKT_BURST, NULL);
+
+   if (nb_dq == 0)
+   return;
+
+   /* Update macs if enabled */
+   if (mac_updating) {
+   for (i = 0; i < nb_dq; i++)
+   update_mac_addrs(mbufs_dst[i],
+   tx_config->rxtx_port);
+   }
+
+   const uint16_t nb_tx = rte_eth_tx_burst(tx_config->rxtx_port,
+   0, (void *)mbufs_dst, nb_dq);
+
+   /* Free any unsent packets. */
+   if (unlikely(nb_tx < nb_dq))
+   rte_mempool_put_bulk(ioat_pktmbuf_pool,
+   (void *)&mbufs_dst[nb_tx],
+   nb_dq - nb_tx);
+}
+
+/* Main rx and tx loop if only one slave lcore available */
+static void
+rxtx_main_loop(void)
+{
+   uint16_t i;
+   uint16_t nb_ports = cfg.nb_ports;
+
+   RTE_LOG(INFO, IOAT, "Entering main rx and tx loop for copy on"
+   " lcore %u\n", rte_lcore_id());
+
+   while (!force_quit)
+   for (i = 0; i < nb_ports; i++) {
+   ioat_rx_port(&cfg.ports[i]);
+   ioat_tx_port(&cf

[dpdk-dev] [PATCH v5 0/6] examples/ioat: sample app on ioat driver usage

[Marcin Baran]

A new sample app demonstrating use of driver for CBDMA.
The app receives packets, performs software or hardware
copy, changes packets' MAC addresses (if enabled) and
forwards them. The patch includes sample application as
well as it's guide.

v5:
 - change dependency name from 'pmd_ioat' to 'rawdev_ioat'
   fixing build errors (branch diverged from master)

v4:
 - fix meson build support check

v3:
 - add check for meson build whether IOAT is supported

v2:
 - change printing total stats to be deltas
 - update documentation
 - fix 1 thread/sw copy/multiple Rx queues packet dropping
 - divide patch into several presenting functional change

Marcin Baran (4):
  examples/ioat: add software copy support
  examples/ioat: add rawdev copy mode support
  examples/ioat: add stats printing for each port
  doc/guides/: provide IOAT sample app guide

Pawel Modrak (2):
  examples/ioat: create sample app on ioat driver usage
  examples/ioat: add two threads configuration

 doc/guides/sample_app_ug/index.rst |1 +
 doc/guides/sample_app_ug/intro.rst |4 +
 doc/guides/sample_app_ug/ioat.rst  |  764 +
 examples/Makefile  |3 +
 examples/ioat/Makefile |   54 ++
 examples/ioat/ioatfwd.c| 1025 
 examples/ioat/meson.build  |   15 +
 examples/meson.build   |1 +
 8 files changed, 1867 insertions(+)
 create mode 100644 doc/guides/sample_app_ug/ioat.rst
 create mode 100644 examples/ioat/Makefile
 create mode 100644 examples/ioat/ioatfwd.c
 create mode 100644 examples/ioat/meson.build

-- 
2.22.0.windows.1

[dpdk-dev] [PATCH v5 4/6] examples/ioat: add two threads configuration

[Marcin Baran]

From: Pawel Modrak 

Added possibility to use two lcores: first for
packet receiving and copying, second for packets
sending.

Signed-off-by: Pawel Modrak 
Signed-off-by: Marcin Baran 
---
 examples/ioat/ioatfwd.c | 92 ++---
 1 file changed, 67 insertions(+), 25 deletions(-)

diff --git a/examples/ioat/ioatfwd.c b/examples/ioat/ioatfwd.c
index c66ce7e49..4c51db6bd 100644
--- a/examples/ioat/ioatfwd.c
+++ b/examples/ioat/ioatfwd.c
@@ -161,7 +161,6 @@ ioat_enqueue_packets(struct rte_mbuf **pkts,
rte_mempool_put_bulk(ioat_pktmbuf_pool, (void *)&pkts_copy[i],
nb_rx - i);
 
-
return ret;
 }
 
@@ -226,8 +225,8 @@ ioat_tx_port(struct rxtx_port_config *tx_config)
struct rte_mbuf *mbufs_dst[MAX_PKT_BURST];
 
if (copy_mode == COPY_MODE_IOAT_NUM) {
-   /* Deque the mbufs from IOAT device. */
for (i = 0; i < tx_config->nb_queues; i++) {
+   /* Deque the mbufs from IOAT device. */
nb_dq = rte_ioat_completed_copies(
tx_config->ioat_ids[i], MAX_PKT_BURST,
(void *)mbufs_src, (void *)mbufs_dst);
@@ -256,31 +255,64 @@ ioat_tx_port(struct rxtx_port_config *tx_config)
nb_dq - nb_tx);
}
} else {
-   /* Deque the mbufs from rx_to_tx_ring. */
-   nb_dq = rte_ring_dequeue_burst(tx_config->rx_to_tx_ring,
-   (void *)mbufs_dst, MAX_PKT_BURST, NULL);
-
-   if (nb_dq == 0)
-   return;
-
-   /* Update macs if enabled */
-   if (mac_updating) {
-   for (i = 0; i < nb_dq; i++)
-   update_mac_addrs(mbufs_dst[i],
-   tx_config->rxtx_port);
-   }
+   for (i = 0; i < tx_config->nb_queues; i++) {
+   /* Deque the mbufs from IOAT device. */
+   nb_dq = rte_ring_dequeue_burst(tx_config->rx_to_tx_ring,
+   (void *)mbufs_dst, MAX_PKT_BURST, NULL);
 
-   const uint16_t nb_tx = rte_eth_tx_burst(tx_config->rxtx_port,
-   0, (void *)mbufs_dst, nb_dq);
+   if (nb_dq == 0)
+   return;
 
-   /* Free any unsent packets. */
-   if (unlikely(nb_tx < nb_dq))
-   rte_mempool_put_bulk(ioat_pktmbuf_pool,
-   (void *)&mbufs_dst[nb_tx],
-   nb_dq - nb_tx);
+   /* Update macs if enabled */
+   if (mac_updating) {
+   for (j = 0; j < nb_dq; j++)
+   update_mac_addrs(mbufs_dst[j],
+   tx_config->rxtx_port);
+   }
+
+   const uint16_t nb_tx =
+   rte_eth_tx_burst(tx_config->rxtx_port, 0,
+   (void *)mbufs_dst, nb_dq);
+
+   /* Free any unsent packets. */
+   if (unlikely(nb_tx < nb_dq))
+   rte_mempool_put_bulk(ioat_pktmbuf_pool,
+   (void *)&mbufs_dst[nb_tx],
+   nb_dq - nb_tx);
+   }
}
 }
 
+/* Main rx processing loop for IOAT rawdev. */
+static void
+rx_main_loop(void)
+{
+   uint16_t i;
+   uint16_t nb_ports = cfg.nb_ports;
+
+   RTE_LOG(INFO, IOAT, "Entering main rx loop for copy on lcore %u\n",
+   rte_lcore_id());
+
+   while (!force_quit)
+   for (i = 0; i < nb_ports; i++)
+   ioat_rx_port(&cfg.ports[i]);
+}
+
+/* Main tx processing loop for hardware copy. */
+static void
+tx_main_loop(void)
+{
+   uint16_t i;
+   uint16_t nb_ports = cfg.nb_ports;
+
+   RTE_LOG(INFO, IOAT, "Entering main tx loop for copy on lcore %u\n",
+   rte_lcore_id());
+
+   while (!force_quit)
+   for (i = 0; i < nb_ports; i++)
+   ioat_tx_port(&cfg.ports[i]);
+}
+
 /* Main rx and tx loop if only one slave lcore available */
 static void
 rxtx_main_loop(void)
@@ -305,9 +337,19 @@ static void start_forwarding_cores(void)
RTE_LOG(INFO, IOAT, "Entering %s on lcore %u\n",
__func__, rte_lcore_id());
 
-   lcore_id = rte_get_next_lcore(lcore_id, true, true);
-   rte_eal_remote_launch((lcore_function_t *)rxtx_main_loop,
-   NULL, lcore_id);
+   if (cfg.nb_lcores == 1) {
+   lcore_id = rte_get_next_lcore(lcore_id, true, true);
+   rte_eal_remote_launch((lcore_function_t *)rxtx_main_loop,
+   NULL, lcore_id);
+   } else if (cfg.nb_lcores > 1) {
+   lcore_i

[dpdk-dev] [PATCH v5 3/6] examples/ioat: add rawdev copy mode support

[Marcin Baran]

Added support for copying packets using
rawdev device. Each port's Rx queue is
assigned DMA channel for copy.

Signed-off-by: Marcin Baran 
Signed-off-by: Pawel Modrak 
---
 examples/ioat/ioatfwd.c | 236 
 1 file changed, 189 insertions(+), 47 deletions(-)

diff --git a/examples/ioat/ioatfwd.c b/examples/ioat/ioatfwd.c
index 3a092c6cf..c66ce7e49 100644
--- a/examples/ioat/ioatfwd.c
+++ b/examples/ioat/ioatfwd.c
@@ -121,6 +121,50 @@ pktmbuf_sw_copy(struct rte_mbuf *src, struct rte_mbuf *dst)
rte_pktmbuf_mtod(src, char *), src->data_len);
 }
 
+static uint32_t
+ioat_enqueue_packets(struct rte_mbuf **pkts,
+   uint32_t nb_rx, uint16_t dev_id)
+{
+   int ret;
+   uint32_t i;
+   struct rte_mbuf *pkts_copy[MAX_PKT_BURST];
+
+   const uint64_t addr_offset = RTE_PTR_DIFF(pkts[0]->buf_addr,
+   &pkts[0]->rearm_data);
+
+   ret = rte_mempool_get_bulk(ioat_pktmbuf_pool,
+   (void *)pkts_copy, nb_rx);
+
+   if (unlikely(ret < 0))
+   rte_exit(EXIT_FAILURE, "Unable to allocate memory.\n");
+
+   for (i = 0; i < nb_rx; i++) {
+   /* Perform data copy */
+   ret = rte_ioat_enqueue_copy(dev_id,
+   pkts[i]->buf_iova
+   - addr_offset,
+   pkts_copy[i]->buf_iova
+   - addr_offset,
+   rte_pktmbuf_data_len(pkts[i])
+   + addr_offset,
+   (uintptr_t)pkts[i],
+   (uintptr_t)pkts_copy[i],
+   0 /* nofence */);
+
+   if (ret != 1)
+   break;
+   }
+
+   ret = i;
+   /* Free any not enqueued packets. */
+   rte_mempool_put_bulk(ioat_pktmbuf_pool, (void *)&pkts[i], nb_rx - i);
+   rte_mempool_put_bulk(ioat_pktmbuf_pool, (void *)&pkts_copy[i],
+   nb_rx - i);
+
+
+   return ret;
+}
+
 /* Receive packets on one port and enqueue to IOAT rawdev or rte_ring. */
 static void
 ioat_rx_port(struct rxtx_port_config *rx_config)
@@ -136,32 +180,40 @@ ioat_rx_port(struct rxtx_port_config *rx_config)
if (nb_rx == 0)
continue;
 
-   /* Perform packet software copy, free source packets */
-   int ret;
-   struct rte_mbuf *pkts_burst_copy[MAX_PKT_BURST];
-
-   ret = rte_mempool_get_bulk(ioat_pktmbuf_pool,
-   (void *)pkts_burst_copy, nb_rx);
-
-   if (unlikely(ret < 0))
-   rte_exit(EXIT_FAILURE,
-   "Unable to allocate memory.\n");
-
-   for (j = 0; j < nb_rx; j++)
-   pktmbuf_sw_copy(pkts_burst[j],
-   pkts_burst_copy[j]);
-
-   rte_mempool_put_bulk(ioat_pktmbuf_pool,
-   (void *)pkts_burst, nb_rx);
-
-   nb_enq = rte_ring_enqueue_burst(
-   rx_config->rx_to_tx_ring,
-   (void *)pkts_burst_copy, nb_rx, NULL);
-
-   /* Free any not enqueued packets. */
-   rte_mempool_put_bulk(ioat_pktmbuf_pool,
-   (void *)&pkts_burst_copy[nb_enq],
-   nb_rx - nb_enq);
+   if (copy_mode == COPY_MODE_IOAT_NUM) {
+   /* Perform packet hardware copy */
+   nb_enq = ioat_enqueue_packets(pkts_burst,
+   nb_rx, rx_config->ioat_ids[i]);
+   if (nb_enq > 0)
+   rte_ioat_do_copies(rx_config->ioat_ids[i]);
+   } else {
+   /* Perform packet software copy, free source packets */
+   int ret;
+   struct rte_mbuf *pkts_burst_copy[MAX_PKT_BURST];
+
+   ret = rte_mempool_get_bulk(ioat_pktmbuf_pool,
+   (void *)pkts_burst_copy, nb_rx);
+
+   if (unlikely(ret < 0))
+   rte_exit(EXIT_FAILURE,
+   "Unable to allocate memory.\n");
+
+   for (j = 0; j < nb_rx; j++)
+   pktmbuf_sw_copy(pkts_burst[j],
+   pkts_burst_copy[j]);
+
+   rte_mempool_put_bulk(ioat_pktmbuf_pool,
+   (void *)pkts_burst, nb_rx);
+
+   nb_enq = rte_ring_enqueue_burst(
+   rx_config->rx_to_tx_ring,
+   (void *)pkts_burst_copy, nb_rx, NULL);
+
+   /* Free any not enqueued packets. */
+   rte_mempool_put_bulk(ioat_pktmbuf_pool,
+   (void *)&pkts_burst_copy[nb_enq],
+   nb_rx - nb_enq);
+   }
}
 }
 
@@ -169,31 +2

[dpdk-dev] [PATCH v5 6/6] doc/guides/: provide IOAT sample app guide

[Marcin Baran]

Added guide for IOAT sample app usage and
code description.

Signed-off-by: Marcin Baran 
---
 doc/guides/sample_app_ug/index.rst |   1 +
 doc/guides/sample_app_ug/intro.rst |   4 +
 doc/guides/sample_app_ug/ioat.rst  | 764 +
 3 files changed, 769 insertions(+)
 create mode 100644 doc/guides/sample_app_ug/ioat.rst

diff --git a/doc/guides/sample_app_ug/index.rst 
b/doc/guides/sample_app_ug/index.rst
index f23f8f59e..a6a1d9e7a 100644
--- a/doc/guides/sample_app_ug/index.rst
+++ b/doc/guides/sample_app_ug/index.rst
@@ -23,6 +23,7 @@ Sample Applications User Guides
 ip_reassembly
 kernel_nic_interface
 keep_alive
+ioat
 l2_forward_crypto
 l2_forward_job_stats
 l2_forward_real_virtual
diff --git a/doc/guides/sample_app_ug/intro.rst 
b/doc/guides/sample_app_ug/intro.rst
index 90704194a..74462312f 100644
--- a/doc/guides/sample_app_ug/intro.rst
+++ b/doc/guides/sample_app_ug/intro.rst
@@ -91,6 +91,10 @@ examples are highlighted below.
   forwarding, or ``l3fwd`` application does forwarding based on Internet
   Protocol, IPv4 or IPv6 like a simple router.
 
+* :doc:`Hardware packet copying`: The Hardware packet copying,
+  or ``ioatfwd`` application demonstrates how to use IOAT rawdev driver for
+  copying packets between two threads.
+
 * :doc:`Packet Distributor`: The Packet Distributor
   demonstrates how to distribute packets arriving on an Rx port to different
   cores for processing and transmission.
diff --git a/doc/guides/sample_app_ug/ioat.rst 
b/doc/guides/sample_app_ug/ioat.rst
new file mode 100644
index 0..69621673b
--- /dev/null
+++ b/doc/guides/sample_app_ug/ioat.rst
@@ -0,0 +1,764 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+Copyright(c) 2019 Intel Corporation.
+
+Sample Application of packet copying using Intel\ |reg| QuickData Technology
+
+
+Overview
+
+
+This sample is intended as a demonstration of the basic components of a DPDK
+forwarding application and example of how to use IOAT driver API to make
+packets copies.
+
+Also while forwarding, the MAC addresses are affected as follows:
+
+*   The source MAC address is replaced by the TX port MAC address
+
+*   The destination MAC address is replaced by  02:00:00:00:00:TX_PORT_ID
+
+This application can be used to compare performance of using software packet
+copy with copy done using a DMA device for different sizes of packets.
+The example will print out statistics each second. The stats shows
+received/send packets and packets dropped or failed to copy.
+
+Compiling the Application
+-
+
+To compile the sample application see :doc:`compiling`.
+
+The application is located in the ``ioat`` sub-directory.
+
+
+Running the Application
+---
+
+In order to run the hardware copy application, the copying device
+needs to be bound to user-space IO driver.
+
+Refer to the *IOAT Rawdev Driver for Intel\ |reg| QuickData Technology*
+guide for information on using the driver.
+
+The application requires a number of command line options:
+
+.. code-block:: console
+
+./build/ioatfwd [EAL options] -- -p MASK [-q NQ] [-s RS] [-c ]
+[--[no-]mac-updating]
+
+where,
+
+*   p MASK: A hexadecimal bitmask of the ports to configure
+
+*   q NQ: Number of Rx queues used per port equivalent to CBDMA channels
+per port
+
+*   c CT: Performed packet copy type: software (sw) or hardware using
+DMA (hw)
+
+*   s RS: Size of IOAT rawdev ring for hardware copy mode or rte_ring for
+software copy mode
+
+*   --[no-]mac-updating: Whether MAC address of packets should be changed
+or not
+
+The application can be launched in various configurations depending on
+provided parameters. Each port can use up to 2 lcores: one of them receives
+incoming traffic and makes a copy of each packet. The second lcore then
+updates MAC address and sends the copy. If one lcore per port is used,
+both operations are done sequentially. For each configuration an additional
+lcore is needed since master lcore in use which is responsible for
+configuration, statistics printing and safe deinitialization of all ports
+and devices.
+
+The application can use a maximum of 8 ports.
+
+To run the application in a Linux environment with 3 lcores (one of them
+is master lcore), 1 port (port 0), software copying and MAC updating issue
+the command:
+
+.. code-block:: console
+
+$ ./build/ioatfwd -l 0-2 -n 2 -- -p 0x1 --mac-updating -c sw
+
+To run the application in a Linux environment with 2 lcores (one of them
+is master lcore), 2 ports (ports 0 and 1), hardware copying and no MAC
+updating issue the command:
+
+.. code-block:: console
+
+$ ./build/ioatfwd -l 0-1 -n 1 -- -p 0x3 --no-mac-updating -c hw
+
+Refer to the *DPDK Getting Started Guide* for general information on
+running applications and the Environment Abstraction Layer (EAL) options.
+
+Explanation
+---
+

[dpdk-dev] [PATCH v5 5/6] examples/ioat: add stats printing for each port

[Marcin Baran]

Added printing stats of ports each second.
The stats printing is done using master core.
The information provided informs about packets
received, dropped and send as well as statistics
of rawdev devices.

Signed-off-by: Marcin Baran 
Signed-off-by: Pawel Modrak 
---
 examples/ioat/ioatfwd.c | 245 +++-
 1 file changed, 241 insertions(+), 4 deletions(-)

diff --git a/examples/ioat/ioatfwd.c b/examples/ioat/ioatfwd.c
index 4c51db6bd..c6b994832 100644
--- a/examples/ioat/ioatfwd.c
+++ b/examples/ioat/ioatfwd.c
@@ -48,10 +48,27 @@ struct rxtx_transmission_config {
uint16_t nb_lcores;
 };
 
+/* per-port statistics struct */
+struct ioat_port_statistics {
+   uint64_t rx[RTE_MAX_ETHPORTS];
+   uint64_t tx[RTE_MAX_ETHPORTS];
+   uint64_t tx_dropped[RTE_MAX_ETHPORTS];
+   uint64_t copy_dropped[RTE_MAX_ETHPORTS];
+};
+struct ioat_port_statistics port_statistics;
+
+struct total_statistics {
+   uint64_t total_packets_dropped;
+   uint64_t total_packets_tx;
+   uint64_t total_packets_rx;
+   uint64_t total_successful_enqueues;
+   uint64_t total_failed_enqueues;
+};
+
 typedef enum copy_mode_t {
 #define COPY_MODE_SW "sw"
COPY_MODE_SW_NUM,
-#define COPY_MODE_IOAT "rawdev"
+#define COPY_MODE_IOAT "hw"
COPY_MODE_IOAT_NUM,
COPY_MODE_INVALID_NUM,
COPY_MODE_SIZE_NUM = COPY_MODE_INVALID_NUM
@@ -89,6 +106,204 @@ static struct rte_ether_addr 
ioat_ports_eth_addr[RTE_MAX_ETHPORTS];
 static struct rte_eth_dev_tx_buffer *tx_buffer[RTE_MAX_ETHPORTS];
 struct rte_mempool *ioat_pktmbuf_pool;
 
+/* Print out statistics for one port. */
+static void
+print_port_stats(uint16_t port_id)
+{
+   printf("\nStatistics for port %u --"
+   "\nPackets sent: %34"PRIu64
+   "\nPackets received: %30"PRIu64
+   "\nPackets dropped on tx: %25"PRIu64
+   "\nPackets dropped on copy: %23"PRIu64,
+   port_id,
+   port_statistics.tx[port_id],
+   port_statistics.rx[port_id],
+   port_statistics.tx_dropped[port_id],
+   port_statistics.copy_dropped[port_id]);
+}
+
+/* Print out statistics for one IOAT rawdev device. */
+static void
+print_rawdev_stats(uint32_t dev_id, uint64_t *xstats,
+   unsigned int *ids_xstats, uint16_t nb_xstats,
+   struct rte_rawdev_xstats_name *names_xstats)
+{
+   uint16_t i;
+
+   printf("\nIOAT channel %u", dev_id);
+   for (i = 0; i < nb_xstats; i++)
+   printf("\n\t %s: %*"PRIu64,
+   names_xstats[ids_xstats[i]].name,
+   (int)(37 - strlen(names_xstats[ids_xstats[i]].name)),
+   xstats[i]);
+}
+
+static void
+print_total_stats(struct total_statistics *ts)
+{
+   printf("\nAggregate statistics ==="
+   "\nTotal packets Tx: %24"PRIu64" [pps]"
+   "\nTotal packets Rx: %24"PRIu64" [pps]"
+   "\nTotal packets dropped: %19"PRIu64" [pps]",
+   ts->total_packets_tx,
+   ts->total_packets_rx,
+   ts->total_packets_dropped);
+
+   if (copy_mode == COPY_MODE_IOAT_NUM) {
+   printf("\nTotal IOAT successful enqueues: %8"PRIu64" [enq/s]"
+   "\nTotal IOAT failed enqueues: %12"PRIu64" [enq/s]",
+   ts->total_successful_enqueues,
+   ts->total_failed_enqueues);
+   }
+
+   printf("\n\n");
+}
+
+/* Print out statistics on packets dropped. */
+static void
+print_stats(char *prgname)
+{
+   struct total_statistics ts, delta_ts;
+   uint32_t i, port_id, dev_id;
+   struct rte_rawdev_xstats_name *names_xstats;
+   uint64_t *xstats;
+   unsigned int *ids_xstats, nb_xstats;
+   char status_string[120]; /* to print at the top of the output */
+   int status_strlen;
+
+
+   const char clr[] = { 27, '[', '2', 'J', '\0' };
+   const char topLeft[] = { 27, '[', '1', ';', '1', 'H', '\0' };
+
+   status_strlen = snprintf(status_string, sizeof(status_string),
+   "%s, ", prgname);
+   status_strlen += snprintf(status_string + status_strlen,
+   sizeof(status_string) - status_strlen,
+   "Worker Threads = %d, ",
+   rte_lcore_count() > 2 ? 2 : 1);
+   status_strlen += snprintf(status_string + status_strlen,
+   sizeof(status_string) - status_strlen,
+   "Copy Mode = %s,\n", copy_mode == COPY_MODE_SW_NUM ?
+   COPY_MODE_SW : COPY_MODE_IOAT);
+   status_strlen += snprintf(status_string + status_strlen,
+   sizeof(status_string) - status_strlen,
+   "Updating MAC = %s, ", mac_updating ?
+   "enabled" : "disabled");
+   status_strlen += snprintf(status_string + status_strlen,
+   sizeof(status_string) 

Re: [dpdk-dev] [PATCH v4 11/11] crypto/nitrox: add SHA224 and SHA256 HMAC algorithms

[Akhil Goyal]

Hi Nagadheeraj,
> 
> Add SHA224 and SHA256 HMAC algorithms and it's corresponding tests.
> 
> Signed-off-by: Nagadheeraj Rottela 
> ---
Since your PMD is not merged, you should split this patch and squash it to 
relevant patches in this patchset.

Re: [dpdk-dev] [PATCH v4 01/11] crypto/nitrox: add Nitrox build and doc skeleton

[Akhil Goyal]

> 
> Add bare minimum Nitrox PMD library and doc build infrastructure and
> claim responsibility by updating the maintainers file.
> 
> Signed-off-by: Nagadheeraj Rottela 
> ---

> diff --git a/drivers/crypto/nitrox/nitrox_device.c
> b/drivers/crypto/nitrox/nitrox_device.c
> new file mode 100644
> index 0..d26535dee
> --- /dev/null
> +++ b/drivers/crypto/nitrox/nitrox_device.c
> @@ -0,0 +1,3 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(C) 2019 Marvell International Ltd.
> + */

Adding an empty file is not a good idea.
I believe you can squash your 1/11,2/11,3/11 patches together. These are 
initializing the driver.

Re: [dpdk-dev] [PATCH v4 01/11] crypto/nitrox: add Nitrox build and doc skeleton

[Akhil Goyal]

> -Original Message-
> From: Akhil Goyal
> Sent: Friday, September 20, 2019 2:26 PM
> To: 'Nagadheeraj Rottela' ;
> pablo.de.lara.gua...@intel.com; mattias.ronnb...@ericsson.com
> Cc: dev@dpdk.org; Srikanth Jampala 
> Subject: RE: [PATCH v4 01/11] crypto/nitrox: add Nitrox build and doc skeleton
> 
> 
> >
> > Add bare minimum Nitrox PMD library and doc build infrastructure and
> > claim responsibility by updating the maintainers file.
> >
> > Signed-off-by: Nagadheeraj Rottela 
> > ---
> 
> > diff --git a/drivers/crypto/nitrox/nitrox_device.c
> > b/drivers/crypto/nitrox/nitrox_device.c
> > new file mode 100644
> > index 0..d26535dee
> > --- /dev/null
> > +++ b/drivers/crypto/nitrox/nitrox_device.c
> > @@ -0,0 +1,3 @@
> > +/* SPDX-License-Identifier: BSD-3-Clause
> > + * Copyright(C) 2019 Marvell International Ltd.
> > + */
> 
> Adding an empty file is not a good idea.
> I believe you can squash your 1/11,2/11,3/11 patches together. These are
> initializing the driver.
> 
3/11 can be a separate patch, but 1 -2 should be merged.

Re: [dpdk-dev] [PATCH v4 02/11] crypto/nitrox: add PCI probe and remove routines

[Akhil Goyal]

> 
> +
> +static struct rte_pci_id pci_id_nitrox_map[] = {
> + {
> + /* Nitrox 5 VF */
> + RTE_PCI_DEVICE(0x177d, 0x13)

I think these numbers should be macros.

> + },
> + {.device_id = 0},
> +};
> +

Re: [dpdk-dev] PoC for Backporting

[Yu, PingX]

All,
We finish the basic and performance test using this backported version on CVL 
100 B0. The test result is the same as 19.08’s.

SW configuration:
DPDK version:18.11.2
Firmware version: 0.50 0x80001658 1.2186.0
Driver version: 0.11.2_rc9
PKG: ice-1.2.5.0.secure.pkg

Basic test lists：
uni_pkt: failed in l2pkt_detect and nsh
mac_filter: Passed
pmdrssreta: Passed
tx_preparation: Passed
jumboframes: Passed
shutdown_api: Passed
TestSuite_hello_world: Passed
Blacklist: Passed
Tso: Passed
Coremask: Passed.
Vlan: Passed
Ipgre: Failed in GRE_ipv6_packet_detect. Know issue of DPDK bug 15071.
dual_vlan: failed in vlan_synthetic_test, vlan_tpid_config，vlan_stripq_config 
and vlan_random_test
checksum_offload: Passed
vlan_ethertype_config: Failed. Known issue of DPDK bug 15072.
pmdpcap: Passed
link_status_interrupt: Failed. Known issue of DPDK bug 14025
TestSuite_userspace_ethtool: failed. Known issue of DPDK bug 2513.

Perpormance test: test data/throughput is the same as 19.08.

-  single core test

-  zero packet loss test

Regards,
Yu Ping

From: Kolodziej, KacperX
Sent: Tuesday, September 17, 2019 8:02 PM
To: Mcnamara, John ; Chen, Zhaoyan 

Cc: Modrak, PawelX ; Yu, Liting ; 
Xu, Qian Q ; Richardson, Bruce 
; Zapolski, MarcinX A 
; Baran, MarcinX ; Yu, 
PingX ; Stokes, Ian ; Peng, Yuan 
; Walsh, Richard 
Subject: RE: PoC for Backporting

Hello,

We have tested backported version only on CVL_B0_100G_2PORTS. We have probably 
used ice-0.11.2_rc9.

Regards,
Kacper Kołodziej
-
Intel Corporation (UK) Limited
Registered No. 1134945 (England)
Registered Office: Pipers Way, Swindon SN3 1RJ
VAT No: 860 2173 47

From: Mcnamara, John
Sent: Tuesday, September 17, 2019 1:52 PM
To: Chen, Zhaoyan mailto:zhaoyan.c...@intel.com>>
Cc: Modrak, PawelX mailto:pawelx.mod...@intel.com>>; 
Yu, Liting mailto:liting...@intel.com>>; Xu, Qian Q 
mailto:qian.q...@intel.com>>; Richardson, Bruce 
mailto:bruce.richard...@intel.com>>; Zapolski, 
MarcinX A mailto:marcinx.a.zapol...@intel.com>>; 
Baran, MarcinX mailto:marcinx.ba...@intel.com>>; 
Kolodziej, KacperX 
mailto:kacperx.kolodz...@intel.com>>; Yu, PingX 
mailto:pingx...@intel.com>>; Stokes, Ian 
mailto:ian.sto...@intel.com>>; Peng, Yuan 
mailto:yuan.p...@intel.com>>; Walsh, Richard 
mailto:richard.wa...@intel.com>>
Subject: Re: PoC for Backporting

+ Richard, who is also using a CVL back port as part of an application.

John

On 17 Sep 2019, at 07:51, Chen, Zhaoyan 
mailto:zhaoyan.c...@intel.com>> wrote:
+ Ping, our CW PM into our loop.



Regards,
Zhaoyan Chen

From: Modrak, PawelX
Sent: Tuesday, September 17, 2019 2:10 PM
To: Chen, Zhaoyan mailto:zhaoyan.c...@intel.com>>; 
Mcnamara, John mailto:john.mcnam...@intel.com>>; Yu, 
Liting mailto:liting...@intel.com>>; Xu, Qian Q 
mailto:qian.q...@intel.com>>; Richardson, Bruce 
mailto:bruce.richard...@intel.com>>; Zapolski, 
MarcinX A mailto:marcinx.a.zapol...@intel.com>>; 
Baran, MarcinX mailto:marcinx.ba...@intel.com>>; 
Kolodziej, KacperX 
mailto:kacperx.kolodz...@intel.com>>
Cc: Stokes, Ian mailto:ian.sto...@intel.com>>; Peng, Yuan 
mailto:yuan.p...@intel.com>>
Subject: RE: PoC for Backporting

Hi Kacper,

Can you look at below table and check if this is setup we used for backport 
testing?

Best regards,
Pawel

From: Chen, Zhaoyan
Sent: Tuesday, September 17, 2019 8:04 AM
To: Modrak, PawelX mailto:pawelx.mod...@intel.com>>; 
Mcnamara, John mailto:john.mcnam...@intel.com>>; Yu, 
Liting mailto:liting...@intel.com>>; Xu, Qian Q 
mailto:qian.q...@intel.com>>; Richardson, Bruce 
mailto:bruce.richard...@intel.com>>; Zapolski, 
MarcinX A mailto:marcinx.a.zapol...@intel.com>>; 
Baran, MarcinX mailto:marcinx.ba...@intel.com>>
Cc: Stokes, Ian mailto:ian.sto...@intel.com>>; Peng, Yuan 
mailto:yuan.p...@intel.com>>; Chen, Zhaoyan 
mailto:zhaoyan.c...@intel.com>>
Subject: RE: PoC for Backporting

Thanks, Pawel,

Just confirm the test environment, my understand, since we backport 19.08 -> 
18.11 LTS for CVL support and CLX support. So our testing is focus on

·   CLX platform

·   CVL NIC PMD with following firmware version/driver version/package 
version

·   and private repo 
ssh://g...@gitlab.devtools.intel.com:29418/CoreDataPlane/dpdk-stable.git on 
pawel_back-porting_19.08_cvl_pmd branch

CVL_A1_100G_2PORTS(Apha4)

0.40 0x8fb0

1.2.0.2

0.10.1 (ice)

We

0.50 0x80001658

1.2.5.0

0.11.2_rc9 (ice)

CVL_B0_25G_4PORTS

0.50 0x80001657

1.2.5.0

0.11.2_rc9 (ice)


Please confirm, if any question, please let me know.


Regards,
Zhaoyan Chen

From: Modrak, PawelX
Sent: Thursday, September 12, 2019 8:24 PM
To: Mcnamara, John mailto:john.mcnam...@intel.com>>; 
Yu, Liting mailto:liting...@intel.com>>; Xu, Qian Q 
mailto:qian.q...@intel.com>>; Richardson, Bruce 
mailto:bruce.richard...@intel.com>>; Zapolski, 
MarcinX A mailto:marcinx.a.zapol...@intel.com>>; 
Baran, MarcinX mailto:marcinx.ba...@intel.com>>
Cc: Stokes, Ian mailto:ian.sto...@intel.com>>; Pen

Re: [dpdk-dev] [PATCH v4 03/11] crypto/nitrox: create Nitrox symmetric cryptodev

[Akhil Goyal]

Hi Nagadheeraj,
> 
> Add Nitrox symmetric cryptodev with no operations. Cryptodev
> operations will be added in the next set of patches. Also, registered
> nitrox log type.
> 
> Signed-off-by: Nagadheeraj Rottela 
> ---
>  drivers/crypto/nitrox/Makefile|  2 +
>  drivers/crypto/nitrox/meson.build |  2 +
>  drivers/crypto/nitrox/nitrox_device.c |  9 
>  drivers/crypto/nitrox/nitrox_device.h |  6 +++
>  drivers/crypto/nitrox/nitrox_logs.c   | 14 ++
>  drivers/crypto/nitrox/nitrox_logs.h   | 16 +++
>  drivers/crypto/nitrox/nitrox_sym.c| 83
> +++
>  drivers/crypto/nitrox/nitrox_sym.h| 13 ++
>  8 files changed, 145 insertions(+)
>  create mode 100644 drivers/crypto/nitrox/nitrox_logs.c
>  create mode 100644 drivers/crypto/nitrox/nitrox_logs.h
>  create mode 100644 drivers/crypto/nitrox/nitrox_sym.c
>  create mode 100644 drivers/crypto/nitrox/nitrox_sym.h
> 
> diff --git a/drivers/crypto/nitrox/Makefile b/drivers/crypto/nitrox/Makefile
> index bc0220964..06c96ccd7 100644
> --- a/drivers/crypto/nitrox/Makefile
> +++ b/drivers/crypto/nitrox/Makefile
> @@ -25,5 +25,7 @@ LDLIBS += -lrte_cryptodev
>  # library source files
>  SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_device.c
>  SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_hal.c
> +SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_logs.c
> +SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_sym.c
> 
>  include $(RTE_SDK)/mk/rte.lib.mk
> diff --git a/drivers/crypto/nitrox/meson.build
> b/drivers/crypto/nitrox/meson.build
> index f1c96b84d..1277cf58e 100644
> --- a/drivers/crypto/nitrox/meson.build
> +++ b/drivers/crypto/nitrox/meson.build
> @@ -11,4 +11,6 @@ allow_experimental_apis = true
>  sources = files(
>   'nitrox_device.c',
>   'nitrox_hal.c',
> + 'nitrox_logs.c',
> + 'nitrox_sym.c',
>   )
> diff --git a/drivers/crypto/nitrox/nitrox_device.c
> b/drivers/crypto/nitrox/nitrox_device.c
> index 5628c6d8b..ec2aae588 100644
> --- a/drivers/crypto/nitrox/nitrox_device.c
> +++ b/drivers/crypto/nitrox/nitrox_device.c
> @@ -6,6 +6,7 @@
> 
>  #include "nitrox_device.h"
>  #include "nitrox_hal.h"
> +#include "nitrox_sym.h"
> 
>  TAILQ_HEAD(ndev_list, nitrox_device);
>  static struct ndev_list ndev_list = TAILQ_HEAD_INITIALIZER(ndev_list);
> @@ -63,6 +64,7 @@ nitrox_pci_probe(struct rte_pci_driver *pci_drv
> __rte_unused,
>   struct rte_pci_device *pdev)
>  {
>   struct nitrox_device *ndev;
> + int err;
> 
>   /* Nitrox CSR space */
>   if (!pdev->mem_resource[0].addr)
> @@ -73,6 +75,12 @@ nitrox_pci_probe(struct rte_pci_driver *pci_drv
> __rte_unused,
>   return -ENOMEM;
> 
>   ndev_init(ndev, pdev);
> + err = nitrox_sym_pmd_create(ndev);
> + if (err) {
> + ndev_release(ndev);
> + return err;
> + }
> +
>   return 0;
>  }
> 
> @@ -85,6 +93,7 @@ nitrox_pci_remove(struct rte_pci_device *pdev)
>   if (!ndev)
>   return -ENODEV;
> 
> + nitrox_sym_pmd_destroy(ndev);

Return values not checked. Return type of nitrox_sym_pmd_destroy is not void.

>   ndev_release(ndev);
>   return 0;
>  }
> diff --git a/drivers/crypto/nitrox/nitrox_device.h
> b/drivers/crypto/nitrox/nitrox_device.h
> index 0d0167de2..82ba8b4e4 100644
> --- a/drivers/crypto/nitrox/nitrox_device.h
> +++ b/drivers/crypto/nitrox/nitrox_device.h
> @@ -8,10 +8,16 @@
>  #include 
>  #include 
> 
> +#define NITROX_DEV_NAME_MAX_LEN RTE_CRYPTODEV_NAME_MAX_LEN

Why do you need a wrapper over RTE_CRYPTODEV_NAME_MAX_LEN

> +
> +struct nitrox_sym_device;
> +
>  struct nitrox_device {
>   TAILQ_ENTRY(nitrox_device) next;
>   struct rte_pci_device *pdev;
>   uint8_t *bar_addr;
> + struct nitrox_sym_device *sym_dev;
> + struct rte_device rte_sym_dev;
>   uint16_t nr_queues;
>  };
> 
> diff --git a/drivers/crypto/nitrox/nitrox_logs.c
> b/drivers/crypto/nitrox/nitrox_logs.c
> new file mode 100644
> index 0..007056cb4
> --- /dev/null
> +++ b/drivers/crypto/nitrox/nitrox_logs.c
> @@ -0,0 +1,14 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(C) 2019 Marvell International Ltd.
> + */
> +
> +#include 
> +
> +int nitrox_logtype;
> +
> +RTE_INIT(nitrox_init_log)
> +{
> + nitrox_logtype = rte_log_register("pmd.crypto.nitrox");
> + if (nitrox_logtype >= 0)
> + rte_log_set_level(nitrox_logtype, RTE_LOG_NOTICE);
> +}

Logs can be squashed in your first patch.
Let this patch be specifically to initialize/create the Nitrox symmetric 
cryptodev

> diff --git a/drivers/crypto/nitrox/nitrox_logs.h
> b/drivers/crypto/nitrox/nitrox_logs.h
> new file mode 100644
> index 0..06fd21a95
> --- /dev/null
> +++ b/drivers/crypto/nitrox/nitrox_logs.h
> @@ -0,0 +1,16 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(C) 2019 Marvell International Ltd.
> + */
> +
> +#ifndef _NITROX_LOGS_H_
> +#define _NITROX_LOGS_H_
> +
> +#define LOG_PREFIX 

Re: [dpdk-dev] [PATCH v4 04/11] crypto/nitrox: add basic symmetric cryptodev operations

[Akhil Goyal]

Hi Nagadheeraj,

> Add the following cryptodev operations,
> - dev_configure
> - dev_start
> - dev_stop
> - dev_close
> - dev_infos_get
> 
> Signed-off-by: Nagadheeraj Rottela 
> ---
>  doc/guides/cryptodevs/features/nitrox.ini   | 38 
>  doc/guides/cryptodevs/nitrox.rst| 37 +++
>  drivers/crypto/nitrox/Makefile  |  1 +
>  drivers/crypto/nitrox/meson.build   |  1 +
>  drivers/crypto/nitrox/nitrox_sym.c  | 81 
> -
>  drivers/crypto/nitrox/nitrox_sym_capabilities.c | 57 +
>  drivers/crypto/nitrox/nitrox_sym_capabilities.h | 12 
>  7 files changed, 226 insertions(+), 1 deletion(-)
>  create mode 100644 doc/guides/cryptodevs/features/nitrox.ini
>  create mode 100644 drivers/crypto/nitrox/nitrox_sym_capabilities.c
>  create mode 100644 drivers/crypto/nitrox/nitrox_sym_capabilities.h
> 
> diff --git a/doc/guides/cryptodevs/features/nitrox.ini
> b/doc/guides/cryptodevs/features/nitrox.ini
> new file mode 100644
> index 0..9f9e2619c
> --- /dev/null
> +++ b/doc/guides/cryptodevs/features/nitrox.ini
> @@ -0,0 +1,38 @@
> +;
> +; Supported features of the 'nitrox' crypto driver.
> +;
> +; Refer to default.ini for the full list of available PMD features.
> +;
> +[Features]
> +Symmetric crypto   = Y
> +Sym operation chaining = Y
> +HW Accelerated = Y
> +In Place SGL   = Y
> +OOP SGL In SGL Out = Y
> +OOP SGL In LB  Out = Y
> +OOP LB  In SGL Out = Y
> +OOP LB  In LB  Out = Y

I cannot see any of these features getting supporting in any of the patches 
before 4/11.
You should add documentation update where the feature is supported.

> +
> +;
> +; Supported crypto algorithms of the 'nitrox' crypto driver.
> +;
> +[Cipher]
> +AES CBC (128)  = Y
> +AES CBC (192)  = Y
> +AES CBC (256)  = Y
> +
> +;
> +; Supported authentication algorithms of the 'nitrox' crypto driver.
> +;
> +[Auth]
> +SHA1 HMAC= Y
> +
> +;
> +; Supported AEAD algorithms of the 'nitrox' crypto driver.
> +;
> +[AEAD]
> +
> +;
> +; Supported Asymmetric algorithms of the 'nitrox' crypto driver.
> +;
> +[Asymmetric]
> diff --git a/doc/guides/cryptodevs/nitrox.rst 
> b/doc/guides/cryptodevs/nitrox.rst
> index b6b86dda5..c16a5e393 100644
> --- a/doc/guides/cryptodevs/nitrox.rst
> +++ b/doc/guides/cryptodevs/nitrox.rst
> @@ -9,3 +9,40 @@ cryptographic operations to the NITROX V security
> processor. Detailed
>  information about the NITROX V security processor can be obtained here:
> 
>  *
> https://www.marvell.com/security-solutions/nitrox-security-processors/nitrox-v/
>  
> +

I believe you should add documentation in some later patch for features in each 
of the patch
Which add a certain feature.
Generic documentation should be part of your first patch where you introduced 
the driver.

> +Features
> +
> +
> +Nitrox crypto PMD has support for:
> +
> +Cipher algorithms:
> +
> +* ``RTE_CRYPTO_CIPHER_AES_CBC``
> +
> +Hash algorithms:
> +
> +* ``RTE_CRYPTO_AUTH_SHA1_HMAC``
> +
> +Limitations
> +---
> +
> +* AES_CBC Cipher Only combination is not supported.
> +
> +Installation
> +
> +
> +For compiling the Nitrox crypto PMD, please check if the
> +CONFIG_RTE_LIBRTE_PMD_NITROX setting is set to `y` in
> config/common_base file.
> +
> +* ``CONFIG_RTE_LIBRTE_PMD_NITROX=y``
> +
> +Initialization
> +--
> +
> +Nitrox crypto PMD depend on Nitrox kernel PF driver being installed on the
> +platform. Nitrox PF driver is required to create VF devices which will
> +be used by the PMD. Each VF device can enable one cryptodev PMD.
> +
> +Nitrox kernel PF driver is available as part of CNN55XX-Driver SDK. The SDK
> +and it's installation instructions can be obtained from:
> +`Marvell Technical Documentation Portal
> < https://support.cavium.com/websilo/portal>`_.
> diff --git a/drivers/crypto/nitrox/Makefile b/drivers/crypto/nitrox/Makefile
> index 06c96ccd7..dedb74a34 100644
> --- a/drivers/crypto/nitrox/Makefile
> +++ b/drivers/crypto/nitrox/Makefile
> @@ -27,5 +27,6 @@ SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) +=
> nitrox_device.c
>  SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_hal.c
>  SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_logs.c
>  SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_sym.c
> +SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_sym_capabilities.c
> 

Capabilities should be added in the patch where they are supported.

>  include $(RTE_SDK)/mk/rte.lib.mk
> diff --git a/drivers/crypto/nitrox/meson.build
> b/drivers/crypto/nitrox/meson.build
> index 1277cf58e..7c565c5a4 100644
> --- a/drivers/crypto/nitrox/meson.build
> +++ b/drivers/crypto/nitrox/meson.build
> @@ -13,4 +13,5 @@ sources = files(
>   'nitrox_hal.c',
>   'nitrox_logs.c',
>   'nitrox_sym.c',
> + 'nitrox_sym_capabilities.c',
>   )
> diff --git a/drivers/crypto/nitrox/nitrox_sym.c
> b/drivers/crypto/nitrox/nitrox_sym.c
> index c72016dd0..c05

Re: [dpdk-dev] [PATCH 2/4] compress/qat: add stateful decompression

[Trahe, Fiona]

> -Original Message-
> From: Dybkowski, AdamX
> Sent: Monday, August 26, 2019 8:45 AM
> To: dev@dpdk.org; Trahe, Fiona ; akhil.go...@nxp.com; 
> Trybula, ArturX
> 
> Cc: Dybkowski, AdamX 
> Subject: [PATCH 2/4] compress/qat: add stateful decompression
> 
> This patch adds the stateful decompression feature
> to the DPDK QAT PMD.
> 
> Signed-off-by: Adam Dybkowski 
> ---
>  drivers/compress/qat/qat_comp.c | 256 +---
>  drivers/compress/qat/qat_comp.h |  32 
>  drivers/compress/qat/qat_comp_pmd.c | 166 --
>  drivers/compress/qat/qat_comp_pmd.h |   2 +
>  4 files changed, 423 insertions(+), 33 deletions(-)
> 
> diff --git a/drivers/compress/qat/qat_comp.c b/drivers/compress/qat/qat_comp.c
> index 835aaa838..a80cd6864 100644
> --- a/drivers/compress/qat/qat_comp.c
> +++ b/drivers/compress/qat/qat_comp.c
> @@ -27,22 +27,51 @@ qat_comp_build_request(void *in_op, uint8_t *out_msg,
>   struct rte_comp_op *op = in_op;
>   struct qat_comp_op_cookie *cookie =
>   (struct qat_comp_op_cookie *)op_cookie;
> - struct qat_comp_xform *qat_xform = op->private_xform;
> - const uint8_t *tmpl = (uint8_t *)&qat_xform->qat_comp_req_tmpl;
> + struct qat_comp_stream *stream;
> + struct qat_comp_xform *qat_xform;
> + const uint8_t *tmpl;
>   struct icp_qat_fw_comp_req *comp_req =
>   (struct icp_qat_fw_comp_req *)out_msg;
> 
> - if (unlikely(op->op_type != RTE_COMP_OP_STATELESS)) {
> - QAT_DP_LOG(ERR, "QAT PMD only supports stateless compression "
> - "operation requests, op (%p) is not a "
> - "stateless operation.", op);
> - op->status = RTE_COMP_OP_STATUS_INVALID_ARGS;
> - return -EINVAL;
> + if (op->op_type == RTE_COMP_OP_STATEFUL) {
> + stream = op->stream;
> + qat_xform = &stream->qat_xform;
> + if (unlikely(qat_xform->qat_comp_request_type !=
> +  QAT_COMP_REQUEST_DECOMPRESS)) {
> + QAT_DP_LOG(ERR, "QAT PMD does not support stateful 
> compression");
> + op->status = RTE_COMP_OP_STATUS_INVALID_ARGS;
> + return -EINVAL;
> + }
> + if (unlikely(stream->op_in_progress)) {
> + QAT_DP_LOG(ERR, "QAT PMD does not support running 
> multiple stateless
> operations on the same stream at once");
[Fiona] typo - should be stateful

Re: [dpdk-dev] [PATCH v4 08/11] crypto/nitrox: add burst enqueue and dequeue operations

[Akhil Goyal]

> 
> Add burst enqueue and dequeue operations along with interface for
> symmetric request manager.
> 
> Signed-off-by: Nagadheeraj Rottela 
> ---

I do not see any support of scatter gather in this patchset, but your feature 
list has that.
Was it added by mistake or I have missed something? Could you please point to 
the code where it is supported in case I have missed.

Re: [dpdk-dev] [PATCH v4 11/11] crypto/nitrox: add SHA224 and SHA256 HMAC algorithms

[Akhil Goyal]

> 
> Hi Nagadheeraj,
> >
> > Add SHA224 and SHA256 HMAC algorithms and it's corresponding tests.
> >
> > Signed-off-by: Nagadheeraj Rottela 
> > ---
> Since your PMD is not merged, you should split this patch and squash it to
> relevant patches in this patchset.

One more thing, I saw some extra lines in some of the patches. Could you please 
remove those in your next rev.

Re: [dpdk-dev] [PATCH v4 08/11] crypto/nitrox: add burst enqueue and dequeue operations

[Nagadheeraj Rottela]

Hi Akhil,

> 
> >
> > Add burst enqueue and dequeue operations along with interface for
> > symmetric request manager.
> >
> > Signed-off-by: Nagadheeraj Rottela 
> > ---
> 
> I do not see any support of scatter gather in this patchset, but your feature
> list has that.
> Was it added by mistake or I have missed something? Could you please point
> to the code where it is supported in case I have missed.

It's added in 9/11 patch. The "create_sglist_from_mbuf" function handles single
and multi-segment packets.

Re: [dpdk-dev] [PATCH v4 08/11] crypto/nitrox: add burst enqueue and dequeue operations

[Akhil Goyal]

> 
> Hi Akhil,
> 
> >
> > >
> > > Add burst enqueue and dequeue operations along with interface for
> > > symmetric request manager.
> > >
> > > Signed-off-by: Nagadheeraj Rottela 
> > > ---
> >
> > I do not see any support of scatter gather in this patchset, but your 
> > feature
> > list has that.
> > Was it added by mistake or I have missed something? Could you please point
> > to the code where it is supported in case I have missed.
> 
> It's added in 9/11 patch. The "create_sglist_from_mbuf" function handles 
> single
> and multi-segment packets.

Does it support both inplace and out of place SG?

Re: [dpdk-dev] [PATCH v4 08/11] crypto/nitrox: add burst enqueue and dequeue operations

[Nagadheeraj Rottela]

> 
> >
> > Hi Akhil,
> >
> > >
> > > >
> > > > Add burst enqueue and dequeue operations along with interface for
> > > > symmetric request manager.
> > > >
> > > > Signed-off-by: Nagadheeraj Rottela 
> > > > ---
> > >
> > > I do not see any support of scatter gather in this patchset, but
> > > your feature list has that.
> > > Was it added by mistake or I have missed something? Could you please
> > > point to the code where it is supported in case I have missed.
> >
> > It's added in 9/11 patch. The "create_sglist_from_mbuf" function
> > handles single and multi-segment packets.
> 
> Does it support both inplace and out of place SG?

In place SG is handled by "create_cipher_auth_inplace_outbuf" and out
of place SG is handled by "create_cipher_auth_oop_outbuf".

Re: [dpdk-dev] [PATCH v4 08/11] crypto/nitrox: add burst enqueue and dequeue operations

[Akhil Goyal]

> -Original Message-
> From: Nagadheeraj Rottela 
> Sent: Friday, September 20, 2019 4:54 PM
> To: Akhil Goyal ; pablo.de.lara.gua...@intel.com;
> mattias.ronnb...@ericsson.com
> Cc: dev@dpdk.org; Srikanth Jampala 
> Subject: RE: [PATCH v4 08/11] crypto/nitrox: add burst enqueue and dequeue
> operations
> 
> >
> > >
> > > Hi Akhil,
> > >
> > > >
> > > > >
> > > > > Add burst enqueue and dequeue operations along with interface for
> > > > > symmetric request manager.
> > > > >
> > > > > Signed-off-by: Nagadheeraj Rottela 
> > > > > ---
> > > >
> > > > I do not see any support of scatter gather in this patchset, but
> > > > your feature list has that.
> > > > Was it added by mistake or I have missed something? Could you please
> > > > point to the code where it is supported in case I have missed.
> > >
> > > It's added in 9/11 patch. The "create_sglist_from_mbuf" function
> > > handles single and multi-segment packets.
> >
> > Does it support both inplace and out of place SG?
> 
> In place SG is handled by "create_cipher_auth_inplace_outbuf" and out
> of place SG is handled by "create_cipher_auth_oop_outbuf".
Ok Thanks.

[dpdk-dev] [PATCH v2 0/3] compress/qat: add stateful decompression

[Adam Dybkowski]

This patchet adds the stateful decompression feature
to the QAT PMD, together with the documentation updates
and two new unit tests.

Adam Dybkowski (3):
  common/qat: add QAT RAM bank definitions
  compress/qat: add stateful decompression
  test/compress: add stateful decompression tests

 app/test/test_compressdev.c  | 449 ---
 doc/guides/compressdevs/features/default.ini |  37 +-
 doc/guides/compressdevs/features/qat.ini |  21 +-
 doc/guides/compressdevs/qat_comp.rst |   5 +
 doc/guides/rel_notes/release_19_11.rst   |   4 +
 drivers/common/qat/qat_adf/icp_qat_fw_comp.h |  73 +++
 drivers/compress/qat/qat_comp.c  | 256 ++-
 drivers/compress/qat/qat_comp.h  |  32 ++
 drivers/compress/qat/qat_comp_pmd.c  | 166 ++-
 drivers/compress/qat/qat_comp_pmd.h  |   2 +
 10 files changed, 929 insertions(+), 116 deletions(-)

-- 
2.17.1

[dpdk-dev] [PATCH v2 1/3] common/qat: add QAT RAM bank definitions

[Adam Dybkowski]

This patch adds QAT RAM bank definitions and related macros.

Signed-off-by: Adam Dybkowski 
---
 drivers/common/qat/qat_adf/icp_qat_fw_comp.h | 73 
 1 file changed, 73 insertions(+)

diff --git a/drivers/common/qat/qat_adf/icp_qat_fw_comp.h 
b/drivers/common/qat/qat_adf/icp_qat_fw_comp.h
index 813817720..c89a2c2fd 100644
--- a/drivers/common/qat/qat_adf/icp_qat_fw_comp.h
+++ b/drivers/common/qat/qat_adf/icp_qat_fw_comp.h
@@ -479,4 +479,77 @@ struct icp_qat_fw_comp_resp {
/**< Common response params (checksums and byte counts) */
 };
 
+/* RAM Bank definitions */
+#define QAT_FW_COMP_BANK_FLAG_MASK 0x1
+
+#define QAT_FW_COMP_BANK_I_BITPOS 8
+#define QAT_FW_COMP_BANK_H_BITPOS 7
+#define QAT_FW_COMP_BANK_G_BITPOS 6
+#define QAT_FW_COMP_BANK_F_BITPOS 5
+#define QAT_FW_COMP_BANK_E_BITPOS 4
+#define QAT_FW_COMP_BANK_D_BITPOS 3
+#define QAT_FW_COMP_BANK_C_BITPOS 2
+#define QAT_FW_COMP_BANK_B_BITPOS 1
+#define QAT_FW_COMP_BANK_A_BITPOS 0
+
+/**
+ *
+ * @ingroup icp_qat_fw_comp
+ *  Definition of the ram bank enabled values
+ * @description
+ *  Enumeration used to define whether a ram bank is enabled or not
+ *
+ */
+enum icp_qat_fw_comp_bank_enabled {
+   ICP_QAT_FW_COMP_BANK_DISABLED = 0, /*!< BANK DISABLED */
+   ICP_QAT_FW_COMP_BANK_ENABLED = 1,  /*!< BANK ENABLED */
+   ICP_QAT_FW_COMP_BANK_DELIMITER = 2 /**< Delimiter type */
+};
+
+/**
+ **
+ * @ingroup icp_qat_fw_comp
+ *
+ * @description
+ *  Build the ram bank flags in the compression content descriptor
+ *  which specify which banks are used to save history
+ *
+ * @param bank_i_enable
+ * @param bank_h_enable
+ * @param bank_g_enable
+ * @param bank_f_enable
+ * @param bank_e_enable
+ * @param bank_d_enable
+ * @param bank_c_enable
+ * @param bank_b_enable
+ * @param bank_a_enable
+ */
+#define ICP_QAT_FW_COMP_RAM_FLAGS_BUILD(bank_i_enable, 
\
+   bank_h_enable, \
+   bank_g_enable, \
+   bank_f_enable, \
+   bank_e_enable, \
+   bank_d_enable, \
+   bank_c_enable, \
+   bank_b_enable, \
+   bank_a_enable) \
+   bank_i_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+   << QAT_FW_COMP_BANK_I_BITPOS) |\
+   (((bank_h_enable)&QAT_FW_COMP_BANK_FLAG_MASK)  \
+   << QAT_FW_COMP_BANK_H_BITPOS) |\
+   (((bank_g_enable)&QAT_FW_COMP_BANK_FLAG_MASK)  \
+   << QAT_FW_COMP_BANK_G_BITPOS) |\
+   (((bank_f_enable)&QAT_FW_COMP_BANK_FLAG_MASK)  \
+   << QAT_FW_COMP_BANK_F_BITPOS) |\
+   (((bank_e_enable)&QAT_FW_COMP_BANK_FLAG_MASK)  \
+   << QAT_FW_COMP_BANK_E_BITPOS) |\
+   (((bank_d_enable)&QAT_FW_COMP_BANK_FLAG_MASK)  \
+   << QAT_FW_COMP_BANK_D_BITPOS) |\
+   (((bank_c_enable)&QAT_FW_COMP_BANK_FLAG_MASK)  \
+   << QAT_FW_COMP_BANK_C_BITPOS) |\
+   (((bank_b_enable)&QAT_FW_COMP_BANK_FLAG_MASK)  \
+   << QAT_FW_COMP_BANK_B_BITPOS) |\
+   (((bank_a_enable)&QAT_FW_COMP_BANK_FLAG_MASK)  \
+   << QAT_FW_COMP_BANK_A_BITPOS))
+
 #endif
-- 
2.17.1

[dpdk-dev] [PATCH v2 3/3] test/compress: add stateful decompression tests

[Adam Dybkowski]

This patch adds two new tests that cover the stateful
decompression feature.

Signed-off-by: Adam Dybkowski 
---
 app/test/test_compressdev.c | 449 +++-
 1 file changed, 394 insertions(+), 55 deletions(-)

diff --git a/app/test/test_compressdev.c b/app/test/test_compressdev.c
index 167c48f10..9a7989683 100644
--- a/app/test/test_compressdev.c
+++ b/app/test/test_compressdev.c
@@ -95,11 +95,15 @@ struct interim_data_params {
 };
 
 struct test_data_params {
-   enum rte_comp_op_type state;
+   enum rte_comp_op_type compress_state;
+   enum rte_comp_op_type decompress_state;
enum varied_buff buff_type;
enum zlib_direction zlib_dir;
unsigned int out_of_space;
unsigned int big_data;
+   /* stateful decompression specific parameters */
+   unsigned int decompress_output_block_size;
+   unsigned int decompress_steps_max;
 };
 
 static struct comp_testsuite_params testsuite_params = { 0 };
@@ -237,7 +241,7 @@ generic_ut_setup(void)
.socket_id = rte_socket_id(),
.nb_queue_pairs = 1,
.max_nb_priv_xforms = NUM_MAX_XFORMS,
-   .max_nb_streams = 0
+   .max_nb_streams = 1
};
 
if (rte_compressdev_configure(0, &config) < 0) {
@@ -275,7 +279,7 @@ test_compressdev_invalid_configuration(void)
.socket_id = rte_socket_id(),
.nb_queue_pairs = 1,
.max_nb_priv_xforms = NUM_MAX_XFORMS,
-   .max_nb_streams = 0
+   .max_nb_streams = 1
};
struct rte_compressdev_info dev_info;
 
@@ -724,7 +728,8 @@ test_deflate_comp_decomp(const struct interim_data_params 
*int_data,
struct rte_comp_xform **compress_xforms = int_data->compress_xforms;
struct rte_comp_xform **decompress_xforms = int_data->decompress_xforms;
unsigned int num_xforms = int_data->num_xforms;
-   enum rte_comp_op_type state = test_data->state;
+   enum rte_comp_op_type compress_state = test_data->compress_state;
+   enum rte_comp_op_type decompress_state = test_data->decompress_state;
unsigned int buff_type = test_data->buff_type;
unsigned int out_of_space = test_data->out_of_space;
unsigned int big_data = test_data->big_data;
@@ -754,6 +759,13 @@ test_deflate_comp_decomp(const struct interim_data_params 
*int_data,
rte_compressdev_capability_get(0, RTE_COMP_ALGO_DEFLATE);
char *contig_buf = NULL;
uint64_t compress_checksum[num_bufs];
+   void *stream = NULL;
+   char *all_decomp_data = NULL;
+   unsigned int decomp_produced_data_size = 0;
+   unsigned int step = 0;
+
+   TEST_ASSERT(decompress_state == RTE_COMP_OP_STATELESS || num_bufs == 1,
+   "Number of stateful operations in a step should be 1");
 
if (capa == NULL) {
RTE_LOG(ERR, USER1,
@@ -768,6 +780,12 @@ test_deflate_comp_decomp(const struct interim_data_params 
*int_data,
memset(ops_processed, 0, sizeof(struct rte_comp_op *) * num_bufs);
memset(priv_xforms, 0, sizeof(void *) * num_bufs);
 
+   if (decompress_state == RTE_COMP_OP_STATEFUL) {
+   data_size = strlen(test_bufs[0]) + 1;
+   all_decomp_data = rte_malloc(NULL, data_size,
+RTE_CACHE_LINE_SIZE);
+   }
+
if (big_data)
buf_pool = ts_params->big_mbuf_pool;
else if (buff_type == SGL_BOTH)
@@ -859,9 +877,9 @@ test_deflate_comp_decomp(const struct interim_data_params 
*int_data,
ops[i]->src.offset = 0;
ops[i]->src.length = rte_pktmbuf_pkt_len(uncomp_bufs[i]);
ops[i]->dst.offset = 0;
-   if (state == RTE_COMP_OP_STATELESS) {
+   if (compress_state == RTE_COMP_OP_STATELESS)
ops[i]->flush_flag = RTE_COMP_FLUSH_FINAL;
-   } else {
+   else {
RTE_LOG(ERR, USER1,
"Stateful operations are not supported "
"in these tests yet\n");
@@ -1046,6 +1064,9 @@ test_deflate_comp_decomp(const struct interim_data_params 
*int_data,
(ops_processed[i] + 1);
if (out_of_space == 1 && oos_zlib_compress)
data_size = OUT_OF_SPACE_BUF;
+   else if (test_data->decompress_output_block_size != 0)
+   data_size =
+   test_data->decompress_output_block_size;
else
data_size =
strlen(test_bufs[priv_data->orig_idx]) + 1;
@@ -1066,6 +1087,9 @@ test_deflate_comp_decomp(const struct interim_data_params 
*int_data,
(ops_processed[i] + 1);
i

[dpdk-dev] [PATCH v2 2/3] compress/qat: add stateful decompression

[Adam Dybkowski]

This patch adds the stateful decompression feature
to the DPDK QAT PMD.

Signed-off-by: Adam Dybkowski 
---
 doc/guides/compressdevs/features/default.ini |  37 +--
 doc/guides/compressdevs/features/qat.ini |  21 +-
 doc/guides/compressdevs/qat_comp.rst |   5 +
 doc/guides/rel_notes/release_19_11.rst   |   4 +
 drivers/compress/qat/qat_comp.c  | 256 +--
 drivers/compress/qat/qat_comp.h  |  32 +++
 drivers/compress/qat/qat_comp_pmd.c  | 166 +++-
 drivers/compress/qat/qat_comp_pmd.h  |   2 +
 8 files changed, 462 insertions(+), 61 deletions(-)

diff --git a/doc/guides/compressdevs/features/default.ini 
b/doc/guides/compressdevs/features/default.ini
index 829e4df61..5b783b842 100644
--- a/doc/guides/compressdevs/features/default.ini
+++ b/doc/guides/compressdevs/features/default.ini
@@ -6,21 +6,22 @@
 ; the features table in the documentation.
 ;
 [Features]
-HW Accelerated  =
-CPU SSE =
-CPU AVX =
-CPU AVX2=
-CPU AVX512  =
-CPU NEON=
-Stateful=
-Pass-through=
-OOP SGL In SGL Out  =
-OOP SGL In LB  Out  =
-OOP LB  In SGL Out  =
-Deflate =
-LZS =
-Adler32 =
-Crc32   =
-Adler32&Crc32   =
-Fixed   =
-Dynamic =
+HW Accelerated =
+Stateful Decompression =
+CPU SSE=
+CPU AVX=
+CPU AVX2   =
+CPU AVX512 =
+CPU NEON   =
+Stateful   =
+Pass-through   =
+OOP SGL In SGL Out =
+OOP SGL In LB  Out =
+OOP LB  In SGL Out =
+Deflate=
+LZS=
+Adler32=
+Crc32  =
+Adler32&Crc32  =
+Fixed  =
+Dynamic=
diff --git a/doc/guides/compressdevs/features/qat.ini 
b/doc/guides/compressdevs/features/qat.ini
index 6b1e7f935..bced8f9cf 100644
--- a/doc/guides/compressdevs/features/qat.ini
+++ b/doc/guides/compressdevs/features/qat.ini
@@ -4,13 +4,14 @@
 ; Supported features of 'QAT' compression driver.
 ;
 [Features]
-HW Accelerated  = Y
-OOP SGL In SGL Out  = Y
-OOP SGL In LB  Out  = Y
-OOP LB  In SGL Out  = Y
-Deflate = Y
-Adler32 = Y
-Crc32   = Y
-Adler32&Crc32   = Y
-Fixed   = Y
-Dynamic = Y
+HW Accelerated = Y
+Stateful Decompression = Y
+OOP SGL In SGL Out = Y
+OOP SGL In LB  Out = Y
+OOP LB  In SGL Out = Y
+Deflate= Y
+Adler32= Y
+Crc32  = Y
+Adler32&Crc32  = Y
+Fixed  = Y
+Dynamic= Y
diff --git a/doc/guides/compressdevs/qat_comp.rst 
b/doc/guides/compressdevs/qat_comp.rst
index 6f583a460..6421f767c 100644
--- a/doc/guides/compressdevs/qat_comp.rst
+++ b/doc/guides/compressdevs/qat_comp.rst
@@ -29,6 +29,10 @@ Checksum generation:
 
 * CRC32, Adler and combined checksum
 
+Stateful operation:
+
+* Decompression only
+
 Limitations
 ---
 
@@ -38,6 +42,7 @@ Limitations
 * When using Deflate dynamic huffman encoding for compression, the input size 
(op.src.length)
   must be < CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE from the config file,
   see :ref:`building_qat_config` for more details.
+* Stateful compression is not supported.
 
 
 Installation
diff --git a/doc/guides/rel_notes/release_19_11.rst 
b/doc/guides/rel_notes/release_19_11.rst
index 27cfbd9e3..573683da4 100644
--- a/doc/guides/rel_notes/release_19_11.rst
+++ b/doc/guides/rel_notes/release_19_11.rst
@@ -56,6 +56,10 @@ New Features
  Also, make sure to start the actual text at the margin.
  =
 
+* **Updated the Intel QuickAssist Technology (QAT) compression PMD.**
+
+  Added stateful decompression support in the Intel QuickAssist Technology PMD.
+  Please note that stateful compression is not supported.
 
 Removed Items
 -
diff --git a/drivers/compress/qat/qat_comp.c b/drivers/compress/qat/qat_comp.c
index 835aaa838..8717b7432 100644
--- a/drivers/compress/qat/qat_comp.c
+++ b/drivers/compress/qat/qat_comp.c
@@ -27,22 +27,51 @@ qat_comp_build_request(void *in_op, uint8_t *out_msg,
struct rte_comp_op *op = in_op;
struct qat_comp_op_cookie *cookie =
(struct qat_comp_op_cookie *)op_cookie;
-   struct qat_comp_xform *qat_xform = op->private_xform;
-   const uint8_t *tmpl = (uint8_t *)&qat_xform->qat_comp_req_tmpl;
+   struct qat_comp_stream *stream;
+   struct qat_comp_xform *qat_xform;
+   const uint8_t *tmpl;
struct icp_qat_fw_comp_req *comp_req =
(struct icp_qat_fw_comp_req *)out_msg;
 
-   if (unlikely(op->op_type != RTE_COMP_OP_STATELESS)) {
-   QAT_DP_LOG(ERR, "QAT PMD only supports stateless compression "
-   "operation requests, op (%p) is not a

[dpdk-dev] [PATCH v2 09/22] net/hns3: add support for link_update operation

[Wei Hu (Xavier)]

This patch adds link_update operation to hns3 PMD driver.

Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
v1 -> v2:
Add Link status feature into hns3.ini file
according to Ferruh Yigit's comments.
---
 doc/guides/nics/features/hns3.ini |   1 +
 drivers/net/hns3/hns3_ethdev.c| 162 ++
 2 files changed, 163 insertions(+)

diff --git a/doc/guides/nics/features/hns3.ini 
b/doc/guides/nics/features/hns3.ini
index 2eb78d0..caf1ef7 100644
--- a/doc/guides/nics/features/hns3.ini
+++ b/doc/guides/nics/features/hns3.ini
@@ -4,6 +4,7 @@
 ; Refer to default.ini for the full list of available PMD features.
 ;
 [Features]
+Link status  = Y
 MTU update   = Y
 Unicast MAC filter   = Y
 Multicast MAC filter = Y
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 918a386..3c9bba4 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -28,6 +28,8 @@
 #define HNS3_DEFAULT_PORT_CONF_BURST_SIZE  32
 #define HNS3_DEFAULT_PORT_CONF_QUEUES_NUM  1
 
+#define HNS3_SERVICE_INTERVAL  100 /* us */
+
 int hns3_logtype_init;
 int hns3_logtype_driver;
 
@@ -1050,6 +1052,40 @@ hns3_fw_version_get(struct rte_eth_dev *eth_dev, char 
*fw_version,
 }
 
 static int
+hns3_dev_link_update(struct rte_eth_dev *eth_dev,
+__rte_unused int wait_to_complete)
+{
+   struct hns3_adapter *hns = eth_dev->data->dev_private;
+   struct hns3_hw *hw = &hns->hw;
+   struct hns3_mac *mac = &hw->mac;
+   struct rte_eth_link new_link;
+
+   memset(&new_link, 0, sizeof(new_link));
+   switch (mac->link_speed) {
+   case ETH_SPEED_NUM_10M:
+   case ETH_SPEED_NUM_100M:
+   case ETH_SPEED_NUM_1G:
+   case ETH_SPEED_NUM_10G:
+   case ETH_SPEED_NUM_25G:
+   case ETH_SPEED_NUM_40G:
+   case ETH_SPEED_NUM_50G:
+   case ETH_SPEED_NUM_100G:
+   new_link.link_speed = mac->link_speed;
+   break;
+   default:
+   new_link.link_speed = ETH_SPEED_NUM_100M;
+   break;
+   }
+
+   new_link.link_duplex = mac->link_duplex;
+   new_link.link_status = mac->link_status ? ETH_LINK_UP : ETH_LINK_DOWN;
+   new_link.link_autoneg =
+   !(eth_dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED);
+
+   return rte_eth_linkstatus_set(eth_dev, &new_link);
+}
+
+static int
 hns3_parse_func_status(struct hns3_hw *hw, struct hns3_func_status_cmd *status)
 {
struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
@@ -2306,6 +2342,129 @@ hns3_set_promisc_mode(struct hns3_hw *hw, bool 
en_uc_pmc, bool en_mc_pmc)
 }
 
 static int
+hns3_get_sfp_speed(struct hns3_hw *hw, uint32_t *speed)
+{
+   struct hns3_sfp_speed_cmd *resp;
+   struct hns3_cmd_desc desc;
+   int ret;
+
+   hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_SFP_GET_SPEED, true);
+   resp = (struct hns3_sfp_speed_cmd *)desc.data;
+   ret = hns3_cmd_send(hw, &desc, 1);
+   if (ret == -EOPNOTSUPP) {
+   hns3_err(hw, "IMP do not support get SFP speed %d", ret);
+   return ret;
+   } else if (ret) {
+   hns3_err(hw, "get sfp speed failed %d", ret);
+   return ret;
+   }
+
+   *speed = resp->sfp_speed;
+
+   return 0;
+}
+
+static uint8_t
+hns3_check_speed_dup(uint8_t duplex, uint32_t speed)
+{
+   if (!(speed == ETH_SPEED_NUM_10M || speed == ETH_SPEED_NUM_100M))
+   duplex = ETH_LINK_FULL_DUPLEX;
+
+   return duplex;
+}
+
+static int
+hns3_cfg_mac_speed_dup(struct hns3_hw *hw, uint32_t speed, uint8_t duplex)
+{
+   struct hns3_mac *mac = &hw->mac;
+   int ret;
+
+   duplex = hns3_check_speed_dup(duplex, speed);
+   if (mac->link_speed == speed && mac->link_duplex == duplex)
+   return 0;
+
+   ret = hns3_cfg_mac_speed_dup_hw(hw, speed, duplex);
+   if (ret)
+   return ret;
+
+   mac->link_speed = speed;
+   mac->link_duplex = duplex;
+
+   return 0;
+}
+
+static int
+hns3_update_speed_duplex(struct rte_eth_dev *eth_dev)
+{
+   struct hns3_adapter *hns = eth_dev->data->dev_private;
+   struct hns3_hw *hw = &hns->hw;
+   struct hns3_pf *pf = &hns->pf;
+   uint32_t speed;
+   int ret;
+
+   /* If IMP do not support get SFP/qSFP speed, return directly */
+   if (!pf->support_sfp_query)
+   return 0;
+
+   ret = hns3_get_sfp_speed(hw, &speed);
+   if (ret == -EOPNOTSUPP) {
+   pf->support_sfp_query = false;
+   return ret;
+   } else if (ret)
+   return ret;
+
+   if (speed == ETH_SPEED_NUM_NONE)
+   return 0; /* do nothing if no SFP */
+
+   /* Config full duplex for SFP */
+   return hns3_cfg_mac_speed_dup(hw, speed, ETH_LINK_FULL_DUPLEX);
+}
+
+static int
+hns3

[dpdk-dev] [PATCH v2 01/22] net/hns3: add hns3 build and doc infrastructure

[Wei Hu (Xavier)]

This patch adds build and doc infrastructure for hns3 PMD driver.

Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
v1 -> v2:
1. Address Jerin Jacob Kollanukkaran's comments as follows:
   https://www.mail-archive.com/dev@dpdk.org/msg140958.html
2. Address Stephen Hemminger's comments as follows:
   https://www.mail-archive.com/dev@dpdk.org/msg141495.html
   https://www.mail-archive.com/dev@dpdk.org/msg141496.html
3. Address Ferruh Yigit's comments as follows:
   https://www.mail-archive.com/dev@dpdk.org/msg141544.html
   https://www.mail-archive.com/dev@dpdk.org/msg141530.html
   https://www.mail-archive.com/dev@dpdk.org/msg141531.html
---
 MAINTAINERS  |  8 
 config/common_base   |  5 +++
 config/common_linux  |  5 +++
 config/defconfig_arm-armv7a-linuxapp-gcc |  1 +
 config/defconfig_i686-native-linuxapp-gcc|  5 +++
 config/defconfig_i686-native-linuxapp-icc|  5 +++
 config/defconfig_ppc_64-power8-linuxapp-gcc  |  1 +
 config/defconfig_x86_64-native-linuxapp-icc  |  5 +++
 config/defconfig_x86_x32-native-linuxapp-gcc |  5 +++
 doc/guides/nics/features/hns3.ini|  9 +
 doc/guides/nics/hns3.rst | 60 
 doc/guides/nics/index.rst|  1 +
 doc/guides/rel_notes/release_19_11.rst   |  5 +++
 drivers/net/Makefile |  1 +
 drivers/net/hns3/Makefile| 23 +++
 drivers/net/hns3/hns3_ethdev.c   |  3 ++
 drivers/net/hns3/meson.build | 19 +
 drivers/net/hns3/rte_pmd_hns3_version.map|  3 ++
 drivers/net/meson.build  |  1 +
 mk/rte.app.mk|  1 +
 20 files changed, 166 insertions(+)
 create mode 100644 doc/guides/nics/features/hns3.ini
 create mode 100644 doc/guides/nics/hns3.rst
 create mode 100644 drivers/net/hns3/Makefile
 create mode 100644 drivers/net/hns3/hns3_ethdev.c
 create mode 100644 drivers/net/hns3/meson.build
 create mode 100644 drivers/net/hns3/rte_pmd_hns3_version.map

diff --git a/MAINTAINERS b/MAINTAINERS
index b3d9aad..9c137c1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -613,6 +613,14 @@ F: drivers/net/hinic/
 F: doc/guides/nics/hinic.rst
 F: doc/guides/nics/features/hinic.ini
 
+Hisilicon hns3
+M: Wei Hu (Xavier) 
+M: Min Hu (Connor) 
+M: Yisen Zhuang 
+F: drivers/net/hns3/
+F: doc/guides/nics/hns3.rst
+F: doc/guides/nics/features/hns3.ini
+
 Intel e1000
 M: Wenzhuo Lu 
 T: git://dpdk.org/next/dpdk-next-net-intel
diff --git a/config/common_base b/config/common_base
index c95b7a7..2a8c536 100644
--- a/config/common_base
+++ b/config/common_base
@@ -282,6 +282,11 @@ CONFIG_RTE_LIBRTE_E1000_PF_DISABLE_STRIP_CRC=n
 CONFIG_RTE_LIBRTE_HINIC_PMD=n
 
 #
+# Compile burst-oriented HNS3 PMD driver
+#
+CONFIG_RTE_LIBRTE_HNS3_PMD=n
+
+#
 # Compile burst-oriented IXGBE PMD driver
 #
 CONFIG_RTE_LIBRTE_IXGBE_PMD=y
diff --git a/config/common_linux b/config/common_linux
index 091a3c8..398fd9e 100644
--- a/config/common_linux
+++ b/config/common_linux
@@ -63,3 +63,8 @@ CONFIG_RTE_LIBRTE_ENETC_PMD=y
 # HINIC PMD driver
 #
 CONFIG_RTE_LIBRTE_HINIC_PMD=y
+
+#
+# Hisilicon HNS3 PMD driver
+#
+CONFIG_RTE_LIBRTE_HNS3_PMD=y
diff --git a/config/defconfig_arm-armv7a-linuxapp-gcc 
b/config/defconfig_arm-armv7a-linuxapp-gcc
index 26ab5c5..c91423f 100644
--- a/config/defconfig_arm-armv7a-linuxapp-gcc
+++ b/config/defconfig_arm-armv7a-linuxapp-gcc
@@ -55,4 +55,5 @@ CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
 CONFIG_RTE_LIBRTE_AVP_PMD=n
 CONFIG_RTE_LIBRTE_NFP_PMD=n
 CONFIG_RTE_LIBRTE_HINIC_PMD=n
+CONFIG_RTE_LIBRTE_HNS3_PMD=n
 CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV=n
diff --git a/config/defconfig_i686-native-linuxapp-gcc 
b/config/defconfig_i686-native-linuxapp-gcc
index 07fc5f8..61ea160 100644
--- a/config/defconfig_i686-native-linuxapp-gcc
+++ b/config/defconfig_i686-native-linuxapp-gcc
@@ -59,3 +59,8 @@ CONFIG_RTE_MAX_MEM_MB=2048
 # HINIC PMD is not supported on 32-bit
 #
 CONFIG_RTE_LIBRTE_HINIC_PMD=n
+
+#
+# HNS3 PMD is not supported on 32-bit
+#
+CONFIG_RTE_LIBRTE_HNS3_PMD=n
diff --git a/config/defconfig_i686-native-linuxapp-icc 
b/config/defconfig_i686-native-linuxapp-icc
index 34f34d5..7f614d3 100644
--- a/config/defconfig_i686-native-linuxapp-icc
+++ b/config/defconfig_i686-native-linuxapp-icc
@@ -59,3 +59,8 @@ CONFIG_RTE_MAX_MEM_MB=2048
 # HINIC PMD is not supported on 32-bit
 #
 CONFIG_RTE_LIBRTE_HINIC_PMD=n
+
+#
+# HNS3 PMD is not supported on 32-bit
+#
+CONFIG_RTE_LIBRTE_HNS3_PMD=n
diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index de411e9..b7b9d6f 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -30,4 +30,5 @@ CONFIG_RTE_LIBRTE_FM1

[dpdk-dev] [PATCH v2 08/22] net/hns3: add support for some misc operations

[Wei Hu (Xavier)]

This patch adds the following operations defined in struct eth_dev_ops:
mtu_set, infos_get and fw_version_get for hns3 PMD driver.

Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
v1 -> v2:
Address Ferruh Yigit's comments as follows:

https://inbox.dpdk.org/dev/2543572c-6fbc-af20-1807-fbd7ab413...@intel.com
---
 doc/guides/nics/features/hns3.ini |   2 +
 drivers/net/hns3/hns3_ethdev.c| 108 ++
 2 files changed, 110 insertions(+)

diff --git a/doc/guides/nics/features/hns3.ini 
b/doc/guides/nics/features/hns3.ini
index 43ade8c..2eb78d0 100644
--- a/doc/guides/nics/features/hns3.ini
+++ b/doc/guides/nics/features/hns3.ini
@@ -4,8 +4,10 @@
 ; Refer to default.ini for the full list of available PMD features.
 ;
 [Features]
+MTU update   = Y
 Unicast MAC filter   = Y
 Multicast MAC filter = Y
+FW version   = Y
 Linux UIO= Y
 Linux VFIO   = Y
 ARMv8= Y
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 277db4a..918a386 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -945,6 +945,111 @@ hns3_config_mtu(struct hns3_hw *hw, uint16_t mps)
 }
 
 static int
+hns3_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
+{
+   struct hns3_adapter *hns = dev->data->dev_private;
+   uint32_t frame_size = mtu + HNS3_ETH_OVERHEAD;
+   struct hns3_hw *hw = &hns->hw;
+   bool is_jumbo_frame;
+   int ret;
+
+   if (dev->data->dev_started) {
+   hns3_err(hw, "Failed to set mtu, port %u must be stopped "
+"before configuration", dev->data->port_id);
+   return -EBUSY;
+   }
+
+   rte_spinlock_lock(&hw->lock);
+   is_jumbo_frame = frame_size > RTE_ETHER_MAX_LEN ? true : false;
+   frame_size = RTE_MAX(frame_size, HNS3_DEFAULT_FRAME_LEN);
+
+   /*
+* Maximum value of frame_size is HNS3_MAX_FRAME_LEN, so it can safely
+* assign to "uint16_t" type variable.
+*/
+   ret = hns3_config_mtu(hw, (uint16_t)frame_size);
+   if (ret) {
+   rte_spinlock_unlock(&hw->lock);
+   hns3_err(hw, "Failed to set mtu, port %u mtu %u: %d",
+dev->data->port_id, mtu, ret);
+   return ret;
+   }
+   hns->pf.mps = (uint16_t)frame_size;
+   if (is_jumbo_frame)
+   dev->data->dev_conf.rxmode.offloads |=
+   DEV_RX_OFFLOAD_JUMBO_FRAME;
+   else
+   dev->data->dev_conf.rxmode.offloads &=
+   ~DEV_RX_OFFLOAD_JUMBO_FRAME;
+   dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
+   rte_spinlock_unlock(&hw->lock);
+
+   return 0;
+}
+
+static int
+hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info)
+{
+   struct hns3_adapter *hns = eth_dev->data->dev_private;
+   struct hns3_hw *hw = &hns->hw;
+
+   info->max_rx_queues = hw->tqps_num;
+   info->max_tx_queues = hw->tqps_num;
+   info->max_rx_pktlen = HNS3_MAX_FRAME_LEN; /* CRC included */
+   info->min_rx_bufsize = hw->rx_buf_len;
+   info->max_mac_addrs = HNS3_UC_MACADDR_NUM;
+   info->max_mtu = info->max_rx_pktlen - HNS3_ETH_OVERHEAD;
+   info->rx_offload_capa = (DEV_RX_OFFLOAD_IPV4_CKSUM |
+DEV_RX_OFFLOAD_TCP_CKSUM |
+DEV_RX_OFFLOAD_UDP_CKSUM |
+DEV_RX_OFFLOAD_SCTP_CKSUM |
+DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
+DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
+DEV_RX_OFFLOAD_KEEP_CRC |
+DEV_RX_OFFLOAD_SCATTER |
+DEV_RX_OFFLOAD_VLAN_STRIP |
+DEV_RX_OFFLOAD_QINQ_STRIP |
+DEV_RX_OFFLOAD_VLAN_FILTER |
+DEV_RX_OFFLOAD_VLAN_EXTEND |
+DEV_RX_OFFLOAD_JUMBO_FRAME);
+   info->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE;
+   info->tx_offload_capa = (DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
+DEV_TX_OFFLOAD_IPV4_CKSUM |
+DEV_TX_OFFLOAD_TCP_CKSUM |
+DEV_TX_OFFLOAD_UDP_CKSUM |
+DEV_TX_OFFLOAD_SCTP_CKSUM |
+DEV_TX_OFFLOAD_VLAN_INSERT |
+DEV_TX_OFFLOAD_QINQ_INSERT |
+DEV_TX_OFFLOAD_MULTI_SEGS |
+info->tx_queue_offload_capa);
+
+   info->vmdq_queue_num = 0;
+
+   info->default_rxportconf.burst_size = HNS3_DEFAULT_PORT_CONF_BURST_SIZE;
+   info->defa

[dpdk-dev] [PATCH v2 12/22] net/hns3: add support for flow control of hns3 PMD driver

[Wei Hu (Xavier)]

This patch adds support for MAC PAUSE flow control and priority flow
control(PFC).

MAC PAUSE flow control features:
All user priorities(up) are mapped to tc0. It supports settings of flow
mode and pause time.

DCB features:
Up can be mapped to other tc driver permits according to business
requirement. We can config DCB information and enable PFC by
rte_eth_dev_configure interface. Besides, enabling flow control of a
priority is supported by rte_eth_dev_priority_flow_ctrl_set interface.
we can also set flow mode and pause time by
rte_eth_dev_priority_flow_ctrl_set. we do not support manual setting of
ETS, but driver equally distributes bandwidth for each tc according to
number of used tc.

In addition, flow control function by default is turned off to ensure
that app startup state is the same each time.

Signed-off-by: Huisong Li 
Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Hao Chen 
---
v1 -> v2:
Address Ferruh Yigit's comments as follows:

https://inbox.dpdk.org/dev/7497c1f6-4f50-16a0-6114-227fd7dca...@intel.com
---
 doc/guides/nics/features/hns3.ini |2 +
 drivers/net/hns3/Makefile |1 +
 drivers/net/hns3/hns3_dcb.c   | 1642 +
 drivers/net/hns3/hns3_dcb.h   |  166 
 drivers/net/hns3/hns3_ethdev.c|  206 +
 drivers/net/hns3/meson.build  |1 +
 6 files changed, 2018 insertions(+)
 create mode 100644 drivers/net/hns3/hns3_dcb.c
 create mode 100644 drivers/net/hns3/hns3_dcb.h

diff --git a/doc/guides/nics/features/hns3.ini 
b/doc/guides/nics/features/hns3.ini
index bdbff51..7efbaf8 100644
--- a/doc/guides/nics/features/hns3.ini
+++ b/doc/guides/nics/features/hns3.ini
@@ -11,7 +11,9 @@ Multicast MAC filter = Y
 RSS hash = Y
 RSS key update   = Y
 RSS reta update  = Y
+DCB  = Y
 Flow director= Y
+Flow control = Y
 Flow API = Y
 FW version   = Y
 Linux UIO= Y
diff --git a/drivers/net/hns3/Makefile b/drivers/net/hns3/Makefile
index 5aa0362..b4e2d4f 100644
--- a/drivers/net/hns3/Makefile
+++ b/drivers/net/hns3/Makefile
@@ -27,5 +27,6 @@ SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_cmd.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_rss.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_flow.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_fdir.c
+SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_dcb.c
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/net/hns3/hns3_dcb.c b/drivers/net/hns3/hns3_dcb.c
new file mode 100644
index 000..19235df
--- /dev/null
+++ b/drivers/net/hns3/hns3_dcb.c
@@ -0,0 +1,1642 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2019 Hisilicon Limited.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "hns3_logs.h"
+#include "hns3_regs.h"
+#include "hns3_ethdev.h"
+#include "hns3_dcb.h"
+
+#define HNS3_SHAPER_BS_U_DEF   5
+#define HNS3_SHAPER_BS_S_DEF   20
+#define BW_MAX_PERCENT 100
+#define HNS3_ETHER_MAX_RATE10
+
+/*
+ * hns3_shaper_para_calc: calculate ir parameter for the shaper
+ * @ir: Rate to be config, its unit is Mbps
+ * @shaper_level: the shaper level. eg: port, pg, priority, queueset
+ * @shaper_para: shaper parameter of IR shaper
+ *
+ * the formula:
+ *
+ * IR_b * (2 ^ IR_u) * 8
+ * IR(Mbps) = -  *  CLOCK(1000Mbps)
+ * Tick * (2 ^ IR_s)
+ *
+ * @return: 0: calculate sucessful, negative: fail
+ */
+static int
+hns3_shaper_para_calc(struct hns3_hw *hw, uint32_t ir, uint8_t shaper_level,
+ struct hns3_shaper_parameter *shaper_para)
+{
+#define SHAPER_DEFAULT_IR_B126
+#define DIVISOR_CLK(1000 * 8)
+#define DIVISOR_IR_B_126   (126 * DIVISOR_CLK)
+
+   const uint16_t tick_array[HNS3_SHAPER_LVL_CNT] = {
+   6 * 256,/* Prioriy level */
+   6 * 32, /* Prioriy group level */
+   6 * 8,  /* Port level */
+   6 * 256 /* Qset level */
+   };
+   uint8_t ir_u_calc = 0;
+   uint8_t ir_s_calc = 0;
+   uint32_t denominator;
+   uint32_t ir_calc;
+   uint32_t tick;
+
+   /* Calc tick */
+   if (shaper_level >= HNS3_SHAPER_LVL_CNT) {
+   hns3_err(hw,
+"shaper_level(%d) is greater than 
HNS3_SHAPER_LVL_CNT(%d)",
+shaper_level, HNS3_SHAPER_LVL_CNT);
+   return -EINVAL;
+   }
+
+   if (ir > HNS3_ETHER_MAX_RATE) {
+   hns3_err(hw, "rate(%d) exceeds the rate driver supported "
+"HNS3_ETHER_MAX_RATE(%d)", ir, HNS3_ETHER_MAX_RATE);
+   return -EINVAL;
+   }
+
+   tick = tick_array[shaper_level];
+
+   /*
+* Calc the speed if ir_b = 126, ir_u = 0 and ir_s = 0
+* the formula is changed to:
+*  126 * 1 * 8
+* ir_calc = ---

[dpdk-dev] [PATCH v2 03/22] net/hns3: add some definitions for data structure and macro

[Wei Hu (Xavier)]

This patch adds some data structure definitions, macro definitions and
inline functions for hns3 PMD drivers.

Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
v1 -> v2:
Address Gavin Hu's comments as follows:

https://inbox.dpdk.org/dev/vi1pr08mb53765807e8e2c65f5e335d9c8f...@vi1pr08mb5376.eurprd08.prod.outlook.com/
---
 drivers/net/hns3/hns3_ethdev.h | 611 +
 1 file changed, 611 insertions(+)
 create mode 100644 drivers/net/hns3/hns3_ethdev.h

diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
new file mode 100644
index 000..aba793b
--- /dev/null
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -0,0 +1,611 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2019 Hisilicon Limited.
+ */
+
+#ifndef _HNS3_ETHDEV_H_
+#define _HNS3_ETHDEV_H_
+
+#include 
+#include 
+
+/* Vendor ID */
+#define PCI_VENDOR_ID_HUAWEI   0x19e5
+
+/* Device IDs */
+#define HNS3_DEV_ID_GE 0xA220
+#define HNS3_DEV_ID_25GE   0xA221
+#define HNS3_DEV_ID_25GE_RDMA  0xA222
+#define HNS3_DEV_ID_50GE_RDMA  0xA224
+#define HNS3_DEV_ID_100G_RDMA_MACSEC   0xA226
+#define HNS3_DEV_ID_100G_VF0xA22E
+#define HNS3_DEV_ID_100G_RDMA_PFC_VF   0xA22F
+
+#define HNS3_UC_MACADDR_NUM128
+#define HNS3_VF_UC_MACADDR_NUM 48
+#define HNS3_MC_MACADDR_NUM128
+
+#define HNS3_MAX_BD_SIZE   65535
+#define HNS3_MAX_TX_BD_PER_PKT 8
+#define HNS3_MAX_FRAME_LEN 9728
+#define HNS3_MIN_FRAME_LEN 64
+#define HNS3_VLAN_TAG_SIZE 4
+#define HNS3_DEFAULT_RX_BUF_LEN2048
+
+#define HNS3_ETH_OVERHEAD \
+   (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + HNS3_VLAN_TAG_SIZE * 2)
+#define HNS3_PKTLEN_TO_MTU(pktlen) ((pktlen) - HNS3_ETH_OVERHEAD)
+#define HNS3_MAX_MTU   (HNS3_MAX_FRAME_LEN - HNS3_ETH_OVERHEAD)
+#define HNS3_DEFAULT_MTU   1500UL
+#define HNS3_DEFAULT_FRAME_LEN (HNS3_DEFAULT_MTU + HNS3_ETH_OVERHEAD)
+
+#define HNS3_4_TCS 4
+#define HNS3_8_TCS 8
+#define HNS3_MAX_TC_NUM8
+
+#define HNS3_MAX_PF_NUM8
+#define HNS3_UMV_TBL_SIZE  3072
+#define HNS3_DEFAULT_UMV_SPACE_PER_PF \
+   (HNS3_UMV_TBL_SIZE / HNS3_MAX_PF_NUM)
+
+#define HNS3_PF_CFG_BLOCK_SIZE 32
+#define HNS3_PF_CFG_DESC_NUM \
+   (HNS3_PF_CFG_BLOCK_SIZE / HNS3_CFG_RD_LEN_BYTES)
+
+#define HNS3_DEFAULT_ENABLE_PFC_NUM0
+
+#define HNS3_INTR_UNREG_FAIL_RETRY_CNT 5
+#define HNS3_INTR_UNREG_FAIL_DELAY_MS  500
+
+#define HNS3_QUIT_RESET_CNT10
+#define HNS3_QUIT_RESET_DELAY_MS   100
+
+#define HNS3_POLL_RESPONE_MS   1
+
+#define HNS3_MAX_USER_PRIO 8
+#define HNS3_PG_NUM4
+enum hns3_fc_mode {
+   HNS3_FC_NONE,
+   HNS3_FC_RX_PAUSE,
+   HNS3_FC_TX_PAUSE,
+   HNS3_FC_FULL,
+   HNS3_FC_DEFAULT
+};
+
+#define HNS3_SCH_MODE_SP   0
+#define HNS3_SCH_MODE_DWRR 1
+struct hns3_pg_info {
+   uint8_t pg_id;
+   uint8_t pg_sch_mode;  /* 0: sp; 1: dwrr */
+   uint8_t tc_bit_map;
+   uint32_t bw_limit;
+   uint8_t tc_dwrr[HNS3_MAX_TC_NUM];
+};
+
+struct hns3_tc_info {
+   uint8_t tc_id;
+   uint8_t tc_sch_mode;  /* 0: sp; 1: dwrr */
+   uint8_t pgid;
+   uint32_t bw_limit;
+   uint8_t up_to_tc_map; /* user priority maping on the TC */
+};
+
+struct hns3_dcb_info {
+   uint8_t num_tc;
+   uint8_t num_pg; /* It must be 1 if vNET-Base schd */
+   uint8_t pg_dwrr[HNS3_PG_NUM];
+   uint8_t prio_tc[HNS3_MAX_USER_PRIO];
+   struct hns3_pg_info pg_info[HNS3_PG_NUM];
+   struct hns3_tc_info tc_info[HNS3_MAX_TC_NUM];
+   uint8_t hw_pfc_map; /* Allow for packet drop or not on this TC */
+   uint8_t pfc_en; /* Pfc enabled or not for user priority */
+};
+
+enum hns3_fc_status {
+   HNS3_FC_STATUS_NONE,
+   HNS3_FC_STATUS_MAC_PAUSE,
+   HNS3_FC_STATUS_PFC,
+};
+
+struct hns3_tc_queue_info {
+   uint8_t tqp_offset; /* TQP offset from base TQP */
+   uint8_t tqp_count;  /* Total TQPs */
+   uint8_t tc; /* TC index */
+   bool enable;/* If this TC is enable or not */
+};
+
+struct hns3_cfg {
+   uint8_t vmdq_vport_num;
+   uint8_t tc_num;
+   uint16_t tqp_desc_num;
+   uint16_t rx_buf_len;
+   uint16_t rss_size_max;
+   uint8_t phy_addr;
+   uint8_t media_type;
+   uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
+   uint8_t default_speed;
+   uint32_t numa_node_map;
+   uint8_t speed_ability;
+   uint16_t umv_space;
+};
+
+/* mac media type */
+enum hns3_media_type {
+   HNS3_MEDIA_TYPE_UNKNOWN,
+   HNS3_MEDIA_TYPE_FIBER,
+   HNS3_

[dpdk-dev] [PATCH v2 02/22] net/hns3: add hardware registers definition

[Wei Hu (Xavier)]

This patch adds hardware definition header file for hns3 PMD driver.

Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
 drivers/net/hns3/hns3_regs.h | 98 
 1 file changed, 98 insertions(+)
 create mode 100644 drivers/net/hns3/hns3_regs.h

diff --git a/drivers/net/hns3/hns3_regs.h b/drivers/net/hns3/hns3_regs.h
new file mode 100644
index 000..5a4f315
--- /dev/null
+++ b/drivers/net/hns3/hns3_regs.h
@@ -0,0 +1,98 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2019 Hisilicon Limited.
+ */
+
+#ifndef _HNS3_REGS_H_
+#define _HNS3_REGS_H_
+
+/* bar registers for cmdq */
+#define HNS3_CMDQ_TX_ADDR_L_REG0x27000
+#define HNS3_CMDQ_TX_ADDR_H_REG0x27004
+#define HNS3_CMDQ_TX_DEPTH_REG 0x27008
+#define HNS3_CMDQ_TX_TAIL_REG  0x27010
+#define HNS3_CMDQ_TX_HEAD_REG  0x27014
+#define HNS3_CMDQ_RX_ADDR_L_REG0x27018
+#define HNS3_CMDQ_RX_ADDR_H_REG0x2701c
+#define HNS3_CMDQ_RX_DEPTH_REG 0x27020
+#define HNS3_CMDQ_RX_TAIL_REG  0x27024
+#define HNS3_CMDQ_RX_HEAD_REG  0x27028
+#define HNS3_CMDQ_INTR_STS_REG 0x27104
+#define HNS3_CMDQ_INTR_EN_REG  0x27108
+#define HNS3_CMDQ_INTR_GEN_REG 0x2710C
+
+/* Vector0 interrupt CMDQ event source register(RW) */
+#define HNS3_VECTOR0_CMDQ_SRC_REG  0x27100
+/* Vector0 interrupt CMDQ event status register(RO) */
+#define HNS3_VECTOR0_CMDQ_STAT_REG 0x27104
+
+#define HNS3_VECTOR0_OTHER_INT_STS_REG 0x20800
+
+#define HNS3_MISC_VECTOR_REG_BASE  0x20400
+#define HNS3_VECTOR0_OTER_EN_REG   0x20600
+#define HNS3_MISC_RESET_STS_REG0x20700
+#define HNS3_GLOBAL_RESET_REG  0x20A00
+#define HNS3_FUN_RST_ING   0x20C00
+#define HNS3_GRO_EN_REG0x28000
+
+/* Vector0 register bits for reset */
+#define HNS3_VECTOR0_FUNCRESET_INT_B   0
+#define HNS3_VECTOR0_GLOBALRESET_INT_B 5
+#define HNS3_VECTOR0_CORERESET_INT_B   6
+#define HNS3_VECTOR0_IMPRESET_INT_B7
+
+/* CMDQ register bits for RX event(=MBX event) */
+#define HNS3_VECTOR0_RX_CMDQ_INT_B 1
+#define HNS3_VECTOR0_REG_MSIX_MASK 0x1FF00
+/* RST register bits for RESET event */
+#define HNS3_VECTOR0_RST_INT_B 2
+
+#define HNS3_VF_RST_ING0x07008
+#define HNS3_VF_RST_ING_BITBIT(16)
+
+/* bar registers for rcb */
+#define HNS3_RING_RX_BASEADDR_L_REG0x0
+#define HNS3_RING_RX_BASEADDR_H_REG0x4
+#define HNS3_RING_RX_BD_NUM_REG0x8
+#define HNS3_RING_RX_BD_LEN_REG0xC
+#define HNS3_RING_RX_MERGE_EN_REG  0x00014
+#define HNS3_RING_RX_TAIL_REG  0x00018
+#define HNS3_RING_RX_HEAD_REG  0x0001C
+#define HNS3_RING_RX_FBDNUM_REG0x00020
+#define HNS3_RING_RX_OFFSET_REG0x00024
+#define HNS3_RING_RX_FBD_OFFSET_REG0x00028
+#define HNS3_RING_RX_PKTNUM_RECORD_REG 0x0002C
+#define HNS3_RING_RX_STASH_REG 0x00030
+#define HNS3_RING_RX_BD_ERR_REG0x00034
+
+#define HNS3_RING_TX_BASEADDR_L_REG0x00040
+#define HNS3_RING_TX_BASEADDR_H_REG0x00044
+#define HNS3_RING_TX_BD_NUM_REG0x00048
+#define HNS3_RING_TX_PRIORITY_REG  0x0004C
+#define HNS3_RING_TX_TC_REG0x00050
+#define HNS3_RING_TX_MERGE_EN_REG  0x00054
+#define HNS3_RING_TX_TAIL_REG  0x00058
+#define HNS3_RING_TX_HEAD_REG  0x0005C
+#define HNS3_RING_TX_FBDNUM_REG0x00060
+#define HNS3_RING_TX_OFFSET_REG0x00064
+#define HNS3_RING_TX_EBD_NUM_REG   0x00068
+#define HNS3_RING_TX_PKTNUM_RECORD_REG 0x0006C
+#define HNS3_RING_TX_EBD_OFFSET_REG0x00070
+#define HNS3_RING_TX_BD_ERR_REG0x00074
+
+#define HNS3_RING_EN_REG   0x00090
+
+#define HNS3_RING_EN_B 0
+
+#define HNS3_TQP_REG_OFFSET0x8
+#define HNS3_TQP_REG_SIZE  0x200
+
+/* bar registers for tqp interrupt */
+#define HNS3_TQP_INTR_CTRL_REG 0x2
+#define HNS3_TQP_INTR_GL0_REG  0x20100
+#define HNS3_TQP_INTR_GL1_REG  0x20200
+#define HNS3_TQP_INTR_GL2_REG  0x20300
+#define HNS3_TQP_INTR_RL_REG   0x20900
+
+#define HNS3_TQP_INTR_REG_SIZE 4
+
+#endif /* _HNS3_REGS_H_ */
-- 
2.7.4

[dpdk-dev] [PATCH v2 00/22] add hns3 ethernet PMD driver

[Wei Hu (Xavier)]

The Hisilicon Network Subsystem is a long term evolution IP which is
supposed to be used in Hisilicon ICT SoCs such as Kunpeng 920.

This series add DPDK rte_ethdev poll mode driver for Hisilicon
Network Subsystem 3(hns3) network engine.

Wei Hu (Xavier) (22):
  net/hns3: add hns3 build and doc infrastructure
  net/hns3: add hardware registers definition
  net/hns3: add some definitions for data structure and macro
  net/hns3: register hns3 PMD driver and add the log interface
definition
  net/hns3: add support for cmd of hns3 PMD driver
  net/hns3: add the initialization of hns3 PMD driver
  net/hns3: add support for MAC address related operations
  net/hns3: add support for some misc operations
  net/hns3: add support for link_update operation
  net/hns3: add support for flow directory of hns3 PMD driver
  net/hns3: add support for RSS of hns3 PMD driver
  net/hns3: add support for flow control of hns3 PMD driver
  net/hns3: add support for vlan of hns3 PMD driver
  net/hns3: add support for mailbox of hns3 PMD driver
  net/hns3: add support for hns3 VF PMD driver
  net/hns3: add RX/TX package burst and queue related operation
  net/hns3: add start stop configure promiscuous ops
  net/hns3: add dump register ops for hns3 PMD driver
  net/hns3: add abnormal interrupt process for hns3 PMD driver
  net/hns3: add stats related ops for hns3 PMD driver
  net/hns3: add reset related process for hns3 PMD driver
  net/hns3: add multiple process support for hns3 PMD driver

 MAINTAINERS  |8 +
 config/common_base   |5 +
 config/common_linux  |5 +
 config/defconfig_arm-armv7a-linuxapp-gcc |1 +
 config/defconfig_i686-native-linuxapp-gcc|5 +
 config/defconfig_i686-native-linuxapp-icc|5 +
 config/defconfig_ppc_64-power8-linuxapp-gcc  |1 +
 config/defconfig_x86_64-native-linuxapp-icc  |5 +
 config/defconfig_x86_x32-native-linuxapp-gcc |5 +
 doc/guides/nics/features/hns3.ini|   34 +
 doc/guides/nics/features/hns3_vf.ini |   29 +
 doc/guides/nics/hns3.rst |   60 +
 doc/guides/nics/index.rst|1 +
 doc/guides/rel_notes/release_19_11.rst   |5 +
 drivers/net/Makefile |1 +
 drivers/net/hns3/Makefile|   45 +
 drivers/net/hns3/hns3_cmd.c  |  565 +++
 drivers/net/hns3/hns3_cmd.h  |  761 
 drivers/net/hns3/hns3_dcb.c  | 1642 +
 drivers/net/hns3/hns3_dcb.h  |  166 +
 drivers/net/hns3/hns3_ethdev.c   | 4939 ++
 drivers/net/hns3/hns3_ethdev.h   |  645 
 drivers/net/hns3/hns3_ethdev_vf.c| 1735 +
 drivers/net/hns3/hns3_fdir.c | 1059 ++
 drivers/net/hns3/hns3_fdir.h |  205 ++
 drivers/net/hns3/hns3_flow.c | 1903 ++
 drivers/net/hns3/hns3_intr.c | 1166 ++
 drivers/net/hns3/hns3_intr.h |   79 +
 drivers/net/hns3/hns3_logs.h |   34 +
 drivers/net/hns3/hns3_mbx.c  |  353 ++
 drivers/net/hns3/hns3_mbx.h  |  136 +
 drivers/net/hns3/hns3_mp.c   |  214 ++
 drivers/net/hns3/hns3_mp.h   |   14 +
 drivers/net/hns3/hns3_regs.c |  368 ++
 drivers/net/hns3/hns3_regs.h |   99 +
 drivers/net/hns3/hns3_rss.c  |  584 +++
 drivers/net/hns3/hns3_rss.h  |  124 +
 drivers/net/hns3/hns3_rxtx.c | 1676 +
 drivers/net/hns3/hns3_rxtx.h |  317 ++
 drivers/net/hns3/hns3_stats.c|  971 +
 drivers/net/hns3/hns3_stats.h|  152 +
 drivers/net/hns3/meson.build |   37 +
 drivers/net/hns3/rte_pmd_hns3_version.map|3 +
 drivers/net/meson.build  |1 +
 mk/rte.app.mk|1 +
 45 files changed, 20164 insertions(+)
 create mode 100644 doc/guides/nics/features/hns3.ini
 create mode 100644 doc/guides/nics/features/hns3_vf.ini
 create mode 100644 doc/guides/nics/hns3.rst
 create mode 100644 drivers/net/hns3/Makefile
 create mode 100644 drivers/net/hns3/hns3_cmd.c
 create mode 100644 drivers/net/hns3/hns3_cmd.h
 create mode 100644 drivers/net/hns3/hns3_dcb.c
 create mode 100644 drivers/net/hns3/hns3_dcb.h
 create mode 100644 drivers/net/hns3/hns3_ethdev.c
 create mode 100644 drivers/net/hns3/hns3_ethdev.h
 create mode 100644 drivers/net/hns3/hns3_ethdev_vf.c
 create mode 100644 drivers/net/hns3/hns3_fdir.c
 create mode 100644 drivers/net/hns3/hns3_fdir.h
 create mode 100644 drivers/net/hns3/hns3_flow.c
 create mode 100644 drivers/net/hns3/hns3_intr.c
 create mode 100644 drivers/net/hns3/hns3_intr.h
 create mode 100644 drivers/net/hns3/hns3_logs.h
 create mode 100644 drivers/net/hns3/hns3_mbx.c
 create mod

[dpdk-dev] [PATCH v2 06/22] net/hns3: add the initialization of hns3 PMD driver

[Wei Hu (Xavier)]

This patch adds the initialization of hns3 PF PMD driver. It gets
configuration from IMP such as queue information, configures queue,
inits mac, inits manage table, disables gro etc.

Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
 drivers/net/hns3/hns3_ethdev.c | 1504 
 drivers/net/hns3/hns3_ethdev.h |3 +
 2 files changed, 1507 insertions(+)

diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index c32648f..bda088f 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -25,10 +25,1470 @@
 #include "hns3_logs.h"
 #include "hns3_regs.h"
 
+#define HNS3_DEFAULT_PORT_CONF_BURST_SIZE  32
+#define HNS3_DEFAULT_PORT_CONF_QUEUES_NUM  1
+
 int hns3_logtype_init;
 int hns3_logtype_driver;
 
 static int
+hns3_config_tso(struct hns3_hw *hw, unsigned int tso_mss_min,
+   unsigned int tso_mss_max)
+{
+   struct hns3_cfg_tso_status_cmd *req;
+   struct hns3_cmd_desc desc;
+   uint16_t tso_mss;
+
+   hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_TSO_GENERIC_CONFIG, false);
+
+   req = (struct hns3_cfg_tso_status_cmd *)desc.data;
+
+   tso_mss = 0;
+   hns3_set_field(tso_mss, HNS3_TSO_MSS_MIN_M, HNS3_TSO_MSS_MIN_S,
+  tso_mss_min);
+   req->tso_mss_min = rte_cpu_to_le_16(tso_mss);
+
+   tso_mss = 0;
+   hns3_set_field(tso_mss, HNS3_TSO_MSS_MIN_M, HNS3_TSO_MSS_MIN_S,
+  tso_mss_max);
+   req->tso_mss_max = rte_cpu_to_le_16(tso_mss);
+
+   return hns3_cmd_send(hw, &desc, 1);
+}
+
+int
+hns3_config_gro(struct hns3_hw *hw, bool en)
+{
+   struct hns3_cfg_gro_status_cmd *req;
+   struct hns3_cmd_desc desc;
+   int ret;
+
+   hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_GRO_GENERIC_CONFIG, false);
+   req = (struct hns3_cfg_gro_status_cmd *)desc.data;
+
+   req->gro_en = rte_cpu_to_le_16(en ? 1 : 0);
+
+   ret = hns3_cmd_send(hw, &desc, 1);
+   if (ret)
+   hns3_err(hw, "GRO hardware config cmd failed, ret = %d", ret);
+
+   return ret;
+}
+
+static int
+hns3_set_umv_space(struct hns3_hw *hw, uint16_t space_size,
+  uint16_t *allocated_size, bool is_alloc)
+{
+   struct hns3_umv_spc_alc_cmd *req;
+   struct hns3_cmd_desc desc;
+   int ret;
+
+   req = (struct hns3_umv_spc_alc_cmd *)desc.data;
+   hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_MAC_VLAN_ALLOCATE, false);
+   hns3_set_bit(req->allocate, HNS3_UMV_SPC_ALC_B, is_alloc ? 0 : 1);
+   req->space_size = rte_cpu_to_le_32(space_size);
+
+   ret = hns3_cmd_send(hw, &desc, 1);
+   if (ret) {
+   PMD_INIT_LOG(ERR, "%s umv space failed for cmd_send, ret =%d",
+is_alloc ? "allocate" : "free", ret);
+   return ret;
+   }
+
+   if (is_alloc && allocated_size)
+   *allocated_size = rte_le_to_cpu_32(desc.data[1]);
+
+   return 0;
+}
+
+static int
+hns3_init_umv_space(struct hns3_hw *hw)
+{
+   struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
+   struct hns3_pf *pf = &hns->pf;
+   uint16_t allocated_size = 0;
+   int ret;
+
+   ret = hns3_set_umv_space(hw, pf->wanted_umv_size, &allocated_size,
+true);
+   if (ret)
+   return ret;
+
+   if (allocated_size < pf->wanted_umv_size)
+   PMD_INIT_LOG(WARNING, "Alloc umv space failed, want %u, get %u",
+pf->wanted_umv_size, allocated_size);
+
+   pf->max_umv_size = (!!allocated_size) ? allocated_size :
+   pf->wanted_umv_size;
+   pf->used_umv_size = 0;
+   return 0;
+}
+
+static int
+hns3_uninit_umv_space(struct hns3_hw *hw)
+{
+   struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
+   struct hns3_pf *pf = &hns->pf;
+   int ret;
+
+   if (pf->max_umv_size == 0)
+   return 0;
+
+   ret = hns3_set_umv_space(hw, pf->max_umv_size, NULL, false);
+   if (ret)
+   return ret;
+
+   pf->max_umv_size = 0;
+
+   return 0;
+}
+
+static int
+hns3_set_mac_mtu(struct hns3_hw *hw, uint16_t new_mps)
+{
+   struct hns3_config_max_frm_size_cmd *req;
+   struct hns3_cmd_desc desc;
+
+   hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_CONFIG_MAX_FRM_SIZE, false);
+
+   req = (struct hns3_config_max_frm_size_cmd *)desc.data;
+   req->max_frm_size = rte_cpu_to_le_16(new_mps);
+   req->min_frm_size = HNS3_MIN_FRAME_LEN;
+
+   return hns3_cmd_send(hw, &desc, 1);
+}
+
+static int
+hns3_config_mtu(struct hns3_hw *hw, uint16_t mps)
+{
+   int ret;
+
+   ret = hns3_set_mac_mtu(hw, mps);
+   if (ret) {
+   hns3_err(hw, "Failed to set mtu, ret = %d", ret);
+   return ret;
+   }
+
+   ret = hns3_buffer_alloc(hw

[dpdk-dev] [PATCH v2 05/22] net/hns3: add support for cmd of hns3 PMD driver

[Wei Hu (Xavier)]

This patch adds support for cmd of hns3 PMD driver, driver can interact
with firmware through command to complete hardware configuration.

Signed-off-by: Hao Chen 
Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Huisong Li 
---
v1 -> v2:
Address Ferruh Yigit's comments as follows:

https://inbox.dpdk.org/dev/30af42d3-c582-fac0-c13f-8c52f063b...@intel.com
---
 drivers/net/hns3/Makefile  |   1 +
 drivers/net/hns3/hns3_cmd.c| 527 
 drivers/net/hns3/hns3_cmd.h| 761 +
 drivers/net/hns3/hns3_ethdev.c |  69 
 drivers/net/hns3/hns3_ethdev.h |   5 +-
 drivers/net/hns3/meson.build   |   2 +-
 6 files changed, 1362 insertions(+), 3 deletions(-)
 create mode 100644 drivers/net/hns3/hns3_cmd.c
 create mode 100644 drivers/net/hns3/hns3_cmd.h

diff --git a/drivers/net/hns3/Makefile b/drivers/net/hns3/Makefile
index 1ef0e20..24032e2 100644
--- a/drivers/net/hns3/Makefile
+++ b/drivers/net/hns3/Makefile
@@ -23,5 +23,6 @@ LIBABIVER := 1
 # all source are stored in SRCS-y
 #
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_ethdev.c
+SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_cmd.c
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c
new file mode 100644
index 000..853b9fd
--- /dev/null
+++ b/drivers/net/hns3/hns3_cmd.c
@@ -0,0 +1,527 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2019 Hisilicon Limited.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "hns3_ethdev.h"
+#include "hns3_regs.h"
+#include "hns3_logs.h"
+
+#define hns3_is_csq(ring) ((ring)->flag & HNS3_TYPE_CSQ)
+
+#define cmq_ring_to_dev(ring)   (&(ring)->dev->pdev->dev)
+
+static int
+hns3_ring_space(struct hns3_cmq_ring *ring)
+{
+   int ntu = ring->next_to_use;
+   int ntc = ring->next_to_clean;
+   int used = (ntu - ntc + ring->desc_num) % ring->desc_num;
+
+   return ring->desc_num - used - 1;
+}
+
+static bool
+is_valid_csq_clean_head(struct hns3_cmq_ring *ring, int head)
+{
+   int ntu = ring->next_to_use;
+   int ntc = ring->next_to_clean;
+
+   if (ntu > ntc)
+   return head >= ntc && head <= ntu;
+
+   return head >= ntc || head <= ntu;
+}
+
+/*
+ * hns3_allocate_dma_mem - Specific memory alloc for command function.
+ * Malloc a memzone, which is a contiguous portion of physical memory 
identified
+ * by a name.
+ * @ring: pointer to the ring structure
+ * @size: size of memory requested
+ * @alignment: what to align the allocation to
+ */
+static int
+hns3_allocate_dma_mem(struct hns3_hw *hw, struct hns3_cmq_ring *ring,
+ uint64_t size, uint32_t alignment)
+{
+   const struct rte_memzone *mz = NULL;
+   char z_name[RTE_MEMZONE_NAMESIZE];
+
+   snprintf(z_name, sizeof(z_name), "hns3_dma_%" PRIu64, rte_rand());
+   mz = rte_memzone_reserve_bounded(z_name, size, SOCKET_ID_ANY,
+RTE_MEMZONE_IOVA_CONTIG, alignment,
+RTE_PGSIZE_2M);
+   if (mz == NULL)
+   return -ENOMEM;
+
+   ring->buf_size = size;
+   ring->desc = mz->addr;
+   ring->desc_dma_addr = mz->iova;
+   ring->zone = (const void *)mz;
+   hns3_dbg(hw, "memzone %s allocated with physical address: %" PRIu64,
+mz->name, ring->desc_dma_addr);
+
+   return 0;
+}
+
+static void
+hns3_free_dma_mem(struct hns3_hw *hw, struct hns3_cmq_ring *ring)
+{
+   hns3_dbg(hw, "memzone %s to be freed with physical address: %" PRIu64,
+((const struct rte_memzone *)ring->zone)->name,
+ring->desc_dma_addr);
+   rte_memzone_free((const struct rte_memzone *)ring->zone);
+   ring->buf_size = 0;
+   ring->desc = NULL;
+   ring->desc_dma_addr = 0;
+   ring->zone = NULL;
+}
+
+static int
+hns3_alloc_cmd_desc(struct hns3_hw *hw, struct hns3_cmq_ring *ring)
+{
+   int size  = ring->desc_num * sizeof(struct hns3_cmd_desc);
+
+   if (hns3_allocate_dma_mem(hw, ring, size, HNS3_CMD_DESC_ALIGNMENT)) {
+   hns3_err(hw, "allocate dma mem failed");
+   return -ENOMEM;
+   }
+
+   return 0;
+}
+
+static void
+hns3_free_cmd_desc(struct hns3_hw *hw, struct hns3_cmq_ring *ring)
+{
+   if (ring->desc)
+   hns3_free_dma_mem(hw, ring);
+}
+
+static int
+hns3_alloc_cmd_queue(struct hns3_hw *hw, int ring_type)
+{
+   struct hns3_cmq_ring *ring =
+   (ring_type == HNS3_TYPE_CSQ) ? &hw->cmq.csq : &hw->cmq.crq;
+   int ret;
+
+   ring->ring_type = ring_type;
+   ring->hw = hw;
+
+   ret = hns3_alloc_cmd_desc(hw, ring);
+   if (ret)
+   hns3_err(hw, "descriptor %s alloc error %d",
+ 

[dpdk-dev] [PATCH v2 07/22] net/hns3: add support for MAC address related operations

[Wei Hu (Xavier)]

This patch adds the following mac address related operations defined in
struct eth_dev_ops: mac_addr_add, mac_addr_remove, mac_addr_set
and set_mc_addr_list.

Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
v1 -> v2:
Add Unicast MAC filter and Multicast MAC filter into hns3.ini file
according to Ferruh Yigit's comments.
---
 doc/guides/nics/features/hns3.ini |   2 +
 drivers/net/hns3/hns3_ethdev.c| 772 ++
 2 files changed, 774 insertions(+)

diff --git a/doc/guides/nics/features/hns3.ini 
b/doc/guides/nics/features/hns3.ini
index 2eb57c8..43ade8c 100644
--- a/doc/guides/nics/features/hns3.ini
+++ b/doc/guides/nics/features/hns3.ini
@@ -4,6 +4,8 @@
 ; Refer to default.ini for the full list of available PMD features.
 ;
 [Features]
+Unicast MAC filter   = Y
+Multicast MAC filter = Y
 Linux UIO= Y
 Linux VFIO   = Y
 ARMv8= Y
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index bda088f..277db4a 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -143,6 +143,772 @@ hns3_uninit_umv_space(struct hns3_hw *hw)
return 0;
 }
 
+static bool
+hns3_is_umv_space_full(struct hns3_hw *hw)
+{
+   struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
+   struct hns3_pf *pf = &hns->pf;
+   bool is_full;
+
+   is_full = (pf->used_umv_size >= pf->max_umv_size);
+
+   return is_full;
+}
+
+static void
+hns3_update_umv_space(struct hns3_hw *hw, bool is_free)
+{
+   struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
+   struct hns3_pf *pf = &hns->pf;
+
+   if (is_free) {
+   if (pf->used_umv_size > 0)
+   pf->used_umv_size--;
+   } else
+   pf->used_umv_size++;
+}
+
+static void
+hns3_prepare_mac_addr(struct hns3_mac_vlan_tbl_entry_cmd *new_req,
+ const uint8_t *addr, bool is_mc)
+{
+   const unsigned char *mac_addr = addr;
+   uint32_t high_val = ((uint32_t)mac_addr[3] << 24) |
+   ((uint32_t)mac_addr[2] << 16) |
+   ((uint32_t)mac_addr[1] << 8) |
+   (uint32_t)mac_addr[0];
+   uint32_t low_val = ((uint32_t)mac_addr[5] << 8) | (uint32_t)mac_addr[4];
+
+   hns3_set_bit(new_req->flags, HNS3_MAC_VLAN_BIT0_EN_B, 1);
+   if (is_mc) {
+   hns3_set_bit(new_req->entry_type, HNS3_MAC_VLAN_BIT0_EN_B, 0);
+   hns3_set_bit(new_req->entry_type, HNS3_MAC_VLAN_BIT1_EN_B, 1);
+   hns3_set_bit(new_req->mc_mac_en, HNS3_MAC_VLAN_BIT0_EN_B, 1);
+   }
+
+   new_req->mac_addr_hi32 = rte_cpu_to_le_32(high_val);
+   new_req->mac_addr_lo16 = rte_cpu_to_le_16(low_val & 0x);
+}
+
+static int
+hns3_get_mac_vlan_cmd_status(struct hns3_hw *hw, uint16_t cmdq_resp,
+uint8_t resp_code,
+enum hns3_mac_vlan_tbl_opcode op)
+{
+   if (cmdq_resp) {
+   hns3_err(hw, "cmdq execute failed for 
get_mac_vlan_cmd_status,status=%u",
+cmdq_resp);
+   return -EIO;
+   }
+
+   if (op == HNS3_MAC_VLAN_ADD) {
+   if (resp_code == 0 || resp_code == 1) {
+   return 0;
+   } else if (resp_code == HNS3_ADD_UC_OVERFLOW) {
+   hns3_err(hw, "add mac addr failed for uc_overflow");
+   return -ENOSPC;
+   } else if (resp_code == HNS3_ADD_MC_OVERFLOW) {
+   hns3_err(hw, "add mac addr failed for mc_overflow");
+   return -ENOSPC;
+   }
+
+   hns3_err(hw, "add mac addr failed for undefined, code=%u",
+resp_code);
+   return -EIO;
+   } else if (op == HNS3_MAC_VLAN_REMOVE) {
+   if (resp_code == 0) {
+   return 0;
+   } else if (resp_code == 1) {
+   hns3_dbg(hw, "remove mac addr failed for miss");
+   return -ENOENT;
+   }
+
+   hns3_err(hw, "remove mac addr failed for undefined, code=%u",
+resp_code);
+   return -EIO;
+   } else if (op == HNS3_MAC_VLAN_LKUP) {
+   if (resp_code == 0) {
+   return 0;
+   } else if (resp_code == 1) {
+   hns3_dbg(hw, "lookup mac addr failed for miss");
+   return -ENOENT;
+   }
+
+   hns3_err(hw, "lookup mac addr failed for undefined, code=%u",
+resp_code);
+   return -EIO;
+   }
+
+   hns3_err(hw, "unknown opcode for get_mac_vlan_cmd_status, opcode=%u",
+op);
+
+   return -EINVAL;
+}
+
+static int
+hns3_lookup_mac_vlan_tbl(struct 

[dpdk-dev] [PATCH v2 04/22] net/hns3: register hns3 PMD driver and add the log interface definition

[Wei Hu (Xavier)]

This patch registers hns3 PMD driver and adds the definition for log
interfaces.

Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
v1 -> v2:
Address Ferruh Yigit's comments as follows:

https://inbox.dpdk.org/dev/763b0d93-3e5a-d12d-663a-65ba94189...@intel.com
---
 drivers/net/hns3/Makefile  |   4 ++
 drivers/net/hns3/hns3_ethdev.c | 130 +
 drivers/net/hns3/hns3_logs.h   |  34 +++
 3 files changed, 168 insertions(+)
 create mode 100644 drivers/net/hns3/hns3_logs.h

diff --git a/drivers/net/hns3/Makefile b/drivers/net/hns3/Makefile
index ddf3bfb..1ef0e20 100644
--- a/drivers/net/hns3/Makefile
+++ b/drivers/net/hns3/Makefile
@@ -11,6 +11,10 @@ LIB = librte_pmd_hns3.a
 CFLAGS += -O3
 CFLAGS += $(WERROR_FLAGS)
 
+LDLIBS += -lrte_eal
+LDLIBS += -lrte_ethdev -lrte_net
+LDLIBS += -lrte_bus_pci
+
 EXPORT_MAP := rte_pmd_hns3_version.map
 
 LIBABIVER := 1
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 3f74e54..ffd2184 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -1,3 +1,133 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2018-2019 Hisilicon Limited.
  */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "hns3_ethdev.h"
+#include "hns3_logs.h"
+#include "hns3_regs.h"
+
+int hns3_logtype_init;
+int hns3_logtype_driver;
+
+static void
+hns3_dev_close(struct rte_eth_dev *eth_dev)
+{
+   struct hns3_adapter *hns = eth_dev->data->dev_private;
+   struct hns3_hw *hw = &hns->hw;
+
+   hw->adapter_state = HNS3_NIC_CLOSED;
+}
+
+static const struct eth_dev_ops hns3_eth_dev_ops = {
+   .dev_close  = hns3_dev_close,
+};
+
+static int
+hns3_dev_init(struct rte_eth_dev *eth_dev)
+{
+   struct hns3_adapter *hns = eth_dev->data->dev_private;
+   struct hns3_hw *hw = &hns->hw;
+
+   PMD_INIT_FUNC_TRACE();
+
+   eth_dev->dev_ops = &hns3_eth_dev_ops;
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return 0;
+
+   hns->is_vf = false;
+   hw->data = eth_dev->data;
+   hw->adapter_state = HNS3_NIC_INITIALIZED;
+   /*
+* Pass the information to the rte_eth_dev_close() that it should also
+* release the private port resources.
+*/
+   eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
+
+   return 0;
+}
+
+static int
+hns3_dev_uninit(struct rte_eth_dev *eth_dev)
+{
+   struct hns3_adapter *hns = eth_dev->data->dev_private;
+   struct hns3_hw *hw = &hns->hw;
+
+   PMD_INIT_FUNC_TRACE();
+
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return -EPERM;
+
+   eth_dev->dev_ops = NULL;
+   eth_dev->rx_pkt_burst = NULL;
+   eth_dev->tx_pkt_burst = NULL;
+   eth_dev->tx_pkt_prepare = NULL;
+   if (hw->adapter_state < HNS3_NIC_CLOSING)
+   hns3_dev_close(eth_dev);
+
+   hw->adapter_state = HNS3_NIC_REMOVED;
+   return 0;
+}
+
+static int
+eth_hns3_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
+  struct rte_pci_device *pci_dev)
+{
+   return rte_eth_dev_pci_generic_probe(pci_dev,
+sizeof(struct hns3_adapter),
+hns3_dev_init);
+}
+
+static int
+eth_hns3_pci_remove(struct rte_pci_device *pci_dev)
+{
+   return rte_eth_dev_pci_generic_remove(pci_dev, hns3_dev_uninit);
+}
+
+static const struct rte_pci_id pci_id_hns3_map[] = {
+   { RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_GE) },
+   { RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_25GE) },
+   { RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_25GE_RDMA) },
+   { RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_50GE_RDMA) },
+   { RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_100G_RDMA_MACSEC) },
+   { .vendor_id = 0, /* sentinel */ },
+};
+
+static struct rte_pci_driver rte_hns3_pmd = {
+   .id_table = pci_id_hns3_map,
+   .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
+   .probe = eth_hns3_pci_probe,
+   .remove = eth_hns3_pci_remove,
+};
+
+RTE_PMD_REGISTER_PCI(net_hns3, rte_hns3_pmd);
+RTE_PMD_REGISTER_PCI_TABLE(net_hns3, pci_id_hns3_map);
+RTE_PMD_REGISTER_KMOD_DEP(net_hns3, "* igb_uio | vfio-pci");
+
+RTE_INIT(hns3_init_log)
+{
+   hns3_logtype_init = rte_log_register("pmd.net.hns3.init");
+   if (hns3_logtype_init >= 0)
+   rte_log_set_level(hns3_logtype_init, RTE_LOG_NOTICE);
+   hns3_logtype_driver = rte_log_register("pmd.net.hns3.driver");
+   if (hns3_logtype_driver >= 0)
+   rte_log_set_level(hns3_logtype_driver, RTE_LOG_NOTICE);
+}
diff --git a/drivers/net/hns3/hns3_logs.h b/drivers/net/hn

[dpdk-dev] [PATCH v2 11/22] net/hns3: add support for RSS of hns3 PMD driver

[Wei Hu (Xavier)]

This patch adds support for RSS of hns3 PMD driver. It included the follow
functions:
In file hns3_rss.c:
1) Set/query hash key, rss_hf by .rss_hash_update/.rss_hash_conf_get ops
   callback functions.
2) Set/query redirection table by .reta_update/.reta_query. ops callback
   functions.
3) Set/query hash algorithm by .filter_ctrl ops callback function when
   the 'filter_type' is RTE_ETH_FILTER_HASH.

In file hns3_flow.c:
1) Set hash key, rss_hf, redirection table and algorithm by .create ops
   callback function.
2) Disable RSS by .destroy or .flush ops callback function.
3) Check the effectiveness of the RSS's configuration by .validate ops
   callback function.

Signed-off-by: Hao Chen 
Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Huisong Li 
---
v1 -> v2:
Address Ferruh Yigit's comments as follows:

https://inbox.dpdk.org/dev/bfee6344-4953-a042-dbb6-efb3d95d7...@intel.com
---
 doc/guides/nics/features/hns3.ini |   3 +
 drivers/net/hns3/Makefile |   1 +
 drivers/net/hns3/hns3_ethdev.c|  11 +
 drivers/net/hns3/hns3_ethdev.h|   4 +
 drivers/net/hns3/hns3_fdir.h  |   8 +
 drivers/net/hns3/hns3_flow.c  | 454 +
 drivers/net/hns3/hns3_rss.c   | 584 ++
 drivers/net/hns3/hns3_rss.h   | 124 
 drivers/net/hns3/meson.build  |   1 +
 9 files changed, 1190 insertions(+)
 create mode 100644 drivers/net/hns3/hns3_rss.c
 create mode 100644 drivers/net/hns3/hns3_rss.h

diff --git a/doc/guides/nics/features/hns3.ini 
b/doc/guides/nics/features/hns3.ini
index 74161b6..bdbff51 100644
--- a/doc/guides/nics/features/hns3.ini
+++ b/doc/guides/nics/features/hns3.ini
@@ -8,6 +8,9 @@ Link status  = Y
 MTU update   = Y
 Unicast MAC filter   = Y
 Multicast MAC filter = Y
+RSS hash = Y
+RSS key update   = Y
+RSS reta update  = Y
 Flow director= Y
 Flow API = Y
 FW version   = Y
diff --git a/drivers/net/hns3/Makefile b/drivers/net/hns3/Makefile
index 50ce1d6..5aa0362 100644
--- a/drivers/net/hns3/Makefile
+++ b/drivers/net/hns3/Makefile
@@ -24,6 +24,7 @@ LIBABIVER := 1
 #
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_ethdev.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_cmd.c
+SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_rss.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_flow.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_fdir.c
 
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 575cad9..d7a36da 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -1027,6 +1027,10 @@ hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct 
rte_eth_dev_info *info)
 
info->vmdq_queue_num = 0;
 
+   info->reta_size = HNS3_RSS_IND_TBL_SIZE;
+   info->hash_key_size = HNS3_RSS_KEY_SIZE;
+   info->flow_type_rss_offloads = HNS3_ETH_RSS_SUPPORT;
+
info->default_rxportconf.burst_size = HNS3_DEFAULT_PORT_CONF_BURST_SIZE;
info->default_txportconf.burst_size = HNS3_DEFAULT_PORT_CONF_BURST_SIZE;
info->default_rxportconf.nb_queues = HNS3_DEFAULT_PORT_CONF_QUEUES_NUM;
@@ -2572,6 +2576,8 @@ hns3_init_pf(struct rte_eth_dev *eth_dev)
goto err_hw_init;
}
 
+   hns3_set_default_rss_args(hw);
+
return 0;
 
 err_hw_init:
@@ -2597,6 +2603,7 @@ hns3_uninit_pf(struct rte_eth_dev *eth_dev)
 
PMD_INIT_FUNC_TRACE();
 
+   hns3_rss_uninit(hns);
hns3_fdir_filter_uninit(hns);
hns3_uninit_umv_space(hw);
hns3_cmd_uninit(hw);
@@ -2630,6 +2637,10 @@ static const struct eth_dev_ops hns3_eth_dev_ops = {
.mac_addr_set   = hns3_set_default_mac_addr,
.set_mc_addr_list   = hns3_set_mc_mac_addr_list,
.link_update= hns3_dev_link_update,
+   .rss_hash_update= hns3_dev_rss_hash_update,
+   .rss_hash_conf_get  = hns3_dev_rss_hash_conf_get,
+   .reta_update= hns3_dev_rss_reta_update,
+   .reta_query = hns3_dev_rss_reta_query,
.filter_ctrl= hns3_dev_filter_ctrl,
 };
 
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index a64db64..87e3bbc 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -9,6 +9,7 @@
 #include 
 
 #include "hns3_cmd.h"
+#include "hns3_rss.h"
 #include "hns3_fdir.h"
 
 /* Vendor ID */
@@ -346,6 +347,9 @@ struct hns3_hw {
struct rte_ether_addr mc_addrs[HNS3_MC_MACADDR_NUM];
int mc_addrs_num; /* Multicast mac addresses number */
 
+   /* The configuration info of RSS */
+   struct hns3_rss_conf rss_info;
+
uint8_t num_tc; /* Total number of enabled TCs */
uint8_t hw_tc_map;
enum hns3_fc_mode current_mode;
diff --git a/drivers/net/hns3/hns3_fdir.h b/drivers/net/hns3/hns3_fdir.h
index c1137b7..f7b4216 100644
--- a/drivers/net/hns3

[dpdk-dev] [PATCH v2 10/22] net/hns3: add support for flow directory of hns3 PMD driver

[Wei Hu (Xavier)]

This patch adds support for rte_flow_ops operation and flow
directory of hns3 PMD driver.
Flow directory feature is only supported in hns3 PF driver.
It supports the network L2\L3\L4 and tunnel packet creation,
deletion, flushing, and querying hit statistics.

Signed-off-by: Chunsong Feng 
Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Hao Chen 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Huisong Li 
---
v1 -> v2:
Address Ferruh Yigit's comments as follows:

https://inbox.dpdk.org/dev/97ec0b71-cfd5-06eb-4518-b44b64ef8...@intel.com
---
 doc/guides/nics/features/hns3.ini |2 +
 drivers/net/hns3/Makefile |4 +-
 drivers/net/hns3/hns3_ethdev.c|   32 +
 drivers/net/hns3/hns3_ethdev.h|9 +-
 drivers/net/hns3/hns3_fdir.c  | 1059 +++
 drivers/net/hns3/hns3_fdir.h  |  197 +
 drivers/net/hns3/hns3_flow.c  | 1449 +
 drivers/net/hns3/meson.build  |2 +
 8 files changed, 2751 insertions(+), 3 deletions(-)
 create mode 100644 drivers/net/hns3/hns3_fdir.c
 create mode 100644 drivers/net/hns3/hns3_fdir.h
 create mode 100644 drivers/net/hns3/hns3_flow.c

diff --git a/doc/guides/nics/features/hns3.ini 
b/doc/guides/nics/features/hns3.ini
index caf1ef7..74161b6 100644
--- a/doc/guides/nics/features/hns3.ini
+++ b/doc/guides/nics/features/hns3.ini
@@ -8,6 +8,8 @@ Link status  = Y
 MTU update   = Y
 Unicast MAC filter   = Y
 Multicast MAC filter = Y
+Flow director= Y
+Flow API = Y
 FW version   = Y
 Linux UIO= Y
 Linux VFIO   = Y
diff --git a/drivers/net/hns3/Makefile b/drivers/net/hns3/Makefile
index 24032e2..50ce1d6 100644
--- a/drivers/net/hns3/Makefile
+++ b/drivers/net/hns3/Makefile
@@ -12,7 +12,7 @@ CFLAGS += -O3
 CFLAGS += $(WERROR_FLAGS)
 
 LDLIBS += -lrte_eal
-LDLIBS += -lrte_ethdev -lrte_net
+LDLIBS += -lrte_ethdev -lrte_net -lrte_hash
 LDLIBS += -lrte_bus_pci
 
 EXPORT_MAP := rte_pmd_hns3_version.map
@@ -24,5 +24,7 @@ LIBABIVER := 1
 #
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_ethdev.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_cmd.c
+SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_flow.c
+SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_fdir.c
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 3c9bba4..575cad9 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -2500,6 +2500,12 @@ hns3_init_hardware(struct hns3_adapter *hns)
goto err_mac_init;
}
 
+   ret = hns3_init_fd_config(hns);
+   if (ret) {
+   PMD_INIT_LOG(ERR, "Failed to init flow director: %d", ret);
+   goto err_mac_init;
+   }
+
ret = hns3_config_tso(hw, HNS3_TSO_MSS_MIN, HNS3_TSO_MSS_MAX);
if (ret) {
PMD_INIT_LOG(ERR, "Failed to config tso: %d", ret);
@@ -2559,8 +2565,18 @@ hns3_init_pf(struct rte_eth_dev *eth_dev)
goto err_get_config;
}
 
+   /* Initialize flow director filter list & hash */
+   ret = hns3_fdir_filter_init(hns);
+   if (ret) {
+   PMD_INIT_LOG(ERR, "Failed to alloc hashmap for fdir: %d", ret);
+   goto err_hw_init;
+   }
+
return 0;
 
+err_hw_init:
+   hns3_uninit_umv_space(hw);
+
 err_get_config:
hns3_cmd_uninit(hw);
 
@@ -2581,6 +2597,7 @@ hns3_uninit_pf(struct rte_eth_dev *eth_dev)
 
PMD_INIT_FUNC_TRACE();
 
+   hns3_fdir_filter_uninit(hns);
hns3_uninit_umv_space(hw);
hns3_cmd_uninit(hw);
hns3_cmd_destroy_queue(hw);
@@ -2598,6 +2615,8 @@ hns3_dev_close(struct rte_eth_dev *eth_dev)
 
hns3_configure_all_mc_mac_addr(hns, true);
hns3_uninit_pf(eth_dev);
+   rte_free(eth_dev->process_private);
+   eth_dev->process_private = NULL;
hw->adapter_state = HNS3_NIC_CLOSED;
 }
 
@@ -2611,6 +2630,7 @@ static const struct eth_dev_ops hns3_eth_dev_ops = {
.mac_addr_set   = hns3_set_default_mac_addr,
.set_mc_addr_list   = hns3_set_mc_mac_addr_list,
.link_update= hns3_dev_link_update,
+   .filter_ctrl= hns3_dev_filter_ctrl,
 };
 
 static int
@@ -2621,6 +2641,16 @@ hns3_dev_init(struct rte_eth_dev *eth_dev)
int ret;
 
PMD_INIT_FUNC_TRACE();
+   eth_dev->process_private = (struct hns3_process_private *)
+   rte_zmalloc_socket("hns3_filter_list",
+  sizeof(struct hns3_process_private),
+  RTE_CACHE_LINE_SIZE, eth_dev->device->numa_node);
+   if (eth_dev->process_private == NULL) {
+   PMD_INIT_LOG(ERR, "Failed to alloc memory for process private");
+   return -ENOMEM;
+   }
+   /* initialize flow filter lists */
+   hns3_filterlist_init(eth_dev);
 
eth_dev->dev_ops = &hns3_eth_dev_ops;
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
@@

[dpdk-dev] [PATCH v2 19/22] net/hns3: add abnormal interrupt process for hns3 PMD driver

[Wei Hu (Xavier)]

This patch adds abnormal interrupt process for hns3 PMD driver,
the interrupt reported by NIC hardware.

Signed-off-by: Chunsong Feng 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
 drivers/net/hns3/Makefile |   1 +
 drivers/net/hns3/hns3_ethdev.c| 164 ++
 drivers/net/hns3/hns3_ethdev_vf.c |   9 +-
 drivers/net/hns3/hns3_intr.c  | 654 ++
 drivers/net/hns3/hns3_intr.h  |  68 
 drivers/net/hns3/hns3_mbx.c   |   1 +
 drivers/net/hns3/meson.build  |   1 +
 7 files changed, 897 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/hns3/hns3_intr.c
 create mode 100644 drivers/net/hns3/hns3_intr.h

diff --git a/drivers/net/hns3/Makefile b/drivers/net/hns3/Makefile
index 4cc971b..45a39b9 100644
--- a/drivers/net/hns3/Makefile
+++ b/drivers/net/hns3/Makefile
@@ -30,6 +30,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_rxtx.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_rss.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_flow.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_fdir.c
+SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_intr.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_regs.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_dcb.c
 
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index c8a6283..578a3de 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -24,6 +25,7 @@
 #include "hns3_ethdev.h"
 #include "hns3_logs.h"
 #include "hns3_rxtx.h"
+#include "hns3_intr.h"
 #include "hns3_regs.h"
 #include "hns3_dcb.h"
 
@@ -50,10 +52,136 @@
 int hns3_logtype_init;
 int hns3_logtype_driver;
 
+enum hns3_evt_cause {
+   HNS3_VECTOR0_EVENT_RST,
+   HNS3_VECTOR0_EVENT_MBX,
+   HNS3_VECTOR0_EVENT_ERR,
+   HNS3_VECTOR0_EVENT_OTHER,
+};
+
 static int hns3_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 static int hns3_vlan_pvid_configure(struct hns3_adapter *hns, uint16_t pvid,
int on);
 
+static void
+hns3_pf_disable_irq0(struct hns3_hw *hw)
+{
+   hns3_write_dev(hw, HNS3_MISC_VECTOR_REG_BASE, 0);
+}
+
+static void
+hns3_pf_enable_irq0(struct hns3_hw *hw)
+{
+   hns3_write_dev(hw, HNS3_MISC_VECTOR_REG_BASE, 1);
+}
+
+static enum hns3_evt_cause
+hns3_check_event_cause(struct hns3_adapter *hns, uint32_t *clearval)
+{
+   struct hns3_hw *hw = &hns->hw;
+   uint32_t vector0_int_stats;
+   uint32_t cmdq_src_val;
+   uint32_t val;
+   enum hns3_evt_cause ret;
+
+   /* fetch the events from their corresponding regs */
+   vector0_int_stats = hns3_read_dev(hw, HNS3_VECTOR0_OTHER_INT_STS_REG);
+   cmdq_src_val = hns3_read_dev(hw, HNS3_VECTOR0_CMDQ_SRC_REG);
+
+   /*
+* Assumption: If by any chance reset and mailbox events are reported
+* together then we will only process reset event and defer the
+* processing of the mailbox events. Since, we would have not cleared
+* RX CMDQ event this time we would receive again another interrupt
+* from H/W just for the mailbox.
+*/
+   if (BIT(HNS3_VECTOR0_IMPRESET_INT_B) & vector0_int_stats) { /* IMP */
+   val = BIT(HNS3_VECTOR0_IMPRESET_INT_B);
+   ret = HNS3_VECTOR0_EVENT_RST;
+   goto out;
+   }
+
+   /* Global reset */
+   if (BIT(HNS3_VECTOR0_GLOBALRESET_INT_B) & vector0_int_stats) {
+   val = BIT(HNS3_VECTOR0_GLOBALRESET_INT_B);
+   ret = HNS3_VECTOR0_EVENT_RST;
+   goto out;
+   }
+
+   /* check for vector0 msix event source */
+   if (vector0_int_stats & HNS3_VECTOR0_REG_MSIX_MASK) {
+   val = vector0_int_stats;
+   ret = HNS3_VECTOR0_EVENT_ERR;
+   goto out;
+   }
+
+   /* check for vector0 mailbox(=CMDQ RX) event source */
+   if (BIT(HNS3_VECTOR0_RX_CMDQ_INT_B) & cmdq_src_val) {
+   cmdq_src_val &= ~BIT(HNS3_VECTOR0_RX_CMDQ_INT_B);
+   val = cmdq_src_val;
+   ret = HNS3_VECTOR0_EVENT_MBX;
+   goto out;
+   }
+
+   if (clearval && (vector0_int_stats || cmdq_src_val))
+   hns3_warn(hw, "surprise irq ector0_int_stats:0x%x 
cmdq_src_val:0x%x",
+ vector0_int_stats, cmdq_src_val);
+   val = vector0_int_stats;
+   ret = HNS3_VECTOR0_EVENT_OTHER;
+out:
+
+   if (clearval)
+   *clearval = val;
+   return ret;
+}
+
+static void
+hns3_clear_event_cause(struct hns3_hw *hw, uint32_t event_type, uint32_t 
regclr)
+{
+   if (event_type == HNS3_VECTOR0_EVENT_RST)
+   hns3_write_dev(hw, HNS3_MISC_RESET_STS_REG, regclr);
+   else if (event_type == HNS3_VECTOR0_EVENT_MBX)
+   hns3_write_dev(hw, HNS3_VECTOR0_CMDQ_SRC_REG, regclr);
+}
+
+static void
+hns3_clear_all_ev

[dpdk-dev] [PATCH v2 15/22] net/hns3: add support for hns3 VF PMD driver

[Wei Hu (Xavier)]

This patch adds support for hns3 VF PMD driver.

In current version, we only support VF device is bound to vfio_pci or
igb_uio and then driven by DPDK driver when PF is driven by kernel mode
hns3 ethdev driver, VF is not supported when PF is driven by DPDK
driver.

Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
v1 -> v2:
Address Ferruh Yigit's comments as follows:

https://inbox.dpdk.org/dev/10900af2-2c5b-5067-e359-d41c2344e...@intel.com
---
 doc/guides/nics/features/hns3_vf.ini |   21 +
 drivers/net/hns3/Makefile|1 +
 drivers/net/hns3/hns3_ethdev_vf.c| 1237 ++
 drivers/net/hns3/meson.build |1 +
 4 files changed, 1260 insertions(+)
 create mode 100644 doc/guides/nics/features/hns3_vf.ini
 create mode 100644 drivers/net/hns3/hns3_ethdev_vf.c

diff --git a/doc/guides/nics/features/hns3_vf.ini 
b/doc/guides/nics/features/hns3_vf.ini
new file mode 100644
index 000..e77a3fb
--- /dev/null
+++ b/doc/guides/nics/features/hns3_vf.ini
@@ -0,0 +1,21 @@
+;
+; Supported features of the 'hns3' network poll mode driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Link status  = Y
+MTU update   = Y
+Jumbo frame  = Y
+Unicast MAC filter   = Y
+Multicast MAC filter = Y
+RSS hash = Y
+RSS key update   = Y
+RSS reta update  = Y
+VLAN filter  = Y
+Flow director= Y
+Flow API = Y
+VLAN offload = Y
+Linux UIO= Y
+Linux VFIO   = Y
+ARMv8= Y
diff --git a/drivers/net/hns3/Makefile b/drivers/net/hns3/Makefile
index fc39279..a8890f0 100644
--- a/drivers/net/hns3/Makefile
+++ b/drivers/net/hns3/Makefile
@@ -23,6 +23,7 @@ LIBABIVER := 1
 # all source are stored in SRCS-y
 #
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_ethdev.c
+SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_ethdev_vf.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_cmd.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_mbx.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_rss.c
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c 
b/drivers/net/hns3/hns3_ethdev_vf.c
new file mode 100644
index 000..5f3384f
--- /dev/null
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -0,0 +1,1237 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2019 Hisilicon Limited.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "hns3_ethdev.h"
+#include "hns3_logs.h"
+#include "hns3_regs.h"
+#include "hns3_dcb.h"
+
+#define HNS3VF_KEEP_ALIVE_INTERVAL 200 /* us */
+#define HNS3VF_SERVICE_INTERVAL100 /* us */
+
+#define HNS3VF_RESET_WAIT_MS   20
+#define HNS3VF_RESET_WAIT_CNT  2000
+
+enum hns3vf_evt_cause {
+   HNS3VF_VECTOR0_EVENT_RST,
+   HNS3VF_VECTOR0_EVENT_MBX,
+   HNS3VF_VECTOR0_EVENT_OTHER,
+};
+
+static int hns3vf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
+static int hns3vf_dev_configure_vlan(struct rte_eth_dev *dev);
+
+static int
+hns3vf_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
+   __attribute__ ((unused)) uint32_t idx,
+   __attribute__ ((unused)) uint32_t pool)
+{
+   struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+   char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
+   int ret;
+
+   rte_spinlock_lock(&hw->lock);
+   ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_UNICAST,
+   HNS3_MBX_MAC_VLAN_UC_ADD, mac_addr->addr_bytes,
+   RTE_ETHER_ADDR_LEN, false, NULL, 0);
+   rte_spinlock_unlock(&hw->lock);
+   if (ret) {
+   rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
+ mac_addr);
+   hns3_err(hw, "Failed to add mac addr(%s) for vf: %d", mac_str,
+ret);
+   }
+
+   return ret;
+}
+
+static void
+hns3vf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t idx)
+{
+   struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+   /* index will be checked by upper level rte interface */
+   struct rte_ether_addr *mac_addr = &dev->data->mac_addrs[idx];
+   char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
+   int ret;
+
+   rte_spinlock_lock(&hw->lock);
+   ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_UNICAST,
+   HNS3_MBX_MAC_VLAN_UC_REMOVE,
+   mac_addr->addr_bytes, RTE_ETHER_ADDR_LEN, false,
+   NULL, 0);
+   rte_spinlock_unlock(&hw->lock);
+   if (ret) {
+   rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
+ 

[dpdk-dev] [PATCH v2 16/22] net/hns3: add RX/TX package burst and queue related operation

[Wei Hu (Xavier)]

This patch adds queue related operation, package sending and
receiving function codes.

Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Min Wang (Jushui) 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
v1 -> v2:
Address Ferruh Yigit's comments as follows:

https://inbox.dpdk.org/dev/394ce2c3-d892-55fa-dffa-6580ceda4...@intel.com
---
 doc/guides/nics/features/hns3.ini|5 +
 doc/guides/nics/features/hns3_vf.ini |5 +
 drivers/net/hns3/Makefile|3 +-
 drivers/net/hns3/hns3_ethdev.c   |   22 +
 drivers/net/hns3/hns3_ethdev_vf.c|   36 +-
 drivers/net/hns3/hns3_rxtx.c | 1659 ++
 drivers/net/hns3/hns3_rxtx.h |  317 +++
 drivers/net/hns3/meson.build |1 +
 8 files changed, 2046 insertions(+), 2 deletions(-)
 create mode 100644 drivers/net/hns3/hns3_rxtx.c
 create mode 100644 drivers/net/hns3/hns3_rxtx.h

diff --git a/doc/guides/nics/features/hns3.ini 
b/doc/guides/nics/features/hns3.ini
index c57afde..09b8ab0 100644
--- a/doc/guides/nics/features/hns3.ini
+++ b/doc/guides/nics/features/hns3.ini
@@ -16,7 +16,12 @@ VLAN filter  = Y
 Flow director= Y
 Flow control = Y
 Flow API = Y
+CRC offload  = Y
 VLAN offload = Y
+L3 checksum offload  = Y
+L4 checksum offload  = Y
+Inner L3 checksum= Y
+Inner L4 checksum= Y
 FW version   = Y
 Linux UIO= Y
 Linux VFIO   = Y
diff --git a/doc/guides/nics/features/hns3_vf.ini 
b/doc/guides/nics/features/hns3_vf.ini
index e77a3fb..5fddfa5 100644
--- a/doc/guides/nics/features/hns3_vf.ini
+++ b/doc/guides/nics/features/hns3_vf.ini
@@ -15,7 +15,12 @@ RSS reta update  = Y
 VLAN filter  = Y
 Flow director= Y
 Flow API = Y
+CRC offload  = Y
 VLAN offload = Y
+L3 checksum offload  = Y
+L4 checksum offload  = Y
+Inner L3 checksum= Y
+Inner L4 checksum= Y
 Linux UIO= Y
 Linux VFIO   = Y
 ARMv8= Y
diff --git a/drivers/net/hns3/Makefile b/drivers/net/hns3/Makefile
index a8890f0..1a5c66a 100644
--- a/drivers/net/hns3/Makefile
+++ b/drivers/net/hns3/Makefile
@@ -11,7 +11,7 @@ LIB = librte_pmd_hns3.a
 CFLAGS += -O3
 CFLAGS += $(WERROR_FLAGS)
 
-LDLIBS += -lrte_eal
+LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
 LDLIBS += -lrte_ethdev -lrte_net -lrte_hash
 LDLIBS += -lrte_bus_pci
 
@@ -26,6 +26,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_ethdev.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_ethdev_vf.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_cmd.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_mbx.c
+SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_rxtx.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_rss.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_flow.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_fdir.c
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 2f9acee..edc85cb 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -23,6 +23,7 @@
 
 #include "hns3_ethdev.h"
 #include "hns3_logs.h"
+#include "hns3_rxtx.h"
 #include "hns3_regs.h"
 #include "hns3_dcb.h"
 
@@ -1717,6 +1718,18 @@ hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct 
rte_eth_dev_info *info)
 DEV_TX_OFFLOAD_MULTI_SEGS |
 info->tx_queue_offload_capa);
 
+   info->rx_desc_lim = (struct rte_eth_desc_lim) {
+   .nb_max = HNS3_MAX_RING_DESC,
+   .nb_min = HNS3_MIN_RING_DESC,
+   .nb_align = HNS3_ALIGN_RING_DESC,
+   };
+
+   info->tx_desc_lim = (struct rte_eth_desc_lim) {
+   .nb_max = HNS3_MAX_RING_DESC,
+   .nb_min = HNS3_MIN_RING_DESC,
+   .nb_align = HNS3_ALIGN_RING_DESC,
+   };
+
info->vmdq_queue_num = 0;
 
info->reta_size = HNS3_RSS_IND_TBL_SIZE;
@@ -1727,6 +1740,8 @@ hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct 
rte_eth_dev_info *info)
info->default_txportconf.burst_size = HNS3_DEFAULT_PORT_CONF_BURST_SIZE;
info->default_rxportconf.nb_queues = HNS3_DEFAULT_PORT_CONF_QUEUES_NUM;
info->default_txportconf.nb_queues = HNS3_DEFAULT_PORT_CONF_QUEUES_NUM;
+   info->default_rxportconf.ring_size = HNS3_DEFAULT_RING_DESC;
+   info->default_txportconf.ring_size = HNS3_DEFAULT_RING_DESC;
 
return 0;
 }
@@ -3326,6 +3341,7 @@ hns3_dev_close(struct rte_eth_dev *eth_dev)
 
hns3_configure_all_mc_mac_addr(hns, true);
hns3_uninit_pf(eth_dev);
+   hns3_free_all_queues(eth_dev);
rte_free(eth_dev->process_private);
eth_dev->process_private = NULL;
hw->adapter_state = HNS3_NIC_CLOSED;
@@ -3522,6 +3538,10 @@ static const struct eth_dev_ops hns3_eth_dev_ops = {
.mtu_set= hns3_dev_mtu_set,
.dev_infos_get  = hns3_dev_infos_get,

[dpdk-dev] [PATCH v2 18/22] net/hns3: add dump register ops for hns3 PMD driver

[Wei Hu (Xavier)]

This patch adds get_reg related function codes for hns3 PMD driver.

Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
 drivers/net/hns3/Makefile |   1 +
 drivers/net/hns3/hns3_ethdev.c|   1 +
 drivers/net/hns3/hns3_ethdev_vf.c |   1 +
 drivers/net/hns3/hns3_regs.c  | 368 ++
 drivers/net/hns3/hns3_regs.h  |   1 +
 drivers/net/hns3/meson.build  |   1 +
 6 files changed, 373 insertions(+)
 create mode 100644 drivers/net/hns3/hns3_regs.c

diff --git a/drivers/net/hns3/Makefile b/drivers/net/hns3/Makefile
index 1a5c66a..4cc971b 100644
--- a/drivers/net/hns3/Makefile
+++ b/drivers/net/hns3/Makefile
@@ -30,6 +30,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_rxtx.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_rss.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_flow.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_fdir.c
+SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_regs.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_dcb.c
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 498ad87..c8a6283 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -4042,6 +4042,7 @@ static const struct eth_dev_ops hns3_eth_dev_ops = {
.vlan_tpid_set  = hns3_vlan_tpid_set,
.vlan_offload_set   = hns3_vlan_offload_set,
.vlan_pvid_set  = hns3_vlan_pvid_set,
+   .get_reg= hns3_get_regs,
.get_dcb_info   = hns3_get_dcb_info,
.dev_supported_ptypes_get = hns3_dev_supported_ptypes_get,
 };
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c 
b/drivers/net/hns3/hns3_ethdev_vf.c
index 8a0dbb9..64b0f11 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -1134,6 +1134,7 @@ static const struct eth_dev_ops hns3vf_eth_dev_ops = {
.filter_ctrl= hns3_dev_filter_ctrl,
.vlan_filter_set= hns3vf_vlan_filter_set,
.vlan_offload_set   = hns3vf_vlan_offload_set,
+   .get_reg= hns3_get_regs,
.dev_supported_ptypes_get = hns3_dev_supported_ptypes_get,
 };
 
diff --git a/drivers/net/hns3/hns3_regs.c b/drivers/net/hns3/hns3_regs.c
new file mode 100644
index 000..d83eef3
--- /dev/null
+++ b/drivers/net/hns3/hns3_regs.c
@@ -0,0 +1,368 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2019 Hisilicon Limited.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "hns3_ethdev.h"
+#include "hns3_logs.h"
+#include "hns3_rxtx.h"
+#include "hns3_regs.h"
+
+#define MAX_SEPARATE_NUM   4
+#define SEPARATOR_VALUE0x
+#define REG_NUM_PER_LINE   4
+#define REG_LEN_PER_LINE   (REG_NUM_PER_LINE * sizeof(uint32_t))
+
+static const uint32_t cmdq_reg_addrs[] = {HNS3_CMDQ_TX_ADDR_L_REG,
+ HNS3_CMDQ_TX_ADDR_H_REG,
+ HNS3_CMDQ_TX_DEPTH_REG,
+ HNS3_CMDQ_TX_TAIL_REG,
+ HNS3_CMDQ_TX_HEAD_REG,
+ HNS3_CMDQ_RX_ADDR_L_REG,
+ HNS3_CMDQ_RX_ADDR_H_REG,
+ HNS3_CMDQ_RX_DEPTH_REG,
+ HNS3_CMDQ_RX_TAIL_REG,
+ HNS3_CMDQ_RX_HEAD_REG,
+ HNS3_VECTOR0_CMDQ_SRC_REG,
+ HNS3_CMDQ_INTR_STS_REG,
+ HNS3_CMDQ_INTR_EN_REG,
+ HNS3_CMDQ_INTR_GEN_REG};
+
+static const uint32_t common_reg_addrs[] = {HNS3_MISC_VECTOR_REG_BASE,
+   HNS3_VECTOR0_OTER_EN_REG,
+   HNS3_MISC_RESET_STS_REG,
+   HNS3_VECTOR0_OTHER_INT_STS_REG,
+   HNS3_GLOBAL_RESET_REG,
+   HNS3_FUN_RST_ING,
+   HNS3_GRO_EN_REG};
+
+static const uint32_t common_vf_reg_addrs[] = {HNS3_MISC_VECTOR_REG_BASE,
+  HNS3_FUN_RST_ING,
+  HNS3_GRO_EN_REG};
+
+static const uint32_t ring_reg_addrs[] = {HNS3_RING_RX_BASEADDR_L_REG,
+ HNS3_RING_RX_BASEADDR_H_REG,
+ HNS3_RING_RX_BD_NUM_REG,
+ HNS3_RING_RX_BD_LEN_REG,
+ HNS3_RING_RX_MERGE_EN_REG,
+   

[dpdk-dev] [PATCH v2 13/22] net/hns3: add support for vlan of hns3 PMD driver

[Wei Hu (Xavier)]

This patch adds support for vlan related operation of hns3 PMD driver.

Signed-off-by: Min Hu (Connor) 
Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
v1 -> v2:
Add VLAN filter and VLAN offload feature into hns3.ini file
according to Ferruh Yigit's comments.
---
 doc/guides/nics/features/hns3.ini |   2 +
 drivers/net/hns3/hns3_ethdev.c| 701 ++
 2 files changed, 703 insertions(+)

diff --git a/doc/guides/nics/features/hns3.ini 
b/doc/guides/nics/features/hns3.ini
index 7efbaf8..c57afde 100644
--- a/doc/guides/nics/features/hns3.ini
+++ b/doc/guides/nics/features/hns3.ini
@@ -12,9 +12,11 @@ RSS hash = Y
 RSS key update   = Y
 RSS reta update  = Y
 DCB  = Y
+VLAN filter  = Y
 Flow director= Y
 Flow control = Y
 Flow API = Y
+VLAN offload = Y
 FW version   = Y
 Linux UIO= Y
 Linux VFIO   = Y
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index ca84e63..2f9acee 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -30,10 +30,701 @@
 #define HNS3_DEFAULT_PORT_CONF_QUEUES_NUM  1
 
 #define HNS3_SERVICE_INTERVAL  100 /* us */
+#define HNS3_PORT_BASE_VLAN_DISABLE0
+#define HNS3_PORT_BASE_VLAN_ENABLE 1
+#define HNS3_INVLID_PVID   0x
+
+#define HNS3_FILTER_TYPE_VF0
+#define HNS3_FILTER_TYPE_PORT  1
+#define HNS3_FILTER_FE_EGRESS_V1_B BIT(0)
+#define HNS3_FILTER_FE_NIC_INGRESS_B   BIT(0)
+#define HNS3_FILTER_FE_NIC_EGRESS_BBIT(1)
+#define HNS3_FILTER_FE_ROCE_INGRESS_B  BIT(2)
+#define HNS3_FILTER_FE_ROCE_EGRESS_B   BIT(3)
+#define HNS3_FILTER_FE_EGRESS  (HNS3_FILTER_FE_NIC_EGRESS_B \
+   | HNS3_FILTER_FE_ROCE_EGRESS_B)
+#define HNS3_FILTER_FE_INGRESS (HNS3_FILTER_FE_NIC_INGRESS_B \
+   | HNS3_FILTER_FE_ROCE_INGRESS_B)
 
 int hns3_logtype_init;
 int hns3_logtype_driver;
 
+static int hns3_vlan_pvid_configure(struct hns3_adapter *hns, uint16_t pvid,
+   int on);
+
+static int
+hns3_set_port_vlan_filter(struct hns3_adapter *hns, uint16_t vlan_id, int on)
+{
+#define HNS3_VLAN_OFFSET_160   160
+   struct hns3_vlan_filter_pf_cfg_cmd *req;
+   struct hns3_hw *hw = &hns->hw;
+   uint8_t vlan_offset_byte_val;
+   struct hns3_cmd_desc desc;
+   uint8_t vlan_offset_byte;
+   uint8_t vlan_offset_160;
+   int ret;
+
+   hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_VLAN_FILTER_PF_CFG, false);
+
+   vlan_offset_160 = vlan_id / HNS3_VLAN_OFFSET_160;
+   vlan_offset_byte = (vlan_id % HNS3_VLAN_OFFSET_160) / 8;
+   vlan_offset_byte_val = 1 << (vlan_id % 8);
+
+   req = (struct hns3_vlan_filter_pf_cfg_cmd *)desc.data;
+   req->vlan_offset = vlan_offset_160;
+   req->vlan_cfg = on ? 0 : 1;
+   req->vlan_offset_bitmap[vlan_offset_byte] = vlan_offset_byte_val;
+
+   ret = hns3_cmd_send(hw, &desc, 1);
+   if (ret)
+   hns3_err(hw, "set port vlan id failed, vlan_id =%u, ret =%d",
+vlan_id, ret);
+
+   return ret;
+}
+
+static void
+hns3_rm_dev_vlan_table(struct hns3_adapter *hns, uint16_t vlan_id)
+{
+   struct hns3_user_vlan_table *vlan_entry;
+   struct hns3_pf *pf = &hns->pf;
+
+   LIST_FOREACH(vlan_entry, &pf->vlan_list, next) {
+   if (vlan_entry->vlan_id == vlan_id) {
+   if (vlan_entry->hd_tbl_status)
+   hns3_set_port_vlan_filter(hns, vlan_id, 0);
+   LIST_REMOVE(vlan_entry, next);
+   rte_free(vlan_entry);
+   break;
+   }
+   }
+}
+
+static void
+hns3_add_dev_vlan_table(struct hns3_adapter *hns, uint16_t vlan_id,
+   bool writen_to_tbl)
+{
+   struct hns3_user_vlan_table *vlan_entry;
+   struct hns3_hw *hw = &hns->hw;
+   struct hns3_pf *pf = &hns->pf;
+
+   vlan_entry = rte_zmalloc("hns3_vlan_tbl", sizeof(*vlan_entry), 0);
+   if (vlan_entry == NULL) {
+   hns3_err(hw, "Failed to malloc hns3 vlan table");
+   return;
+   }
+
+   vlan_entry->hd_tbl_status = writen_to_tbl;
+   vlan_entry->vlan_id = vlan_id;
+
+   LIST_INSERT_HEAD(&pf->vlan_list, vlan_entry, next);
+}
+
+static int
+hns3_vlan_filter_configure(struct hns3_adapter *hns, uint16_t vlan_id, int on)
+{
+   struct hns3_pf *pf = &hns->pf;
+   bool writen_to_tbl = false;
+   int ret = 0;
+
+   /*
+* When vlan filter is enabled, hardware regards vlan id 0 as the entry
+* for normal packet, deleting vlan id 0 is not allowed.
+*/
+   if (on == 0 && vlan_id == 0)
+   return 0;
+
+   /*
+* When port base 

[dpdk-dev] [PATCH v2 20/22] net/hns3: add stats related ops for hns3 PMD driver

[Wei Hu (Xavier)]

This patch adds stats_get, stats_reset, xstats_get, xstats_get_names
xstats_reset, xstats_get_by_id and xstats_get_names_by_id related
function codes.

Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Hao Chen 
Signed-off-by: Chunsong Feng 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Huisong Li 
---
v1 -> v2:
Address Ferruh Yigit's comments as follows:

https://inbox.dpdk.org/dev/13ad540e-ca60-e304-352b-b33ca1ebb...@intel.com
---
 doc/guides/nics/features/hns3.ini|   3 +
 doc/guides/nics/features/hns3_vf.ini |   3 +
 drivers/net/hns3/Makefile|   1 +
 drivers/net/hns3/hns3_ethdev.c   |   7 +
 drivers/net/hns3/hns3_ethdev.h   |   4 +
 drivers/net/hns3/hns3_ethdev_vf.c|   8 +
 drivers/net/hns3/hns3_stats.c| 971 +++
 drivers/net/hns3/hns3_stats.h| 152 ++
 drivers/net/hns3/meson.build |   1 +
 9 files changed, 1150 insertions(+)
 create mode 100644 drivers/net/hns3/hns3_stats.c
 create mode 100644 drivers/net/hns3/hns3_stats.h

diff --git a/doc/guides/nics/features/hns3.ini 
b/doc/guides/nics/features/hns3.ini
index 90b7e29..308048c 100644
--- a/doc/guides/nics/features/hns3.ini
+++ b/doc/guides/nics/features/hns3.ini
@@ -25,6 +25,9 @@ L3 checksum offload  = Y
 L4 checksum offload  = Y
 Inner L3 checksum= Y
 Inner L4 checksum= Y
+Basic stats  = Y
+Extended stats   = Y
+Stats per queue  = Y
 FW version   = Y
 Linux UIO= Y
 Linux VFIO   = Y
diff --git a/doc/guides/nics/features/hns3_vf.ini 
b/doc/guides/nics/features/hns3_vf.ini
index 5fddfa5..a152ca5 100644
--- a/doc/guides/nics/features/hns3_vf.ini
+++ b/doc/guides/nics/features/hns3_vf.ini
@@ -21,6 +21,9 @@ L3 checksum offload  = Y
 L4 checksum offload  = Y
 Inner L3 checksum= Y
 Inner L4 checksum= Y
+Basic stats  = Y
+Extended stats   = Y
+Stats per queue  = Y
 Linux UIO= Y
 Linux VFIO   = Y
 ARMv8= Y
diff --git a/drivers/net/hns3/Makefile b/drivers/net/hns3/Makefile
index 45a39b9..fede05d 100644
--- a/drivers/net/hns3/Makefile
+++ b/drivers/net/hns3/Makefile
@@ -31,6 +31,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_rss.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_flow.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_fdir.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_intr.c
+SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_stats.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_regs.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_dcb.c
 
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 578a3de..5debb05 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -4182,6 +4182,13 @@ static const struct eth_dev_ops hns3_eth_dev_ops = {
.allmulticast_enable  = hns3_dev_allmulticast_enable,
.allmulticast_disable = hns3_dev_allmulticast_disable,
.mtu_set= hns3_dev_mtu_set,
+   .stats_get  = hns3_stats_get,
+   .stats_reset= hns3_stats_reset,
+   .xstats_get = hns3_dev_xstats_get,
+   .xstats_get_names   = hns3_dev_xstats_get_names,
+   .xstats_reset   = hns3_dev_xstats_reset,
+   .xstats_get_by_id   = hns3_dev_xstats_get_by_id,
+   .xstats_get_names_by_id = hns3_dev_xstats_get_names_by_id,
.dev_infos_get  = hns3_dev_infos_get,
.fw_version_get = hns3_fw_version_get,
.rx_queue_setup = hns3_rx_queue_setup,
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index 2a79e6e..c907a35 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -12,6 +12,7 @@
 #include "hns3_mbx.h"
 #include "hns3_rss.h"
 #include "hns3_fdir.h"
+#include "hns3_stats.h"
 
 /* Vendor ID */
 #define PCI_VENDOR_ID_HUAWEI   0x19e5
@@ -338,6 +339,9 @@ struct hns3_hw {
pthread_t irq_thread_id;
struct hns3_mac mac;
unsigned int secondary_cnt; /* Number of secondary processes init'd. */
+   struct hns3_tqp_stats tqp_stats;
+   /* Include Mac stats | Rx stats | Tx stats */
+   struct hns3_mac_stats mac_stats;
uint32_t fw_version;
 
uint16_t num_msi;
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c 
b/drivers/net/hns3/hns3_ethdev_vf.c
index 9da42a5..7140945 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -952,6 +952,7 @@ hns3vf_init_vf(struct rte_eth_dev *eth_dev)
 
hns3_set_default_rss_args(hw);
 
+   hns3_stats_reset(eth_dev);
return 0;
 
 err_get_config:
@@ -1123,6 +1124,13 @@ static const struct eth_dev_ops hns3vf_eth_dev_ops = {
.dev_stop   = hns3vf_dev_stop,
.dev_close  = hns3vf_dev_close,
.mtu_set= hns3vf_dev_mtu_set,
+   .stats_get  = hns3_stats_get,
+   .stats_reset= hns3_stats_reset,
+   .xstats_get = hns3_dev_xstats_get,
+   .xsta

[dpdk-dev] [PATCH v2 14/22] net/hns3: add support for mailbox of hns3 PMD driver

[Wei Hu (Xavier)]

This patch adds support for mailbox of hns3 PMD driver, mailbox is
used for communication between PF and VF driver.

Signed-off-by: Min Hu (Connor) 
Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
v1 -> v2:
Address Ferruh Yigit's comments as follows:

https://inbox.dpdk.org/dev/c336a8a2-af82-8779-cfea-0629716b2...@intel.com
---
 drivers/net/hns3/Makefile  |   1 +
 drivers/net/hns3/hns3_cmd.c|   3 +
 drivers/net/hns3/hns3_ethdev.h |   4 +
 drivers/net/hns3/hns3_mbx.c| 337 +
 drivers/net/hns3/hns3_mbx.h| 136 +
 drivers/net/hns3/meson.build   |   1 +
 6 files changed, 482 insertions(+)
 create mode 100644 drivers/net/hns3/hns3_mbx.c
 create mode 100644 drivers/net/hns3/hns3_mbx.h

diff --git a/drivers/net/hns3/Makefile b/drivers/net/hns3/Makefile
index b4e2d4f..fc39279 100644
--- a/drivers/net/hns3/Makefile
+++ b/drivers/net/hns3/Makefile
@@ -24,6 +24,7 @@ LIBABIVER := 1
 #
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_ethdev.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_cmd.c
+SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_mbx.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_rss.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_flow.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_fdir.c
diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c
index 853b9fd..706b910 100644
--- a/drivers/net/hns3/hns3_cmd.c
+++ b/drivers/net/hns3/hns3_cmd.c
@@ -476,6 +476,9 @@ hns3_cmd_init(struct hns3_hw *hw)
hw->cmq.csq.next_to_use = 0;
hw->cmq.crq.next_to_clean = 0;
hw->cmq.crq.next_to_use = 0;
+   hw->mbx_resp.head = 0;
+   hw->mbx_resp.tail = 0;
+   hw->mbx_resp.lost = 0;
hns3_cmd_init_regs(hw);
 
rte_spinlock_unlock(&hw->cmq.crq.lock);
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index 87e3bbc..2a79e6e 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -9,6 +9,7 @@
 #include 
 
 #include "hns3_cmd.h"
+#include "hns3_mbx.h"
 #include "hns3_rss.h"
 #include "hns3_fdir.h"
 
@@ -332,6 +333,9 @@ struct hns3_hw {
struct rte_eth_dev_data *data;
void *io_base;
struct hns3_cmq cmq;
+   struct hns3_mbx_resp_status mbx_resp; /* mailbox response */
+   struct hns3_mbx_arq_ring arq; /* mailbox async rx queue */
+   pthread_t irq_thread_id;
struct hns3_mac mac;
unsigned int secondary_cnt; /* Number of secondary processes init'd. */
uint32_t fw_version;
diff --git a/drivers/net/hns3/hns3_mbx.c b/drivers/net/hns3/hns3_mbx.c
new file mode 100644
index 000..200eb77
--- /dev/null
+++ b/drivers/net/hns3/hns3_mbx.c
@@ -0,0 +1,337 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2019 Hisilicon Limited.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "hns3_ethdev.h"
+#include "hns3_regs.h"
+#include "hns3_logs.h"
+
+#define HNS3_REG_MSG_DATA_OFFSET   4
+#define HNS3_CMD_CODE_OFFSET   2
+
+static const struct errno_respcode_map err_code_map[] = {
+   {0, 0},
+   {1, -EPERM},
+   {2, -ENOENT},
+   {5, -EIO},
+   {11, -EAGAIN},
+   {12, -ENOMEM},
+   {16, -EBUSY},
+   {22, -EINVAL},
+   {28, -ENOSPC},
+   {95, -EOPNOTSUPP},
+};
+
+static int
+hns3_resp_to_errno(uint16_t resp_code)
+{
+   uint32_t i, num;
+
+   num = sizeof(err_code_map) / sizeof(struct errno_respcode_map);
+   for (i = 0; i < num; i++) {
+   if (err_code_map[i].resp_code == resp_code)
+   return err_code_map[i].err_no;
+   }
+
+   return -EIO;
+}
+
+static void
+hns3_poll_all_sync_msg(void)
+{
+   struct rte_eth_dev *eth_dev;
+   struct hns3_adapter *adapter;
+   const char *name;
+   uint16_t port_id;
+
+   RTE_ETH_FOREACH_DEV(port_id) {
+   eth_dev = &rte_eth_devices[port_id];
+   name = eth_dev->device->driver->name;
+   if (strcmp(name, "net_hns3") && strcmp(name, "net_hns3_vf"))
+   continue;
+   adapter = eth_dev->data->dev_private;
+   if (!adapter || adapter->hw.adapter_state == HNS3_NIC_CLOSED)
+   continue;
+   /* Synchronous msg, the mbx_resp.req_msg_data is non-zero */
+   if (adapter->hw.mbx_resp.req_msg_data)
+   hns3_dev_handle_mbx_msg(&adapter->hw);
+   }
+}
+
+static int
+hns3_get_mbx_resp(struct hns3_hw *hw, uint16_t code0, uint16_t code1,
+ uint8_t *resp_data, uint16_t resp_len)
+{
+#define HNS3_MAX_RETRY_MS  500
+   struct hns3_mbx_resp_status *mbx_resp;
+   bool in_irq = false;
+   uint64_t now;
+   uint64_t end;
+
+   if (resp_len > HNS3_MBX_MAX_RESP_

[dpdk-dev] [PATCH v2 17/22] net/hns3: add start stop configure promiscuous ops

[Wei Hu (Xavier)]

This patch adds dev_start, dev_stop, dev_configure, promiscuous_enable,
promiscuous_disable, allmulticast_enable, allmulticast_disable,
dev_infos_get related function codes.

Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Chunsong Feng 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
v1 -> v2:
Address Ferruh Yigit's comments as follows:

https://inbox.dpdk.org/dev/83ac15f1-c212-9965-3cbe-f053b4756...@intel.com
---
 doc/guides/nics/features/hns3.ini |   3 +
 drivers/net/hns3/hns3_ethdev.c| 483 ++
 2 files changed, 486 insertions(+)

diff --git a/doc/guides/nics/features/hns3.ini 
b/doc/guides/nics/features/hns3.ini
index 09b8ab0..90b7e29 100644
--- a/doc/guides/nics/features/hns3.ini
+++ b/doc/guides/nics/features/hns3.ini
@@ -6,6 +6,9 @@
 [Features]
 Link status  = Y
 MTU update   = Y
+Jumbo frame  = Y
+Promiscuous mode = Y
+Allmulticast mode= Y
 Unicast MAC filter   = Y
 Multicast MAC filter = Y
 RSS hash = Y
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index edc85cb..498ad87 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -50,6 +50,7 @@
 int hns3_logtype_init;
 int hns3_logtype_driver;
 
+static int hns3_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 static int hns3_vlan_pvid_configure(struct hns3_adapter *hns, uint16_t pvid,
int on);
 
@@ -527,6 +528,25 @@ hns3_add_all_vlan_table(struct hns3_adapter *hns)
}
 }
 
+static void
+hns3_remove_all_vlan_table(struct hns3_adapter *hns)
+{
+   struct hns3_hw *hw = &hns->hw;
+   struct hns3_pf *pf = &hns->pf;
+   int ret;
+
+   hns3_rm_all_vlan_table(hns, true);
+   if (pf->port_base_vlan_cfg.pvid != HNS3_INVLID_PVID) {
+   ret = hns3_set_port_vlan_filter(hns,
+   pf->port_base_vlan_cfg.pvid, 0);
+   if (ret) {
+   hns3_err(hw, "Failed to remove all vlan table, ret =%d",
+ret);
+   return;
+   }
+   }
+}
+
 static int
 hns3_update_vlan_filter_entries(struct hns3_adapter *hns,
uint16_t port_base_vlan_state,
@@ -727,6 +747,42 @@ hns3_init_vlan_config(struct hns3_adapter *hns)
 }
 
 static int
+hns3_dev_configure_vlan(struct rte_eth_dev *dev)
+{
+   struct hns3_adapter *hns = dev->data->dev_private;
+   struct rte_eth_dev_data *data = dev->data;
+   struct rte_eth_txmode *txmode;
+   struct hns3_hw *hw = &hns->hw;
+   int ret;
+
+   txmode = &data->dev_conf.txmode;
+   if (txmode->hw_vlan_reject_tagged || txmode->hw_vlan_reject_untagged)
+   hns3_warn(hw,
+ "hw_vlan_reject_tagged or hw_vlan_reject_untagged "
+ "configuration is not supported! Ignore these two "
+ "parameters: hw_vlan_reject_tagged(%d), "
+ "hw_vlan_reject_untagged(%d)",
+ txmode->hw_vlan_reject_tagged,
+ txmode->hw_vlan_reject_untagged);
+
+   /* Apply vlan offload setting */
+   ret = hns3_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
+   if (ret) {
+   hns3_err(hw, "dev config vlan Strip failed, ret =%d", ret);
+   return ret;
+   }
+
+   /* Apply pvid setting */
+   ret = hns3_vlan_pvid_set(dev, txmode->pvid,
+txmode->hw_vlan_insert_pvid);
+   if (ret)
+   hns3_err(hw, "dev config vlan pvid(%d) failed, ret =%d",
+txmode->pvid, ret);
+
+   return ret;
+}
+
+static int
 hns3_config_tso(struct hns3_hw *hw, unsigned int tso_mss_min,
unsigned int tso_mss_max)
 {
@@ -1242,6 +1298,12 @@ hns3_set_default_mac_addr(struct rte_eth_dev *dev,
goto err_add_uc_addr;
}
 
+   ret = hns3_pause_addr_cfg(hw, mac_addr->addr_bytes);
+   if (ret) {
+   hns3_err(hw, "Failed to configure mac pause address: %d", ret);
+   goto err_pause_addr_cfg;
+   }
+
rte_ether_addr_copy(mac_addr,
(struct rte_ether_addr *)hw->mac.mac_addr);
hw->mac.default_addr_setted = true;
@@ -1249,6 +1311,16 @@ hns3_set_default_mac_addr(struct rte_eth_dev *dev,
 
return 0;
 
+err_pause_addr_cfg:
+   ret_val = hns3_remove_uc_addr_common(hw, mac_addr);
+   if (ret_val) {
+   rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
+ mac_addr);
+   hns3_warn(hw,
+ "Failed to roll back to del setted mac addr(%s): %d",
+ mac_str, ret_val);
+   }
+
 err_add_uc_addr:
if (rm_succes) {
ret_val = hns3_add_uc_addr_common(hw, oaddr);
@@ 

[dpdk-dev] [PATCH v2 22/22] net/hns3: add multiple process support for hns3 PMD driver

[Wei Hu (Xavier)]

This patch adds multiple process support for hns3 PMD driver.
Multi-process support selection queue by configuring RSS or
flow director. The primary process supports various management
ops, and the secondary process only supports queries ops.
The primary process notifies the secondary processes to start
or stop tranceiver.

Signed-off-by: Chunsong Feng 
Signed-off-by: Min Wang (Jushui) 
Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
v1 -> v2:
Address Ferruh Yigit's comments as follows:

https://inbox.dpdk.org/dev/a8e60175-3b08-c3ca-6766-8b98e661e...@intel.com
---
 drivers/net/hns3/Makefile |   7 ++
 drivers/net/hns3/hns3_ethdev.c|  25 -
 drivers/net/hns3/hns3_ethdev_vf.c |  23 +++-
 drivers/net/hns3/hns3_mp.c| 214 ++
 drivers/net/hns3/hns3_mp.h|  14 +++
 drivers/net/hns3/meson.build  |  10 +-
 6 files changed, 290 insertions(+), 3 deletions(-)
 create mode 100644 drivers/net/hns3/hns3_mp.c
 create mode 100644 drivers/net/hns3/hns3_mp.h

diff --git a/drivers/net/hns3/Makefile b/drivers/net/hns3/Makefile
index fede05d..cbbbe04 100644
--- a/drivers/net/hns3/Makefile
+++ b/drivers/net/hns3/Makefile
@@ -10,6 +10,12 @@ LIB = librte_pmd_hns3.a
 
 CFLAGS += -O3
 CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -DALLOW_EXPERIMENTAL_API
+# Experimantal APIs:
+# - rte_mp_action_register
+# - rte_mp_action_unregister
+# - rte_mp_reply
+# - rte_mp_request_sync
 
 LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
 LDLIBS += -lrte_ethdev -lrte_net -lrte_hash
@@ -34,5 +40,6 @@ SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_intr.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_stats.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_regs.c
 SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_dcb.c
+SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_mp.c
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index bba7b8a..f84b0f4 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -29,6 +29,7 @@
 #include "hns3_intr.h"
 #include "hns3_regs.h"
 #include "hns3_dcb.h"
+#include "hns3_mp.h"
 
 #define HNS3_DEFAULT_PORT_CONF_BURST_SIZE  32
 #define HNS3_DEFAULT_PORT_CONF_QUEUES_NUM  1
@@ -4028,6 +4029,7 @@ hns3_dev_start(struct rte_eth_dev *eth_dev)
hw->adapter_state = HNS3_NIC_STARTED;
rte_spinlock_unlock(&hw->lock);
hns3_set_rxtx_function(eth_dev);
+   hns3_mp_req_start_rxtx(eth_dev);
 
hns3_info(hw, "hns3 dev start successful!");
return 0;
@@ -4064,6 +4066,11 @@ hns3_dev_stop(struct rte_eth_dev *eth_dev)
 
hw->adapter_state = HNS3_NIC_STOPPING;
hns3_set_rxtx_function(eth_dev);
+   rte_wmb();
+   /* Disable datapath on secondary process. */
+   hns3_mp_req_stop_rxtx(eth_dev);
+   /* Prevent crashes when queues are still in use. */
+   rte_delay_ms(hw->tqps_num);
 
rte_spinlock_lock(&hw->lock);
if (rte_atomic16_read(&hw->reset.resetting) == 0) {
@@ -4080,6 +4087,12 @@ hns3_dev_close(struct rte_eth_dev *eth_dev)
struct hns3_adapter *hns = eth_dev->data->dev_private;
struct hns3_hw *hw = &hns->hw;
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
+   rte_free(eth_dev->process_private);
+   eth_dev->process_private = NULL;
+   return;
+   }
+
if (hw->adapter_state == HNS3_NIC_STARTED)
hns3_dev_stop(eth_dev);
 
@@ -4096,6 +4109,7 @@ hns3_dev_close(struct rte_eth_dev *eth_dev)
rte_free(hw->reset.wait_data);
rte_free(eth_dev->process_private);
eth_dev->process_private = NULL;
+   hns3_mp_uninit_primary();
hns3_warn(hw, "Close port %d finished", hw->data->port_id);
 }
 
@@ -4550,6 +4564,10 @@ hns3_stop_service(struct hns3_adapter *hns)
hw->mac.link_status = ETH_LINK_DOWN;
 
hns3_set_rxtx_function(eth_dev);
+   rte_wmb();
+   /* Disable datapath on secondary process. */
+   hns3_mp_req_stop_rxtx(eth_dev);
+   rte_delay_ms(hw->tqps_num);
 
rte_spinlock_lock(&hw->lock);
if (hns->hw.adapter_state == HNS3_NIC_STARTED ||
@@ -4582,6 +4600,7 @@ hns3_start_service(struct hns3_adapter *hns)
hns3_set_rst_done(hw);
eth_dev = &rte_eth_devices[hw->data->port_id];
hns3_set_rxtx_function(eth_dev);
+   hns3_mp_req_start_rxtx(eth_dev);
hns3_service_handler(eth_dev);
return 0;
 }
@@ -4768,9 +4787,13 @@ hns3_dev_init(struct rte_eth_dev *eth_dev)
 
hns3_set_rxtx_function(eth_dev);
eth_dev->dev_ops = &hns3_eth_dev_ops;
-   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
+   hns3_mp_init_secondary();
+   hw->secondary_cnt++;
return 0;
+   }
 
+   hns3_mp_init_primary();
hw->adapter_state =

[dpdk-dev] [PATCH v2 21/22] net/hns3: add reset related process for hns3 PMD driver

[Wei Hu (Xavier)]

This patch adds reset related process for hns3 PMD driver.
The following three scenarios will trigger the reset process,
and the driver settings will be restored after the reset is
successful:
1. Receive a reset interrupt
2. PF receives a hardware error interrupt
3. VF is notified by PF to reset

Signed-off-by: Chunsong Feng 
Signed-off-by: Wei Hu (Xavier) 
Signed-off-by: Min Hu (Connor) 
Signed-off-by: Hao Chen 
Signed-off-by: Huisong Li 
---
 drivers/net/hns3/hns3_cmd.c   |  35 +++
 drivers/net/hns3/hns3_ethdev.c| 561 +-
 drivers/net/hns3/hns3_ethdev.h|  13 +
 drivers/net/hns3/hns3_ethdev_vf.c | 443 +-
 drivers/net/hns3/hns3_intr.c  | 512 ++
 drivers/net/hns3/hns3_intr.h  |  11 +
 drivers/net/hns3/hns3_mbx.c   |  15 +
 drivers/net/hns3/hns3_rxtx.c  |  23 +-
 8 files changed, 1592 insertions(+), 21 deletions(-)

diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c
index 706b910..3eebfdd 100644
--- a/drivers/net/hns3/hns3_cmd.c
+++ b/drivers/net/hns3/hns3_cmd.c
@@ -22,6 +22,7 @@
 
 #include "hns3_ethdev.h"
 #include "hns3_regs.h"
+#include "hns3_intr.h"
 #include "hns3_logs.h"
 
 #define hns3_is_csq(ring) ((ring)->flag & HNS3_TYPE_CSQ)
@@ -214,9 +215,28 @@ hns3_cmd_csq_clean(struct hns3_hw *hw)
head = hns3_read_dev(hw, HNS3_CMDQ_TX_HEAD_REG);
 
if (!is_valid_csq_clean_head(csq, head)) {
+   struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
+   uint32_t global;
+   uint32_t fun_rst;
hns3_err(hw, "wrong cmd head (%u, %u-%u)", head,
csq->next_to_use, csq->next_to_clean);
rte_atomic16_set(&hw->reset.disable_cmd, 1);
+   if (hns->is_vf) {
+   global = hns3_read_dev(hw, HNS3_VF_RST_ING);
+   fun_rst = hns3_read_dev(hw, HNS3_FUN_RST_ING);
+   hns3_err(hw, "Delayed VF reset global: %x fun_rst: %x",
+global, fun_rst);
+   hns3_atomic_set_bit(HNS3_VF_RESET, &hw->reset.pending);
+   } else {
+   global = hns3_read_dev(hw, HNS3_GLOBAL_RESET_REG);
+   fun_rst = hns3_read_dev(hw, HNS3_FUN_RST_ING);
+   hns3_err(hw, "Delayed IMP reset global: %x fun_rst: %x",
+global, fun_rst);
+   hns3_atomic_set_bit(HNS3_IMP_RESET, &hw->reset.pending);
+   }
+
+   hns3_schedule_delayed_reset(hns);
+
return -EIO;
}
 
@@ -317,6 +337,7 @@ hns3_cmd_get_hardware_reply(struct hns3_hw *hw,
 
 static int hns3_cmd_poll_reply(struct hns3_hw *hw)
 {
+   struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
uint32_t timeout = 0;
 
do {
@@ -329,6 +350,11 @@ static int hns3_cmd_poll_reply(struct hns3_hw *hw)
return -EBUSY;
}
 
+   if (is_reset_pending(hns)) {
+   hns3_err(hw, "Don't wait for reply because of reset 
pending");
+   return -EIO;
+   }
+
rte_delay_us(1);
timeout++;
} while (timeout < hw->cmq.tx_timeout);
@@ -484,6 +510,15 @@ hns3_cmd_init(struct hns3_hw *hw)
rte_spinlock_unlock(&hw->cmq.crq.lock);
rte_spinlock_unlock(&hw->cmq.csq.lock);
 
+   /*
+* Check if there is new reset pending, because the higher level
+* reset may happen when lower level reset is being processed.
+*/
+   if (is_reset_pending(HNS3_DEV_HW_TO_ADAPTER(hw))) {
+   PMD_INIT_LOG(ERR, "New reset pending, keep disable cmd");
+   ret = -EBUSY;
+   goto err_cmd_init;
+   }
rte_atomic16_clear(&hw->reset.disable_cmd);
 
ret = hns3_cmd_query_firmware_version(hw, &hw->fw_version);
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 5debb05..bba7b8a 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -49,6 +50,17 @@
 #define HNS3_FILTER_FE_INGRESS (HNS3_FILTER_FE_NIC_INGRESS_B \
| HNS3_FILTER_FE_ROCE_INGRESS_B)
 
+/* Reset related Registers */
+#define HNS3_GLOBAL_RESET_BIT  0
+#define HNS3_CORE_RESET_BIT1
+#define HNS3_IMP_RESET_BIT 2
+#define HNS3_FUN_RST_ING_B 0
+
+#define HNS3_VECTOR0_IMP_RESET_INT_B   1
+
+#define HNS3_RESET_WAIT_MS 100
+#define HNS3_RESET_WAIT_CNT200
+
 int hns3_logtype_init;
 int hns3_logtype_driver;
 
@@ -59,6 +71,8 @@ enum hns3_evt_cause {
HNS3_VECTOR0_EVENT_OTHER,
 };
 
+static enum hns3_reset_level hns3_get_reset_level(struct hns3_adapter *hns,
+  

Re: [dpdk-dev] [RFC] app/testpmd: support multiple raw encap/decap

[Jack Min]

Hey,

Anyone has any comments?

-Jack

On Sat, 19-08-31, 16:28, Xiaoyu Min wrote:
> In some scenarios, the raw_encap/raw_decap actions could be multiple in
> one single flow (e,g. hirepin flow):
> 
>   ... actions raw_decap / raw_encap / raw_decap / raw_encap / ...
> 
> This requires the testpmd supports multiple raw_encap/raw_decap data
> settings as well.
> 
> With the multiple raw_encap/raw_decap settings, the testpmd commands –
> set raw_encap / set raw_decap will become:
> 
>   set raw_encap  
>   set raw_encap  
> 
> And the actions – raw_encap/raw_decap also could optionally choose which
> global raw_encap/raw_decap confs to be used by index:
> 
>   ... actions raw_decap index 1 / raw_encap index 2 / ...
> 
> If there is no `index` specified, the default index is 0.
> 
> Signed-off-by: Xiaoyu Min 
> ---
>  app/test-pmd/cmdline_flow.c | 198 +++-
>  1 file changed, 171 insertions(+), 27 deletions(-)
> 
> diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
> index 495871394e..ff384ade42 100644
> --- a/app/test-pmd/cmdline_flow.c
> +++ b/app/test-pmd/cmdline_flow.c
> @@ -51,6 +51,7 @@ enum index {
>   /* Sub-leve commands. */
>   SET_RAW_ENCAP,
>   SET_RAW_DECAP,
> + SET_RAW_INDEX,
>  
>   /* Top-level command. */
>   FLOW,
> @@ -297,6 +298,10 @@ enum index {
>   ACTION_DEC_TCP_ACK_VALUE,
>   ACTION_RAW_ENCAP,
>   ACTION_RAW_DECAP,
> + ACTION_RAW_ENCAP_INDEX,
> + ACTION_RAW_ENCAP_INDEX_VALUE,
> + ACTION_RAW_DECAP_INDEX,
> + ACTION_RAW_DECAP_INDEX_VALUE,
>  };
>  
>  /** Maximum size for pattern in struct rte_flow_item_raw. */
> @@ -320,6 +325,7 @@ struct action_rss_data {
>  #define ACTION_VXLAN_ENCAP_ITEMS_NUM 6
>  
>  #define ACTION_RAW_ENCAP_MAX_DATA 128
> +#define RAW_ENCAP_CONFS_MAX_NUM 8
>  
>  /** Storage for struct rte_flow_action_raw_encap. */
>  struct raw_encap_conf {
> @@ -328,7 +334,7 @@ struct raw_encap_conf {
>   size_t size;
>  };
>  
> -struct raw_encap_conf raw_encap_conf = {.size = 0};
> +struct raw_encap_conf raw_encap_confs[RAW_ENCAP_CONFS_MAX_NUM];
>  
>  /** Storage for struct rte_flow_action_raw_decap. */
>  struct raw_decap_conf {
> @@ -336,7 +342,7 @@ struct raw_decap_conf {
>   size_t size;
>  };
>  
> -struct raw_decap_conf raw_decap_conf = {.size = 0};
> +struct raw_decap_conf raw_decap_confs[RAW_ENCAP_CONFS_MAX_NUM];
>  
>  /** Storage for struct rte_flow_action_vxlan_encap including external data. 
> */
>  struct action_vxlan_encap_data {
> @@ -376,12 +382,14 @@ struct action_raw_encap_data {
>   struct rte_flow_action_raw_encap conf;
>   uint8_t data[ACTION_RAW_ENCAP_MAX_DATA];
>   uint8_t preserve[ACTION_RAW_ENCAP_MAX_DATA];
> + uint16_t idx;
>  };
>  
>  /** Storage for struct rte_flow_action_raw_decap including external data. */
>  struct action_raw_decap_data {
>   struct rte_flow_action_raw_decap conf;
>   uint8_t data[ACTION_RAW_ENCAP_MAX_DATA];
> + uint16_t idx;
>  };
>  
>  /** Maximum number of subsequent tokens and arguments on the stack. */
> @@ -1143,6 +1151,18 @@ static const enum index action_dec_tcp_ack[] = {
>   ZERO,
>  };
>  
> +static const enum index action_raw_encap[] = {
> + ACTION_RAW_ENCAP_INDEX,
> + ACTION_NEXT,
> + ZERO,
> +};
> +
> +static const enum index action_raw_decap[] = {
> + ACTION_RAW_DECAP_INDEX,
> + ACTION_NEXT,
> + ZERO,
> +};
> +
>  static int parse_set_raw_encap_decap(struct context *, const struct token *,
>const char *, unsigned int,
>void *, unsigned int);
> @@ -1201,6 +1221,12 @@ static int parse_vc_action_raw_encap(struct context *,
>  static int parse_vc_action_raw_decap(struct context *,
>const struct token *, const char *,
>unsigned int, void *, unsigned int);
> +static int parse_vc_action_raw_encap_index(struct context *,
> +const struct token *, const char *,
> +unsigned int, void *, unsigned int);
> +static int parse_vc_action_raw_decap_index(struct context *,
> +const struct token *, const char *,
> +unsigned int, void *, unsigned int);
>  static int parse_destroy(struct context *, const struct token *,
>const char *, unsigned int,
>void *, unsigned int);
> @@ -3095,18 +3121,41 @@ static const struct token token_list[] = {
>   .name = "raw_encap",
>   .help = "encapsulation data, defined by set raw_encap",
>   .priv = PRIV_ACTION(RAW_ENCAP,
> - sizeof(struct rte_flow_action_raw_encap)),
> - .next = NEXT(NEXT_ENTRY(ACTION_NEXT)),
> + sizeof(struct action_raw_encap_data)),
> + .next = NEXT(action_raw_encap),
> 

[dpdk-dev] [PATCH v2 0/3] net/atlantic: Atlantic PMD updates

[Pavel Belous]

From: Pavel Belous 

This patchset provides the various fixes for Atlantic Driver.

v2 changes:
- compile errors on some environments fixed

Pavel Belous (3):
  net/atlantic: exclude MACSEC counters from xstats
  net/atlantic: fix reported flow control mode
  net/atlantic: add FW mailbox guard mutex

 drivers/net/atlantic/atl_ethdev.c   | 60 +-
 drivers/net/atlantic/atl_types.h|  3 +
 drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c | 82 ++---
 3 files changed, 108 insertions(+), 37 deletions(-)

-- 
2.7.4

[dpdk-dev] [PATCH v2 1/3] net/atlantic: exclude MACSEC counters from xstats

[Pavel Belous]

From: Pavel Belous 

Currently, driver always return full set of xstats counters, including
MACSEC counters. But this driver also supports AQC100 chips, which
does not have MACSEC feature.
This fix adds checking for MACSEC availability (based on FW capability
bits) and returns xstats without MACSEC counters if MACSEC feature
is not available.

Fixes: 09d4dfa85359 ("net/atlantic: implement MACsec statistics")
Cc: sta...@dpdk.org
Signed-off-by: Pavel Belous 
Signed-off-by: Igor Russkikh 
---
 drivers/net/atlantic/atl_ethdev.c | 52 ---
 1 file changed, 38 insertions(+), 14 deletions(-)

diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index 3c1b349..178f7db 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -993,20 +993,42 @@ atl_dev_stats_reset(struct rte_eth_dev *dev)
 }
 
 static int
+atl_dev_xstats_get_count(struct rte_eth_dev *dev)
+{
+   struct atl_adapter *adapter =
+   (struct atl_adapter *)dev->data->dev_private;
+
+   struct aq_hw_s *hw = &adapter->hw;
+   unsigned int i, count = 0;
+
+   for (i = 0; i < RTE_DIM(atl_xstats_tbl); i++) {
+   if (atl_xstats_tbl[i].type == XSTATS_TYPE_MACSEC &&
+   ((hw->caps_lo & BIT(CAPS_LO_MACSEC)) == 0))
+   continue;
+
+   count++;
+   }
+
+   return count;
+}
+
+static int
 atl_dev_xstats_get_names(struct rte_eth_dev *dev __rte_unused,
 struct rte_eth_xstat_name *xstats_names,
 unsigned int size)
 {
unsigned int i;
+   unsigned int count = atl_dev_xstats_get_count(dev);
 
-   if (!xstats_names)
-   return RTE_DIM(atl_xstats_tbl);
-
-   for (i = 0; i < size && i < RTE_DIM(atl_xstats_tbl); i++)
-   strlcpy(xstats_names[i].name, atl_xstats_tbl[i].name,
-   RTE_ETH_XSTATS_NAME_SIZE);
+   if (xstats_names) {
+   for (i = 0; i < size && i < count; i++) {
+   snprintf(xstats_names[i].name,
+   RTE_ETH_XSTATS_NAME_SIZE, "%s",
+   atl_xstats_tbl[i].name);
+   }
+   }
 
-   return i;
+   return count;
 }
 
 static int
@@ -1020,9 +1042,10 @@ atl_dev_xstats_get(struct rte_eth_dev *dev, struct 
rte_eth_xstat *stats,
struct macsec_msg_fw_response resp = { 0 };
int err = -1;
unsigned int i;
+   unsigned int count = atl_dev_xstats_get_count(dev);
 
if (!stats)
-   return 0;
+   return count;
 
if (hw->aq_fw_ops->send_macsec_req != NULL) {
req.ingress_sa_index = 0xff;
@@ -1035,7 +1058,7 @@ atl_dev_xstats_get(struct rte_eth_dev *dev, struct 
rte_eth_xstat *stats,
err = hw->aq_fw_ops->send_macsec_req(hw, &msg, &resp);
}
 
-   for (i = 0; i < n && i < RTE_DIM(atl_xstats_tbl); i++) {
+   for (i = 0; i < n && i < count; i++) {
stats[i].id = i;
 
switch (atl_xstats_tbl[i].type) {
@@ -1044,14 +1067,15 @@ atl_dev_xstats_get(struct rte_eth_dev *dev, struct 
rte_eth_xstat *stats,
 atl_xstats_tbl[i].offset);
break;
case XSTATS_TYPE_MACSEC:
-   if (err)
-   goto done;
-   stats[i].value = *(u64 *)((uint8_t *)&resp.stats +
-atl_xstats_tbl[i].offset);
+   if (!err) {
+   stats[i].value =
+   *(u64 *)((uint8_t *)&resp.stats +
+   atl_xstats_tbl[i].offset);
+   }
break;
}
}
-done:
+
return i;
 }
 
-- 
2.7.4

[dpdk-dev] [PATCH v2 3/3] net/atlantic: add FW mailbox guard mutex

[Pavel Belous]

From: Pavel Belous 

Driver uses the Firmware mailbox to read statistics and configure
some features.
This patch introduces a mutex to provide consistent access to the
FW mailbox to prevent potential data corruption.

Fixes: 86d36773bd42 ("net/atlantic: implement firmware operations")

Signed-off-by: Pavel Belous 
Signed-off-by: Igor Russkikh 
---
 drivers/net/atlantic/atl_ethdev.c   |  4 ++
 drivers/net/atlantic/atl_types.h|  3 +
 drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c | 82 ++---
 3 files changed, 68 insertions(+), 21 deletions(-)

diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index 1b9d514..1331b5f 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -410,6 +410,8 @@ eth_atl_dev_init(struct rte_eth_dev *eth_dev)
 
hw->aq_nic_cfg = &adapter->hw_cfg;
 
+   pthread_mutex_init(&hw->mbox_mutex, NULL);
+
/* disable interrupt */
atl_disable_intr(hw);
 
@@ -474,6 +476,8 @@ eth_atl_dev_uninit(struct rte_eth_dev *eth_dev)
rte_free(eth_dev->data->mac_addrs);
eth_dev->data->mac_addrs = NULL;
 
+   pthread_mutex_destroy(&hw->mbox_mutex);
+
return 0;
 }
 
diff --git a/drivers/net/atlantic/atl_types.h b/drivers/net/atlantic/atl_types.h
index 19aaf37..c200a1f 100644
--- a/drivers/net/atlantic/atl_types.h
+++ b/drivers/net/atlantic/atl_types.h
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 
 typedef uint8_tu8;
 typedef int8_t s8;
@@ -137,6 +138,8 @@ struct aq_hw_s {
u32 rpc_addr;
u32 rpc_tid;
struct hw_aq_atl_utils_fw_rpc rpc;
+
+   pthread_mutex_t mbox_mutex;
 };
 
 struct aq_fw_ops {
diff --git a/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c 
b/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c
index 70d6e14..55dc728 100644
--- a/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c
+++ b/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c
@@ -6,6 +6,7 @@
  */
 
 #include 
+#include 
 #include "../atl_hw_regs.h"
 
 #include "../atl_types.h"
@@ -217,13 +218,15 @@ int aq_fw2x_get_mac_permanent(struct aq_hw_s *self, u8 
*mac)
u32 mac_addr[2] = { 0 };
u32 efuse_addr = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_EFUSE_ADDR);
 
+   pthread_mutex_lock(&self->mbox_mutex);
+
if (efuse_addr != 0) {
err = hw_atl_utils_fw_downld_dwords(self,
efuse_addr + (40U * 4U),
mac_addr,
ARRAY_SIZE(mac_addr));
if (err)
-   return err;
+   goto exit;
mac_addr[0] = rte_constant_bswap32(mac_addr[0]);
mac_addr[1] = rte_constant_bswap32(mac_addr[1]);
}
@@ -252,6 +255,10 @@ int aq_fw2x_get_mac_permanent(struct aq_hw_s *self, u8 
*mac)
h >>= 8;
mac[0] = (u8)(0xFFU & h);
}
+
+exit:
+   pthread_mutex_unlock(&self->mbox_mutex);
+
return err;
 }
 
@@ -261,6 +268,9 @@ static int aq_fw2x_update_stats(struct aq_hw_s *self)
u32 mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR);
u32 orig_stats_val = mpi_opts & BIT(CAPS_HI_STATISTICS);
 
+
+   pthread_mutex_lock(&self->mbox_mutex);
+
/* Toggle statistics bit for FW to update */
mpi_opts = mpi_opts ^ BIT(CAPS_HI_STATISTICS);
aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts);
@@ -271,9 +281,15 @@ static int aq_fw2x_update_stats(struct aq_hw_s *self)
   BIT(CAPS_HI_STATISTICS)),
   1U, 1U);
if (err)
-   return err;
+   goto exit;
+
+   err = hw_atl_utils_update_stats(self);
+
+exit:
+   pthread_mutex_unlock(&self->mbox_mutex);
+
+   return err;
 
-   return hw_atl_utils_update_stats(self);
 }
 
 static int aq_fw2x_get_temp(struct aq_hw_s *self, int *temp)
@@ -283,6 +299,8 @@ static int aq_fw2x_get_temp(struct aq_hw_s *self, int *temp)
u32 temp_val = mpi_opts & BIT(CAPS_HI_TEMPERATURE);
u32 temp_res;
 
+   pthread_mutex_lock(&self->mbox_mutex);
+
/* Toggle statistics bit for FW to 0x36C.18 (CAPS_HI_TEMPERATURE) */
mpi_opts = mpi_opts ^ BIT(CAPS_HI_TEMPERATURE);
aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts);
@@ -298,6 +316,9 @@ static int aq_fw2x_get_temp(struct aq_hw_s *self, int *temp)
&temp_res,
sizeof(temp_res) / sizeof(u32));
 
+
+   pthread_mutex_unlock(&self->mbox_mutex);
+
if (err)
return err;
 
@@ -515,6 +536,8 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, int 
dev_addr,
if ((self->caps_lo & BIT(CAPS_LO_SMBUS_READ)) == 0)
return -EOPNOTSUPP;
 
+   pthread_mutex_lock(&se

[dpdk-dev] [PATCH v2 2/3] net/atlantic: fix reported flow control mode

[Pavel Belous]

From: Pavel Belous 

Driver reports current flow control mode based on internal flow control
settings. Currently this logic works incorrectly.

Fixes: 921eb6b8ce31 ("net/atlantic: fix flow control by sync settings on Rx")
Cc: sta...@dpdk.org
Signed-off-by: Pavel Belous 
Signed-off-by: Igor Russkikh 
---
 drivers/net/atlantic/atl_ethdev.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index 178f7db..1b9d514 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -1535,11 +1535,11 @@ atl_flow_ctrl_get(struct rte_eth_dev *dev, struct 
rte_eth_fc_conf *fc_conf)
 
if (fc == AQ_NIC_FC_OFF)
fc_conf->mode = RTE_FC_NONE;
-   else if (fc & (AQ_NIC_FC_RX | AQ_NIC_FC_TX))
+   else if ((fc & AQ_NIC_FC_RX) && (fc & AQ_NIC_FC_TX))
fc_conf->mode = RTE_FC_FULL;
else if (fc & AQ_NIC_FC_RX)
fc_conf->mode = RTE_FC_RX_PAUSE;
-   else if (fc & AQ_NIC_FC_RX)
+   else if (fc & AQ_NIC_FC_TX)
fc_conf->mode = RTE_FC_TX_PAUSE;
 
return 0;
-- 
2.7.4

Re: [dpdk-dev] [RFC] hash: introduce resizable hash list

[Wang, Yipeng1]

Hi, Bing,  I am sorry for the late reply:

>> >1.8.3.1
>>
>> [Wang, Yipeng]
>>
>> Hi, Bing,
>>
>> Table resizing is very important and I think it is a critical feature to have
>> in DPDK's hash library. Thanks a lot for putting effort on this and I hope
>> we could work out a solution based on your patch.
>>
>
>Thanks. To my understanding, yes it is very important. Especially, there is
>some case that the maximum capacity is quite large but elements could
>be just a few during one run time life cycle.
>
>> My major concern of the current implementation is as following:
>>
>> Although we still have the fbk hash table implementation, I think the
>> goal here is to have the users to move to the main hash table
>> implementation (the cuckoo algorithm), since it is the better one in
>> most use cases. There have been many optimizations done on the
>> current code base since the cuckoo hash was introduced, we do not
>> want to reinvent the wheel such as the multi-threading support, non-
>> TSO machine support, SIMD optimizations, etc. Also, comparing to
>> linked list, the current bucketized table should provide better lookup
>> performance. Last but not least, we probably don't want fragmented
>> hash table APIs.
>>
>
>Yes, I see and I agree. I have some basic study of the cuckoo and it is
>quite a nice implementation from the paper to the engineering. And a
>lot of optimizations both on X86_64 and aarch64 were done. And unique
>solution will be much easier and less problematic for the users and
>maintainers.
>
>> I would suggest to see if we could add resizing feature to the current
>> hash table implementation first.
>> For example, we can use the current bucketized design to do the
>> resizing rather than the new linked list-based data structure.
>> We do need some modifications such as having a local  bucket_shift
>> variable each bucket, but I think it is feasible. We could also turn off
>> the cuckoo path/extendable linked list of the current implementation
>> when resizing is needed, so that it would be simpler for the
>> implementation.
>> In such way, we keep the current API and also reuse many of the
>> existing code.
>>
>
>That will be quite great if the resize with cuckoo hash could be realized.
>I am not quite familiar with the current status of the researching. Is there
>any paper or ideas these years for the cuckoo hash algorithm already?
>
[Wang, Yipeng] 
I am not aware of new papers focusing on hash table resizing, but I encountered
one resizing algorithm from this paper: "Elastic Sketch: Adaptive and Fast 
Network-wide
Measurements". If you look at section 3.4, the authors first duplicates the 
hash table
and gradually remove the duplicates. But I think the duplication would still be 
too costly.

I guess what I suggested is to disable cuckoo path while we resize. Just treat
it as a regular hash table, then the resizing would be similar to your linked 
list algorithm right?
You just redistribute the contents in the buckets rather than breaking down the 
linked list.

>> Also, I wonder if you have a specific use case that benefit from the
>> gradually break-down approach? Since we could always stop the world
>> and resize the table at once.
>
>Do you mean the on-demand (when being accessed) split? Theoretically,
>no for the total time, or even more because of the calculation and extra
>checking. And this is only to smoothen the rate when there is already a
>lot of elements in the table, e.g. 1M. Traversing 1M elements and relocate
>them into the right position will be very time consuming. Especially the
>memory is dynamically allocated but not continuous, the cache may be
>also a problem with the linked list. I tested with a simple case and the
>rate seemed to be smooth (no big jitter) - there is also some other actions
>in the case and the hash action occupy about 15% of the CPU.
>And this is only for the list case. I think when using cuckoo hash, maybe
>there is no need of such trick 😊
[Wang, Yipeng] 
I guess I was thinking that If you have a specific use case,
we could design the algorithm with the use case in mind.

Thank you !
Yipeng

Re: [dpdk-dev] [PATCH v2 00/22] add hns3 ethernet PMD driver

[Wei Hu (Xavier)]

Hi, Ferruh Yigit

I sent out patch V2 yesterday.  And I found that the following page
indicates that there is a compilation error.

http://mails.dpdk.org/archives/test-report/2019-September/098385.html

The relevant sections in the log:

<...>

*Meson Build Failed #1: OS: FC30-64 Target:build-gcc-static FAILED:
drivers/a715181@@tmp_rte_pmd_hns3 at sta
/net_hns3_hns3_ethdev_vf.c.o

<...>

../drivers/net/hns3/hns3_ethdev_vf.c:1552:24: error: initialization of
‘void (*)(struct rte_eth_dev *, struct rte_eth_dev_info *)’ from
incompatible pointer type ‘int (*)(struct rte_eth_dev *, struct
rte_eth_dev_info *)’ [-Werror=incompatible-pointer-types] 1552 |
.dev_infos_get = hns3vf_dev_infos_get, | ^~~~
../drivers/net/hns3/hns3_ethdev_vf.c:1552:24: note: (near initialization
for ‘hns3vf_eth_dev_ops.dev_infos_get’) cc1: all warnings being treated
as errors

<...>

But I found that perhaps the reason for this compilation error is that
the following patch was not built on CI,

and it had been in the latest branch of the repository:
http://dpdk.org/git/next/dpdk-next-net

The information of the relevant patch as below:

commit 84c4620318b642aea9b5388aa7fbc79a4fe6f29e
Author: Ivan Ilchenko 
Date:   Thu Sep 12 17:42:28 2019 +0100

ethdev: change device info get callback to return int

diff --git a/lib/librte_ethdev/rte_ethdev_core.h
b/lib/librte_ethdev/rte_ethdev_core.h
index 2922d5b..2394b32 100644
--- a/lib/librte_ethdev/rte_ethdev_core.h
+++ b/lib/librte_ethdev/rte_ethdev_core.h
@@ -103,8 +103,8 @@ typedef int (*eth_queue_stats_mapping_set_t)(struct
rte_eth_dev *dev,
 uint8_t is_rx);
 /**< @internal Set a queue statistics mapping for a tx/rx queue of an
Ethernet device. */

-typedef void (*eth_dev_infos_get_t)(struct rte_eth_dev *dev,
-   struct rte_eth_dev_info *dev_info);
+typedef int (*eth_dev_infos_get_t)(struct rte_eth_dev *dev,
+struct rte_eth_dev_info *dev_info);
 /**< @internal Get specific information of an Ethernet device. */


Regards
Xavier

On 2019/9/20 21:25, Wei Hu (Xavier) wrote:
> The Hisilicon Network Subsystem is a long term evolution IP which is
> supposed to be used in Hisilicon ICT SoCs such as Kunpeng 920.
>
> This series add DPDK rte_ethdev poll mode driver for Hisilicon
> Network Subsystem 3(hns3) network engine.
>
> Wei Hu (Xavier) (22):
>   net/hns3: add hns3 build and doc infrastructure
>   net/hns3: add hardware registers definition
>   net/hns3: add some definitions for data structure and macro
>   net/hns3: register hns3 PMD driver and add the log interface
> definition
>   net/hns3: add support for cmd of hns3 PMD driver
>   net/hns3: add the initialization of hns3 PMD driver
>   net/hns3: add support for MAC address related operations
>   net/hns3: add support for some misc operations
>   net/hns3: add support for link_update operation
>   net/hns3: add support for flow directory of hns3 PMD driver
>   net/hns3: add support for RSS of hns3 PMD driver
>   net/hns3: add support for flow control of hns3 PMD driver
>   net/hns3: add support for vlan of hns3 PMD driver
>   net/hns3: add support for mailbox of hns3 PMD driver
>   net/hns3: add support for hns3 VF PMD driver
>   net/hns3: add RX/TX package burst and queue related operation
>   net/hns3: add start stop configure promiscuous ops
>   net/hns3: add dump register ops for hns3 PMD driver
>   net/hns3: add abnormal interrupt process for hns3 PMD driver
>   net/hns3: add stats related ops for hns3 PMD driver
>   net/hns3: add reset related process for hns3 PMD driver
>   net/hns3: add multiple process support for hns3 PMD driver
>
>  MAINTAINERS  |8 +
>  config/common_base   |5 +
>  config/common_linux  |5 +
>  config/defconfig_arm-armv7a-linuxapp-gcc |1 +
>  config/defconfig_i686-native-linuxapp-gcc|5 +
>  config/defconfig_i686-native-linuxapp-icc|5 +
>  config/defconfig_ppc_64-power8-linuxapp-gcc  |1 +
>  config/defconfig_x86_64-native-linuxapp-icc  |5 +
>  config/defconfig_x86_x32-native-linuxapp-gcc |5 +
>  doc/guides/nics/features/hns3.ini|   34 +
>  doc/guides/nics/features/hns3_vf.ini |   29 +
>  doc/guides/nics/hns3.rst |   60 +
>  doc/guides/nics/index.rst|1 +
>  doc/guides/rel_notes/release_19_11.rst   |5 +
>  drivers/net/Makefile |1 +
>  drivers/net/hns3/Makefile|   45 +
>  drivers/net/hns3/hns3_cmd.c  |  565 +++
>  drivers/net/hns3/hns3_cmd.h  |  761 
>  drivers/net/hns3/hns3_dcb.c  | 1642 +
>  drivers/net/hns3/hns3_dcb.h  |  166 +
>  drivers/net/hns3/hns3_ethdev.c   | 4939 
> ++
>  drivers/net/hn

Re: [dpdk-dev] [PATCH] mbuf: support dynamic fields and flags

[Wang, Haiyue]

> -Original Message-
> From: Olivier Matz [mailto:olivier.m...@6wind.com]
> Sent: Thursday, September 19, 2019 00:55
> To: dev@dpdk.org
> Cc: Thomas Monjalon ; Wang, Haiyue 
> ; Stephen Hemminger
> ; Andrew Rybchenko ; 
> Wiles, Keith
> ; Jerin Jacob Kollanukkaran 
> Subject: [PATCH] mbuf: support dynamic fields and flags
> 
> Many features require to store data inside the mbuf. As the room in mbuf
> structure is limited, it is not possible to have a field for each
> feature. Also, changing fields in the mbuf structure can break the API
> or ABI.
> 
> This commit addresses these issues, by enabling the dynamic registration
> of fields or flags:
> 
> - a dynamic field is a named area in the rte_mbuf structure, with a
>   given size (>= 1 byte) and alignment constraint.
> - a dynamic flag is a named bit in the rte_mbuf structure.
> 
> The typical use case is a PMD that registers space for an offload
> feature, when the application requests to enable this feature.  As
> the space in mbuf is limited, the space should only be reserved if it
> is going to be used (i.e when the application explicitly asks for it).
> 
> The registration can be done at any moment, but it is not possible
> to unregister fields or flags for now.
> 
> Signed-off-by: Olivier Matz 
> Acked-by: Thomas Monjalon 
> ---
> 
> rfc -> v1
> 
> * Rebase on top of master
> * Change registration API to use a structure instead of
>   variables, getting rid of #defines (Stephen's comment)
> * Update flag registration to use a similar API as fields.
> * Change max name length from 32 to 64 (sugg. by Thomas)
> * Enhance API documentation (Haiyue's and Andrew's comments)
> * Add a debug log at registration
> * Add some words in release note
> * Did some performance tests (sugg. by Andrew):
>   On my platform, reading a dynamic field takes ~3 cycles more
>   than a static field, and ~2 cycles more for writing.
> 
>  app/test/test_mbuf.c   | 114 ++-
>  doc/guides/rel_notes/release_19_11.rst |   7 +
>  lib/librte_mbuf/Makefile   |   2 +
>  lib/librte_mbuf/meson.build|   6 +-
>  lib/librte_mbuf/rte_mbuf.h |  25 +-
>  lib/librte_mbuf/rte_mbuf_dyn.c | 408 +
>  lib/librte_mbuf/rte_mbuf_dyn.h | 163 ++
>  lib/librte_mbuf/rte_mbuf_version.map   |   4 +
>  8 files changed, 724 insertions(+), 5 deletions(-)
>  create mode 100644 lib/librte_mbuf/rte_mbuf_dyn.c
>  create mode 100644 lib/librte_mbuf/rte_mbuf_dyn.h
> 

[snip]

> +/**
> + * Helper macro to access to a dynamic field.
> + */
> +#define RTE_MBUF_DYNFIELD(m, offset, type) ((type)((uintptr_t)(m) + 
> (offset)))

How about to change it as: ?
#define RTE_MBUF_DYNFIELD(m, offset, type) ((type *)((uintptr_t)(m) + (offset)))
  ^
Then,
*RTE_MBUF_DYNFIELD(mb, xxx, uint32_t) = yyy;

Since we use 'type' like: sizeof(type), __alignof__(type), this makes 'type' be
more consistent, not have to force cast 'type *' when using it.

const struct rte_mbuf_dynfield dynfield2 = {
.name = "test-dynfield2",
.size = sizeof(uint16_t),
.align = __alignof__(uint16_t),
.flags = 0,
};

And also, when I'm trying to use the dynamic flag, found a macro will be better
for making code align with dynamic field. Just a small suggestion. ;-)
mb->ol_flags |= RTE_MBUF_DYNFLAG(ol_offset);

/**
 * Helper macro to access to a dynamic flag.
 */
#define RTE_MBUF_DYNFLAG(offset) (1ULL << (offset))

> +
> +#endif
> diff --git a/lib/librte_mbuf/rte_mbuf_version.map 
> b/lib/librte_mbuf/rte_mbuf_version.map
> index 2662a37bf..a98310570 100644
> --- a/lib/librte_mbuf/rte_mbuf_version.map
> +++ b/lib/librte_mbuf/rte_mbuf_version.map
> @@ -50,4 +50,8 @@ EXPERIMENTAL {
>   global:
> 
>   rte_mbuf_check;
> + rte_mbuf_dynfield_lookup;
> + rte_mbuf_dynfield_register;
> + rte_mbuf_dynflag_lookup;
> + rte_mbuf_dynflag_register;
>  } DPDK_18.08;
> --
> 2.20.1