Re: [dpdk-dev] [PATCH v4 6/9] examples/ipsec-secgw: make app to use ipsec library
On 12/24/2018 8:31 PM, Ananyev, Konstantin wrote: > >> -Original Message- >> From: Akhil Goyal [mailto:akhil.go...@nxp.com] >> Sent: Monday, December 24, 2018 1:50 PM >> To: Ananyev, Konstantin ; dev@dpdk.org >> Cc: Nicolau, Radu ; Awal, Mohammad Abdul >> ; Iremonger, Bernard >> >> Subject: Re: [dpdk-dev] [PATCH v4 6/9] examples/ipsec-secgw: make app to use >> ipsec library >> >> >> >> On 12/24/2018 6:51 PM, Ananyev, Konstantin wrote: -Original Message- From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Ananyev, Konstantin Sent: Monday, December 24, 2018 12:37 PM To: Akhil Goyal ; dev@dpdk.org Cc: Nicolau, Radu ; Awal, Mohammad Abdul ; Iremonger, Bernard Subject: Re: [dpdk-dev] [PATCH v4 6/9] examples/ipsec-secgw: make app to use ipsec library > -Original Message- > From: Akhil Goyal [mailto:akhil.go...@nxp.com] > Sent: Monday, December 24, 2018 12:33 PM > To: Ananyev, Konstantin ; dev@dpdk.org > Cc: Nicolau, Radu ; Awal, Mohammad Abdul > ; Iremonger, Bernard > > Subject: Re: [dpdk-dev] [PATCH v4 6/9] examples/ipsec-secgw: make app to > use ipsec library > > > > On 12/24/2018 5:59 PM, Ananyev, Konstantin wrote: diff --git a/examples/ipsec-secgw/meson.build b/examples/ipsec-secgw/meson.build index 77d8b298f..31f68fee2 100644 --- a/examples/ipsec-secgw/meson.build +++ b/examples/ipsec-secgw/meson.build @@ -6,7 +6,7 @@ # To build this example as a standalone application with an already-installed # DPDK instance, use 'make' -deps += ['security', 'lpm', 'acl', 'hash'] +deps += ['security', 'lpm', 'acl', 'hash', 'ipsec'] allow_experimental_apis = true sources = files( 'esp.c', 'ipsec.c', 'ipsec-secgw.c', 'parser.c', >>> Makefile should also be updated I guess. >> Anything particular you think is missed? > Will it compile with makefile when IPSEC lib is disabled? Nope, it wouldn't. >>> Could you be more specific and describe what particular >>> changes in the Makefile you think are necessary? >>> Is it a check that librte_ipsec was enabled, like one you have for >>> rte_security: >>> ifneq ($(CONFIG_RTE_LIBRTE_SECURITY),y) >>> $(error "RTE_LIBRTE_SECURITY is required to build ipsec-secgw") >>> endif >>> ? >> yes >>> Something else? >>> BTW, why this check above is needed? >> To ensure that user do not compile ipsec-secgw without ipsec/security lib > ipsec-secgw depends on a lot of other libs (cryptodev, ethdev, acl, lpm, > etc.). > Why only these 2 dependencies require a special check? Radu did this change in 1b028d5e81 (examples/ipsec-secgw: fix build without security lib). probably because the security lib was a new one and in experimental stage.
[dpdk-dev] [PATCH 0/4] NXP DPAA fixes and enhancements
Few fixes and minor enhancements in NXP DPAA driver Hemant Agrawal (4): bus/dpaa: fix the logical to physical core affine logic net/dpaa: fix the secondary process net/dpaa: update supported ptypes net/dpaa: update RSS offload types drivers/bus/dpaa/dpaa_bus.c| 41 +- drivers/net/dpaa/dpaa_ethdev.c | 19 +++- drivers/net/dpaa/dpaa_ethdev.h | 12 ++ 3 files changed, 42 insertions(+), 30 deletions(-) -- 2.17.1
[dpdk-dev] [PATCH 1/4] bus/dpaa: fix the logical to physical core affine logic
The code was treating the lcore id as physical core id.
The code is updated to use actual physical core value
for any core affinity logic.
Note that DPAA devices are single cluster systems.
Fixes: 5d944582d028 ("bus/dpaa: check portal presence in the caller function")
Cc: Nipun Gupta
Cc: sta...@dpdk.org
Signed-off-by: Hemant Agrawal
---
drivers/bus/dpaa/dpaa_bus.c | 41 +++--
1 file changed, 21 insertions(+), 20 deletions(-)
diff --git a/drivers/bus/dpaa/dpaa_bus.c b/drivers/bus/dpaa/dpaa_bus.c
index 203f60dc1..1f9e3ca11 100644
--- a/drivers/bus/dpaa/dpaa_bus.c
+++ b/drivers/bus/dpaa/dpaa_bus.c
@@ -250,52 +250,53 @@ dpaa_clean_device_list(void)
int rte_dpaa_portal_init(void *arg)
{
- cpu_set_t cpuset;
pthread_t id;
- uint32_t cpu = rte_lcore_id();
+ unsigned int cpu, lcore = rte_lcore_id();
int ret;
struct dpaa_portal *dpaa_io_portal;
BUS_INIT_FUNC_TRACE();
- if ((size_t)arg == 1 || cpu == LCORE_ID_ANY)
- cpu = rte_get_master_lcore();
- /* if the core id is not supported */
+ if ((size_t)arg == 1 || lcore == LCORE_ID_ANY)
+ lcore = rte_get_master_lcore();
else
- if (cpu >= RTE_MAX_LCORE)
+ if (lcore >= RTE_MAX_LCORE)
return -1;
- /* Set CPU affinity for this thread */
- CPU_ZERO(&cpuset);
- CPU_SET(cpu, &cpuset);
+ cpu = lcore_config[lcore].core_id;
+
+ /* Set CPU affinity for this thread.*/
id = pthread_self();
- ret = pthread_setaffinity_np(id, sizeof(cpu_set_t), &cpuset);
+ ret = pthread_setaffinity_np(id, sizeof(cpu_set_t),
+ &lcore_config[lcore].cpuset);
if (ret) {
- DPAA_BUS_LOG(ERR, "pthread_setaffinity_np failed on "
- "core :%d with ret: %d", cpu, ret);
+ DPAA_BUS_LOG(ERR, "pthread_setaffinity_np failed on core :%u"
+" (lcore=%u) with ret: %d", cpu, lcore, ret);
return ret;
}
/* Initialise bman thread portals */
ret = bman_thread_init();
if (ret) {
- DPAA_BUS_LOG(ERR, "bman_thread_init failed on "
- "core %d with ret: %d", cpu, ret);
+ DPAA_BUS_LOG(ERR, "bman_thread_init failed on core %u"
+" (lcore=%u) with ret: %d", cpu, lcore, ret);
return ret;
}
- DPAA_BUS_LOG(DEBUG, "BMAN thread initialized");
+ DPAA_BUS_LOG(DEBUG, "BMAN thread initialized - CPU=%d lcore=%d",
+cpu, lcore);
/* Initialise qman thread portals */
ret = qman_thread_init();
if (ret) {
- DPAA_BUS_LOG(ERR, "bman_thread_init failed on "
- "core %d with ret: %d", cpu, ret);
+ DPAA_BUS_LOG(ERR, "qman_thread_init failed on core %u"
+ " (lcore=%u) with ret: %d", cpu, lcore, ret);
bman_thread_finish();
return ret;
}
- DPAA_BUS_LOG(DEBUG, "QMAN thread initialized");
+ DPAA_BUS_LOG(DEBUG, "QMAN thread initialized - CPU=%d lcore=%d",
+cpu, lcore);
dpaa_io_portal = rte_malloc(NULL, sizeof(struct dpaa_portal),
RTE_CACHE_LINE_SIZE);
@@ -312,8 +313,8 @@ int rte_dpaa_portal_init(void *arg)
ret = pthread_setspecific(dpaa_portal_key, (void *)dpaa_io_portal);
if (ret) {
- DPAA_BUS_LOG(ERR, "pthread_setspecific failed on "
- "core %d with ret: %d", cpu, ret);
+ DPAA_BUS_LOG(ERR, "pthread_setspecific failed on core %u"
+" (lcore=%u) with ret: %d", cpu, lcore, ret);
dpaa_portal_finish(NULL);
return ret;
--
2.17.1
[dpdk-dev] [PATCH 4/4] net/dpaa: update RSS offload types
Validated and tested additional offload flags for RSS configuration. Signed-off-by: Hemant Agrawal --- drivers/net/dpaa/dpaa_ethdev.h | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/net/dpaa/dpaa_ethdev.h b/drivers/net/dpaa/dpaa_ethdev.h index 2fc723171..e906a0bec 100644 --- a/drivers/net/dpaa/dpaa_ethdev.h +++ b/drivers/net/dpaa/dpaa_ethdev.h @@ -79,10 +79,14 @@ #define DPAA_DEBUG_FQ_TX_ERROR 1 #define DPAA_RSS_OFFLOAD_ALL ( \ - ETH_RSS_IP | \ - ETH_RSS_UDP | \ - ETH_RSS_TCP | \ - ETH_RSS_SCTP) + ETH_RSS_FRAG_IPV4 | \ + ETH_RSS_NONFRAG_IPV4_TCP | \ + ETH_RSS_NONFRAG_IPV4_UDP | \ + ETH_RSS_NONFRAG_IPV4_SCTP | \ + ETH_RSS_FRAG_IPV6 | \ + ETH_RSS_NONFRAG_IPV6_TCP | \ + ETH_RSS_NONFRAG_IPV6_UDP | \ + ETH_RSS_NONFRAG_IPV6_SCTP) #define DPAA_TX_CKSUM_OFFLOAD_MASK ( \ PKT_TX_IP_CKSUM |\ -- 2.17.1
[dpdk-dev] [PATCH 3/4] net/dpaa: update supported ptypes
Validated and tested additional packet type for the DPAA
platform.
Signed-off-by: Hemant Agrawal
---
drivers/net/dpaa/dpaa_ethdev.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 5448a2ca7..ba66aa2a0 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -245,12 +245,15 @@ static const uint32_t *
dpaa_supported_ptypes_get(struct rte_eth_dev *dev)
{
static const uint32_t ptypes[] = {
- /*todo -= add more types */
RTE_PTYPE_L2_ETHER,
- RTE_PTYPE_L3_IPV4,
- RTE_PTYPE_L3_IPV4_EXT,
- RTE_PTYPE_L3_IPV6,
- RTE_PTYPE_L3_IPV6_EXT,
+ RTE_PTYPE_L2_ETHER_VLAN,
+ RTE_PTYPE_L2_ETHER_ARP,
+ RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
+ RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
+ RTE_PTYPE_L4_ICMP,
+ RTE_PTYPE_L4_TCP,
+ RTE_PTYPE_L4_UDP,
+ RTE_PTYPE_L4_FRAG,
RTE_PTYPE_L4_TCP,
RTE_PTYPE_L4_UDP,
RTE_PTYPE_L4_SCTP
--
2.17.1
[dpdk-dev] [PATCH 2/4] net/dpaa: fix the secondary process
In order to support I/O from secondary process, the
burst APIs and OPS APIs shall be mapped/plugged. This
patch fixes the code to remap the ops and burst apis.
Fixes: ff9e112d7870 ("net/dpaa: add NXP DPAA PMD driver skeleton")
Cc: sta...@dpdk.org
Signed-off-by: Hemant Agrawal
---
drivers/net/dpaa/dpaa_ethdev.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index d0572b3d9..5448a2ca7 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -1223,8 +1223,12 @@ dpaa_dev_init(struct rte_eth_dev *eth_dev)
PMD_INIT_FUNC_TRACE();
/* For secondary processes, the primary has done all the work */
- if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
+ eth_dev->dev_ops = &dpaa_devops;
+ /* Plugging of UCODE burst API not supported in Secondary */
+ eth_dev->rx_pkt_burst = dpaa_eth_queue_rx;
return 0;
+ }
dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device);
dev_id = dpaa_device->id.dev_id;
--
2.17.1
[dpdk-dev] [PATCH v2] net/mlx5: support modify header using Direct Verbs
This patch implements the set of actions to support offload
of packet header modifications to MLX5 NIC.
Implamantation is based on RFC [1].
[1] http://mails.dpdk.org/archives/dev/2018-November/119971.html
Signed-off-by: Dekel Peled
---
v2: Apply code review comments:
* update LIB_GLUE_VERSION.
* simplify flow_dv_convert_modify_action().
* remove wrong validations.
---
---
drivers/net/mlx5/Makefile | 2 +-
drivers/net/mlx5/meson.build| 2 +-
drivers/net/mlx5/mlx5.h | 1 +
drivers/net/mlx5/mlx5_flow.h| 56 ++-
drivers/net/mlx5/mlx5_flow_dv.c | 967 +++-
drivers/net/mlx5/mlx5_glue.c| 22 +
drivers/net/mlx5/mlx5_glue.h| 5 +
drivers/net/mlx5/mlx5_prm.h | 22 +-
8 files changed, 1056 insertions(+), 21 deletions(-)
diff --git a/drivers/net/mlx5/Makefile b/drivers/net/mlx5/Makefile
index 895cdfe..c6b5926 100644
--- a/drivers/net/mlx5/Makefile
+++ b/drivers/net/mlx5/Makefile
@@ -8,7 +8,7 @@ include $(RTE_SDK)/mk/rte.vars.mk
LIB = librte_pmd_mlx5.a
LIB_GLUE = $(LIB_GLUE_BASE).$(LIB_GLUE_VERSION)
LIB_GLUE_BASE = librte_pmd_mlx5_glue.so
-LIB_GLUE_VERSION = 18.11.0
+LIB_GLUE_VERSION = 18.11.1
# Sources.
SRCS-$(CONFIG_RTE_LIBRTE_MLX5_PMD) += mlx5.c
diff --git a/drivers/net/mlx5/meson.build b/drivers/net/mlx5/meson.build
index 28938db..30d996f 100644
--- a/drivers/net/mlx5/meson.build
+++ b/drivers/net/mlx5/meson.build
@@ -4,7 +4,7 @@
pmd_dlopen = get_option('enable_driver_mlx_glue')
LIB_GLUE_BASE = 'librte_pmd_mlx5_glue.so'
-LIB_GLUE_VERSION = '18.11.0'
+LIB_GLUE_VERSION = '18.11.1'
LIB_GLUE = LIB_GLUE_BASE + '.' + LIB_GLUE_VERSION
if pmd_dlopen
dpdk_conf.set('RTE_LIBRTE_MLX5_DLOPEN_DEPS', 1)
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 75aeeb2..b2fe5cb 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -227,6 +227,7 @@ struct priv {
LIST_HEAD(ind_tables, mlx5_ind_table_ibv) ind_tbls;
LIST_HEAD(matchers, mlx5_flow_dv_matcher) matchers;
LIST_HEAD(encap_decap, mlx5_flow_dv_encap_decap_resource) encaps_decaps;
+ LIST_HEAD(modify_cmd, mlx5_flow_dv_modify_hdr_resource) modify_cmds;
uint32_t link_speed_capa; /* Link speed capabilities. */
struct mlx5_xstats_ctrl xstats_ctrl; /* Extended stats control. */
struct mlx5_stats_ctrl stats_ctrl; /* Stats control. */
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 4a7c052..cb1e6fd 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -69,6 +69,18 @@
(MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3 | \
MLX5_FLOW_LAYER_INNER_L4)
+/* Layer Masks. */
+#define MLX5_FLOW_LAYER_L2 \
+ (MLX5_FLOW_LAYER_OUTER_L2 | MLX5_FLOW_LAYER_INNER_L2)
+#define MLX5_FLOW_LAYER_L3_IPV4 \
+ (MLX5_FLOW_LAYER_OUTER_L3_IPV4 | MLX5_FLOW_LAYER_INNER_L3_IPV4)
+#define MLX5_FLOW_LAYER_L3_IPV6 \
+ (MLX5_FLOW_LAYER_OUTER_L3_IPV6 | MLX5_FLOW_LAYER_INNER_L3_IPV6)
+#define MLX5_FLOW_LAYER_L3 \
+ (MLX5_FLOW_LAYER_L3_IPV4 | MLX5_FLOW_LAYER_L3_IPV6)
+#define MLX5_FLOW_LAYER_L4 \
+ (MLX5_FLOW_LAYER_OUTER_L4 | MLX5_FLOW_LAYER_INNER_L4)
+
/* Actions */
#define MLX5_FLOW_ACTION_DROP (1u << 0)
#define MLX5_FLOW_ACTION_QUEUE (1u << 1)
@@ -110,6 +122,17 @@
MLX5_FLOW_ACTION_NVGRE_DECAP | \
MLX5_FLOW_ACTION_RAW_DECAP)
+#define MLX5_FLOW_MODIFY_HDR_ACTIONS (MLX5_FLOW_ACTION_SET_IPV4_SRC | \
+ MLX5_FLOW_ACTION_SET_IPV4_DST | \
+ MLX5_FLOW_ACTION_SET_IPV6_SRC | \
+ MLX5_FLOW_ACTION_SET_IPV6_DST | \
+ MLX5_FLOW_ACTION_SET_TP_SRC | \
+ MLX5_FLOW_ACTION_SET_TP_DST | \
+ MLX5_FLOW_ACTION_SET_TTL | \
+ MLX5_FLOW_ACTION_DEC_TTL | \
+ MLX5_FLOW_ACTION_SET_MAC_SRC | \
+ MLX5_FLOW_ACTION_SET_MAC_DST)
+
#ifndef IPPROTO_MPLS
#define IPPROTO_MPLS 137
#endif
@@ -153,9 +176,6 @@
/* IBV hash source bits for IPV6. */
#define MLX5_IPV6_IBV_RX_HASH (IBV_RX_HASH_SRC_IPV6 | IBV_RX_HASH_DST_IPV6)
-/* Max number of actions per DV flow. */
-#define MLX5_DV_MAX_NUMBER_OF_ACTIONS 8
-
enum mlx5_flow_drv_type {
MLX5_FLOW_TYPE_MIN,
MLX5_FLOW_TYPE_DV,
@@ -172,9 +192,6 @@ struct mlx5_flow_dv_match_params {
/**< Matcher value. This value is used as the mask or as a key. */
};
-#define MLX5_DV_MAX_NUMBER_OF_ACTIONS 8
-#define MLX5_ENCAP_MAX_LEN 132
-
/* Matcher structure. */
struct mlx5_flow_dv_matcher {
LIST_ENTRY(mlx5_flow_dv_matcher) next;
@@ -187,6 +204,8 @@ struct mlx5_flow_dv_matcher {
struct mlx5_flow_dv_match_params mask; /**< Matcher mask. */
};
+#define MLX5_ENCAP_MAX_LEN 132
+
/* Encap/
[dpdk-dev] [PATCH] examples/ip_fragmentation: support big packets
In some vendors the RX and TX configuration must be the same, therefore
the MTU size need to be equal to max_rx_pkt_len.
The MTU is the largest size packet in bytes that can be sent on the
network, therefore before changing this parameter, the NIC could not
receive packets larger than 1500 bytes, which is the default MTU size.
In addition, scatter-gather need to be enabled in order to receive
frames bigger than mbuf size.
Cc: sta...@dpdk.org
Signed-off-by: Noa Ezra
---
examples/ip_fragmentation/main.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/examples/ip_fragmentation/main.c b/examples/ip_fragmentation/main.c
index 17a877d..d294f5f 100644
--- a/examples/ip_fragmentation/main.c
+++ b/examples/ip_fragmentation/main.c
@@ -141,6 +141,7 @@ struct lcore_queue_conf {
.max_rx_pkt_len = JUMBO_FRAME_MAX_SIZE,
.split_hdr_size = 0,
.offloads = (DEV_RX_OFFLOAD_CHECKSUM |
+DEV_RX_OFFLOAD_SCATTER |
DEV_RX_OFFLOAD_JUMBO_FRAME),
},
.txmode = {
@@ -892,6 +893,16 @@ struct rte_lpm6_config lpm6_config = {
dev_info.max_rx_pktlen,
local_port_conf.rxmode.max_rx_pkt_len);
+ /* set the mtu to the maximum received packet size */
+ ret = rte_eth_dev_set_mtu(portid,
+ local_port_conf.rxmode.max_rx_pkt_len);
+ if (ret < 0) {
+ printf("\n");
+ rte_exit(EXIT_FAILURE, "Set MTU failed: "
+ "err=%d, port=%d\n",
+ ret, portid);
+ }
+
/* get the lcore_id for this port */
while (rte_lcore_is_enabled(rx_lcore_id) == 0 ||
qconf->n_rx_queue == (unsigned)rx_queue_per_lcore) {
--
1.8.3.1
[dpdk-dev] [PATCH v2] net/virtio: add platform memory ordering feature support
VIRTIO_F_ORDER_PLATFORM is required to use proper memory barriers
in case of HW vhost implementations like vDPA.
DMA barriers (rte_cio_*) are sufficent for that purpose.
Previously known as VIRTIO_F_IO_BARRIER.
Signed-off-by: Ilya Maximets
---
Version 2:
* rebased on current master (packed rings).
RFC --> Version 1:
* Dropped vendor-specific hack to determine if we need real barriers.
* Added VIRTIO_F_ORDER_PLATFORM feature definition and checking.
Note: Patch to change the name of the feature from VIRTIO_F_IO_BARRIER
to VIRTIO_F_ORDER_PLATFORM is not merged yet:
https://www.mail-archive.com/virtio-dev@lists.oasis-open.org/msg04114.html
drivers/net/virtio/virtio_ethdev.c | 2 ++
drivers/net/virtio/virtio_ethdev.h | 3 ++-
drivers/net/virtio/virtio_pci.h| 7 ++
drivers/net/virtio/virtio_rxtx.c | 16 ++--
drivers/net/virtio/virtqueue.h | 39 --
5 files changed, 51 insertions(+), 16 deletions(-)
diff --git a/drivers/net/virtio/virtio_ethdev.c
b/drivers/net/virtio/virtio_ethdev.c
index 446c338fc..6d461180c 100644
--- a/drivers/net/virtio/virtio_ethdev.c
+++ b/drivers/net/virtio/virtio_ethdev.c
@@ -1613,6 +1613,8 @@ virtio_init_device(struct rte_eth_dev *eth_dev, uint64_t
req_features)
if (virtio_negotiate_features(hw, req_features) < 0)
return -1;
+ hw->weak_barriers = !vtpci_with_feature(hw, VIRTIO_F_ORDER_PLATFORM);
+
if (!hw->virtio_user_dev) {
pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
rte_eth_copy_pci_info(eth_dev, pci_dev);
diff --git a/drivers/net/virtio/virtio_ethdev.h
b/drivers/net/virtio/virtio_ethdev.h
index f8d8a56ab..b8aab7da4 100644
--- a/drivers/net/virtio/virtio_ethdev.h
+++ b/drivers/net/virtio/virtio_ethdev.h
@@ -35,7 +35,8 @@
1ULL << VIRTIO_F_VERSION_1 | \
1ULL << VIRTIO_F_IN_ORDER| \
1ULL << VIRTIO_F_RING_PACKED | \
-1ULL << VIRTIO_F_IOMMU_PLATFORM)
+1ULL << VIRTIO_F_IOMMU_PLATFORM | \
+1ULL << VIRTIO_F_ORDER_PLATFORM)
#define VIRTIO_PMD_SUPPORTED_GUEST_FEATURES\
(VIRTIO_PMD_DEFAULT_GUEST_FEATURES |\
diff --git a/drivers/net/virtio/virtio_pci.h b/drivers/net/virtio/virtio_pci.h
index b22b62dad..38a0261da 100644
--- a/drivers/net/virtio/virtio_pci.h
+++ b/drivers/net/virtio/virtio_pci.h
@@ -129,6 +129,12 @@ struct virtnet_ctl;
*/
#define VIRTIO_F_IN_ORDER 35
+/*
+ * This feature indicates that memory accesses by the driver and the device
+ * are ordered in a way described by the platform.
+ */
+#define VIRTIO_F_ORDER_PLATFORM 36
+
/* The Guest publishes the used index for which it expects an interrupt
* at the end of the avail ring. Host should ignore the avail->flags field. */
/* The Host publishes the avail index for which it expects a kick
@@ -241,6 +247,7 @@ struct virtio_hw {
uint8_t use_simple_rx;
uint8_t use_inorder_rx;
uint8_t use_inorder_tx;
+ uint8_t weak_barriers;
boolhas_tx_offload;
boolhas_rx_offload;
uint16_tport_id;
diff --git a/drivers/net/virtio/virtio_rxtx.c b/drivers/net/virtio/virtio_rxtx.c
index 2309b71d6..ebb86ef70 100644
--- a/drivers/net/virtio/virtio_rxtx.c
+++ b/drivers/net/virtio/virtio_rxtx.c
@@ -1152,7 +1152,7 @@ virtio_recv_pkts(void *rx_queue, struct rte_mbuf
**rx_pkts, uint16_t nb_pkts)
nb_used = VIRTQUEUE_NUSED(vq);
- virtio_rmb();
+ virtio_rmb(hw->weak_barriers);
num = likely(nb_used <= nb_pkts) ? nb_used : nb_pkts;
if (unlikely(num > VIRTIO_MBUF_BURST_SZ))
@@ -1361,7 +1361,7 @@ virtio_recv_pkts_inorder(void *rx_queue,
nb_used = RTE_MIN(nb_used, nb_pkts);
nb_used = RTE_MIN(nb_used, VIRTIO_MBUF_BURST_SZ);
- virtio_rmb();
+ virtio_rmb(hw->weak_barriers);
PMD_RX_LOG(DEBUG, "used:%d", nb_used);
@@ -1549,7 +1549,7 @@ virtio_recv_mergeable_pkts(void *rx_queue,
nb_used = VIRTQUEUE_NUSED(vq);
- virtio_rmb();
+ virtio_rmb(hw->weak_barriers);
PMD_RX_LOG(DEBUG, "used:%d", nb_used);
@@ -1940,7 +1940,7 @@ virtio_xmit_pkts_packed(void *tx_queue, struct rte_mbuf
**tx_pkts,
/* Positive value indicates it need free vring descriptors */
if (unlikely(need > 0)) {
- virtio_rmb();
+ virtio_rmb(hw->weak_barriers);
need = RTE_MIN(need, (int)nb_pkts);
virtio_xmit_cleanup_packed(vq, need);
need = slots - vq->vq_free_cnt;
@@ -1988,7 +1988,7 @@ virtio_xmit_pkts(void *tx_queue, struct rte_mbuf
**tx_pkts, uint16_t nb_pkts)
PMD_TX_LOG(DEBUG, "%d packets to xmit", nb_pkts);
nb_used = VIRTQUEUE_NUSED(vq);
- virtio_rmb();
+ virtio_rmb(hw->weak_barriers);
if (likely(nb_used > vq->vq_nentries - vq->vq_free_thresh))
virtio_
Re: [dpdk-dev] [PATCH v7 0/9] app/proc-info: improve debug of proc-info tool
26/12/2018 06:21, Varghese, Vipin: > HI Thomas, > > Snipped > > > > > Small nits > > > > 9th patch in this set is doc. So above info need to be corrected. > > > > if you are addressing my earlier comment of separating out mempool > > > > element iteration changes in to separate new patch 9/10 .Please keep > > > > my ack in next version > > > > > > Thanks for pointing this out, Like updated in email and chat I am not > > planning to split it. Hence no version 8. > > > > So, no ack and no merge? > > > > Looking at the first patches + doc patch, the split is not meaningful. > > You should merge doc and option parsing in the related patches. > > For instance, parsing and doc of "tm" option should be in the "tm" patch. > > I did not follow you request. Are you stating, for each functionality I > should be updating document rather than 1 document update after adding the > new functions? If former is true I am not able to find such reasoning stated > in guideline or documentation or from the maintainer. Yes, you should update the doc while adding a new feature. But most importantly, there is no reason to do a patch adding some empty functions and filling them later. And please consider the option parsing is part of the feature.
Re: [dpdk-dev] [PATCH v7 0/9] app/proc-info: improve debug of proc-info tool
snipped > > > > > Small nits > > > > > 9th patch in this set is doc. So above info need to be corrected. > > > > > if you are addressing my earlier comment of separating out > > > > > mempool element iteration changes in to separate new patch 9/10 > > > > > .Please keep my ack in next version > > > > > > > > Thanks for pointing this out, Like updated in email and chat I am > > > > not > > > planning to split it. Hence no version 8. > > > > > > So, no ack and no merge? > > > > > > Looking at the first patches + doc patch, the split is not meaningful. > > > You should merge doc and option parsing in the related patches. > > > For instance, parsing and doc of "tm" option should be in the "tm" patch. > > > > I did not follow you request. Are you stating, for each functionality I > > should > be updating document rather than 1 document update after adding the new > functions? If former is true I am not able to find such reasoning stated in > guideline or documentation or from the maintainer. > > Yes, you should update the doc while adding a new feature. Ok, I will comply to your requirement even though it is not in 'guideline, documentation or from maintainer'. Humbly requesting to update documentation and guideline suggesting the same. This will also help others to submit patches according the new guideline. Once reflected it will be justified for sending a v8. > But most importantly, there is no reason to do a patch adding some empty > functions and filling them later. Following are the reasons for using stub function from v1 onwards till v7 1. Without the dummy function there are compiler warnings for unused variables. 2. It is logical to have stub functions for the new parse option being added in one go. These are based on the suggestion from the maintainer. > And please consider the option parsing is part of the feature. As mentioned above please find the reasoning stated for patches from v1 to v7.
[dpdk-dev] [PATCH v3 1/6] eal: fix clang compilation error on x86
When CONFIG_RTE_FORCE_INTRINSICS is enabled for x86, the clang
compilation error was:
include/generic/rte_atomic.h:215:9: error:
implicit declaration of function '__atomic_exchange_2'
is invalid in C99
include/generic/rte_atomic.h:494:9: error:
implicit declaration of function '__atomic_exchange_4'
is invalid in C99
include/generic/rte_atomic.h:772:9: error:
implicit declaration of function '__atomic_exchange_8'
is invalid in C99
Use __atomic_exchange_n instead of __atomic_exchange_(2/4/8).
For more information, please refer to:
http://mails.dpdk.org/archives/dev/2018-April/096776.html
Fixes: 7bdccb93078e ("eal: fix ARM build with clang")
Cc: sta...@dpdk.org
Signed-off-by: Gavin Hu
---
lib/librte_eal/common/include/generic/rte_atomic.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/lib/librte_eal/common/include/generic/rte_atomic.h
b/lib/librte_eal/common/include/generic/rte_atomic.h
index b99ba4688..ed5b125b3 100644
--- a/lib/librte_eal/common/include/generic/rte_atomic.h
+++ b/lib/librte_eal/common/include/generic/rte_atomic.h
@@ -212,7 +212,7 @@ rte_atomic16_exchange(volatile uint16_t *dst, uint16_t val);
static inline uint16_t
rte_atomic16_exchange(volatile uint16_t *dst, uint16_t val)
{
-#if defined(RTE_ARCH_ARM64) && defined(RTE_TOOLCHAIN_CLANG)
+#if defined(RTE_TOOLCHAIN_CLANG)
return __atomic_exchange_n(dst, val, __ATOMIC_SEQ_CST);
#else
return __atomic_exchange_2(dst, val, __ATOMIC_SEQ_CST);
@@ -495,7 +495,7 @@ rte_atomic32_exchange(volatile uint32_t *dst, uint32_t val);
static inline uint32_t
rte_atomic32_exchange(volatile uint32_t *dst, uint32_t val)
{
-#if defined(RTE_ARCH_ARM64) && defined(RTE_TOOLCHAIN_CLANG)
+#if defined(RTE_TOOLCHAIN_CLANG)
return __atomic_exchange_n(dst, val, __ATOMIC_SEQ_CST);
#else
return __atomic_exchange_4(dst, val, __ATOMIC_SEQ_CST);
@@ -777,7 +777,7 @@ rte_atomic64_exchange(volatile uint64_t *dst, uint64_t val);
static inline uint64_t
rte_atomic64_exchange(volatile uint64_t *dst, uint64_t val)
{
-#if defined(RTE_ARCH_ARM64) && defined(RTE_TOOLCHAIN_CLANG)
+#if defined(RTE_TOOLCHAIN_CLANG)
return __atomic_exchange_n(dst, val, __ATOMIC_SEQ_CST);
#else
return __atomic_exchange_8(dst, val, __ATOMIC_SEQ_CST);
--
2.11.0
[dpdk-dev] [PATCH v3 0/6] spinlock optimization and test case enhancements
V3: 1. Implemented the ticket lock to improve the fairness and predictability. The locks are obtained in the order of requested. V2: 1. FORCE_INTRINCIS is still an option for ppc/x86, although not is use by default, so don't remove it from generic file. 2. Fix the clang compiler error on x86 when the above FORCE_INTRINSICS is enabled. V1: 1. Remove the 1us delay outside of the locked region to really benchmark the spinlock acquire/release performance, not the delay API. 2. Use the precise version of getting timestamps for more precise benchmarking results. 3. Amortize the overhead of getting the timestamp by 1 loops. 4. Move the arm specific implementation to arm folder to remove the hardcoded implementation. 5. Use atomic primitives, which translate to one-way barriers, instead of two-way sync primitives, to optimize for performance. Gavin Hu (5): eal: fix clang compilation error on x86 test/spinlock: remove 1us delay for correct benchmarking test/spinlock: get timestamp more precisely test/spinlock: amortize the cost of getting time spinlock: reimplement with atomic one-way barrier builtins Joyce Kong (1): spinlock: ticket based to improve fairness .../common/include/arch/ppc_64/rte_spinlock.h | 5 +++ .../common/include/arch/x86/rte_spinlock.h | 6 +++ lib/librte_eal/common/include/generic/rte_atomic.h | 6 +-- .../common/include/generic/rte_spinlock.h | 45 +++--- test/test/test_spinlock.c | 32 +++ 5 files changed, 61 insertions(+), 33 deletions(-) -- 2.11.0
[dpdk-dev] [PATCH v3 3/6] test/spinlock: get timestamp more precisely
To precisely benchmark the spinlock performance, uses the precise
version of getting timestamps, which enforces the timestamps are
obtained at the expected places.
Signed-off-by: Gavin Hu
Reviewed-by: Phil Yang
---
test/test/test_spinlock.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/test/test/test_spinlock.c b/test/test/test_spinlock.c
index 6795195ae..648474833 100644
--- a/test/test/test_spinlock.c
+++ b/test/test/test_spinlock.c
@@ -113,14 +113,14 @@ load_loop_fn(void *func_param)
if (lcore != rte_get_master_lcore())
while (rte_atomic32_read(&synchro) == 0);
- begin = rte_get_timer_cycles();
+ begin = rte_rdtsc_precise();
while (time_diff < hz * TIME_MS / 1000) {
if (use_lock)
rte_spinlock_lock(&lk);
lcount++;
if (use_lock)
rte_spinlock_unlock(&lk);
- time_diff = rte_get_timer_cycles() - begin;
+ time_diff = rte_rdtsc_precise() - begin;
}
lock_count[lcore] = lcount;
return 0;
--
2.11.0
[dpdk-dev] [PATCH v3 2/6] test/spinlock: remove 1us delay for correct benchmarking
The test is to benchmark the performance of spinlock by counting the number of spinlock acquire and release operations within the specified time. A typical pair of lock and unlock operations costs tens or hundreds of nano seconds, in comparison to this, delaying 1 us outside of the locked region is too much, compromising the goal of benchmarking the lock and unlock performance. Signed-off-by: Gavin Hu Reviewed-by: Ruifeng Wang Reviewed-by: Joyce Kong Reviewed-by: Phil Yang Reviewed-by: Honnappa Nagarahalli Reviewed-by: Ola Liljedahl --- test/test/test_spinlock.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/test/test/test_spinlock.c b/test/test/test_spinlock.c index 73bff128e..6795195ae 100644 --- a/test/test/test_spinlock.c +++ b/test/test/test_spinlock.c @@ -120,8 +120,6 @@ load_loop_fn(void *func_param) lcount++; if (use_lock) rte_spinlock_unlock(&lk); - /* delay to make lock duty cycle slighlty realistic */ - rte_delay_us(1); time_diff = rte_get_timer_cycles() - begin; } lock_count[lcore] = lcount; -- 2.11.0
[dpdk-dev] [PATCH v3 5/6] spinlock: reimplement with atomic one-way barrier builtins
The __sync builtin based implementation generates full memory barriers
('dmb ish') on Arm platforms. Using C11 atomic builtins to generate one way
barriers.
Here is the assembly code of __sync_compare_and_swap builtin.
__sync_bool_compare_and_swap(dst, exp, src);
0x0090f1b0 <+16>:e0 07 40 f9 ldr x0, [sp, #8]
0x0090f1b4 <+20>:e1 0f 40 79 ldrhw1, [sp, #6]
0x0090f1b8 <+24>:e2 0b 40 79 ldrhw2, [sp, #4]
0x0090f1bc <+28>:21 3c 00 12 and w1, w1, #0x
0x0090f1c0 <+32>:03 7c 5f 48 ldxrh w3, [x0]
0x0090f1c4 <+36>:7f 00 01 6b cmp w3, w1
0x0090f1c8 <+40>:61 00 00 54 b.ne0x90f1d4
// b.any
0x0090f1cc <+44>:02 fc 04 48 stlxrh w4, w2, [x0]
0x0090f1d0 <+48>:84 ff ff 35 cbnzw4, 0x90f1c0
0x0090f1d4 <+52>:bf 3b 03 d5 dmb ish
0x0090f1d8 <+56>:e0 17 9f 1a csetw0, eq // eq = none
The benchmarking results showed 3X performance gain on Cavium ThunderX2 and
13% on Qualcomm Falmon and 3.7% on 4-A72 Marvell macchiatobin.
Here is the example test result on TX2:
*** spinlock_autotest without this patch ***
Core [123] Cost Time = 639822 us
Core [124] Cost Time = 633253 us
Core [125] Cost Time = 646030 us
Core [126] Cost Time = 643189 us
Core [127] Cost Time = 647039 us
Total Cost Time = 95433298 us
*** spinlock_autotest with this patch ***
Core [123] Cost Time = 163615 us
Core [124] Cost Time = 166471 us
Core [125] Cost Time = 189044 us
Core [126] Cost Time = 195745 us
Core [127] Cost Time = 78423 us
Total Cost Time = 27339656 us
Signed-off-by: Gavin Hu
Reviewed-by: Phil Yang
Reviewed-by: Honnappa Nagarahalli
Reviewed-by: Ola Liljedahl
Reviewed-by: Steve Capper
---
lib/librte_eal/common/include/generic/rte_spinlock.h | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/lib/librte_eal/common/include/generic/rte_spinlock.h
b/lib/librte_eal/common/include/generic/rte_spinlock.h
index c4c3fc31e..87ae7a4f1 100644
--- a/lib/librte_eal/common/include/generic/rte_spinlock.h
+++ b/lib/librte_eal/common/include/generic/rte_spinlock.h
@@ -61,9 +61,14 @@ rte_spinlock_lock(rte_spinlock_t *sl);
static inline void
rte_spinlock_lock(rte_spinlock_t *sl)
{
- while (__sync_lock_test_and_set(&sl->locked, 1))
- while(sl->locked)
+ int exp = 0;
+
+ while (!__atomic_compare_exchange_n(&sl->locked, &exp, 1, 0,
+ __ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
+ while (__atomic_load_n(&sl->locked, __ATOMIC_RELAXED))
rte_pause();
+ exp = 0;
+ }
}
#endif
@@ -80,7 +85,7 @@ rte_spinlock_unlock (rte_spinlock_t *sl);
static inline void
rte_spinlock_unlock (rte_spinlock_t *sl)
{
- __sync_lock_release(&sl->locked);
+ __atomic_store_n(&sl->locked, 0, __ATOMIC_RELEASE);
}
#endif
@@ -99,7 +104,10 @@ rte_spinlock_trylock (rte_spinlock_t *sl);
static inline int
rte_spinlock_trylock (rte_spinlock_t *sl)
{
- return __sync_lock_test_and_set(&sl->locked,1) == 0;
+ int exp = 0;
+ return __atomic_compare_exchange_n(&sl->locked, &exp, 1,
+ 0, /* disallow spurious failure */
+ __ATOMIC_ACQUIRE, __ATOMIC_RELAXED);
}
#endif
@@ -113,7 +121,7 @@ rte_spinlock_trylock (rte_spinlock_t *sl)
*/
static inline int rte_spinlock_is_locked (rte_spinlock_t *sl)
{
- return sl->locked;
+ return __atomic_load_n(&sl->locked, __ATOMIC_ACQUIRE);
}
/**
--
2.11.0
[dpdk-dev] [PATCH v3 4/6] test/spinlock: amortize the cost of getting time
Instead of getting timestamps per iteration, amortize its overhead
can help getting more precise benchmarking results.
Signed-off-by: Gavin Hu
Reviewed-by: Joyce Kong
---
test/test/test_spinlock.c | 28 +++-
1 file changed, 15 insertions(+), 13 deletions(-)
diff --git a/test/test/test_spinlock.c b/test/test/test_spinlock.c
index 648474833..e9839b979 100644
--- a/test/test/test_spinlock.c
+++ b/test/test/test_spinlock.c
@@ -96,9 +96,9 @@ test_spinlock_recursive_per_core(__attribute__((unused)) void
*arg)
}
static rte_spinlock_t lk = RTE_SPINLOCK_INITIALIZER;
-static uint64_t lock_count[RTE_MAX_LCORE] = {0};
+static uint64_t time_count[RTE_MAX_LCORE] = {0};
-#define TIME_MS 100
+#define MAX_LOOP 1
static int
load_loop_fn(void *func_param)
@@ -114,15 +114,14 @@ load_loop_fn(void *func_param)
while (rte_atomic32_read(&synchro) == 0);
begin = rte_rdtsc_precise();
- while (time_diff < hz * TIME_MS / 1000) {
+ while (lcount < MAX_LOOP) {
if (use_lock)
rte_spinlock_lock(&lk);
- lcount++;
if (use_lock)
rte_spinlock_unlock(&lk);
- time_diff = rte_rdtsc_precise() - begin;
}
- lock_count[lcore] = lcount;
+ time_diff = rte_rdtsc_precise() - begin;
+ time_count[lcore] = time_diff * 100 / hz;
return 0;
}
@@ -136,14 +135,16 @@ test_spinlock_perf(void)
printf("\nTest with no lock on single core...\n");
load_loop_fn(&lock);
- printf("Core [%u] count = %"PRIu64"\n", lcore, lock_count[lcore]);
- memset(lock_count, 0, sizeof(lock_count));
+ printf("Core [%u] Cost Time = %"PRIu64" us\n", lcore,
+ time_count[lcore]);
+ memset(time_count, 0, sizeof(time_count));
printf("\nTest with lock on single core...\n");
lock = 1;
load_loop_fn(&lock);
- printf("Core [%u] count = %"PRIu64"\n", lcore, lock_count[lcore]);
- memset(lock_count, 0, sizeof(lock_count));
+ printf("Core [%u] Cost Time = %"PRIu64" us\n", lcore,
+ time_count[lcore]);
+ memset(time_count, 0, sizeof(time_count));
printf("\nTest with lock on %u cores...\n", rte_lcore_count());
@@ -158,11 +159,12 @@ test_spinlock_perf(void)
rte_eal_mp_wait_lcore();
RTE_LCORE_FOREACH(i) {
- printf("Core [%u] count = %"PRIu64"\n", i, lock_count[i]);
- total += lock_count[i];
+ printf("Core [%u] Cost Time = %"PRIu64" us\n", i,
+ time_count[i]);
+ total += time_count[i];
}
- printf("Total count = %"PRIu64"\n", total);
+ printf("Total Cost Time = %"PRIu64" us\n", total);
return 0;
}
--
2.11.0
[dpdk-dev] [PATCH v3 6/6] spinlock: ticket based to improve fairness
From: Joyce Kong
The old implementation is unfair, some threads may take locks aggressively
while leaving the other threads starving for long time. As shown in the
following test, within same period of time, there are threads taking locks
much more times than the others.
The new implementation gives each waiting thread a ticket and they can take
the lock one by one, first come, first serviced, this avoids starvation for
too long time and is more predictable.
*** spinlock_autotest without this patch ***
Core [0] count = 89
Core [1] count = 84
Core [2] count = 94
...
Core [208] count = 171
Core [209] count = 152
Core [210] count = 161
Core [211] count = 187
*** spinlock_autotest with this patch ***
Core [0] count = 534
Core [1] count = 533
Core [2] count = 542
...
Core [208] count = 554
Core [209] count = 556
Core [210] count = 555
Core [211] count = 551
The overal spinlock fairness increased on thundex-2.
Signed-off-by: Joyce Kong
---
.../common/include/arch/ppc_64/rte_spinlock.h | 5 ++
.../common/include/arch/x86/rte_spinlock.h | 6 +++
.../common/include/generic/rte_spinlock.h | 53 +-
3 files changed, 42 insertions(+), 22 deletions(-)
diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_spinlock.h
b/lib/librte_eal/common/include/arch/ppc_64/rte_spinlock.h
index 39815d9ee..9fa904f92 100644
--- a/lib/librte_eal/common/include/arch/ppc_64/rte_spinlock.h
+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_spinlock.h
@@ -65,6 +65,11 @@ rte_spinlock_trylock(rte_spinlock_t *sl)
return __sync_lock_test_and_set(&sl->locked, 1) == 0;
}
+static inline int
+rte_spinlock_is_locked(rte_spinlock_t *sl)
+{
+ return sl->locked;
+}
#endif
static inline int rte_tm_supported(void)
diff --git a/lib/librte_eal/common/include/arch/x86/rte_spinlock.h
b/lib/librte_eal/common/include/arch/x86/rte_spinlock.h
index e2e2b2643..db80fa420 100644
--- a/lib/librte_eal/common/include/arch/x86/rte_spinlock.h
+++ b/lib/librte_eal/common/include/arch/x86/rte_spinlock.h
@@ -65,6 +65,12 @@ rte_spinlock_trylock (rte_spinlock_t *sl)
return lockval == 0;
}
+
+static inline int
+rte_spinlock_is_locked(rte_spinlock_t *sl)
+{
+ return sl->locked;
+}
#endif
extern uint8_t rte_rtm_supported;
diff --git a/lib/librte_eal/common/include/generic/rte_spinlock.h
b/lib/librte_eal/common/include/generic/rte_spinlock.h
index 87ae7a4f1..607abd400 100644
--- a/lib/librte_eal/common/include/generic/rte_spinlock.h
+++ b/lib/librte_eal/common/include/generic/rte_spinlock.h
@@ -27,8 +27,12 @@
/**
* The rte_spinlock_t type.
*/
-typedef struct {
- volatile int locked; /**< lock status 0 = unlocked, 1 = locked */
+typedef union {
+ volatile int locked; /* lock status 0 = unlocked, 1 = locked */
+ struct {
+ uint16_t current;
+ uint16_t next;
+ } s;
} rte_spinlock_t;
/**
@@ -45,7 +49,8 @@ typedef struct {
static inline void
rte_spinlock_init(rte_spinlock_t *sl)
{
- sl->locked = 0;
+ __atomic_store_n(&sl->s.current, 0, __ATOMIC_RELAXED);
+ __atomic_store_n(&sl->s.next, 0, __ATOMIC_RELAXED);
}
/**
@@ -61,14 +66,9 @@ rte_spinlock_lock(rte_spinlock_t *sl);
static inline void
rte_spinlock_lock(rte_spinlock_t *sl)
{
- int exp = 0;
-
- while (!__atomic_compare_exchange_n(&sl->locked, &exp, 1, 0,
- __ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
- while (__atomic_load_n(&sl->locked, __ATOMIC_RELAXED))
- rte_pause();
- exp = 0;
- }
+ uint16_t me = __atomic_fetch_add(&sl->s.next, 1, __ATOMIC_RELAXED);
+ while (__atomic_load_n(&sl->s.current, __ATOMIC_ACQUIRE) != me)
+ rte_pause();
}
#endif
@@ -79,13 +79,15 @@ rte_spinlock_lock(rte_spinlock_t *sl)
* A pointer to the spinlock.
*/
static inline void
-rte_spinlock_unlock (rte_spinlock_t *sl);
+rte_spinlock_unlock(rte_spinlock_t *sl);
#ifdef RTE_FORCE_INTRINSICS
static inline void
-rte_spinlock_unlock (rte_spinlock_t *sl)
+rte_spinlock_unlock(rte_spinlock_t *sl)
{
- __atomic_store_n(&sl->locked, 0, __ATOMIC_RELEASE);
+ uint16_t i = __atomic_load_n(&sl->s.current, __ATOMIC_RELAXED);
+ i++;
+ __atomic_store_n(&sl->s.current, i, __ATOMIC_RELAXED);
}
#endif
@@ -98,16 +100,19 @@ rte_spinlock_unlock (rte_spinlock_t *sl)
* 1 if the lock is successfully taken; 0 otherwise.
*/
static inline int
-rte_spinlock_trylock (rte_spinlock_t *sl);
+rte_spinlock_trylock(rte_spinlock_t *sl);
#ifdef RTE_FORCE_INTRINSICS
static inline int
-rte_spinlock_trylock (rte_spinlock_t *sl)
+rte_spinlock_trylock(rte_spinlock_t *sl)
{
- int exp = 0;
- return __atomic_compare_exchange_n(&sl->locked, &exp, 1,
- 0, /* disallow spurious failure */
- __ATOMIC_ACQUIRE, __ATOMIC_RELAXED);
+ uint16_t me = __atomic_fetch_add(&sl->s.next, 1,
Re: [dpdk-dev] rte_eal_hotplug_remove() generates error message
> On Tue, Dec 18, 2018 at 08:30:16PM +0900, Hideyuki Yamashita wrote:
> > > On Tue, Dec 18, 2018 at 02:52:16PM +0900, Hideyuki Yamashita wrote:
> > > > > On Tue, Dec 18, 2018 at 12:11:33PM +0900, Hideyuki Yamashita wrote:
> > > > > >
> > > > > > On Mon, Dec 17, 2018 at 11:21:01AM +, Burakov, Anatoly wrote:
> > > > > > > > On 17-Dec-18 10:45 AM, Hideyuki Yamashita wrote:
> > > > > > > > > > On 17-Dec-18 10:02 AM, Hideyuki Yamashita wrote:
> > > > > > > > > > > Dear Thomas and all,
> > > > > > > > > > >
> > > > > > > > > > > I took a look on dpdk code.
> > > > > > > > > > > I firstly write qustions and my analisys
> > > > > > > > > > > on the current dpdk code follows after that.
> > > > > > > > > > >
> > > > > > > > > > > [1.Questions]
> > > > > > > > > > > I have several questions to ask again.
> > > > > > > > > > > Is my understanding correct about followings
> > > > > > > > > > >
> > > > > > > > > > > Q1: "EAL:ERROR, Invalid memory" is ignorable
> > > > > > > > > > >
> > > > > > > > > > > Q2: there is no big difference between calling
> > > > > > > > > > > rte_eal_hotplug_remove(bus->name, dev->name)
> > > > > > > > > > > and
> > > > > > > > > > > rte_dev_remove(dev) because anyway it
> > > > > > > > > > > reaches to rte_pmd_vhost_remove and encounter
> > > > > > > > > > > the same error.
> > > > > > > > > > >
> > > > > > > > > > > [2.snip from my code]
> > > > > > > > > > > .
> > > > > > > > > > > rte_eth_dev_close(port_id);
> > > > > > > > > > > ret = rte_dev_remove(dev);
> > > > > > > > > > > if (ret < 0)
> > > > > > > > > > > return ret;
> > > > > > > > > > >
> > > > > > > > > > > rte_eth_dev_release_port(&rte_eth_devices[port_id]);
> > > > > > > > > > >
> > > > > > > > > > > [3. My analysis on dpdk code]
> > > > > > > > > > > static int
> > > > > > > > > > > rte_pmd_vhost_remove(struct rte_vdev_device *dev)
> > > > > > > > > > > {
> > > > > > > > > > > ...
> > > > > > > > > > > eth_dev_close(eth_dev);
> > > > > > > > > > >
> > > > > > > > > > >
> > > > > > > > > > > rte_free(vring_states[eth_dev->data->port_id]);
> > > > > > > > > > > vring_states[eth_dev->data->port_id] = NULL;
> > > > > > > > > > >
> > > > > > > > > > > rte_eth_dev_release_port(eth_dev);
> > > > > > > > > > >
> > > > > > > > > > > As you can see in rte_eth_vhost.c
> > > > > > > > > > > It calls both eth_dev_close and rte_eth_dev_release_port.
> > > > > > > > > > > And inside both functions, it tries to free mac_addrs.
> > > > > > > > > > > rte_free(dev->data->mac_addrs); //in
> > > > > > > > > > > rth_dev_close
> > > > > > > > > > > rte_free(eth_dev->data->mac_addrs); //in
> > > > > > > > > > > rte_eth_dev_release_port
> > > > > > > > > > >
> > > > > > > > > > > I understand that is the reason why
> > > > > > > > > > > /* Free the memory space back to heap */
> > > > > > > > > > > void rte_free(void *addr)
> > > > > > > > > > > {
> > > > > > > > > > > if (addr == NULL) return;
> > > > > > > > > > > if
> > > > > > > > > > > (malloc_heap_free(malloc_elem_from_data(addr)) < 0)
> > > > > > > > > > > RTE_LOG(ERR, EAL, "Error: Invalid
> > > > > > > > > > > memory\n");
> > > > > > > > > > > }
> > > > > > > > > > > encounter the error.
> > > > > > > > > > > As an experiment, I commented out one of them, "ERR,
> > > > > > > > > > > Invalid memory"
> > > > > > > > > > > disappered.
> > > > > > > > > > >
> > > > > > > > > > > Thanks and BR,
> > > > > > > > > > > Hideyuki Yamashita
> > > > > > > > > > > NTT TechnoCross
> > > > > > > > > > >
> > > > > > > > > > > > Adding my colleague Yasufumi and Hiroyuki as CC.
> > > > > > > > > > > >
> > > > > > > > > > > > We are waiting valuable advice from you.
> > > > > > > > > > > >
> > > > > > > > > > > > Thanks in advance,
> > > > > > > > > > > > Hideyuki Yamashita
> > > > > > > > > > > > NTT TechnoCross
> > > > > > > > > > > >
> > > > > > > > > > > > >
> > > > > > > > > > > > > Dear Thomas and all,
> > > > > > > > > > > > >
> > > > > > > > > > > > > I hope you all get safely back home after DPDK summit.
> > > > > > > > > > > > > (When I get back Japan, it is chilling. (start of
> > > > > > > > > > > > > winter))
> > > > > > > > > > > > >
> > > > > > > > > > > > > On DPDK 18.11.0, we tried to remove vhost device by
> > > > > > > > > > > > > using rte_eal_hotplug_remove().
> > > > > > > > > > > > > However, following syslog message is printed.
> > > > > > > > > > > > > “EAL: Error: Invalid memory”
> > > > > > > > > > > > >
> > > > > > > > > > > > > At DPDK summit San Jose, we had chance to ask Thomas
> > > > > > > > > > > > > how to handle the error message, and he gave us
> > > > > > > > > > > > > following advice:
> > > > > > > > > > > > > Replace “rte_eal_hotplug_add()” to
> > > > > > > > > > > > > “rte_dev_probe(devargs)” and
> > > > > > > > > > > > > “rte_eal_hotplug_re
[dpdk-dev] [PATCH] net/ice: fix build with debug enabled
When RTE_LIBRTE_MBUF_DEBUG enabled, rte_mbuf_sanity_check() function defined in rte_mbuf.so library, add it while linking the librte_pmd_ice.so library to fix the build issue. error log: /usr/bin/ld: ice_rxtx.o: in function `ice_recv_pkts': ice_rxtx.c:(.text+0x1d97): undefined reference to `rte_mbuf_sanity_check' /usr/bin/ld: ice_rxtx.o: in function `ice_tx_queue_release_mbufs': ice_rxtx.c:(.text+0x21e0): undefined reference to `rte_mbuf_sanity_check' /usr/bin/ld: ice_rxtx.c:(.text+0x22b3): undefined reference to `rte_mbuf_sanity_check' /usr/bin/ld: ice_rxtx.c:(.text+0x24a0): undefined reference to `rte_mbuf_sanity_check' /usr/bin/ld: ice_rxtx.c:(.text+0x2640): undefined reference to `rte_mbuf_sanity_check' /usr/bin/ld: ice_rxtx.o:ice_rxtx.c:(.text+0x299f): more undefined references to `rte_mbuf_sanity_check' follow Signed-off-by: Jerin Jacob --- drivers/net/ice/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/Makefile b/drivers/net/ice/Makefile index bc22d..4b421cde3 100644 --- a/drivers/net/ice/Makefile +++ b/drivers/net/ice/Makefile @@ -11,7 +11,8 @@ LIB = librte_pmd_ice.a CFLAGS += -O3 CFLAGS += $(WERROR_FLAGS) -LDLIBS += -lrte_eal -lrte_ethdev -lrte_kvargs -lrte_bus_pci -lrte_mempool +LDLIBS += -lrte_eal -lrte_mbuf -lrte_ethdev -lrte_kvargs +LDLIBS += -lrte_bus_pci -lrte_mempool EXPORT_MAP := rte_pmd_ice_version.map -- 2.20.1
[dpdk-dev] [PATCH 04/20] net/dpaa2: fix bad check for not-null
The check !dpaa2->cscn is not correct to check non-null value.
Fixes: 5d9a1e4d23fe ("net/dpaa2: enhance queue memory cleanup")
Cc: sta...@dpdk.org
Signed-off-by: Hemant Agrawal
---
drivers/net/dpaa2/dpaa2_ethdev.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index fa71807e6..8d4ea1bca 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -311,8 +311,7 @@ dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev)
/* cleanup tx queue cscn */
for (i = 0; i < priv->nb_tx_queues; i++) {
dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
- if (!dpaa2_q->cscn)
- rte_free(dpaa2_q->cscn);
+ rte_free(dpaa2_q->cscn);
}
/*free memory for all queues (RX+TX) */
rte_free(priv->rx_vq[0]);
--
2.17.1
[dpdk-dev] [PATCH 00/20] NXP DPAA2 fixes and enhancements
This patch set covers following: 1. Fixes in the existing NXP DPAA2 bus and net pmd 2. New object (DPDMUX) support in NIC driver for better classification 3. Improvements to support secondary process 4. Upgrade the low level QBMAN HW lib Akhil Goyal (1): net/dpaa2: enable optional timestamp in mbuf Hemant Agrawal (8): bus/fslmc: fix to use correct physical core for logical core net/dpaa2: fix bad check for not-null bus/fslmc: fix to convert error msg to warning net/dpaa2: fix device init for secondary process bus/fslmc: upgrade to latest qbman library bus/fslmc: add dynamic config for memback portal mode bus/fslmc: rename portal pi index to consumer index bus/fslmc: make portal func static Nipun Gupta (4): net/dpaa2: add dpdmux mc flib bus/fslmc: add support for scanning DPDMUX object net/dpaa2: add dpdmux initialization and configuration net/dpaa2: add API to support custom hash key Pankaj Chauhan (1): bus/fslmc: add function to map any addr via VFIO Sachin Saxena (1): bus/fslmc: fix to reset portal memory before use Shreyansh Jain (4): bus/fslmc: fix parse method for bus devices mempool/dpaa2: support saving context of buffer pool net/dpaa2: change ref of device to private device bus/fslmc: add support for secondary processes Youri Querry (1): bus/fslmc: fix the ring mode to use correct cache settings doc/api/doxy-api-index.md | 1 + doc/api/doxy-api.conf.in | 1 + drivers/bus/fslmc/fslmc_bus.c | 38 +- drivers/bus/fslmc/fslmc_vfio.c| 97 +- drivers/bus/fslmc/fslmc_vfio.h| 1 + drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 100 +- drivers/bus/fslmc/portal/dpaa2_hw_dpio.h | 2 - drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 6 +- .../bus/fslmc/qbman/include/fsl_qbman_base.h | 11 +- drivers/bus/fslmc/qbman/qbman_portal.c| 123 ++- drivers/bus/fslmc/qbman/qbman_portal.h| 2 +- drivers/bus/fslmc/qbman/qbman_sys.h | 34 +- drivers/bus/fslmc/rte_bus_fslmc_version.map | 7 + drivers/bus/fslmc/rte_fslmc.h | 1 + drivers/mempool/dpaa2/dpaa2_hw_mempool.c | 12 +- drivers/mempool/dpaa2/dpaa2_hw_mempool.h | 2 +- drivers/net/dpaa2/Makefile| 4 + drivers/net/dpaa2/base/dpaa2_hw_dpni.c| 54 +- drivers/net/dpaa2/dpaa2_ethdev.c | 26 +- drivers/net/dpaa2/dpaa2_ethdev.h | 6 + drivers/net/dpaa2/dpaa2_mux.c | 222 + drivers/net/dpaa2/dpaa2_rxtx.c| 41 +- drivers/net/dpaa2/mc/dpdmux.c | 929 ++ drivers/net/dpaa2/mc/fsl_dpdmux.h | 410 drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h | 221 + drivers/net/dpaa2/meson.build | 4 + drivers/net/dpaa2/rte_pmd_dpaa2.h | 90 ++ drivers/net/dpaa2/rte_pmd_dpaa2_version.map | 8 + 28 files changed, 2317 insertions(+), 136 deletions(-) create mode 100644 drivers/net/dpaa2/dpaa2_mux.c create mode 100644 drivers/net/dpaa2/mc/dpdmux.c create mode 100644 drivers/net/dpaa2/mc/fsl_dpdmux.h create mode 100644 drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h create mode 100644 drivers/net/dpaa2/rte_pmd_dpaa2.h -- 2.17.1
[dpdk-dev] [PATCH 02/20] bus/fslmc: fix the ring mode to use correct cache settings
From: Youri Querry
The code was incorrectly using the cache inhibited access.
It shall use cached enabled access for better performance.
Fixes: 293c0ca94c36 ("bus/fslmc: support memory backed portals with QBMAN 5.0")
Cc: sta...@dpdk.org
Signed-off-by: Youri Querry
---
drivers/bus/fslmc/qbman/qbman_portal.c | 12 ++--
drivers/bus/fslmc/qbman/qbman_sys.h| 1 +
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c
b/drivers/bus/fslmc/qbman/qbman_portal.c
index 3380e54f5..bbea37efc 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -683,8 +683,8 @@ static int qbman_swp_enqueue_ring_mode_mem_back(struct
qbman_swp *s,
full_mask = s->eqcr.pi_mask;
if (!s->eqcr.available) {
eqcr_ci = s->eqcr.ci;
- s->eqcr.ci = qbman_cinh_read(&s->sys,
- QBMAN_CENA_SWP_EQCR_CI) & full_mask;
+ s->eqcr.ci = qbman_cena_read_reg(&s->sys,
+ QBMAN_CENA_SWP_EQCR_CI_MEMBACK) & full_mask;
s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size,
eqcr_ci, s->eqcr.ci);
if (!s->eqcr.available)
@@ -809,8 +809,8 @@ static int qbman_swp_enqueue_multiple_mem_back(struct
qbman_swp *s,
full_mask = s->eqcr.pi_mask;
if (!s->eqcr.available) {
eqcr_ci = s->eqcr.ci;
- s->eqcr.ci = qbman_cinh_read(&s->sys,
- QBMAN_CENA_SWP_EQCR_CI) & full_mask;
+ s->eqcr.ci = qbman_cena_read_reg(&s->sys,
+ QBMAN_CENA_SWP_EQCR_CI_MEMBACK) & full_mask;
s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size,
eqcr_ci, s->eqcr.ci);
if (!s->eqcr.available)
@@ -941,8 +941,8 @@ static int qbman_swp_enqueue_multiple_desc_mem_back(struct
qbman_swp *s,
full_mask = s->eqcr.pi_mask;
if (!s->eqcr.available) {
eqcr_ci = s->eqcr.ci;
- s->eqcr.ci = qbman_cinh_read(&s->sys,
- QBMAN_CENA_SWP_EQCR_CI) & full_mask;
+ s->eqcr.ci = qbman_cena_read_reg(&s->sys,
+ QBMAN_CENA_SWP_EQCR_CI_MEMBACK) & full_mask;
s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size,
eqcr_ci, s->eqcr.ci);
if (!s->eqcr.available)
diff --git a/drivers/bus/fslmc/qbman/qbman_sys.h
b/drivers/bus/fslmc/qbman/qbman_sys.h
index d41af8358..0571097ab 100644
--- a/drivers/bus/fslmc/qbman/qbman_sys.h
+++ b/drivers/bus/fslmc/qbman/qbman_sys.h
@@ -55,6 +55,7 @@
#define QBMAN_CENA_SWP_RR(vb) (0x700 + ((uint32_t)(vb) >> 1))
#define QBMAN_CENA_SWP_VDQCR 0x780
#define QBMAN_CENA_SWP_EQCR_CI 0x840
+#define QBMAN_CENA_SWP_EQCR_CI_MEMBACK 0x1840
/* CENA register offsets in memory-backed mode */
#define QBMAN_CENA_SWP_DQRR_MEM(n) (0x800 + ((uint32_t)(n) << 6))
--
2.17.1
[dpdk-dev] [PATCH 03/20] bus/fslmc: fix to use correct physical core for logical core
Existing code is using the lcore id as the physical core
id. Add code to get the right physical id.
Also, dpaa2 can not support one lcore mapping to multiple cpus,
print err on such cases.
Fixes: ce9efbf5bb09 ("bus/fslmc: support dynamic logging")
Cc: sta...@dpdk.org
Signed-off-by: Hemant Agrawal
---
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 76
1 file changed, 63 insertions(+), 13 deletions(-)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index 4fc6efec5..ba2e28ce1 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -53,6 +53,10 @@ static uint32_t io_space_count;
/* Variable to store DPAA2 platform type */
uint32_t dpaa2_svr_family;
+/* Physical core id for lcores running on dpaa2. */
+/* DPAA2 only support 1 lcore to 1 phy cpu mapping */
+static unsigned int dpaa2_cpu[RTE_MAX_LCORE];
+
/* Variable to store DPAA2 DQRR size */
uint8_t dpaa2_dqrr_size;
/* Variable to store DPAA2 EQCR size */
@@ -92,7 +96,8 @@ dpaa2_core_cluster_sdest(int cpu_id)
}
#ifdef RTE_LIBRTE_PMD_DPAA2_EVENTDEV
-static void dpaa2_affine_dpio_intr_to_respective_core(int32_t dpio_id)
+static void
+dpaa2_affine_dpio_intr_to_respective_core(int32_t dpio_id, int lcoreid)
{
#define STRING_LEN 28
#define COMMAND_LEN50
@@ -125,7 +130,7 @@ static void
dpaa2_affine_dpio_intr_to_respective_core(int32_t dpio_id)
return;
}
- cpu_mask = cpu_mask << rte_lcore_id();
+ cpu_mask = cpu_mask << dpaa2_cpu[lcoreid];
snprintf(command, COMMAND_LEN, "echo %X > /proc/irq/%s/smp_affinity",
cpu_mask, token);
ret = system(command);
@@ -139,7 +144,7 @@ static void
dpaa2_affine_dpio_intr_to_respective_core(int32_t dpio_id)
fclose(file);
}
-static int dpaa2_dpio_intr_init(struct dpaa2_dpio_dev *dpio_dev)
+static int dpaa2_dpio_intr_init(struct dpaa2_dpio_dev *dpio_dev, int lcoreid)
{
struct epoll_event epoll_ev;
int eventfd, dpio_epoll_fd, ret;
@@ -176,32 +181,36 @@ static int dpaa2_dpio_intr_init(struct dpaa2_dpio_dev
*dpio_dev)
}
dpio_dev->epoll_fd = dpio_epoll_fd;
- dpaa2_affine_dpio_intr_to_respective_core(dpio_dev->hw_id);
+ dpaa2_affine_dpio_intr_to_respective_core(dpio_dev->hw_id, lcoreid);
return 0;
}
#endif
static int
-dpaa2_configure_stashing(struct dpaa2_dpio_dev *dpio_dev, int cpu_id)
+dpaa2_configure_stashing(struct dpaa2_dpio_dev *dpio_dev, int lcoreid)
{
int sdest, ret;
+ int cpu_id;
/* Set the Stashing Destination */
- if (cpu_id < 0) {
- cpu_id = rte_get_master_lcore();
- if (cpu_id < 0) {
+ if (lcoreid < 0) {
+ lcoreid = rte_get_master_lcore();
+ if (lcoreid < 0) {
DPAA2_BUS_ERR("Getting CPU Index failed");
return -1;
}
}
+
+ cpu_id = dpaa2_cpu[lcoreid];
+
/* Set the STASH Destination depending on Current CPU ID.
* Valid values of SDEST are 4,5,6,7. Where,
*/
sdest = dpaa2_core_cluster_sdest(cpu_id);
- DPAA2_BUS_DEBUG("Portal= %d CPU= %u SDEST= %d",
- dpio_dev->index, cpu_id, sdest);
+ DPAA2_BUS_DEBUG("Portal= %d CPU= %u lcore id =%u SDEST= %d",
+ dpio_dev->index, cpu_id, lcoreid, sdest);
ret = dpio_set_stashing_destination(dpio_dev->dpio, CMD_PRI_LOW,
dpio_dev->token, sdest);
@@ -211,7 +220,7 @@ dpaa2_configure_stashing(struct dpaa2_dpio_dev *dpio_dev,
int cpu_id)
}
#ifdef RTE_LIBRTE_PMD_DPAA2_EVENTDEV
- if (dpaa2_dpio_intr_init(dpio_dev)) {
+ if (dpaa2_dpio_intr_init(dpio_dev, lcoreid)) {
DPAA2_BUS_ERR("Interrupt registration failed for dpio");
return -1;
}
@@ -220,7 +229,7 @@ dpaa2_configure_stashing(struct dpaa2_dpio_dev *dpio_dev,
int cpu_id)
return 0;
}
-struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int cpu_id)
+struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int lcoreid)
{
struct dpaa2_dpio_dev *dpio_dev = NULL;
int ret;
@@ -236,7 +245,7 @@ struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int cpu_id)
DPAA2_BUS_DEBUG("New Portal %p (%d) affined thread - %lu",
dpio_dev, dpio_dev->index, syscall(SYS_gettid));
- ret = dpaa2_configure_stashing(dpio_dev, cpu_id);
+ ret = dpaa2_configure_stashing(dpio_dev, lcoreid);
if (ret)
DPAA2_BUS_ERR("dpaa2_configure_stashing failed");
@@ -340,6 +349,39 @@ dpaa2_affine_qbman_ethrx_swp(void)
}
}
+/*
+ * This checks for not supported lcore mappings as well as get the physical
+ * cpuid for the lcore.
+ * one lcore can only map to 1 cpu i.e. 1@10-14 not supported.
+ * one cpu can be mapped to more than one lcores.
+ */
+static int
+dpaa2_chec
[dpdk-dev] [PATCH 01/20] bus/fslmc: fix to reset portal memory before use
From: Sachin Saxena
Uninitialized portal memory is causing unwanted issues.
Fixes: 293c0ca94c36 ("bus/fslmc: support memory backed portals with QBMAN 5.0")
Cc: sta...@dpdk.org
Signed-off-by: Sachin Saxena
---
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index ce0699842..4fc6efec5 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -369,6 +369,8 @@ dpaa2_create_dpio_device(int vdev_fd,
dpio_dev->mc_portal = rte_mcp_ptr_list[MC_PORTAL_INDEX];
dpio_dev->dpio = malloc(sizeof(struct fsl_mc_io));
+ memset(dpio_dev->dpio, 0, sizeof(struct fsl_mc_io));
+
if (!dpio_dev->dpio) {
DPAA2_BUS_ERR("Memory allocation failure");
goto err;
--
2.17.1
[dpdk-dev] [PATCH 06/20] bus/fslmc: fix parse method for bus devices
From: Shreyansh Jain
Current code expects that bus->parse() would get a string containing
the name of the bus. That is incorrect. bus->parse() is expected
to have strings like:
dpni.1,key=val
dpio.2,key=val
when user passed:
-b fslmc:dpni.1,key=val
This commit fixes this behavior.
Fixes: 50245be05d1a ("bus/fslmc: support device blacklisting")
Cc: sta...@dpdk.org
Signed-off-by: Shreyansh Jain
---
drivers/bus/fslmc/fslmc_bus.c | 33 +
1 file changed, 17 insertions(+), 16 deletions(-)
diff --git a/drivers/bus/fslmc/fslmc_bus.c b/drivers/bus/fslmc/fslmc_bus.c
index 89af9385a..565e0148f 100644
--- a/drivers/bus/fslmc/fslmc_bus.c
+++ b/drivers/bus/fslmc/fslmc_bus.c
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: BSD-3-Clause
*
- * Copyright 2016 NXP
+ * Copyright 2016,2018 NXP
*
*/
@@ -227,20 +227,16 @@ static int
rte_fslmc_parse(const char *name, void *addr)
{
uint16_t dev_id;
- char *t_ptr;
- char *sep = strchr(name, ':');
+ char *t_ptr = NULL, *dname = NULL;
- if (strncmp(name, RTE_STR(FSLMC_BUS_NAME),
- strlen(RTE_STR(FSLMC_BUS_NAME {
- return -EINVAL;
- }
+ /* 'name' is expected to contain name of device, for example, dpio.1,
+* dpni.2, etc.
+*/
- if (!sep) {
- DPAA2_BUS_ERR("Incorrect device name observed");
+ dname = strdup(name);
+ if (!dname)
return -EINVAL;
- }
-
- t_ptr = (char *)(sep + 1);
+ t_ptr = dname;
if (strncmp("dpni", t_ptr, 4) &&
strncmp("dpseci", t_ptr, 6) &&
@@ -251,24 +247,29 @@ rte_fslmc_parse(const char *name, void *addr)
strncmp("dpmcp", t_ptr, 5) &&
strncmp("dpdmai", t_ptr, 6)) {
DPAA2_BUS_ERR("Unknown or unsupported device");
- return -EINVAL;
+ goto err_out;
}
t_ptr = strchr(name, '.');
if (!t_ptr) {
DPAA2_BUS_ERR("Incorrect device string observed (%s)", t_ptr);
- return -EINVAL;
+ goto err_out;
}
t_ptr = (char *)(t_ptr + 1);
if (sscanf(t_ptr, "%hu", &dev_id) <= 0) {
DPAA2_BUS_ERR("Incorrect device string observed (%s)", t_ptr);
- return -EINVAL;
+ goto err_out;
}
+ free(dname);
if (addr)
- strcpy(addr, (char *)(sep + 1));
+ strcpy(addr, name);
+
return 0;
+err_out:
+ free(dname);
+ return -EINVAL;
}
static int
--
2.17.1
[dpdk-dev] [PATCH 07/20] net/dpaa2: fix device init for secondary process
In order to support I/O from secondary process, the
burst APIs and OPS APIs shall be mapped/plugged.
Fixes: c147eae01cb3 ("net/dpaa2: introduce NXP DPAA2 driver")
Cc: sta...@dpdk.org
Signed-off-by: Shreyansh Jain
---
drivers/net/dpaa2/dpaa2_ethdev.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 8d4ea1bca..39f85ae7b 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -1918,8 +1918,15 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
PMD_INIT_FUNC_TRACE();
/* For secondary processes, the primary has done all the work */
- if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
+ /* In case of secondary, only burst and ops API need to be
+* plugged.
+*/
+ eth_dev->dev_ops = &dpaa2_ethdev_ops;
+ eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
+ eth_dev->tx_pkt_burst = dpaa2_dev_tx;
return 0;
+ }
dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
--
2.17.1
[dpdk-dev] [PATCH 09/20] bus/fslmc: upgrade to latest qbman library
This patch upgrades and sync the dpdk based qbman code
with new version of qbman flib.
Signed-off-by: Youri Querry
Signed-off-by: Nipun Gupta
Signed-off-by: Hemant Agrawal
---
drivers/bus/fslmc/qbman/qbman_portal.c | 8
drivers/bus/fslmc/qbman/qbman_sys.h| 17 +++--
2 files changed, 15 insertions(+), 10 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c
b/drivers/bus/fslmc/qbman/qbman_portal.c
index bbea37efc..2f572a08b 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -201,7 +201,7 @@ struct qbman_swp *qbman_swp_init(const struct
qbman_swp_desc *d)
p->vdq.valid_bit = QB_VALID_BIT;
p->dqrr.valid_bit = QB_VALID_BIT;
qman_version = p->desc.qman_version;
- if ((qman_version & 0x) < QMAN_REV_4100) {
+ if ((qman_version & QMAN_REV_MASK) < QMAN_REV_4100) {
p->dqrr.dqrr_size = 4;
p->dqrr.reset_bug = 1;
} else {
@@ -1315,9 +1315,9 @@ const struct qbman_result
*qbman_swp_dqrr_next_mem_back(struct qbman_swp *s)
*/
flags = p->dq.stat;
response_verb = verb & QBMAN_RESPONSE_VERB_MASK;
- if ((response_verb == QBMAN_RESULT_DQ) &&
- (flags & QBMAN_DQ_STAT_VOLATILE) &&
- (flags & QBMAN_DQ_STAT_EXPIRED))
+ if ((response_verb == QBMAN_RESULT_DQ)
+ && (flags & QBMAN_DQ_STAT_VOLATILE)
+ && (flags & QBMAN_DQ_STAT_EXPIRED))
atomic_inc(&s->vdq.busy);
return p;
}
diff --git a/drivers/bus/fslmc/qbman/qbman_sys.h
b/drivers/bus/fslmc/qbman/qbman_sys.h
index 0571097ab..e3bd1c5e6 100644
--- a/drivers/bus/fslmc/qbman/qbman_sys.h
+++ b/drivers/bus/fslmc/qbman/qbman_sys.h
@@ -387,6 +387,10 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys
*s,
{
uint32_t reg;
int i;
+ int cena_region_size = 4*1024;
+
+ if ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000)
+ cena_region_size = 64*1024;
#ifdef RTE_ARCH_64
uint8_t wn = CENA_WRITE_ENABLE;
#else
@@ -396,7 +400,8 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys
*s,
s->addr_cena = d->cena_bar;
s->addr_cinh = d->cinh_bar;
s->idx = (uint32_t)d->idx;
- s->cena = malloc(64*1024);
+ s->cena = malloc(cena_region_size);
+
if (!s->cena) {
pr_err("Could not allocate page for cena shadow\n");
return -1;
@@ -412,12 +417,12 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys
*s,
QBMAN_BUG_ON(reg);
#endif
if ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000)
- memset(s->addr_cena, 0, 64*1024);
+ memset(s->addr_cena, 0, cena_region_size);
else {
/* Invalidate the portal memory.
* This ensures no stale cache lines
*/
- for (i = 0; i < 0x1000; i += 64)
+ for (i = 0; i < cena_region_size; i += 64)
dccivac(s->addr_cena + i);
}
@@ -425,12 +430,12 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys
*s,
reg = qbman_set_swp_cfg(dqrr_size, wn,
0, 3, 2, 3, 1, 1, 1, 1, 1, 1);
else {
- if ((d->qman_version & QMAN_REV_MASK) < QMAN_REV_5000)
+ if ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000)
reg = qbman_set_swp_cfg(dqrr_size, wn,
- 1, 3, 2, 2, 1, 1, 1, 1, 1, 1);
+ 1, 3, 2, 0, 1, 1, 1, 1, 1, 1);
else
reg = qbman_set_swp_cfg(dqrr_size, wn,
- 1, 3, 2, 0, 1, 1, 1, 1, 1, 1);
+ 1, 3, 2, 2, 1, 1, 1, 1, 1, 1);
}
if ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000) {
--
2.17.1
[dpdk-dev] [PATCH 05/20] bus/fslmc: fix to convert error msg to warning
This is just a information. No need to print
it as a error.
Fixes: ce9efbf5bb09 ("bus/fslmc: support dynamic logging")
Cc: sta...@dpdk.org
Signed-off-by: Hemant Agrawal
---
drivers/bus/fslmc/fslmc_vfio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index 493b6e5be..ce82a99f6 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -176,7 +176,7 @@ static int vfio_map_irq_region(struct fslmc_vfio_group
*group)
vaddr = (unsigned long *)mmap(NULL, 0x1000, PROT_WRITE |
PROT_READ, MAP_SHARED, container_device_fd, 0x603);
if (vaddr == MAP_FAILED) {
- DPAA2_BUS_ERR("Unable to map region (errno = %d)", errno);
+ DPAA2_BUS_INFO("Unable to map region (errno = %d)", errno);
return -errno;
}
--
2.17.1
[dpdk-dev] [PATCH 08/20] net/dpaa2: enable optional timestamp in mbuf
From: Akhil Goyal
This patch enables the population of timestamp field
in mbuf on packet receive.
It may give performance impact on LX2xxx platforms.
So, it has been made optional for Lx2xxx platform.
One shall call, rte_dpaa2_enable_ts() to enable it.
Nothing is required for LS2 and LS1088 platforms.
Signed-off-by: Akhil Goyal
---
doc/api/doxy-api-index.md | 1 +
doc/api/doxy-api.conf.in| 1 +
drivers/net/dpaa2/Makefile | 2 ++
drivers/net/dpaa2/base/dpaa2_hw_dpni.c | 2 ++
drivers/net/dpaa2/dpaa2_ethdev.c| 9 +
drivers/net/dpaa2/dpaa2_ethdev.h| 4 +++
drivers/net/dpaa2/dpaa2_rxtx.c | 18 ++
drivers/net/dpaa2/meson.build | 2 ++
drivers/net/dpaa2/rte_pmd_dpaa2.h | 39 +
drivers/net/dpaa2/rte_pmd_dpaa2_version.map | 6
10 files changed, 84 insertions(+)
create mode 100644 drivers/net/dpaa2/rte_pmd_dpaa2.h
diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md
index e27874c5a..d95ad566c 100644
--- a/doc/api/doxy-api-index.md
+++ b/doc/api/doxy-api-index.md
@@ -43,6 +43,7 @@ The public API headers are grouped by topics:
[i40e] (@ref rte_pmd_i40e.h),
[bnxt] (@ref rte_pmd_bnxt.h),
[dpaa] (@ref rte_pmd_dpaa.h),
+ [dpaa2] (@ref rte_pmd_dpaa2.h),
[dpaa2_mempool] (@ref rte_dpaa2_mempool.h),
[dpaa2_cmdif](@ref rte_pmd_dpaa2_cmdif.h),
[dpaa2_qdma] (@ref rte_pmd_dpaa2_qdma.h),
diff --git a/doc/api/doxy-api.conf.in b/doc/api/doxy-api.conf.in
index 77ba327a8..bef9320c0 100644
--- a/doc/api/doxy-api.conf.in
+++ b/doc/api/doxy-api.conf.in
@@ -9,6 +9,7 @@ INPUT = @TOPDIR@/doc/api/doxy-api-index.md \
@TOPDIR@/drivers/net/bnxt \
@TOPDIR@/drivers/net/bonding \
@TOPDIR@/drivers/net/dpaa \
+ @TOPDIR@/drivers/net/dpaa2 \
@TOPDIR@/drivers/net/i40e \
@TOPDIR@/drivers/net/ixgbe \
@TOPDIR@/drivers/net/softnic \
diff --git a/drivers/net/dpaa2/Makefile b/drivers/net/dpaa2/Makefile
index ca5f7a336..2b9c011d6 100644
--- a/drivers/net/dpaa2/Makefile
+++ b/drivers/net/dpaa2/Makefile
@@ -42,4 +42,6 @@ LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs
LDLIBS += -lrte_common_dpaax
+# install this header file
+SYMLINK-$(CONFIG_RTE_LIBRTE_DPAA2_PMD)-include := rte_pmd_dpaa2.h
include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
index 713a41bf3..a6f86df8c 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
@@ -296,8 +296,10 @@ dpaa2_attach_bp_list(struct dpaa2_dev_priv *priv,
DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
DPNI_BUF_LAYOUT_OPT_PARSER_RESULT |
DPNI_BUF_LAYOUT_OPT_DATA_ALIGN |
+DPNI_BUF_LAYOUT_OPT_TIMESTAMP |
DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE;
+ layout.pass_timestamp = true;
layout.pass_frame_status = 1;
layout.private_data_size = DPAA2_FD_PTA_SIZE;
layout.pass_parser_result = 1;
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 39f85ae7b..861fbcd90 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -56,6 +56,9 @@ static uint64_t dev_tx_offloads_nodis =
DEV_TX_OFFLOAD_MT_LOCKFREE |
DEV_TX_OFFLOAD_MBUF_FAST_FREE;
+/* enable timestamp in mbuf */
+enum pmd_dpaa2_ts dpaa2_enable_ts;
+
struct rte_dpaa2_xstats_name_off {
char name[RTE_ETH_XSTATS_NAME_SIZE];
uint8_t page_id; /* dpni statistics page id */
@@ -88,6 +91,12 @@ static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev,
uint16_t mtu);
int dpaa2_logtype_pmd;
+__rte_experimental void
+rte_pmd_dpaa2_set_timestamp(enum pmd_dpaa2_ts enable)
+{
+ dpaa2_enable_ts = enable;
+}
+
static int
dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
{
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index bd69f523d..7cf6e4191 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -9,6 +9,7 @@
#define _DPAA2_ETHDEV_H
#include
+#include
#include
#include
@@ -83,6 +84,9 @@
#define DPAA2_PKT_TYPE_VLAN_1 0x0160
#define DPAA2_PKT_TYPE_VLAN_2 0x0260
+/* enable timestamp in mbuf*/
+extern enum pmd_dpaa2_ts dpaa2_enable_ts;
+
struct dpaa2_dev_priv {
void *hw;
int32_t hw_id;
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index eab943dcf..816ea00fd 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa
[dpdk-dev] [PATCH 10/20] bus/fslmc: add dynamic config for memback portal mode
Add flag in portal init to adjust the qbman memory type,
to decide between legacy portal mode or newly introduced
memory backed portals.
Signed-off-by: Roy Pledge
Signed-off-by: Youri Querry
Signed-off-by: Hemant Agrawal
---
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 2 +
.../bus/fslmc/qbman/include/fsl_qbman_base.h | 11 +++-
drivers/bus/fslmc/qbman/qbman_portal.c| 52 +++
drivers/bus/fslmc/qbman/qbman_sys.h | 20 ---
4 files changed, 53 insertions(+), 32 deletions(-)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index ba2e28ce1..37723a094 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -509,6 +509,8 @@ dpaa2_create_dpio_device(int vdev_fd,
p_des.cinh_bar = (void *)(dpio_dev->qbman_portal_ci_paddr);
p_des.irq = -1;
p_des.qman_version = attr.qbman_version;
+ p_des.eqcr_mode = qman_eqcr_vb_ring;
+ p_des.cena_access_mode = qman_cena_fastest_access;
dpio_dev->sw_portal = qbman_swp_init(&p_des);
if (dpio_dev->sw_portal == NULL) {
diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h
b/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h
index bb60a98f9..48bdaafa4 100644
--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright (C) 2014 Freescale Semiconductor, Inc.
+ * Copyright 2017-2018 NXP
*
*/
#ifndef _FSL_QBMAN_BASE_H
@@ -33,7 +34,12 @@ struct qbman_block_desc {
enum qbman_eqcr_mode {
qman_eqcr_vb_ring = 2, /* Valid bit, with eqcr in ring mode */
- qman_eqcr_vb_array, /* Valid bit, with eqcr in array mode */
+ qman_eqcr_vb_array,/* Valid bit, with eqcr in array mode */
+};
+
+enum qbman_cena_access_mode {
+ qman_cena_fastest_access = 0, /* Use memory backed node if available */
+ qman_cena_direct_access, /* Use direct access to the CENA region */
};
/**
@@ -46,6 +52,8 @@ enum qbman_eqcr_mode {
* @qman_version: the qman version.
* @eqcr_mode: Select the eqcr mode, currently only valid bit ring mode and
* valid bit array mode are supported.
+ * @cena_access_mode: Mode used to access the CENA region, direct
+ *or memory backed.
*
* Descriptor for a QBMan software portal, expressed in terms that make sense
to
* the user context. Ie. on MC, this information is likely to be true-physical,
@@ -62,6 +70,7 @@ struct qbman_swp_desc {
int idx;
uint32_t qman_version;
enum qbman_eqcr_mode eqcr_mode;
+ enum qbman_cena_access_mode cena_access_mode;
};
/* Driver object for managing a QBMan portal */
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c
b/drivers/bus/fslmc/qbman/qbman_portal.c
index 2f572a08b..08bfdc9f8 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -194,7 +194,8 @@ struct qbman_swp *qbman_swp_init(const struct
qbman_swp_desc *d)
p->sdq |= qbman_sdqcr_dct_prio_ics << QB_SDQCR_DCT_SHIFT;
p->sdq |= qbman_sdqcr_fc_up_to_3 << QB_SDQCR_FC_SHIFT;
p->sdq |= QMAN_SDQCR_TOKEN << QB_SDQCR_TOK_SHIFT;
- if ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000)
+ if ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000
+ && (d->cena_access_mode == qman_cena_fastest_access))
p->mr.valid_bit = QB_VALID_BIT;
atomic_set(&p->vdq.busy, 1);
@@ -233,7 +234,8 @@ struct qbman_swp *qbman_swp_init(const struct
qbman_swp_desc *d)
qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_SDQCR, 0);
p->eqcr.pi_ring_size = 8;
- if ((qman_version & 0x) >= QMAN_REV_5000) {
+ if ((qman_version & QMAN_REV_MASK) >= QMAN_REV_5000
+ && (d->cena_access_mode == qman_cena_fastest_access)) {
p->eqcr.pi_ring_size = 32;
qbman_swp_enqueue_array_mode_ptr =
qbman_swp_enqueue_array_mode_mem_back;
@@ -253,7 +255,8 @@ struct qbman_swp *qbman_swp_init(const struct
qbman_swp_desc *d)
eqcr_pi = qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_EQCR_PI);
p->eqcr.pi = eqcr_pi & p->eqcr.pi_mask;
p->eqcr.pi_vb = eqcr_pi & QB_VALID_BIT;
- if ((p->desc.qman_version & QMAN_REV_MASK) < QMAN_REV_5000)
+ if ((p->desc.qman_version & QMAN_REV_MASK) >= QMAN_REV_5000
+ && (d->cena_access_mode == qman_cena_fastest_access))
p->eqcr.ci = qbman_cinh_read(&p->sys,
QBMAN_CINH_SWP_EQCR_CI) & p->eqcr.pi_mask;
else
@@ -362,10 +365,11 @@ void *qbman_swp_mc_start(struct qbman_swp *p)
#ifdef QBMAN_CHECKING
QBMAN_BUG_ON(p->mc.check != swp_mc_can_start);
#endif
- if ((p->desc.qman_version & QMAN_REV_MASK) < QMAN_REV_5000)
- ret = qbman_cena_write_start(&p->
[dpdk-dev] [PATCH 11/20] bus/fslmc: rename portal pi index to consumer index
This is to align with the latest qbman hw library
Signed-off-by: Youri Querry
Signed-off-by: Hemant Agrawal
---
drivers/bus/fslmc/qbman/qbman_portal.c | 51 +++---
drivers/bus/fslmc/qbman/qbman_portal.h | 2 +-
2 files changed, 23 insertions(+), 30 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c
b/drivers/bus/fslmc/qbman/qbman_portal.c
index 08bfdc9f8..14f4b0344 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -251,21 +251,21 @@ struct qbman_swp *qbman_swp_init(const struct
qbman_swp_desc *d)
}
for (mask_size = p->eqcr.pi_ring_size; mask_size > 0; mask_size >>= 1)
- p->eqcr.pi_mask = (p->eqcr.pi_mask<<1) + 1;
+ p->eqcr.pi_ci_mask = (p->eqcr.pi_ci_mask<<1) + 1;
eqcr_pi = qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_EQCR_PI);
- p->eqcr.pi = eqcr_pi & p->eqcr.pi_mask;
+ p->eqcr.pi = eqcr_pi & p->eqcr.pi_ci_mask;
p->eqcr.pi_vb = eqcr_pi & QB_VALID_BIT;
if ((p->desc.qman_version & QMAN_REV_MASK) >= QMAN_REV_5000
&& (d->cena_access_mode == qman_cena_fastest_access))
- p->eqcr.ci = qbman_cinh_read(&p->sys,
- QBMAN_CINH_SWP_EQCR_CI) & p->eqcr.pi_mask;
+ p->eqcr.ci = qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_EQCR_PI)
+& p->eqcr.pi_ci_mask;
else
- p->eqcr.ci = qbman_cinh_read(&p->sys,
- QBMAN_CINH_SWP_EQCR_PI) & p->eqcr.pi_mask;
+ p->eqcr.ci = qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_EQCR_CI)
+& p->eqcr.pi_ci_mask;
p->eqcr.available = p->eqcr.pi_ring_size -
qm_cyc_diff(p->eqcr.pi_ring_size,
- p->eqcr.ci & (p->eqcr.pi_mask<<1),
- p->eqcr.pi & (p->eqcr.pi_mask<<1));
+ p->eqcr.ci & (p->eqcr.pi_ci_mask<<1),
+ p->eqcr.pi & (p->eqcr.pi_ci_mask<<1));
portal_idx_map[p->desc.idx] = p;
return p;
@@ -646,8 +646,8 @@ static int qbman_swp_enqueue_ring_mode_direct(struct
qbman_swp *s,
const uint32_t *cl = qb_cl(d);
uint32_t eqcr_ci, full_mask, half_mask;
- half_mask = (s->eqcr.pi_mask>>1);
- full_mask = s->eqcr.pi_mask;
+ half_mask = (s->eqcr.pi_ci_mask>>1);
+ full_mask = s->eqcr.pi_ci_mask;
if (!s->eqcr.available) {
eqcr_ci = s->eqcr.ci;
s->eqcr.ci = qbman_cena_read_reg(&s->sys,
@@ -685,8 +685,8 @@ static int qbman_swp_enqueue_ring_mode_mem_back(struct
qbman_swp *s,
const uint32_t *cl = qb_cl(d);
uint32_t eqcr_ci, full_mask, half_mask;
- half_mask = (s->eqcr.pi_mask>>1);
- full_mask = s->eqcr.pi_mask;
+ half_mask = (s->eqcr.pi_ci_mask>>1);
+ full_mask = s->eqcr.pi_ci_mask;
if (!s->eqcr.available) {
eqcr_ci = s->eqcr.ci;
s->eqcr.ci = qbman_cena_read_reg(&s->sys,
@@ -743,8 +743,8 @@ static int qbman_swp_enqueue_multiple_direct(struct
qbman_swp *s,
int i, num_enqueued = 0;
uint64_t addr_cena;
- half_mask = (s->eqcr.pi_mask>>1);
- full_mask = s->eqcr.pi_mask;
+ half_mask = (s->eqcr.pi_ci_mask>>1);
+ full_mask = s->eqcr.pi_ci_mask;
if (!s->eqcr.available) {
eqcr_ci = s->eqcr.ci;
s->eqcr.ci = qbman_cena_read_reg(&s->sys,
@@ -811,8 +811,8 @@ static int qbman_swp_enqueue_multiple_mem_back(struct
qbman_swp *s,
uint32_t eqcr_ci, eqcr_pi, half_mask, full_mask;
int i, num_enqueued = 0;
- half_mask = (s->eqcr.pi_mask>>1);
- full_mask = s->eqcr.pi_mask;
+ half_mask = (s->eqcr.pi_ci_mask>>1);
+ full_mask = s->eqcr.pi_ci_mask;
if (!s->eqcr.available) {
eqcr_ci = s->eqcr.ci;
s->eqcr.ci = qbman_cena_read_reg(&s->sys,
@@ -833,15 +833,6 @@ static int qbman_swp_enqueue_multiple_mem_back(struct
qbman_swp *s,
QBMAN_CENA_SWP_EQCR(eqcr_pi & half_mask));
memcpy(&p[1], &cl[1], 28);
memcpy(&p[8], &fd[i], sizeof(*fd));
- eqcr_pi++;
- }
-
- /* Set the verb byte, have to substitute in the valid-bit */
- eqcr_pi = s->eqcr.pi;
- for (i = 0; i < num_enqueued; i++) {
- p = qbman_cena_write_start_wo_shadow(&s->sys,
- QBMAN_CENA_SWP_EQCR(eqcr_pi & half_mask));
- p[0] = cl[0] | s->eqcr.pi_vb;
if (flags && (flags[i] & QBMAN_ENQUEUE_FLAG_DCA)) {
struct qbman_eq_desc *d = (struct qbman_eq_desc *)p;
@@ -849,6 +840,8 @@ static int qbman_swp_enqueue_multiple_mem_back(struct
qbman_swp *s,
((flags[i]) & QBMAN_EQCR_DCA_IDXMASK);
[dpdk-dev] [PATCH 12/20] bus/fslmc: make portal func static
It was not required to be a function.
Signed-off-by: Hemant Agrawal
---
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 2 +-
drivers/bus/fslmc/portal/dpaa2_hw_dpio.h | 2 --
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index 37723a094..cd28441f3 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -229,7 +229,7 @@ dpaa2_configure_stashing(struct dpaa2_dpio_dev *dpio_dev,
int lcoreid)
return 0;
}
-struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int lcoreid)
+static struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int lcoreid)
{
struct dpaa2_dpio_dev *dpio_dev = NULL;
int ret;
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
index 462501a2e..4354c76de 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
@@ -37,8 +37,6 @@ extern uint8_t dpaa2_eqcr_size;
extern struct dpaa2_io_portal_t dpaa2_io_portal[RTE_MAX_LCORE];
-struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int cpu_id);
-
/* Affine a DPIO portal to current processing thread */
int dpaa2_affine_qbman_swp(void);
--
2.17.1
[dpdk-dev] [PATCH 14/20] bus/fslmc: add support for scanning DPDMUX object
From: Nipun Gupta
Add support in bus and vfio to scan dpdmux type of objects
Signed-off-by: Nipun Gupta
---
drivers/bus/fslmc/fslmc_bus.c | 5 -
drivers/bus/fslmc/fslmc_vfio.c | 2 ++
drivers/bus/fslmc/rte_fslmc.h | 1 +
3 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/bus/fslmc/fslmc_bus.c b/drivers/bus/fslmc/fslmc_bus.c
index 565e0148f..fa1505377 100644
--- a/drivers/bus/fslmc/fslmc_bus.c
+++ b/drivers/bus/fslmc/fslmc_bus.c
@@ -187,6 +187,8 @@ scan_one_fslmc_device(char *dev_name)
dev->dev_type = DPAA2_MPORTAL;
else if (!strncmp("dpdmai", t_ptr, 6))
dev->dev_type = DPAA2_QDMA;
+ else if (!strncmp("dpdmux", t_ptr, 6))
+ dev->dev_type = DPAA2_MUX;
else
dev->dev_type = DPAA2_UNKNOWN;
@@ -245,7 +247,8 @@ rte_fslmc_parse(const char *name, void *addr)
strncmp("dpio", t_ptr, 4) &&
strncmp("dpci", t_ptr, 4) &&
strncmp("dpmcp", t_ptr, 5) &&
- strncmp("dpdmai", t_ptr, 6)) {
+ strncmp("dpdmai", t_ptr, 6) &&
+ strncmp("dpdmux", t_ptr, 6)) {
DPAA2_BUS_ERR("Unknown or unsupported device");
goto err_out;
}
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index ce82a99f6..98768a46c 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -560,6 +560,7 @@ fslmc_process_iodevices(struct rte_dpaa2_device *dev)
case DPAA2_IO:
case DPAA2_CI:
case DPAA2_BPOOL:
+ case DPAA2_MUX:
TAILQ_FOREACH(object, &dpaa2_obj_list, next) {
if (dev->dev_type == object->dev_type)
object->create(dev_fd, &device_info,
@@ -691,6 +692,7 @@ fslmc_vfio_process_group(void)
case DPAA2_IO:
case DPAA2_CI:
case DPAA2_BPOOL:
+ case DPAA2_MUX:
/* Call the object creation routine and remove the
* device entry from device list
*/
diff --git a/drivers/bus/fslmc/rte_fslmc.h b/drivers/bus/fslmc/rte_fslmc.h
index cea5b78f9..5cfb24505 100644
--- a/drivers/bus/fslmc/rte_fslmc.h
+++ b/drivers/bus/fslmc/rte_fslmc.h
@@ -66,6 +66,7 @@ enum rte_dpaa2_dev_type {
DPAA2_CI, /**< DPCI type device */
DPAA2_MPORTAL, /**< DPMCP type device */
DPAA2_QDMA, /**< DPDMAI type device */
+ DPAA2_MUX, /**< DPDMUX type device */
/* Unknown device placeholder */
DPAA2_UNKNOWN,
DPAA2_DEVTYPE_MAX,
--
2.17.1
[dpdk-dev] [PATCH 13/20] net/dpaa2: add dpdmux mc flib
From: Nipun Gupta
dpdmux object is added as a part of net driver as it is used to
de-multiplex packets to separate interfaces on basis of specific rules.
These rules can be configured from the software
Signed-off-by: Nipun Gupta
---
drivers/net/dpaa2/Makefile| 1 +
drivers/net/dpaa2/mc/dpdmux.c | 929 ++
drivers/net/dpaa2/mc/fsl_dpdmux.h | 410
drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h | 221 ++
drivers/net/dpaa2/meson.build | 1 +
5 files changed, 1562 insertions(+)
create mode 100644 drivers/net/dpaa2/mc/dpdmux.c
create mode 100644 drivers/net/dpaa2/mc/fsl_dpdmux.h
create mode 100644 drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h
diff --git a/drivers/net/dpaa2/Makefile b/drivers/net/dpaa2/Makefile
index 2b9c011d6..c58a39725 100644
--- a/drivers/net/dpaa2/Makefile
+++ b/drivers/net/dpaa2/Makefile
@@ -35,6 +35,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_rxtx.c
SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_ethdev.c
SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpni.c
SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpkg.c
+SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpdmux.c
LDLIBS += -lrte_bus_fslmc
LDLIBS += -lrte_mempool_dpaa2
diff --git a/drivers/net/dpaa2/mc/dpdmux.c b/drivers/net/dpaa2/mc/dpdmux.c
new file mode 100644
index 0..7962213b7
--- /dev/null
+++ b/drivers/net/dpaa2/mc/dpdmux.c
@@ -0,0 +1,929 @@
+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
+ *
+ * Copyright 2013-2016 Freescale Semiconductor Inc.
+ * Copyright 2018 NXP
+ *
+ */
+#include
+#include
+#include
+#include
+
+/** @addtogroup dpdmux
+ * @{
+ */
+
+/**
+ * dpdmux_open() - Open a control session for the specified object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @dpdmux_id: DPDMUX unique ID
+ * @token: Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dpdmux_create() function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent commands for
+ * this specific object.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpdmux_open(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ int dpdmux_id,
+ uint16_t *token)
+{
+ struct mc_command cmd = { 0 };
+ struct dpdmux_cmd_open *cmd_params;
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_OPEN,
+ cmd_flags,
+ 0);
+ cmd_params = (struct dpdmux_cmd_open *)cmd.params;
+ cmd_params->dpdmux_id = cpu_to_le32(dpdmux_id);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *token = mc_cmd_hdr_read_token(&cmd);
+
+ return 0;
+}
+
+/**
+ * dpdmux_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPDMUX object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpdmux_close(struct fsl_mc_io *mc_io,
+uint32_t cmd_flags,
+uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_CLOSE,
+ cmd_flags,
+ token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpdmux_create() - Create the DPDMUX object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token:Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @cfg: Configuration structure
+ * @obj_id: returned object id
+ *
+ * Create the DPDMUX object, allocate required resources and
+ * perform required initialization.
+ *
+ * The object can be created either by declaring it in the
+ * DPL file, or by calling this function.
+ *
+ * The function accepts an authentication token of a parent
+ * container that this object should be assigned to. The token
+ * can be '0' so the object will be assigned to the default container.
+ * The newly created object can be opened with the returned
+ * object id and using the container's associated tokens and MC portals.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpdmux_create(struct fsl_mc_io *mc_io,
[dpdk-dev] [PATCH 19/20] bus/fslmc: add support for secondary processes
From: Shreyansh Jain
Previously FSLMC bus only supported blacklisting of DPNI (eth),
DPSECI (crypto) devices. With this patch, devices like DPIO,
DPMCP, and other DP* can also be blacklisted/whitelisted.
This is a required condition for secondary processes where the
secondary needs to be passed a mutually exclusive list of
resources as compared the primary and all other secondaries.
This patch also moves the DPIO memory from malloc to hugepage so
that in future in case the DPIO list can be shared, it can be
accessed in secondaries.
Once this patch is done, multi-process cases can be executed by
whitelisting/blacklisting devices in each instance.
Signed-off-by: Shreyansh Jain
---
drivers/bus/fslmc/fslmc_vfio.c | 51
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 24 +--
2 files changed, 63 insertions(+), 12 deletions(-)
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index 98768a46c..1aae56fa9 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright (c) 2015-2016 Freescale Semiconductor, Inc. All rights reserved.
- * Copyright 2016 NXP
+ * Copyright 2016-2018 NXP
*
*/
@@ -610,6 +610,15 @@ fslmc_process_mcp(struct rte_dpaa2_device *dev)
/* check the MC version compatibility */
dpmng.regs = (void *)v_addr;
+
+ /* In case of secondary processes, MC version check is no longer
+* required.
+*/
+ if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
+ rte_mcp_ptr_list[0] = (void *)v_addr;
+ return 0;
+ }
+
if (mc_get_version(&dpmng, CMD_PRI_LOW, &mc_ver_info)) {
DPAA2_BUS_ERR("Unable to obtain MC version");
ret = -1;
@@ -653,6 +662,15 @@ fslmc_vfio_process_group(void)
/* Search the MCP as that should be initialized first. */
TAILQ_FOREACH_SAFE(dev, &rte_fslmc_bus.device_list, next, dev_temp) {
if (dev->dev_type == DPAA2_MPORTAL) {
+ if (dev->device.devargs &&
+ dev->device.devargs->policy == RTE_DEV_BLACKLISTED)
{
+ DPAA2_BUS_LOG(DEBUG, "%s Blacklisted, skipping",
+ dev->device.name);
+ TAILQ_REMOVE(&rte_fslmc_bus.device_list,
+ dev, next);
+ continue;
+ }
+
ret = fslmc_process_mcp(dev);
if (ret) {
DPAA2_BUS_ERR("Unable to map MC Portal");
@@ -677,6 +695,13 @@ fslmc_vfio_process_group(void)
}
TAILQ_FOREACH_SAFE(dev, &rte_fslmc_bus.device_list, next, dev_temp) {
+ if (dev->device.devargs &&
+ dev->device.devargs->policy == RTE_DEV_BLACKLISTED) {
+ DPAA2_BUS_LOG(DEBUG, "%s Blacklisted, skipping",
+ dev->device.name);
+ TAILQ_REMOVE(&rte_fslmc_bus.device_list, dev, next);
+ continue;
+ }
switch (dev->dev_type) {
case DPAA2_ETH:
case DPAA2_CRYPTO:
@@ -689,10 +714,17 @@ fslmc_vfio_process_group(void)
}
break;
case DPAA2_CON:
- case DPAA2_IO:
case DPAA2_CI:
case DPAA2_BPOOL:
case DPAA2_MUX:
+ /* IN case of secondary processes, all control objects
+* like dpbp, dpcon, dpci are not initialized/required
+* - all of these are assumed to be initialized and made
+* available by primary.
+*/
+ if (rte_eal_process_type() == RTE_PROC_SECONDARY)
+ continue;
+
/* Call the object creation routine and remove the
* device entry from device list
*/
@@ -703,12 +735,15 @@ fslmc_vfio_process_group(void)
return -1;
}
- /* This device is not required to be in the DPDK
-* exposed device list.
-*/
- TAILQ_REMOVE(&rte_fslmc_bus.device_list, dev, next);
- free(dev);
- dev = NULL;
+ break;
+ case DPAA2_IO:
+ ret = fslmc_process_iodevices(dev);
+ if (ret) {
+ DPAA2_BUS_DEBUG("Dev (%s) init failed",
+ dev->device.name);
+ return -1;
+
[dpdk-dev] [PATCH 20/20] bus/fslmc: add function to map any addr via VFIO
From: Pankaj Chauhan
This is required to map any accelerator memory
and PCI address to VFIO using QDMA.
Signed-off-by: Minghuan Lian
Signed-off-by: Pankaj Chauhan
---
drivers/bus/fslmc/fslmc_vfio.c | 42 +
drivers/bus/fslmc/fslmc_vfio.h | 1 +
drivers/bus/fslmc/rte_bus_fslmc_version.map | 7
3 files changed, 50 insertions(+)
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index 1aae56fa9..9befc8087 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -50,6 +50,7 @@ static struct fslmc_vfio_group vfio_group;
static struct fslmc_vfio_container vfio_container;
static int container_device_fd;
static char *g_container;
+static int fslmc_iommu_type;
static uint32_t *msi_intr_vaddr;
void *(*rte_mcp_ptr_list);
@@ -90,6 +91,9 @@ fslmc_get_container_group(int *groupid)
}
}
+ fslmc_iommu_type = (rte_vfio_noiommu_is_enabled() == 1) ?
+ RTE_VFIO_NOIOMMU : VFIO_TYPE1_IOMMU;
+
/* get group number */
ret = rte_vfio_get_group_num(SYSFS_FSL_MC_DEVICES,
g_container, groupid);
@@ -344,6 +348,44 @@ fslmc_dmamap_seg(const struct rte_memseg_list *msl
__rte_unused,
return ret;
}
+int rte_fslmc_vfio_mem_dmamap(uint64_t vaddr, uint64_t iova, uint64_t size)
+{
+ int ret;
+ struct fslmc_vfio_group *group;
+ struct vfio_iommu_type1_dma_map dma_map = {
+ .argsz = sizeof(struct vfio_iommu_type1_dma_map),
+ .flags = VFIO_DMA_MAP_FLAG_READ | VFIO_DMA_MAP_FLAG_WRITE,
+ };
+
+ if (fslmc_iommu_type == RTE_VFIO_NOIOMMU) {
+ DPAA2_BUS_DEBUG("Running in NOIOMMU mode");
+ return 0;
+ }
+
+ /* SET DMA MAP for IOMMU */
+ group = &vfio_group;
+ if (!group->container) {
+ DPAA2_BUS_ERR("Container is not connected");
+ return -1;
+ }
+
+ dma_map.size = size;
+ dma_map.vaddr = vaddr;
+ dma_map.iova = iova;
+
+ printf("PCIe vfio map 0x%llx:0x%llx, size 0x%llx\n", dma_map.vaddr,
+ dma_map.iova, dma_map.size);
+ ret = ioctl(group->container->fd, VFIO_IOMMU_MAP_DMA,
+ &dma_map);
+ if (ret) {
+ printf("Unable to map DMA address (errno = %d)\n",
+ errno);
+ return ret;
+ }
+
+ return 0;
+}
+
int rte_fslmc_vfio_dmamap(void)
{
int i = 0, ret;
diff --git a/drivers/bus/fslmc/fslmc_vfio.h b/drivers/bus/fslmc/fslmc_vfio.h
index 9e2c4feef..4e750d623 100644
--- a/drivers/bus/fslmc/fslmc_vfio.h
+++ b/drivers/bus/fslmc/fslmc_vfio.h
@@ -50,5 +50,6 @@ int fslmc_vfio_process_group(void);
char *fslmc_get_container(void);
int fslmc_get_container_group(int *gropuid);
int rte_fslmc_vfio_dmamap(void);
+int rte_fslmc_vfio_mem_dmamap(uint64_t vaddr, uint64_t iova, uint64_t size);
#endif /* _FSLMC_VFIO_H_ */
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map
b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index dcc4e082e..c4192d978 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -129,3 +129,10 @@ DPDK_18.11 {
dpci_set_opr;
} DPDK_18.05;
+
+DPDK_19.02 {
+ global:
+
+ rte_fslmc_vfio_mem_dmamap;
+
+} DPDK_18.11;
--
2.17.1
[dpdk-dev] [PATCH 18/20] net/dpaa2: change ref of device to private device
From: Shreyansh Jain
The I/O threads for DPAA2 take their reference for bpool ID, the
port ID and other info like qdid, from the rte_eth_dev. Further,
to get this data during I/O operation, a reference of the RTE
device is kept in the queue structure (dpaa2_queue).
In case of secondary processes, rte_eth_dev is not same as the
primary process. Thus, the reference goes invalid.
This patch changes the implementation to use the dev_private
rather than the rte_eth_dev as that is shared area across
all the processes.
Signed-off-by: Shreyansh Jain
---
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 5 -
drivers/net/dpaa2/dpaa2_ethdev.c| 4 ++--
drivers/net/dpaa2/dpaa2_rxtx.c | 18 ++
3 files changed, 16 insertions(+), 11 deletions(-)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 20c606dbe..626fcbbca 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -127,7 +127,10 @@ typedef void (dpaa2_queue_cb_dqrr_t)(struct qbman_swp *swp,
struct dpaa2_queue {
struct rte_mempool *mb_pool; /**< mbuf pool to populate RX ring. */
- void *dev;
+ union {
+ struct rte_eth_dev_data *eth_data;
+ void *dev;
+ };
int32_t eventfd;/*!< Event Fd of this queue */
uint32_t fqid; /*!< Unique ID of this queue */
uint8_t tc_index; /*!< traffic class identifier */
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 3a20158da..2b90f4021 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -244,7 +244,7 @@ dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
}
for (i = 0; i < priv->nb_rx_queues; i++) {
- mc_q->dev = dev;
+ mc_q->eth_data = dev->data;
priv->rx_vq[i] = mc_q++;
dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
dpaa2_q->q_storage = rte_malloc("dq_storage",
@@ -260,7 +260,7 @@ dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
}
for (i = 0; i < priv->nb_tx_queues; i++) {
- mc_q->dev = dev;
+ mc_q->eth_data = dev->data;
mc_q->flow_id = 0x;
priv->tx_vq[i] = mc_q++;
dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 6e2e8abd7..2d4b9ef14 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -509,7 +509,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs,
uint16_t nb_pkts)
const struct qbman_fd *fd, *next_fd;
struct qbman_pull_desc pulldesc;
struct queue_storage_info_t *q_storage = dpaa2_q->q_storage;
- struct rte_eth_dev *dev = dpaa2_q->dev;
+ struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
if (unlikely(!DPAA2_PER_LCORE_ETHRX_DPIO)) {
ret = dpaa2_affine_qbman_ethrx_swp();
@@ -613,9 +613,10 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs,
uint16_t nb_pkts)
bufs[num_rx] = eth_sg_fd_to_mbuf(fd);
else
bufs[num_rx] = eth_fd_to_mbuf(fd);
- bufs[num_rx]->port = dev->data->port_id;
+ bufs[num_rx]->port = eth_data->port_id;
- if (dev->data->dev_conf.rxmode.offloads &
DEV_RX_OFFLOAD_VLAN_STRIP)
+ if (eth_data->dev_conf.rxmode.offloads &
+ DEV_RX_OFFLOAD_VLAN_STRIP)
rte_vlan_strip(bufs[num_rx]);
dq_storage++;
@@ -716,8 +717,8 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t
nb_pkts)
struct qbman_swp *swp;
uint16_t num_tx = 0;
uint16_t bpid;
- struct rte_eth_dev *dev = dpaa2_q->dev;
- struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
+ struct dpaa2_dev_priv *priv = eth_data->dev_private;
uint32_t flags[MAX_TX_RING_SLOTS] = {0};
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
@@ -729,7 +730,8 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t
nb_pkts)
}
swp = DPAA2_PER_LCORE_PORTAL;
- DPAA2_PMD_DP_DEBUG("===> dev =%p, fqid =%d\n", dev, dpaa2_q->fqid);
+ DPAA2_PMD_DP_DEBUG("===> eth_data =%p, fqid =%d\n",
+ eth_data, dpaa2_q->fqid);
/*Prepare enqueue descriptor*/
qbman_eq_desc_clear(&eqdesc);
@@ -772,7 +774,7 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t
nb_pkts)
rte_mbuf_refcnt_read((*bufs)) == 1)) {
if (unlikely(((*bufs)->ol_flags
& PKT_TX_VLAN_PKT) ||
-
(dev->data-
[dpdk-dev] [PATCH 15/20] net/dpaa2: add dpdmux initialization and configuration
From: Nipun Gupta
This patch introduces an rte pmd API to configure dpdmux from
the application.
dpdmux can work in association with dpni as an additional
distribution capability on the NIC.
Signed-off-by: Nipun Gupta
---
drivers/net/dpaa2/Makefile | 1 +
drivers/net/dpaa2/dpaa2_ethdev.h| 2 +
drivers/net/dpaa2/dpaa2_mux.c | 222
drivers/net/dpaa2/meson.build | 1 +
drivers/net/dpaa2/rte_pmd_dpaa2.h | 23 ++
drivers/net/dpaa2/rte_pmd_dpaa2_version.map | 1 +
6 files changed, 250 insertions(+)
create mode 100644 drivers/net/dpaa2/dpaa2_mux.c
diff --git a/drivers/net/dpaa2/Makefile b/drivers/net/dpaa2/Makefile
index c58a39725..562551175 100644
--- a/drivers/net/dpaa2/Makefile
+++ b/drivers/net/dpaa2/Makefile
@@ -33,6 +33,7 @@ CFLAGS += -DALLOW_EXPERIMENTAL_API
SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += base/dpaa2_hw_dpni.c
SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_rxtx.c
SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_ethdev.c
+SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_mux.c
SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpni.c
SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpkg.c
SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpdmux.c
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 7cf6e4191..420ad6446 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -11,6 +11,8 @@
#include
#include
+#include
+
#include
#include
diff --git a/drivers/net/dpaa2/dpaa2_mux.c b/drivers/net/dpaa2/dpaa2_mux.c
new file mode 100644
index 0..1d043dcdc
--- /dev/null
+++ b/drivers/net/dpaa2/dpaa2_mux.c
@@ -0,0 +1,222 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2018 NXP
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+#include
+
+struct dpaa2_dpdmux_dev {
+ TAILQ_ENTRY(dpaa2_dpdmux_dev) next;
+ /**< Pointer to Next device instance */
+ struct fsl_mc_io dpdmux; /** handle to DPDMUX portal object */
+ uint16_t token;
+ uint32_t dpdmux_id; /*HW ID for DPDMUX object */
+ uint8_t num_ifs; /* Number of interfaces in DPDMUX */
+};
+
+struct rte_flow {
+ struct dpdmux_rule_cfg rule;
+};
+
+TAILQ_HEAD(dpdmux_dev_list, dpaa2_dpdmux_dev);
+static struct dpdmux_dev_list dpdmux_dev_list =
+ TAILQ_HEAD_INITIALIZER(dpdmux_dev_list); /*!< DPDMUX device list */
+
+static struct dpaa2_dpdmux_dev *get_dpdmux_from_id(uint32_t dpdmux_id)
+{
+ struct dpaa2_dpdmux_dev *dpdmux_dev = NULL;
+
+ /* Get DPBP dev handle from list using index */
+ TAILQ_FOREACH(dpdmux_dev, &dpdmux_dev_list, next) {
+ if (dpdmux_dev->dpdmux_id == dpdmux_id)
+ break;
+ }
+
+ return dpdmux_dev;
+}
+
+struct rte_flow *
+rte_pmd_dpaa2_mux_flow_create(uint32_t dpdmux_id,
+ struct rte_flow_item *pattern[],
+ struct rte_flow_action *actions[])
+{
+ struct dpaa2_dpdmux_dev *dpdmux_dev;
+ struct dpkg_profile_cfg kg_cfg;
+ const struct rte_flow_item_ipv4 *spec;
+ const struct rte_flow_action_vf *vf_conf;
+ struct dpdmux_cls_action dpdmux_action;
+ struct rte_flow *flow = NULL;
+ void *key_iova, *mask_iova, *key_cfg_iova = NULL;
+ int ret;
+
+ if (pattern[0]->type != RTE_FLOW_ITEM_TYPE_IPV4) {
+ DPAA2_PMD_ERR("Not supported pattern type: %d",
+ pattern[0]->type);
+ return NULL;
+ }
+
+ /* Find the DPDMUX from dpdmux_id in our list */
+ dpdmux_dev = get_dpdmux_from_id(dpdmux_id);
+ if (!dpdmux_dev) {
+ DPAA2_PMD_ERR("Invalid dpdmux_id: %d", dpdmux_id);
+ return NULL;
+ }
+
+ key_cfg_iova = rte_zmalloc(NULL, DIST_PARAM_IOVA_SIZE,
+ RTE_CACHE_LINE_SIZE);
+ if (!key_cfg_iova) {
+ DPAA2_PMD_ERR("Unable to allocate flow-dist parameters");
+ return NULL;
+ }
+
+ /* Currently taking only IP protocol as an extract type.
+* This can be exended to other fields using pattern->type.
+*/
+ memset(&kg_cfg, 0, sizeof(struct dpkg_profile_cfg));
+ kg_cfg.extracts[0].extract.from_hdr.prot = NET_PROT_IP;
+ kg_cfg.extracts[0].extract.from_hdr.field = NH_FLD_IP_PROTO;
+ kg_cfg.extracts[0].type = DPKG_EXTRACT_FROM_HDR;
+ kg_cfg.extracts[0].extract.from_hdr.type = DPKG_FULL_FIELD;
+ kg_cfg.num_extracts = 1;
+
+ ret = dpkg_prepare_key_cfg(&kg_cfg, key_cfg_iova);
+ if (ret) {
+ DPAA2_PMD_ERR("dpkg_prepare_key_cfg failed: err(%d)", ret);
+ goto creation_error;
+ }
+
+ ret = dpdmux_set_custom_key(&dpdmux_dev->dpdmux, CMD_PRI_LOW,
+
[dpdk-dev] [PATCH 16/20] net/dpaa2: add API to support custom hash key
From: Nipun Gupta
The DPAA2 hw can support a special offset based
configuration to program distribution on hash.
This is for all cases, which are not directly supported.
e.g. HASH based distribution on inner ip header
of a GRE tunnel.
Signed-off-by: Nipun Gupta
---
drivers/net/dpaa2/base/dpaa2_hw_dpni.c | 52 -
drivers/net/dpaa2/rte_pmd_dpaa2.h | 28 +++
drivers/net/dpaa2/rte_pmd_dpaa2_version.map | 1 +
3 files changed, 80 insertions(+), 1 deletion(-)
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
index a6f86df8c..11f14931e 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- * Copyright 2016 NXP
+ * Copyright 2016-2018 NXP
*
*/
@@ -28,6 +28,56 @@ dpaa2_distset_to_dpkg_profile_cfg(
uint64_t req_dist_set,
struct dpkg_profile_cfg *kg_cfg);
+int
+rte_pmd_dpaa2_set_custom_hash(uint16_t port_id,
+ uint16_t offset,
+ uint8_t size)
+{
+ struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
+ struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
+ struct fsl_mc_io *dpni = priv->hw;
+ struct dpni_rx_tc_dist_cfg tc_cfg;
+ struct dpkg_profile_cfg kg_cfg;
+ void *p_params;
+ int ret, tc_index = 0;
+
+ p_params = rte_zmalloc(
+ NULL, DIST_PARAM_IOVA_SIZE, RTE_CACHE_LINE_SIZE);
+ if (!p_params) {
+ DPAA2_PMD_ERR("Unable to allocate flow-dist parameters");
+ return -ENOMEM;
+ }
+
+ kg_cfg.extracts[0].type = DPKG_EXTRACT_FROM_DATA;
+ kg_cfg.extracts[0].extract.from_data.offset = offset;
+ kg_cfg.extracts[0].extract.from_data.size = size;
+ kg_cfg.num_extracts = 1;
+
+ ret = dpkg_prepare_key_cfg(&kg_cfg, p_params);
+ if (ret) {
+ DPAA2_PMD_ERR("Unable to prepare extract parameters");
+ rte_free(p_params);
+ return ret;
+ }
+
+ memset(&tc_cfg, 0, sizeof(struct dpni_rx_tc_dist_cfg));
+ tc_cfg.key_cfg_iova = (size_t)(DPAA2_VADDR_TO_IOVA(p_params));
+ tc_cfg.dist_size = eth_dev->data->nb_rx_queues;
+ tc_cfg.dist_mode = DPNI_DIST_MODE_HASH;
+
+ ret = dpni_set_rx_tc_dist(dpni, CMD_PRI_LOW, priv->token, tc_index,
+ &tc_cfg);
+ rte_free(p_params);
+ if (ret) {
+ DPAA2_PMD_ERR(
+"Setting distribution for Rx failed with err: %d",
+ret);
+ return ret;
+ }
+
+ return 0;
+}
+
int
dpaa2_setup_flow_dist(struct rte_eth_dev *eth_dev,
uint64_t req_dist_set)
diff --git a/drivers/net/dpaa2/rte_pmd_dpaa2.h
b/drivers/net/dpaa2/rte_pmd_dpaa2.h
index 57de27f21..7052d9da9 100644
--- a/drivers/net/dpaa2/rte_pmd_dpaa2.h
+++ b/drivers/net/dpaa2/rte_pmd_dpaa2.h
@@ -59,4 +59,32 @@ rte_pmd_dpaa2_mux_flow_create(uint32_t dpdmux_id,
struct rte_flow_item *pattern[],
struct rte_flow_action *actions[]);
+/**
+ * @warning
+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice
+ *
+ * Create a custom hash key on basis of offset of start of packet and size.
+ * for e.g. if we need GRE packets (non-vlan and without any extra headers)
+ * to be hashed on basis of inner IP header, we will provide offset as:
+ * 14 (eth) + 20 (IP) + 4 (GRE) + 12 (Inner Src offset) = 50 and size
+ * as 8 bytes.
+ *
+ * @param port_id
+ *The port identifier of the Ethernet device.
+ * @param offset
+ *Offset from the start of packet which needs to be included to
+ *calculate hash
+ * @param size
+ *Size of the hash input key
+ *
+ * @return
+ * - 0 if successful.
+ * - Negative in case of failure.
+ */
+__rte_experimental
+int
+rte_pmd_dpaa2_set_custom_hash(uint16_t port_id,
+ uint16_t offset,
+ uint8_t size);
+
#endif /* _RTE_PMD_DPAA2_H */
diff --git a/drivers/net/dpaa2/rte_pmd_dpaa2_version.map
b/drivers/net/dpaa2/rte_pmd_dpaa2_version.map
index 1661c5fb5..d1b4cdb23 100644
--- a/drivers/net/dpaa2/rte_pmd_dpaa2_version.map
+++ b/drivers/net/dpaa2/rte_pmd_dpaa2_version.map
@@ -15,5 +15,6 @@ EXPERIMENTAL {
global:
rte_pmd_dpaa2_mux_flow_create;
+ rte_pmd_dpaa2_set_custom_hash;
rte_pmd_dpaa2_set_timestamp;
} DPDK_17.11;
--
2.17.1
[dpdk-dev] [PATCH 17/20] mempool/dpaa2: support saving context of buffer pool
From: Shreyansh Jain
Initial design was to have the buffer pool per process where a
global static array stores the bpids. But, in case of secondary
processes, this would not allow the I/O threads to translate the
bpid in Rx'd packets.
This patch moves the array to a global area (rte_malloc) and in
case of Rx thread not containing a valid reference to the array,
reference is build using the handle avaialble in the dpaa2_queue.
Signed-off-by: Shreyansh Jain
---
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 1 +
drivers/mempool/dpaa2/dpaa2_hw_mempool.c | 12 +++-
drivers/mempool/dpaa2/dpaa2_hw_mempool.h | 2 +-
drivers/net/dpaa2/dpaa2_ethdev.c | 1 +
drivers/net/dpaa2/dpaa2_rxtx.c | 5 +
5 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index efbeebef9..20c606dbe 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -141,6 +141,7 @@ struct dpaa2_queue {
};
struct rte_event ev;
dpaa2_queue_cb_dqrr_t *cb;
+ struct dpaa2_bp_info *bp_array;
};
struct swp_active_dqs {
diff --git a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
index 790cded80..335eae40e 100644
--- a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
+++ b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
@@ -32,7 +32,7 @@
#include
-struct dpaa2_bp_info rte_dpaa2_bpid_info[MAX_BPID];
+struct dpaa2_bp_info *rte_dpaa2_bpid_info;
static struct dpaa2_bp_list *h_bp_list;
/* Dynamic logging identified for mempool */
@@ -50,6 +50,16 @@ rte_hw_mbuf_create_pool(struct rte_mempool *mp)
avail_dpbp = dpaa2_alloc_dpbp_dev();
+ if (rte_dpaa2_bpid_info == NULL) {
+ rte_dpaa2_bpid_info = (struct dpaa2_bp_info *)rte_malloc(NULL,
+ sizeof(struct dpaa2_bp_info) * MAX_BPID,
+ RTE_CACHE_LINE_SIZE);
+ if (rte_dpaa2_bpid_info == NULL)
+ return -ENOMEM;
+ memset(rte_dpaa2_bpid_info, 0,
+ sizeof(struct dpaa2_bp_info) * MAX_BPID);
+ }
+
if (!avail_dpbp) {
DPAA2_MEMPOOL_ERR("DPAA2 pool not available!");
return -ENOENT;
diff --git a/drivers/mempool/dpaa2/dpaa2_hw_mempool.h
b/drivers/mempool/dpaa2/dpaa2_hw_mempool.h
index 4d3468746..93694616e 100644
--- a/drivers/mempool/dpaa2/dpaa2_hw_mempool.h
+++ b/drivers/mempool/dpaa2/dpaa2_hw_mempool.h
@@ -59,7 +59,7 @@ struct dpaa2_bp_info {
#define mempool_to_bpinfo(mp) ((struct dpaa2_bp_info *)(mp)->pool_data)
#define mempool_to_bpid(mp) ((mempool_to_bpinfo(mp))->bpid)
-extern struct dpaa2_bp_info rte_dpaa2_bpid_info[MAX_BPID];
+extern struct dpaa2_bp_info *rte_dpaa2_bpid_info;
int rte_dpaa2_mbuf_alloc_bulk(struct rte_mempool *pool,
void **obj_table, unsigned int count);
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 861fbcd90..3a20158da 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -485,6 +485,7 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
}
dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
+ dpaa2_q->bp_array = rte_dpaa2_bpid_info;
/*Get the flow id from given VQ id*/
flow_id = rx_queue_id % priv->nb_rx_queues;
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 816ea00fd..6e2e8abd7 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -518,6 +518,11 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs,
uint16_t nb_pkts)
return 0;
}
}
+
+ if (unlikely(!rte_dpaa2_bpid_info &&
+rte_eal_process_type() == RTE_PROC_SECONDARY))
+ rte_dpaa2_bpid_info = dpaa2_q->bp_array;
+
swp = DPAA2_PER_LCORE_ETHRX_PORTAL;
pull_size = (nb_pkts > dpaa2_dqrr_size) ? dpaa2_dqrr_size : nb_pkts;
if (unlikely(!q_storage->active_dqs)) {
--
2.17.1
Re: [dpdk-dev] [EXT] [PATCH v3 1/6] eal: fix clang compilation error on x86
On Thu, 2018-12-27 at 12:13 +0800, Gavin Hu wrote:
> When CONFIG_RTE_FORCE_INTRINSICS is enabled for x86, the clang
> compilation error was:
> include/generic/rte_atomic.h:215:9: error:
> implicit declaration of function '__atomic_exchange_2'
> is invalid in C99
> include/generic/rte_atomic.h:494:9: error:
> implicit declaration of function '__atomic_exchange_4'
> is invalid in C99
> include/generic/rte_atomic.h:772:9: error:
> implicit declaration of function '__atomic_exchange_8'
> is invalid in C99
>
> Use __atomic_exchange_n instead of __atomic_exchange_(2/4/8).
> For more information, please refer to:
> http://mails.dpdk.org/archives/dev/2018-April/096776.html
>
> Fixes: 7bdccb93078e ("eal: fix ARM build with clang")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Gavin Hu
Acked-by: Jerin Jacob
Re: [dpdk-dev] [EXT] [PATCH v3 6/6] spinlock: ticket based to improve fairness
On Thu, 2018-12-27 at 12:13 +0800, Gavin Hu wrote:
> ---
> ---
> From: Joyce Kong
>
> The old implementation is unfair, some threads may take locks
> aggressively
I think, one issue here is x86 and ppc follows traditional spinlock and
arm64 will be following ticket lock for spinlock implementation.
This would change application behaviour on arm64 compared to x86 and
ppc.
How about having a separate API for ticket lock? That would give,
# application choice to use the locking strategy
# application behaviour will be same across all arch.
Initial ticket lock implementation can be generic with C11 memory
primitive, latter arch can optimize it, if required.
> while leaving the other threads starving for long time. As shown in
> the
> following test, within same period of time, there are threads taking
> locks
> much more times than the others.
>
>
> #ifdef RTE_FORCE_INTRINSICS
> static inline void
> -rte_spinlock_unlock (rte_spinlock_t *sl)
> +rte_spinlock_unlock(rte_spinlock_t *sl)
> {
> - __atomic_store_n(&sl->locked, 0, __ATOMIC_RELEASE);
> + uint16_t i = __atomic_load_n(&sl->s.current, __ATOMIC_RELAXED);
> + i++;
> + __atomic_store_n(&sl->s.current, i, __ATOMIC_RELAXED);
Shouldn't we use __ATOMIC_RELEASE here to pair with lock() ?
> }
> #endif
>
> @@ -98,16 +100,19 @@ rte_spinlock_unlock (rte_spinlock_t *sl)
> * 1 if the lock is successfully taken; 0 otherwise.
> */
> static inline int
> -rte_spinlock_trylock (rte_spinlock_t *sl);
> +rte_spinlock_trylock(rte_spinlock_t *sl);
>
> #ifdef RTE_FORCE_INTRINSICS
> static inline int
> -rte_spinlock_trylock (rte_spinlock_t *sl)
> +rte_spinlock_trylock(rte_spinlock_t *sl)
> {
> - int exp = 0;
> - return __atomic_compare_exchange_n(&sl->locked, &exp, 1,
> - 0, /* disallow spurious failure */
> - __ATOMIC_ACQUIRE, __ATOMIC_RELAXED);
> + uint16_t me = __atomic_fetch_add(&sl->s.next, 1,
> __ATOMIC_RELAXED);
> + while (__atomic_load_n(&sl->s.current, __ATOMIC_RELAXED) != me)
> {
> + __atomic_sub_fetch(&sl->s.next, 1, __ATOMIC_RELAXED);
> + return 0;
> + }
> +
Shouldn't we need CAS here?
Similar implementation here:
https://git.linaro.org/lng/odp.git/tree/platform/linux-generic/include/odp/api/plat/ticketlock_inlines.h
> + return 1;
> }
> #endif
>
>
Re: [dpdk-dev] [EXT] [PATCH v3 2/6] test/spinlock: remove 1us delay for correct benchmarking
On Thu, 2018-12-27 at 12:13 +0800, Gavin Hu wrote: > --- > --- > The test is to benchmark the performance of spinlock by counting the > number of spinlock acquire and release operations within the > specified > time. > A typical pair of lock and unlock operations costs tens or hundreds > of > nano seconds, in comparison to this, delaying 1 us outside of the > locked > region is too much, compromising the goal of benchmarking the lock > and > unlock performance. > > Signed-off-by: Gavin Hu > Reviewed-by: Ruifeng Wang > Reviewed-by: Joyce Kong > Reviewed-by: Phil Yang > Reviewed-by: Honnappa Nagarahalli > Reviewed-by: Ola Liljedahl > --- Acked-by: Jerin Jacob
Re: [dpdk-dev] [EXT] [PATCH v3 3/6] test/spinlock: get timestamp more precisely
On Thu, 2018-12-27 at 12:13 +0800, Gavin Hu wrote:
> ---
> ---
> To precisely benchmark the spinlock performance, uses the precise
> version of getting timestamps, which enforces the timestamps are
> obtained at the expected places.
>
> Signed-off-by: Gavin Hu
> Reviewed-by: Phil Yang
> ---
> test/test/test_spinlock.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/test/test/test_spinlock.c b/test/test/test_spinlock.c
> index 6795195ae..648474833 100644
> --- a/test/test/test_spinlock.c
> +++ b/test/test/test_spinlock.c
> @@ -113,14 +113,14 @@ load_loop_fn(void *func_param)
> if (lcore != rte_get_master_lcore())
> while (rte_atomic32_read(&synchro) == 0);
>
> - begin = rte_get_timer_cycles();
> + begin = rte_rdtsc_precise();
> while (time_diff < hz * TIME_MS / 1000) {
> if (use_lock)
> rte_spinlock_lock(&lk);
> lcount++;
> if (use_lock)
> rte_spinlock_unlock(&lk);
> - time_diff = rte_get_timer_cycles() - begin;
> + time_diff = rte_rdtsc_precise() - begin;
Since _precise() versions add a full barrier, time_diff would
include delay of a full barrier also. As mentioned in the commit
message, Do you see rte_get_timer_cycles() called in unexpected places?
Is there difference in time_diff apart from delay in rte_mb() when
using with _precise() version?
> }
> lock_count[lcore] = lcount;
> return 0;
Re: [dpdk-dev] [EXT] [PATCH v3 5/6] spinlock: reimplement with atomic one-way barrier builtins
On Thu, 2018-12-27 at 12:13 +0800, Gavin Hu wrote:
---
> ---
> The __sync builtin based implementation generates full memory
> barriers
> ('dmb ish') on Arm platforms. Using C11 atomic builtins to generate
> one way
> barriers.
>
> Here is the assembly code of __sync_compare_and_swap builtin.
> __sync_bool_compare_and_swap(dst, exp, src);
>0x0090f1b0 <+16>:e0 07 40 f9 ldr x0, [sp, #8]
>0x0090f1b4 <+20>:e1 0f 40 79 ldrhw1, [sp, #6]
>0x0090f1b8 <+24>:e2 0b 40 79 ldrhw2, [sp, #4]
>0x0090f1bc <+28>:21 3c 00 12 and w1, w1, #0x
>0x0090f1c0 <+32>:03 7c 5f 48 ldxrh w3, [x0]
>0x0090f1c4 <+36>:7f 00 01 6b cmp w3, w1
>0x0090f1c8 <+40>:61 00 00 54 b.ne0x90f1d4
> // b.any
>0x0090f1cc <+44>:02 fc 04 48 stlxrh w4, w2, [x0]
>0x0090f1d0 <+48>:84 ff ff 35 cbnzw4, 0x90f1c0
>
>0x0090f1d4 <+52>:bf 3b 03 d5 dmb ish
>0x0090f1d8 <+56>:e0 17 9f 1a csetw0, eq // eq =
> none
>
> The benchmarking results showed 3X performance gain on Cavium
> ThunderX2 and
> 13% on Qualcomm Falmon and 3.7% on 4-A72 Marvell macchiatobin.
> Here is the example test result on TX2:
>
> *** spinlock_autotest without this patch ***
> Core [123] Cost Time = 639822 us
> Core [124] Cost Time = 633253 us
> Core [125] Cost Time = 646030 us
> Core [126] Cost Time = 643189 us
> Core [127] Cost Time = 647039 us
> Total Cost Time = 95433298 us
>
> *** spinlock_autotest with this patch ***
> Core [123] Cost Time = 163615 us
> Core [124] Cost Time = 166471 us
> Core [125] Cost Time = 189044 us
> Core [126] Cost Time = 195745 us
> Core [127] Cost Time = 78423 us
> Total Cost Time = 27339656 us
>
> Signed-off-by: Gavin Hu
> Reviewed-by: Phil Yang
> Reviewed-by: Honnappa Nagarahalli
> Reviewed-by: Ola Liljedahl
> Reviewed-by: Steve Capper
> ---
> lib/librte_eal/common/include/generic/rte_spinlock.h | 18
> +-
> 1 file changed, 13 insertions(+), 5 deletions(-)
>
> diff --git a/lib/librte_eal/common/include/generic/rte_spinlock.h
> b/lib/librte_eal/common/include/generic/rte_spinlock.h
> index c4c3fc31e..87ae7a4f1 100644
> --- a/lib/librte_eal/common/include/generic/rte_spinlock.h
> +++ b/lib/librte_eal/common/include/generic/rte_spinlock.h
> @@ -61,9 +61,14 @@ rte_spinlock_lock(rte_spinlock_t *sl);
> static inline void
> rte_spinlock_lock(rte_spinlock_t *sl)
> {
> - while (__sync_lock_test_and_set(&sl->locked, 1))
> - while(sl->locked)
> + int exp = 0;
> +
> + while (!__atomic_compare_exchange_n(&sl->locked, &exp, 1, 0,
> + __ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
How about remove explict exp = 0 and change to
__atomic_test_and_set(flag, __ATOMIC_ACQUIRE);
i.e
while (_atomic_test_and_set(flag, __ATOMIC_ACQUIRE))
> + while (__atomic_load_n(&sl->locked, __ATOMIC_RELAXED))
> rte_pause();
> + exp = 0;
We can remove exp = 0 with above scheme.
> + }
> }
> #endif
>
> @@ -80,7 +85,7 @@ rte_spinlock_unlock (rte_spinlock_t *sl);
> static inline void
> rte_spinlock_unlock (rte_spinlock_t *sl)
> {
> - __sync_lock_release(&sl->locked);
> + __atomic_store_n(&sl->locked, 0, __ATOMIC_RELEASE);
}
> #endif
>
> @@ -99,7 +104,10 @@ rte_spinlock_trylock (rte_spinlock_t *sl);
> static inline int
> rte_spinlock_trylock (rte_spinlock_t *sl)
> {
> - return __sync_lock_test_and_set(&sl->locked,1) == 0;
> + int exp = 0;
> + return __atomic_compare_exchange_n(&sl->locked, &exp, 1,
> + 0, /* disallow spurious failure */
> + __ATOMIC_ACQUIRE, __ATOMIC_RELAXED);
Here to remove explicit exp.
return (__atomic_test_and_set(flag, __ATOMIC_ACQUIRE) == 0)
> }
> #endif
>
> @@ -113,7 +121,7 @@ rte_spinlock_trylock (rte_spinlock_t *sl)
> */
> static inline int rte_spinlock_is_locked (rte_spinlock_t *sl)
> {
> - return sl->locked;
> + return __atomic_load_n(&sl->locked, __ATOMIC_ACQUIRE);
__ATOMIC_RELAXED would be enough here. Right ?
> }
>
> /**
