[dpdk-dev] [PATCH 13/18] net/qede/base: enable control frame filtering

[Mody, Rasesh]

Enable control frame filtering for non-trusted VFs.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore_l2.c |5 +
 drivers/net/qede/base/ecore_l2_api.h |5 -
 drivers/net/qede/base/ecore_sriov.c  |4 +++-
 3 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/net/qede/base/ecore_l2.c b/drivers/net/qede/base/ecore_l2.c
index d87ffda..c17082e 100644
--- a/drivers/net/qede/base/ecore_l2.c
+++ b/drivers/net/qede/base/ecore_l2.c
@@ -786,6 +786,11 @@ enum _ecore_status_t
return rc;
}
 
+   if (p_params->update_ctl_frame_check) {
+   p_cmn->ctl_frame_mac_check_en = p_params->mac_chk_en;
+   p_cmn->ctl_frame_ethtype_check_en = p_params->ethtype_chk_en;
+   }
+
/* Update mcast bins for VFs, PF doesn't use this functionality */
ecore_sp_update_mcast_bin(p_ramrod, p_params);
 
diff --git a/drivers/net/qede/base/ecore_l2_api.h 
b/drivers/net/qede/base/ecore_l2_api.h
index 21595f3..004fb61 100644
--- a/drivers/net/qede/base/ecore_l2_api.h
+++ b/drivers/net/qede/base/ecore_l2_api.h
@@ -347,7 +347,10 @@ struct ecore_sp_vport_update_params {
/* MTU change - notice this requires the vport to be disabled.
 * If non-zero, value would be used.
 */
-   u16 mtu;
+   u16 mtu;
+   u8  update_ctl_frame_check;
+   u8  mac_chk_en;
+   u8  ethtype_chk_en;
 };
 
 /**
diff --git a/drivers/net/qede/base/ecore_sriov.c 
b/drivers/net/qede/base/ecore_sriov.c
index 9da4e41..3ac1085 100644
--- a/drivers/net/qede/base/ecore_sriov.c
+++ b/drivers/net/qede/base/ecore_sriov.c
@@ -2158,7 +2158,9 @@ static void ecore_iov_vf_mbx_start_vport(struct 
ecore_hwfn *p_hwfn,
params.vport_id = vf->vport_id;
params.max_buffers_per_cqe = start->max_buffers_per_cqe;
params.mtu = vf->mtu;
-   params.check_mac = true;
+
+   /* Non trusted VFs should enable control frame filtering */
+   params.check_mac = !vf->p_vf_info.is_trusted_configured;
 
rc = ecore_sp_eth_vport_start(p_hwfn, ¶ms);
if (rc != ECORE_SUCCESS) {
-- 
1.7.10.3

[dpdk-dev] [PATCH 06/18] net/qede/base: add mf-bit/API for FIP special mode

[Mody, Rasesh]

Add mf-bit/API for FIP special mode.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore.h |3 +++
 drivers/net/qede/base/ecore_dev.c |8 +++-
 drivers/net/qede/base/ecore_dev_api.h |9 +
 3 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index 4607a80..b9f5993 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -543,6 +543,9 @@ enum ecore_mf_mode_bit {
 
/* Use stag for steering */
ECORE_MF_8021AD_TAGGING,
+
+   /* Allow FIP discovery fallback */
+   ECORE_MF_FIP_SPECIAL,
 };
 
 enum ecore_ufp_mode {
diff --git a/drivers/net/qede/base/ecore_dev.c 
b/drivers/net/qede/base/ecore_dev.c
index 4558306..da312b4 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -3704,7 +3704,8 @@ static enum _ecore_status_t ecore_hw_get_resc(struct 
ecore_hwfn *p_hwfn,
case NVM_CFG1_GLOB_MF_MODE_BD:
p_hwfn->p_dev->mf_bits = 1 << ECORE_MF_OVLAN_CLSS |
 1 << ECORE_MF_LLH_PROTO_CLSS |
-1 << ECORE_MF_8021AD_TAGGING;
+1 << ECORE_MF_8021AD_TAGGING |
+1 << ECORE_MF_FIP_SPECIAL;
break;
case NVM_CFG1_GLOB_MF_MODE_NPAR1_0:
p_hwfn->p_dev->mf_bits = 1 << ECORE_MF_LLH_MAC_CLSS |
@@ -5804,3 +5805,8 @@ void ecore_set_fw_mac_addr(__le16 *fw_msb,
((u8 *)fw_lsb)[0] = mac[5];
((u8 *)fw_lsb)[1] = mac[4];
 }
+
+bool ecore_is_mf_fip_special(struct ecore_dev *p_dev)
+{
+   return !!OSAL_TEST_BIT(ECORE_MF_FIP_SPECIAL, &p_dev->mf_bits);
+}
diff --git a/drivers/net/qede/base/ecore_dev_api.h 
b/drivers/net/qede/base/ecore_dev_api.h
index 7cba54c..ab80b52 100644
--- a/drivers/net/qede/base/ecore_dev_api.h
+++ b/drivers/net/qede/base/ecore_dev_api.h
@@ -704,4 +704,13 @@ enum _ecore_status_t
 enum _ecore_status_t ecore_pglueb_set_pfid_enable(struct ecore_hwfn *p_hwfn,
  struct ecore_ptt *p_ptt,
  bool b_enable);
+
+/**
+ * @brief Whether FIP discovery fallback special mode is enabled or not.
+ *
+ * @param cdev
+ *
+ * @return true if device is in FIP special mode, false otherwise.
+ */
+bool ecore_is_mf_fip_special(struct ecore_dev *p_dev);
 #endif
-- 
1.7.10.3

[dpdk-dev] [PATCH 05/18] net/qede/base: add API to update FW RSS indirection table

[Mody, Rasesh]

Added ecore_update_eth_rss_ind_table_entry() api to update FW RSS
indirection table entry according to new interface of FW 8.37.x.x.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore_l2.c |   52 ++
 drivers/net/qede/base/ecore_l2_api.h |   24 
 2 files changed, 76 insertions(+)

diff --git a/drivers/net/qede/base/ecore_l2.c b/drivers/net/qede/base/ecore_l2.c
index ec40aac..d87ffda 100644
--- a/drivers/net/qede/base/ecore_l2.c
+++ b/drivers/net/qede/base/ecore_l2.c
@@ -2323,3 +2323,55 @@ enum _ecore_status_t
return ecore_init_vport_rl(p_hwfn, p_ptt, vport, rate,
   p_link->speed);
 }
+
+#define RSS_TSTORM_UPDATE_STATUS_MAX_POLL_COUNT100
+#define RSS_TSTORM_UPDATE_STATUS_POLL_PERIOD_US1
+
+enum _ecore_status_t
+ecore_update_eth_rss_ind_table_entry(struct ecore_hwfn *p_hwfn,
+u8 vport_id,
+u8 ind_table_index,
+u16 ind_table_value)
+{
+   struct eth_tstorm_rss_update_data update_data = { 0 };
+   void OSAL_IOMEM *addr = OSAL_NULL;
+   enum _ecore_status_t rc;
+   u8 abs_vport_id;
+   u32 cnt = 0;
+
+   OSAL_BUILD_BUG_ON(sizeof(update_data) != sizeof(u64));
+
+   rc = ecore_fw_vport(p_hwfn, vport_id, &abs_vport_id);
+   if (rc != ECORE_SUCCESS)
+   return rc;
+
+   addr = (u8 OSAL_IOMEM *)p_hwfn->regview +
+  GTT_BAR0_MAP_REG_TSDM_RAM +
+  TSTORM_ETH_RSS_UPDATE_OFFSET(p_hwfn->rel_pf_id);
+
+   *(u64 *)(&update_data) = DIRECT_REG_RD64(p_hwfn, addr);
+
+   for (cnt = 0; update_data.valid &&
+cnt < RSS_TSTORM_UPDATE_STATUS_MAX_POLL_COUNT; cnt++) {
+   OSAL_UDELAY(RSS_TSTORM_UPDATE_STATUS_POLL_PERIOD_US);
+   *(u64 *)(&update_data) = DIRECT_REG_RD64(p_hwfn, addr);
+   }
+
+   if (update_data.valid) {
+   DP_NOTICE(p_hwfn, true,
+ "rss update valid status is not clear! valid=0x%x 
vport id=%d ind_Table_idx=%d ind_table_value=%d.\n",
+ update_data.valid, vport_id, ind_table_index,
+ ind_table_value);
+
+   return ECORE_AGAIN;
+   }
+
+   update_data.valid   = 1;
+   update_data.ind_table_index = ind_table_index;
+   update_data.ind_table_value = ind_table_value;
+   update_data.vport_id= abs_vport_id;
+
+   DIRECT_REG_WR64(p_hwfn, addr, *(u64 *)(&update_data));
+
+   return ECORE_SUCCESS;
+}
diff --git a/drivers/net/qede/base/ecore_l2_api.h 
b/drivers/net/qede/base/ecore_l2_api.h
index bde825c..21595f3 100644
--- a/drivers/net/qede/base/ecore_l2_api.h
+++ b/drivers/net/qede/base/ecore_l2_api.h
@@ -470,4 +470,28 @@ enum _ecore_status_t
  dma_addr_t p_addr, u16 length,
  u16 qid, u8 vport_id,
  bool b_is_add);
+
+/**
+ * @brief - ecore_update_eth_rss_ind_table_entry
+ *
+ * This function being used to update RSS indirection table entry to FW RAM
+ * instead of using the SP vport update ramrod with rss params.
+ *
+ * Notice:
+ * This function supports only one outstanding command per engine. Ecore
+ * clients which use this function should call ecore_mcp_ind_table_lock() prior
+ * to it and ecore_mcp_ind_table_unlock() after it.
+ *
+ * @params p_hwfn
+ * @params vport_id
+ * @params ind_table_index
+ * @params ind_table_value
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t
+ecore_update_eth_rss_ind_table_entry(struct ecore_hwfn *p_hwfn,
+u8 vport_id,
+u8 ind_table_index,
+u16 ind_table_value);
 #endif
-- 
1.7.10.3

[dpdk-dev] [PATCH 18/18] net/qede: bump PMD version to 2.10.0.1

[Mody, Rasesh]

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/qede_ethdev.h |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h
index 8a9df98..622bd01 100644
--- a/drivers/net/qede/qede_ethdev.h
+++ b/drivers/net/qede/qede_ethdev.h
@@ -44,7 +44,7 @@
 /* Driver versions */
 #define QEDE_PMD_VER_PREFIX"QEDE PMD"
 #define QEDE_PMD_VERSION_MAJOR 2
-#define QEDE_PMD_VERSION_MINOR 9
+#define QEDE_PMD_VERSION_MINOR 10
 #define QEDE_PMD_VERSION_REVISION   0
 #define QEDE_PMD_VERSION_PATCH 1
 
-- 
1.7.10.3

[dpdk-dev] [PATCH 14/18] net/qede/base: changes for 100G

[Mody, Rasesh]

Change details:

 - Get engine affinity from the management FW and configure accordingly
 - Add an LLH filter with the primary MAC address in QPAR/NPAR
 - Move some of the LLH APIs around
 - Add PPFID APIs
 - Update all allocated ppfids with the same value for the
   following PORT_PF registers:
   NIG_REG_DSCP_TO_TC_MAP_ENABLE
 - Add port_id, src_pfid and dst_pfid to DMA engine params

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore.h  |   49 +-
 drivers/net/qede/base/ecore_cxt.c  |4 +-
 drivers/net/qede/base/ecore_dcbx.c |   11 +-
 drivers/net/qede/base/ecore_dev.c  | 1740 +++-
 drivers/net/qede/base/ecore_dev_api.h  |  161 ++-
 drivers/net/qede/base/ecore_hw.c   |  103 +-
 drivers/net/qede/base/ecore_hw.h   |   28 +-
 drivers/net/qede/base/ecore_init_ops.c |   14 +-
 drivers/net/qede/base/ecore_int.c  |   13 +-
 drivers/net/qede/base/ecore_l2.c   |6 +-
 drivers/net/qede/base/ecore_mcp.c  |   69 ++
 drivers/net/qede/base/ecore_mcp.h  |   21 +-
 drivers/net/qede/base/ecore_sriov.c|4 +-
 drivers/net/qede/base/mcp_public.h |   15 +
 drivers/net/qede/base/reg_addr.h   |4 +
 15 files changed, 1684 insertions(+), 558 deletions(-)

diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index b9f5993..524a1dd 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -19,6 +19,7 @@
 #include 
 #endif
 
+#include "ecore_status.h"
 #include "ecore_hsi_common.h"
 #include "ecore_hsi_debug_tools.h"
 #include "ecore_hsi_init_func.h"
@@ -207,6 +208,7 @@ enum DP_MODULE {
 struct ecore_igu_info;
 struct ecore_mcp_info;
 struct ecore_dcbx_info;
+struct ecore_llh_info;
 
 struct ecore_rt_data {
u32 *init_val;
@@ -743,6 +745,7 @@ struct ecore_dev {
 #endif
 #define ECORE_IS_AH(dev)   ((dev)->type == ECORE_DEV_TYPE_AH)
 #define ECORE_IS_K2(dev)   ECORE_IS_AH(dev)
+#define ECORE_IS_E4(dev)   (ECORE_IS_BB(dev) || ECORE_IS_AH(dev))
 
u16 vendor_id;
u16 device_id;
@@ -837,8 +840,26 @@ struct ecore_dev {
/* HW functions */
u8  num_hwfns;
struct ecore_hwfn   hwfns[MAX_HWFNS_PER_DEVICE];
+#define ECORE_LEADING_HWFN(dev)(&dev->hwfns[0])
 #define ECORE_IS_CMT(dev)  ((dev)->num_hwfns > 1)
 
+   /* Engine affinity */
+   u8  l2_affin_hint;
+   u8  fir_affin;
+   u8  iwarp_affin;
+   /* Macro for getting the engine-affinitized hwfn for FCoE/iSCSI/RoCE */
+#define ECORE_FIR_AFFIN_HWFN(dev)  (&dev->hwfns[dev->fir_affin])
+   /* Macro for getting the engine-affinitized hwfn for iWARP */
+#define ECORE_IWARP_AFFIN_HWFN(dev)(&dev->hwfns[dev->iwarp_affin])
+   /* Generic macro for getting the engine-affinitized hwfn */
+#define ECORE_AFFIN_HWFN(dev) \
+   (ECORE_IS_IWARP_PERSONALITY(ECORE_LEADING_HWFN(dev)) ? \
+ECORE_IWARP_AFFIN_HWFN(dev) : \
+ECORE_FIR_AFFIN_HWFN(dev))
+   /* Macro for getting the index (0/1) of the engine-affinitized hwfn */
+#define ECORE_AFFIN_HWFN_IDX(dev) \
+   (IS_LEAD_HWFN(ECORE_AFFIN_HWFN(dev)) ? 0 : 1)
+
/* SRIOV */
struct ecore_hw_sriov_info  *p_iov_info;
 #define IS_ECORE_SRIOV(p_dev)  (!!(p_dev)->p_iov_info)
@@ -873,6 +894,9 @@ struct ecore_dev {
 #ifndef ASIC_ONLY
boolb_is_emul_full;
 #endif
+   /* LLH info */
+   u8  ppfid_bitmap;
+   struct ecore_llh_info   *p_llh_info;
 
/* Indicates whether this PF serves a storage target */
boolb_is_target;
@@ -974,6 +998,29 @@ void ecore_db_recovery_execute(struct ecore_hwfn *p_hwfn,
 u16 ecore_init_qm_get_num_vports(struct ecore_hwfn *p_hwfn);
 u16 ecore_init_qm_get_num_pqs(struct ecore_hwfn *p_hwfn);
 
-#define ECORE_LEADING_HWFN(dev)(&dev->hwfns[0])
+#define MFW_PORT(_p_hwfn)  ((_p_hwfn)->abs_pf_id % \
+ecore_device_num_ports((_p_hwfn)->p_dev))
+
+/* The PFID<->PPFID calculation is based on the relative index of a PF on its
+ * port. In BB there is a bug in the LLH in which the PPFID is actually engine
+ * based, and thus it equals the PFID.
+ */
+#define ECORE_PFID_BY_PPFID(_p_hwfn, abs_ppfid) \
+   (ECORE_IS_BB((_p_hwfn)->p_dev) ? \
+(abs_ppfid) : \
+(abs_ppfid) * (_p_hwfn)->p_dev->num_ports_in_engine + \
+MFW_PORT(_p_hwfn))
+#define ECORE_PPFID_BY_PFID(_p_hwfn) \
+   (ECORE_IS_BB((_p_hwfn)->p_dev) ? \
+(_p_hwfn)->rel_pf_id : \
+(_p_hwfn)->rel_pf_id / (_p_hwfn)->p_dev->num_ports_in_engine)
+
+enum _ecore_status_t ecore_all_ppfids_wr(struct ecore_hwfn *p_hwfn,
+struct ecore_ptt *p_ptt, u32 addr,
+u32 val);
+
+/* Utili

[dpdk-dev] [PATCH 15/18] net/qede/base: add RL update params

[Mody, Rasesh]

Add 'rl_bc_stage_th','rl_timer_stage_th' and 'dcqcn_reset_alpha_on_idle'
to RL update param as well as logs.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore_sp_commands.c |8 +++-
 drivers/net/qede/base/ecore_sp_commands.h |3 +++
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/net/qede/base/ecore_sp_commands.c 
b/drivers/net/qede/base/ecore_sp_commands.c
index b43baf9..49a5ff5 100644
--- a/drivers/net/qede/base/ecore_sp_commands.c
+++ b/drivers/net/qede/base/ecore_sp_commands.c
@@ -515,6 +515,10 @@ enum _ecore_status_t ecore_sp_rl_update(struct ecore_hwfn 
*p_hwfn,
rl_update->rl_id_first = params->rl_id_first;
rl_update->rl_id_last = params->rl_id_last;
rl_update->rl_dc_qcn_flg = params->rl_dc_qcn_flg;
+   rl_update->dcqcn_reset_alpha_on_idle =
+   params->dcqcn_reset_alpha_on_idle;
+   rl_update->rl_bc_stage_th = params->rl_bc_stage_th;
+   rl_update->rl_timer_stage_th = params->rl_timer_stage_th;
rl_update->rl_bc_rate = OSAL_CPU_TO_LE32(params->rl_bc_rate);
rl_update->rl_max_rate =
OSAL_CPU_TO_LE16(ecore_sp_rl_mb_to_qm(params->rl_max_rate));
@@ -529,12 +533,14 @@ enum _ecore_status_t ecore_sp_rl_update(struct ecore_hwfn 
*p_hwfn,
OSAL_CPU_TO_LE32(params->dcqcn_timeuot_us);
rl_update->qcn_timeuot_us = OSAL_CPU_TO_LE32(params->qcn_timeuot_us);
 
-   DP_VERBOSE(p_hwfn, ECORE_MSG_SPQ, "rl_params: qcn_update_param_flg %x, 
dcqcn_update_param_flg %x, rl_init_flg %x, rl_start_flg %x, rl_stop_flg %x, 
rl_id_first %x, rl_id_last %x, rl_dc_qcn_flg %x, rl_bc_rate %x, rl_max_rate %x, 
rl_r_ai %x, rl_r_hai %x, dcqcn_g %x, dcqcn_k_us %x, dcqcn_timeuot_us %x, 
qcn_timeuot_us %x\n",
+   DP_VERBOSE(p_hwfn, ECORE_MSG_SPQ, "rl_params: qcn_update_param_flg %x, 
dcqcn_update_param_flg %x, rl_init_flg %x, rl_start_flg %x, rl_stop_flg %x, 
rl_id_first %x, rl_id_last %x, rl_dc_qcn_flg %x,dcqcn_reset_alpha_on_idle %x, 
rl_bc_stage_th %x, rl_timer_stage_th %x, rl_bc_rate %x, rl_max_rate %x, rl_r_ai 
%x, rl_r_hai %x, dcqcn_g %x, dcqcn_k_us %x, dcqcn_timeuot_us %x, qcn_timeuot_us 
%x\n",
   rl_update->qcn_update_param_flg,
   rl_update->dcqcn_update_param_flg,
   rl_update->rl_init_flg, rl_update->rl_start_flg,
   rl_update->rl_stop_flg, rl_update->rl_id_first,
   rl_update->rl_id_last, rl_update->rl_dc_qcn_flg,
+  rl_update->dcqcn_reset_alpha_on_idle,
+  rl_update->rl_bc_stage_th, rl_update->rl_timer_stage_th,
   rl_update->rl_bc_rate, rl_update->rl_max_rate,
   rl_update->rl_r_ai, rl_update->rl_r_hai,
   rl_update->dcqcn_g, rl_update->dcqcn_k_us,
diff --git a/drivers/net/qede/base/ecore_sp_commands.h 
b/drivers/net/qede/base/ecore_sp_commands.h
index e57414c..524fe57 100644
--- a/drivers/net/qede/base/ecore_sp_commands.h
+++ b/drivers/net/qede/base/ecore_sp_commands.h
@@ -119,6 +119,9 @@ struct ecore_rl_update_params {
u8 rl_stop_flg;
u8 rl_id_first;
u8 rl_id_last;
+   u8 dcqcn_reset_alpha_on_idle;
+   u8 rl_bc_stage_th;
+   u8 rl_timer_stage_th;
u8 rl_dc_qcn_flg; /* If set, RL will used for DCQCN */
u32 rl_bc_rate; /* Byte Counter Limit */
u32 rl_max_rate; /* Maximum rate in Mbps resolution */
-- 
1.7.10.3

[dpdk-dev] [PATCH 07/18] net/qede/base: add error handling for mutex allocation

[Mody, Rasesh]

Add error handling for mutex allocation failure

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore_cxt.c |   11 +++
 drivers/net/qede/base/ecore_vf.c  |   19 ++-
 2 files changed, 25 insertions(+), 5 deletions(-)

diff --git a/drivers/net/qede/base/ecore_cxt.c 
b/drivers/net/qede/base/ecore_cxt.c
index bf36ce5..6bc6348 100644
--- a/drivers/net/qede/base/ecore_cxt.c
+++ b/drivers/net/qede/base/ecore_cxt.c
@@ -1133,6 +1133,9 @@ enum _ecore_status_t ecore_cxt_mngr_alloc(struct 
ecore_hwfn *p_hwfn)
return ECORE_NOMEM;
}
 
+   /* Set the cxt mangr pointer prior to further allocations */
+   p_hwfn->p_cxt_mngr = p_mngr;
+
/* Initialize ILT client registers */
clients = p_mngr->clients;
clients[ILT_CLI_CDUC].first.reg = ILT_CFG_REG(CDUC, FIRST_ILT);
@@ -1174,13 +1177,13 @@ enum _ecore_status_t ecore_cxt_mngr_alloc(struct 
ecore_hwfn *p_hwfn)
 
/* Initialize the dynamic ILT allocation mutex */
 #ifdef CONFIG_ECORE_LOCK_ALLOC
-   OSAL_MUTEX_ALLOC(p_hwfn, &p_mngr->mutex);
+   if (OSAL_MUTEX_ALLOC(p_hwfn, &p_mngr->mutex)) {
+   DP_NOTICE(p_hwfn, false, "Failed to alloc p_mngr->mutex\n");
+   return ECORE_NOMEM;
+   }
 #endif
OSAL_MUTEX_INIT(&p_mngr->mutex);
 
-   /* Set the cxt mangr pointer priori to further allocations */
-   p_hwfn->p_cxt_mngr = p_mngr;
-
return ECORE_SUCCESS;
 }
 
diff --git a/drivers/net/qede/base/ecore_vf.c b/drivers/net/qede/base/ecore_vf.c
index d2213f7..409b301 100644
--- a/drivers/net/qede/base/ecore_vf.c
+++ b/drivers/net/qede/base/ecore_vf.c
@@ -565,13 +565,20 @@ enum _ecore_status_t ecore_vf_hw_prepare(struct 
ecore_hwfn *p_hwfn)
   phys,
   p_iov->bulletin.
   size);
+   if (!p_iov->bulletin.p_virt) {
+   DP_NOTICE(p_hwfn, false, "Failed to alloc bulletin memory\n");
+   goto free_pf2vf_reply;
+   }
DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
   "VF's bulletin Board [%p virt 0x%lx phys 0x%08x bytes]\n",
   p_iov->bulletin.p_virt, (unsigned long)p_iov->bulletin.phys,
   p_iov->bulletin.size);
 
 #ifdef CONFIG_ECORE_LOCK_ALLOC
-   OSAL_MUTEX_ALLOC(p_hwfn, &p_iov->mutex);
+   if (OSAL_MUTEX_ALLOC(p_hwfn, &p_iov->mutex)) {
+   DP_NOTICE(p_hwfn, false, "Failed to allocate p_iov->mutex\n");
+   goto free_bulletin_mem;
+   }
 #endif
OSAL_MUTEX_INIT(&p_iov->mutex);
 
@@ -609,6 +616,16 @@ enum _ecore_status_t ecore_vf_hw_prepare(struct ecore_hwfn 
*p_hwfn)
 
return rc;
 
+#ifdef CONFIG_ECORE_LOCK_ALLOC
+free_bulletin_mem:
+   OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_iov->bulletin.p_virt,
+  p_iov->bulletin.phys,
+  p_iov->bulletin.size);
+#endif
+free_pf2vf_reply:
+   OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_iov->pf2vf_reply,
+  p_iov->pf2vf_reply_phys,
+  sizeof(union pfvf_tlvs));
 free_vf2pf_request:
OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_iov->vf2pf_request,
   p_iov->vf2pf_request_phys,
-- 
1.7.10.3

[dpdk-dev] [PATCH 16/18] net/qede/base: add APIs for dscp priority map configuration

[Mody, Rasesh]

Add APIs for dscp priority map configuration. APIs added are
ecore_dcbx_get_dscp_priority(), ecore_dcbx_set_dscp_priority().
These base driver APIs can be used for dscp-map query/config.

Configure the doorbell queue (DORQ) to use vlan-id/priority.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore_dcbx.c |   85 +++-
 drivers/net/qede/base/ecore_dcbx_api.h |   10 
 drivers/net/qede/base/reg_addr.h   |1 +
 3 files changed, 85 insertions(+), 11 deletions(-)

diff --git a/drivers/net/qede/base/ecore_dcbx.c 
b/drivers/net/qede/base/ecore_dcbx.c
index 7668ad6..7981c42 100644
--- a/drivers/net/qede/base/ecore_dcbx.c
+++ b/drivers/net/qede/base/ecore_dcbx.c
@@ -129,7 +129,7 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn, u8 
pri)
 
 static void
 ecore_dcbx_set_params(struct ecore_dcbx_results *p_data,
- struct ecore_hwfn *p_hwfn,
+ struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
  bool enable, u8 prio, u8 tc,
  enum dcbx_protocol_type type,
  enum ecore_pci_personality personality)
@@ -154,12 +154,19 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn, 
u8 pri)
/* QM reconf data */
if (p_hwfn->hw_info.personality == personality)
p_hwfn->hw_info.offload_tc = tc;
+
+   /* Configure dcbx vlan priority in doorbell block for roce EDPM */
+   if (OSAL_TEST_BIT(ECORE_MF_UFP_SPECIFIC, &p_hwfn->p_dev->mf_bits) &&
+   (type == DCBX_PROTOCOL_ROCE)) {
+   ecore_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1);
+   ecore_wr(p_hwfn, p_ptt, DORQ_REG_PF_PCP_BB_K2, prio << 1);
+   }
 }
 
 /* Update app protocol data and hw_info fields with the TLV info */
 static void
 ecore_dcbx_update_app_info(struct ecore_dcbx_results *p_data,
-  struct ecore_hwfn *p_hwfn,
+  struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
   bool enable, u8 prio, u8 tc,
   enum dcbx_protocol_type type)
 {
@@ -175,7 +182,7 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn, u8 
pri)
 
personality = ecore_dcbx_app_update[i].personality;
 
-   ecore_dcbx_set_params(p_data, p_hwfn, enable,
+   ecore_dcbx_set_params(p_data, p_hwfn, p_ptt, enable,
  prio, tc, type, personality);
}
 }
@@ -231,7 +238,7 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn, u8 
pri)
  * reconfiguring QM. Get protocol specific data for PF update ramrod command.
  */
 static enum _ecore_status_t
-ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn,
+ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
   struct ecore_dcbx_results *p_data,
   struct dcbx_app_priority_entry *p_tbl, u32 pri_tc_tbl,
   int count, u8 dcbx_version)
@@ -280,8 +287,8 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn, u8 
pri)
enable = true;
}
 
-   ecore_dcbx_update_app_info(p_data, p_hwfn, enable,
-  priority, tc, type);
+   ecore_dcbx_update_app_info(p_data, p_hwfn, p_ptt,
+  enable, priority, tc, type);
}
}
 
@@ -302,8 +309,8 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn, u8 
pri)
if (p_data->arr[type].update)
continue;
 
-   enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version;
-   ecore_dcbx_update_app_info(p_data, p_hwfn, enable,
+   /* if no app tlv was present, don't override in FW */
+   ecore_dcbx_update_app_info(p_data, p_hwfn, p_ptt, false,
   priority, tc, type);
}
 
@@ -314,7 +321,7 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn, u8 
pri)
  * reconfiguring QM. Get protocol specific data for PF update ramrod command.
  */
 static enum _ecore_status_t
-ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn)
+ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
 {
struct dcbx_app_priority_feature *p_app;
struct dcbx_app_priority_entry *p_tbl;
@@ -338,7 +345,7 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn, u8 
pri)
p_info = &p_hwfn->hw_info;
num_entries = GET_MFW_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
 
-   rc = ecore_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl,
+   rc = ecore_dcbx_process_tlv(p_hwfn, p_ptt, &data, p_tbl, pri_tc_tbl,
num_entries, dcbx_version);
if (rc != ECORE_SUCCESS)
return rc;
@@ -879,7 +886,7 @@ enum _ecore_status_t
if (type == EC

[dpdk-dev] [PATCH 17/18] net/qede/base: semantic changes

[Mody, Rasesh]

This patch consists of semantic/formatting changes.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore_dcbx.c |3 ++-
 drivers/net/qede/base/ecore_init_ops.c |   12 -
 drivers/net/qede/base/ecore_int.c  |3 ++-
 drivers/net/qede/base/ecore_int_api.h  |3 ++-
 drivers/net/qede/base/ecore_l2.c   |   16 ++--
 drivers/net/qede/base/ecore_mcp.c  |   11 
 drivers/net/qede/base/ecore_spq.c  |   44 ++--
 drivers/net/qede/base/ecore_sriov.c|   12 +
 8 files changed, 58 insertions(+), 46 deletions(-)

diff --git a/drivers/net/qede/base/ecore_dcbx.c 
b/drivers/net/qede/base/ecore_dcbx.c
index 7981c42..cbc69cd 100644
--- a/drivers/net/qede/base/ecore_dcbx.c
+++ b/drivers/net/qede/base/ecore_dcbx.c
@@ -325,7 +325,7 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn, u8 
pri)
 {
struct dcbx_app_priority_feature *p_app;
struct dcbx_app_priority_entry *p_tbl;
-   struct ecore_dcbx_results data = { 0 };
+   struct ecore_dcbx_results data;
struct dcbx_ets_feature *p_ets;
struct ecore_hw_info *p_info;
u32 pri_tc_tbl, flags;
@@ -345,6 +345,7 @@ u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn, u8 
pri)
p_info = &p_hwfn->hw_info;
num_entries = GET_MFW_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
 
+   OSAL_MEMSET(&data, 0, sizeof(struct ecore_dcbx_results));
rc = ecore_dcbx_process_tlv(p_hwfn, p_ptt, &data, p_tbl, pri_tc_tbl,
num_entries, dcbx_version);
if (rc != ECORE_SUCCESS)
diff --git a/drivers/net/qede/base/ecore_init_ops.c 
b/drivers/net/qede/base/ecore_init_ops.c
index 47c1be2..044308b 100644
--- a/drivers/net/qede/base/ecore_init_ops.c
+++ b/drivers/net/qede/base/ecore_init_ops.c
@@ -420,11 +420,11 @@ static u8 ecore_init_cmd_mode_match(struct ecore_hwfn 
*p_hwfn,
u16 *p_offset, int modes)
 {
struct ecore_dev *p_dev = p_hwfn->p_dev;
-   const u8 *modes_tree_buf;
u8 arg1, arg2, tree_val;
+   const u8 *modes_tree;
 
-   modes_tree_buf = p_dev->fw_data->modes_tree_buf;
-   tree_val = modes_tree_buf[(*p_offset)++];
+   modes_tree = p_dev->fw_data->modes_tree_buf;
+   tree_val = modes_tree[(*p_offset)++];
switch (tree_val) {
case INIT_MODE_OP_NOT:
return ecore_init_cmd_mode_match(p_hwfn, p_offset, modes) ^ 1;
@@ -474,12 +474,12 @@ enum _ecore_status_t ecore_init_run(struct ecore_hwfn 
*p_hwfn,
 {
struct ecore_dev *p_dev = p_hwfn->p_dev;
u32 cmd_num, num_init_ops;
-   union init_op *init_ops;
+   union init_op *init;
bool b_dmae = false;
enum _ecore_status_t rc = ECORE_SUCCESS;
 
num_init_ops = p_dev->fw_data->init_ops_size;
-   init_ops = p_dev->fw_data->init_ops;
+   init = p_dev->fw_data->init_ops;
 
 #ifdef CONFIG_ECORE_ZIPPED_FW
p_hwfn->unzip_buf = OSAL_ZALLOC(p_hwfn->p_dev, GFP_ATOMIC,
@@ -491,7 +491,7 @@ enum _ecore_status_t ecore_init_run(struct ecore_hwfn 
*p_hwfn,
 #endif
 
for (cmd_num = 0; cmd_num < num_init_ops; cmd_num++) {
-   union init_op *cmd = &init_ops[cmd_num];
+   union init_op *cmd = &init[cmd_num];
u32 data = OSAL_LE32_TO_CPU(cmd->raw.op_data);
 
switch (GET_FIELD(data, INIT_CALLBACK_OP_OP)) {
diff --git a/drivers/net/qede/base/ecore_int.c 
b/drivers/net/qede/base/ecore_int.c
index e48a7bc..7368d55 100644
--- a/drivers/net/qede/base/ecore_int.c
+++ b/drivers/net/qede/base/ecore_int.c
@@ -1224,8 +1224,9 @@ static enum _ecore_status_t ecore_int_attentions(struct 
ecore_hwfn *p_hwfn)
 static void ecore_sb_ack_attn(struct ecore_hwfn *p_hwfn,
  void OSAL_IOMEM *igu_addr, u32 ack_cons)
 {
-   struct igu_prod_cons_update igu_ack = { 0 };
+   struct igu_prod_cons_update igu_ack;
 
+   OSAL_MEMSET(&igu_ack, 0, sizeof(struct igu_prod_cons_update));
igu_ack.sb_id_and_flags =
((ack_cons << IGU_PROD_CONS_UPDATE_SB_INDEX_SHIFT) |
 (1 << IGU_PROD_CONS_UPDATE_UPDATE_FLAG_SHIFT) |
diff --git a/drivers/net/qede/base/ecore_int_api.h 
b/drivers/net/qede/base/ecore_int_api.h
index 5b9c31d..42538a4 100644
--- a/drivers/net/qede/base/ecore_int_api.h
+++ b/drivers/net/qede/base/ecore_int_api.h
@@ -92,8 +92,9 @@ static OSAL_INLINE u16 ecore_sb_update_sb_idx(struct 
ecore_sb_info *sb_info)
 static OSAL_INLINE void ecore_sb_ack(struct ecore_sb_info *sb_info,
 enum igu_int_cmd int_cmd, u8 upd_flg)
 {
-   struct igu_prod_cons_update igu_ack = { 0 };
+   struct igu_prod_cons_update igu_ack;
 
+   OSAL_MEMSET(&igu_ack, 0, sizeof(struct igu_prod_cons_update));
igu_ack.sb_id_and_flags =
((sb_info->sb_ack << IGU_PROD_CONS_UPDATE_SB_INDEX_SHIFT) |
 (upd_flg << IGU_PROD_CONS_UPDATE_UPDATE_FLAG_SHIFT) |
diff --git a/drivers/ne

[dpdk-dev] [PATCH 01/18] net/qede/base: upgrade to FW 8.37.7.0

[Mody, Rasesh]

This patch adds changes to base driver for upgrading to 8.37.3.0 FW.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/bcm_osal.h  |1 +
 drivers/net/qede/base/common_hsi.h|   15 +-
 drivers/net/qede/base/ecore.h |5 +-
 drivers/net/qede/base/ecore_dev.c |   16 +-
 drivers/net/qede/base/ecore_hsi_common.h  |   57 +-
 drivers/net/qede/base/ecore_hsi_debug_tools.h |   15 ++
 drivers/net/qede/base/ecore_hsi_eth.h |   57 +-
 drivers/net/qede/base/ecore_init_fw_funcs.c   |   93 +
 drivers/net/qede/base/ecore_init_fw_funcs.h   |   42 ++--
 drivers/net/qede/base/ecore_iro.h |  164 +--
 drivers/net/qede/base/ecore_iro_values.h  |   42 ++--
 drivers/net/qede/base/ecore_l2.c  |3 +
 drivers/net/qede/base/ecore_l2_api.h  |1 +
 drivers/net/qede/base/ecore_rt_defs.h |  265 -
 drivers/net/qede/base/eth_common.h|5 +
 drivers/net/qede/base/reg_addr.h  |   51 ++---
 drivers/net/qede/qede_main.c  |2 +-
 17 files changed, 523 insertions(+), 311 deletions(-)

diff --git a/drivers/net/qede/base/bcm_osal.h b/drivers/net/qede/base/bcm_osal.h
index b43e0b3..70805f6 100644
--- a/drivers/net/qede/base/bcm_osal.h
+++ b/drivers/net/qede/base/bcm_osal.h
@@ -453,5 +453,6 @@ void qede_get_mcp_proto_stats(struct ecore_dev *, enum 
ecore_mcp_protocol_type,
 
 #define OSAL_DIV_S64(a, b) ((a) / (b))
 #define OSAL_LLDP_RX_TLVS(p_hwfn, tlv_buf, tlv_size) nothing
+#define OSAL_DBG_ALLOC_USER_DATA(p_hwfn, user_data_ptr) (0)
 
 #endif /* __BCM_OSAL_H */
diff --git a/drivers/net/qede/base/common_hsi.h 
b/drivers/net/qede/base/common_hsi.h
index ca8e59d..2aaf298 100644
--- a/drivers/net/qede/base/common_hsi.h
+++ b/drivers/net/qede/base/common_hsi.h
@@ -95,8 +95,8 @@
 
 
 #define FW_MAJOR_VERSION8
-#define FW_MINOR_VERSION33
-#define FW_REVISION_VERSION 12
+#define FW_MINOR_VERSION37
+#define FW_REVISION_VERSION 7
 #define FW_ENGINEERING_VERSION  0
 
 /***/
@@ -1033,13 +1033,14 @@ struct db_rdma_dpm_params {
 #define DB_RDMA_DPM_PARAMS_WQE_SIZE_SHIFT   16
 #define DB_RDMA_DPM_PARAMS_RESERVED0_MASK   0x1
 #define DB_RDMA_DPM_PARAMS_RESERVED0_SHIFT  27
-/* RoCE completion flag */
-#define DB_RDMA_DPM_PARAMS_COMPLETION_FLG_MASK  0x1
-#define DB_RDMA_DPM_PARAMS_COMPLETION_FLG_SHIFT 28
+/* RoCE ack request (will be set 1) */
+#define DB_RDMA_DPM_PARAMS_ACK_REQUEST_MASK 0x1
+#define DB_RDMA_DPM_PARAMS_ACK_REQUEST_SHIFT28
 #define DB_RDMA_DPM_PARAMS_S_FLG_MASK   0x1 /* RoCE S flag */
 #define DB_RDMA_DPM_PARAMS_S_FLG_SHIFT  29
-#define DB_RDMA_DPM_PARAMS_RESERVED1_MASK   0x1
-#define DB_RDMA_DPM_PARAMS_RESERVED1_SHIFT  30
+/* RoCE completion flag for FW use */
+#define DB_RDMA_DPM_PARAMS_COMPLETION_FLG_MASK  0x1
+#define DB_RDMA_DPM_PARAMS_COMPLETION_FLG_SHIFT 30
 /* Connection type is iWARP */
 #define DB_RDMA_DPM_PARAMS_CONN_TYPE_IS_IWARP_MASK  0x1
 #define DB_RDMA_DPM_PARAMS_CONN_TYPE_IS_IWARP_SHIFT 31
diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index cf66c4c..8982214 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -27,8 +27,8 @@
 #include "mcp_public.h"
 
 #define ECORE_MAJOR_VERSION8
-#define ECORE_MINOR_VERSION30
-#define ECORE_REVISION_VERSION 8
+#define ECORE_MINOR_VERSION37
+#define ECORE_REVISION_VERSION 20
 #define ECORE_ENGINEERING_VERSION  0
 
 #define ECORE_VERSION  \
@@ -660,6 +660,7 @@ struct ecore_hwfn {
 #endif
 
struct dbg_tools_data   dbg_info;
+   void*dbg_user_info;
 
struct z_stream_s   *stream;
 
diff --git a/drivers/net/qede/base/ecore_dev.c 
b/drivers/net/qede/base/ecore_dev.c
index d91fe27..b83f003 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -456,6 +456,12 @@ static void ecore_qm_info_free(struct ecore_hwfn *p_hwfn)
OSAL_FREE(p_hwfn->p_dev, qm_info->wfq_data);
 }
 
+static void ecore_dbg_user_data_free(struct ecore_hwfn *p_hwfn)
+{
+   OSAL_FREE(p_hwfn->p_dev, p_hwfn->dbg_user_info);
+   p_hwfn->dbg_user_info = OSAL_NULL;
+}
+
 void ecore_resc_free(struct ecore_dev *p_dev)
 {
int i;
@@ -483,6 +489,7 @@ void ecore_resc_free(struct ecore_dev *p_dev)
ecore_l2_free(p_hwfn);
ecore_dmae_info_free(p_hwfn);
ecore_dcbx_info_free(p_hwfn);
+   ecore_dbg_user_data_free(p_hwfn);
/* @@@TBD Flush work-queue ? */
 
/* destroy doorbell recovery mechanism */
@@ -1334,7 +1341,14 @@ enum _ecore_status_t ecore_resc_alloc(struct ecore_dev 
*p_dev)
  "Fail

Re: [dpdk-dev] [PATCH v2] net/i40e: select fdir config automatically

[Xing, Beilei]

> -Original Message-
> From: Li, Xiaoyun
> Sent: Friday, September 28, 2018 7:03 PM
> To: Xing, Beilei ; Zhang, Qi Z ;
> Yigit, Ferruh 
> Cc: dev@dpdk.org; Li, Xiaoyun 
> Subject: [PATCH v2] net/i40e: select fdir config automatically
> 
> I40e driver needed users to config exact fdir mode to create rte_flow rules
> but it shouldn't. This patch allows users to create rte_flow rules without
> configuring fdir mode and let the driver select the config automatically. And
> remove the workaround in flow_filtering example.
> 
> Signed-off-by: Xiaoyun Li 
> ---
> v2:
>  * Added fdir teardown in i40e_flow_flush_fdir_filter.
>  * Replace TAILQ_FIRST with TAILQ_EMPTY which is more intuitive.
>  * Remove the workaround in flow_filtering example since the driver will
>  * set the fdir config automatically.
> ---
>  drivers/net/i40e/i40e_flow.c   | 35 +-
>  examples/flow_filtering/main.c | 16 
>  2 files changed, 30 insertions(+), 21 deletions(-)
> 
> diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c index
> c67b264de..68ae00a27 100644
> --- a/drivers/net/i40e/i40e_flow.c
> +++ b/drivers/net/i40e/i40e_flow.c
> @@ -3127,6 +3127,7 @@ i40e_flow_parse_fdir_filter(struct rte_eth_dev
> *dev,
>   struct rte_flow_error *error,
>   union i40e_filter_t *filter)
>  {
> + struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data-
> >dev_private);
>   struct i40e_fdir_filter_conf *fdir_filter =
>   &filter->fdir_filter;
>   int ret;
> @@ -3148,14 +3149,29 @@ i40e_flow_parse_fdir_filter(struct rte_eth_dev
> *dev,
> 
>   if (dev->data->dev_conf.fdir_conf.mode !=
>   RTE_FDIR_MODE_PERFECT) {
> - rte_flow_error_set(error, ENOTSUP,
> -RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
> -NULL,
> -"Check the mode in fdir_conf.");
> - return -rte_errno;
> + /* Enable fdir when fdir flow is added at first time. */
> + ret = i40e_fdir_setup(pf);
> + if (ret != I40E_SUCCESS) {
> + rte_flow_error_set(error, ENOTSUP,
> +RTE_FLOW_ERROR_TYPE_HANDLE,
> +NULL, "Failed to setup fdir.");
> + return -rte_errno;
> + }
> + ret = i40e_fdir_configure(dev);
> + if (ret < 0) {
> + rte_flow_error_set(error, ENOTSUP,
> +RTE_FLOW_ERROR_TYPE_HANDLE,
> +NULL, "Failed to configure fdir.");
> + goto err;
> + }
> +
> + dev->data->dev_conf.fdir_conf.mode =
> RTE_FDIR_MODE_PERFECT;
>   }
> 
>   return 0;
> +err:
> + i40e_fdir_teardown(pf);
> + return -rte_errno;
>  }
> 
>  /* Parse to get the action info of a tunnel filter @@ -4708,6 +4724,13 @@
> i40e_flow_destroy(struct rte_eth_dev *dev,
>   case RTE_ETH_FILTER_FDIR:
>   ret = i40e_flow_add_del_fdir_filter(dev,
>  &((struct i40e_fdir_filter *)flow->rule)->fdir, 0);
> +
> + /* If the last flow is destroyed, disable fdir. */
> + if (!ret && !TAILQ_EMPTY(&pf->fdir.fdir_list)) {

Should be if (!ret && TAILQ_EMPTY(&pf->fdir.fdir_list)) here?

> + i40e_fdir_teardown(pf);
> + dev->data->dev_conf.fdir_conf.mode =
> +RTE_FDIR_MODE_NONE;
> + }
>   break;
>   case RTE_ETH_FILTER_HASH:
>   ret = i40e_config_rss_filter_del(dev, @@ -4900,6 +4923,8
> @@ i40e_flow_flush_fdir_filter(struct i40e_pf *pf)
>   pf->fdir.inset_flag[pctype] = 0;
>   }
> 
> + i40e_fdir_teardown(pf);
> +
>   return ret;
>  }
> 
> diff --git a/examples/flow_filtering/main.c b/examples/flow_filtering/main.c
> index b3f85b563..a73d120e3 100644
> --- a/examples/flow_filtering/main.c
> +++ b/examples/flow_filtering/main.c
> @@ -131,22 +131,6 @@ init_port(void)
>   DEV_TX_OFFLOAD_SCTP_CKSUM  |
>   DEV_TX_OFFLOAD_TCP_TSO,
>   },
> - /*
> -  * Initialize fdir_conf of rte_eth_conf.
> -  * Fdir is used in flow filtering for I40e,
> -  * so rte_flow rules involve some fdir
> -  * configurations. In long term it's better
> -  * that drivers don't require any fdir
> -  * configuration for rte_flow, but we need to
> -  * get this workaround so that sample app can
> -  * run on I40e.
> -  */
> - .fdir_conf = {
> - .mode = RTE_FDIR_MODE_PERFECT,
> - .pballoc = RTE_FDIR_PBALLOC_64K,
> - .status = RTE_FDIR_REPORT_S

Re: [dpdk-dev] [PATCH v2] net/i40e: select fdir config automatically

[Li, Xiaoyun]

> -Original Message-
> From: Xing, Beilei
> Sent: Saturday, September 29, 2018 16:37
> To: Li, Xiaoyun ; Zhang, Qi Z ;
> Yigit, Ferruh 
> Cc: dev@dpdk.org
> Subject: RE: [PATCH v2] net/i40e: select fdir config automatically
> 
> 
> 
> > -Original Message-
> > From: Li, Xiaoyun
> > Sent: Friday, September 28, 2018 7:03 PM
> > To: Xing, Beilei ; Zhang, Qi Z
> > ; Yigit, Ferruh 
> > Cc: dev@dpdk.org; Li, Xiaoyun 
> > Subject: [PATCH v2] net/i40e: select fdir config automatically
> >
> > I40e driver needed users to config exact fdir mode to create rte_flow
> > rules but it shouldn't. This patch allows users to create rte_flow
> > rules without configuring fdir mode and let the driver select the
> > config automatically. And remove the workaround in flow_filtering
> example.
> >
> > Signed-off-by: Xiaoyun Li 
> > ---
> > v2:
> >  * Added fdir teardown in i40e_flow_flush_fdir_filter.
> >  * Replace TAILQ_FIRST with TAILQ_EMPTY which is more intuitive.
> >  * Remove the workaround in flow_filtering example since the driver
> > will
> >  * set the fdir config automatically.
> > +
> > +   /* If the last flow is destroyed, disable fdir. */
> > +   if (!ret && !TAILQ_EMPTY(&pf->fdir.fdir_list)) {
> 
> Should be if (!ret && TAILQ_EMPTY(&pf->fdir.fdir_list)) here?

Yes. Sorry about that. Will correct it.

> 
> > --
> > 2.17.1

[dpdk-dev] [PATCH v3] net/i40e: select fdir config automatically

[Xiaoyun Li]

I40e driver needed users to config exact fdir mode to create rte_flow
rules but it shouldn't. This patch allows users to create rte_flow rules
without configuring fdir mode and let the driver select the config
automatically. And remove the workaround in flow_filtering example.

Signed-off-by: Xiaoyun Li 
---
v3:
 * Fixed fdir config doesn't automatically remove when last flow is
 * destroyed.
v2:
 * Added fdir teardown in i40e_flow_flush_fdir_filter.
 * Replace TAILQ_FIRST with TAILQ_EMPTY which is more intuitive.
 * Remove the workaround in flow_filtering example since the driver will
 * set the fdir config automatically.
---
 drivers/net/i40e/i40e_flow.c   | 35 +-
 examples/flow_filtering/main.c | 16 
 2 files changed, 30 insertions(+), 21 deletions(-)

diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
index 6487596da..d811b3891 100644
--- a/drivers/net/i40e/i40e_flow.c
+++ b/drivers/net/i40e/i40e_flow.c
@@ -3127,6 +3127,7 @@ i40e_flow_parse_fdir_filter(struct rte_eth_dev *dev,
struct rte_flow_error *error,
union i40e_filter_t *filter)
 {
+   struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
struct i40e_fdir_filter_conf *fdir_filter =
&filter->fdir_filter;
int ret;
@@ -3148,14 +3149,29 @@ i40e_flow_parse_fdir_filter(struct rte_eth_dev *dev,
 
if (dev->data->dev_conf.fdir_conf.mode !=
RTE_FDIR_MODE_PERFECT) {
-   rte_flow_error_set(error, ENOTSUP,
-  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
-  NULL,
-  "Check the mode in fdir_conf.");
-   return -rte_errno;
+   /* Enable fdir when fdir flow is added at first time. */
+   ret = i40e_fdir_setup(pf);
+   if (ret != I40E_SUCCESS) {
+   rte_flow_error_set(error, ENOTSUP,
+  RTE_FLOW_ERROR_TYPE_HANDLE,
+  NULL, "Failed to setup fdir.");
+   return -rte_errno;
+   }
+   ret = i40e_fdir_configure(dev);
+   if (ret < 0) {
+   rte_flow_error_set(error, ENOTSUP,
+  RTE_FLOW_ERROR_TYPE_HANDLE,
+  NULL, "Failed to configure fdir.");
+   goto err;
+   }
+
+   dev->data->dev_conf.fdir_conf.mode = RTE_FDIR_MODE_PERFECT;
}
 
return 0;
+err:
+   i40e_fdir_teardown(pf);
+   return -rte_errno;
 }
 
 /* Parse to get the action info of a tunnel filter
@@ -4708,6 +4724,13 @@ i40e_flow_destroy(struct rte_eth_dev *dev,
case RTE_ETH_FILTER_FDIR:
ret = i40e_flow_add_del_fdir_filter(dev,
   &((struct i40e_fdir_filter *)flow->rule)->fdir, 0);
+
+   /* If the last flow is destroyed, disable fdir. */
+   if (!ret && TAILQ_EMPTY(&pf->fdir.fdir_list)) {
+   i40e_fdir_teardown(pf);
+   dev->data->dev_conf.fdir_conf.mode =
+  RTE_FDIR_MODE_NONE;
+   }
break;
case RTE_ETH_FILTER_HASH:
ret = i40e_config_rss_filter_del(dev,
@@ -4900,6 +4923,8 @@ i40e_flow_flush_fdir_filter(struct i40e_pf *pf)
pf->fdir.inset_flag[pctype] = 0;
}
 
+   i40e_fdir_teardown(pf);
+
return ret;
 }
 
diff --git a/examples/flow_filtering/main.c b/examples/flow_filtering/main.c
index b3f85b563..a73d120e3 100644
--- a/examples/flow_filtering/main.c
+++ b/examples/flow_filtering/main.c
@@ -131,22 +131,6 @@ init_port(void)
DEV_TX_OFFLOAD_SCTP_CKSUM  |
DEV_TX_OFFLOAD_TCP_TSO,
},
-   /*
-* Initialize fdir_conf of rte_eth_conf.
-* Fdir is used in flow filtering for I40e,
-* so rte_flow rules involve some fdir
-* configurations. In long term it's better
-* that drivers don't require any fdir
-* configuration for rte_flow, but we need to
-* get this workaround so that sample app can
-* run on I40e.
-*/
-   .fdir_conf = {
-   .mode = RTE_FDIR_MODE_PERFECT,
-   .pballoc = RTE_FDIR_PBALLOC_64K,
-   .status = RTE_FDIR_REPORT_STATUS,
-   .drop_queue = 127,
-   },
};
struct rte_eth_txconf txq_conf;
struct rte_eth_rxconf rxq_conf;
-- 
2.17.1

Re: [dpdk-dev] [PATCH v2] net/mlx5: support metadata as flow rule criteria

[Yongseok Koh]

On Thu, Sep 27, 2018 at 05:18:55PM +0300, Dekel Peled wrote:
> As described in series starting at [1], it adds option to set
> metadata value as match pattern when creating a new flow rule.
> 
> This patch adds metadata support in mlx5 driver, in two parts:
> - Add the setting of metadata value in matcher when creating
>   a new flow rule.
> - Add the passing of metadata value from mbuf to wqe when
>   indicated by ol_flag, in different burst functions.
> 
> [1] "ethdev: support metadata as flow rule criteria"
> http://mails.dpdk.org/archives/dev/2018-September/113270.html
>   
> Signed-off-by: Dekel Peled 
> ---
> V2:
> Split the support of egress rules to a different patch.
> ---
>  drivers/net/mlx5/mlx5_flow.c  |  2 +-
>  drivers/net/mlx5/mlx5_flow.h  |  8 +++
>  drivers/net/mlx5/mlx5_flow_dv.c   | 96 
> +++
>  drivers/net/mlx5/mlx5_prm.h   |  2 +-
>  drivers/net/mlx5/mlx5_rxtx.c  | 35 +++--
>  drivers/net/mlx5/mlx5_rxtx_vec.c  | 31 ---
>  drivers/net/mlx5/mlx5_rxtx_vec.h  |  1 +
>  drivers/net/mlx5/mlx5_rxtx_vec_neon.h |  4 +-
>  drivers/net/mlx5/mlx5_rxtx_vec_sse.h  |  4 +-
>  drivers/net/mlx5/mlx5_txq.c   |  6 +++
>  10 files changed, 174 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
> index 8007bf1..9581691 100644
> --- a/drivers/net/mlx5/mlx5_flow.c
> +++ b/drivers/net/mlx5/mlx5_flow.c
> @@ -417,7 +417,7 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev 
> *dev, int32_t priority,
>   * @return
>   *   0 on success, a negative errno value otherwise and rte_errno is set.
>   */
> -static int
> +int
>  mlx5_flow_item_acceptable(const struct rte_flow_item *item,
> const uint8_t *mask,
> const uint8_t *nic_mask,
> diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
> index 10d700a..d91ae17 100644
> --- a/drivers/net/mlx5/mlx5_flow.h
> +++ b/drivers/net/mlx5/mlx5_flow.h
> @@ -42,6 +42,9 @@
>  #define MLX5_FLOW_LAYER_GRE (1u << 14)
>  #define MLX5_FLOW_LAYER_MPLS (1u << 15)
>  
> +/* General pattern items bits. */
> +#define MLX5_FLOW_ITEM_METADATA (1u << 16)
> +
>  /* Outer Masks. */
>  #define MLX5_FLOW_LAYER_OUTER_L3 \
>   (MLX5_FLOW_LAYER_OUTER_L3_IPV4 | MLX5_FLOW_LAYER_OUTER_L3_IPV6)
> @@ -299,6 +302,11 @@ int mlx5_flow_validate_action_rss(const struct 
> rte_flow_action *action,
>  int mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
> const struct rte_flow_attr *attributes,
> struct rte_flow_error *error);
> +int mlx5_flow_item_acceptable(const struct rte_flow_item *item,
> +   const uint8_t *mask,
> +   const uint8_t *nic_mask,
> +   unsigned int size,
> +   struct rte_flow_error *error);
>  int mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
>   uint64_t item_flags,
>   struct rte_flow_error *error);
> diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
> index cf663cd..2439f5e 100644
> --- a/drivers/net/mlx5/mlx5_flow_dv.c
> +++ b/drivers/net/mlx5/mlx5_flow_dv.c
> @@ -36,6 +36,55 @@
>  #ifdef HAVE_IBV_FLOW_DV_SUPPORT
>  
>  /**
> + * Validate META item.
> + *
> + * @param[in] item
> + *   Item specification.
> + * @param[in] attr
> + *   Attributes of flow that includes this item.
> + * @param[out] error
> + *   Pointer to error structure.
> + *
> + * @return
> + *   0 on success, a negative errno value otherwise and rte_errno is set.
> + */
> +static int
> +mlx5_flow_validate_item_meta(const struct rte_flow_item *item,

Naming rule here is starting from flow_dv_*() for static funcs. For global
funcs, it should start from mlx5_, so it should be mlx5_flow_dv_*().

Or, you can put it in the mlx5_flow.c as a common helper function although it is
used only by DV.

I prefer the latter.

> + const struct rte_flow_attr *attr,
> + struct rte_flow_error *error)
> +{
> + const struct rte_flow_item_meta *spec = item->spec;
> + const struct rte_flow_item_meta *mask = item->mask;
> +
> + const struct rte_flow_item_meta nic_mask = {
> + .data = RTE_BE32(UINT32_MAX)
> + };
> +
> + int ret;
> +
> + if (!spec)
> + return rte_flow_error_set(error, EINVAL,
> +   RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
> +   item->spec,
> +   "data cannot be empty");
> + if (!mask)
> + mask = &rte_flow_item_meta_mask;
> + ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
> + (const uint8_t *)&nic_mask,
> + sizeof(struct rte_flow_item_meta),
> 

Re: [dpdk-dev] [PATCH] net/mlx5: allow flow rule with attribute egress

[Yongseok Koh]

On Thu, Sep 27, 2018 at 05:25:30PM +0300, Dekel Peled wrote:
> This patch complements [1], adding to MLX5 PMD the option to set
> flow rule for egress traffic.
> 
> [1] "net/mlx5: support metadata as flow rule criteria"
> http://mails.dpdk.org/archives/dev/2018-September/113275.html
>   
> Signed-off-by: Dekel Peled 
> ---
>  drivers/net/mlx5/mlx5_flow.c   | 54 
> ++
>  drivers/net/mlx5/mlx5_flow.h   |  6 +
>  drivers/net/mlx5/mlx5_flow_dv.c| 24 ++---
>  drivers/net/mlx5/mlx5_flow_verbs.c |  7 -
>  4 files changed, 80 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
> index 9581691..79a06df 100644
> --- a/drivers/net/mlx5/mlx5_flow.c
> +++ b/drivers/net/mlx5/mlx5_flow.c
> @@ -644,6 +644,8 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev 
> *dev, int32_t priority,
>   *
>   * @param[in] action_flags
>   *   Bit-fields that holds the actions detected until now.
> + * @param[in] attr
> + *   Attributes of flow that includes this action.
>   * @param[out] error
>   *   Pointer to error structure.
>   *
> @@ -652,6 +654,7 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev 
> *dev, int32_t priority,
>   */
>  int
>  mlx5_flow_validate_action_flag(uint64_t action_flags,
> +const struct rte_flow_attr *attr,
>  struct rte_flow_error *error)
>  {
>  
> @@ -668,6 +671,12 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev 
> *dev, int32_t priority,
> RTE_FLOW_ERROR_TYPE_ACTION, NULL,
> "can't have 2 flag"
> " actions in same flow");
> + if (attr->egress)
> + return rte_flow_error_set(error, ENOTSUP,
> +   RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
> +   NULL,

These two lines could be one line.

> +   "flag action not supported for "
> +   "egress");
>   return 0;
>  }
>  
> @@ -678,6 +687,8 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev 
> *dev, int32_t priority,
>   *   Pointer to the queue action.
>   * @param[in] action_flags
>   *   Bit-fields that holds the actions detected until now.
> + * @param[in] attr
> + *   Attributes of flow that includes this action.
>   * @param[out] error
>   *   Pointer to error structure.
>   *
> @@ -687,6 +698,7 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev 
> *dev, int32_t priority,
>  int
>  mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
>  uint64_t action_flags,
> +const struct rte_flow_attr *attr,
>  struct rte_flow_error *error)
>  {
>   const struct rte_flow_action_mark *mark = action->conf;
> @@ -715,6 +727,12 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev 
> *dev, int32_t priority,
> RTE_FLOW_ERROR_TYPE_ACTION, NULL,
> "can't have 2 flag actions in same"
> " flow");
> + if (attr->egress)
> + return rte_flow_error_set(error, ENOTSUP,
> +   RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
> +   NULL,

Ditto. There are a few more occurrences below.

> +   "mark action not supported for "
> +   "egress");
>   return 0;
>  }
>  
> @@ -723,6 +741,8 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev 
> *dev, int32_t priority,
>   *
>   * @param[in] action_flags
>   *   Bit-fields that holds the actions detected until now.
> + * @param[in] attr
> + *   Attributes of flow that includes this action.
>   * @param[out] error
>   *   Pointer to error structure.
>   *
> @@ -731,6 +751,7 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev 
> *dev, int32_t priority,
>   */
>  int
>  mlx5_flow_validate_action_drop(uint64_t action_flags,
> +const struct rte_flow_attr *attr,
>  struct rte_flow_error *error)
>  {
>   if (action_flags & MLX5_ACTION_FLAG)
> @@ -747,6 +768,12 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev 
> *dev, int32_t priority,
> RTE_FLOW_ERROR_TYPE_ACTION, NULL,
> "can't have 2 fate actions in"
> " same flow");
> + if (attr->egress)
> + return rte_flow_error_set(error, ENOTSUP,
> +   RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
> +   NULL,
> +   "drop action not supported for "
> + 

[dpdk-dev] [PATCH v3 00/22] net/atlantic: Aquantia aQtion 10G NIC Family DPDK PMD driver

[Igor Russkikh]

Hello DPDK community!

Aquantia would like to contribute PMD for aQtion AQC10X NIC family:
https://www.aquantia.com/products/aqtion/chips/
These are 10G ethernet NICs with various features.

We do base this work on parts of the existing native linux kernel
driver source (atlantic). Shared code is hw_atl hardware and registers access 
module.

We'd like to target this driver for 18.11 DPDK release timeline,
it'd be good to hear comments from the community on how feasible is this.

This patchset implements basic driver infrastructure,
vlan offloads, checksumm offloads, rss control,
multiring, jumbo frames and other features.

Later on, we plan to share HW MACSEC offloads, rxflows and other features.

version 3 changes:
- patchset fixed to be incrementally buildable
- extra includes removed and cleaned up
- license changed to dual GPL-BSD for pieces shared with linux
- removed extra logging #defines
- misc comments from previous review session

version 2 changes:
- fixed build on freebsd (no ETIME const)
- fixed a bunch of checkpatch failures and warnings
- removed extra CFLAGS disabled warning
- making static arrays const

Igor Russkikh (9):
  net/atlantic: logging macroes and some typedefs
  net/atlantic: hardware register access routines
  net/atlantic: hw_atl register declarations
  net/atlantic: firmware operations layer
  net/atlantic: b0 hardware layer main logic
  net/atlantic: RX side structures and implementation
  net/atlantic: RSS and RETA manipulation API
  net/atlantic: LED control DPDK and private APIs
  net/atlantic: documentation and rel notes

Pavel Belous (13):
  net/atlantic: atlantic PMD driver skeleton
  net/atlantic: rte device start, stop, initial configuration
  net/atlantic: TX/RX function prototypes
  net/atlantic: TX side structures and implementation
  net/atlantic: link status and interrupt management
  net/atlantic: device statistics, xstats
  net/atlantic: support for RX/TX descriptors information
  net/atlantic: promisc and allmulti configuration
  net/atlantic: flow control configuration
  net/atlantic: MAC address manipulations
  net/atlantic: VLAN filters and offloads
  net/atlantic: eeprom and register manipulation routines
  net/atlantic: support for read MAC registers for debug purposes

 config/common_base|5 +
 doc/guides/nics/atlantic.rst  |   53 +
 doc/guides/nics/features/atlantic.ini |   37 +
 doc/guides/nics/index.rst |1 +
 doc/guides/rel_notes/release_18_11.rst|5 +
 drivers/net/Makefile  |1 +
 drivers/net/atlantic/Makefile |   39 +
 drivers/net/atlantic/atl_common.h |   96 +
 drivers/net/atlantic/atl_ethdev.c | 1688 +++
 drivers/net/atlantic/atl_ethdev.h |  110 +
 drivers/net/atlantic/atl_hw_regs.c|   52 +
 drivers/net/atlantic/atl_hw_regs.h|   53 +
 drivers/net/atlantic/atl_logs.h   |   31 +
 drivers/net/atlantic/atl_rxtx.c   | 1335 
 drivers/net/atlantic/atl_types.h  |  193 ++
 drivers/net/atlantic/hw_atl/hw_atl_b0.c   |  510 +
 drivers/net/atlantic/hw_atl/hw_atl_b0.h   |   40 +
 drivers/net/atlantic/hw_atl/hw_atl_b0_internal.h  |  145 ++
 drivers/net/atlantic/hw_atl/hw_atl_llh.c  | 1490 +
 drivers/net/atlantic/hw_atl/hw_atl_llh.h  |  714 ++
 drivers/net/atlantic/hw_atl/hw_atl_llh_internal.h | 2407 +
 drivers/net/atlantic/hw_atl/hw_atl_utils.c|  942 
 drivers/net/atlantic/hw_atl/hw_atl_utils.h|  510 +
 drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c   |  618 ++
 drivers/net/atlantic/meson.build  |   21 +
 drivers/net/atlantic/rte_pmd_atlantic.c   |   19 +
 drivers/net/atlantic/rte_pmd_atlantic.h   |   44 +
 drivers/net/atlantic/rte_pmd_atlantic_version.map |4 +
 drivers/net/meson.build   |1 +
 mk/rte.app.mk |1 +
 30 files changed, 11165 insertions(+)
 create mode 100644 doc/guides/nics/atlantic.rst
 create mode 100644 doc/guides/nics/features/atlantic.ini
 create mode 100644 drivers/net/atlantic/Makefile
 create mode 100644 drivers/net/atlantic/atl_common.h
 create mode 100644 drivers/net/atlantic/atl_ethdev.c
 create mode 100644 drivers/net/atlantic/atl_ethdev.h
 create mode 100644 drivers/net/atlantic/atl_hw_regs.c
 create mode 100644 drivers/net/atlantic/atl_hw_regs.h
 create mode 100644 drivers/net/atlantic/atl_logs.h
 create mode 100644 drivers/net/atlantic/atl_rxtx.c
 create mode 100644 drivers/net/atlantic/atl_types.h
 create mode 100644 drivers/net/atlantic/hw_atl/hw_atl_b0.c
 create mode 100644 drivers/net/atlantic/hw_atl/hw_atl_b0.h
 create mode 100644 drivers/net/atlantic/hw_atl/hw_atl_b0_internal.h
 create mode 100644 drivers/net/atlant

[dpdk-dev] [PATCH v3 02/22] net/atlantic: logging macroes and some typedefs

[Igor Russkikh]

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/atl_logs.h  | 31 +++
 drivers/net/atlantic/atl_types.h | 31 +++
 2 files changed, 62 insertions(+)
 create mode 100644 drivers/net/atlantic/atl_logs.h
 create mode 100644 drivers/net/atlantic/atl_types.h

diff --git a/drivers/net/atlantic/atl_logs.h b/drivers/net/atlantic/atl_logs.h
new file mode 100644
index ..e3dba334fe92
--- /dev/null
+++ b/drivers/net/atlantic/atl_logs.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Aquantia Corporation
+ */
+#ifndef ATL_LOGS_H
+#define ATL_LOGS_H
+
+#include 
+
+extern int atl_logtype_init;
+
+#define PMD_INIT_LOG(level, fmt, args...) \
+   rte_log(RTE_LOG_ ## level, atl_logtype_init, \
+   "%s(): " fmt "\n", __func__, ##args)
+
+#define PMD_INIT_FUNC_TRACE() PMD_INIT_LOG(DEBUG, " >>")
+
+#define PMD_RX_LOG(level, fmt, args...) \
+   RTE_LOG_DP(level, PMD, "%s(): " fmt "\n", __func__, ## args)
+
+#define PMD_TX_LOG(level, fmt, args...) \
+   RTE_LOG_DP(level, PMD, "%s(): " fmt "\n", __func__, ## args)
+
+extern int atl_logtype_driver;
+#define PMD_DRV_LOG_RAW(level, fmt, args...) \
+   rte_log(RTE_LOG_ ## level, atl_logtype_driver, "%s(): " fmt, \
+   __func__, ## args)
+
+#define PMD_DRV_LOG(level, fmt, args...) \
+   PMD_DRV_LOG_RAW(level, fmt "\n", ## args)
+
+#endif
diff --git a/drivers/net/atlantic/atl_types.h b/drivers/net/atlantic/atl_types.h
new file mode 100644
index ..5a14c2506477
--- /dev/null
+++ b/drivers/net/atlantic/atl_types.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Aquantia Corporation
+ */
+#ifndef ATL_TYPES_H
+#define ATL_TYPES_H
+
+#include 
+#include 
+#include 
+#include 
+
+typedef uint8_tu8;
+typedef int8_t s8;
+typedef uint16_t   u16;
+typedef int16_ts16;
+typedef uint32_t   u32;
+typedef int32_ts32;
+typedef uint64_t   u64;
+#ifndef __cplusplus
+typedef intbool;
+#endif
+
+#define FALSE   0
+#define TRUE1
+
+#define false   0
+#define true1
+#define min(a, b)  RTE_MIN(a, b)
+#define max(a, b)  RTE_MAX(a, b)
+
+#endif
-- 
2.7.4

[dpdk-dev] [PATCH v3 01/22] net/atlantic: atlantic PMD driver skeleton

[Igor Russkikh]

From: Pavel Belous 

Makefile/meson build infrastructure, atl_ethdev minimal skeleton,
header with aquantia aQtion NIC device and vendor IDs.

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 config/common_base|   5 +
 drivers/net/Makefile  |   1 +
 drivers/net/atlantic/Makefile |  27 
 drivers/net/atlantic/atl_common.h |  96 ++
 drivers/net/atlantic/atl_ethdev.c | 145 ++
 drivers/net/atlantic/atl_ethdev.h |  15 +++
 drivers/net/atlantic/meson.build  |  10 ++
 drivers/net/atlantic/rte_pmd_atlantic_version.map |   4 +
 drivers/net/meson.build   |   1 +
 mk/rte.app.mk |   1 +
 10 files changed, 305 insertions(+)
 create mode 100644 drivers/net/atlantic/Makefile
 create mode 100644 drivers/net/atlantic/atl_common.h
 create mode 100644 drivers/net/atlantic/atl_ethdev.c
 create mode 100644 drivers/net/atlantic/atl_ethdev.h
 create mode 100644 drivers/net/atlantic/meson.build
 create mode 100644 drivers/net/atlantic/rte_pmd_atlantic_version.map

diff --git a/config/common_base b/config/common_base
index 155c7d40ea31..ba51ffbd43ce 100644
--- a/config/common_base
+++ b/config/common_base
@@ -635,6 +635,11 @@ CONFIG_RTE_LIBRTE_PMD_DPAA_EVENTDEV=n
 CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=n
 
 #
+# Compile Aquantia Atlantic PMD driver
+#
+CONFIG_RTE_LIBRTE_ATLANTIC_PMD=y
+
+#
 # Compile raw device support
 # EXPERIMENTAL: API may change without prior notice
 #
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 664398de983a..8ac6b9db5916 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -10,6 +10,7 @@ endif
 
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_AF_PACKET) += af_packet
 DIRS-$(CONFIG_RTE_LIBRTE_ARK_PMD) += ark
+DIRS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += atlantic
 DIRS-$(CONFIG_RTE_LIBRTE_AVF_PMD) += avf
 DIRS-$(CONFIG_RTE_LIBRTE_AVP_PMD) += avp
 DIRS-$(CONFIG_RTE_LIBRTE_AXGBE_PMD) += axgbe
diff --git a/drivers/net/atlantic/Makefile b/drivers/net/atlantic/Makefile
new file mode 100644
index ..e42ce5b178ab
--- /dev/null
+++ b/drivers/net/atlantic/Makefile
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2018 Aquantia Corporation
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+#
+# library name
+#
+LIB = librte_pmd_atlantic.a
+
+CFLAGS += -O3
+CFLAGS += $(WERROR_FLAGS)
+
+EXPORT_MAP := rte_pmd_atlantic_version.map
+
+LIBABIVER := 1
+
+LDLIBS += -lrte_eal
+LDLIBS += -lrte_ethdev -lrte_net
+LDLIBS += -lrte_bus_pci
+
+#
+# all source are stored in SRCS-y
+#
+SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += atl_ethdev.c
+
+include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/net/atlantic/atl_common.h 
b/drivers/net/atlantic/atl_common.h
new file mode 100644
index ..b3a0aa5cd212
--- /dev/null
+++ b/drivers/net/atlantic/atl_common.h
@@ -0,0 +1,96 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Aquantia Corporation
+ */
+
+#ifndef AQ_COMMON_H
+#define AQ_COMMON_H
+
+#define ATL_PMD_DRIVER_VERSION "0.4.1"
+
+#define PCI_VENDOR_ID_AQUANTIA  0x1D6A
+
+#define AQ_DEVICE_ID_0001  0x0001
+#define AQ_DEVICE_ID_D100  0xD100
+#define AQ_DEVICE_ID_D107  0xD107
+#define AQ_DEVICE_ID_D108  0xD108
+#define AQ_DEVICE_ID_D109  0xD109
+
+#define AQ_DEVICE_ID_AQC1000x00B1
+#define AQ_DEVICE_ID_AQC1070x07B1
+#define AQ_DEVICE_ID_AQC1080x08B1
+#define AQ_DEVICE_ID_AQC1090x09B1
+#define AQ_DEVICE_ID_AQC1110x11B1
+#define AQ_DEVICE_ID_AQC1120x12B1
+
+#define AQ_DEVICE_ID_AQC100S   0x80B1
+#define AQ_DEVICE_ID_AQC107S   0x87B1
+#define AQ_DEVICE_ID_AQC108S   0x88B1
+#define AQ_DEVICE_ID_AQC109S   0x89B1
+#define AQ_DEVICE_ID_AQC111S   0x91B1
+#define AQ_DEVICE_ID_AQC112S   0x92B1
+
+#define AQ_DEVICE_ID_AQC111E   0x51B1
+#define AQ_DEVICE_ID_AQC112E   0x52B1
+
+#define HW_ATL_NIC_NAME "aQuantia AQtion 10Gbit Network Adapter"
+
+#define AQ_HWREV_ANY   0
+#define AQ_HWREV_1 1
+#define AQ_HWREV_2 2
+
+#define AQ_NIC_RATE_10GBIT(0)
+#define AQ_NIC_RATE_5G BIT(1)
+#define AQ_NIC_RATE_5G5R   BIT(2)
+#define AQ_NIC_RATE_2G5BIT(3)
+#define AQ_NIC_RATE_1G BIT(4)
+#define AQ_NIC_RATE_100M   BIT(5)
+
+#define AQ_NIC_RATE_EEE_10GBIT(6)
+#define AQ_NIC_RATE_EEE_5G BIT(7)
+#define AQ_NIC_RATE_EEE_2G5BIT(8)
+#define AQ_NIC_RATE_EEE_1G BIT(9)
+
+
+#define ATL_MAX_RING_DESC  (8 * 1024 - 8)
+#define ATL_MIN_RING_DESC  32
+#define ATL_RXD_ALIGN  8
+#define ATL_TXD_ALIGN  8
+#define ATL_TX_MAX_SEG 16
+
+#define ATL_MAX_INTR_QUEUE_NUM  15
+
+#define ATL_MISC_VEC_ID 10
+#define ATL_RX_VEC_START 0
+
+#define AQ_NIC_WOL_ENABLED   BIT(0)
+
+
+#define AQ_NIC_FC_OFF0U
+#define AQ_NIC_FC_TX 1U
+#define AQ_NIC_FC_RX 2U
+#define AQ_NIC_FC_FULL   3U
+#define AQ_NIC_FC_AUTO   4U
+
+
+#defin

[dpdk-dev] [PATCH v3 03/22] net/atlantic: hardware register access routines

[Igor Russkikh]

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/Makefile  |  1 +
 drivers/net/atlantic/atl_hw_regs.c | 52 +
 drivers/net/atlantic/atl_hw_regs.h | 53 ++
 drivers/net/atlantic/atl_types.h   |  4 +++
 drivers/net/atlantic/meson.build   |  1 +
 5 files changed, 111 insertions(+)
 create mode 100644 drivers/net/atlantic/atl_hw_regs.c
 create mode 100644 drivers/net/atlantic/atl_hw_regs.h

diff --git a/drivers/net/atlantic/Makefile b/drivers/net/atlantic/Makefile
index e42ce5b178ab..8613ced71732 100644
--- a/drivers/net/atlantic/Makefile
+++ b/drivers/net/atlantic/Makefile
@@ -23,5 +23,6 @@ LDLIBS += -lrte_bus_pci
 # all source are stored in SRCS-y
 #
 SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += atl_ethdev.c
+SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += atl_hw_regs.c
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/net/atlantic/atl_hw_regs.c 
b/drivers/net/atlantic/atl_hw_regs.c
new file mode 100644
index ..bd42c8341e2b
--- /dev/null
+++ b/drivers/net/atlantic/atl_hw_regs.c
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
+/* Copyright (C) 2014-2017 aQuantia Corporation. */
+
+/* File aq_hw_utils.c: Definitions of helper functions used across
+ * hardware layer.
+ */
+
+#include "atl_hw_regs.h"
+
+#include 
+#include 
+
+void aq_hw_write_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk,
+u32 shift, u32 val)
+{
+   if (msk ^ ~0) {
+   u32 reg_old, reg_new;
+
+   reg_old = aq_hw_read_reg(aq_hw, addr);
+   reg_new = (reg_old & (~msk)) | (val << shift);
+
+   if (reg_old != reg_new)
+   aq_hw_write_reg(aq_hw, addr, reg_new);
+   } else {
+   aq_hw_write_reg(aq_hw, addr, val);
+   }
+}
+
+u32 aq_hw_read_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk, u32 shift)
+{
+   return ((aq_hw_read_reg(aq_hw, addr) & msk) >> shift);
+}
+
+u32 aq_hw_read_reg(struct aq_hw_s *hw, u32 reg)
+{
+   return rte_le_to_cpu_32(rte_read32((u8 *)hw->mmio + reg));
+}
+
+void aq_hw_write_reg(struct aq_hw_s *hw, u32 reg, u32 value)
+{
+   rte_write32((rte_cpu_to_le_32(value)), (u8 *)hw->mmio + reg);
+}
+
+int aq_hw_err_from_flags(struct aq_hw_s *hw)
+{
+   int err = 0;
+
+   if (aq_hw_read_reg(hw, 0x10U) == ~0U)
+   return -ENXIO;
+
+   return err;
+}
diff --git a/drivers/net/atlantic/atl_hw_regs.h 
b/drivers/net/atlantic/atl_hw_regs.h
new file mode 100644
index ..a2d6ca804e5e
--- /dev/null
+++ b/drivers/net/atlantic/atl_hw_regs.h
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0) */
+/* Copyright (C) 2014-2017 aQuantia Corporation. */
+
+/* File aq_hw_utils.h: Declaration of helper functions used across hardware
+ * layer.
+ */
+
+#ifndef AQ_HW_UTILS_H
+#define AQ_HW_UTILS_H
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "atl_common.h"
+#include "atl_types.h"
+
+
+#ifndef HIDWORD
+#define LODWORD(_qw)((u32)(_qw))
+#define HIDWORD(_qw)((u32)(((_qw) >> 32) & 0x))
+#endif
+
+#define AQ_HW_SLEEP(_US_) rte_delay_ms(_US_)
+
+#define mdelay rte_delay_ms
+#define udelay rte_delay_us
+#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
+#define BIT(x) (1UL << (x))
+
+#define AQ_HW_WAIT_FOR(_B_, _US_, _N_) \
+do { \
+   unsigned int AQ_HW_WAIT_FOR_i; \
+   for (AQ_HW_WAIT_FOR_i = _N_; (!(_B_)) && (AQ_HW_WAIT_FOR_i);\
+   --AQ_HW_WAIT_FOR_i) {\
+   udelay(_US_); \
+   } \
+   if (!AQ_HW_WAIT_FOR_i) {\
+   err = -ETIMEDOUT; \
+   } \
+} while (0)
+
+#define ATL_WRITE_FLUSH(aq_hw) { (void)aq_hw_read_reg(aq_hw, 0x10); }
+
+void aq_hw_write_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk,
+u32 shift, u32 val);
+u32 aq_hw_read_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk, u32 shift);
+u32 aq_hw_read_reg(struct aq_hw_s *hw, u32 reg);
+void aq_hw_write_reg(struct aq_hw_s *hw, u32 reg, u32 value);
+int aq_hw_err_from_flags(struct aq_hw_s *hw);
+
+#endif /* AQ_HW_UTILS_H */
diff --git a/drivers/net/atlantic/atl_types.h b/drivers/net/atlantic/atl_types.h
index 5a14c2506477..83fb377add47 100644
--- a/drivers/net/atlantic/atl_types.h
+++ b/drivers/net/atlantic/atl_types.h
@@ -28,4 +28,8 @@ typedef int   bool;
 #define min(a, b)  RTE_MIN(a, b)
 #define max(a, b)  RTE_MAX(a, b)
 
+struct aq_hw_s {
+   void *mmio;
+};
+
 #endif
diff --git a/drivers/net/atlantic/meson.build b/drivers/net/atlantic/meson.build
index 90ee5288206a..7fdde358ba21 100644
--- a/drivers/net/atlantic/meson.build
+++ b/drivers/net/atlantic/meson.build
@@ -3,6 +3,7 @@
 
 sources = files(
'atl_ethdev.c',
+   'atl_hw_regs.c',
 )
 
 deps += ['eal']
-- 
2.7.4

[dpdk-dev] [PATCH v3 05/22] net/atlantic: firmware operations layer

[Igor Russkikh]

AQC NICs comes in fields with two major
FW generations: 1x and 3x.

This is part of linux atlantic driver shared code,
responsible for internal NIC firmware interactions,
including link management ops, FW initialization,
various lifecycle features.

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/Makefile   |   2 +
 drivers/net/atlantic/atl_types.h|  95 +++
 drivers/net/atlantic/hw_atl/hw_atl_utils.c  | 942 
 drivers/net/atlantic/hw_atl/hw_atl_utils.h  | 510 +
 drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c | 618 
 drivers/net/atlantic/meson.build|   2 +
 6 files changed, 2169 insertions(+)
 create mode 100644 drivers/net/atlantic/hw_atl/hw_atl_utils.c
 create mode 100644 drivers/net/atlantic/hw_atl/hw_atl_utils.h
 create mode 100644 drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c

diff --git a/drivers/net/atlantic/Makefile b/drivers/net/atlantic/Makefile
index cae317badc0c..a291053b5ab7 100644
--- a/drivers/net/atlantic/Makefile
+++ b/drivers/net/atlantic/Makefile
@@ -26,6 +26,8 @@ VPATH += $(SRCDIR)/hw_atl
 #
 SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += atl_ethdev.c
 SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += atl_hw_regs.c
+SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += hw_atl_utils.c
 SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += hw_atl_llh.c
+SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += hw_atl_utils_fw2x.c
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/net/atlantic/atl_types.h b/drivers/net/atlantic/atl_types.h
index 83fb377add47..589088a82227 100644
--- a/drivers/net/atlantic/atl_types.h
+++ b/drivers/net/atlantic/atl_types.h
@@ -28,8 +28,103 @@ typedef int bool;
 #define min(a, b)  RTE_MIN(a, b)
 #define max(a, b)  RTE_MAX(a, b)
 
+#include "hw_atl/hw_atl_utils.h"
+
+struct aq_hw_link_status_s {
+   unsigned int mbps;
+};
+
+struct aq_stats_s {
+   u64 uprc;
+   u64 mprc;
+   u64 bprc;
+   u64 erpt;
+   u64 uptc;
+   u64 mptc;
+   u64 bptc;
+   u64 erpr;
+   u64 mbtc;
+   u64 bbtc;
+   u64 mbrc;
+   u64 bbrc;
+   u64 ubrc;
+   u64 ubtc;
+   u64 dpc;
+   u64 dma_pkt_rc;
+   u64 dma_pkt_tc;
+   u64 dma_oct_rc;
+   u64 dma_oct_tc;
+};
+
+struct aq_hw_cfg_s {
+   bool is_lro;
+   int wol;
+
+   int link_speed_msk;
+   int irq_type;
+   int irq_mask;
+   unsigned int vecs;
+
+   uint32_t flow_control;
+};
+
 struct aq_hw_s {
+   u8 rbl_enabled:1;
+   struct aq_hw_cfg_s *aq_nic_cfg;
+   const struct aq_fw_ops *aq_fw_ops;
void *mmio;
+
+   struct aq_hw_link_status_s aq_link_status;
+
+   struct hw_aq_atl_utils_mbox mbox;
+   struct hw_atl_stats_s last_stats;
+   struct aq_stats_s curr_stats;
+
+   unsigned int chip_features;
+   u32 fw_ver_actual;
+   u32 mbox_addr;
+   u32 rpc_addr;
+   u32 rpc_tid;
+   struct hw_aq_atl_utils_fw_rpc rpc;
+};
+
+struct aq_fw_ops {
+   int (*init)(struct aq_hw_s *self);
+
+   int (*deinit)(struct aq_hw_s *self);
+
+   int (*reset)(struct aq_hw_s *self);
+
+   int (*get_mac_permanent)(struct aq_hw_s *self, u8 *mac);
+
+   int (*set_link_speed)(struct aq_hw_s *self, u32 speed);
+
+   int (*set_state)(struct aq_hw_s *self,
+   enum hal_atl_utils_fw_state_e state);
+
+   int (*update_link_status)(struct aq_hw_s *self);
+
+   int (*update_stats)(struct aq_hw_s *self);
+
+   int (*set_power)(struct aq_hw_s *self, unsigned int power_state,
+   u8 *mac);
+
+   int (*get_temp)(struct aq_hw_s *self, int *temp);
+
+   int (*get_cable_len)(struct aq_hw_s *self, int *cable_len);
+
+   int (*set_eee_rate)(struct aq_hw_s *self, u32 speed);
+
+   int (*get_eee_rate)(struct aq_hw_s *self, u32 *rate,
+   u32 *supported_rates);
+
+   int (*set_flow_control)(struct aq_hw_s *self);
+
+   int (*led_control)(struct aq_hw_s *self, u32 mode);
+
+   int (*get_eeprom)(struct aq_hw_s *self, u32 *data, u32 len);
+
+   int (*set_eeprom)(struct aq_hw_s *self, u32 *data, u32 len);
 };
 
 #endif
diff --git a/drivers/net/atlantic/hw_atl/hw_atl_utils.c 
b/drivers/net/atlantic/hw_atl/hw_atl_utils.c
new file mode 100644
index ..f18ce54762dc
--- /dev/null
+++ b/drivers/net/atlantic/hw_atl/hw_atl_utils.c
@@ -0,0 +1,942 @@
+// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
+/* Copyright (C) 2014-2017 aQuantia Corporation. */
+
+/* File hw_atl_utils.c: Definition of common functions for Atlantic hardware
+ * abstraction layer.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "../atl_hw_regs.h"
+
+#include "hw_atl_llh.h"
+#include "hw_atl_llh_internal.h"
+#include "../atl_logs.h"
+
+#define HW_ATL_UCP_0X370_REG0x0370U
+
+#define HW_ATL_MIF_CMD  0x0200U
+#define HW_ATL_MIF_ADDR 0x02

[dpdk-dev] [PATCH v3 06/22] net/atlantic: b0 hardware layer main logic

[Igor Russkikh]

This is hw_atl logic layer derived from linux atlantic
driver. It contains RX/TX hardware initialization
sequences, various hw configuration.

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/Makefile|   1 +
 drivers/net/atlantic/atl_types.h |  14 +
 drivers/net/atlantic/hw_atl/hw_atl_b0.c  | 510 +++
 drivers/net/atlantic/hw_atl/hw_atl_b0.h  |  40 ++
 drivers/net/atlantic/hw_atl/hw_atl_b0_internal.h | 145 +++
 drivers/net/atlantic/meson.build |   1 +
 6 files changed, 711 insertions(+)
 create mode 100644 drivers/net/atlantic/hw_atl/hw_atl_b0.c
 create mode 100644 drivers/net/atlantic/hw_atl/hw_atl_b0.h
 create mode 100644 drivers/net/atlantic/hw_atl/hw_atl_b0_internal.h

diff --git a/drivers/net/atlantic/Makefile b/drivers/net/atlantic/Makefile
index a291053b5ab7..91306d71ba97 100644
--- a/drivers/net/atlantic/Makefile
+++ b/drivers/net/atlantic/Makefile
@@ -29,5 +29,6 @@ SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += atl_hw_regs.c
 SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += hw_atl_utils.c
 SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += hw_atl_llh.c
 SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += hw_atl_utils_fw2x.c
+SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += hw_atl_b0.c
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/net/atlantic/atl_types.h b/drivers/net/atlantic/atl_types.h
index 589088a82227..8185a86e1733 100644
--- a/drivers/net/atlantic/atl_types.h
+++ b/drivers/net/atlantic/atl_types.h
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 
 typedef uint8_tu8;
 typedef int8_t s8;
@@ -28,6 +29,7 @@ typedef int   bool;
 #define min(a, b)  RTE_MIN(a, b)
 #define max(a, b)  RTE_MAX(a, b)
 
+#include "hw_atl/hw_atl_b0_internal.h"
 #include "hw_atl/hw_atl_utils.h"
 
 struct aq_hw_link_status_s {
@@ -56,8 +58,18 @@ struct aq_stats_s {
u64 dma_oct_tc;
 };
 
+struct aq_rss_parameters {
+   u16 base_cpu_number;
+   u16 indirection_table_size;
+   u16 hash_secret_key_size;
+   u32 hash_secret_key[HW_ATL_B0_RSS_HASHKEY_BITS / 8];
+   u8 indirection_table[HW_ATL_B0_RSS_REDIRECTION_MAX];
+};
+
 struct aq_hw_cfg_s {
bool is_lro;
+   bool is_rss;
+   unsigned int num_rss_queues;
int wol;
 
int link_speed_msk;
@@ -66,6 +78,8 @@ struct aq_hw_cfg_s {
unsigned int vecs;
 
uint32_t flow_control;
+
+   struct aq_rss_parameters aq_rss;
 };
 
 struct aq_hw_s {
diff --git a/drivers/net/atlantic/hw_atl/hw_atl_b0.c 
b/drivers/net/atlantic/hw_atl/hw_atl_b0.c
new file mode 100644
index ..9400e0edb999
--- /dev/null
+++ b/drivers/net/atlantic/hw_atl/hw_atl_b0.c
@@ -0,0 +1,510 @@
+// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
+/* Copyright (C) 2014-2017 aQuantia Corporation. */
+
+/* File hw_atl_b0.c: Definition of Atlantic hardware specific functions. */
+
+#include "../atl_types.h"
+#include "hw_atl_b0.h"
+
+#include "../atl_hw_regs.h"
+#include "hw_atl_utils.h"
+#include "hw_atl_llh.h"
+#include "hw_atl_b0_internal.h"
+#include "hw_atl_llh_internal.h"
+#include "../atl_logs.h"
+
+int hw_atl_b0_hw_reset(struct aq_hw_s *self)
+{
+   int err = 0;
+
+   err = hw_atl_utils_soft_reset(self);
+   if (err)
+   return err;
+
+   self->aq_fw_ops->set_state(self, MPI_RESET);
+
+   return err;
+}
+
+static int hw_atl_b0_hw_qos_set(struct aq_hw_s *self)
+{
+   u32 tc = 0U;
+   u32 buff_size = 0U;
+   unsigned int i_priority = 0U;
+   bool is_rx_flow_control = false;
+
+   /* TPS Descriptor rate init */
+   hw_atl_tps_tx_pkt_shed_desc_rate_curr_time_res_set(self, 0x0U);
+   hw_atl_tps_tx_pkt_shed_desc_rate_lim_set(self, 0xA);
+
+   /* TPS VM init */
+   hw_atl_tps_tx_pkt_shed_desc_vm_arb_mode_set(self, 0U);
+
+   /* TPS TC credits init */
+   hw_atl_tps_tx_pkt_shed_desc_tc_arb_mode_set(self, 0U);
+   hw_atl_tps_tx_pkt_shed_data_arb_mode_set(self, 0U);
+
+   hw_atl_tps_tx_pkt_shed_tc_data_max_credit_set(self, 0xFFF, 0U);
+   hw_atl_tps_tx_pkt_shed_tc_data_weight_set(self, 0x64, 0U);
+   hw_atl_tps_tx_pkt_shed_desc_tc_max_credit_set(self, 0x50, 0U);
+   hw_atl_tps_tx_pkt_shed_desc_tc_weight_set(self, 0x1E, 0U);
+
+   /* Tx buf size */
+   buff_size = HW_ATL_B0_TXBUF_MAX;
+
+   hw_atl_tpb_tx_pkt_buff_size_per_tc_set(self, buff_size, tc);
+   hw_atl_tpb_tx_buff_hi_threshold_per_tc_set(self,
+  (buff_size *
+  (1024 / 32U) * 66U) /
+  100U, tc);
+   hw_atl_tpb_tx_buff_lo_threshold_per_tc_set(self,
+  (buff_size *
+  (1024 / 32U) * 50U) /
+  100U, tc);
+
+   /* QoS Rx buf size per TC *

[dpdk-dev] [PATCH v3 07/22] net/atlantic: rte device start, stop, initial configuration

[Igor Russkikh]

From: Pavel Belous 

Start, stop and reset are all done via hw_atl layer.
Link interrupt configuration is also done here.

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/atl_ethdev.c | 196 --
 drivers/net/atlantic/atl_ethdev.h |   8 ++
 drivers/net/atlantic/atl_types.h  |   4 +
 3 files changed, 201 insertions(+), 7 deletions(-)

diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index 5728d9037d72..afb2972ffcc2 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -6,6 +6,11 @@
 
 #include "atl_ethdev.h"
 #include "atl_common.h"
+#include "atl_hw_regs.h"
+#include "atl_logs.h"
+#include "hw_atl/hw_atl_llh.h"
+#include "hw_atl/hw_atl_b0.h"
+#include "hw_atl/hw_atl_b0_internal.h"
 
 static int eth_atl_dev_init(struct rte_eth_dev *eth_dev);
 static int eth_atl_dev_uninit(struct rte_eth_dev *eth_dev);
@@ -16,6 +21,13 @@ static void atl_dev_stop(struct rte_eth_dev *dev);
 static void atl_dev_close(struct rte_eth_dev *dev);
 static int  atl_dev_reset(struct rte_eth_dev *dev);
 
+static int atl_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
+ size_t fw_size);
+
+static void atl_dev_info_get(struct rte_eth_dev *dev,
+  struct rte_eth_dev_info *dev_info);
+
+
 static int eth_atl_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
struct rte_pci_device *pci_dev);
 static int eth_atl_pci_remove(struct rte_pci_device *pci_dev);
@@ -66,17 +78,103 @@ static const struct eth_dev_ops atl_eth_dev_ops = {
.dev_stop = atl_dev_stop,
.dev_close= atl_dev_close,
.dev_reset= atl_dev_reset,
+
+   .fw_version_get   = atl_fw_version_get,
+   .dev_infos_get= atl_dev_info_get,
 };
 
+static inline int32_t
+atl_reset_hw(struct aq_hw_s *hw)
+{
+   return hw_atl_b0_hw_reset(hw);
+}
+
+static void
+atl_print_adapter_info(struct aq_hw_s *hw __rte_unused)
+{
+   PMD_INIT_LOG(DEBUG, "FW version: %u.%u.%u",
+   hw->fw_ver_actual >> 24,
+   (hw->fw_ver_actual >> 16) & 0xFF,
+   hw->fw_ver_actual & 0x);
+   PMD_INIT_LOG(DEBUG, "Driver version: %s", ATL_PMD_DRIVER_VERSION);
+}
+
 static int
-eth_atl_dev_init(struct rte_eth_dev *eth_dev __rte_unused)
+eth_atl_dev_init(struct rte_eth_dev *eth_dev)
 {
-   return 0;
+   struct atl_adapter *adapter =
+   (struct atl_adapter *)eth_dev->data->dev_private;
+   struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
+   int err = 0;
+
+   PMD_INIT_FUNC_TRACE();
+
+   eth_dev->dev_ops = &atl_eth_dev_ops;
+
+   /* For secondary processes, the primary process has done all the work */
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return 0;
+
+   rte_eth_copy_pci_info(eth_dev, pci_dev);
+
+   /* Vendor and Device ID need to be set before init of shared code */
+   hw->device_id = pci_dev->id.device_id;
+   hw->vendor_id = pci_dev->id.vendor_id;
+   hw->mmio = (void *)pci_dev->mem_resource[0].addr;
+
+   /* Hardware configuration - hardcode */
+   adapter->hw_cfg.is_lro = false;
+   adapter->hw_cfg.wol = false;
+
+   hw->aq_nic_cfg = &adapter->hw_cfg;
+
+   /* Allocate memory for storing MAC addresses */
+   eth_dev->data->mac_addrs = rte_zmalloc("atlantic", ETHER_ADDR_LEN, 0);
+   if (eth_dev->data->mac_addrs == NULL) {
+   PMD_INIT_LOG(ERR, "MAC Malloc failed");
+   return -ENOMEM;
+   }
+
+   err = hw_atl_utils_initfw(hw, &hw->aq_fw_ops);
+   if (err)
+   return err;
+
+   /* Copy the permanent MAC address */
+   if (hw->aq_fw_ops->get_mac_permanent(hw,
+   (u8 *)ð_dev->data->mac_addrs[0]) != 0)
+   return -EINVAL;
+
+   return err;
 }
 
 static int
-eth_atl_dev_uninit(struct rte_eth_dev *eth_dev __rte_unused)
+eth_atl_dev_uninit(struct rte_eth_dev *eth_dev)
 {
+   struct aq_hw_s *hw;
+
+   PMD_INIT_FUNC_TRACE();
+
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return -EPERM;
+
+   hw = ATL_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
+
+   if (hw->adapter_stopped == 0)
+   atl_dev_close(eth_dev);
+
+   eth_dev->dev_ops = NULL;
+
+   rte_free(eth_dev->data->mac_addrs);
+   eth_dev->data->mac_addrs = NULL;
+
+   rte_free(eth_dev->data->hash_mac_addrs);
+   eth_dev->data->hash_mac_addrs = NULL;
+
+#ifdef RTE_LIBRTE_SECURITY
+   rte_free(eth_dev->security_ctx);
+#endif
+
return 0;
 }
 
@@ -105,25 +203,62 @@ atl_dev_configure(struct rte_eth_dev *dev __rte_unused)
  * It returns 0 on success.
  */
 static int
-atl_dev_start(struct rte_eth_dev *dev __rte_unused)
+atl_dev

[dpdk-dev] [PATCH v3 08/22] net/atlantic: TX/RX function prototypes

[Igor Russkikh]

From: Pavel Belous 

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/Makefile |  1 +
 drivers/net/atlantic/atl_ethdev.c | 20 ++-
 drivers/net/atlantic/atl_ethdev.h | 15 ++
 drivers/net/atlantic/atl_rxtx.c   | 42 +++
 drivers/net/atlantic/meson.build  |  1 +
 5 files changed, 78 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/atlantic/atl_rxtx.c

diff --git a/drivers/net/atlantic/Makefile b/drivers/net/atlantic/Makefile
index 91306d71ba97..b88da362146d 100644
--- a/drivers/net/atlantic/Makefile
+++ b/drivers/net/atlantic/Makefile
@@ -24,6 +24,7 @@ VPATH += $(SRCDIR)/hw_atl
 #
 # all source are stored in SRCS-y
 #
+SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += atl_rxtx.c
 SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += atl_ethdev.c
 SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += atl_hw_regs.c
 SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += hw_atl_utils.c
diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index afb2972ffcc2..4347f9772358 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -111,6 +111,9 @@ eth_atl_dev_init(struct rte_eth_dev *eth_dev)
PMD_INIT_FUNC_TRACE();
 
eth_dev->dev_ops = &atl_eth_dev_ops;
+   eth_dev->rx_pkt_burst = &atl_recv_pkts;
+   eth_dev->tx_pkt_burst = &atl_xmit_pkts;
+   eth_dev->tx_pkt_prepare = &atl_prep_pkts;
 
/* For secondary processes, the primary process has done all the work */
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
@@ -164,6 +167,8 @@ eth_atl_dev_uninit(struct rte_eth_dev *eth_dev)
atl_dev_close(eth_dev);
 
eth_dev->dev_ops = NULL;
+   eth_dev->rx_pkt_burst = NULL;
+   eth_dev->tx_pkt_burst = NULL;
 
rte_free(eth_dev->data->mac_addrs);
eth_dev->data->mac_addrs = NULL;
@@ -224,10 +229,23 @@ atl_dev_start(struct rte_eth_dev *dev)
err = hw_atl_b0_hw_init(hw, (uint8_t *)dev->data->mac_addrs);
 
hw_atl_b0_hw_start(hw);
+   /* initialize transmission unit */
+   atl_tx_init(dev);
+
+   /* This can fail when allocating mbufs for descriptor rings */
+   err = atl_rx_init(dev);
+   if (err) {
+   PMD_INIT_LOG(ERR, "Unable to initialize RX hardware");
+   goto error;
+   }
 
atl_print_adapter_info(hw);
 
-   return err;
+   return 0;
+
+error:
+   PMD_INIT_LOG(ERR, "failure in atl_dev_start(): %d", err);
+   return -EIO;
 }
 
 /*
diff --git a/drivers/net/atlantic/atl_ethdev.h 
b/drivers/net/atlantic/atl_ethdev.h
index 0b5db79e1c22..53fbc0a17bd2 100644
--- a/drivers/net/atlantic/atl_ethdev.h
+++ b/drivers/net/atlantic/atl_ethdev.h
@@ -20,4 +20,19 @@ struct atl_adapter {
struct aq_hw_cfg_s hw_cfg;
 };
 
+/*
+ * RX/TX function prototypes
+ */
+int atl_rx_init(struct rte_eth_dev *dev);
+int atl_tx_init(struct rte_eth_dev *dev);
+
+uint16_t atl_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
+   uint16_t nb_pkts);
+
+uint16_t atl_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
+   uint16_t nb_pkts);
+
+uint16_t atl_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
+   uint16_t nb_pkts);
+
 #endif /* _ATLANTIC_ETHDEV_H_ */
diff --git a/drivers/net/atlantic/atl_rxtx.c b/drivers/net/atlantic/atl_rxtx.c
new file mode 100644
index ..0fbd93038075
--- /dev/null
+++ b/drivers/net/atlantic/atl_rxtx.c
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Aquantia Corporation
+ */
+
+#include "atl_ethdev.h"
+
+int
+atl_tx_init(struct rte_eth_dev *eth_dev __rte_unused)
+{
+   return 0;
+}
+
+int
+atl_rx_init(struct rte_eth_dev *eth_dev __rte_unused)
+{
+   return 0;
+}
+
+uint16_t
+atl_prep_pkts(void *tx_queue __rte_unused,
+ struct rte_mbuf **tx_pkts __rte_unused,
+ uint16_t nb_pkts __rte_unused)
+{
+   return 0;
+}
+
+uint16_t
+atl_recv_pkts(void *rx_queue __rte_unused,
+ struct rte_mbuf **rx_pkts __rte_unused,
+ uint16_t nb_pkts __rte_unused)
+{
+   return 0;
+}
+
+uint16_t
+atl_xmit_pkts(void *tx_queue __rte_unused,
+ struct rte_mbuf **tx_pkts __rte_unused,
+ uint16_t nb_pkts __rte_unused)
+{
+   return 0;
+}
+
diff --git a/drivers/net/atlantic/meson.build b/drivers/net/atlantic/meson.build
index e7b4e0cba574..7575e471e306 100644
--- a/drivers/net/atlantic/meson.build
+++ b/drivers/net/atlantic/meson.build
@@ -4,6 +4,7 @@
 #subdir('hw_atl')
 
 sources = files(
+   'atl_rxtx.c',
'atl_ethdev.c',
'atl_hw_regs.c',
'hw_atl/hw_atl_b0.c',
-- 
2.7.4

[dpdk-dev] [PATCH v3 09/22] net/atlantic: RX side structures and implementation

[Igor Russkikh]

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/Makefile |   2 +-
 drivers/net/atlantic/atl_ethdev.c |  71 +
 drivers/net/atlantic/atl_ethdev.h |  19 ++
 drivers/net/atlantic/atl_rxtx.c   | 616 +-
 4 files changed, 702 insertions(+), 6 deletions(-)

diff --git a/drivers/net/atlantic/Makefile b/drivers/net/atlantic/Makefile
index b88da362146d..62dcdbffa69c 100644
--- a/drivers/net/atlantic/Makefile
+++ b/drivers/net/atlantic/Makefile
@@ -15,7 +15,7 @@ EXPORT_MAP := rte_pmd_atlantic_version.map
 
 LIBABIVER := 1
 
-LDLIBS += -lrte_eal
+LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
 LDLIBS += -lrte_ethdev -lrte_net
 LDLIBS += -lrte_bus_pci
 
diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index 4347f9772358..cdcfc5ec02c2 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -27,6 +27,7 @@ static int atl_fw_version_get(struct rte_eth_dev *dev, char 
*fw_version,
 static void atl_dev_info_get(struct rte_eth_dev *dev,
   struct rte_eth_dev_info *dev_info);
 
+static const uint32_t *atl_dev_supported_ptypes_get(struct rte_eth_dev *dev);
 
 static int eth_atl_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
struct rte_pci_device *pci_dev);
@@ -72,6 +73,18 @@ static struct rte_pci_driver rte_atl_pmd = {
.remove = eth_atl_pci_remove,
 };
 
+#define ATL_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_STRIP \
+   | DEV_RX_OFFLOAD_IPV4_CKSUM \
+   | DEV_RX_OFFLOAD_UDP_CKSUM \
+   | DEV_RX_OFFLOAD_TCP_CKSUM \
+   | DEV_RX_OFFLOAD_JUMBO_FRAME)
+
+static const struct rte_eth_desc_lim rx_desc_lim = {
+   .nb_max = ATL_MAX_RING_DESC,
+   .nb_min = ATL_MIN_RING_DESC,
+   .nb_align = ATL_RXD_ALIGN,
+};
+
 static const struct eth_dev_ops atl_eth_dev_ops = {
.dev_configure= atl_dev_configure,
.dev_start= atl_dev_start,
@@ -81,6 +94,13 @@ static const struct eth_dev_ops atl_eth_dev_ops = {
 
.fw_version_get   = atl_fw_version_get,
.dev_infos_get= atl_dev_info_get,
+   .dev_supported_ptypes_get = atl_dev_supported_ptypes_get,
+
+   /* Queue Control */
+   .rx_queue_start   = atl_rx_queue_start,
+   .rx_queue_stop= atl_rx_queue_stop,
+   .rx_queue_setup   = atl_rx_queue_setup,
+   .rx_queue_release = atl_rx_queue_release,
 };
 
 static inline int32_t
@@ -239,12 +259,19 @@ atl_dev_start(struct rte_eth_dev *dev)
goto error;
}
 
+   err = atl_start_queues(dev);
+   if (err < 0) {
+   PMD_INIT_LOG(ERR, "Unable to start rxtx queues");
+   goto error;
+   }
+
atl_print_adapter_info(hw);
 
return 0;
 
 error:
PMD_INIT_LOG(ERR, "failure in atl_dev_start(): %d", err);
+   atl_stop_queues(dev);
return -EIO;
 }
 
@@ -261,6 +288,12 @@ atl_dev_stop(struct rte_eth_dev *dev)
atl_reset_hw(hw);
hw->adapter_stopped = 0;
 
+   atl_stop_queues(dev);
+
+   /* Clear stored conf */
+   dev->data->scattered_rx = 0;
+   dev->data->lro = 0;
+
 }
 
 /*
@@ -277,6 +310,8 @@ atl_dev_close(struct rte_eth_dev *dev)
 
atl_dev_stop(dev);
hw->adapter_stopped = 1;
+
+   atl_free_queues(dev);
 }
 
 static int
@@ -320,11 +355,47 @@ atl_dev_info_get(struct rte_eth_dev *dev, struct 
rte_eth_dev_info *dev_info)
 {
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 
+   dev_info->max_rx_queues = AQ_HW_MAX_RX_QUEUES;
+   dev_info->max_tx_queues = AQ_HW_MAX_TX_QUEUES;
+
+   dev_info->min_rx_bufsize = 1024;
+   dev_info->max_rx_pktlen = HW_ATL_B0_MTU_JUMBO;
+   dev_info->max_mac_addrs = HW_ATL_B0_MAC_MAX;
dev_info->max_vfs = pci_dev->max_vfs;
 
dev_info->max_hash_mac_addrs = 0;
dev_info->max_vmdq_pools = 0;
dev_info->vmdq_queue_num = 0;
+
+   dev_info->rx_offload_capa = ATL_RX_OFFLOADS;
+
+   dev_info->default_rxconf = (struct rte_eth_rxconf) {
+   .rx_free_thresh = ATL_DEFAULT_RX_FREE_THRESH,
+   };
+
+   dev_info->rx_desc_lim = rx_desc_lim;
+}
+
+static const uint32_t *
+atl_dev_supported_ptypes_get(struct rte_eth_dev *dev)
+{
+   static const uint32_t ptypes[] = {
+   RTE_PTYPE_L2_ETHER,
+   RTE_PTYPE_L2_ETHER_ARP,
+   RTE_PTYPE_L2_ETHER_VLAN,
+   RTE_PTYPE_L3_IPV4,
+   RTE_PTYPE_L3_IPV6,
+   RTE_PTYPE_L4_TCP,
+   RTE_PTYPE_L4_UDP,
+   RTE_PTYPE_L4_SCTP,
+   RTE_PTYPE_L4_ICMP,
+   RTE_PTYPE_UNKNOWN
+   };
+
+   if (dev->rx_pkt_burst == atl_recv_pkts)
+   return ptypes;
+
+   return NULL;
 }
 
 RTE_PMD_REGISTER_PCI(net_atlantic, rte_atl_pmd);
diff --git a/drivers/net/atlantic/atl_ethdev.h 
b/driver

[dpdk-dev] [PATCH v3 13/22] net/atlantic: support for RX/TX descriptors information

[Igor Russkikh]

From: Pavel Belous 

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/atl_ethdev.c |   8 +++
 drivers/net/atlantic/atl_ethdev.h |  12 
 drivers/net/atlantic/atl_rxtx.c   | 125 ++
 3 files changed, 145 insertions(+)

diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index fc1d862042d2..bc0cb3da1f66 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -195,6 +195,14 @@ static const struct eth_dev_ops atl_eth_dev_ops = {
 
.rx_queue_intr_enable = atl_dev_rx_queue_intr_enable,
.rx_queue_intr_disable = atl_dev_rx_queue_intr_disable,
+
+   .rx_queue_count   = atl_rx_queue_count,
+   .rx_descriptor_done   = atl_dev_rx_descriptor_done,
+   .rx_descriptor_status = atl_dev_rx_descriptor_status,
+   .tx_descriptor_status = atl_dev_tx_descriptor_status,
+
+   .rxq_info_get = atl_rxq_info_get,
+   .txq_info_get = atl_txq_info_get,
 };
 
 
diff --git a/drivers/net/atlantic/atl_ethdev.h 
b/drivers/net/atlantic/atl_ethdev.h
index 90d63797b2c6..17c8505e4707 100644
--- a/drivers/net/atlantic/atl_ethdev.h
+++ b/drivers/net/atlantic/atl_ethdev.h
@@ -51,6 +51,12 @@ int atl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t 
tx_queue_id,
uint16_t nb_tx_desc, unsigned int socket_id,
const struct rte_eth_txconf *tx_conf);
 
+uint32_t atl_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id);
+
+int atl_dev_rx_descriptor_done(void *rx_queue, uint16_t offset);
+int atl_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);
+int atl_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);
+
 int atl_dev_rx_queue_intr_enable(struct rte_eth_dev *eth_dev,
 uint16_t queue_id);
 int atl_dev_rx_queue_intr_disable(struct rte_eth_dev *eth_dev,
@@ -69,6 +75,12 @@ int atl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t 
rx_queue_id);
 int atl_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
 int atl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
 
+void atl_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
+   struct rte_eth_rxq_info *qinfo);
+
+void atl_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
+   struct rte_eth_txq_info *qinfo);
+
 uint16_t atl_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts);
 
diff --git a/drivers/net/atlantic/atl_rxtx.c b/drivers/net/atlantic/atl_rxtx.c
index 94054ca5c9fa..ebb606fbcd7c 100644
--- a/drivers/net/atlantic/atl_rxtx.c
+++ b/drivers/net/atlantic/atl_rxtx.c
@@ -620,6 +620,131 @@ atl_stop_queues(struct rte_eth_dev *dev)
return 0;
 }
 
+void
+atl_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
+struct rte_eth_rxq_info *qinfo)
+{
+   struct atl_rx_queue *rxq;
+
+   PMD_INIT_FUNC_TRACE();
+
+   rxq = dev->data->rx_queues[queue_id];
+
+   qinfo->mp = rxq->mb_pool;
+   qinfo->scattered_rx = dev->data->scattered_rx;
+   qinfo->nb_desc = rxq->nb_rx_desc;
+}
+
+void
+atl_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
+struct rte_eth_txq_info *qinfo)
+{
+   struct atl_tx_queue *txq;
+
+   PMD_INIT_FUNC_TRACE();
+
+   txq = dev->data->tx_queues[queue_id];
+
+   qinfo->nb_desc = txq->nb_tx_desc;
+}
+
+/* Return Rx queue avail count */
+
+uint32_t
+atl_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
+{
+   struct atl_rx_queue *rxq;
+
+   PMD_INIT_FUNC_TRACE();
+
+   if (rx_queue_id >= dev->data->nb_rx_queues) {
+   PMD_DRV_LOG(ERR, "Invalid RX queue id=%d", rx_queue_id);
+   return 0;
+   }
+
+   rxq = dev->data->rx_queues[rx_queue_id];
+
+   if (rxq == NULL)
+   return 0;
+
+   return rxq->nb_rx_desc - rxq->nb_rx_hold;
+}
+
+int
+atl_dev_rx_descriptor_done(void *rx_queue, uint16_t offset)
+{
+   struct atl_rx_queue *rxq = rx_queue;
+   struct hw_atl_rxd_wb_s *rxd;
+   uint32_t idx;
+
+   PMD_INIT_FUNC_TRACE();
+
+   if (unlikely(offset >= rxq->nb_rx_desc))
+   return 0;
+
+   idx = rxq->rx_tail + offset;
+
+   if (idx >= rxq->nb_rx_desc)
+   idx -= rxq->nb_rx_desc;
+
+   rxd = (struct hw_atl_rxd_wb_s *)&rxq->hw_ring[idx];
+
+   return rxd->dd;
+}
+
+int
+atl_dev_rx_descriptor_status(void *rx_queue, uint16_t offset)
+{
+   struct atl_rx_queue *rxq = rx_queue;
+   struct hw_atl_rxd_wb_s *rxd;
+   uint32_t idx;
+
+   PMD_INIT_FUNC_TRACE();
+
+   if (unlikely(offset >= rxq->nb_rx_desc))
+   return -EINVAL;
+
+   if (offset >= rxq->nb_rx_desc - rxq->nb_rx_hold)
+   return RTE_ETH_RX_DESC_UNAVAIL;
+
+   idx = rxq->rx_tail + offset;
+
+   if (idx >= rxq->nb_rx_desc)
+   idx -= rxq->nb_rx_desc;
+
+   rxd = (struct hw_atl_rxd_wb_s *)&rxq->hw_ring[idx];
+

[dpdk-dev] [PATCH v3 11/22] net/atlantic: link status and interrupt management

[Igor Russkikh]

From: Pavel Belous 

Implement link interrupt, link info, link polling.

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/atl_ethdev.c | 461 +-
 drivers/net/atlantic/atl_ethdev.h |  16 ++
 drivers/net/atlantic/atl_rxtx.c   |  36 +++
 drivers/net/atlantic/atl_types.h  |   2 +
 4 files changed, 514 insertions(+), 1 deletion(-)

diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index 6a00277c3c8e..75c9fa169925 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -18,8 +18,11 @@ static int eth_atl_dev_uninit(struct rte_eth_dev *eth_dev);
 static int  atl_dev_configure(struct rte_eth_dev *dev);
 static int  atl_dev_start(struct rte_eth_dev *dev);
 static void atl_dev_stop(struct rte_eth_dev *dev);
+static int  atl_dev_set_link_up(struct rte_eth_dev *dev);
+static int  atl_dev_set_link_down(struct rte_eth_dev *dev);
 static void atl_dev_close(struct rte_eth_dev *dev);
 static int  atl_dev_reset(struct rte_eth_dev *dev);
+static int  atl_dev_link_update(struct rte_eth_dev *dev, int wait);
 
 static int atl_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
  size_t fw_size);
@@ -29,6 +32,16 @@ static void atl_dev_info_get(struct rte_eth_dev *dev,
 
 static const uint32_t *atl_dev_supported_ptypes_get(struct rte_eth_dev *dev);
 
+static void atl_dev_link_status_print(struct rte_eth_dev *dev);
+
+/* Interrupts */
+static int atl_dev_rxq_interrupt_setup(struct rte_eth_dev *dev);
+static int atl_dev_lsc_interrupt_setup(struct rte_eth_dev *dev, uint8_t on);
+static int atl_dev_interrupt_get_status(struct rte_eth_dev *dev);
+static int atl_dev_interrupt_action(struct rte_eth_dev *dev,
+   struct rte_intr_handle *handle);
+static void atl_dev_interrupt_handler(void *param);
+
 static int eth_atl_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
struct rte_pci_device *pci_dev);
 static int eth_atl_pci_remove(struct rte_pci_device *pci_dev);
@@ -104,9 +117,14 @@ static const struct eth_dev_ops atl_eth_dev_ops = {
.dev_configure= atl_dev_configure,
.dev_start= atl_dev_start,
.dev_stop = atl_dev_stop,
+   .dev_set_link_up  = atl_dev_set_link_up,
+   .dev_set_link_down= atl_dev_set_link_down,
.dev_close= atl_dev_close,
.dev_reset= atl_dev_reset,
 
+   /* Link */
+   .link_update  = atl_dev_link_update,
+
.fw_version_get   = atl_fw_version_get,
.dev_infos_get= atl_dev_info_get,
.dev_supported_ptypes_get = atl_dev_supported_ptypes_get,
@@ -121,14 +139,85 @@ static const struct eth_dev_ops atl_eth_dev_ops = {
.tx_queue_stop= atl_tx_queue_stop,
.tx_queue_setup   = atl_tx_queue_setup,
.tx_queue_release = atl_tx_queue_release,
+
+   .rx_queue_intr_enable = atl_dev_rx_queue_intr_enable,
+   .rx_queue_intr_disable = atl_dev_rx_queue_intr_disable,
 };
 
+
+/**
+ * Atomically reads the link status information from global
+ * structure rte_eth_dev.
+ *
+ * @param dev
+ *   - Pointer to the structure rte_eth_dev to read from.
+ *   - Pointer to the buffer to be saved with the link status.
+ *
+ * @return
+ *   - On success, zero.
+ *   - On failure, negative value.
+ */
+static inline int
+rte_atl_dev_atomic_read_link_status(struct rte_eth_dev *dev,
+   struct rte_eth_link *link)
+{
+   struct rte_eth_link *dst = link;
+   struct rte_eth_link *src = &dev->data->dev_link;
+
+   if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
+   *(uint64_t *)src) == 0)
+   return -1;
+
+   return 0;
+}
+
+/**
+ * Atomically writes the link status information into global
+ * structure rte_eth_dev.
+ *
+ * @param dev
+ *   - Pointer to the structure rte_eth_dev to read from.
+ *   - Pointer to the buffer to be saved with the link status.
+ *
+ * @return
+ *   - On success, zero.
+ *   - On failure, negative value.
+ */
+static inline int
+rte_atl_dev_atomic_write_link_status(struct rte_eth_dev *dev,
+   struct rte_eth_link *link)
+{
+   struct rte_eth_link *dst = &dev->data->dev_link;
+   struct rte_eth_link *src = link;
+
+   if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
+   *(uint64_t *)src) == 0)
+   return -1;
+
+   return 0;
+}
+
 static inline int32_t
 atl_reset_hw(struct aq_hw_s *hw)
 {
return hw_atl_b0_hw_reset(hw);
 }
 
+static inline void
+atl_enable_intr(struct rte_eth_dev *dev)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
+   hw_atl_itr_irq_msk_setlsw_set(hw, 0x);
+}
+
+static void
+atl_disable_intr(struct aq_hw_s *hw)
+{
+   PMD_INIT_FUNC_TRACE();
+ 

[dpdk-dev] [PATCH v3 12/22] net/atlantic: device statistics, xstats

[Igor Russkikh]

From: Pavel Belous 

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/atl_ethdev.c | 154 ++
 drivers/net/atlantic/atl_ethdev.h |   1 +
 drivers/net/atlantic/atl_rxtx.c   |  11 ++-
 drivers/net/atlantic/atl_types.h  |  41 ++
 4 files changed, 206 insertions(+), 1 deletion(-)

diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index 75c9fa169925..fc1d862042d2 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -24,6 +24,24 @@ static void atl_dev_close(struct rte_eth_dev *dev);
 static int  atl_dev_reset(struct rte_eth_dev *dev);
 static int  atl_dev_link_update(struct rte_eth_dev *dev, int wait);
 
+static int atl_dev_xstats_get_names(struct rte_eth_dev *dev __rte_unused,
+   struct rte_eth_xstat_name *xstats_names,
+   unsigned int size);
+
+static int atl_dev_stats_get(struct rte_eth_dev *dev,
+   struct rte_eth_stats *stats);
+
+static int atl_dev_xstats_get(struct rte_eth_dev *dev,
+ struct rte_eth_xstat *stats, unsigned int n);
+
+static void atl_dev_stats_reset(struct rte_eth_dev *dev);
+static void atl_dev_xstats_reset(struct rte_eth_dev *dev);
+
+static int atl_dev_queue_stats_mapping_set(struct rte_eth_dev *eth_dev,
+uint16_t queue_id,
+uint8_t stat_idx,
+uint8_t is_rx);
+
 static int atl_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
  size_t fw_size);
 
@@ -113,6 +131,33 @@ static const struct rte_eth_desc_lim tx_desc_lim = {
.nb_mtu_seg_max = ATL_TX_MAX_SEG,
 };
 
+#define ATL_XSTATS_FIELD(name) { \
+   #name, \
+   offsetof(struct aq_stats_s, name) \
+}
+
+struct atl_xstats_tbl_s {
+   const char *name;
+   unsigned int offset;
+};
+
+static struct atl_xstats_tbl_s atl_xstats_tbl[] = {
+   ATL_XSTATS_FIELD(uprc),
+   ATL_XSTATS_FIELD(mprc),
+   ATL_XSTATS_FIELD(bprc),
+   ATL_XSTATS_FIELD(erpt),
+   ATL_XSTATS_FIELD(uptc),
+   ATL_XSTATS_FIELD(mptc),
+   ATL_XSTATS_FIELD(bptc),
+   ATL_XSTATS_FIELD(erpr),
+   ATL_XSTATS_FIELD(ubrc),
+   ATL_XSTATS_FIELD(ubtc),
+   ATL_XSTATS_FIELD(mbrc),
+   ATL_XSTATS_FIELD(mbtc),
+   ATL_XSTATS_FIELD(bbrc),
+   ATL_XSTATS_FIELD(bbtc),
+};
+
 static const struct eth_dev_ops atl_eth_dev_ops = {
.dev_configure= atl_dev_configure,
.dev_start= atl_dev_start,
@@ -125,6 +170,14 @@ static const struct eth_dev_ops atl_eth_dev_ops = {
/* Link */
.link_update  = atl_dev_link_update,
 
+   /* Stats */
+   .stats_get= atl_dev_stats_get,
+   .xstats_get   = atl_dev_xstats_get,
+   .xstats_get_names = atl_dev_xstats_get_names,
+   .stats_reset  = atl_dev_stats_reset,
+   .xstats_reset = atl_dev_xstats_reset,
+   .queue_stats_mapping_set = atl_dev_queue_stats_mapping_set,
+
.fw_version_get   = atl_fw_version_get,
.dev_infos_get= atl_dev_info_get,
.dev_supported_ptypes_get = atl_dev_supported_ptypes_get,
@@ -286,6 +339,9 @@ eth_atl_dev_init(struct rte_eth_dev *eth_dev)
(u8 *)ð_dev->data->mac_addrs[0]) != 0)
return -EINVAL;
 
+   /* Reset the hw statistics */
+   atl_dev_stats_reset(eth_dev);
+
rte_intr_callback_register(intr_handle,
   atl_dev_interrupt_handler, eth_dev);
 
@@ -613,6 +669,104 @@ atl_dev_reset(struct rte_eth_dev *dev)
return ret;
 }
 
+
+static int
+atl_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
+{
+   struct atl_adapter *adapter =
+   (struct atl_adapter *)dev->data->dev_private;
+   struct aq_hw_s *hw = &adapter->hw;
+   struct atl_sw_stats *swstats = &adapter->sw_stats;
+   unsigned int i;
+
+   hw->aq_fw_ops->update_stats(hw);
+
+   /* Fill out the rte_eth_stats statistics structure */
+   stats->ipackets = hw->curr_stats.dma_pkt_rc;
+   stats->ibytes = hw->curr_stats.dma_oct_rc;
+   stats->imissed = hw->curr_stats.dpc;
+   stats->ierrors = hw->curr_stats.erpt;
+
+   stats->opackets = hw->curr_stats.dma_pkt_tc;
+   stats->obytes = hw->curr_stats.dma_oct_tc;
+   stats->oerrors = 0;
+
+   stats->rx_nombuf = swstats->rx_nombuf;
+
+   for (i = 0; i < RTE_ETHDEV_QUEUE_STAT_CNTRS; i++) {
+   stats->q_ipackets[i] = swstats->q_ipackets[i];
+   stats->q_opackets[i] = swstats->q_opackets[i];
+   stats->q_ibytes[i] = swstats->q_ibytes[i];
+   stats->q_obytes[i] = swstats->q_obytes[i];
+   stats->q_errors[i] = swstats->q_errors[i];
+   }
+ 

[dpdk-dev] [PATCH v3 10/22] net/atlantic: TX side structures and implementation

[Igor Russkikh]

From: Pavel Belous 

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/atl_ethdev.c |  28 ++
 drivers/net/atlantic/atl_ethdev.h |   7 +
 drivers/net/atlantic/atl_rxtx.c   | 530 +-
 3 files changed, 556 insertions(+), 9 deletions(-)

diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index cdcfc5ec02c2..6a00277c3c8e 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -79,12 +79,27 @@ static struct rte_pci_driver rte_atl_pmd = {
| DEV_RX_OFFLOAD_TCP_CKSUM \
| DEV_RX_OFFLOAD_JUMBO_FRAME)
 
+#define ATL_TX_OFFLOADS (DEV_TX_OFFLOAD_VLAN_INSERT \
+   | DEV_TX_OFFLOAD_IPV4_CKSUM \
+   | DEV_TX_OFFLOAD_UDP_CKSUM \
+   | DEV_TX_OFFLOAD_TCP_CKSUM \
+   | DEV_TX_OFFLOAD_TCP_TSO \
+   | DEV_TX_OFFLOAD_MULTI_SEGS)
+
 static const struct rte_eth_desc_lim rx_desc_lim = {
.nb_max = ATL_MAX_RING_DESC,
.nb_min = ATL_MIN_RING_DESC,
.nb_align = ATL_RXD_ALIGN,
 };
 
+static const struct rte_eth_desc_lim tx_desc_lim = {
+   .nb_max = ATL_MAX_RING_DESC,
+   .nb_min = ATL_MIN_RING_DESC,
+   .nb_align = ATL_TXD_ALIGN,
+   .nb_seg_max = ATL_TX_MAX_SEG,
+   .nb_mtu_seg_max = ATL_TX_MAX_SEG,
+};
+
 static const struct eth_dev_ops atl_eth_dev_ops = {
.dev_configure= atl_dev_configure,
.dev_start= atl_dev_start,
@@ -101,6 +116,11 @@ static const struct eth_dev_ops atl_eth_dev_ops = {
.rx_queue_stop= atl_rx_queue_stop,
.rx_queue_setup   = atl_rx_queue_setup,
.rx_queue_release = atl_rx_queue_release,
+
+   .tx_queue_start   = atl_tx_queue_start,
+   .tx_queue_stop= atl_tx_queue_stop,
+   .tx_queue_setup   = atl_tx_queue_setup,
+   .tx_queue_release = atl_tx_queue_release,
 };
 
 static inline int32_t
@@ -369,11 +389,19 @@ atl_dev_info_get(struct rte_eth_dev *dev, struct 
rte_eth_dev_info *dev_info)
 
dev_info->rx_offload_capa = ATL_RX_OFFLOADS;
 
+   dev_info->tx_offload_capa = ATL_TX_OFFLOADS;
+
+
dev_info->default_rxconf = (struct rte_eth_rxconf) {
.rx_free_thresh = ATL_DEFAULT_RX_FREE_THRESH,
};
 
+   dev_info->default_txconf = (struct rte_eth_txconf) {
+   .tx_free_thresh = ATL_DEFAULT_TX_FREE_THRESH,
+   };
+
dev_info->rx_desc_lim = rx_desc_lim;
+   dev_info->tx_desc_lim = tx_desc_lim;
 }
 
 static const uint32_t *
diff --git a/drivers/net/atlantic/atl_ethdev.h 
b/drivers/net/atlantic/atl_ethdev.h
index acb3066c189f..cafe37cdf963 100644
--- a/drivers/net/atlantic/atl_ethdev.h
+++ b/drivers/net/atlantic/atl_ethdev.h
@@ -28,12 +28,17 @@ struct atl_adapter {
  * RX/TX function prototypes
  */
 void atl_rx_queue_release(void *rxq);
+void atl_tx_queue_release(void *txq);
 
 int atl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
uint16_t nb_rx_desc, unsigned int socket_id,
const struct rte_eth_rxconf *rx_conf,
struct rte_mempool *mb_pool);
 
+int atl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
+   uint16_t nb_tx_desc, unsigned int socket_id,
+   const struct rte_eth_txconf *tx_conf);
+
 int atl_rx_init(struct rte_eth_dev *dev);
 int atl_tx_init(struct rte_eth_dev *dev);
 
@@ -44,6 +49,8 @@ void atl_free_queues(struct rte_eth_dev *dev);
 int atl_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
 int atl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
 
+int atl_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
+int atl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
 
 uint16_t atl_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts);
diff --git a/drivers/net/atlantic/atl_rxtx.c b/drivers/net/atlantic/atl_rxtx.c
index 0ce41aaf1780..172d5fb232f2 100644
--- a/drivers/net/atlantic/atl_rxtx.c
+++ b/drivers/net/atlantic/atl_rxtx.c
@@ -4,6 +4,7 @@
 
 #include 
 #include 
+#include 
 
 #include "atl_ethdev.h"
 #include "atl_hw_regs.h"
@@ -13,6 +14,20 @@
 #include "hw_atl/hw_atl_b0.h"
 #include "hw_atl/hw_atl_b0_internal.h"
 
+#define ATL_TX_CKSUM_OFFLOAD_MASK ( \
+   PKT_TX_IP_CKSUM |\
+   PKT_TX_L4_MASK | \
+   PKT_TX_TCP_SEG)
+
+#define ATL_TX_OFFLOAD_MASK (  \
+   PKT_TX_VLAN_PKT |\
+   PKT_TX_IP_CKSUM |\
+   PKT_TX_L4_MASK | \
+   PKT_TX_TCP_SEG)
+
+#define ATL_TX_OFFLOAD_NOTSUP_MASK \
+   (PKT_TX_OFFLOAD_MASK ^ ATL_TX_OFFLOAD_MASK)
+
 /**
  * Structure associated with each descriptor of the RX ring of a RX queue.
  */
@@ -21

[dpdk-dev] [PATCH v3 14/22] net/atlantic: promisc and allmulti configuration

[Igor Russkikh]

From: Pavel Belous 

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/atl_ethdev.c | 44 +++
 1 file changed, 44 insertions(+)

diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index bc0cb3da1f66..e71be3e14ca5 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -22,6 +22,10 @@ static int  atl_dev_set_link_up(struct rte_eth_dev *dev);
 static int  atl_dev_set_link_down(struct rte_eth_dev *dev);
 static void atl_dev_close(struct rte_eth_dev *dev);
 static int  atl_dev_reset(struct rte_eth_dev *dev);
+static void atl_dev_promiscuous_enable(struct rte_eth_dev *dev);
+static void atl_dev_promiscuous_disable(struct rte_eth_dev *dev);
+static void atl_dev_allmulticast_enable(struct rte_eth_dev *dev);
+static void atl_dev_allmulticast_disable(struct rte_eth_dev *dev);
 static int  atl_dev_link_update(struct rte_eth_dev *dev, int wait);
 
 static int atl_dev_xstats_get_names(struct rte_eth_dev *dev __rte_unused,
@@ -167,6 +171,12 @@ static const struct eth_dev_ops atl_eth_dev_ops = {
.dev_close= atl_dev_close,
.dev_reset= atl_dev_reset,
 
+   /* PROMISC */
+   .promiscuous_enable   = atl_dev_promiscuous_enable,
+   .promiscuous_disable  = atl_dev_promiscuous_disable,
+   .allmulticast_enable  = atl_dev_allmulticast_enable,
+   .allmulticast_disable = atl_dev_allmulticast_disable,
+
/* Link */
.link_update  = atl_dev_link_update,
 
@@ -905,6 +915,40 @@ atl_dev_link_update(struct rte_eth_dev *dev, int wait 
__rte_unused)
return 0;
 }
 
+static void
+atl_dev_promiscuous_enable(struct rte_eth_dev *dev)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
+   hw_atl_rpfl2promiscuous_mode_en_set(hw, true);
+}
+
+static void
+atl_dev_promiscuous_disable(struct rte_eth_dev *dev)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
+   hw_atl_rpfl2promiscuous_mode_en_set(hw, false);
+}
+
+static void
+atl_dev_allmulticast_enable(struct rte_eth_dev *dev)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
+   hw_atl_rpfl2_accept_all_mc_packets_set(hw, true);
+}
+
+static void
+atl_dev_allmulticast_disable(struct rte_eth_dev *dev)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
+   if (dev->data->promiscuous == 1)
+   return; /* must remain in all_multicast mode */
+
+   hw_atl_rpfl2_accept_all_mc_packets_set(hw, false);
+}
 
 /**
  * It clears the interrupt causes and enables the interrupt.
-- 
2.7.4

[dpdk-dev] [PATCH v3 19/22] net/atlantic: eeprom and register manipulation routines

[Igor Russkikh]

From: Pavel Belous 

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/atl_ethdev.c | 47 +++
 1 file changed, 47 insertions(+)

diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index 792dd7be127a..b3a19f96e8c8 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -69,6 +69,13 @@ static void atl_vlan_strip_queue_set(struct rte_eth_dev *dev,
 static int atl_vlan_tpid_set(struct rte_eth_dev *dev,
 enum rte_vlan_type vlan_type, uint16_t tpid);
 
+/* EEPROM */
+static int atl_dev_get_eeprom_length(struct rte_eth_dev *dev);
+static int atl_dev_get_eeprom(struct rte_eth_dev *dev,
+ struct rte_dev_eeprom_info *eeprom);
+static int atl_dev_set_eeprom(struct rte_eth_dev *dev,
+ struct rte_dev_eeprom_info *eeprom);
+
 
 /* Flow control */
 static int atl_flow_ctrl_get(struct rte_eth_dev *dev,
@@ -266,6 +273,11 @@ static const struct eth_dev_ops atl_eth_dev_ops = {
.rx_descriptor_status = atl_dev_rx_descriptor_status,
.tx_descriptor_status = atl_dev_tx_descriptor_status,
 
+   /* EEPROM */
+   .get_eeprom_length= atl_dev_get_eeprom_length,
+   .get_eeprom   = atl_dev_get_eeprom,
+   .set_eeprom   = atl_dev_set_eeprom,
+
/* Flow Control */
.flow_ctrl_get= atl_flow_ctrl_get,
.flow_ctrl_set= atl_flow_ctrl_set,
@@ -1171,6 +1183,41 @@ atl_dev_interrupt_handler(void *param)
atl_dev_interrupt_action(dev, dev->intr_handle);
 }
 
+#define SFP_EEPROM_SIZE 0xff
+
+static int
+atl_dev_get_eeprom_length(struct rte_eth_dev *dev __rte_unused)
+{
+   return SFP_EEPROM_SIZE;
+}
+
+static int
+atl_dev_get_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *eeprom)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
+   if (hw->aq_fw_ops->get_eeprom == NULL)
+   return -ENOTSUP;
+
+   if (eeprom->length != SFP_EEPROM_SIZE || eeprom->data == NULL)
+   return -EINVAL;
+
+   return hw->aq_fw_ops->get_eeprom(hw, eeprom->data, eeprom->length);
+}
+
+static int
+atl_dev_set_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *eeprom)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
+   if (hw->aq_fw_ops->set_eeprom == NULL)
+   return -ENOTSUP;
+
+   if (eeprom->length != SFP_EEPROM_SIZE || eeprom->data == NULL)
+   return -EINVAL;
+
+   return hw->aq_fw_ops->set_eeprom(hw, eeprom->data, eeprom->length);
+}
 
 static int
 atl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
-- 
2.7.4

[dpdk-dev] [PATCH v3 18/22] net/atlantic: VLAN filters and offloads

[Igor Russkikh]

From: Pavel Belous 

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/atl_ethdev.c | 161 ++
 drivers/net/atlantic/atl_types.h  |   2 +
 2 files changed, 163 insertions(+)

diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index b71028d9d227..792dd7be127a 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -56,6 +56,20 @@ static const uint32_t *atl_dev_supported_ptypes_get(struct 
rte_eth_dev *dev);
 
 static int atl_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 
+
+/* VLAN stuff */
+static int atl_vlan_filter_set(struct rte_eth_dev *dev,
+   uint16_t vlan_id, int on);
+
+static int atl_vlan_offload_set(struct rte_eth_dev *dev, int mask);
+
+static void atl_vlan_strip_queue_set(struct rte_eth_dev *dev,
+uint16_t queue_id, int on);
+
+static int atl_vlan_tpid_set(struct rte_eth_dev *dev,
+enum rte_vlan_type vlan_type, uint16_t tpid);
+
+
 /* Flow control */
 static int atl_flow_ctrl_get(struct rte_eth_dev *dev,
   struct rte_eth_fc_conf *fc_conf);
@@ -227,6 +241,12 @@ static const struct eth_dev_ops atl_eth_dev_ops = {
 
.mtu_set  = atl_dev_mtu_set,
 
+   /* VLAN */
+   .vlan_filter_set  = atl_vlan_filter_set,
+   .vlan_offload_set = atl_vlan_offload_set,
+   .vlan_tpid_set= atl_vlan_tpid_set,
+   .vlan_strip_queue_set = atl_vlan_strip_queue_set,
+
/* Queue Control */
.rx_queue_start   = atl_rx_queue_start,
.rx_queue_stop= atl_rx_queue_stop,
@@ -1265,6 +1285,147 @@ atl_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 }
 
 static int
+atl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
+{
+   struct aq_hw_cfg_s *cfg =
+   ATL_DEV_PRIVATE_TO_CFG(dev->data->dev_private);
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+   int err = 0;
+   int i = 0;
+
+   PMD_INIT_FUNC_TRACE();
+
+   for (i = 0; i < HW_ATL_B0_MAX_VLAN_IDS; i++) {
+   if (cfg->vlan_filter[i] == vlan_id) {
+   if (!on) {
+   /* Disable VLAN filter. */
+   hw_atl_rpf_vlan_flr_en_set(hw, 0U, i);
+
+   /* Clear VLAN filter entry */
+   cfg->vlan_filter[i] = 0;
+   }
+   break;
+   }
+   }
+
+   /* VLAN_ID was not found. So, nothing to delete. */
+   if (i == HW_ATL_B0_MAX_VLAN_IDS && !on)
+   goto exit;
+
+   /* VLAN_ID already exist, or already removed above. Nothing to do. */
+   if (i != HW_ATL_B0_MAX_VLAN_IDS)
+   goto exit;
+
+   /* Try to found free VLAN filter to add new VLAN_ID */
+   for (i = 0; i < HW_ATL_B0_MAX_VLAN_IDS; i++) {
+   if (cfg->vlan_filter[i] == 0)
+   break;
+   }
+
+   if (i == HW_ATL_B0_MAX_VLAN_IDS) {
+   /* We have no free VLAN filter to add new VLAN_ID*/
+   err = -ENOMEM;
+   goto exit;
+   }
+
+   cfg->vlan_filter[i] = vlan_id;
+   hw_atl_rpf_vlan_flr_act_set(hw, 1U, i);
+   hw_atl_rpf_vlan_id_flr_set(hw, vlan_id, i);
+   hw_atl_rpf_vlan_flr_en_set(hw, 1U, i);
+
+exit:
+   /* Enable VLAN promisc mode if vlan_filter empty  */
+   for (i = 0; i < HW_ATL_B0_MAX_VLAN_IDS; i++) {
+   if (cfg->vlan_filter[i] != 0)
+   break;
+   }
+
+   hw_atl_rpf_vlan_prom_mode_en_set(hw, i == HW_ATL_B0_MAX_VLAN_IDS);
+
+   return err;
+}
+
+static int
+atl_enable_vlan_filter(struct rte_eth_dev *dev, int en)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+   struct aq_hw_cfg_s *cfg =
+   ATL_DEV_PRIVATE_TO_CFG(dev->data->dev_private);
+   int i;
+
+   PMD_INIT_FUNC_TRACE();
+
+   for (i = 0; i < HW_ATL_B0_MAX_VLAN_IDS; i++) {
+   if (cfg->vlan_filter[i])
+   hw_atl_rpf_vlan_flr_en_set(hw, en, i);
+   }
+   return 0;
+}
+
+static int
+atl_vlan_offload_set(struct rte_eth_dev *dev, int mask)
+{
+   struct aq_hw_cfg_s *cfg =
+   ATL_DEV_PRIVATE_TO_CFG(dev->data->dev_private);
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+   int ret = 0;
+   int i;
+
+   PMD_INIT_FUNC_TRACE();
+
+   ret = atl_enable_vlan_filter(dev, mask & ETH_VLAN_FILTER_MASK);
+
+   cfg->vlan_strip = !!(mask & ETH_VLAN_STRIP_MASK);
+
+   for (i = 0; i < dev->data->nb_rx_queues; i++)
+   hw_atl_rpo_rx_desc_vlan_stripping_set(hw, cfg->vlan_strip, i);
+
+   if (mask & ETH_VLAN_EXTEND_MASK)
+   ret = -ENOTSUP;
+
+   return ret;
+}
+
+static int
+atl_vlan_tpid_set(struct r

[dpdk-dev] [PATCH v3 15/22] net/atlantic: RSS and RETA manipulation API

[Igor Russkikh]

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/atl_ethdev.c | 107 ++
 drivers/net/atlantic/atl_ethdev.h |  14 +
 drivers/net/atlantic/atl_rxtx.c   |   5 ++
 3 files changed, 126 insertions(+)

diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index e71be3e14ca5..51e933a3559a 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -64,6 +64,19 @@ static int atl_dev_interrupt_action(struct rte_eth_dev *dev,
struct rte_intr_handle *handle);
 static void atl_dev_interrupt_handler(void *param);
 
+/* RSS */
+static int atl_reta_update(struct rte_eth_dev *dev,
+struct rte_eth_rss_reta_entry64 *reta_conf,
+uint16_t reta_size);
+static int atl_reta_query(struct rte_eth_dev *dev,
+   struct rte_eth_rss_reta_entry64 *reta_conf,
+   uint16_t reta_size);
+static int atl_rss_hash_update(struct rte_eth_dev *dev,
+struct rte_eth_rss_conf *rss_conf);
+static int atl_rss_hash_conf_get(struct rte_eth_dev *dev,
+  struct rte_eth_rss_conf *rss_conf);
+
+
 static int eth_atl_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
struct rte_pci_device *pci_dev);
 static int eth_atl_pci_remove(struct rte_pci_device *pci_dev);
@@ -213,6 +226,11 @@ static const struct eth_dev_ops atl_eth_dev_ops = {
 
.rxq_info_get = atl_rxq_info_get,
.txq_info_get = atl_txq_info_get,
+
+   .reta_update  = atl_reta_update,
+   .reta_query   = atl_reta_query,
+   .rss_hash_update  = atl_rss_hash_update,
+   .rss_hash_conf_get= atl_rss_hash_conf_get,
 };
 
 
@@ -330,12 +348,18 @@ eth_atl_dev_init(struct rte_eth_dev *eth_dev)
/* Hardware configuration - hardcode */
adapter->hw_cfg.is_lro = false;
adapter->hw_cfg.wol = false;
+   adapter->hw_cfg.is_rss = false;
+   adapter->hw_cfg.num_rss_queues = HW_ATL_B0_RSS_MAX;
+
adapter->hw_cfg.link_speed_msk = AQ_NIC_RATE_10G |
  AQ_NIC_RATE_5G |
  AQ_NIC_RATE_2G5 |
  AQ_NIC_RATE_1G |
  AQ_NIC_RATE_100M;
 
+   adapter->hw_cfg.aq_rss.indirection_table_size =
+   HW_ATL_B0_RSS_REDIRECTION_MAX;
+
hw->aq_nic_cfg = &adapter->hw_cfg;
 
/* disable interrupt */
@@ -840,6 +864,10 @@ atl_dev_info_get(struct rte_eth_dev *dev, struct 
rte_eth_dev_info *dev_info)
dev_info->rx_desc_lim = rx_desc_lim;
dev_info->tx_desc_lim = tx_desc_lim;
 
+   dev_info->hash_key_size = HW_ATL_B0_RSS_HASHKEY_BITS / 8;
+   dev_info->reta_size = HW_ATL_B0_RSS_REDIRECTION_MAX;
+   dev_info->flow_type_rss_offloads = ATL_RSS_OFFLOAD_ALL;
+
dev_info->speed_capa = ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G;
dev_info->speed_capa |= ETH_LINK_SPEED_100M;
dev_info->speed_capa |= ETH_LINK_SPEED_2_5G;
@@ -1091,6 +1119,85 @@ atl_dev_interrupt_handler(void *param)
atl_dev_interrupt_action(dev, dev->intr_handle);
 }
 
+static int
+atl_reta_update(struct rte_eth_dev *dev,
+  struct rte_eth_rss_reta_entry64 *reta_conf,
+  uint16_t reta_size)
+{
+   int i;
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+   struct aq_hw_cfg_s *cf = ATL_DEV_PRIVATE_TO_CFG(dev->data->dev_private);
+
+   for (i = 0; i < reta_size && i < cf->aq_rss.indirection_table_size; i++)
+   cf->aq_rss.indirection_table[i] = min(reta_conf->reta[i],
+   dev->data->nb_rx_queues - 1);
+
+   hw_atl_b0_hw_rss_set(hw, &cf->aq_rss);
+   return 0;
+}
+
+static int
+atl_reta_query(struct rte_eth_dev *dev,
+   struct rte_eth_rss_reta_entry64 *reta_conf,
+   uint16_t reta_size)
+{
+   int i;
+   struct aq_hw_cfg_s *cf = ATL_DEV_PRIVATE_TO_CFG(dev->data->dev_private);
+
+   for (i = 0; i < reta_size && i < cf->aq_rss.indirection_table_size; i++)
+   reta_conf->reta[i] = cf->aq_rss.indirection_table[i];
+   reta_conf->mask = ~0U;
+   return 0;
+}
+
+static int
+atl_rss_hash_update(struct rte_eth_dev *dev,
+struct rte_eth_rss_conf *rss_conf)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+   struct aq_hw_cfg_s *cfg =
+   ATL_DEV_PRIVATE_TO_CFG(dev->data->dev_private);
+   static u8 def_rss_key[40] = {
+   0x1e, 0xad, 0x71, 0x87, 0x65, 0xfc, 0x26, 0x7d,
+   0x0d, 0x45, 0x67, 0x74, 0xcd, 0x06, 0x1a, 0x18,
+   0xb6, 0xc1, 0xf0, 0xc7, 0xbb, 0x18, 0xbe, 0xf8,
+   0x19, 0x13, 0x4b, 0xa9, 0xd0, 0x3e, 0xfe, 0x70,
+   0x25, 0x03, 0xab, 0x50, 0x6

[dpdk-dev] [PATCH v3 17/22] net/atlantic: MAC address manipulations

[Igor Russkikh]

From: Pavel Belous 

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/atl_ethdev.c | 126 ++
 1 file changed, 126 insertions(+)

diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index 243020dc00a9..b71028d9d227 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -54,6 +54,8 @@ static void atl_dev_info_get(struct rte_eth_dev *dev,
 
 static const uint32_t *atl_dev_supported_ptypes_get(struct rte_eth_dev *dev);
 
+static int atl_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
+
 /* Flow control */
 static int atl_flow_ctrl_get(struct rte_eth_dev *dev,
   struct rte_eth_fc_conf *fc_conf);
@@ -70,6 +72,18 @@ static int atl_dev_interrupt_action(struct rte_eth_dev *dev,
struct rte_intr_handle *handle);
 static void atl_dev_interrupt_handler(void *param);
 
+
+static int atl_add_mac_addr(struct rte_eth_dev *dev,
+   struct ether_addr *mac_addr,
+   uint32_t index, uint32_t pool);
+static void atl_remove_mac_addr(struct rte_eth_dev *dev, uint32_t index);
+static int atl_set_default_mac_addr(struct rte_eth_dev *dev,
+  struct ether_addr *mac_addr);
+
+static int atl_dev_set_mc_addr_list(struct rte_eth_dev *dev,
+   struct ether_addr *mc_addr_set,
+   uint32_t nb_mc_addr);
+
 /* RSS */
 static int atl_reta_update(struct rte_eth_dev *dev,
 struct rte_eth_rss_reta_entry64 *reta_conf,
@@ -211,6 +225,8 @@ static const struct eth_dev_ops atl_eth_dev_ops = {
.dev_infos_get= atl_dev_info_get,
.dev_supported_ptypes_get = atl_dev_supported_ptypes_get,
 
+   .mtu_set  = atl_dev_mtu_set,
+
/* Queue Control */
.rx_queue_start   = atl_rx_queue_start,
.rx_queue_stop= atl_rx_queue_stop,
@@ -234,6 +250,11 @@ static const struct eth_dev_ops atl_eth_dev_ops = {
.flow_ctrl_get= atl_flow_ctrl_get,
.flow_ctrl_set= atl_flow_ctrl_set,
 
+   /* MAC */
+   .mac_addr_add = atl_add_mac_addr,
+   .mac_addr_remove  = atl_remove_mac_addr,
+   .mac_addr_set = atl_set_default_mac_addr,
+   .set_mc_addr_list = atl_dev_set_mc_addr_list,
.rxq_info_get = atl_rxq_info_get,
.txq_info_get = atl_txq_info_get,
 
@@ -1174,6 +1195,111 @@ atl_flow_ctrl_set(struct rte_eth_dev *dev, struct 
rte_eth_fc_conf *fc_conf)
 }
 
 static int
+atl_update_mac_addr(struct rte_eth_dev *dev, uint32_t index,
+   u8 *mac_addr, bool enable)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+   unsigned int h = 0U;
+   unsigned int l = 0U;
+   int err;
+
+   if (mac_addr) {
+   h = (mac_addr[0] << 8) | (mac_addr[1]);
+   l = (mac_addr[2] << 24) | (mac_addr[3] << 16) |
+   (mac_addr[4] << 8) | mac_addr[5];
+   }
+
+   hw_atl_rpfl2_uc_flr_en_set(hw, 0U, index);
+   hw_atl_rpfl2unicast_dest_addresslsw_set(hw, l, index);
+   hw_atl_rpfl2unicast_dest_addressmsw_set(hw, h, index);
+
+   if (enable)
+   hw_atl_rpfl2_uc_flr_en_set(hw, 1U, index);
+
+   err = aq_hw_err_from_flags(hw);
+
+   return err;
+}
+
+static int
+atl_add_mac_addr(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
+   uint32_t index __rte_unused, uint32_t pool __rte_unused)
+{
+   if (is_zero_ether_addr(mac_addr)) {
+   PMD_DRV_LOG(ERR, "Invalid Ethernet Address");
+   return -EINVAL;
+   }
+
+   return atl_update_mac_addr(dev, index, (u8 *)mac_addr, TRUE);
+}
+
+static void
+atl_remove_mac_addr(struct rte_eth_dev *dev, uint32_t index)
+{
+   atl_update_mac_addr(dev, index, NULL, FALSE);
+}
+
+static int
+atl_set_default_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
+{
+   atl_remove_mac_addr(dev, 0);
+   atl_add_mac_addr(dev, addr, 0, 0);
+   return 0;
+}
+
+static int
+atl_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
+{
+   struct rte_eth_dev_info dev_info;
+   uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
+
+   atl_dev_info_get(dev, &dev_info);
+
+   if ((mtu < ETHER_MIN_MTU) || (frame_size > dev_info.max_rx_pktlen))
+   return -EINVAL;
+
+   /* update max frame size */
+   dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
+
+   return 0;
+}
+
+static int
+atl_dev_set_mc_addr_list(struct rte_eth_dev *dev,
+ struct ether_addr *mc_addr_set,
+ uint32_t nb_mc_addr)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+   u32 i;
+
+   if (nb_mc_addr > AQ_HW_MULTICAST_ADDRESS_MAX 

[dpdk-dev] [PATCH v3 16/22] net/atlantic: flow control configuration

[Igor Russkikh]

From: Pavel Belous 

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/atl_ethdev.c | 54 +++
 1 file changed, 54 insertions(+)

diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index 51e933a3559a..243020dc00a9 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -54,6 +54,12 @@ static void atl_dev_info_get(struct rte_eth_dev *dev,
 
 static const uint32_t *atl_dev_supported_ptypes_get(struct rte_eth_dev *dev);
 
+/* Flow control */
+static int atl_flow_ctrl_get(struct rte_eth_dev *dev,
+  struct rte_eth_fc_conf *fc_conf);
+static int atl_flow_ctrl_set(struct rte_eth_dev *dev,
+  struct rte_eth_fc_conf *fc_conf);
+
 static void atl_dev_link_status_print(struct rte_eth_dev *dev);
 
 /* Interrupts */
@@ -224,6 +230,10 @@ static const struct eth_dev_ops atl_eth_dev_ops = {
.rx_descriptor_status = atl_dev_rx_descriptor_status,
.tx_descriptor_status = atl_dev_tx_descriptor_status,
 
+   /* Flow Control */
+   .flow_ctrl_get= atl_flow_ctrl_get,
+   .flow_ctrl_set= atl_flow_ctrl_set,
+
.rxq_info_get = atl_rxq_info_get,
.txq_info_get = atl_txq_info_get,
 
@@ -357,6 +367,7 @@ eth_atl_dev_init(struct rte_eth_dev *eth_dev)
  AQ_NIC_RATE_1G |
  AQ_NIC_RATE_100M;
 
+   adapter->hw_cfg.flow_control = (AQ_NIC_FC_RX | AQ_NIC_FC_TX);
adapter->hw_cfg.aq_rss.indirection_table_size =
HW_ATL_B0_RSS_REDIRECTION_MAX;
 
@@ -1119,6 +1130,49 @@ atl_dev_interrupt_handler(void *param)
atl_dev_interrupt_action(dev, dev->intr_handle);
 }
 
+
+static int
+atl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
+   if (hw->aq_nic_cfg->flow_control == AQ_NIC_FC_OFF)
+   fc_conf->mode = RTE_FC_NONE;
+   else if (hw->aq_nic_cfg->flow_control & (AQ_NIC_FC_RX | AQ_NIC_FC_TX))
+   fc_conf->mode = RTE_FC_FULL;
+   else if (hw->aq_nic_cfg->flow_control & AQ_NIC_FC_RX)
+   fc_conf->mode = RTE_FC_RX_PAUSE;
+   else if (hw->aq_nic_cfg->flow_control & AQ_NIC_FC_RX)
+   fc_conf->mode = RTE_FC_TX_PAUSE;
+
+   return 0;
+}
+
+static int
+atl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+   uint32_t old_flow_control = hw->aq_nic_cfg->flow_control;
+
+
+   if (hw->aq_fw_ops->set_flow_control == NULL)
+   return -ENOTSUP;
+
+   if (fc_conf->mode == RTE_FC_NONE)
+   hw->aq_nic_cfg->flow_control = AQ_NIC_FC_OFF;
+   else if (fc_conf->mode == RTE_FC_RX_PAUSE)
+   hw->aq_nic_cfg->flow_control = AQ_NIC_FC_RX;
+   else if (fc_conf->mode == RTE_FC_TX_PAUSE)
+   hw->aq_nic_cfg->flow_control = AQ_NIC_FC_TX;
+   else if (fc_conf->mode == RTE_FC_FULL)
+   hw->aq_nic_cfg->flow_control = (AQ_NIC_FC_RX | AQ_NIC_FC_TX);
+
+   if (old_flow_control != hw->aq_nic_cfg->flow_control)
+   return hw->aq_fw_ops->set_flow_control(hw);
+
+   return 0;
+}
+
 static int
 atl_reta_update(struct rte_eth_dev *dev,
   struct rte_eth_rss_reta_entry64 *reta_conf,
-- 
2.7.4

[dpdk-dev] [PATCH v3 21/22] net/atlantic: support for read MAC registers for debug purposes

[Igor Russkikh]

From: Pavel Belous 

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/atl_ethdev.c | 31 +++
 1 file changed, 31 insertions(+)

diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index 90ab8d9c0b1d..c69b2536a3e3 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -80,6 +80,9 @@ static int atl_dev_get_eeprom(struct rte_eth_dev *dev,
 static int atl_dev_set_eeprom(struct rte_eth_dev *dev,
  struct rte_dev_eeprom_info *eeprom);
 
+/* Regs */
+static int atl_dev_get_regs(struct rte_eth_dev *dev,
+   struct rte_dev_reg_info *regs);
 
 /* Flow control */
 static int atl_flow_ctrl_get(struct rte_eth_dev *dev,
@@ -238,6 +241,8 @@ static const struct eth_dev_ops atl_eth_dev_ops = {
/* Link */
.link_update  = atl_dev_link_update,
 
+   .get_reg  = atl_dev_get_regs,
+
/* Stats */
.stats_get= atl_dev_stats_get,
.xstats_get   = atl_dev_xstats_get,
@@ -1273,6 +1278,32 @@ atl_dev_set_eeprom(struct rte_eth_dev *dev, struct 
rte_dev_eeprom_info *eeprom)
 }
 
 static int
+atl_dev_get_regs(struct rte_eth_dev *dev, struct rte_dev_reg_info *regs)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+   u32 mif_id;
+   int err;
+
+   if (regs->data == NULL) {
+   regs->length = hw_atl_utils_hw_get_reg_length();
+   regs->width = sizeof(u32);
+   return 0;
+   }
+
+   /* Only full register dump is supported */
+   if (regs->length && regs->length != hw_atl_utils_hw_get_reg_length())
+   return -ENOTSUP;
+
+   err = hw_atl_utils_hw_get_regs(hw, regs->data);
+
+   /* Device version */
+   mif_id = hw_atl_reg_glb_mif_id_get(hw);
+   regs->version = mif_id & 0xFFU;
+
+   return err;
+}
+
+static int
 atl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
 {
struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-- 
2.7.4

[dpdk-dev] [PATCH v3 20/22] net/atlantic: LED control DPDK and private APIs

[Igor Russkikh]

Signed-off-by: Igor Russkikh 
Signed-off-by: Pavel Belous 
---
 drivers/net/atlantic/Makefile   |  4 +++
 drivers/net/atlantic/atl_ethdev.c   | 53 +
 drivers/net/atlantic/atl_ethdev.h   |  3 ++
 drivers/net/atlantic/meson.build|  3 ++
 drivers/net/atlantic/rte_pmd_atlantic.c | 19 
 drivers/net/atlantic/rte_pmd_atlantic.h | 44 +++
 6 files changed, 126 insertions(+)
 create mode 100644 drivers/net/atlantic/rte_pmd_atlantic.c
 create mode 100644 drivers/net/atlantic/rte_pmd_atlantic.h

diff --git a/drivers/net/atlantic/Makefile b/drivers/net/atlantic/Makefile
index 62dcdbffa69c..6e821e013af9 100644
--- a/drivers/net/atlantic/Makefile
+++ b/drivers/net/atlantic/Makefile
@@ -31,5 +31,9 @@ SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += hw_atl_utils.c
 SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += hw_atl_llh.c
 SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += hw_atl_utils_fw2x.c
 SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += hw_atl_b0.c
+SRCS-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD) += rte_pmd_atlantic.c
+
+# install this header file
+SYMLINK-$(CONFIG_RTE_LIBRTE_ATLANTIC_PMD)-include := rte_pmd_atlantic.h
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/net/atlantic/atl_ethdev.c 
b/drivers/net/atlantic/atl_ethdev.c
index b3a19f96e8c8..90ab8d9c0b1d 100644
--- a/drivers/net/atlantic/atl_ethdev.c
+++ b/drivers/net/atlantic/atl_ethdev.c
@@ -69,6 +69,10 @@ static void atl_vlan_strip_queue_set(struct rte_eth_dev *dev,
 static int atl_vlan_tpid_set(struct rte_eth_dev *dev,
 enum rte_vlan_type vlan_type, uint16_t tpid);
 
+/* LEDs */
+static int atl_dev_led_on(struct rte_eth_dev *dev);
+static int atl_dev_led_off(struct rte_eth_dev *dev);
+
 /* EEPROM */
 static int atl_dev_get_eeprom_length(struct rte_eth_dev *dev);
 static int atl_dev_get_eeprom(struct rte_eth_dev *dev,
@@ -273,6 +277,10 @@ static const struct eth_dev_ops atl_eth_dev_ops = {
.rx_descriptor_status = atl_dev_rx_descriptor_status,
.tx_descriptor_status = atl_dev_tx_descriptor_status,
 
+   /* LEDs */
+   .dev_led_on   = atl_dev_led_on,
+   .dev_led_off  = atl_dev_led_off,
+
/* EEPROM */
.get_eeprom_length= atl_dev_get_eeprom_length,
.get_eeprom   = atl_dev_get_eeprom,
@@ -1183,6 +1191,51 @@ atl_dev_interrupt_handler(void *param)
atl_dev_interrupt_action(dev, dev->intr_handle);
 }
 
+/**
+ * LED ON Enables software controllable LED blinking.
+ * LED status then is independent of link status or traffic
+ */
+static int
+atl_dev_led_on(struct rte_eth_dev *dev)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
+   if (hw->aq_fw_ops->led_control == NULL)
+   return -ENOTSUP;
+
+   return hw->aq_fw_ops->led_control(hw,
+   AQ_HW_LED_BLINK |
+   (AQ_HW_LED_BLINK << 2) |
+   (AQ_HW_LED_BLINK << 4));
+}
+
+/**
+ * LED OFF disables software controllable LED blinking
+ * LED is controlled by default logic and depends on link status and
+ * traffic activity
+ */
+static int
+atl_dev_led_off(struct rte_eth_dev *dev)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
+   if (hw->aq_fw_ops->led_control == NULL)
+   return -ENOTSUP;
+
+   return hw->aq_fw_ops->led_control(hw, AQ_HW_LED_DEFAULT);
+}
+
+int
+atl_dev_led_control(struct rte_eth_dev *dev, int control)
+{
+   struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
+   if (hw->aq_fw_ops->led_control == NULL)
+   return -ENOTSUP;
+
+   return hw->aq_fw_ops->led_control(hw, control);
+}
+
 #define SFP_EEPROM_SIZE 0xff
 
 static int
diff --git a/drivers/net/atlantic/atl_ethdev.h 
b/drivers/net/atlantic/atl_ethdev.h
index 69612a016089..51d6042088c7 100644
--- a/drivers/net/atlantic/atl_ethdev.h
+++ b/drivers/net/atlantic/atl_ethdev.h
@@ -104,4 +104,7 @@ uint16_t atl_xmit_pkts(void *tx_queue, struct rte_mbuf 
**tx_pkts,
 uint16_t atl_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts);
 
+int
+atl_dev_led_control(struct rte_eth_dev *dev, int control);
+
 #endif /* _ATLANTIC_ETHDEV_H_ */
diff --git a/drivers/net/atlantic/meson.build b/drivers/net/atlantic/meson.build
index 7575e471e306..8e992f2406f6 100644
--- a/drivers/net/atlantic/meson.build
+++ b/drivers/net/atlantic/meson.build
@@ -11,8 +11,11 @@ sources = files(
'hw_atl/hw_atl_llh.c',
'hw_atl/hw_atl_utils_fw2x.c',
'hw_atl/hw_atl_utils.c',
+   'rte_pmd_atlantic.c',
 )
 
 deps += ['eal']
 
 allow_experimental_apis = true
+
+install_headers('rte_pmd_atlantic.h')
diff --git a/drivers/net/atlantic/rte_pmd_atlantic.c 
b/drivers/net/atlantic/rte_pmd_atlantic.c
new file mode 100644
index ..4cb09baf2afc
--- /dev/null
+++ b/drivers/net/atlantic/rte_pmd_atlantic.c
@@ -0,0 +1,19 @@
+/* SPDX-Lic

[dpdk-dev] [PATCH v3 22/22] net/atlantic: documentation and rel notes

[Igor Russkikh]

Signed-off-by: Igor Russkikh 
---
 doc/guides/nics/atlantic.rst   | 53 ++
 doc/guides/nics/features/atlantic.ini  | 37 
 doc/guides/nics/index.rst  |  1 +
 doc/guides/rel_notes/release_18_11.rst |  5 
 4 files changed, 96 insertions(+)
 create mode 100644 doc/guides/nics/atlantic.rst
 create mode 100644 doc/guides/nics/features/atlantic.ini

diff --git a/doc/guides/nics/atlantic.rst b/doc/guides/nics/atlantic.rst
new file mode 100644
index ..88939359d942
--- /dev/null
+++ b/doc/guides/nics/atlantic.rst
@@ -0,0 +1,53 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+Copyright(c) 2018 Aquantia Corporation.
+
+Aquantia Atlantic DPDK Driver
+=
+
+Atlantic DPDK driver provides DPDK support for Aquantia's AQtion family of 
chipsets: AQC107/AQC108/AQC109
+
+Supported features
+^^
+
+
+- Base L2 features
+- Promiscuous mode
+- Port statistics
+- Multicast mode
+- RSS (Receive Side Scaling)
+- Checksum offload
+- Jumbo Frame upto 16K
+
+Configuration Information
+^
+
+- ``CONFIG_RTE_LIBRTE_ATLANTIC_PMD`` (default ``y``)
+
+Not yet supported features
+^^
+
+NOP
+
+Application Programming Interface
+-
+
+Atlantic NIC supports custom LED pin configuration interface.
+For details, refer rte_pmd_atlantic.h header file
+
+Limitations or Known issues
+---
+
+Statistics
+~~
+
+MTU setting
+~~~
+
+Atlantic NIC supports up to 16K jumbo frame size
+
+Supported Chipsets and NICs
+---
+
+- Aquantia AQtion AQC107 10 Gigabit Ethernet Controller
+- Aquantia AQtion AQC108 5 Gigabit Ethernet Controller
+- Aquantia AQtion AQC109 2.5 Gigabit Ethernet Controller
diff --git a/doc/guides/nics/features/atlantic.ini 
b/doc/guides/nics/features/atlantic.ini
new file mode 100644
index ..2d943ce13212
--- /dev/null
+++ b/doc/guides/nics/features/atlantic.ini
@@ -0,0 +1,37 @@
+;
+; Supported features of the 'atlantic' network poll mode driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Speed capabilities   = Y
+Link status  = Y
+Link status event= Y
+MTU update   = Y
+Jumbo frame  = Y
+Promiscuous mode = Y
+Allmulticast mode= Y
+Unicast MAC filter   = Y
+VLAN filter  = Y
+Flow control = Y
+CRC offload  = Y
+VLAN offload = Y
+L3 checksum offload  = Y
+L4 checksum offload  = Y
+Rx descriptor status = Y
+Tx descriptor status = Y
+Basic stats  = Y
+Extended stats   = Y
+Stats per queue  = Y
+Linux UIO= Y
+x86-32   = Y
+x86-64   = Y
+Queue start/stop = Y
+RSS hash = Y
+RSS key update   = Y
+RSS reta update  = Y
+Packet type parsing  = Y
+FW version   = Y
+EEPROM dump  = Y
+Registers dump   = Y
+LED  = Y
diff --git a/doc/guides/nics/index.rst b/doc/guides/nics/index.rst
index 59f6063dce92..7925c2bd86ff 100644
--- a/doc/guides/nics/index.rst
+++ b/doc/guides/nics/index.rst
@@ -12,6 +12,7 @@ Network Interface Controller Drivers
 features
 build_and_test
 ark
+atlantic
 avp
 axgbe
 bnx2x
diff --git a/doc/guides/rel_notes/release_18_11.rst 
b/doc/guides/rel_notes/release_18_11.rst
index bc9b74ec44fc..8473516ddb78 100644
--- a/doc/guides/rel_notes/release_18_11.rst
+++ b/doc/guides/rel_notes/release_18_11.rst
@@ -67,6 +67,11 @@ New Features
   SR-IOV option in Hyper-V and Azure. This is an alternative to the previous
   vdev_netvsc, tap, and failsafe drivers combination.
 
+* **Added Ethernet poll mode driver for Aquantia aQtion family of 10G 
devices.**
+
+  Added the new ``atlantic`` ethernet poll mode driver for Aquantia XGBE 
devices.
+  See the :doc:`../nics/atlantic` nic driver guide for more details on this
+  driver.
 
 API Changes
 ---
-- 
2.7.4

Re: [dpdk-dev] [PATCH v3 1/3] ring: read tail using atomic load

[Jerin Jacob]

-Original Message-
> Date: Mon, 17 Sep 2018 16:17:22 +0800
> From: Gavin Hu 
> To: dev@dpdk.org
> CC: gavin...@arm.com, honnappa.nagaraha...@arm.com, steve.cap...@arm.com,
>  ola.liljed...@arm.com, jerin.ja...@caviumnetworks.com, n...@arm.com,
>  sta...@dpdk.org
> Subject: [PATCH v3 1/3] ring: read tail using atomic load
> X-Mailer: git-send-email 2.7.4
> 
> External Email
> 
> In update_tail, read ht->tail using __atomic_load.Although the
> compiler currently seems to be doing the right thing even without
> _atomic_load, we don't want to give the compiler freedom to optimise
> what should be an atomic load, it should not be arbitarily moved
> around.
> 
> Fixes: 39368ebfc6 ("ring: introduce C11 memory model barrier option")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Gavin Hu 
> Reviewed-by: Honnappa Nagarahalli 
> Reviewed-by: Steve Capper 
> Reviewed-by: Ola Liljedahl 
> ---
>  lib/librte_ring/rte_ring_c11_mem.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/lib/librte_ring/rte_ring_c11_mem.h 
> b/lib/librte_ring/rte_ring_c11_mem.h
> index 94df3c4..234fea0 100644
> --- a/lib/librte_ring/rte_ring_c11_mem.h
> +++ b/lib/librte_ring/rte_ring_c11_mem.h
> @@ -21,7 +21,8 @@ update_tail(struct rte_ring_headtail *ht, uint32_t old_val, 
> uint32_t new_val,
>  * we need to wait for them to complete
>  */
> if (!single)
> -   while (unlikely(ht->tail != old_val))
> +   while (unlikely(old_val != __atomic_load_n(&ht->tail,
> +   __ATOMIC_RELAXED)))
> rte_pause();

Since it is a while loop with rte_pause(), IMO, There is no scope of false 
compiler optimization.
IMO, this change may not required though I don't see any performance
difference with two core ring_perf_autotest test. May be more core
case it may have effect. IMO, If it not absolutely required, we can avoid
this change.

> 
> __atomic_store_n(&ht->tail, new_val, __ATOMIC_RELEASE);
> --
> 2.7.4
> 

Re: [dpdk-dev] [PATCH v3 2/3] ring: synchronize the load and store of the tail

[Jerin Jacob]

-Original Message-
> Date: Mon, 17 Sep 2018 16:17:23 +0800
> From: Gavin Hu 
> To: dev@dpdk.org
> CC: gavin...@arm.com, honnappa.nagaraha...@arm.com, steve.cap...@arm.com,
>  ola.liljed...@arm.com, jerin.ja...@caviumnetworks.com, n...@arm.com,
>  sta...@dpdk.org
> Subject: [PATCH v3 2/3] ring: synchronize the load and store of the tail
> X-Mailer: git-send-email 2.7.4
> 
> 
> Synchronize the load-acquire of the tail and the store-release
> within update_tail, the store release ensures all the ring operations,
> enqueue or dequeue, are seen by the observers on the other side as soon
> as they see the updated tail. The load-acquire is needed here as the
> data dependency is not a reliable way for ordering as the compiler might
> break it by saving to temporary values to boost performance.
> When computing the free_entries and avail_entries, use atomic semantics
> to load the heads and tails instead.
> 
> The patch was benchmarked with test/ring_perf_autotest and it decreases
> the enqueue/dequeue latency by 5% ~ 27.6% with two lcores, the real gains
> are dependent on the number of lcores, depth of the ring, SPSC or MPMC.
> For 1 lcore, it also improves a little, about 3 ~ 4%.
> It is a big improvement, in case of MPMC, with two lcores and ring size
> of 32, it saves latency up to (3.26-2.36)/3.26 = 27.6%.
> 
> This patch is a bug fix, while the improvement is a bonus. In our analysis
> the improvement comes from the cacheline pre-filling after hoisting load-
> acquire from _atomic_compare_exchange_n up above.
> 
> The test command:
> $sudo ./test/test/test -l 16-19,44-47,72-75,100-103 -n 4 --socket-mem=\
> 1024 -- -i
> 
> Test result with this patch(two cores):
>  SP/SC bulk enq/dequeue (size: 8): 5.86
>  MP/MC bulk enq/dequeue (size: 8): 10.15
>  SP/SC bulk enq/dequeue (size: 32): 1.94
>  MP/MC bulk enq/dequeue (size: 32): 2.36
> 
> In comparison of the test result without this patch:
>  SP/SC bulk enq/dequeue (size: 8): 6.67
>  MP/MC bulk enq/dequeue (size: 8): 13.12
>  SP/SC bulk enq/dequeue (size: 32): 2.04
>  MP/MC bulk enq/dequeue (size: 32): 3.26
> 
> Fixes: 39368ebfc6 ("ring: introduce C11 memory model barrier option")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Gavin Hu 
> Reviewed-by: Honnappa Nagarahalli 
> Reviewed-by: Steve Capper 
> Reviewed-by: Ola Liljedahl 

Tested with ThunderX2 server platform. Though it has minor performance impact on
non burst variants. For Burst variant, I could see similar performance
improvement and it is C11 semantically correct too.

Acked-by: Jerin Jacob 
Tested-by: Jerin Jacob 

Re: [dpdk-dev] [PATCH v3 3/3] ring: move the atomic load of head above the loop

[Jerin Jacob]

-Original Message-
> Date: Mon, 17 Sep 2018 16:17:24 +0800
> From: Gavin Hu 
> To: dev@dpdk.org
> CC: gavin...@arm.com, honnappa.nagaraha...@arm.com, steve.cap...@arm.com,
>  ola.liljed...@arm.com, jerin.ja...@caviumnetworks.com, n...@arm.com,
>  sta...@dpdk.org
> Subject: [PATCH v3 3/3] ring: move the atomic load of head above the loop
> X-Mailer: git-send-email 2.7.4
> 
> External Email
> 
> In __rte_ring_move_prod_head, move the __atomic_load_n up and out of
> the do {} while loop as upon failure the old_head will be updated,
> another load is costly and not necessary.
> 
> This helps a little on the latency,about 1~5%.
> 
>  Test result with the patch(two cores):
>  SP/SC bulk enq/dequeue (size: 8): 5.64
>  MP/MC bulk enq/dequeue (size: 8): 9.58
>  SP/SC bulk enq/dequeue (size: 32): 1.98
>  MP/MC bulk enq/dequeue (size: 32): 2.30
> 
> Fixes: 39368ebfc6 ("ring: introduce C11 memory model barrier option")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Gavin Hu 
> Reviewed-by: Honnappa Nagarahalli 
> Reviewed-by: Steve Capper 
> Reviewed-by: Ola Liljedahl 

Acked-by: Jerin Jacob 
Tested-by: Jerin Jacob 

Re: [dpdk-dev] [PATCH v3 1/2] test/event: fix eth Rx adapter autotest for skeleton PMD

[Jerin Jacob]

-Original Message-
> Date: Tue, 25 Sep 2018 12:49:04 +0530
> From: Nikhil Rao 
> To: jerin.ja...@caviumnetworks.com
> CC: dev@dpdk.org, Nikhil Rao ,
>  vipin.vargh...@intel.com, sta...@dpdk.org
> Subject: [PATCH v3 1/2] test/event: fix eth Rx adapter autotest for
>  skeleton PMD
> X-Mailer: git-send-email 1.8.3.1
> 
> skeleton PMD does not support
> RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ and
> implicit_release_disable so make the Rx queue_id = -1 and
> initialize the event port configuration to zero.
> 
> Fixes: ec36d881f56d ("eventdev: add implicit release disable capability")
> Fixes: 2a9c83ae3b2e ("test/eventdev: add multi-ports test")
> Cc: vipin.vargh...@intel.com
> CC: sta...@dpdk.org
> 
> Signed-off-by: Nikhil Rao 

Acked-by: Jerin Jacob 

Re: [dpdk-dev] [PATCH v3 2/2] test/event: fix Rx adapter intr autotest for skeleton PMD

[Jerin Jacob]

-Original Message-
> Date: Tue, 25 Sep 2018 12:49:05 +0530
> From: Nikhil Rao 
> To: jerin.ja...@caviumnetworks.com
> CC: dev@dpdk.org, Nikhil Rao 
> Subject: [PATCH v3 2/2] test/event: fix Rx adapter intr autotest for
>  skeleton PMD
> X-Mailer: git-send-email 1.8.3.1
> 
> External Email
> 
> skeleton PMD does not support
> RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ
> so make the Rx queue_id = -1 and initialize the event port
> configuration to zero.
> 
> Fixes: d65856999dd6 ("test/event: add Rx adapter tests for interrupt driven 
> queues")
> 
> Signed-off-by: Nikhil Rao 

Acked-by: Jerin Jacob 

[dpdk-dev] [PATCH 0/4] enable meson support for aesni_gcm, aesni_mb, kasumi and zuc

[Hari Kumar Vemula]

1/4: enablement of aesni_gcm pmd in meson
2/4: enablement of aesni_mb pmd in meson
3/4: enablement of kasumi pmd enable in meson
4/4: enablement of zuc pmd enable in meson

Hari Kumar Vemula (4):
  driver/crypto: enable meson support for the aesni gcm
  drivers/crypto: enable meson support for the aesni mb
  drivers/crypto: enable meson support for the kasumi
  drivers/crypto: enable meson support for the zuc

 drivers/crypto/aesni_gcm/meson.build | 17 +
 drivers/crypto/aesni_mb/meson.build  | 16 
 drivers/crypto/kasumi/meson.build| 18 ++
 drivers/crypto/meson.build   |  4 ++--
 drivers/crypto/zuc/meson.build   | 18 ++
 meson_options.txt|  6 ++
 6 files changed, 77 insertions(+), 2 deletions(-)
 create mode 100644 drivers/crypto/aesni_gcm/meson.build
 create mode 100644 drivers/crypto/aesni_mb/meson.build
 create mode 100644 drivers/crypto/kasumi/meson.build
 create mode 100644 drivers/crypto/zuc/meson.build

-- 
2.13.6

[dpdk-dev] [PATCH 3/4] drivers/crypto: enable meson support for the kasumi

[Hari Kumar Vemula]

Added new meson.build file for KASUMI
Exported dependency library path through meson_options.txt file

Signed-off-by: Hari Kumar Vemula 
---
 drivers/crypto/kasumi/meson.build | 18 ++
 drivers/crypto/meson.build|  2 +-
 meson_options.txt |  2 ++
 3 files changed, 21 insertions(+), 1 deletion(-)
 create mode 100644 drivers/crypto/kasumi/meson.build

diff --git a/drivers/crypto/kasumi/meson.build 
b/drivers/crypto/kasumi/meson.build
new file mode 100644
index 0..b65de65cc
--- /dev/null
+++ b/drivers/crypto/kasumi/meson.build
@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2018 Intel Corporation
+
+path = get_option('libsso_kasumi_dir')
+lib_dir = path + '/build'
+inc_dir = path + '/include'
+
+lib = cc.find_library('libsso_kasumi', dirs: lib_dir, required: false)
+if not lib.found()
+   build = false
+else
+   ext_deps += lib
+   includes += include_directories(inc_dir)
+endif
+
+sources = files('rte_kasumi_pmd.c', 'rte_kasumi_pmd_ops.c')
+
+deps += ['bus_vdev']
diff --git a/drivers/crypto/meson.build b/drivers/crypto/meson.build
index ab68c2751..4ed87c367 100644
--- a/drivers/crypto/meson.build
+++ b/drivers/crypto/meson.build
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: BSD-3-Clause
 # Copyright(c) 2017 Intel Corporation
 
-drivers = ['aesni_gcm',  'aesni_mb', 'ccp', 'dpaa_sec', 'dpaa2_sec', 'mvsam',
+drivers = ['aesni_gcm',  'aesni_mb', 'ccp', 'dpaa_sec', 'dpaa2_sec', 'kasumi', 
'mvsam',
'null', 'openssl', 'qat', 'scheduler', 'virtio']
 
 std_deps = ['cryptodev'] # cryptodev pulls in all other needed deps
diff --git a/meson_options.txt b/meson_options.txt
index 8c75826c1..782213477 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -26,3 +26,5 @@ option('tests', type: 'boolean', value: true,
description: 'build unit tests')
 option('lib_IPSec_MB', type: 'string', value: '',
description: 'path to the IPSec_MB library installation directory')
+option('libsso_kasumi_dir', type: 'string', value: '',
+   description: 'path to the KASUMI library installation directory')
-- 
2.13.6

[dpdk-dev] [PATCH 4/4] drivers/crypto: enable meson support for the zuc

[Hari Kumar Vemula]

Added new meson.build file for ZUC
Exported dependency library path through meson_options.txt file

Signed-off-by: Hari Kumar Vemula 
---
 drivers/crypto/meson.build |  2 +-
 drivers/crypto/zuc/meson.build | 18 ++
 meson_options.txt  |  2 ++
 3 files changed, 21 insertions(+), 1 deletion(-)
 create mode 100644 drivers/crypto/zuc/meson.build

diff --git a/drivers/crypto/meson.build b/drivers/crypto/meson.build
index 4ed87c367..b45049ce3 100644
--- a/drivers/crypto/meson.build
+++ b/drivers/crypto/meson.build
@@ -2,7 +2,7 @@
 # Copyright(c) 2017 Intel Corporation
 
 drivers = ['aesni_gcm',  'aesni_mb', 'ccp', 'dpaa_sec', 'dpaa2_sec', 'kasumi', 
'mvsam',
-   'null', 'openssl', 'qat', 'scheduler', 'virtio']
+   'null', 'openssl', 'qat', 'scheduler', 'virtio', 'zuc']
 
 std_deps = ['cryptodev'] # cryptodev pulls in all other needed deps
 config_flag_fmt = 'RTE_LIBRTE_@0@_PMD'
diff --git a/drivers/crypto/zuc/meson.build b/drivers/crypto/zuc/meson.build
new file mode 100644
index 0..4fa5d9b8c
--- /dev/null
+++ b/drivers/crypto/zuc/meson.build
@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2018 Intel Corporation
+
+path = get_option('libsso_zuc_dir')
+lib_dir = path + '/build'
+inc_dir = path + '/include'
+
+lib = cc.find_library('libsso_zuc', dirs: lib_dir, required: false)
+if not lib.found()
+   build = false
+else
+   ext_deps += lib
+   includes += include_directories(inc_dir)
+endif
+
+sources = files('rte_zuc_pmd.c', 'rte_zuc_pmd_ops.c')
+
+deps += ['bus_vdev']
diff --git a/meson_options.txt b/meson_options.txt
index 782213477..842b6c6de 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -28,3 +28,5 @@ option('lib_IPSec_MB', type: 'string', value: '',
description: 'path to the IPSec_MB library installation directory')
 option('libsso_kasumi_dir', type: 'string', value: '',
description: 'path to the KASUMI library installation directory')
+option('libsso_zuc_dir', type: 'string', value: '',
+   description: 'path to the ZUC library installation directory')
-- 
2.13.6

[dpdk-dev] [PATCH 1/4] driver/crypto: enable meson support for the aesni gcm

[Hari Kumar Vemula]

Added new meson.build files for aesni_gcm
Exported dependency library path through meson_options.txt file

Signed-off-by: Hari Kumar Vemula 
---
 drivers/crypto/aesni_gcm/meson.build | 17 +
 drivers/crypto/meson.build   |  2 +-
 meson_options.txt|  2 ++
 3 files changed, 20 insertions(+), 1 deletion(-)
 create mode 100644 drivers/crypto/aesni_gcm/meson.build

diff --git a/drivers/crypto/aesni_gcm/meson.build 
b/drivers/crypto/aesni_gcm/meson.build
new file mode 100644
index 0..a84c792c5
--- /dev/null
+++ b/drivers/crypto/aesni_gcm/meson.build
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2018 Intel Corporation
+
+path = get_option('lib_IPSec_MB')
+lib_dir = path + '/lib'
+
+lib = cc.find_library('IPSec_MB', required: false)
+if not lib.found()
+   build = false
+else
+   ext_deps += lib
+endif
+
+sources = files('aesni_gcm_pmd.c', 'aesni_gcm_pmd_ops.c')
+
+deps += ['bus_vdev']
+
diff --git a/drivers/crypto/meson.build b/drivers/crypto/meson.build
index 6ed853b7a..7e14cbba0 100644
--- a/drivers/crypto/meson.build
+++ b/drivers/crypto/meson.build
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: BSD-3-Clause
 # Copyright(c) 2017 Intel Corporation
 
-drivers = ['ccp', 'dpaa_sec', 'dpaa2_sec', 'mvsam',
+drivers = ['aesni_gcm', 'ccp', 'dpaa_sec', 'dpaa2_sec', 'mvsam',
'null', 'openssl', 'qat', 'scheduler', 'virtio']
 
 std_deps = ['cryptodev'] # cryptodev pulls in all other needed deps
diff --git a/meson_options.txt b/meson_options.txt
index d38ba56e2..8c75826c1 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -24,3 +24,5 @@ option('use_hpet', type: 'boolean', value: false,
description: 'use HPET timer in EAL')
 option('tests', type: 'boolean', value: true,
description: 'build unit tests')
+option('lib_IPSec_MB', type: 'string', value: '',
+   description: 'path to the IPSec_MB library installation directory')
-- 
2.13.6

[dpdk-dev] [PATCH 2/4] drivers/crypto: enable meson support for the aesni mb

[Hari Kumar Vemula]

Added new meson.build file for aesni_mb
Exported dependency library path through meson_options.txt file

Signed-off-by: Hari Kumar Vemula 
---
 drivers/crypto/aesni_mb/meson.build | 16 
 drivers/crypto/meson.build  |  2 +-
 2 files changed, 17 insertions(+), 1 deletion(-)
 create mode 100644 drivers/crypto/aesni_mb/meson.build

diff --git a/drivers/crypto/aesni_mb/meson.build 
b/drivers/crypto/aesni_mb/meson.build
new file mode 100644
index 0..000c7adb4
--- /dev/null
+++ b/drivers/crypto/aesni_mb/meson.build
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2018 Intel Corporation
+
+path = get_option('lib_IPSec_MB')
+lib_dir = path + '/lib'
+
+lib = cc.find_library('IPSec_MB', required: false)
+if not lib.found()
+   build = false
+else
+   ext_deps += lib
+endif
+
+sources = files('rte_aesni_mb_pmd.c', 'rte_aesni_mb_pmd_ops.c')
+
+deps += ['bus_vdev']
diff --git a/drivers/crypto/meson.build b/drivers/crypto/meson.build
index 7e14cbba0..ab68c2751 100644
--- a/drivers/crypto/meson.build
+++ b/drivers/crypto/meson.build
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: BSD-3-Clause
 # Copyright(c) 2017 Intel Corporation
 
-drivers = ['aesni_gcm', 'ccp', 'dpaa_sec', 'dpaa2_sec', 'mvsam',
+drivers = ['aesni_gcm',  'aesni_mb', 'ccp', 'dpaa_sec', 'dpaa2_sec', 'mvsam',
'null', 'openssl', 'qat', 'scheduler', 'virtio']
 
 std_deps = ['cryptodev'] # cryptodev pulls in all other needed deps
-- 
2.13.6

Re: [dpdk-dev] [PATCH] kni: implement header_ops parse method

[Igor Ryzhov]

It's just exact copy of eth_header_parse function from Linux kernel.

No problem, can do that with ether_addr_copy.

On Sat, Sep 29, 2018 at 10:22 AM Stephen Hemminger <
step...@networkplumber.org> wrote:

> On Thu, 27 Sep 2018 03:02:24 +0300
> Igor Ryzhov  wrote:
>
> > +/*
> > + *  Extract hardware address from packet
> > + */
> > +static int
> > +kni_net_header_parse(const struct sk_buff *skb, unsigned char *haddr)
> > +{
> > + const struct ethhdr *eth = eth_hdr(skb);
> > +
> > + memcpy(haddr, eth->h_source, ETH_ALEN);
> > +
> > + return ETH_ALEN;
> > +}
>
> Kernel has function ether_addr_copy which is marginally faster and
> commonly used.
>

[dpdk-dev] [PATCH 0/3] app/testpmd: add l3 encap/decap cmd

[Ori Kam]

Currently testpmd have support only for encapsulation and decapsulation
for L2 tunnels.

This series adds commands for L3 tunnels types, L3 tunnel is a tunnel
that the inner packet is missing the L2 part. The encapsulation uses
the encap_l3 command in-order to remove the inner l2.
For decapsulation since the inner packet is missing the L2 there is
a need to supply it to the NIC using the decap_l3.

The tunnels are are implemented are: MPLSoGRE and MPLSoUDP
while the decap can be used for all L3 tunnels.

This series is based on add generic L2/L3 tunnel encapsulation actions [1]

[1] https://mails.dpdk.org/archives/dev/2018-September/111781.html


Ori Kam (3):
  app/testpmd: add MPLSoUDP encapsulation
  app/testpmd: add MPLSoGRE encapsulation
  app/testpmd: add decap l3 command

 app/test-pmd/cmdline.c  | 434 
 app/test-pmd/cmdline_flow.c | 317 
 app/test-pmd/testpmd.h  |  42 +++
 doc/guides/testpmd_app_ug/testpmd_funcs.rst | 131 +
 4 files changed, 924 insertions(+)

-- 
1.8.3.1

[dpdk-dev] [PATCH 1/3] app/testpmd: add MPLSoUDP encapsulation

[Ori Kam]

MPLSoUDP is an example for L3 tunnel encapsulation.

Due to the complex encapsulation of MPLSoUDP flow action and based on the
fact testpmd does not allocate memory, this patch adds a new command in
testpmd to initialise a global structure containing the necessary
information to make the outer layer of the packet.  This same global
structure will then be used by the flow command line in testpmd when the
action mplsoudp_encap will be parsed, at this point, the conversion into
such action becomes trivial.

This global structure is only used for the encap action.

Signed-off-by: Ori Kam 
---
 app/test-pmd/cmdline.c  | 175 
 app/test-pmd/cmdline_flow.c | 123 +++
 app/test-pmd/testpmd.h  |  17 +++
 doc/guides/testpmd_app_ug/testpmd_funcs.rst |  50 
 4 files changed, 365 insertions(+)

diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 589121d..10d9489 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -15186,6 +15186,179 @@ static void cmd_set_nvgre_parsed(void *parsed_result,
},
 };
 
+/** Set MPLSoUDP encapsulation details */
+struct cmd_set_mplsoudp_result {
+   cmdline_fixed_string_t set;
+   cmdline_fixed_string_t mplsoudp;
+   cmdline_fixed_string_t pos_token;
+   cmdline_fixed_string_t ip_version;
+   uint32_t vlan_present:1;
+   uint32_t label;
+   uint16_t udp_src;
+   uint16_t udp_dst;
+   cmdline_ipaddr_t ip_src;
+   cmdline_ipaddr_t ip_dst;
+   uint16_t tci;
+   struct ether_addr eth_src;
+   struct ether_addr eth_dst;
+};
+
+cmdline_parse_token_string_t cmd_set_mplsoudp_set =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsoudp_result, set, "set");
+cmdline_parse_token_string_t cmd_set_mplsoudp_mplsoudp =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsoudp_result, mplsoudp, 
"mplsoudp");
+cmdline_parse_token_string_t cmd_set_mplsoudp_mplsoudp_with_vlan =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsoudp_result, mplsoudp,
+"mplsoudp-with-vlan");
+cmdline_parse_token_string_t cmd_set_mplsoudp_ip_version =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsoudp_result, pos_token,
+"ip-version");
+cmdline_parse_token_string_t cmd_set_mplsoudp_ip_version_value =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsoudp_result, ip_version,
+"ipv4#ipv6");
+cmdline_parse_token_string_t cmd_set_mplsoudp_label =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsoudp_result, pos_token,
+"label");
+cmdline_parse_token_num_t cmd_set_mplsoudp_label_value =
+   TOKEN_NUM_INITIALIZER(struct cmd_set_mplsoudp_result, label, UINT32);
+cmdline_parse_token_string_t cmd_set_mplsoudp_udp_src =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsoudp_result, pos_token,
+"udp-src");
+cmdline_parse_token_num_t cmd_set_mplsoudp_udp_src_value =
+   TOKEN_NUM_INITIALIZER(struct cmd_set_mplsoudp_result, udp_src, UINT16);
+cmdline_parse_token_string_t cmd_set_mplsoudp_udp_dst =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsoudp_result, pos_token,
+"udp-dst");
+cmdline_parse_token_num_t cmd_set_mplsoudp_udp_dst_value =
+   TOKEN_NUM_INITIALIZER(struct cmd_set_mplsoudp_result, udp_dst, UINT16);
+cmdline_parse_token_string_t cmd_set_mplsoudp_ip_src =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsoudp_result, pos_token,
+"ip-src");
+cmdline_parse_token_ipaddr_t cmd_set_mplsoudp_ip_src_value =
+   TOKEN_IPADDR_INITIALIZER(struct cmd_set_mplsoudp_result, ip_src);
+cmdline_parse_token_string_t cmd_set_mplsoudp_ip_dst =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsoudp_result, pos_token,
+"ip-dst");
+cmdline_parse_token_ipaddr_t cmd_set_mplsoudp_ip_dst_value =
+   TOKEN_IPADDR_INITIALIZER(struct cmd_set_mplsoudp_result, ip_dst);
+cmdline_parse_token_string_t cmd_set_mplsoudp_vlan =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsoudp_result, pos_token,
+"vlan-tci");
+cmdline_parse_token_num_t cmd_set_mplsoudp_vlan_value =
+   TOKEN_NUM_INITIALIZER(struct cmd_set_mplsoudp_result, tci, UINT16);
+cmdline_parse_token_string_t cmd_set_mplsoudp_eth_src =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsoudp_result, pos_token,
+"eth-src");
+cmdline_parse_token_etheraddr_t cmd_set_mplsoudp_eth_src_value =
+   TOKEN_ETHERADDR_INITIALIZER(struct cmd_set_mplsoudp_result, eth_src);
+cmdline_parse_token_string_t cmd_set_mplsoudp_eth_dst =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsoudp_result, pos_token,
+"eth-dst");
+cmdline_parse_token_etheraddr_t cmd_set_mplsoudp_eth_dst_value =
+   TOKEN_ETHERADDR_INITIALIZER(struct cmd

[dpdk-dev] [PATCH 2/3] app/testpmd: add MPLSoGRE encapsulation

[Ori Kam]

Due to the complex encapsulation of MPLSoGRE flow action and based on
the fact testpmd does not allocate memory, this patch adds a new command
in testpmd to initialise a global structure containing the necessary
information to make the outer layer of the packet.  This same global
structure will then be used by the flow command line in testpmd when
the action mplsoudp_encap will be parsed, at this point, the conversion
into such action becomes trivial.

Signed-off-by: Ori Kam 
---
 app/test-pmd/cmdline.c  | 153 
 app/test-pmd/cmdline_flow.c | 113 
 app/test-pmd/testpmd.h  |  15 +++
 doc/guides/testpmd_app_ug/testpmd_funcs.rst |  46 +
 4 files changed, 327 insertions(+)

diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 10d9489..2428b04 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -15359,6 +15359,157 @@ static void cmd_set_mplsoudp_parsed(void 
*parsed_result,
},
 };
 
+/** Set MPLSoGRE encapsulation details */
+struct cmd_set_mplsogre_result {
+   cmdline_fixed_string_t set;
+   cmdline_fixed_string_t mplsogre;
+   cmdline_fixed_string_t pos_token;
+   cmdline_fixed_string_t ip_version;
+   uint32_t vlan_present:1;
+   uint32_t label;
+   cmdline_ipaddr_t ip_src;
+   cmdline_ipaddr_t ip_dst;
+   uint16_t tci;
+   struct ether_addr eth_src;
+   struct ether_addr eth_dst;
+};
+
+cmdline_parse_token_string_t cmd_set_mplsogre_set =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsogre_result, set, "set");
+cmdline_parse_token_string_t cmd_set_mplsogre_mplsogre =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsogre_result, mplsogre,
+"mplsogre");
+cmdline_parse_token_string_t cmd_set_mplsogre_mplsogre_with_vlan =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsogre_result, mplsogre,
+"mplsogre-with-vlan");
+cmdline_parse_token_string_t cmd_set_mplsogre_ip_version =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsogre_result, pos_token,
+"ip-version");
+cmdline_parse_token_string_t cmd_set_mplsogre_ip_version_value =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsogre_result, ip_version,
+"ipv4#ipv6");
+cmdline_parse_token_string_t cmd_set_mplsogre_label =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsogre_result, pos_token,
+"label");
+cmdline_parse_token_num_t cmd_set_mplsogre_label_value =
+   TOKEN_NUM_INITIALIZER(struct cmd_set_mplsogre_result, label, UINT32);
+cmdline_parse_token_string_t cmd_set_mplsogre_ip_src =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsogre_result, pos_token,
+"ip-src");
+cmdline_parse_token_ipaddr_t cmd_set_mplsogre_ip_src_value =
+   TOKEN_IPADDR_INITIALIZER(struct cmd_set_mplsogre_result, ip_src);
+cmdline_parse_token_string_t cmd_set_mplsogre_ip_dst =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsogre_result, pos_token,
+"ip-dst");
+cmdline_parse_token_ipaddr_t cmd_set_mplsogre_ip_dst_value =
+   TOKEN_IPADDR_INITIALIZER(struct cmd_set_mplsogre_result, ip_dst);
+cmdline_parse_token_string_t cmd_set_mplsogre_vlan =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsogre_result, pos_token,
+"vlan-tci");
+cmdline_parse_token_num_t cmd_set_mplsogre_vlan_value =
+   TOKEN_NUM_INITIALIZER(struct cmd_set_mplsogre_result, tci, UINT16);
+cmdline_parse_token_string_t cmd_set_mplsogre_eth_src =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsogre_result, pos_token,
+"eth-src");
+cmdline_parse_token_etheraddr_t cmd_set_mplsogre_eth_src_value =
+   TOKEN_ETHERADDR_INITIALIZER(struct cmd_set_mplsogre_result, eth_src);
+cmdline_parse_token_string_t cmd_set_mplsogre_eth_dst =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_mplsogre_result, pos_token,
+"eth-dst");
+cmdline_parse_token_etheraddr_t cmd_set_mplsogre_eth_dst_value =
+   TOKEN_ETHERADDR_INITIALIZER(struct cmd_set_mplsogre_result, eth_dst);
+
+static void cmd_set_mplsogre_parsed(void *parsed_result,
+   __attribute__((unused)) struct cmdline *cl,
+   __attribute__((unused)) void *data)
+{
+   struct cmd_set_mplsogre_result *res = parsed_result;
+   union {
+   uint32_t mplsogre_label;
+   uint8_t label[3];
+   } id = {
+   .mplsogre_label =
+   rte_cpu_to_be_32(res->label) & RTE_BE32(0x00ff),
+   };
+
+   if (strcmp(res->mplsogre, "mplsogre") == 0)
+   mplsogre_encap_conf.select_vlan = 0;
+   else if (strcmp(res->mplsogre, "mplsogre-with-vlan") == 0)
+   mplsogre_encap_conf.select_vlan = 1;
+   if (strcmp(res->ip_version, "ipv4") == 0)
+ 

[dpdk-dev] [PATCH 3/3] app/testpmd: add decap l3 command

[Ori Kam]

This commit introduce the decapsulation of L3 tunnels.
L3 tunnels are tunnels that the inner packet is missing the L3 layer.
This command uses the generic L3 decap command and decapsulate any
tunnel by replacing the outer layers with the supplied L2.

Signed-off-by: Ori Kam 
---
 app/test-pmd/cmdline.c  | 106 
 app/test-pmd/cmdline_flow.c |  81 +
 app/test-pmd/testpmd.h  |  10 +++
 doc/guides/testpmd_app_ug/testpmd_funcs.rst |  35 +
 4 files changed, 232 insertions(+)

diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 2428b04..8fa241f 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -15510,6 +15510,110 @@ static void cmd_set_mplsogre_parsed(void 
*parsed_result,
},
 };
 
+/** Set decapsulation L3 details */
+struct cmd_set_decap_l3_result {
+   cmdline_fixed_string_t set;
+   cmdline_fixed_string_t decap_l3;
+   cmdline_fixed_string_t pos_token;
+   cmdline_fixed_string_t ip_version;
+   uint32_t vlan_present:1;
+   uint16_t tci;
+   struct ether_addr eth_src;
+   struct ether_addr eth_dst;
+};
+
+cmdline_parse_token_string_t cmd_set_decap_l3_set =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_decap_l3_result, set, "set");
+cmdline_parse_token_string_t cmd_set_decap_l3_decap_l3 =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_decap_l3_result, decap_l3,
+"decap_l3");
+cmdline_parse_token_string_t cmd_set_decap_l3_decap_l3_with_vlan =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_decap_l3_result, decap_l3,
+"decap_l3-with-vlan");
+cmdline_parse_token_string_t cmd_set_decap_l3_ip_version =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_decap_l3_result, pos_token,
+"ip-version");
+cmdline_parse_token_string_t cmd_set_decap_l3_ip_version_value =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_decap_l3_result, ip_version,
+"ipv4#ipv6");
+cmdline_parse_token_string_t cmd_set_decap_l3_vlan =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_decap_l3_result, pos_token,
+"vlan-tci");
+cmdline_parse_token_num_t cmd_set_decap_l3_vlan_value =
+   TOKEN_NUM_INITIALIZER(struct cmd_set_decap_l3_result, tci, UINT16);
+cmdline_parse_token_string_t cmd_set_decap_l3_eth_src =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_decap_l3_result, pos_token,
+"eth-src");
+cmdline_parse_token_etheraddr_t cmd_set_decap_l3_eth_src_value =
+   TOKEN_ETHERADDR_INITIALIZER(struct cmd_set_decap_l3_result, eth_src);
+cmdline_parse_token_string_t cmd_set_decap_l3_eth_dst =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_decap_l3_result, pos_token,
+"eth-dst");
+cmdline_parse_token_etheraddr_t cmd_set_decap_l3_eth_dst_value =
+   TOKEN_ETHERADDR_INITIALIZER(struct cmd_set_decap_l3_result, eth_dst);
+
+static void cmd_set_decap_l3_parsed(void *parsed_result,
+   __attribute__((unused)) struct cmdline *cl,
+   __attribute__((unused)) void *data)
+{
+   struct cmd_set_decap_l3_result *res = parsed_result;
+
+   if (strcmp(res->decap_l3, "decap_l3") == 0)
+   decap_l3_conf.select_vlan = 0;
+   else if (strcmp(res->decap_l3, "decap_l3-with-vlan") == 0)
+   decap_l3_conf.select_vlan = 1;
+   if (strcmp(res->ip_version, "ipv4") == 0)
+   decap_l3_conf.select_ipv4 = 1;
+   else if (strcmp(res->ip_version, "ipv6") == 0)
+   decap_l3_conf.select_ipv4 = 0;
+   else
+   return;
+   if (decap_l3_conf.select_vlan)
+   decap_l3_conf.vlan_tci = rte_cpu_to_be_16(res->tci);
+   rte_memcpy(decap_l3_conf.eth_src, res->eth_src.addr_bytes,
+  ETHER_ADDR_LEN);
+   rte_memcpy(decap_l3_conf.eth_dst, res->eth_dst.addr_bytes,
+  ETHER_ADDR_LEN);
+}
+
+cmdline_parse_inst_t cmd_set_decap_l3 = {
+   .f = cmd_set_decap_l3_parsed,
+   .data = NULL,
+   .help_str = "set decap_l3 ip-version ipv4|ipv6 eth-src "
+   " eth-dst ",
+   .tokens = {
+   (void *)&cmd_set_decap_l3_set,
+   (void *)&cmd_set_decap_l3_decap_l3,
+   (void *)&cmd_set_decap_l3_ip_version,
+   (void *)&cmd_set_decap_l3_ip_version_value,
+   (void *)&cmd_set_decap_l3_eth_src,
+   (void *)&cmd_set_decap_l3_eth_src_value,
+   (void *)&cmd_set_decap_l3_eth_dst,
+   (void *)&cmd_set_decap_l3_eth_dst_value,
+   NULL,
+   },
+};
+
+cmdline_parse_inst_t cmd_set_decap_l3_with_vlan = {
+   .f = cmd_set_decap_l3_parsed,
+   .data = NULL,
+   .help_str = "set decap_l3-with-vlan ip-version ipv4|ipv6"
+   " vlan-tci  eth-src  eth-dst ",
+   .tokens = {
+   (void *)&cmd_set_decap_l3

Re: [dpdk-dev] [PATCH v2 5/7] hash: add extendable bucket feature

[Honnappa Nagarahalli]

> >
> > > > > +/* Allocate same number of extendable buckets */
> > > > IMO, we are allocating too much memory to support this feature.
> > > > Especially,
> > > when we claim that keys ending up in the extendable table is a rare
> > > occurrence. By doubling the memory we are effectively saying that
> > > the main table might have 50% utilization. It will also
> > > significantly increase the cycles required to iterate the complete
> > > hash table (in rte_hash_iterate API) even when we expect that the
> > > extendable table
> > contains very few entries.
> > > >
> > > > I am wondering if we can provide options to control the amount of
> > > > extra
> > > memory that gets allocated and make the memory allocation dynamic
> > > (or on demand basis). I think this also goes well with the general
> > > direction DPDK is taking - allocate resources as needed rather than
> > > allocating all the resources during initialization.
> > > >
> > >
> > > Given that adding new entries should not normally be a fast-path
> > > function, how about allowing memory allocation in add itself. Why
> > > not initialize with a fairly small number of extra bucket entries,
> > > and then each time they are all used, double the number of entries.
> > > That will give efficient resource scaling, I think.
> > >
> > +1
> > 'small number of extra bucket entries' == 5% of total capacity
> > requested (assuming cuckoo hash will provide 95% efficiency)
> >
> > > /Bruce
>  [Wang, Yipeng]
> Thanks for the comments.
> We allocate same as table size for extendable buckets at creation because the
> purpose is to provide capacity guarantee even for the worst scenario (all keys
> collide in same buckets).
> Applications (e.g. Telco workloads) that require 100% capacity guarantee will
> be sure that insertion always succeeds below the specified table size.
> With any dynamic memory allocation or less buckets, this guarantee is broken
> (even if it is very rare). The dynamic memory allocation could fail.
> 
> Users who do not need such behavior can disable this feature.
> Given that the cuckoo algorithm already ensures very high utilization, they
> usually do not need the extendable buckets.
Adding the dynamic memory allocation will make the code complicated. It is also 
possible that, keeping this feature disabled, one can create the table with 
more than required number of entries. I suggest we document the reason for 
doubling the memory. If someone sees a concrete requirement for dynamic 
allocation in the future, the code can be changed.

Re: [dpdk-dev] [PATCH v5 07/10] examples/power: add json string handling

[Yao, Lei A]

> +#ifdef USE_JANSSON
> +static int
> +parse_json_to_pkt(json_t *element, struct channel_packet *pkt)
> +{
> + const char *key;
> + json_t *value;
> + int ret;
> +
> + memset(pkt, 0, sizeof(struct channel_packet));
> +
> + pkt->nb_mac_to_monitor = 0;
> + pkt->t_boost_status.tbEnabled = false;
> + pkt->workload = LOW;
> + pkt->policy_to_use = TIME;
> + pkt->command = PKT_POLICY;
> + pkt->core_type = CORE_TYPE_PHYSICAL;
> +


Hi, Dave

For the workload policy ,  it's set to LOW by default,
but we can't change it again using JSON file channel. Is it 
by design?  

Re: [dpdk-dev] [PATCH] drivers/net/i40e/:remove i40e_nvmupd_command redundant code

[Zhang, Qi Z]

Hi Han:

> -Original Message-
> From: Li Han [mailto:han@zte.com.cn]
> Sent: Thursday, September 27, 2018 3:27 PM
> To: Zhang, Qi Z 
> Cc: dev@dpdk.org; Li Han 
> Subject: [PATCH] [dpdk-dev] drivers/net/i40e/:remove
> i40e_nvmupd_command redundant code
> 
> in function i40e_nvmupd_validate_command, when "cmd->data_size < 1"
> it'll return I40E_NVMUPD_INVALID,and in function "i40e_nvmupd_command"
> when "upd_cmd == I40E_NVMUPD_STATUS",it check "!cmd->data_size" again,
> but it's no need.

Thanks for contribute this.
I have no objection for this change.

But you know , base code is kind of special code in driver, it is shared by 
different platform,
Intel DPDk team will update base code timely based on Intel's base code team's 
release.
So we are not prefer to make much difference from the original version which 
make things complex for code update.
So usually we will only accept necessary patch (like critical fix, missing 
device configure... which may impact our customer)

Since this is the patch for code clean, I think it's better we just feedback to 
our base code team , and hope this could be captured in next update.
Is that ok for you?
Thanks for your understanding

Regards
Qi
> 
> Signed-off-by: Li Han 
> ---
>  drivers/net/i40e/base/i40e_nvm.c | 5 -
>  1 file changed, 5 deletions(-)
> 
> diff --git a/drivers/net/i40e/base/i40e_nvm.c
> b/drivers/net/i40e/base/i40e_nvm.c
> index c77dac0..5de22e4 100644
> --- a/drivers/net/i40e/base/i40e_nvm.c
> +++ b/drivers/net/i40e/base/i40e_nvm.c
> @@ -869,11 +869,6 @@ enum i40e_status_code
> i40e_nvmupd_command(struct i40e_hw *hw,
>* going into the state machine
>*/
>   if (upd_cmd == I40E_NVMUPD_STATUS) {
> - if (!cmd->data_size) {
> - *perrno = -EFAULT;
> - return I40E_ERR_BUF_TOO_SHORT;
> - }
> -
>   bytes[0] = hw->nvmupd_state;
> 
>   if (cmd->data_size >= 4) {
> --
> 1.8.3.1

Re: [dpdk-dev] [PATCH] ixgbe: wait longer for link after fiber MAC setup

[Zhang, Qi Z]

> -Original Message-
> From: dev [mailto:dev-boun...@dpdk.org]
> Sent: Tuesday, July 17, 2018 12:36 AM
> To: Lu, Wenzhuo ; Ananyev, Konstantin
> 
> Cc: dev@dpdk.org; sta...@dpdk.org; Matthew Smith 
> Subject: [dpdk-dev] [PATCH] ixgbe: wait longer for link after fiber MAC setup
> 
> After setting up the link on a fiber port, the maximum wait time for the link 
> to
> come up is 500 ms in ixgbe_setup_mac_link_multispeed_fiber().
> On an x550 SFP+ port, this is often not sufficiently long for the link to 
> come up.
> This can result in never being able to retrieve accurate link status for the 
> port
> using rte_eth_link_get_nowait().
> 
> Increase the maximum wait time in ixgbe_setup_mac_link_multispeed_fiber()
> to 1 s.
> 
> Bugzilla ID: 69
> Fixes: f3430431abaf ("ixgbe/base: add SFP+ dual-speed support")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Matthew Smith 

Acked-by: Qi Zhang 

Applied to dpdk-next-net-intel.

Thanks
Qi

[dpdk-dev] [PATCH v4] net/i40e: config fdir automatically

[Xiaoyun Li]

I40e driver needed users to config exact fdir mode to create rte_flow
rules but it shouldn't. This patch allows users to create rte_flow rules
without configuring fdir mode and let the driver config fdir automatically.
And remove the workaround in flow filtering example.

Signed-off-by: Xiaoyun Li 
---
v4:
 * Polished commit log.
 * Added comments that the original fdir config codes should be removed
 * when the legacy filter API is deprecated.
v3:
 * Fixed fdir config doesn't automatically remove when last flow is
 * destroyed.
v2:
 * Added fdir teardown in i40e_flow_flush_fdir_filter.
 * Replace TAILQ_FIRST with TAILQ_EMPTY which is more intuitive.
 * Remove the workaround in flow_filtering example since the driver will
 * set the fdir config automatically.
---
 drivers/net/i40e/i40e_ethdev.c | 10 +-
 drivers/net/i40e/i40e_flow.c   | 35 +-
 examples/flow_filtering/main.c | 16 
 3 files changed, 39 insertions(+), 22 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index de25de650..3fd0d5dbf 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -1787,6 +1787,10 @@ i40e_dev_configure(struct rte_eth_dev *dev)
ad->tx_simple_allowed = true;
ad->tx_vec_allowed = true;
 
+   /* Only legacy filter API needs the following fdir config. So when the
+* legacy filter API is deprecated, the following codes should also be
+* removed.
+*/
if (dev->data->dev_conf.fdir_conf.mode == RTE_FDIR_MODE_PERFECT) {
ret = i40e_fdir_setup(pf);
if (ret != I40E_SUCCESS) {
@@ -1844,7 +1848,11 @@ i40e_dev_configure(struct rte_eth_dev *dev)
rte_free(pf->vmdq);
pf->vmdq = NULL;
 err:
-   /* need to release fdir resource if exists */
+   /* Need to release fdir resource if exists.
+* Only legacy filter API needs the following fdir config. So when the
+* legacy filter API is deprecated, the following code should also be
+* removed.
+*/
i40e_fdir_teardown(pf);
return ret;
 }
diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
index c67b264de..68ae00a27 100644
--- a/drivers/net/i40e/i40e_flow.c
+++ b/drivers/net/i40e/i40e_flow.c
@@ -3127,6 +3127,7 @@ i40e_flow_parse_fdir_filter(struct rte_eth_dev *dev,
struct rte_flow_error *error,
union i40e_filter_t *filter)
 {
+   struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
struct i40e_fdir_filter_conf *fdir_filter =
&filter->fdir_filter;
int ret;
@@ -3148,14 +3149,29 @@ i40e_flow_parse_fdir_filter(struct rte_eth_dev *dev,
 
if (dev->data->dev_conf.fdir_conf.mode !=
RTE_FDIR_MODE_PERFECT) {
-   rte_flow_error_set(error, ENOTSUP,
-  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
-  NULL,
-  "Check the mode in fdir_conf.");
-   return -rte_errno;
+   /* Enable fdir when fdir flow is added at first time. */
+   ret = i40e_fdir_setup(pf);
+   if (ret != I40E_SUCCESS) {
+   rte_flow_error_set(error, ENOTSUP,
+  RTE_FLOW_ERROR_TYPE_HANDLE,
+  NULL, "Failed to setup fdir.");
+   return -rte_errno;
+   }
+   ret = i40e_fdir_configure(dev);
+   if (ret < 0) {
+   rte_flow_error_set(error, ENOTSUP,
+  RTE_FLOW_ERROR_TYPE_HANDLE,
+  NULL, "Failed to configure fdir.");
+   goto err;
+   }
+
+   dev->data->dev_conf.fdir_conf.mode = RTE_FDIR_MODE_PERFECT;
}
 
return 0;
+err:
+   i40e_fdir_teardown(pf);
+   return -rte_errno;
 }
 
 /* Parse to get the action info of a tunnel filter
@@ -4708,6 +4724,13 @@ i40e_flow_destroy(struct rte_eth_dev *dev,
case RTE_ETH_FILTER_FDIR:
ret = i40e_flow_add_del_fdir_filter(dev,
   &((struct i40e_fdir_filter *)flow->rule)->fdir, 0);
+
+   /* If the last flow is destroyed, disable fdir. */
+   if (!ret && !TAILQ_EMPTY(&pf->fdir.fdir_list)) {
+   i40e_fdir_teardown(pf);
+   dev->data->dev_conf.fdir_conf.mode =
+  RTE_FDIR_MODE_NONE;
+   }
break;
case RTE_ETH_FILTER_HASH:
ret = i40e_config_rss_filter_del(dev,
@@ -4900,6 +4923,8 @@ i40e_flow_flush_fdir_filter(struct i40e_pf *pf)
pf->fdir.inset_flag[pctype] = 0;
}
 
+   i40e_fdir_teardown(pf);
+
return ret;
 }
 
diff --gi

Re: [dpdk-dev] [PATCH] doc: add known issue about legacy intr mode for ixgbe

[Zhang, Qi Z]

> -Original Message-
> From: Li, Xiaoyun
> Sent: Thursday, September 27, 2018 5:17 PM
> To: Xing, Beilei ; Zhang, Qi Z ;
> dev@dpdk.org; Lu, Wenzhuo ; Wu, Jingjing
> 
> Cc: Li, Xiaoyun 
> Subject: [PATCH] doc: add known issue about legacy intr mode for ixgbe
> 
> When using uio_pci_generic module or using legacy interrupt mode of igb_uio
> or vfio, X550 cannot get interrupts. Because the Interrupt Status bit is not
> implemented, then the irq cannot be handled correctly and cannot report the
> event fd to DPDK apps.
> 
> Add this hw limitation and details into ixgbe known issue.
> 
> Signed-off-by: Xiaoyun Li 
> ---
>  doc/guides/nics/ixgbe.rst | 26 ++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/doc/guides/nics/ixgbe.rst b/doc/guides/nics/ixgbe.rst index
> 16d6390..4f89a6d 100644
> --- a/doc/guides/nics/ixgbe.rst
> +++ b/doc/guides/nics/ixgbe.rst
> @@ -200,6 +200,32 @@ There is no RTE API to add a VF's MAC address from
> the PF. On ixgbe, the  ``rte_eth_dev_mac_addr_add()`` function can be used
> to add a VF's MAC address,  as a workaround.
> 
> +legacy interrupt mode and uio pci generic module cannot be used in X550
> +
> ~~~

the reason we can't use uio_pci_generic, is it also because uio_pci_generic 
require legacy mode?
If it is, can we simplified the title as " x550 does not support legacy 
interrupt mode"

> +
> +Desccription
> +
> +X550 cannot get interrupts if using ``uio_pci_generic`` module or using
> +legacy interrupt mode of ``igb_uio`` or ``vfio``. Because the errata of
> +X550 states that the Interrupt Status bit is not implemented. The
> +errata is the item #22 from `X550 spec update
> + heet
> +s/ethernet-x550-spec-update.pdf>`_

Seems the url here is not correct, there is no errata item #22

Regards
Qi

> +
> +Implication
> +^^^
> +When using ``uio_pci_generic`` module or using legacy interrupt mode of
> +``igb_uio`` or ``vfio``, the Interrupt Status bit would be checked if
> +the interrupt is comming. Since the bit is not implemented in X550, the
> +irq cannot be handled correctly and cannot report the event fd to DPDK
> +apps. Then apps cannot get interrupts and ``dmesg`` will show messages
> +like ``irq #No.: `` ``nobody cared.``
> +
> +Workaround
> +^^
> +Do not bind the ``uio_pci_generic`` module in X550 NICs.
> +Do not bind ``igb_uio`` with legacy mode in X550 NICs.
> +Before using ``vfio`` with legacy mode in X550 NICs, using ``modprobe
> +vfio `` ``nointxmask=1`` to bind ``vfio``.
> 
>  Inline crypto processing support
>  
> --
> 2.7.4

[dpdk-dev] [PATCH v5] net/i40e: config fdir automatically

[Xiaoyun Li]

I40e driver needed users to config exact fdir mode to create rte_flow
rules but it shouldn't. This patch allows users to create rte_flow rules
without configuring fdir mode and let the driver config fdir automatically.
And remove the workaround in flow filtering example.

Signed-off-by: Xiaoyun Li 
---
v5:
 * Added missing comment in v4.
v4:
 * Polished commit log.
 * Added comments that the original fdir config codes should be removed
 * when the legacy filter API is deprecated.
v3:
 * Fixed fdir config doesn't automatically remove when last flow is
 * destroyed.
v2:
 * Added fdir teardown in i40e_flow_flush_fdir_filter.
 * Replace TAILQ_FIRST with TAILQ_EMPTY which is more intuitive.
 * Remove the workaround in flow_filtering example since the driver will
 * set the fdir config automatically.
---
 drivers/net/i40e/i40e_ethdev.c | 15 ++-
 drivers/net/i40e/i40e_flow.c   | 35 +-
 examples/flow_filtering/main.c | 16 
 3 files changed, 44 insertions(+), 22 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index de25de650..63e5b4c85 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -1787,6 +1787,10 @@ i40e_dev_configure(struct rte_eth_dev *dev)
ad->tx_simple_allowed = true;
ad->tx_vec_allowed = true;
 
+   /* Only legacy filter API needs the following fdir config. So when the
+* legacy filter API is deprecated, the following codes should also be
+* removed.
+*/
if (dev->data->dev_conf.fdir_conf.mode == RTE_FDIR_MODE_PERFECT) {
ret = i40e_fdir_setup(pf);
if (ret != I40E_SUCCESS) {
@@ -1844,7 +1848,11 @@ i40e_dev_configure(struct rte_eth_dev *dev)
rte_free(pf->vmdq);
pf->vmdq = NULL;
 err:
-   /* need to release fdir resource if exists */
+   /* Need to release fdir resource if exists.
+* Only legacy filter API needs the following fdir config. So when the
+* legacy filter API is deprecated, the following code should also be
+* removed.
+*/
i40e_fdir_teardown(pf);
return ret;
 }
@@ -2482,6 +2490,11 @@ i40e_dev_close(struct rte_eth_dev *dev)
i40e_pf_disable_irq0(hw);
rte_intr_disable(intr_handle);
 
+   /*
+* Only legacy filter API needs the following fdir config. So when the
+* legacy filter API is deprecated, the following code should also be
+* removed.
+*/
i40e_fdir_teardown(pf);
 
/* shutdown and destroy the HMC */
diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
index c67b264de..68ae00a27 100644
--- a/drivers/net/i40e/i40e_flow.c
+++ b/drivers/net/i40e/i40e_flow.c
@@ -3127,6 +3127,7 @@ i40e_flow_parse_fdir_filter(struct rte_eth_dev *dev,
struct rte_flow_error *error,
union i40e_filter_t *filter)
 {
+   struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
struct i40e_fdir_filter_conf *fdir_filter =
&filter->fdir_filter;
int ret;
@@ -3148,14 +3149,29 @@ i40e_flow_parse_fdir_filter(struct rte_eth_dev *dev,
 
if (dev->data->dev_conf.fdir_conf.mode !=
RTE_FDIR_MODE_PERFECT) {
-   rte_flow_error_set(error, ENOTSUP,
-  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
-  NULL,
-  "Check the mode in fdir_conf.");
-   return -rte_errno;
+   /* Enable fdir when fdir flow is added at first time. */
+   ret = i40e_fdir_setup(pf);
+   if (ret != I40E_SUCCESS) {
+   rte_flow_error_set(error, ENOTSUP,
+  RTE_FLOW_ERROR_TYPE_HANDLE,
+  NULL, "Failed to setup fdir.");
+   return -rte_errno;
+   }
+   ret = i40e_fdir_configure(dev);
+   if (ret < 0) {
+   rte_flow_error_set(error, ENOTSUP,
+  RTE_FLOW_ERROR_TYPE_HANDLE,
+  NULL, "Failed to configure fdir.");
+   goto err;
+   }
+
+   dev->data->dev_conf.fdir_conf.mode = RTE_FDIR_MODE_PERFECT;
}
 
return 0;
+err:
+   i40e_fdir_teardown(pf);
+   return -rte_errno;
 }
 
 /* Parse to get the action info of a tunnel filter
@@ -4708,6 +4724,13 @@ i40e_flow_destroy(struct rte_eth_dev *dev,
case RTE_ETH_FILTER_FDIR:
ret = i40e_flow_add_del_fdir_filter(dev,
   &((struct i40e_fdir_filter *)flow->rule)->fdir, 0);
+
+   /* If the last flow is destroyed, disable fdir. */
+   if (!ret && !TAILQ_EMPTY(&pf->fdir.fdir_list)) {
+   i40e_fdir_teardown(p

Re: [dpdk-dev] [PATCH v5] net/i40e: config fdir automatically

[Xing, Beilei]

> -Original Message-
> From: Li, Xiaoyun
> Sent: Sunday, September 30, 2018 10:30 AM
> To: Yigit, Ferruh ; Zhang, Qi Z
> ; Xing, Beilei ; dev@dpdk.org
> Cc: Li, Xiaoyun 
> Subject: [PATCH v5] net/i40e: config fdir automatically
> 
> I40e driver needed users to config exact fdir mode to create rte_flow rules
> but it shouldn't. This patch allows users to create rte_flow rules without
> configuring fdir mode and let the driver config fdir automatically.
> And remove the workaround in flow filtering example.
> 
> Signed-off-by: Xiaoyun Li 

Acked-by: Beilei Xing 

Re: [dpdk-dev] [PATCH] doc: add known issue about legacy intr mode for ixgbe

[Li, Xiaoyun]

Hi

> -Original Message-
> From: Zhang, Qi Z
> Sent: Sunday, September 30, 2018 10:25
> To: Li, Xiaoyun ; Xing, Beilei ;
> dev@dpdk.org; Lu, Wenzhuo ; Wu, Jingjing
> 
> Subject: RE: [PATCH] doc: add known issue about legacy intr mode for ixgbe
> 
> 
> 
> > -Original Message-
> > From: Li, Xiaoyun
> > Sent: Thursday, September 27, 2018 5:17 PM
> > To: Xing, Beilei ; Zhang, Qi Z
> > ; dev@dpdk.org; Lu, Wenzhuo
> > ; Wu, Jingjing 
> > Cc: Li, Xiaoyun 
> > Subject: [PATCH] doc: add known issue about legacy intr mode for ixgbe
> >
> > When using uio_pci_generic module or using legacy interrupt mode of
> > igb_uio or vfio, X550 cannot get interrupts. Because the Interrupt
> > Status bit is not implemented, then the irq cannot be handled
> > correctly and cannot report the event fd to DPDK apps.
> >
> > Add this hw limitation and details into ixgbe known issue.
> >
> > Signed-off-by: Xiaoyun Li 
> > ---
> >  doc/guides/nics/ixgbe.rst | 26 ++
> >  1 file changed, 26 insertions(+)
> >
> > diff --git a/doc/guides/nics/ixgbe.rst b/doc/guides/nics/ixgbe.rst
> > index 16d6390..4f89a6d 100644
> > --- a/doc/guides/nics/ixgbe.rst
> > +++ b/doc/guides/nics/ixgbe.rst
> > @@ -200,6 +200,32 @@ There is no RTE API to add a VF's MAC address
> > from the PF. On ixgbe, the  ``rte_eth_dev_mac_addr_add()`` function
> > can be used to add a VF's MAC address,  as a workaround.
> >
> > +legacy interrupt mode and uio pci generic module cannot be used in
> > +X550
> ~~~
> ~
> > ~~~
> 
> the reason we can't use uio_pci_generic, is it also because uio_pci_generic
> require legacy mode?
> If it is, can we simplified the title as " x550 does not support legacy 
> interrupt
> mode"

Sure.

> 
> > +
> > +Desccription
> > +
> > +X550 cannot get interrupts if using ``uio_pci_generic`` module or
> > +using legacy interrupt mode of ``igb_uio`` or ``vfio``. Because the
> > +errata of
> > +X550 states that the Interrupt Status bit is not implemented. The
> > +errata is the item #22 from `X550 spec update
> >
> + as
> > heet
> > +s/ethernet-x550-spec-update.pdf>`_
> 
> Seems the url here is not correct, there is no errata item #22
Yes. Will correct it.
Thanks.

> 
> Regards
> Qi
> 
> > +
> > +Implication
> > +^^^
> > +When using ``uio_pci_generic`` module or using legacy interrupt mode
> > +of ``igb_uio`` or ``vfio``, the Interrupt Status bit would be checked
> > +if the interrupt is comming. Since the bit is not implemented in
> > +X550, the irq cannot be handled correctly and cannot report the event
> > +fd to DPDK apps. Then apps cannot get interrupts and ``dmesg`` will
> > +show messages like ``irq #No.: `` ``nobody cared.``
> > +
> > +Workaround
> > +^^
> > +Do not bind the ``uio_pci_generic`` module in X550 NICs.
> > +Do not bind ``igb_uio`` with legacy mode in X550 NICs.
> > +Before using ``vfio`` with legacy mode in X550 NICs, using ``modprobe
> > +vfio `` ``nointxmask=1`` to bind ``vfio``.
> >
> >  Inline crypto processing support
> >  
> > --
> > 2.7.4

[dpdk-dev] [PATCH v2] doc: add known issue about legacy intr mode for ixgbe

[Xiaoyun Li]

When using uio_pci_generic module or using legacy interrupt mode of
igb_uio or vfio, X550 cannot get interrupts. Because the Interrupt
Status bit is not implemented, then the irq cannot be handled correctly
and cannot report the event fd to DPDK apps.

Add this hw limitation and details into ixgbe known issue.

Signed-off-by: Xiaoyun Li 
---
v2:
 * Correct the link of X550 spec update.
 * Polish the known issue title.
---
 doc/guides/nics/ixgbe.rst | 26 ++
 1 file changed, 26 insertions(+)

diff --git a/doc/guides/nics/ixgbe.rst b/doc/guides/nics/ixgbe.rst
index 16d6390..086b048 100644
--- a/doc/guides/nics/ixgbe.rst
+++ b/doc/guides/nics/ixgbe.rst
@@ -200,6 +200,32 @@ There is no RTE API to add a VF's MAC address from the PF. 
On ixgbe, the
 ``rte_eth_dev_mac_addr_add()`` function can be used to add a VF's MAC address,
 as a workaround.
 
+X550 does not support legacy interrupt mode
+~~~
+
+Desccription
+
+X550 cannot get interrupts if using ``uio_pci_generic`` module or using legacy
+interrupt mode of ``igb_uio`` or ``vfio``. Because the errata of X550 states
+that the Interrupt Status bit is not implemented. The errata is the item #22
+from `X550 spec update `_
+
+Implication
+^^^
+When using ``uio_pci_generic`` module or using legacy interrupt mode of
+``igb_uio`` or ``vfio``, the Interrupt Status bit would be checked if the
+interrupt is comming. Since the bit is not implemented in X550, the irq cannot
+be handled correctly and cannot report the event fd to DPDK apps. Then apps
+cannot get interrupts and ``dmesg`` will show messages like ``irq #No.: ``
+``nobody cared.``
+
+Workaround
+^^
+Do not bind the ``uio_pci_generic`` module in X550 NICs.
+Do not bind ``igb_uio`` with legacy mode in X550 NICs.
+Before using ``vfio`` with legacy mode in X550 NICs, using ``modprobe vfio ``
+``nointxmask=1`` to bind ``vfio``.
 
 Inline crypto processing support
 
-- 
2.7.4

[dpdk-dev] [PATCH v3] doc: add known issue about legacy intr mode for ixgbe

[Xiaoyun Li]

When using uio_pci_generic module or using legacy interrupt mode of
igb_uio or vfio, X550 cannot get interrupts. Because the Interrupt
Status bit is not implemented, then the irq cannot be handled correctly
and cannot report the event fd to DPDK apps.

Add this hw limitation and details into ixgbe known issue.

Signed-off-by: Xiaoyun Li 
---
v3:
 * Correct a misspelling.
v2:
 * Correct the link of X550 spec update.
 * Polish the known issue title.
---
 doc/guides/nics/ixgbe.rst | 26 ++
 1 file changed, 26 insertions(+)

diff --git a/doc/guides/nics/ixgbe.rst b/doc/guides/nics/ixgbe.rst
index 16d6390..af4c876 100644
--- a/doc/guides/nics/ixgbe.rst
+++ b/doc/guides/nics/ixgbe.rst
@@ -200,6 +200,32 @@ There is no RTE API to add a VF's MAC address from the PF. 
On ixgbe, the
 ``rte_eth_dev_mac_addr_add()`` function can be used to add a VF's MAC address,
 as a workaround.
 
+X550 does not support legacy interrupt mode
+~~~
+
+Desccription
+
+X550 cannot get interrupts if using ``uio_pci_generic`` module or using legacy
+interrupt mode of ``igb_uio`` or ``vfio``. Because the errata of X550 states
+that the Interrupt Status bit is not implemented. The errata is the item #22
+from `X550 spec update `_
+
+Implication
+^^^
+When using ``uio_pci_generic`` module or using legacy interrupt mode of
+``igb_uio`` or ``vfio``, the Interrupt Status bit would be checked if the
+interrupt is coming. Since the bit is not implemented in X550, the irq cannot
+be handled correctly and cannot report the event fd to DPDK apps. Then apps
+cannot get interrupts and ``dmesg`` will show messages like ``irq #No.: ``
+``nobody cared.``
+
+Workaround
+^^
+Do not bind the ``uio_pci_generic`` module in X550 NICs.
+Do not bind ``igb_uio`` with legacy mode in X550 NICs.
+Before using ``vfio`` with legacy mode in X550 NICs, using ``modprobe vfio ``
+``nointxmask=1`` to bind ``vfio``.
 
 Inline crypto processing support
 
-- 
2.7.4

Re: [dpdk-dev] [PATCH v5] net/i40e: config fdir automatically

[Zhang, Qi Z]

> -Original Message-
> From: Xing, Beilei
> Sent: Sunday, September 30, 2018 10:41 AM
> To: Li, Xiaoyun ; Yigit, Ferruh 
> ;
> Zhang, Qi Z ; dev@dpdk.org
> Subject: RE: [PATCH v5] net/i40e: config fdir automatically
> 
> 
> 
> > -Original Message-
> > From: Li, Xiaoyun
> > Sent: Sunday, September 30, 2018 10:30 AM
> > To: Yigit, Ferruh ; Zhang, Qi Z
> > ; Xing, Beilei ;
> > dev@dpdk.org
> > Cc: Li, Xiaoyun 
> > Subject: [PATCH v5] net/i40e: config fdir automatically
> >
> > I40e driver needed users to config exact fdir mode to create rte_flow
> > rules but it shouldn't. This patch allows users to create rte_flow
> > rules without configuring fdir mode and let the driver config fdir
> automatically.
> > And remove the workaround in flow filtering example.
> >
> > Signed-off-by: Xiaoyun Li 
> 
> Acked-by: Beilei Xing 

Applied to dpdk-next-net-intel.

Thanks
Qi

[dpdk-dev] [Bug 94] librte_acl library: First field in the rule definition can not be other types

[bugzilla]

https://bugs.dpdk.org/show_bug.cgi?id=94

Bug ID: 94
   Summary: librte_acl  library: First field in the rule
definition can not be other types
   Product: DPDK
   Version: 16.04
  Hardware: x86
OS: Linux
Status: CONFIRMED
  Severity: normal
  Priority: Normal
 Component: other
  Assignee: dev@dpdk.org
  Reporter: wavespi...@sina.com
  Target Milestone: ---

An ACL test program:
When  the first field's type of field definition is not
RTE_ACL_FIELD_TYPE_BITMASK, test data is always be matched.

-- 
You are receiving this mail because:
You are the assignee for the bug.

[dpdk-dev] [Bug 94] librte_acl library: First field in the rule definition can not be other types

[bugzilla]

https://bugs.dpdk.org/show_bug.cgi?id=94

JIMI (wavespi...@sina.com) changed:

   What|Removed |Added

 Status|CONFIRMED   |RESOLVED
 Resolution|--- |INVALID

--- Comment #1 from JIMI (wavespi...@sina.com) ---
test case issue

-- 
You are receiving this mail because:
You are the assignee for the bug.

Re: [dpdk-dev] [PATCH v3 3/3] ring: move the atomic load of head above the loop

[Stephen Hemminger]

On Wed, 26 Sep 2018 10:06:36 +
Justin He  wrote:

> Reviewed-by: Jia He 
> 
> Cheers,
> Justin (Jia He)
> IMPORTANT NOTICE: The contents of this email and any attachments are 
> confidential and may also be privileged. If you are not the intended 
> recipient, please notify the sender immediately and do not disclose the 
> contents to any other person, use it for any purpose, or store or copy the 
> information in any medium. Thank you.

Please adjust your corporate mail settings to remove this automatic footer
because the footer wording creates a legal conflict with the open and public
mailing lists.

Re: [dpdk-dev] [PATCH] kni: implement header_ops parse method

[Stephen Hemminger]

On Thu, 27 Sep 2018 03:02:24 +0300
Igor Ryzhov  wrote:

> +/*
> + *  Extract hardware address from packet
> + */
> +static int
> +kni_net_header_parse(const struct sk_buff *skb, unsigned char *haddr)
> +{
> + const struct ethhdr *eth = eth_hdr(skb);
> +
> + memcpy(haddr, eth->h_source, ETH_ALEN);
> +
> + return ETH_ALEN;
> +}

Kernel has function ether_addr_copy which is marginally faster and
commonly used.

[dpdk-dev] [PATCH 00/18] net/qede: base driver update

[Mody, Rasesh]

This patch set updates the base driver to use FW 8.37.7.0 and adds
support for other base driver functionalities. It also updates the
PMD version to 2.10.0.1.

Rasesh Mody (18):
  net/qede/base: upgrade to FW 8.37.7.0
  net/qede/base: check for EDPM enabled in DB recovery
  net/qede/base: add DPC sync after PF stop
  net/qede/base: workaround to indicate SHMEM data ready
  net/qede/base: add API to update FW RSS indirection table
  net/qede/base: add mf-bit/API for FIP special mode
  net/qede/base: add error handling for mutex allocation
  net/qede/base: adjust queue manager idx greater than max
  net/qede/base: add pretend function for port/PF
  net/qede/base: add support for SRIOV VF min rate
  net/qede/base: add periodic Doorbell Recovery support
  net/qede/base: get pre-negotiated OEM values
  net/qede/base: enable control frame filtering
  net/qede/base: changes for 100G
  net/qede/base: add RL update params
  net/qede/base: add APIs for dscp priority map configuration
  net/qede/base: semantic changes
  net/qede: bump PMD version to 2.10.0.1

 drivers/net/qede/base/bcm_osal.h  |2 +
 drivers/net/qede/base/common_hsi.h|   15 +-
 drivers/net/qede/base/ecore.h |   59 +-
 drivers/net/qede/base/ecore_cxt.c |   15 +-
 drivers/net/qede/base/ecore_dcbx.c|   99 +-
 drivers/net/qede/base/ecore_dcbx_api.h|   10 +
 drivers/net/qede/base/ecore_dev.c | 1807 ++---
 drivers/net/qede/base/ecore_dev_api.h |  170 ++-
 drivers/net/qede/base/ecore_hsi_common.h  |   57 +-
 drivers/net/qede/base/ecore_hsi_debug_tools.h |   15 +
 drivers/net/qede/base/ecore_hsi_eth.h |   57 +-
 drivers/net/qede/base/ecore_hw.c  |  127 +-
 drivers/net/qede/base/ecore_hw.h  |   40 +-
 drivers/net/qede/base/ecore_init_fw_funcs.c   |   93 +-
 drivers/net/qede/base/ecore_init_fw_funcs.h   |   42 +-
 drivers/net/qede/base/ecore_init_ops.c|   26 +-
 drivers/net/qede/base/ecore_int.c |   67 +-
 drivers/net/qede/base/ecore_int_api.h |   14 +-
 drivers/net/qede/base/ecore_iov_api.h |   10 +
 drivers/net/qede/base/ecore_iro.h |  164 ++-
 drivers/net/qede/base/ecore_iro_values.h  |   42 +-
 drivers/net/qede/base/ecore_l2.c  |   82 +-
 drivers/net/qede/base/ecore_l2_api.h  |   30 +-
 drivers/net/qede/base/ecore_mcp.c |  123 +-
 drivers/net/qede/base/ecore_mcp.h |   21 +-
 drivers/net/qede/base/ecore_rt_defs.h |  265 ++--
 drivers/net/qede/base/ecore_sp_commands.c |8 +-
 drivers/net/qede/base/ecore_sp_commands.h |3 +
 drivers/net/qede/base/ecore_spq.c |   56 +-
 drivers/net/qede/base/ecore_sriov.c   |   48 +-
 drivers/net/qede/base/ecore_vf.c  |   19 +-
 drivers/net/qede/base/eth_common.h|5 +
 drivers/net/qede/base/mcp_public.h|   23 +
 drivers/net/qede/base/reg_addr.h  |   56 +-
 drivers/net/qede/qede_ethdev.h|2 +-
 drivers/net/qede/qede_main.c  |2 +-
 36 files changed, 2701 insertions(+), 973 deletions(-)

-- 
1.7.10.3

[dpdk-dev] [PATCH 09/18] net/qede/base: add pretend function for port/PF

[Mody, Rasesh]

Add a pretend function for port/PF, pretend to another port and another
function when accessing the ptt window

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore_hw.c |   24 
 drivers/net/qede/base/ecore_hw.h |   12 
 2 files changed, 36 insertions(+)

diff --git a/drivers/net/qede/base/ecore_hw.c b/drivers/net/qede/base/ecore_hw.c
index 51bba27..6cfbbab 100644
--- a/drivers/net/qede/base/ecore_hw.c
+++ b/drivers/net/qede/base/ecore_hw.c
@@ -407,6 +407,30 @@ void ecore_port_unpretend(struct ecore_hwfn *p_hwfn, 
struct ecore_ptt *p_ptt)
*(u32 *)&p_ptt->pxp.pretend);
 }
 
+void ecore_port_fid_pretend(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
+   u8 port_id, u16 fid)
+{
+   u16 control = 0;
+
+   SET_FIELD(control, PXP_PRETEND_CMD_PORT, port_id);
+   SET_FIELD(control, PXP_PRETEND_CMD_USE_PORT, 1);
+   SET_FIELD(control, PXP_PRETEND_CMD_PRETEND_PORT, 1);
+
+   SET_FIELD(control, PXP_PRETEND_CMD_IS_CONCRETE, 1);
+   SET_FIELD(control, PXP_PRETEND_CMD_PRETEND_FUNCTION, 1);
+
+   if (!GET_FIELD(fid, PXP_CONCRETE_FID_VFVALID))
+   fid = GET_FIELD(fid, PXP_CONCRETE_FID_PFID);
+
+   p_ptt->pxp.pretend.control = OSAL_CPU_TO_LE16(control);
+   p_ptt->pxp.pretend.fid.concrete_fid.fid = OSAL_CPU_TO_LE16(fid);
+
+   REG_WR(p_hwfn,
+  ecore_ptt_config_addr(p_ptt) +
+  OFFSETOF(struct pxp_ptt_entry, pretend),
+  *(u32 *)&p_ptt->pxp.pretend);
+}
+
 u32 ecore_vfid_to_concrete(struct ecore_hwfn *p_hwfn, u8 vfid)
 {
u32 concrete_fid = 0;
diff --git a/drivers/net/qede/base/ecore_hw.h b/drivers/net/qede/base/ecore_hw.h
index 394207e..a62ba39 100644
--- a/drivers/net/qede/base/ecore_hw.h
+++ b/drivers/net/qede/base/ecore_hw.h
@@ -223,6 +223,18 @@ void ecore_port_unpretend(struct ecore_hwfn*p_hwfn,
  struct ecore_ptt  *p_ptt);
 
 /**
+ * @brief ecore_port_fid_pretend - pretend to another port and another function
+ *when accessing the ptt window
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ * @param port_id - the port to pretend to
+ * @param fid - fid field of pxp_pretend structure. Can contain either pf / vf.
+ */
+void ecore_port_fid_pretend(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
+   u8 port_id, u16 fid);
+
+/**
  * @brief ecore_vfid_to_concrete - build a concrete FID for a
  *given VF ID
  *
-- 
1.7.10.3

[dpdk-dev] [PATCH 02/18] net/qede/base: check for EDPM enabled in DB recovery

[Mody, Rasesh]

Add a check for EDPM enabled before flushing doorbell recovery queue.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore.h |2 ++
 drivers/net/qede/base/ecore_dev.c |   10 +-
 drivers/net/qede/base/ecore_int.c |   20 +---
 3 files changed, 28 insertions(+), 4 deletions(-)

diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index 8982214..4607a80 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -962,6 +962,8 @@ void ecore_set_fw_mac_addr(__le16 *fw_msb, __le16 *fw_mid, 
__le16 *fw_lsb,
 void ecore_db_recovery_execute(struct ecore_hwfn *p_hwfn,
   enum ecore_db_rec_exec);
 
+bool ecore_edpm_enabled(struct ecore_hwfn *p_hwfn);
+
 /* amount of resources used in qm init */
 u8 ecore_init_qm_get_num_tcs(struct ecore_hwfn *p_hwfn);
 u16 ecore_init_qm_get_num_vfs(struct ecore_hwfn *p_hwfn);
diff --git a/drivers/net/qede/base/ecore_dev.c 
b/drivers/net/qede/base/ecore_dev.c
index b83f003..f09f771 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -1974,6 +1974,14 @@ enum ECORE_ROCE_EDPM_MODE {
ECORE_ROCE_EDPM_MODE_DISABLE = 2,
 };
 
+bool ecore_edpm_enabled(struct ecore_hwfn *p_hwfn)
+{
+   if (p_hwfn->dcbx_no_edpm || p_hwfn->db_bar_no_edpm)
+   return false;
+
+   return true;
+}
+
 static enum _ecore_status_t
 ecore_hw_init_pf_doorbell_bar(struct ecore_hwfn *p_hwfn,
  struct ecore_ptt *p_ptt)
@@ -2061,7 +2069,7 @@ enum ECORE_ROCE_EDPM_MODE {
DP_INFO(p_hwfn,
" dpi_size=%d, dpi_count=%d, roce_edpm=%s\n",
p_hwfn->dpi_size, p_hwfn->dpi_count,
-   ((p_hwfn->dcbx_no_edpm) || (p_hwfn->db_bar_no_edpm)) ?
+   (!ecore_edpm_enabled(p_hwfn)) ?
"disabled" : "enabled");
 
/* Check return codes from above calls */
diff --git a/drivers/net/qede/base/ecore_int.c 
b/drivers/net/qede/base/ecore_int.c
index d41107d..c9acc72 100644
--- a/drivers/net/qede/base/ecore_int.c
+++ b/drivers/net/qede/base/ecore_int.c
@@ -431,9 +431,8 @@ static enum _ecore_status_t ecore_fw_assertion(struct 
ecore_hwfn *p_hwfn)
 #define ECORE_DB_REC_COUNT 10
 #define ECORE_DB_REC_INTERVAL  100
 
-/* assumes sticky overflow indication was set for this PF */
-static enum _ecore_status_t ecore_db_rec_attn(struct ecore_hwfn *p_hwfn,
- struct ecore_ptt *p_ptt)
+static enum _ecore_status_t ecore_db_rec_flush_queue(struct ecore_hwfn *p_hwfn,
+struct ecore_ptt *p_ptt)
 {
u8 count = ECORE_DB_REC_COUNT;
u32 usage = 1;
@@ -461,6 +460,21 @@ static enum _ecore_status_t ecore_db_rec_attn(struct 
ecore_hwfn *p_hwfn,
return ECORE_TIMEOUT;
}
 
+   return ECORE_SUCCESS;
+}
+
+/* assumes sticky overflow indication was set for this PF */
+static enum _ecore_status_t ecore_db_rec_attn(struct ecore_hwfn *p_hwfn,
+ struct ecore_ptt *p_ptt)
+{
+   enum _ecore_status_t rc;
+
+   if (ecore_edpm_enabled(p_hwfn)) {
+   rc = ecore_db_rec_flush_queue(p_hwfn, p_ptt);
+   if (rc != ECORE_SUCCESS)
+   return rc;
+   }
+
/* flush any pedning (e)dpm as they may never arrive */
ecore_wr(p_hwfn, p_ptt, DORQ_REG_DPM_FORCE_ABORT, 0x1);
 
-- 
1.7.10.3

[dpdk-dev] [PATCH 08/18] net/qede/base: adjust queue manager idx greater than max

[Mody, Rasesh]

Modified queue manager getter APIs to cycle through their range if
index is higher than max. This prevents accessing index out of bounds.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore_dev.c |   15 +++
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/drivers/net/qede/base/ecore_dev.c 
b/drivers/net/qede/base/ecore_dev.c
index da312b4..f0adf18 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -569,12 +569,11 @@ u16 ecore_init_qm_get_num_pf_rls(struct ecore_hwfn 
*p_hwfn)
 {
u16 num_pf_rls, num_vfs = ecore_init_qm_get_num_vfs(p_hwfn);
 
-   /* @DPDK */
/* num RLs can't exceed resource amount of rls or vports or the
 * dcqcn qps
 */
num_pf_rls = (u16)OSAL_MIN_T(u32, RESC_NUM(p_hwfn, ECORE_RL),
-(u16)RESC_NUM(p_hwfn, ECORE_VPORT));
+RESC_NUM(p_hwfn, ECORE_VPORT));
 
/* make sure after we reserve the default and VF rls we'll have
 * something left
@@ -835,7 +834,7 @@ u16 ecore_get_cm_pq_idx_mcos(struct ecore_hwfn *p_hwfn, u8 
tc)
if (tc > max_tc)
DP_ERR(p_hwfn, "tc %d must be smaller than %d\n", tc, max_tc);
 
-   return ecore_get_cm_pq_idx(p_hwfn, PQ_FLAGS_MCOS) + tc;
+   return ecore_get_cm_pq_idx(p_hwfn, PQ_FLAGS_MCOS) + (tc % max_tc);
 }
 
 u16 ecore_get_cm_pq_idx_vf(struct ecore_hwfn *p_hwfn, u16 vf)
@@ -845,17 +844,17 @@ u16 ecore_get_cm_pq_idx_vf(struct ecore_hwfn *p_hwfn, u16 
vf)
if (vf > max_vf)
DP_ERR(p_hwfn, "vf %d must be smaller than %d\n", vf, max_vf);
 
-   return ecore_get_cm_pq_idx(p_hwfn, PQ_FLAGS_VFS) + vf;
+   return ecore_get_cm_pq_idx(p_hwfn, PQ_FLAGS_VFS) + (vf % max_vf);
 }
 
 u16 ecore_get_cm_pq_idx_rl(struct ecore_hwfn *p_hwfn, u16 rl)
 {
u16 max_rl = ecore_init_qm_get_num_pf_rls(p_hwfn);
 
-   if (rl > max_rl)
-   DP_ERR(p_hwfn, "rl %d must be smaller than %d\n", rl, max_rl);
-
-   return ecore_get_cm_pq_idx(p_hwfn, PQ_FLAGS_RLS) + rl;
+   /* for rate limiters, it is okay to use the modulo behavior - no
+* DP_ERR
+*/
+   return ecore_get_cm_pq_idx(p_hwfn, PQ_FLAGS_RLS) + (rl % max_rl);
 }
 
 u16 ecore_get_qm_vport_idx_rl(struct ecore_hwfn *p_hwfn, u16 rl)
-- 
1.7.10.3

[dpdk-dev] [PATCH 03/18] net/qede/base: add DPC sync after PF stop

[Mody, Rasesh]

Add DPC sync after stopping the physical funciton to allow clean up of
asyncronous events. Post this the driver don't expect the FW to send
async events.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore_dev.c |6 ++
 drivers/net/qede/base/ecore_spq.c |   12 ++--
 2 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/drivers/net/qede/base/ecore_dev.c 
b/drivers/net/qede/base/ecore_dev.c
index f09f771..4558306 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -2804,6 +2804,12 @@ enum _ecore_status_t ecore_hw_stop(struct ecore_dev 
*p_dev)
rc2 = ECORE_UNKNOWN_ERROR;
}
 
+   OSAL_DPC_SYNC(p_hwfn);
+
+   /* After this point we don't expect the FW to send us async
+* events
+*/
+
/* perform debug action after PF stop was sent */
OSAL_AFTER_PF_STOP((void *)p_dev, p_hwfn->my_id);
 
diff --git a/drivers/net/qede/base/ecore_spq.c 
b/drivers/net/qede/base/ecore_spq.c
index 776c86f..1a02ba2 100644
--- a/drivers/net/qede/base/ecore_spq.c
+++ b/drivers/net/qede/base/ecore_spq.c
@@ -283,8 +283,10 @@ static enum _ecore_status_t ecore_spq_hw_post(struct 
ecore_hwfn *p_hwfn,
 {
ecore_spq_async_comp_cb cb;
 
-   if (!p_hwfn->p_spq || (p_eqe->protocol_id >= MAX_PROTOCOL_TYPE))
+   if (p_eqe->protocol_id >= MAX_PROTOCOL_TYPE) {
+   DP_ERR(p_hwfn, "Wrong protocol: %d\n", p_eqe->protocol_id);
return ECORE_INVAL;
+   }
 
cb = p_hwfn->p_spq->async_comp_cb[p_eqe->protocol_id];
if (cb) {
@@ -339,10 +341,16 @@ enum _ecore_status_t ecore_eq_completion(struct 
ecore_hwfn *p_hwfn,
 {
struct ecore_eq *p_eq = cookie;
struct ecore_chain *p_chain = &p_eq->chain;
+   u16 fw_cons_idx = 0;
enum _ecore_status_t rc = 0;
 
+   if (!p_hwfn->p_spq) {
+   DP_ERR(p_hwfn, "Unexpected NULL p_spq\n");
+   return ECORE_INVAL;
+   }
+
/* take a snapshot of the FW consumer */
-   u16 fw_cons_idx = OSAL_LE16_TO_CPU(*p_eq->p_fw_cons);
+   fw_cons_idx = OSAL_LE16_TO_CPU(*p_eq->p_fw_cons);
 
DP_VERBOSE(p_hwfn, ECORE_MSG_SPQ, "fw_cons_idx %x\n", fw_cons_idx);
 
-- 
1.7.10.3

[dpdk-dev] [PATCH 04/18] net/qede/base: workaround to indicate SHMEM data ready

[Mody, Rasesh]

The driver can notify that there was an MCP reset and read the SHMEM
values before the management FW has completed initializing them.
As a temporary solution, the "sup_msgs" field is used as a SHMEM data
ready indication. This should be replaced with an actual indication
when it is provided by the management FW.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore_mcp.c |   43 ++---
 1 file changed, 35 insertions(+), 8 deletions(-)

diff --git a/drivers/net/qede/base/ecore_mcp.c 
b/drivers/net/qede/base/ecore_mcp.c
index 364c146..3811d27 100644
--- a/drivers/net/qede/base/ecore_mcp.c
+++ b/drivers/net/qede/base/ecore_mcp.c
@@ -177,10 +177,16 @@ enum _ecore_status_t ecore_mcp_free(struct ecore_hwfn 
*p_hwfn)
return ECORE_SUCCESS;
 }
 
+/* Maximum of 1 sec to wait for the SHMEM ready indication */
+#define ECORE_MCP_SHMEM_RDY_MAX_RETRIES20
+#define ECORE_MCP_SHMEM_RDY_ITER_MS50
+
 static enum _ecore_status_t ecore_load_mcp_offsets(struct ecore_hwfn *p_hwfn,
   struct ecore_ptt *p_ptt)
 {
struct ecore_mcp_info *p_info = p_hwfn->mcp_info;
+   u8 cnt = ECORE_MCP_SHMEM_RDY_MAX_RETRIES;
+   u8 msec = ECORE_MCP_SHMEM_RDY_ITER_MS;
u32 drv_mb_offsize, mfw_mb_offsize;
u32 mcp_pf_id = MCP_PF_ID(p_hwfn);
 
@@ -198,6 +204,35 @@ static enum _ecore_status_t ecore_load_mcp_offsets(struct 
ecore_hwfn *p_hwfn,
 
p_info->public_base |= GRCBASE_MCP;
 
+   /* Get the MFW MB address and number of supported messages */
+   mfw_mb_offsize = ecore_rd(p_hwfn, p_ptt,
+ SECTION_OFFSIZE_ADDR(p_info->public_base,
+ PUBLIC_MFW_MB));
+   p_info->mfw_mb_addr = SECTION_ADDR(mfw_mb_offsize, mcp_pf_id);
+   p_info->mfw_mb_length = (u16)ecore_rd(p_hwfn, p_ptt,
+ p_info->mfw_mb_addr);
+
+   /* @@@TBD:
+* The driver can notify that there was an MCP reset, and read the SHMEM
+* values before the MFW has completed initializing them.
+* As a temporary solution, the "sup_msgs" field is used as a data ready
+* indication.
+* This should be replaced with an actual indication when it is provided
+* by the MFW.
+*/
+   while (!p_info->mfw_mb_length && cnt--) {
+   OSAL_MSLEEP(msec);
+   p_info->mfw_mb_length = (u16)ecore_rd(p_hwfn, p_ptt,
+ p_info->mfw_mb_addr);
+   }
+
+   if (!cnt) {
+   DP_NOTICE(p_hwfn, false,
+ "Failed to get the SHMEM ready notification after %d 
msec\n",
+ ECORE_MCP_SHMEM_RDY_MAX_RETRIES * msec);
+   return ECORE_TIMEOUT;
+   }
+
/* Calculate the driver and MFW mailbox address */
drv_mb_offsize = ecore_rd(p_hwfn, p_ptt,
  SECTION_OFFSIZE_ADDR(p_info->public_base,
@@ -208,14 +243,6 @@ static enum _ecore_status_t ecore_load_mcp_offsets(struct 
ecore_hwfn *p_hwfn,
   " mcp_pf_id = 0x%x\n",
   drv_mb_offsize, p_info->drv_mb_addr, mcp_pf_id);
 
-   /* Set the MFW MB address */
-   mfw_mb_offsize = ecore_rd(p_hwfn, p_ptt,
- SECTION_OFFSIZE_ADDR(p_info->public_base,
-  PUBLIC_MFW_MB));
-   p_info->mfw_mb_addr = SECTION_ADDR(mfw_mb_offsize, mcp_pf_id);
-   p_info->mfw_mb_length = (u16)ecore_rd(p_hwfn, p_ptt,
-  p_info->mfw_mb_addr);
-
/* Get the current driver mailbox sequence before sending
 * the first command
 */
-- 
1.7.10.3

[dpdk-dev] [PATCH 10/18] net/qede/base: add support for SRIOV VF min rate

[Mody, Rasesh]

Add support for SRIOV vf min rate configuration.
Fix return code for ecore_iov_get_vf_min_rate().

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore_iov_api.h |   10 ++
 drivers/net/qede/base/ecore_sriov.c   |   28 +++-
 2 files changed, 37 insertions(+), 1 deletion(-)

diff --git a/drivers/net/qede/base/ecore_iov_api.h 
b/drivers/net/qede/base/ecore_iov_api.h
index d398478..55de708 100644
--- a/drivers/net/qede/base/ecore_iov_api.h
+++ b/drivers/net/qede/base/ecore_iov_api.h
@@ -702,6 +702,16 @@ bool ecore_iov_is_vf_started(struct ecore_hwfn *p_hwfn,
  */
 int ecore_iov_get_vf_min_rate(struct ecore_hwfn *p_hwfn, int vfid);
 
+/**
+ * @brief - Configure min rate for VF's vport.
+ * @param p_dev
+ * @param vfid
+ * @param - rate in Mbps
+ *
+ * @return
+ */
+enum _ecore_status_t ecore_iov_configure_min_tx_rate(struct ecore_dev *p_dev,
+int vfid, u32 rate);
 #endif
 
 /**
diff --git a/drivers/net/qede/base/ecore_sriov.c 
b/drivers/net/qede/base/ecore_sriov.c
index 9e4a57b..9da4e41 100644
--- a/drivers/net/qede/base/ecore_sriov.c
+++ b/drivers/net/qede/base/ecore_sriov.c
@@ -4798,6 +4798,32 @@ enum _ecore_status_t ecore_iov_configure_tx_rate(struct 
ecore_hwfn *p_hwfn,
   p_link->speed);
 }
 
+enum _ecore_status_t ecore_iov_configure_min_tx_rate(struct ecore_dev *p_dev,
+int vfid, u32 rate)
+{
+   struct ecore_vf_info *vf;
+   int i;
+
+   for_each_hwfn(p_dev, i) {
+   struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
+
+   if (!ecore_iov_pf_sanity_check(p_hwfn, vfid)) {
+   DP_NOTICE(p_hwfn, true,
+ "SR-IOV sanity check failed, can't set min 
rate\n");
+   return ECORE_INVAL;
+   }
+   }
+
+   vf = ecore_iov_get_vf_info(ECORE_LEADING_HWFN(p_dev), (u16)vfid, true);
+   if (!vf) {
+   DP_NOTICE(p_dev, true,
+ "Getting vf info failed, can't set min rate\n");
+   return ECORE_INVAL;
+   }
+
+   return ecore_configure_vport_wfq(p_dev, vf->vport_id, rate);
+}
+
 enum _ecore_status_t ecore_iov_get_vf_stats(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt,
int vfid,
@@ -4908,7 +4934,7 @@ bool ecore_iov_is_vf_started(struct ecore_hwfn *p_hwfn,
return (p_vf->state != VF_FREE && p_vf->state != VF_STOPPED);
 }
 
-enum _ecore_status_t
+int
 ecore_iov_get_vf_min_rate(struct ecore_hwfn *p_hwfn, int vfid)
 {
struct ecore_wfq_data *vf_vp_wfq;
-- 
1.7.10.3

[dpdk-dev] [PATCH 12/18] net/qede/base: get pre-negotiated OEM values

[Mody, Rasesh]

Request management FW for OEM values, which are negotiated prior to
the driver load by sending the GET_OEM_UPDATES command after both
engines are initialized.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore_dev.c  |   14 ++
 drivers/net/qede/base/mcp_public.h |8 
 2 files changed, 22 insertions(+)

diff --git a/drivers/net/qede/base/ecore_dev.c 
b/drivers/net/qede/base/ecore_dev.c
index f0adf18..30e12e9 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -2646,6 +2646,20 @@ enum _ecore_status_t ecore_hw_init(struct ecore_dev 
*p_dev,
}
 
if (IS_PF(p_dev)) {
+   /* Get pre-negotiated values for stag, bandwidth etc. */
+   p_hwfn = ECORE_LEADING_HWFN(p_dev);
+   DP_VERBOSE(p_hwfn, ECORE_MSG_SPQ,
+  "Sending GET_OEM_UPDATES command to trigger 
stag/bandwidth attention handling\n");
+   rc = ecore_mcp_cmd(p_hwfn, p_hwfn->p_main_ptt,
+  DRV_MSG_CODE_GET_OEM_UPDATES,
+  1 << DRV_MB_PARAM_DUMMY_OEM_UPDATES_OFFSET,
+  &resp, ¶m);
+   if (rc != ECORE_SUCCESS)
+   DP_NOTICE(p_hwfn, false,
+ "Failed to send GET_OEM_UPDATES attention 
request\n");
+   }
+
+   if (IS_PF(p_dev)) {
p_hwfn = ECORE_LEADING_HWFN(p_dev);
drv_mb_param = STORM_FW_VERSION;
rc = ecore_mcp_cmd(p_hwfn, p_hwfn->p_main_ptt,
diff --git a/drivers/net/qede/base/mcp_public.h 
b/drivers/net/qede/base/mcp_public.h
index 2ee8ab5..46ec984 100644
--- a/drivers/net/qede/base/mcp_public.h
+++ b/drivers/net/qede/base/mcp_public.h
@@ -1696,6 +1696,8 @@ struct public_drv_mb {
 #define FW_MSG_CODE_RESOURCE_ALLOC_UNKNOWN  0x3500
 #define FW_MSG_CODE_RESOURCE_ALLOC_DEPRECATED   0x3600
 #define FW_MSG_CODE_RESOURCE_ALLOC_GEN_ERR  0x3700
+#define FW_MSG_CODE_GET_OEM_UPDATES_DONE   0x4100
+
 #define FW_MSG_CODE_NIG_DRAIN_DONE  0x3000
 #define FW_MSG_CODE_VF_DISABLED_DONE0xb000
 #define FW_MSG_CODE_DRV_CFG_VF_MSIX_DONE0xb001
@@ -1804,6 +1806,12 @@ struct public_drv_mb {
 
 #define FW_MB_PARAM_LOAD_DONE_DID_EFUSE_ERROR  (1 << 0)
 
+#define FW_MB_PARAM_OEM_UPDATE_MASK0xFF
+#define FW_MB_PARAM_OEM_UPDATE_OFFSET  0
+#define FW_MB_PARAM_OEM_UPDATE_BW  0x01
+#define FW_MB_PARAM_OEM_UPDATE_S_TAG   0x02
+#define FW_MB_PARAM_OEM_UPDATE_CFG 0x04
+
u32 drv_pulse_mb;
 #define DRV_PULSE_SEQ_MASK  0x7fff
 #define DRV_PULSE_SYSTEM_TIME_MASK  0x
-- 
1.7.10.3

[dpdk-dev] [PATCH 11/18] net/qede/base: add periodic Doorbell Recovery support

[Mody, Rasesh]

Add support for periodic Doorbell Recovery.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/bcm_osal.h  |1 +
 drivers/net/qede/base/ecore_int.c |   37 +
 drivers/net/qede/base/ecore_int_api.h |   11 ++
 3 files changed, 31 insertions(+), 18 deletions(-)

diff --git a/drivers/net/qede/base/bcm_osal.h b/drivers/net/qede/base/bcm_osal.h
index 70805f6..1abf44f 100644
--- a/drivers/net/qede/base/bcm_osal.h
+++ b/drivers/net/qede/base/bcm_osal.h
@@ -454,5 +454,6 @@ void qede_get_mcp_proto_stats(struct ecore_dev *, enum 
ecore_mcp_protocol_type,
 #define OSAL_DIV_S64(a, b) ((a) / (b))
 #define OSAL_LLDP_RX_TLVS(p_hwfn, tlv_buf, tlv_size) nothing
 #define OSAL_DBG_ALLOC_USER_DATA(p_hwfn, user_data_ptr) (0)
+#define OSAL_DB_REC_OCCURRED(p_hwfn) nothing
 
 #endif /* __BCM_OSAL_H */
diff --git a/drivers/net/qede/base/ecore_int.c 
b/drivers/net/qede/base/ecore_int.c
index c9acc72..fd8f657 100644
--- a/drivers/net/qede/base/ecore_int.c
+++ b/drivers/net/qede/base/ecore_int.c
@@ -428,13 +428,13 @@ static enum _ecore_status_t ecore_fw_assertion(struct 
ecore_hwfn *p_hwfn)
 #define ECORE_DORQ_ATTENTION_SIZE_MASK (0x7f)
 #define ECORE_DORQ_ATTENTION_SIZE_SHIFT(16)
 
-#define ECORE_DB_REC_COUNT 10
+#define ECORE_DB_REC_COUNT 1000
 #define ECORE_DB_REC_INTERVAL  100
 
 static enum _ecore_status_t ecore_db_rec_flush_queue(struct ecore_hwfn *p_hwfn,
 struct ecore_ptt *p_ptt)
 {
-   u8 count = ECORE_DB_REC_COUNT;
+   u32 count = ECORE_DB_REC_COUNT;
u32 usage = 1;
 
/* wait for usage to zero or count to run out. This is necessary since
@@ -463,12 +463,19 @@ static enum _ecore_status_t 
ecore_db_rec_flush_queue(struct ecore_hwfn *p_hwfn,
return ECORE_SUCCESS;
 }
 
-/* assumes sticky overflow indication was set for this PF */
-static enum _ecore_status_t ecore_db_rec_attn(struct ecore_hwfn *p_hwfn,
- struct ecore_ptt *p_ptt)
+enum _ecore_status_t ecore_db_rec_handler(struct ecore_hwfn *p_hwfn,
+ struct ecore_ptt *p_ptt)
 {
+   u32 overflow;
enum _ecore_status_t rc;
 
+   overflow = ecore_rd(p_hwfn, p_ptt, DORQ_REG_PF_OVFL_STICKY);
+   DP_NOTICE(p_hwfn, false, "PF Overflow sticky 0x%x\n", overflow);
+   if (!overflow) {
+   ecore_db_recovery_execute(p_hwfn, DB_REC_ONCE);
+   return ECORE_SUCCESS;
+   }
+
if (ecore_edpm_enabled(p_hwfn)) {
rc = ecore_db_rec_flush_queue(p_hwfn, p_ptt);
if (rc != ECORE_SUCCESS)
@@ -491,8 +498,7 @@ static enum _ecore_status_t ecore_db_rec_attn(struct 
ecore_hwfn *p_hwfn,
 
 static enum _ecore_status_t ecore_dorq_attn_cb(struct ecore_hwfn *p_hwfn)
 {
-   u32 int_sts, first_drop_reason, details, address, overflow,
-   all_drops_reason;
+   u32 int_sts, first_drop_reason, details, address, all_drops_reason;
struct ecore_ptt *p_ptt = p_hwfn->p_dpc_ptt;
enum _ecore_status_t rc;
 
@@ -518,8 +524,6 @@ static enum _ecore_status_t ecore_dorq_attn_cb(struct 
ecore_hwfn *p_hwfn)
   DORQ_REG_DB_DROP_DETAILS);
address = ecore_rd(p_hwfn, p_ptt,
   DORQ_REG_DB_DROP_DETAILS_ADDRESS);
-   overflow = ecore_rd(p_hwfn, p_ptt,
-   DORQ_REG_PF_OVFL_STICKY);
all_drops_reason = ecore_rd(p_hwfn, p_ptt,
DORQ_REG_DB_DROP_DETAILS_REASON);
 
@@ -530,19 +534,16 @@ static enum _ecore_status_t ecore_dorq_attn_cb(struct 
ecore_hwfn *p_hwfn)
  "FID\t\t0x%04x\t\t(Opaque FID)\n"
  "Size\t\t0x%04x\t\t(in bytes)\n"
  "1st drop reason\t0x%08x\t(details on first drop 
since last handling)\n"
- "Sticky reasons\t0x%08x\t(all drop reasons since last 
handling)\n"
- "Overflow\t0x%x\t\t(a per PF indication)\n",
+ "Sticky reasons\t0x%08x\t(all drop reasons since last 
handling)\n",
  address,
  GET_FIELD(details, ECORE_DORQ_ATTENTION_OPAQUE),
  GET_FIELD(details, ECORE_DORQ_ATTENTION_SIZE) * 4,
- first_drop_reason, all_drops_reason, overflow);
+ first_drop_reason, all_drops_reason);
 
-   /* if this PF caused overflow, initiate recovery */
-   if (overflow) {
-   rc = ecore_db_rec_attn(p_hwfn, p_ptt);
-   if (rc != ECORE_SUCCESS)
-   return rc;
-   }
+   rc = ecore_db_rec_handler(p_hwfn, p_ptt);
+   OSAL_DB_REC_OCCURRED(p_hwfn);
+   if (rc