Re: [dpdk-dev] [dpdk-stable] [PATCH v2 2/2] net/mlx5: fix allocation when no memory on device NUMA node
Hi Shahaf,
On Sun, Jan 21, 2018 at 06:58:09AM +, Shahaf Shuler wrote:
> Friday, January 19, 2018 6:25 PM, Olivier Matz:
> on the same numa node than the device, it is
> > preferable to fallback on another socket instead of failing.
> >
> > Fixes: 1e3a39f72d5d ("net/mlx5: allocate verbs object into shared memory")
> > Cc: sta...@dpdk.org
> >
> > Signed-off-by: Olivier Matz
> > Signed-off-by: Nelio Laranjeiro
> > ---
> >
> > This new version of the patch was provided by Nelio (thanks), I validated it
> > on my platform. I just did minimal changes to fix the checkpatch issues in
> > the
> > comments of mlx5.h (/** instead of /*).
>
> Per my understanding the below patch is to select the socket on which to
> create the Verbs object based on the ethdev configuration rather than the PCI
> numa node.
> While it introduce the infrastructure to do fallback to other socket id, it
> is not yet used.
> I think the commit log should be modified to better explain this patch.
That's right, the commit log should be updated, it's still the commit log
of the v1, which does not match.
> >
> > drivers/net/mlx5/mlx5.c | 14 --
> > drivers/net/mlx5/mlx5.h | 20
> > drivers/net/mlx5/mlx5_rxq.c | 4
> > drivers/net/mlx5/mlx5_txq.c | 4
> > 4 files changed, 40 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index
> > 1c95f3520..7a04ccf98 100644
> > --- a/drivers/net/mlx5/mlx5.c
> > +++ b/drivers/net/mlx5/mlx5.c
> > @@ -139,10 +139,20 @@ mlx5_alloc_verbs_buf(size_t size, void *data)
> > struct priv *priv = data;
> > void *ret;
> > size_t alignment = sysconf(_SC_PAGESIZE);
> > + unsigned int socket = SOCKET_ID_ANY;
> >
> > + if (priv->verbs_alloc_ctx.type ==
> > MLX5_VERSB_ALLOC_TYPE_TX_QUEUE) {
It looks we should also replace VERSB by VERBS :D
I will send a v3.
Re: [dpdk-dev] [PATCH v9 0/3] support c11 memory model barrier in librte_ring
On Mon, Jan 22, 2018 at 08:53:01AM +0100, Thomas Monjalon wrote: > 22/01/2018 05:41, Jia He: > > Changelog: > > V9: remove the SPDX tag and refine commit logs > > Why did you remove the SPDX tag? > > You need to fix the licensing issue. > BSD-2-Clause is uncommon in DPDK. > Thomas, The licensing issue existed before Jia's patch. I think we can solve it separately. Olivier
Re: [dpdk-dev] [PATCH v9 0/3] support c11 memory model barrier in librte_ring
On Mon, Jan 22, 2018 at 09:26:49AM +0100, Olivier Matz wrote: > On Mon, Jan 22, 2018 at 08:53:01AM +0100, Thomas Monjalon wrote: > > 22/01/2018 05:41, Jia He: > > > Changelog: > > > V9: remove the SPDX tag and refine commit logs > > > > Why did you remove the SPDX tag? > > > > You need to fix the licensing issue. > > BSD-2-Clause is uncommon in DPDK. > > > > Thomas, > > The licensing issue existed before Jia's patch. I think we can > solve it separately. > > Olivier Sorry, I missed a mail, please ignore this one.
Re: [dpdk-dev] [PATCH v9 0/3] support c11 memory model barrier in librte_ring
> -Original Message- > From: Thomas Monjalon [mailto:tho...@monjalon.net] > Sent: Monday, January 22, 2018 1:23 PM > To: Jia He > Cc: dev@dpdk.org; Hemant Agrawal ; Jerin > Jacob ; Jianbo Liu > ; Jan Viktorin ; Olivier > Matz ; konstantin.anan...@intel.com; > bruce.richard...@intel.com > Subject: Re: [PATCH v9 0/3] support c11 memory model barrier in > librte_ring > Importance: High > > 22/01/2018 05:41, Jia He: > > Changelog: > > V9: remove the SPDX tag and refine commit logs > > Why did you remove the SPDX tag? > > You need to fix the licensing issue. > BSD-2-Clause is uncommon in DPDK. [Hemant] the license issue existed before this patch. So I have asked Jia to send another patch over this series to fix it in these as well as other files of librte_ring. Series-Acked-by: Hemant Agrawal
Re: [dpdk-dev] [PATCH] ring: convert license headers to SPDX tags
> -Original Message- > From: Jia He [mailto:hejia...@gmail.com] > Sent: Monday, January 22, 2018 12:44 PM > To: dev@dpdk.org; Olivier Matz ; Hemant > Agrawal > Cc: Jia He ; Jia He > Subject: [PATCH] ring: convert license headers to SPDX tags > Importance: High > > Signed-off-by: Jia He > --- > lib/librte_ring/rte_ring.c | 66 > +++--- > lib/librte_ring/rte_ring.h | 66 > +++--- > lib/librte_ring/rte_ring_c11_mem.h | 65 +++-- > lib/librte_ring/rte_ring_generic.h | 66 > +++--- > 4 files changed, 20 insertions(+), 243 deletions(-) Acked-by: Hemant Agrawal
[dpdk-dev] [Bug 11] core dumped (SW)
https://dpdk.org/tracker/show_bug.cgi?id=11 Bug ID: 11 Summary: core dumped (SW) Product: DPDK Version: unspecified Hardware: x86 OS: Linux Status: CONFIRMED Severity: minor Priority: Normal Component: cryptodev Assignee: dev@dpdk.org Reporter: xinfengx.z...@intel.com Target Milestone: --- root@dpdk-ae-purely003 dpdk]# ./x86_64-native-linuxapp-gcc/build/app/test-crypto-perf/dpdk-test-crypto-perf --socket-mem 2048,0 --vdev="crypto_aesni_mb_pmd" -l 10,11 -n 4 -- --buffer-sz 64,128,256,512,1024,2048 --optype cipher-then-auth --ptest throughput --auth-key-sz 64 --cipher-key-sz 16 --devtype crypto_aesni_mb --cipher-iv-sz 16 --auth-op generate --burst-sz 32 --total-ops 1000 --silent --digest-sz 12 --auth-algo sha1-hmac --cipher-algo aes-cbc --cipher-op encrypt EAL: Detected 112 lcore(s) EAL: No free hugepages reported in hugepages-1048576kB EAL: Probing VFIO support... EAL: PCI device :00:1f.6 on NUMA socket 0 EAL: probe driver: 8086:15b9 net_e1000_em EAL: PCI device :18:00.0 on NUMA socket 0 EAL: probe driver: 8086:1572 net_i40e EAL: PCI device :18:00.1 on NUMA socket 0 EAL: probe driver: 8086:1572 net_i40e EAL: PCI device :18:00.2 on NUMA socket 0 EAL: probe driver: 8086:1572 net_i40e EAL: PCI device :18:00.3 on NUMA socket 0 EAL: probe driver: 8086:1572 net_i40e EAL: PCI device :3d:01.0 on NUMA socket 0 EAL: probe driver: 8086:37c9 crypto_qat CRYPTODEV: [crypto_qat] - Creating cryptodev :3d:01.0 CRYPTODEV: [crypto_qat] - Initialisation parameters - name: :3d:01.0,socket id: 0, max queue pairs: 0, max sessions: 2048 EAL: PCI device :3d:01.1 on NUMA socket 0 EAL: probe driver: 8086:37c9 crypto_qat CRYPTODEV: [crypto_qat] - Creating cryptodev :3d:01.1 CRYPTODEV: [crypto_qat] - Initialisation parameters - name: :3d:01.1,socket id: 0, max queue pairs: 0, max sessions: 2048 EAL: PCI device :3d:01.2 on NUMA socket 0 EAL: probe driver: 8086:37c9 crypto_qat CRYPTODEV: [crypto_qat] - Creating cryptodev :3d:01.2 CRYPTODEV: [crypto_qat] - Initialisation parameters - name: :3d:01.2,socket id: 0, max queue pairs: 0, max sessions: 2048 EAL: PCI device :3d:01.3 on NUMA socket 0 EAL: probe driver: 8086:37c9 crypto_qat CRYPTODEV: [crypto_qat] - Creating cryptodev :3d:01.3 CRYPTODEV: [crypto_qat] - Initialisation parameters - name: :3d:01.3,socket id: 0, max queue pairs: 0, max sessions: 2048 EAL: PCI device :3d:01.4 on NUMA socket 0 EAL: probe driver: 8086:37c9 crypto_qat CRYPTODEV: [crypto_qat] - Creating cryptodev :3d:01.4 CRYPTODEV: [crypto_qat] - Initialisation parameters - name: :3d:01.4,socket id: 0, max queue pairs: 0, max sessions: 2048 EAL: PCI device :3d:01.5 on NUMA socket 0 EAL: probe driver: 8086:37c9 crypto_qat CRYPTODEV: [crypto_qat] - Creating cryptodev :3d:01.5 CRYPTODEV: [crypto_qat] - Initialisation parameters - name: :3d:01.5,socket id: 0, max queue pairs: 0, max sessions: 2048 EAL: PCI device :3d:01.6 on NUMA socket 0 EAL: probe driver: 8086:37c9 crypto_qat CRYPTODEV: [crypto_qat] - Creating cryptodev :3d:01.6 CRYPTODEV: [crypto_qat] - Initialisation parameters - name: :3d:01.6,socket id: 0, max queue pairs: 0, max sessions: 2048 EAL: PCI device :3d:01.7 on NUMA socket 0 EAL: probe driver: 8086:37c9 crypto_qat CRYPTODEV: [crypto_qat] - Creating cryptodev :3d:01.7 CRYPTODEV: [crypto_qat] - Initialisation parameters - name: :3d:01.7,socket id: 0, max queue pairs: 0, max sessions: 2048 EAL: PCI device :3d:02.0 on NUMA socket 0 EAL: probe driver: 8086:37c9 crypto_qat CRYPTODEV: [crypto_qat] - Creating cryptodev :3d:02.0 CRYPTODEV: [crypto_qat] - Initialisation parameters - name: :3d:02.0,socket id: 0, max queue pairs: 0, max sessions: 2048 EAL: PCI device :3d:02.1 on NUMA socket 0 EAL: probe driver: 8086:37c9 crypto_qat CRYPTODEV: [crypto_qat] - Creating cryptodev :3d:02.1 CRYPTODEV: [crypto_qat] - Initialisation parameters - name: :3d:02.1,socket id: 0, max queue pairs: 0, max sessions: 2048 EAL: PCI device :3d:02.2 on NUMA socket 0 EAL: probe driver: 8086:37c9 crypto_qat CRYPTODEV: [crypto_qat] - Creating cryptodev :3d:02.2 CRYPTODEV: [crypto_qat] - Initialisation parameters - name: :3d:02.2,socket id: 0, max queue pairs: 0, max sessions: 2048 EAL: PCI device :3d:02.3 on NUMA socket 0 EAL: probe driver: 8086:37c9 crypto_qat CRYPTODEV: [crypto_qat] - Creating cryptodev :3d:02.3 CRYPTODEV: [crypto_qat] - Initialisation parameters - name: :3d:02.3,socket id: 0, max queue pairs: 0, max sessions: 2048 EAL: PCI device :3d:02.4 on NUMA socket 0 EAL: probe driver: 8086:37c9 crypto_qat CRYPTODEV: [crypto_qat] - Creating cryptodev :3d:02.4 CRYPTODEV: [crypto_qat] - Initialisation parameters - name: :3d:02.4,socket id: 0, max queue pairs: 0, max sessions: 204
[dpdk-dev] [PATCH] net/mlx5: use PCI BDF as the port name
It is suggested to use PCI BDF to identify a port for port addition
in OVS-DPDK. While mlx5 has its own naming style: name it by ib dev
name. This breaks the typical OVS DPDK use case and brings more puzzle
to the end users.
To fix it, this patch changes it to use PCI BDF as the name, too.
Also, a postfix " port %u" is added, just in case their might be more
than 1 port assoicated with a PCI device.
Signed-off-by: Yuanhan Liu
---
drivers/net/mlx5/mlx5.c | 22 +-
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 9d1de36..7cd9db7 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -610,6 +610,8 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct
rte_pci_device *pci_dev)
INFO("%u port(s) detected", device_attr.orig_attr.phys_port_cnt);
for (i = 0; i < device_attr.orig_attr.phys_port_cnt; i++) {
+ char name[RTE_ETH_NAME_MAX_LEN];
+ int len;
uint32_t port = i + 1; /* ports are indexed from one */
uint32_t test = (1 << i);
struct ibv_context *ctx = NULL;
@@ -633,14 +635,15 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct
rte_pci_device *pci_dev)
.inline_max_packet_sz = MLX5_ARG_UNSET,
};
+ len = snprintf(name, sizeof(name), PCI_PRI_FMT,
+pci_dev->addr.domain, pci_dev->addr.bus,
+pci_dev->addr.devid, pci_dev->addr.function);
+ if (device_attr.orig_attr.phys_port_cnt > 1)
+ snprintf(name + len, sizeof(name), " port %u", i);
+
mlx5_dev[idx].ports |= test;
if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
- /* from rte_ethdev.c */
- char name[RTE_ETH_NAME_MAX_LEN];
-
- snprintf(name, sizeof(name), "%s port %u",
-ibv_get_device_name(ibv_dev), port);
eth_dev = rte_eth_dev_attach_secondary(name);
if (eth_dev == NULL) {
ERROR("can not attach rte ethdev");
@@ -834,14 +837,7 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct
rte_pci_device *pci_dev)
priv_get_mtu(priv, &priv->mtu);
DEBUG("port %u MTU is %u", priv->port, priv->mtu);
- /* from rte_ethdev.c */
- {
- char name[RTE_ETH_NAME_MAX_LEN];
-
- snprintf(name, sizeof(name), "%s port %u",
-ibv_get_device_name(ibv_dev), port);
- eth_dev = rte_eth_dev_allocate(name);
- }
+ eth_dev = rte_eth_dev_allocate(name);
if (eth_dev == NULL) {
ERROR("can not allocate rte ethdev");
err = ENOMEM;
--
2.7.4
Re: [dpdk-dev] [PATCH] examples/ipsec-secgw: try end in flow actions before fail
> -Original Message- > From: Nicolau, Radu > Sent: Thursday, January 18, 2018 4:08 PM > To: dev@dpdk.org > Cc: De Lara Guarch, Pablo ; Doherty, > Declan ; akhil.go...@nxp.com; Nicolau, Radu > > Subject: [PATCH] examples/ipsec-secgw: try end in flow actions before fail > > After trying RSS and Queue also try End for flow action to allow for HW that > don't support flow features with inline crypto. > > Signed-off-by: Radu Nicolau Applied to dpdk-next-crypto (already in RC1). Thanks, Pablo
[dpdk-dev] [PATCH] event/opdl: rework loops to comply with dpdk style
This commit reworks the loop counter variable declarations
to be in line with the DPDK source code.
Fixes: 3c7f3dcfb099 ("event/opdl: add PMD main body and helper function")
Fixes: 8ca8e3b48eff ("event/opdl: add event queue config get/set")
Fixes: d548ef513cd7 ("event/opdl: add unit tests")
Cc: liang.j...@intel.com
Cc: peter.mccar...@intel.com
Signed-off-by: Harry van Haaren
---
Compile tested for loop declarations by adding "-std=gnu90" to the
OPDL Makefile CFLAGS variable, which now passes here. Note that DPDK
as a whole does not compile with gnu90, so don't pass it as EXTRA_CFLAGS
---
drivers/event/opdl/Makefile| 2 --
drivers/event/opdl/opdl_evdev.c| 9 +
drivers/event/opdl/opdl_evdev_init.c | 23 ++-
drivers/event/opdl/opdl_evdev_xstats.c | 9 ++---
drivers/event/opdl/opdl_test.c | 6 --
5 files changed, 29 insertions(+), 20 deletions(-)
diff --git a/drivers/event/opdl/Makefile b/drivers/event/opdl/Makefile
index a8aff2c..747ae5b 100644
--- a/drivers/event/opdl/Makefile
+++ b/drivers/event/opdl/Makefile
@@ -7,8 +7,6 @@ include $(RTE_SDK)/mk/rte.vars.mk
LIB = librte_pmd_opdl_event.a
# build flags
-CFLAGS += -std=c99
-CFLAGS += -D_XOPEN_SOURCE=600
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS)
# for older GCC versions, allow us to initialize an event using
diff --git a/drivers/event/opdl/opdl_evdev.c b/drivers/event/opdl/opdl_evdev.c
index dcbf404..d5e2b60 100644
--- a/drivers/event/opdl/opdl_evdev.c
+++ b/drivers/event/opdl/opdl_evdev.c
@@ -288,7 +288,8 @@ opdl_queue_setup(struct rte_eventdev *dev,
}
}
/* Check if queue id has been setup already */
- for (uint32_t i = 0; i < device->nb_q_md; i++) {
+ uint32_t i;
+ for (i = 0; i < device->nb_q_md; i++) {
if (device->q_md[i].ext_id == queue_id) {
PMD_DRV_LOG(ERR, "DEV_ID:[%02d] : "
"queue id %u already setup\n",
@@ -390,8 +391,8 @@ opdl_dump(struct rte_eventdev *dev, FILE *f)
fprintf(f,
"\n\n -- RING STATISTICS --\n");
-
- for (uint32_t i = 0; i < device->nb_opdls; i++)
+ uint32_t i;
+ for (i = 0; i < device->nb_opdls; i++)
opdl_ring_dump(device->opdl[i], f);
fprintf(f,
@@ -400,7 +401,7 @@ opdl_dump(struct rte_eventdev *dev, FILE *f)
"Av. Grant Size Av. Cycles PP"
" Empty DEQs Non Empty DEQs Pkts Processed\n");
- for (uint32_t i = 0; i < device->max_port_nb; i++) {
+ for (i = 0; i < device->max_port_nb; i++) {
char queue_id[64];
char total_cyc[64];
const char *p_type;
diff --git a/drivers/event/opdl/opdl_evdev_init.c
b/drivers/event/opdl/opdl_evdev_init.c
index c37d8bc..84ab258 100644
--- a/drivers/event/opdl/opdl_evdev_init.c
+++ b/drivers/event/opdl/opdl_evdev_init.c
@@ -314,8 +314,8 @@ static int opdl_add_deps(struct opdl_evdev *device,
"Stages and dependents"
" are not for same opdl ring",
opdl_pmd_dev_id(device));
- for (uint32_t k = 0;
- k < device->nb_opdls; k++) {
+ uint32_t k;
+ for (k = 0; k < device->nb_opdls; k++) {
opdl_ring_dump(device->opdl[k],
stdout);
}
@@ -505,8 +505,9 @@ void
destroy_queues_and_rings(struct rte_eventdev *dev)
{
struct opdl_evdev *device = opdl_pmd_priv(dev);
+ uint32_t i;
- for (uint32_t i = 0; i < device->nb_opdls; i++) {
+ for (i = 0; i < device->nb_opdls; i++) {
if (device->opdl[i])
opdl_ring_free(device->opdl[i]);
}
@@ -639,7 +640,8 @@ create_queues_and_rings(struct rte_eventdev *dev)
OPDL_Q_POS_START,
-1);
- for (uint32_t i = 0; i < device->nb_q_md; i++) {
+ uint32_t i;
+ for (i = 0; i < device->nb_q_md; i++) {
/* Check */
if (!device->q_md[i].setup) {
@@ -702,7 +704,8 @@ initialise_all_other_ports(struct rte_eventdev *dev)
struct opdl_evdev *device = opdl_pmd_priv(dev);
- for (uint32_t i = 0; i < device->nb_ports; i++) {
+ uint32_t i;
+ for (i = 0; i < device->nb_ports; i++) {
struct opdl_port *port = &device->ports[i];
struct opdl_queue *queue = &device->queue[port->queue_id];
@@ -827,7 +830,7 @@ initialise_all_other_ports(struct rte_eventdev *dev)
* setup the last bit of stage md
*/
if (!err) {
- for (uint32_
Re: [dpdk-dev] [PATCH v3 7/7] app/testpmd: adjust ethdev port ownership
Hi Matan,
On Sat, Jan 20, 2018 at 06:14:13PM +, Matan Azrad wrote:
> > > > > > > @@ -1394,7 +1394,7 @@ struct cmd_config_speed_all {
> > > > > > > &link_speed) < 0)
> > > > > > > return;
> > > > > > >
> > > > > > > - RTE_ETH_FOREACH_DEV(pid) {
> > > > > > > + RTE_ETH_FOREACH_DEV_OWNED_BY(pid, my_owner.id) {
> > > > > >
> > > > > > Why do we need all these changes?
> > > > > > As I understand you changed definition of RTE_ETH_FOREACH_DEV(),
> > > > > > so no testpmd should work ok default (no_owner case).
> > > > > > Am I missing something here?
> > > > >
> > > > > Now, After Gaetan suggestion RTE_ETH_FOREACH_DEV(pid) will iterate
> > > > over all valid and ownerless ports.
To be clear: you did not implement what I suggested, but your own
interpretation of it. Please do not write as if I validated this
interpretation.
Essentially, the NO_OWNER semantic is completely different from a
default owner. A default owner would protect ports from race conditions
and force port ownership requests to go through proper channels
protected by critical sections.
NO_OWNER means that anyone is free to take any ownerless port at any
time. And as a result, your are thus forced here to fix this by
modifying an existing application for any entity using your ownership
API to function with it.
This is very different from what I suggested. What I said was that I
wanted the most common case to be taken care of, and for existing
applications to continue working. It entails having a more complicated
API, but I think this is a price we should pay.
You are implementing the most common case in testpmd (the app entity
creating an owner and putting its valid ports within). Your API should
ease that up as much as possible before considering forcing everyone to
work with it.
~*~
You implemented a way for the failsafe to capture existing ports.
How does it work without the channels for requesting ports suggested above?
Regards,
--
Gaëtan Rivet
6WIND
Re: [dpdk-dev] [PATCH v3] net/ixgbe: check security enable bits
> -Original Message-
> From: Nicolau, Radu
> Sent: Thursday, January 18, 2018 12:47 PM
> To: dev@dpdk.org
> Cc: Yigit, Ferruh ; Lu, Wenzhuo
> ; Ananyev, Konstantin ;
> Zhao, XinfengX ; De Lara Guarch, Pablo
> ; Zhang, Helin
> ; Nicolau, Radu
> Subject: [PATCH v3] net/ixgbe: check security enable bits
>
> Check if the security enable bits are not fused before setting
> offload capabilities for security
>
> Signed-off-by: Radu Nicolau
> ---
> drivers/net/ixgbe/ixgbe_ethdev.c | 19 ++-
> drivers/net/ixgbe/ixgbe_ipsec.c | 38 ++
> drivers/net/ixgbe/ixgbe_ipsec.h | 3 +--
> 3 files changed, 41 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c
> b/drivers/net/ixgbe/ixgbe_ethdev.c
> index 43e0132..b717dda 100644
> --- a/drivers/net/ixgbe/ixgbe_ethdev.c
> +++ b/drivers/net/ixgbe/ixgbe_ethdev.c
> @@ -1141,13 +1141,6 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev)
> return 0;
> }
>
> -#ifdef RTE_LIBRTE_SECURITY
> - /* Initialize security_ctx only for primary process*/
> - eth_dev->security_ctx = ixgbe_ipsec_ctx_create(eth_dev);
> - if (eth_dev->security_ctx == NULL)
> - return -ENOMEM;
> -#endif
> -
> rte_eth_copy_pci_info(eth_dev, pci_dev);
>
> /* Vendor and Device ID need to be set before init of shared code */
> @@ -1174,6 +1167,12 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev)
> /* Unlock any pending hardware semaphore */
> ixgbe_swfw_lock_reset(hw);
>
> +#ifdef RTE_LIBRTE_SECURITY
> + /* Initialize security_ctx only for primary process*/
> + if (ixgbe_ipsec_ctx_create(eth_dev))
> + return -ENOMEM;
> +#endif
> +
> /* Initialize DCB configuration*/
> memset(dcb_config, 0, sizeof(struct ixgbe_dcb_config));
> ixgbe_dcb_init(hw, dcb_config);
> @@ -3685,8 +3684,10 @@ ixgbe_dev_info_get(struct rte_eth_dev *dev, struct
> rte_eth_dev_info *dev_info)
> dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
>
> #ifdef RTE_LIBRTE_SECURITY
> - dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_SECURITY;
> - dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_SECURITY;
> + if (dev->security_ctx) {
> + dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_SECURITY;
> + dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_SECURITY;
> + }
> #endif
>
> dev_info->default_rxconf = (struct rte_eth_rxconf) {
> diff --git a/drivers/net/ixgbe/ixgbe_ipsec.c b/drivers/net/ixgbe/ixgbe_ipsec.c
> index 97f025a8..a60b29a 100644
> --- a/drivers/net/ixgbe/ixgbe_ipsec.c
> +++ b/drivers/net/ixgbe/ixgbe_ipsec.c
> @@ -694,15 +694,37 @@ static struct rte_security_ops ixgbe_security_ops = {
> .capabilities_get = ixgbe_crypto_capabilities_get
> };
>
> -struct rte_security_ctx *
> +static int
> +ixgbe_crypto_capable(struct rte_eth_dev *dev)
> +{
> + struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
> + uint32_t reg_i, reg, capable = 1;
> + /* test if rx crypto can be enabled and then write back initial value*/
> + reg_i = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL);
> + IXGBE_WRITE_REG(hw, IXGBE_SECRXCTRL, 0);
> + reg = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL);
> + if (reg != 0)
> + capable = 0;
> + IXGBE_WRITE_REG(hw, IXGBE_SECRXCTRL, reg_i);
> + return capable;
> +}
> +
> +int
> ixgbe_ipsec_ctx_create(struct rte_eth_dev *dev)
> {
> - struct rte_security_ctx *ctx = rte_malloc("rte_security_instances_ops",
> - sizeof(struct rte_security_ctx), 0);
> - if (ctx) {
> - ctx->device = (void *)dev;
> - ctx->ops = &ixgbe_security_ops;
> - ctx->sess_cnt = 0;
> + struct rte_security_ctx *ctx = NULL;
> +
> + if (ixgbe_crypto_capable(dev)) {
> + ctx = rte_malloc("rte_security_instances_ops",
> + sizeof(struct rte_security_ctx), 0);
> + if (ctx) {
> + ctx->device = (void *)dev;
> + ctx->ops = &ixgbe_security_ops;
> + ctx->sess_cnt = 0;
> + dev->security_ctx = ctx;
> + } else {
> + return -ENOMEM;
> + }
> }
> - return ctx;
> + return 0;
> }
> diff --git a/drivers/net/ixgbe/ixgbe_ipsec.h b/drivers/net/ixgbe/ixgbe_ipsec.h
> index acd9f3e..d13c407 100644
> --- a/drivers/net/ixgbe/ixgbe_ipsec.h
> +++ b/drivers/net/ixgbe/ixgbe_ipsec.h
> @@ -110,8 +110,7 @@ struct ixgbe_ipsec {
> };
>
>
> -struct rte_security_ctx *
> -ixgbe_ipsec_ctx_create(struct rte_eth_dev *dev);
> +int ixgbe_ipsec_ctx_create(struct rte_eth_dev *dev);
> int ixgbe_crypto_enable_ipsec(struct rte_eth_dev *dev);
> int ixgbe_crypto_add_ingress_sa_from_flow(const void *sess,
> const void *ip_spec,
> --
> 2.7.5
Acked-by: Konstantin Ananyev
Re: [dpdk-dev] [PATCH] event/opdl: rework loops to comply with dpdk style
On 22 Jan 10:04, Harry van Haaren wrote:
> This commit reworks the loop counter variable declarations
> to be in line with the DPDK source code.
>
> Fixes: 3c7f3dcfb099 ("event/opdl: add PMD main body and helper function")
> Fixes: 8ca8e3b48eff ("event/opdl: add event queue config get/set")
> Fixes: d548ef513cd7 ("event/opdl: add unit tests")
>
> Cc: liang.j...@intel.com
> Cc: peter.mccar...@intel.com
>
> Signed-off-by: Harry van Haaren
>
> ---
>
> Compile tested for loop declarations by adding "-std=gnu90" to the
> OPDL Makefile CFLAGS variable, which now passes here. Note that DPDK
> as a whole does not compile with gnu90, so don't pass it as EXTRA_CFLAGS
> ---
> drivers/event/opdl/Makefile| 2 --
> drivers/event/opdl/opdl_evdev.c| 9 +
> drivers/event/opdl/opdl_evdev_init.c | 23 ++-
> drivers/event/opdl/opdl_evdev_xstats.c | 9 ++---
> drivers/event/opdl/opdl_test.c | 6 --
> 5 files changed, 29 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/event/opdl/Makefile b/drivers/event/opdl/Makefile
> index a8aff2c..747ae5b 100644
> --- a/drivers/event/opdl/Makefile
> +++ b/drivers/event/opdl/Makefile
> @@ -7,8 +7,6 @@ include $(RTE_SDK)/mk/rte.vars.mk
> LIB = librte_pmd_opdl_event.a
>
> # build flags
> -CFLAGS += -std=c99
> -CFLAGS += -D_XOPEN_SOURCE=600
> CFLAGS += -O3
> CFLAGS += $(WERROR_FLAGS)
> # for older GCC versions, allow us to initialize an event using
> diff --git a/drivers/event/opdl/opdl_evdev.c b/drivers/event/opdl/opdl_evdev.c
> index dcbf404..d5e2b60 100644
> --- a/drivers/event/opdl/opdl_evdev.c
> +++ b/drivers/event/opdl/opdl_evdev.c
> @@ -288,7 +288,8 @@ opdl_queue_setup(struct rte_eventdev *dev,
> }
> }
> /* Check if queue id has been setup already */
> - for (uint32_t i = 0; i < device->nb_q_md; i++) {
> + uint32_t i;
> + for (i = 0; i < device->nb_q_md; i++) {
> if (device->q_md[i].ext_id == queue_id) {
> PMD_DRV_LOG(ERR, "DEV_ID:[%02d] : "
>"queue id %u already setup\n",
> @@ -390,8 +391,8 @@ opdl_dump(struct rte_eventdev *dev, FILE *f)
>
> fprintf(f,
> "\n\n -- RING STATISTICS --\n");
> -
> - for (uint32_t i = 0; i < device->nb_opdls; i++)
> + uint32_t i;
> + for (i = 0; i < device->nb_opdls; i++)
> opdl_ring_dump(device->opdl[i], f);
>
> fprintf(f,
> @@ -400,7 +401,7 @@ opdl_dump(struct rte_eventdev *dev, FILE *f)
> "Av. Grant Size Av. Cycles PP"
> " Empty DEQs Non Empty DEQs Pkts Processed\n");
>
> - for (uint32_t i = 0; i < device->max_port_nb; i++) {
> + for (i = 0; i < device->max_port_nb; i++) {
> char queue_id[64];
> char total_cyc[64];
> const char *p_type;
> diff --git a/drivers/event/opdl/opdl_evdev_init.c
> b/drivers/event/opdl/opdl_evdev_init.c
> index c37d8bc..84ab258 100644
> --- a/drivers/event/opdl/opdl_evdev_init.c
> +++ b/drivers/event/opdl/opdl_evdev_init.c
> @@ -314,8 +314,8 @@ static int opdl_add_deps(struct opdl_evdev *device,
>"Stages and dependents"
>" are not for same opdl ring",
>opdl_pmd_dev_id(device));
> - for (uint32_t k = 0;
> - k < device->nb_opdls; k++) {
> + uint32_t k;
> + for (k = 0; k < device->nb_opdls; k++) {
> opdl_ring_dump(device->opdl[k],
> stdout);
> }
> @@ -505,8 +505,9 @@ void
> destroy_queues_and_rings(struct rte_eventdev *dev)
> {
> struct opdl_evdev *device = opdl_pmd_priv(dev);
> + uint32_t i;
>
> - for (uint32_t i = 0; i < device->nb_opdls; i++) {
> + for (i = 0; i < device->nb_opdls; i++) {
> if (device->opdl[i])
> opdl_ring_free(device->opdl[i]);
> }
> @@ -639,7 +640,8 @@ create_queues_and_rings(struct rte_eventdev *dev)
>OPDL_Q_POS_START,
>-1);
>
> - for (uint32_t i = 0; i < device->nb_q_md; i++) {
> + uint32_t i;
> + for (i = 0; i < device->nb_q_md; i++) {
>
> /* Check */
> if (!device->q_md[i].setup) {
> @@ -702,7 +704,8 @@ initialise_all_other_ports(struct rte_eventdev *dev)
>
> struct opdl_evdev *device = opdl_pmd_priv(dev);
>
> - for (uint32_t i = 0; i < device->nb_ports; i++) {
> + uint32_t i;
> + for (i = 0; i < device->nb_ports; i++) {
> struct opdl_port *port = &device->ports[i];
> struct opdl_queue *queue = &device->queue[port->queue_id];
>
>
Re: [dpdk-dev] [PATCH v2 1/4] net/virtio: fix queue flushing with vector Rx enabled
On Mon, Jan 22, 2018 at 10:56:41AM +0800, Tiwei Bie wrote:
> On Fri, Jan 19, 2018 at 04:55:53PM +0100, Olivier Matz wrote:
> > When using vector Rx mode (use_simple_rx = 1), vq->vq_descx[] is not
> > kept up to date. To properly detach the mbufs in this case, browse
> > sw_ring[] instead, as it's done in virtqueue_rxvq_flush().
> >
> > Since we need virtio_get_queue_type(), also move this function in
> > virtqueue.h as a static inline.
> >
> > Fixes: fc3d66212fed ("virtio: add vector Rx")
> > Cc: sta...@dpdk.org
> >
> > Signed-off-by: Olivier Matz
> > ---
> >
> > Tiwei,
> >
> > While it passes my test plan, please carefully check that what I did in
> > virtqueue_detatch_unused() is correct. I tried to reproduce what is done
> > in virtqueue_rxvq_flush(), but I may be mistaking due to the different
> > ring layout assumption and mbuf management between standard and vector.
> >
> > Thanks
> > Olivier
> >
> >
> > drivers/net/virtio/virtio_ethdev.c | 11 ---
> > drivers/net/virtio/virtqueue.c | 17 +++--
> > drivers/net/virtio/virtqueue.h | 11 +++
> > 3 files changed, 26 insertions(+), 13 deletions(-)
> >
> [...]
> > struct rte_mbuf *
> > virtqueue_detatch_unused(struct virtqueue *vq)
> > {
> > + struct virtio_hw *hw = vq->hw;
> > struct rte_mbuf *cookie;
> > int idx;
> > + int type = virtio_get_queue_type(hw, vq->vq_queue_index);
> > +
> > + if (vq == NULL)
> > + return NULL;
> >
> > - if (vq != NULL)
> > - for (idx = 0; idx < vq->vq_nentries; idx++) {
> > + for (idx = 0; idx < vq->vq_nentries; idx++) {
> > + if (hw->use_simple_rx && type == VTNET_RQ) {
> > + cookie = vq->sw_ring[idx];
> > + if (cookie != NULL) {
> > + vq->sw_ring[idx] = NULL;
>
> Thanks for working on this!
>
> The vq->sw_ring[idx] isn't zeroed during Rx. So besides the
> check of (cookie != NULL), some other check is also needed
> to avoid freeing the mbufs already delivered to application.
>
> The mbufs in below interval belong to application:
>
> start: sw_ring[vq->vq_avail_idx & (vq->vq_nentries - 1)] (included)
> end: sw_ring[(vq->vq_avail_idx + vq->vq_free_cnt) & (vq->vq_nentries - 1)]
> (excluded)
>
> PS. (vq->vq_avail_idx & (vq->vq_nentries - 1)) can be greater than
> (vq->vq_avail_idx + vq->vq_free_cnt) & (vq->vq_nentries - 1).
Thank you for the review. What about something like this?
struct rte_mbuf *
virtqueue_detach_unused(struct virtqueue *vq)
{
struct rte_mbuf *cookie;
struct virtio_hw *hw;
uint16_t start, end;
int type, idx;
if (vq == NULL)
return NULL;
hw = vq->hw;
type = virtio_get_queue_type(hw, vq->vq_queue_index);
start = vq->vq_avail_idx & (vq->vq_nentries - 1);
end = (vq->vq_avail_idx + vq->vq_free_cnt) & (vq->vq_nentries - 1);
end = (vq->vq_avail_idx + vq->vq_free_cnt) & (vq->vq_nentries - 1);
for (idx = 0; idx < vq->vq_nentries; idx++) {
if (hw->use_simple_rx && type == VTNET_RQ) {
if (start <= end && idx >= start && idx < end)
continue;
if (start > end && (idx >= start || idx < end))
continue;
cookie = vq->sw_ring[idx];
if (cookie == NULL)
continue;
vq->sw_ring[idx] = NULL;
return cookie;
} else {
cookie = vq->vq_descx[idx].cookie;
if (cookie != NULL) {
vq->vq_descx[idx].cookie = NULL;
return cookie;
}
}
}
return NULL;
}
Regards,
Olivier
[dpdk-dev] IXGBE VF on KVM - Transmit stalled after switch reboot
Hi, We are seeing a stall in packet transmission from VF after a network switch (Nexus 9000) restart. The packets sent out on ixgbe-vf are not seen on the wire. Is this expected when the switch restarts? Is a re-init of VF expected from PMD? The application, which is based on DPDK 16.04, is running inside an Ubuntu VM on KVM. It uses a VF that has been passed through to the VM and the PF is owned by Linux kernel mode driver. PF is able to transmit packets. VFs that are inside the VM and that are not claimed by DPDK are also working fine. I feel that there is a recovery sequence that is expected from the application/PMD in such a case. It would be great if IXGBE PMD maintainers or someone who is familiar with this could help us. Kindly let me know if you have questions. Thanks, -Sujith Sankar Avi Networks (India) Pvt Ltd.
[dpdk-dev] [PATCH v1] mk: support building with renamed makefile
The build system made a recursive call to "make" after
creating the build directory. This recursive call used
the hard-coded filename "Makefile", which prevented
builds from working if the file was renamed and make
called using "make -f". Taking the filename from
MAKEFILES_LIST make variable fixes this.
Fixes: af75078fece3 ("first public release")
Cc: sta...@dpdk.org
Signed-off-by: Marko Kovacevic
---
mk/internal/rte.extvars.mk | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/mk/internal/rte.extvars.mk b/mk/internal/rte.extvars.mk
index 94f27e9..19594da 100644
--- a/mk/internal/rte.extvars.mk
+++ b/mk/internal/rte.extvars.mk
@@ -20,7 +20,7 @@ ifeq ("$(origin M)", "command line")
RTE_EXTMK := $(abspath $(M))
endif
endif
-RTE_EXTMK ?= $(RTE_SRCDIR)/Makefile
+RTE_EXTMK ?= $(RTE_SRCDIR)/$(firstword $(MAKEFILE_LIST))
export RTE_EXTMK
# RTE_SDK_BIN must point to .config, include/ and lib/.
--
2.9.5
Re: [dpdk-dev] [PATCH v3 7/7] app/testpmd: adjust ethdev port ownership
Hi Gaetan
From: Gaëtan Rivet, Monday, January 22, 2018 12:17 PM
> Hi Matan,
>
> On Sat, Jan 20, 2018 at 06:14:13PM +, Matan Azrad wrote:
>
>
>
> > > > > > > > @@ -1394,7 +1394,7 @@ struct cmd_config_speed_all {
> > > > > > > > &link_speed) < 0)
> > > > > > > > return;
> > > > > > > >
> > > > > > > > - RTE_ETH_FOREACH_DEV(pid) {
> > > > > > > > + RTE_ETH_FOREACH_DEV_OWNED_BY(pid, my_owner.id) {
> > > > > > >
> > > > > > > Why do we need all these changes?
> > > > > > > As I understand you changed definition of
> > > > > > > RTE_ETH_FOREACH_DEV(), so no testpmd should work ok default
> (no_owner case).
> > > > > > > Am I missing something here?
> > > > > >
> > > > > > Now, After Gaetan suggestion RTE_ETH_FOREACH_DEV(pid) will
> > > > > > iterate
> > > > > over all valid and ownerless ports.
>
> To be clear: you did not implement what I suggested, but your own
> interpretation of it. Please do not write as if I validated this
> interpretation.
>
> Essentially, the NO_OWNER semantic is completely different from a default
> owner. A default owner would protect ports from race conditions and force
> port ownership requests to go through proper channels protected by critical
> sections.
>
Please explain it more.
Do you want any created port will be owned by default owner(app)?
So, how can other DPDK entity to take control on a port?
> NO_OWNER means that anyone is free to take any ownerless port at any
> time. And as a result, your are thus forced here to fix this by modifying an
> existing application for any entity using your ownership API to function with
> it.
>
Yes, I think is should be explicit!
Because hotplug is in the game and a port can be created\released any time,
Any dpdk entity should know about its ports and own them.
> This is very different from what I suggested. What I said was that I wanted
> the most common case to be taken care of, and for existing applications to
> continue working. It entails having a more complicated API, but I think this
> is
> a price we should pay.
>
So, please define what is the common case you are talking about.
And if you have an idea how to adjust port ownership to take care of it, I will
be happy to hear.
> You are implementing the most common case in testpmd (the app entity
> creating an owner and putting its valid ports within). Your API should ease
> that up as much as possible before considering forcing everyone to work
> with it.
I don't think it is complicated.
>~*~
>
> You implemented a way for the failsafe to capture existing ports.
> How does it work without the channels for requesting ports suggested
> above?
If the port is without an owner, it will just take ownership of it and will
manage it, else will try to take ownership in the next hotplug alarm.
>
> Regards,
> --
> Gaëtan Rivet
> 6WIND
[dpdk-dev] [PATCH v2 3/3] crypto/dpaa_sec: support for scatter gather
Signed-off-by: Alok Makhariya
Signed-off-by: Akhil Goyal
Acked-by: Hemant Agrawal
---
doc/guides/cryptodevs/features/dpaa_sec.ini | 1 +
drivers/crypto/dpaa_sec/dpaa_sec.c | 501 +--
test/test/test_cryptodev.c | 10 +
test/test/test_cryptodev_aes_test_vectors.h | 11 +-
test/test/test_cryptodev_hash_test_vectors.h | 6 +-
5 files changed, 498 insertions(+), 31 deletions(-)
diff --git a/doc/guides/cryptodevs/features/dpaa_sec.ini
b/doc/guides/cryptodevs/features/dpaa_sec.ini
index deab53a..260fae7 100644
--- a/doc/guides/cryptodevs/features/dpaa_sec.ini
+++ b/doc/guides/cryptodevs/features/dpaa_sec.ini
@@ -8,6 +8,7 @@ Symmetric crypto = Y
Sym operation chaining = Y
HW Accelerated = Y
Protocol offload = Y
+Mbuf scatter gather= Y
;
; Supported crypto algorithms of the 'dpaa_sec' crypto driver.
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c
b/drivers/crypto/dpaa_sec/dpaa_sec.c
index a402e61..18681cf 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -599,6 +599,86 @@ dpaa_sec_deq(struct dpaa_sec_qp *qp, struct rte_crypto_op
**ops, int nb_ops)
return pkts;
}
+static inline struct dpaa_sec_job *
+build_auth_only_sg(struct rte_crypto_op *op, dpaa_sec_session *ses)
+{
+ struct rte_crypto_sym_op *sym = op->sym;
+ struct rte_mbuf *mbuf = sym->m_src;
+ struct dpaa_sec_job *cf;
+ struct dpaa_sec_op_ctx *ctx;
+ struct qm_sg_entry *sg, *out_sg, *in_sg;
+ phys_addr_t start_addr;
+ uint8_t *old_digest, extra_segs;
+
+ if (is_decode(ses))
+ extra_segs = 3;
+ else
+ extra_segs = 2;
+
+ if ((mbuf->nb_segs + extra_segs) > MAX_SG_ENTRIES) {
+ PMD_TX_LOG(ERR, "Auth: Max sec segs supported is %d\n",
+ MAX_SG_ENTRIES);
+ return NULL;
+ }
+ ctx = dpaa_sec_alloc_ctx(ses);
+ if (!ctx)
+ return NULL;
+
+ cf = &ctx->job;
+ ctx->op = op;
+ old_digest = ctx->digest;
+
+ /* output */
+ out_sg = &cf->sg[0];
+ qm_sg_entry_set64(out_sg, sym->auth.digest.phys_addr);
+ out_sg->length = ses->digest_length;
+ cpu_to_hw_sg(out_sg);
+
+ /* input */
+ in_sg = &cf->sg[1];
+ /* need to extend the input to a compound frame */
+ in_sg->extension = 1;
+ in_sg->final = 1;
+ in_sg->length = sym->auth.data.length;
+ qm_sg_entry_set64(in_sg, dpaa_mem_vtop_ctx(ctx, &cf->sg[2]));
+
+ /* 1st seg */
+ sg = in_sg + 1;
+ qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
+ sg->length = mbuf->data_len - sym->auth.data.offset;
+ sg->offset = sym->auth.data.offset;
+
+ /* Successive segs */
+ mbuf = mbuf->next;
+ while (mbuf) {
+ cpu_to_hw_sg(sg);
+ sg++;
+ qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
+ sg->length = mbuf->data_len;
+ mbuf = mbuf->next;
+ }
+
+ if (is_decode(ses)) {
+ /* Digest verification case */
+ cpu_to_hw_sg(sg);
+ sg++;
+ rte_memcpy(old_digest, sym->auth.digest.data,
+ ses->digest_length);
+ start_addr = dpaa_mem_vtop_ctx(ctx, old_digest);
+ qm_sg_entry_set64(sg, start_addr);
+ sg->length = ses->digest_length;
+ in_sg->length += ses->digest_length;
+ } else {
+ /* Digest calculation case */
+ sg->length -= ses->digest_length;
+ }
+ sg->final = 1;
+ cpu_to_hw_sg(sg);
+ cpu_to_hw_sg(in_sg);
+
+ return cf;
+}
+
/**
* packet looks like:
* ||
@@ -669,6 +749,101 @@ build_auth_only(struct rte_crypto_op *op,
dpaa_sec_session *ses)
}
static inline struct dpaa_sec_job *
+build_cipher_only_sg(struct rte_crypto_op *op, dpaa_sec_session *ses)
+{
+ struct rte_crypto_sym_op *sym = op->sym;
+ struct dpaa_sec_job *cf;
+ struct dpaa_sec_op_ctx *ctx;
+ struct qm_sg_entry *sg, *out_sg, *in_sg;
+ struct rte_mbuf *mbuf;
+ uint8_t req_segs;
+ uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
+ ses->iv.offset);
+
+ if (sym->m_dst) {
+ mbuf = sym->m_dst;
+ req_segs = mbuf->nb_segs + sym->m_src->nb_segs + 3;
+ } else {
+ mbuf = sym->m_src;
+ req_segs = mbuf->nb_segs * 2 + 3;
+ }
+
+ if (req_segs > MAX_SG_ENTRIES) {
+ PMD_TX_LOG(ERR, "Cipher: Max sec segs supported is %d\n",
+ MAX_SG_ENTRIES);
+ return NULL;
+ }
+
+ ctx = dpaa_sec_alloc_ctx(ses);
+ if (!ctx)
+ return NULL;
+
+
[dpdk-dev] [PATCH v2 2/3] crypto/dpaa2_sec: support for scatter gather
Signed-off-by: Alok Makhariya
Signed-off-by: Akhil Goyal
Acked-by: Hemant Agrawal
---
doc/guides/cryptodevs/features/dpaa2_sec.ini | 1 +
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 588 +--
test/test/test_cryptodev.c | 10 +
test/test/test_cryptodev_aes_test_vectors.h | 22 +-
test/test/test_cryptodev_hash_test_vectors.h | 14 +
5 files changed, 595 insertions(+), 40 deletions(-)
diff --git a/doc/guides/cryptodevs/features/dpaa2_sec.ini
b/doc/guides/cryptodevs/features/dpaa2_sec.ini
index 8fd07d6..68c9960 100644
--- a/doc/guides/cryptodevs/features/dpaa2_sec.ini
+++ b/doc/guides/cryptodevs/features/dpaa2_sec.ini
@@ -8,6 +8,7 @@ Symmetric crypto = Y
Sym operation chaining = Y
HW Accelerated = Y
Protocol offload = Y
+Mbuf scatter gather= Y
;
; Supported crypto algorithms of the 'dpaa2_sec' crypto driver.
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 977c49a..bafe754 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -48,6 +48,7 @@
#define FLE_POOL_NUM_BUFS 32000
#define FLE_POOL_BUF_SIZE 256
#define FLE_POOL_CACHE_SIZE512
+#define FLE_SG_MEM_SIZE2048
#define SEC_FLC_DHR_OUTBOUND -114
#define SEC_FLC_DHR_INBOUND0
@@ -86,6 +87,153 @@ build_proto_fd(dpaa2_sec_session *sess,
}
static inline int
+build_authenc_gcm_sg_fd(dpaa2_sec_session *sess,
+struct rte_crypto_op *op,
+struct qbman_fd *fd, __rte_unused uint16_t bpid)
+{
+ struct rte_crypto_sym_op *sym_op = op->sym;
+ struct ctxt_priv *priv = sess->ctxt;
+ struct qbman_fle *fle, *sge, *ip_fle, *op_fle;
+ struct sec_flow_context *flc;
+ uint32_t auth_only_len = sess->ext_params.aead_ctxt.auth_only_len;
+ int icv_len = sess->digest_length;
+ uint8_t *old_icv;
+ struct rte_mbuf *mbuf;
+ uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
+ sess->iv.offset);
+
+ PMD_INIT_FUNC_TRACE();
+
+ if (sym_op->m_dst)
+ mbuf = sym_op->m_dst;
+ else
+ mbuf = sym_op->m_src;
+
+ /* first FLE entry used to store mbuf and session ctxt */
+ fle = (struct qbman_fle *)rte_malloc(NULL, FLE_SG_MEM_SIZE,
+ RTE_CACHE_LINE_SIZE);
+ if (unlikely(!fle)) {
+ RTE_LOG(ERR, PMD, "GCM SG: Memory alloc failed for SGE\n");
+ return -1;
+ }
+ memset(fle, 0, FLE_SG_MEM_SIZE);
+ DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+ DPAA2_FLE_SAVE_CTXT(fle, priv);
+
+ op_fle = fle + 1;
+ ip_fle = fle + 2;
+ sge = fle + 3;
+
+ /* Save the shared descriptor */
+ flc = &priv->flc_desc[0].flc;
+
+ /* Configure FD as a FRAME LIST */
+ DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(op_fle));
+ DPAA2_SET_FD_COMPOUND_FMT(fd);
+ DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
+
+ PMD_TX_LOG(DEBUG, "GCM SG: auth_off: 0x%x/length %d, digest-len=%d\n"
+ "iv-len=%d data_off: 0x%x\n",
+ sym_op->aead.data.offset,
+ sym_op->aead.data.length,
+ sym_op->aead.digest.length,
+ sess->iv.length,
+ sym_op->m_src->data_off);
+
+ /* Configure Output FLE with Scatter/Gather Entry */
+ DPAA2_SET_FLE_SG_EXT(op_fle);
+ DPAA2_SET_FLE_ADDR(op_fle, DPAA2_VADDR_TO_IOVA(sge));
+
+ if (auth_only_len)
+ DPAA2_SET_FLE_INTERNAL_JD(op_fle, auth_only_len);
+
+ op_fle->length = (sess->dir == DIR_ENC) ?
+ (sym_op->aead.data.length + icv_len + auth_only_len) :
+ sym_op->aead.data.length + auth_only_len;
+
+ /* Configure Output SGE for Encap/Decap */
+ DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
+ DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off + sym_op->aead.data.offset -
+ auth_only_len);
+ sge->length = mbuf->data_len - sym_op->aead.data.offset + auth_only_len;
+
+ mbuf = mbuf->next;
+ /* o/p segs */
+ while (mbuf) {
+ sge++;
+ DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
+ DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+ sge->length = mbuf->data_len;
+ mbuf = mbuf->next;
+ }
+ sge->length -= icv_len;
+
+ if (sess->dir == DIR_ENC) {
+ sge++;
+ DPAA2_SET_FLE_ADDR(sge,
+ DPAA2_VADDR_TO_IOVA(sym_op->aead.digest.data));
+ sge->length = icv_len;
+ }
+ DPAA2_SET_FLE_FIN(sge);
+
+ sge++;
+ mbuf = sym_op->m_src;
+
+ /* Configure Input FLE with Scatter/Gather Entry */
+ DPAA2_SET_FLE_ADDR(ip_fle, DP
[dpdk-dev] [PATCH v2 1/3] doc: update feature list for cryptodevs
Signed-off-by: Akhil Goyal --- changes in v2: separated the default.ini change from the dpaa2_sec patch. doc/guides/cryptodevs/features/aesni_gcm.ini | 1 + doc/guides/cryptodevs/features/default.ini | 1 + doc/guides/cryptodevs/features/null.ini | 1 + doc/guides/cryptodevs/features/openssl.ini | 1 + doc/guides/cryptodevs/features/qat.ini | 1 + 5 files changed, 5 insertions(+) diff --git a/doc/guides/cryptodevs/features/aesni_gcm.ini b/doc/guides/cryptodevs/features/aesni_gcm.ini index bacd94e..920b6b6 100644 --- a/doc/guides/cryptodevs/features/aesni_gcm.ini +++ b/doc/guides/cryptodevs/features/aesni_gcm.ini @@ -10,6 +10,7 @@ CPU AESNI = Y CPU SSE= Y CPU AVX= Y CPU AVX2 = Y +Mbuf scatter gather= Y ; ; Supported crypto algorithms of the 'aesni_gcm' crypto driver. ; diff --git a/doc/guides/cryptodevs/features/default.ini b/doc/guides/cryptodevs/features/default.ini index 18d66cb..728ce3b 100644 --- a/doc/guides/cryptodevs/features/default.ini +++ b/doc/guides/cryptodevs/features/default.ini @@ -18,6 +18,7 @@ CPU AVX512 = CPU AESNI = CPU NEON = CPU ARM CE = +Mbuf scatter gather= ; ; Supported crypto algorithms of a default crypto driver. diff --git a/doc/guides/cryptodevs/features/null.ini b/doc/guides/cryptodevs/features/null.ini index 523c453..a9e172d 100644 --- a/doc/guides/cryptodevs/features/null.ini +++ b/doc/guides/cryptodevs/features/null.ini @@ -6,6 +6,7 @@ [Features] Symmetric crypto = Y Sym operation chaining = Y +Mbuf scatter gather= Y ; ; Supported crypto algorithms of the 'null' crypto driver. diff --git a/doc/guides/cryptodevs/features/openssl.ini b/doc/guides/cryptodevs/features/openssl.ini index 385ec4e..6915658 100644 --- a/doc/guides/cryptodevs/features/openssl.ini +++ b/doc/guides/cryptodevs/features/openssl.ini @@ -6,6 +6,7 @@ [Features] Symmetric crypto = Y Sym operation chaining = Y +Mbuf scatter gather= Y ; ; Supported crypto algorithms of the 'openssl' crypto driver. diff --git a/doc/guides/cryptodevs/features/qat.ini b/doc/guides/cryptodevs/features/qat.ini index 40da898..51ed596 100644 --- a/doc/guides/cryptodevs/features/qat.ini +++ b/doc/guides/cryptodevs/features/qat.ini @@ -7,6 +7,7 @@ Symmetric crypto = Y Sym operation chaining = Y HW Accelerated = Y +Mbuf scatter gather= Y ; ; Supported crypto algorithms of the 'qat' crypto driver. -- 2.9.3
Re: [dpdk-dev] [PATCH] net/mlx5: fix all multi verification code position
Thursday, January 18, 2018 1:03 AM, Yongseok Koh:
> > On Jan 11, 2018, at 1:25 AM, Nelio Laranjeiro
> wrote:
> >
> > All multi code should not be handled in exit part of the code but in
> > the mainline of the function.
> >
> > Fixes: 4241d84c0a32 ("net/mlx5: fix flow type for allmulti rules")
> > Cc: rasl...@mellanox.com
> >
> > Signed-off-by: Nelio Laranjeiro
> > ---
> Acked-by: Yongseok Koh
Applied to next-net-mlx, thanks.
>
> Thanks
[dpdk-dev] [PATCH v5 1/2] build: add support for ARM builds
From: Bruce Richardson
Add files to enable compiling for ARM cross builds.
This can be tested by doing a cross-compile for armv8-a type using
the linaro gcc toolchain.
meson arm-build --cross-file aarch64_cross.txt
ninja -C arm-build
where aarch64_cross.txt contained the following
[binaries]
c = 'aarch64-linux-gnu-gcc'
cpp = 'aarch64-linux-gnu-cpp'
ar = 'aarch64-linux-gnu-ar'
[host_machine]
system = 'linux'
cpu_family = 'aarch64'
cpu = 'armv8-a'
endian = 'little'
Signed-off-by: Bruce Richardson
Signed-off-by: Pavan Nikhilesh
---
v5 Changes:
- Use generic_armv8 config when script returns unknows machine args
v4 Changes:
- use set_quoted to set config instead of explicitly using quotes.
v3 Changes:
- Fix missing SPDX license tags
v2 Changes:
- Merged RFC patch.
- Added framework to easily other vendor specific flags
- renamed machine_arg to machine_args
config/arm/meson.build | 36 ++
config/meson.build | 4 ++-
lib/librte_eal/common/arch/arm/meson.build | 5 +++
lib/librte_eal/common/include/arch/arm/meson.build | 29 +
4 files changed, 73 insertions(+), 1 deletion(-)
create mode 100644 config/arm/meson.build
create mode 100644 lib/librte_eal/common/arch/arm/meson.build
create mode 100644 lib/librte_eal/common/include/arch/arm/meson.build
diff --git a/config/arm/meson.build b/config/arm/meson.build
new file mode 100644
index 0..f05de4c2c
--- /dev/null
+++ b/config/arm/meson.build
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+# Copyright(c) 2017 Cavium, Inc
+
+# for checking defines we need to use the correct compiler flags
+march_opt = '-march=@0@'.format(machine)
+
+dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
+if cc.sizeof('void *') == 8
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
+ dpdk_conf.set('RTE_ARCH_ARM64', 1)
+ dpdk_conf.set('RTE_ARCH_64', 1)
+else
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
+ dpdk_conf.set('RTE_ARCH_ARM', 1)
+ dpdk_conf.set('RTE_ARCH_ARMv7', 1)
+endif
+
+if cc.get_define('__ARM_NEON', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
+endif
+
+if cc.get_define('__ARM_FEATURE_CRC32', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
+endif
+
+if cc.get_define('__ARM_FEATURE_CRYPTO', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA2', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
+ 'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']
+endif
diff --git a/config/meson.build b/config/meson.build
index 95223042f..fa55c53a5 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -56,8 +56,10 @@ endforeach
compile_time_cpuflags = []
if host_machine.cpu_family().startswith('x86')
arch_subdir = 'x86'
- subdir(arch_subdir)
+elif host_machine.cpu_family().startswith('arm') or
host_machine.cpu_family().startswith('aarch')
+ arch_subdir = 'arm'
endif
+subdir(arch_subdir)
dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
# set the install path for the drivers
diff --git a/lib/librte_eal/common/arch/arm/meson.build
b/lib/librte_eal/common/arch/arm/meson.build
new file mode 100644
index 0..c6bd92272
--- /dev/null
+++ b/lib/librte_eal/common/arch/arm/meson.build
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+
+eal_common_arch_sources = files('rte_cpuflags.c',
+ 'rte_cycles.c')
diff --git a/lib/librte_eal/common/include/arch/arm/meson.build
b/lib/librte_eal/common/include/arch/arm/meson.build
new file mode 100644
index 0..77893fa35
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/meson.build
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+
+install_headers(
+ 'rte_atomic_32.h',
+ 'rte_atomic_64.h',
+ 'rte_atomic.h',
+ 'rte_byteorder.h',
+ 'rte_cpuflags_32.h',
+ 'rte_cpuflags_64.h',
+ 'rte_cpuflags.h',
+ 'rte_cycles_32.h',
+ 'rte_cycles_64.h',
+ 'rte_cycles.h',
+ 'rte_io_64.h',
+ 'rte_io.h',
+ 'rte_memcpy_32.h',
+ 'rte_memcpy_64.h',
+ 'rte_memcpy.h',
+ 'rte_pause_32.h',
+ 'rte_pause_64.h',
+ 'rte_pause.h',
+ 'rte_prefetch_32.h',
+ 'rte_prefetch_64.h',
+ 'rte_prefetch.h',
+ 'rte_rwlock.h',
+ 'rte_spinlock.h',
+ 'rte_vect.h',
+ subdir: get_option('include_subdir_arch'))
--
2.16.0
[dpdk-dev] [PATCH v5 2/2] build: add support for detecting march on ARM
Added support for detecting march and mcpu by reading midr_el1 register.
The implementer, primary part number values read can be used to figure
out the underlying arm cpu.
Signed-off-by: Pavan Nikhilesh
---
app/test-pmd/meson.build| 2 +-
config/arm/armv8_machine.py | 18 +
config/arm/meson.build | 95 +
config/meson.build | 19 -
drivers/meson.build | 2 +-
examples/meson.build| 2 +-
lib/meson.build | 2 +-
meson.build | 2 +-
test/test/meson.build | 2 +-
9 files changed, 121 insertions(+), 23 deletions(-)
create mode 100755 config/arm/armv8_machine.py
diff --git a/app/test-pmd/meson.build b/app/test-pmd/meson.build
index e819677a5..2a3f0ba1f 100644
--- a/app/test-pmd/meson.build
+++ b/app/test-pmd/meson.build
@@ -45,7 +45,7 @@ endif
executable('dpdk-testpmd',
sources,
- c_args: machine_arg,
+ c_args: machine_args,
link_whole: link_libs,
dependencies: dep_objs,
install_rpath: join_paths(get_option('prefix'), driver_install_path),
diff --git a/config/arm/armv8_machine.py b/config/arm/armv8_machine.py
new file mode 100755
index 0..404866d2f
--- /dev/null
+++ b/config/arm/armv8_machine.py
@@ -0,0 +1,18 @@
+#!/usr/bin/python
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Cavium, Inc
+
+ident = []
+fname = '/sys/devices/system/cpu/cpu0/regs/identification/midr_el1'
+with open(fname) as f:
+content = f.read()
+
+midr_el1 = (int(content.rstrip('\n'), 16))
+
+ident.append(hex((midr_el1 >> 24) & 0xFF)) # Implementer
+ident.append(hex((midr_el1 >> 20) & 0xF)) # Variant
+ident.append(hex((midr_el1 >> 16) & 0XF)) # Architecture
+ident.append(hex((midr_el1 >> 4) & 0xFFF)) # Primary Part number
+ident.append(hex(midr_el1 & 0xF)) # Revision
+
+print(' '.join(ident))
diff --git a/config/arm/meson.build b/config/arm/meson.build
index f05de4c2c..212b94499 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -5,28 +5,107 @@
# for checking defines we need to use the correct compiler flags
march_opt = '-march=@0@'.format(machine)
-dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
-if cc.sizeof('void *') == 8
- dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
- dpdk_conf.set('RTE_ARCH_ARM64', 1)
- dpdk_conf.set('RTE_ARCH_64', 1)
+machine_args_generic = [
+ ['default', ['-march=armv8-a+crc+crypto']]]
+machine_args_cavium = [
+ ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
+ ['0xa1', ['-mcpu=thunderxt88']],
+ ['0xa2', ['-mcpu=thunderxt81']],
+ ['0xa3', ['-mcpu=thunderxt83']]]
+
+flags_generic = [[]]
+flags_cavium = [
+ ['RTE_MACHINE', '"thunderx"'],
+ ['RTE_CACHE_LINE_SIZE', 128],
+ ['RTE_MAX_NUMA_NODES', 2],
+ ['RTE_MAX_LCORE', 96],
+ ['RTE_MAX_VFIO_GROUPS', 128],
+ ['RTE_RING_USE_C11_MEM_MODEL', false]]
+
+impl_generic = ['Generic armv8', flags_generic, machine_args_generic]
+impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
+
+if cc.get_define('__clang__') != ''
+ dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'clang')
+ dpdk_conf.set('RTE_TOOLCHAIN_CLANG', 1)
else
+ dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'gcc')
+ dpdk_conf.set('RTE_TOOLCHAIN_GCC', 1)
+endif
+
+dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
+
+if cc.sizeof('void *') != 8
dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
dpdk_conf.set('RTE_ARCH_ARM', 1)
dpdk_conf.set('RTE_ARCH_ARMv7', 1)
+else
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
+ dpdk_conf.set('RTE_ARCH_ARM64', 1)
+ dpdk_conf.set('RTE_ARCH_64', 1)
+
+ machine = []
+ cmd_generic = ['generic', '', '', 'default', '']
+ cmd_output = cmd_generic # Set generic by default
+ machine_args = [] # Clear previous machine args
+ if not meson.is_cross_build()
+ # The script returns ['Implementer', 'Variant', 'Architecture',
+ # 'Primary Part number', 'Revision']
+ detect_vendor = find_program(join_paths(
+ meson.current_source_dir(), 'armv8_machine.py'))
+ cmd = run_command(detect_vendor.path())
+ if cmd.returncode() == 0
+ cmd_output = cmd.stdout().strip().split(' ')
+ endif
+ # Set to generic if variable is not found
+ machine = get_variable('impl_' + cmd_output[0], 'generic')
+ endif
+
+ if machine == 'generic'
+ machine = impl_generic
+ cmd_output = cmd_generic
+ endif
+
+ message('Implementer : ' + machine[0])
+ foreach flag: machine[1]
+ if flag.length() > 0
+ dpdk_conf.set(flag[0], flag[1])
+ endif
+ endforeach
+ # Primary part number based mcpu flags are supported
+ # for gcc versions > 7
+ if cc.version().versi
Re: [dpdk-dev] [PATCH v2 1/3] doc: update feature list for cryptodevs
> -Original Message- > From: Akhil Goyal [mailto:akhil.go...@nxp.com] > Sent: Monday, January 22, 2018 8:47 AM > To: dev@dpdk.org > Cc: De Lara Guarch, Pablo ; > hemant.agra...@nxp.com; alok.makhar...@nxp.com; Griffin, John > ; Trahe, Fiona ; Jain, > Deepak K ; Doherty, Declan > ; Akhil Goyal > Subject: [PATCH v2 1/3] doc: update feature list for cryptodevs > > Signed-off-by: Akhil Goyal Acked-by: Pablo de Lara
[dpdk-dev] [PATCH 1/2] net/mrvl: switch to the new Rx offload API
Since the old Rx offload API is now depracated
update the driver to use the latest one.
Signed-off-by: Tomasz Duszynski
---
drivers/net/mrvl/mrvl_ethdev.c | 73 ++
1 file changed, 59 insertions(+), 14 deletions(-)
diff --git a/drivers/net/mrvl/mrvl_ethdev.c b/drivers/net/mrvl/mrvl_ethdev.c
index 4294c56..2e8c6cc 100644
--- a/drivers/net/mrvl/mrvl_ethdev.c
+++ b/drivers/net/mrvl/mrvl_ethdev.c
@@ -94,6 +94,13 @@
/* Memory size (in bytes) for MUSDK dma buffers */
#define MRVL_MUSDK_DMA_MEMSIZE 41943040
+/** Port Rx offload capabilities */
+#define MRVL_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_FILTER | \
+ DEV_RX_OFFLOAD_JUMBO_FRAME | \
+ DEV_RX_OFFLOAD_CRC_STRIP | \
+ DEV_RX_OFFLOAD_CHECKSUM)
+
+
static const char * const valid_args[] = {
MRVL_IFACE_NAME_ARG,
MRVL_CFG_ARG,
@@ -302,13 +309,13 @@ mrvl_dev_configure(struct rte_eth_dev *dev)
return -EINVAL;
}
- if (!dev->data->dev_conf.rxmode.hw_strip_crc) {
+ if (!(dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_CRC_STRIP)) {
RTE_LOG(INFO, PMD,
"L2 CRC stripping is always enabled in hw\n");
- dev->data->dev_conf.rxmode.hw_strip_crc = 1;
+ dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
}
- if (dev->data->dev_conf.rxmode.hw_vlan_strip) {
+ if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) {
RTE_LOG(INFO, PMD, "VLAN stripping not supported\n");
return -EINVAL;
}
@@ -318,17 +325,17 @@ mrvl_dev_configure(struct rte_eth_dev *dev)
return -EINVAL;
}
- if (dev->data->dev_conf.rxmode.enable_scatter) {
+ if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) {
RTE_LOG(INFO, PMD, "RX Scatter/Gather not supported\n");
return -EINVAL;
}
- if (dev->data->dev_conf.rxmode.enable_lro) {
+ if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
RTE_LOG(INFO, PMD, "LRO not supported\n");
return -EINVAL;
}
- if (dev->data->dev_conf.rxmode.jumbo_frame)
+ if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
ETHER_HDR_LEN - ETHER_CRC_LEN;
@@ -1124,11 +1131,8 @@ mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
info->tx_desc_lim.nb_min = MRVL_PP2_TXD_MIN;
info->tx_desc_lim.nb_align = MRVL_PP2_TXD_ALIGN;
- info->rx_offload_capa = DEV_RX_OFFLOAD_JUMBO_FRAME |
- DEV_RX_OFFLOAD_VLAN_FILTER |
- DEV_RX_OFFLOAD_IPV4_CKSUM |
- DEV_RX_OFFLOAD_UDP_CKSUM |
- DEV_RX_OFFLOAD_TCP_CKSUM;
+ info->rx_offload_capa = MRVL_RX_OFFLOADS;
+ info->rx_queue_offload_capa = MRVL_RX_OFFLOADS;
info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
DEV_TX_OFFLOAD_UDP_CKSUM |
@@ -1140,6 +1144,7 @@ mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
/* By default packets are dropped if no descriptors are available */
info->default_rxconf.rx_drop_en = 1;
+ info->default_rxconf.offloads = DEV_RX_OFFLOAD_CRC_STRIP;
info->max_rx_pktlen = MRVL_PKT_SIZE_MAX;
}
@@ -1308,6 +1313,42 @@ mrvl_fill_bpool(struct mrvl_rxq *rxq, int num)
}
/**
+ * Check whether requested rx queue offloads match port offloads.
+ *
+ * @param
+ * dev Pointer to the device.
+ * @param
+ * requested Bitmap of the requested offloads.
+ *
+ * @return
+ * 1 if requested offloads are okay, 0 otherwise.
+ */
+static int
+mrvl_rx_queue_offloads_okay(struct rte_eth_dev *dev, uint64_t requested)
+{
+ uint64_t mandatory = dev->data->dev_conf.rxmode.offloads;
+ uint64_t supported = MRVL_RX_OFFLOADS;
+ uint64_t unsupported = requested & ~supported;
+ uint64_t missing = (requested & mandatory) ^ mandatory;
+
+ if (unsupported) {
+ RTE_LOG(ERR, PMD, "Some Rx offloads are not supported. "
+ "Requested 0x%" PRIx64 " supported 0x%" PRIx64 ".\n",
+ requested, supported);
+ return 0;
+ }
+
+ if (missing) {
+ RTE_LOG(ERR, PMD, "Some Rx offloads are missing. "
+ "Requested 0x%" PRIx64 " missing 0x%" PRIx64 ".\n",
+ requested, missing);
+ return 0;
+ }
+
+ return 1;
+}
+
+/**
* DPDK callback to configure the receive queue.
*
* @param dev
@@ -1319,7 +1360,7 @@ mrvl_fill_bpool(struct mrvl_rxq *rxq, int num)
* @param socket
* NUMA socket on which memory must be allocated.
* @param conf
- * Thres
[dpdk-dev] [PATCH 0/2] switch to the new Rx/Tx offloads API
This patch series replaces the old Rx/Tx offload API with the new API. Tomasz Duszynski (2): net/mrvl: switch to the new Rx offload API net/mrvl: switch to the new Tx offload API drivers/net/mrvl/mrvl_ethdev.c | 125 ++--- 1 file changed, 106 insertions(+), 19 deletions(-) -- 2.7.4
[dpdk-dev] [PATCH 2/2] net/mrvl: switch to the new Tx offload API
Since the old Tx offload API was depracated
update the driver to use the latest one.
Signed-off-by: Tomasz Duszynski
---
drivers/net/mrvl/mrvl_ethdev.c | 52 ++
1 file changed, 47 insertions(+), 5 deletions(-)
diff --git a/drivers/net/mrvl/mrvl_ethdev.c b/drivers/net/mrvl/mrvl_ethdev.c
index 2e8c6cc..dec56f3 100644
--- a/drivers/net/mrvl/mrvl_ethdev.c
+++ b/drivers/net/mrvl/mrvl_ethdev.c
@@ -100,6 +100,10 @@
DEV_RX_OFFLOAD_CRC_STRIP | \
DEV_RX_OFFLOAD_CHECKSUM)
+/** Port Tx offloads capabilities */
+#define MRVL_TX_OFFLOADS (DEV_TX_OFFLOAD_IPV4_CKSUM | \
+ DEV_TX_OFFLOAD_UDP_CKSUM | \
+ DEV_TX_OFFLOAD_TCP_CKSUM)
static const char * const valid_args[] = {
MRVL_IFACE_NAME_ARG,
@@ -1134,9 +1138,8 @@ mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
info->rx_offload_capa = MRVL_RX_OFFLOADS;
info->rx_queue_offload_capa = MRVL_RX_OFFLOADS;
- info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
- DEV_TX_OFFLOAD_UDP_CKSUM |
- DEV_TX_OFFLOAD_TCP_CKSUM;
+ info->tx_offload_capa = MRVL_TX_OFFLOADS;
+ info->tx_queue_offload_capa = MRVL_TX_OFFLOADS;
info->flow_type_rss_offloads = ETH_RSS_IPV4 |
ETH_RSS_NONFRAG_IPV4_TCP |
@@ -1477,6 +1480,42 @@ mrvl_rx_queue_release(void *rxq)
}
/**
+ * Check whether requested tx queue offloads match port offloads.
+ *
+ * @param
+ * dev Pointer to the device.
+ * @param
+ * requested Bitmap of the requested offloads.
+ *
+ * @return
+ * 1 if requested offloads are okay, 0 otherwise.
+ */
+static int
+mrvl_tx_queue_offloads_okay(struct rte_eth_dev *dev, uint64_t requested)
+{
+ uint64_t mandatory = dev->data->dev_conf.txmode.offloads;
+ uint64_t supported = MRVL_TX_OFFLOADS;
+ uint64_t unsupported = requested & ~supported;
+ uint64_t missing = (requested & mandatory) ^ mandatory;
+
+ if (unsupported) {
+ RTE_LOG(ERR, PMD, "Some Rx offloads are not supported. "
+ "Requested 0x%" PRIx64 " supported 0x%" PRIx64 ".\n",
+ requested, supported);
+ return 0;
+ }
+
+ if (missing) {
+ RTE_LOG(ERR, PMD, "Some Rx offloads are missing. "
+ "Requested 0x%" PRIx64 " missing 0x%" PRIx64 ".\n",
+ requested, missing);
+ return 0;
+ }
+
+ return 1;
+}
+
+/**
* DPDK callback to configure the transmit queue.
*
* @param dev
@@ -1488,7 +1527,7 @@ mrvl_rx_queue_release(void *rxq)
* @param socket
* NUMA socket on which memory must be allocated.
* @param conf
- * Thresholds parameters (unused).
+ * Thresholds parameters.
*
* @return
* 0 on success, negative error value otherwise.
@@ -1496,11 +1535,14 @@ mrvl_rx_queue_release(void *rxq)
static int
mrvl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
unsigned int socket,
- const struct rte_eth_txconf *conf __rte_unused)
+ const struct rte_eth_txconf *conf)
{
struct mrvl_priv *priv = dev->data->dev_private;
struct mrvl_txq *txq;
+ if (!mrvl_tx_queue_offloads_okay(dev, conf->offloads))
+ return -ENOTSUP;
+
if (dev->data->tx_queues[idx]) {
rte_free(dev->data->tx_queues[idx]);
dev->data->tx_queues[idx] = NULL;
--
2.7.4
Re: [dpdk-dev] [PATCH v2 1/3] doc: update feature list for cryptodevs
> -Original Message- > From: Akhil Goyal [mailto:akhil.go...@nxp.com] > Sent: Monday, January 22, 2018 8:47 AM > To: dev@dpdk.org > Cc: De Lara Guarch, Pablo ; > hemant.agra...@nxp.com; alok.makhar...@nxp.com; Griffin, John > ; Trahe, Fiona ; Jain, > Deepak K ; Doherty, Declan > ; Akhil Goyal > Subject: [PATCH v2 1/3] doc: update feature list for cryptodevs > > Signed-off-by: Akhil Goyal Applied to dpdk-next-crypto. Thanks, Pablo
Re: [dpdk-dev] [PATCH 1/5] net/bnxt: fix size of tx ring in HW
On 1/22/2018 6:20 AM, Ajit Khaparde wrote:
> During Tx ring allocation, the actual ring size configured in the HW
> ends up being twice the number of txd parameter specified to the driver.
> The power of 2 ring size wrongly adds a +1 while sending the ring
> create command to the FW.
>
> Fixes: 6eb3cc2294fd ("net/bnxt: add initial Tx code")
If you request this fix to be backported to the stable trees, please add
following line in commit log just below "Fixes:" line:
Cc: sta...@dpdk.org
> Signed-off-by: Ajit Khaparde
> ---
> drivers/net/bnxt/bnxt_txr.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/bnxt/bnxt_txr.c b/drivers/net/bnxt/bnxt_txr.c
> index ac77434b7..2f2c87119 100644
> --- a/drivers/net/bnxt/bnxt_txr.c
> +++ b/drivers/net/bnxt/bnxt_txr.c
> @@ -101,7 +101,7 @@ int bnxt_init_tx_ring_struct(struct bnxt_tx_queue *txq,
> unsigned int socket_id)
> if (ring == NULL)
> return -ENOMEM;
> txr->tx_ring_struct = ring;
> - ring->ring_size = rte_align32pow2(txq->nb_tx_desc + 1);
> + ring->ring_size = rte_align32pow2(txq->nb_tx_desc);
> ring->ring_mask = ring->ring_size - 1;
> ring->bd = (void *)txr->tx_desc_ring;
> ring->bd_dma = txr->tx_desc_mapping;
>
Re: [dpdk-dev] [PATCH 2/5] net/bnxt: use driver specific dynamic log type
On 1/22/2018 6:20 AM, Ajit Khaparde wrote:
> This patch implements driver specific log type doing away with
> usage of RTE_LOG() for logging.
> Signed-off-by: Ajit Khaparde
<...>
> @@ -3433,6 +3434,16 @@ bool is_bnxt_supported(struct rte_eth_dev *dev)
> return is_device_supported(dev, &bnxt_rte_pmd);
> }
>
> +static void
> +bnxt_init_log(void)
> +{
> + bnxt_logtype_driver = rte_log_register("pmd.bnxt.driver");
> + if (bnxt_logtype_driver >= 0)
> + rte_log_set_level(bnxt_logtype_driver, RTE_LOG_NOTICE);
> +}
> +
> RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
> RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
> RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic |
> vfio-pci");
> +
> +RTE_INIT(bnxt_init_log);
Compiler giving warning for this [1], briefly asks putting this line above
"bnxt_init_log":
[1]
...dpdk/drivers/net/bnxt/bnxt_ethdev.c:3518:1: error: attribute declaration must
precede definition [-Werror,-Wignored-attributes]
RTE_INIT(bnxt_init_log);
^
<...>
Re: [dpdk-dev] [PATCH 5/5] net/bnxt: Support for rx/tx_queue_start/stop ops
On 1/22/2018 6:20 AM, Ajit Khaparde wrote:
> Currently this is implemented entirely in the PMD as there is no explicit
> support in the HW. Re-program the RSS Table without this queue on stop
> and add it back to the table on start.
>
> Signed-off-by: Somnath Kotur
> Signed-off-by: Ajit Khaparde
<...>
> @@ -1,4 +1,4 @@
> -/*-
> +/*
> * BSD LICENSE
> *
> * Copyright(c) Broadcom Limited.
Unrelated but since I saw this, do you plan switching to the SPDX tags?
<...>
> @@ -321,8 +334,7 @@ static int bnxt_init_chip(struct bnxt *bp)
>!RTE_ETH_DEV_SRIOV(bp->eth_dev).active) &&
> bp->eth_dev->data->dev_conf.intr_conf.rxq != 0) {
> intr_vector = bp->eth_dev->data->nb_rx_queues;
> - PMD_DRV_LOG(INFO, "%s(): intr_vector = %d\n", __func__,
> - intr_vector);
> + PMD_DRV_LOG(INFO, "intr_vector = %d\n", intr_vector);
With new logging macro "__func__" is duplicate, why not fix them all in the
patch 2/5 that introduces new macro?
<...>
> @@ -2969,6 +2981,49 @@ bnxt_set_eeprom_op(struct rte_eth_dev *dev,
> return 0;
> }
>
> +int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
> +{
> + struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
> + struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
> + struct bnxt_rx_queue *rxq = bp->rx_queues[rx_queue_id];
> + struct bnxt_vnic_info *vnic = NULL;
> +
> + dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
> + rxq->rx_deferred_start = false;
> + PMD_DRV_LOG(INFO, "Rx queue started %d\n", rx_queue_id);
> + if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
> + vnic = rxq->vnic;
> + if (vnic->fw_grp_ids[rx_queue_id] != INVALID_HW_RING_ID)
> + return 0;
> + PMD_DRV_LOG(DEBUG, "vnic = %p fw_grp_id = %d\n",
> + vnic, bp->grp_info[rx_queue_id + 1].fw_grp_id);
> + vnic->fw_grp_ids[rx_queue_id] =
> + bp->grp_info[rx_queue_id + 1].fw_grp_id;
> + return bnxt_vnic_rss_configure(bp, vnic);
> + }
> +
> + return 0;
> +}
> +
> +int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
> +{
> + struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
> + struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
> + struct bnxt_rx_queue *rxq = bp->rx_queues[rx_queue_id];
> + struct bnxt_vnic_info *vnic = NULL;
> +
> + dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
> + rxq->rx_deferred_start = true;
> + PMD_DRV_LOG(DEBUG, "Rx queue stopped\n");
> +
> + if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
> + vnic = rxq->vnic;
> + vnic->fw_grp_ids[rx_queue_id] = INVALID_HW_RING_ID;
> + return bnxt_vnic_rss_configure(bp, vnic);
> + }
> + return 0;
> +}
There is already a source file "bnxt_rxq.c", which seems for Rxq related
functions, why not add new functions there?
<...>
> @@ -364,3 +369,30 @@ uint16_t bnxt_xmit_pkts(void *tx_queue, struct rte_mbuf
> **tx_pkts,
>
> return nb_tx_pkts;
> }
> +
> +int bnxt_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
> +{
> + struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
> + struct bnxt_tx_queue *txq = bp->tx_queues[tx_queue_id];
> +
> + dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
> + txq->tx_deferred_start = false;
> + PMD_DRV_LOG(DEBUG, "Tx queue started\n");
> +
> + return 0;
> +}
> +
> +int bnxt_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
> +{
> + struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
> + struct bnxt_tx_queue *txq = bp->tx_queues[tx_queue_id];
> +
> + /* Handle TX completions */
> + bnxt_handle_tx_cp(txq);
> +
> + dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
> + txq->tx_deferred_start = true;
> + PMD_DRV_LOG(DEBUG, "Tx queue stopped\n");
> +
> + return 0;
> +}
Similar question for these functions, they seem implemented in txr (Tx Ring ?)
source file, bnxt_txq.c seems better fit, what do you think?
<...>
[dpdk-dev] [PATCH] ethdev: move internal callback list definition
This structure is not exposed through public apis, we should just move it
to the core header.
Signed-off-by: David Marchand
Reviewed-by: Ferruh Yigit
---
lib/librte_ether/rte_ethdev.h | 4
lib/librte_ether/rte_ethdev_core.h | 4
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index ccf4a15..1a5b4cd 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -1120,10 +1120,6 @@ struct rte_eth_dev;
#define RTE_ETH_ALL RTE_MAX_ETHPORTS
-struct rte_eth_dev_callback;
-/** @internal Structure to keep track of registered callbacks */
-TAILQ_HEAD(rte_eth_dev_cb_list, rte_eth_dev_callback);
-
/* Macros to check for valid port */
#define RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, retval) do { \
if (!rte_eth_dev_is_valid_port(port_id)) { \
diff --git a/lib/librte_ether/rte_ethdev_core.h
b/lib/librte_ether/rte_ethdev_core.h
index f44b40e..3073e78 100644
--- a/lib/librte_ether/rte_ethdev_core.h
+++ b/lib/librte_ether/rte_ethdev_core.h
@@ -17,6 +17,10 @@
*
*/
+struct rte_eth_dev_callback;
+/** @internal Structure to keep track of registered callbacks */
+TAILQ_HEAD(rte_eth_dev_cb_list, rte_eth_dev_callback);
+
/*
* Definitions of all functions exported by an Ethernet driver through the
* the generic structure of type *eth_dev_ops* supplied in the *rte_eth_dev*
--
2.7.4
Re: [dpdk-dev] [PATCH 4/5] net/bnxt: check if MAC address is all zeros
On 1/22/2018 6:20 AM, Ajit Khaparde wrote:
> In certain cases the MAC address of a port could be all zeros.
> Catch it early, log a message and fail the initiaization.
>
> Signed-off-by: Ajit Khaparde
<...>
> @@ -3247,6 +3247,16 @@ bnxt_dev_init(struct rte_eth_dev *eth_dev)
> rc = -ENOMEM;
> goto error_free;
> }
> +
> + if (check_zero_bytes(bp->dflt_mac_addr, ETHER_ADDR_LEN)) {
There is already a function is_zero_ether_addr() which can be used here that
prevents exposing your check_zero_bytes() function, up to you which one to use.
Re: [dpdk-dev] [PATCH v3 7/7] app/testpmd: adjust ethdev port ownership
Hi lads,
>
> Hi Matan,
>
> On Fri, Jan 19, 2018 at 01:35:10PM +, Matan Azrad wrote:
> > Hi Konstantin
> >
> > From: Ananyev, Konstantin, Friday, January 19, 2018 3:09 PM
> > > > -Original Message-
> > > > From: Matan Azrad [mailto:ma...@mellanox.com]
> > > > Sent: Friday, January 19, 2018 12:52 PM
> > > > To: Ananyev, Konstantin ; Thomas
> > > > Monjalon ; Gaetan Rivet
> > > ;
> > > > Wu, Jingjing
> > > > Cc: dev@dpdk.org; Neil Horman ; Richardson,
> > > > Bruce
> > > > Subject: RE: [PATCH v3 7/7] app/testpmd: adjust ethdev port ownership
> > > >
> > > > Hi Konstantin
> > > >
> > > > From: Ananyev, Konstantin, Friday, January 19, 2018 2:38 PM
> > > > > To: Matan Azrad ; Thomas Monjalon
> > > > > ; Gaetan Rivet ;
> > > Wu,
> > > > > Jingjing
> > > > > Cc: dev@dpdk.org; Neil Horman ; Richardson,
> > > > > Bruce
> > > > > Subject: RE: [PATCH v3 7/7] app/testpmd: adjust ethdev port
> > > > > ownership
> > > > >
> > > > > Hi Matan,
> > > > >
> > > > > > -Original Message-
> > > > > > From: Matan Azrad [mailto:ma...@mellanox.com]
> > > > > > Sent: Thursday, January 18, 2018 4:35 PM
> > > > > > To: Thomas Monjalon ; Gaetan Rivet
> > > > > > ; Wu, Jingjing
> > > > > > Cc: dev@dpdk.org; Neil Horman ;
> > > Richardson,
> > > > > > Bruce ; Ananyev, Konstantin
> > > > > >
> > > > > > Subject: [PATCH v3 7/7] app/testpmd: adjust ethdev port ownership
> > > > > >
> > > > > > Testpmd should not use ethdev ports which are managed by other
> > > > > > DPDK entities.
> > > > > >
> > > > > > Set Testpmd ownership to each port which is not used by other
> > > > > > entity and prevent any usage of ethdev ports which are not owned by
> > > Testpmd.
> > > > > >
> > > > > > Signed-off-by: Matan Azrad
> > > > > > ---
> > > > > > app/test-pmd/cmdline.c | 89
> > > > > > +++-
> > >
> > > > > -
> > > > > > app/test-pmd/cmdline_flow.c | 2 +-
> > > > > > app/test-pmd/config.c | 37 ++-
> > > > > > app/test-pmd/parameters.c | 4 +-
> > > > > > app/test-pmd/testpmd.c | 63
> > > > > > app/test-pmd/testpmd.h | 3 ++
> > > > > > 6 files changed, 103 insertions(+), 95 deletions(-)
> > > > > >
> > > > > > diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c index
> > > > > > 31919ba..6199c64 100644
> > > > > > --- a/app/test-pmd/cmdline.c
> > > > > > +++ b/app/test-pmd/cmdline.c
> > > > > > @@ -1394,7 +1394,7 @@ struct cmd_config_speed_all {
> > > > > > &link_speed) < 0)
> > > > > > return;
> > > > > >
> > > > > > - RTE_ETH_FOREACH_DEV(pid) {
> > > > > > + RTE_ETH_FOREACH_DEV_OWNED_BY(pid, my_owner.id) {
> > > > >
> > > > > Why do we need all these changes?
> > > > > As I understand you changed definition of RTE_ETH_FOREACH_DEV(), so
> > > > > no testpmd should work ok default (no_owner case).
> > > > > Am I missing something here?
> > > >
> > > > Now, After Gaetan suggestion RTE_ETH_FOREACH_DEV(pid) will iterate
> > > over all valid and ownerless ports.
> > >
> > > Yes.
> > >
> > > > Here Testpmd wants to iterate over its owned ports.
> > >
> > > Why? Why it can't just iterate over all valid and ownerless ports?
> > > As I understand it would be enough to fix current problems and would allow
> > > us to avoid any changes in testmpd (which I think is a good thing).
> >
> > Yes, I understand that this big change is very daunted, But I think the
> > current a lot of bugs in testpmd(regarding port ownership) even more
> daunted.
> >
> > Look,
> > Testpmd initiates some of its internal databases depends on specific port
> > iteration,
> > In some time someone may take ownership of Testpmd ports and testpmd will
> > continue to touch them.
But if someone will take the ownership (assign new owner_id) that port will not
appear
in RTE_ETH_FOREACH_DEV() any more.
> >
>
> If I look back on the fail-safe, its sole purpose is to have seamless
> hotplug with existing applications.
>
> Port ownership is a genericization of some functions introduced by the
> fail-safe, that could structure DPDK further. It should allow
> applications to have a seamless integration with subsystems using port
> ownership. Without this, port ownership cannot be used.
>
> Testpmd should be fixed, but follow the most common design patterns of
> DPDK applications. Going with port ownership seems like a paradigm
> shift.
>
> > In addition
> > Using the old iterator in some places in testpmd will cause a race for
> > run-time new ports(can be created by failsafe or any hotplug code):
> > - testpmd finds an ownerless port(just now created) by the old iterator and
> > start traffic there,
> > - failsafe takes ownership of this new port and start traffic there.
> > Problem!
Could you shed a bit more light here - it would be race condition between whom
and whom?
As I remember in testpmd all control ops are done within one thread (main
lcore).
The only way to attach/detach port with
Re: [dpdk-dev] [PATCH v5 2/2] build: add support for detecting march on ARM
On Mon, Jan 22, 2018 at 05:16:49PM +0530, Pavan Nikhilesh wrote:
> Added support for detecting march and mcpu by reading midr_el1 register.
> The implementer, primary part number values read can be used to figure
> out the underlying arm cpu.
>
> Signed-off-by: Pavan Nikhilesh
> ---
> app/test-pmd/meson.build| 2 +-
> config/arm/armv8_machine.py | 18 +
> config/arm/meson.build | 95
> +
> config/meson.build | 19 -
> drivers/meson.build | 2 +-
> examples/meson.build| 2 +-
> lib/meson.build | 2 +-
> meson.build | 2 +-
> test/test/meson.build | 2 +-
> 9 files changed, 121 insertions(+), 23 deletions(-)
> create mode 100755 config/arm/armv8_machine.py
>
> diff --git a/app/test-pmd/meson.build b/app/test-pmd/meson.build
> index e819677a5..2a3f0ba1f 100644
> --- a/app/test-pmd/meson.build
> +++ b/app/test-pmd/meson.build
> @@ -45,7 +45,7 @@ endif
>
> executable('dpdk-testpmd',
> sources,
> - c_args: machine_arg,
> + c_args: machine_args,
> link_whole: link_libs,
> dependencies: dep_objs,
> install_rpath: join_paths(get_option('prefix'), driver_install_path),
> diff --git a/config/arm/armv8_machine.py b/config/arm/armv8_machine.py
> new file mode 100755
> index 0..404866d2f
> --- /dev/null
> +++ b/config/arm/armv8_machine.py
> @@ -0,0 +1,18 @@
> +#!/usr/bin/python
> +# SPDX-License-Identifier: BSD-3-Clause
> +# Copyright(c) 2017 Cavium, Inc
> +
> +ident = []
> +fname = '/sys/devices/system/cpu/cpu0/regs/identification/midr_el1'
> +with open(fname) as f:
> +content = f.read()
> +
> +midr_el1 = (int(content.rstrip('\n'), 16))
> +
> +ident.append(hex((midr_el1 >> 24) & 0xFF)) # Implementer
> +ident.append(hex((midr_el1 >> 20) & 0xF)) # Variant
> +ident.append(hex((midr_el1 >> 16) & 0XF)) # Architecture
> +ident.append(hex((midr_el1 >> 4) & 0xFFF)) # Primary Part number
> +ident.append(hex(midr_el1 & 0xF)) # Revision
> +
> +print(' '.join(ident))
> diff --git a/config/arm/meson.build b/config/arm/meson.build
> index f05de4c2c..212b94499 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -5,28 +5,107 @@
> # for checking defines we need to use the correct compiler flags
> march_opt = '-march=@0@'.format(machine)
>
> -dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
> -if cc.sizeof('void *') == 8
> - dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
> - dpdk_conf.set('RTE_ARCH_ARM64', 1)
> - dpdk_conf.set('RTE_ARCH_64', 1)
> +machine_args_generic = [
> + ['default', ['-march=armv8-a+crc+crypto']]]
> +machine_args_cavium = [
> + ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
> + ['0xa1', ['-mcpu=thunderxt88']],
> + ['0xa2', ['-mcpu=thunderxt81']],
> + ['0xa3', ['-mcpu=thunderxt83']]]
> +
> +flags_generic = [[]]
> +flags_cavium = [
> + ['RTE_MACHINE', '"thunderx"'],
> + ['RTE_CACHE_LINE_SIZE', 128],
> + ['RTE_MAX_NUMA_NODES', 2],
> + ['RTE_MAX_LCORE', 96],
> + ['RTE_MAX_VFIO_GROUPS', 128],
> + ['RTE_RING_USE_C11_MEM_MODEL', false]]
> +
> +impl_generic = ['Generic armv8', flags_generic, machine_args_generic]
> +impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
> +
> +if cc.get_define('__clang__') != ''
> + dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'clang')
> + dpdk_conf.set('RTE_TOOLCHAIN_CLANG', 1)
> else
> + dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'gcc')
> + dpdk_conf.set('RTE_TOOLCHAIN_GCC', 1)
> +endif
> +
> +dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
> +
> +if cc.sizeof('void *') != 8
> dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
> dpdk_conf.set('RTE_ARCH_ARM', 1)
> dpdk_conf.set('RTE_ARCH_ARMv7', 1)
> +else
> + dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
> + dpdk_conf.set('RTE_ARCH_ARM64', 1)
> + dpdk_conf.set('RTE_ARCH_64', 1)
> +
> + machine = []
> + cmd_generic = ['generic', '', '', 'default', '']
> + cmd_output = cmd_generic # Set generic by default
> + machine_args = [] # Clear previous machine args
> + if not meson.is_cross_build()
> + # The script returns ['Implementer', 'Variant', 'Architecture',
> + # 'Primary Part number', 'Revision']
> + detect_vendor = find_program(join_paths(
> + meson.current_source_dir(), 'armv8_machine.py'))
> + cmd = run_command(detect_vendor.path())
> + if cmd.returncode() == 0
> + cmd_output = cmd.stdout().strip().split(' ')
> + endif
> + # Set to generic if variable is not found
> + machine = get_variable('impl_' + cmd_output[0], 'generic')
> + endif
> +
> + if machine == 'generic'
> + machine = impl_generic
> + cmd_output = cmd_generic
> + endif
> +
> + message('Implementer : ' + machine[0])
When cross-compiling for arm I get an error at this line:
[dpdk-dev] [Bug 12] Request for submit in Kernel Upstream
https://dpdk.org/tracker/show_bug.cgi?id=12 Bug ID: 12 Summary: Request for submit in Kernel Upstream Product: DPDK Version: unspecified Hardware: All OS: Linux Status: CONFIRMED Severity: normal Priority: Normal Component: ethdev Assignee: dev@dpdk.org Reporter: d...@leonardoamaral.com.br Target Milestone: --- Hello! As reported in https://bugzilla.redhat.com/show_bug.cgi?id=1536589#c3 - distribution packagers could not use KNI in their default packaging system since the kernel module isn't in upstream (I think it also leads to Secure Boot issues too). So can DPDK modules be submitted to Upstream Linux Kernel? Thanks! -- You are receiving this mail because: You are the assignee for the bug.
[dpdk-dev] [PATCH v3 1/2] net/mlx5: fix return value of start operation
On error, mlx5_dev_start() does not return a negative value
as it is supposed to do. The consequence is that the application
(ex: testpmd) does not notice that the port is not started
and begins the rxtx on an uninitialized port, which crashes.
Fixes: e1016cb73383 ("net/mlx5: fix Rx interrupts management")
Cc: sta...@dpdk.org
Signed-off-by: Olivier Matz
Acked-by: Nelio Laranjeiro
---
v2->v3:
- rebase on top of head
The commit is much smaller after
c7bf62255edf ("net/mlx5: fix handling link status event")
For backport, prefer the v2.
drivers/net/mlx5/mlx5_trigger.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c
index 61fa2604f..827db2e7e 100644
--- a/drivers/net/mlx5/mlx5_trigger.c
+++ b/drivers/net/mlx5/mlx5_trigger.c
@@ -181,7 +181,7 @@ mlx5_dev_start(struct rte_eth_dev *dev)
priv_rxq_stop(priv);
priv_flow_delete_drop_queue(priv);
priv_unlock(priv);
- return -err;
+ return err;
}
/**
--
2.11.0
[dpdk-dev] [PATCH v3 2/2] net/mlx5: fix allocation when no memory on device NUMA node
When no memory is available on the same numa node than the device, the
initialization of the device fails. However, the use case where the
cores and memory are on a different socket than the device is valid,
even if not optimal.
To fix this issue, this commit introduces an infrastructure to select
the socket on which to allocate the verbs objects based on the ethdev
configuration and the object type, rather than the PCI numa node.
Fixes: 1e3a39f72d5d ("net/mlx5: allocate verbs object into shared memory")
Cc: sta...@dpdk.org
Signed-off-by: Olivier Matz
Signed-off-by: Nelio Laranjeiro
---
v2->v3:
- fix commit log
- VERSB -> VERBS
v1->v2:
- update from Nelop to select socket on which to allocate based on
config and object type
drivers/net/mlx5/mlx5.c | 14 --
drivers/net/mlx5/mlx5.h | 20
drivers/net/mlx5/mlx5_rxq.c | 4
drivers/net/mlx5/mlx5_txq.c | 4
4 files changed, 40 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 9d1de366b..bc4b6bad0 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -139,10 +139,20 @@ mlx5_alloc_verbs_buf(size_t size, void *data)
struct priv *priv = data;
void *ret;
size_t alignment = sysconf(_SC_PAGESIZE);
+ unsigned int socket = SOCKET_ID_ANY;
+ if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
+ const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
+
+ socket = ctrl->socket;
+ } else if (priv->verbs_alloc_ctx.type ==
+ MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
+ const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
+
+ socket = ctrl->socket;
+ }
assert(data != NULL);
- ret = rte_malloc_socket(__func__, size, alignment,
- priv->dev->device->numa_node);
+ ret = rte_malloc_socket(__func__, size, alignment, socket);
DEBUG("Extern alloc size: %lu, align: %lu: %p", size, alignment, ret);
return ret;
}
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index eb0894fa5..a7ec607c3 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -123,6 +123,24 @@ struct mlx5_dev_config {
int inline_max_packet_sz; /* Max packet size for inlining. */
};
+/**
+ * Type of objet being allocated.
+ */
+enum mlx5_verbs_alloc_type {
+ MLX5_VERBS_ALLOC_TYPE_NONE,
+ MLX5_VERBS_ALLOC_TYPE_TX_QUEUE,
+ MLX5_VERBS_ALLOC_TYPE_RX_QUEUE,
+};
+
+/**
+ * Verbs allocator needs a context to know in the callback which kind of
+ * resources it is allocating.
+ */
+struct mlx5_verbs_alloc_ctx {
+ enum mlx5_verbs_alloc_type type; /* Kind of object being allocated. */
+ const void *obj; /* Pointer to the DPDK object. */
+};
+
struct priv {
struct rte_eth_dev *dev; /* Ethernet device of master process. */
struct ibv_context *ctx; /* Verbs context. */
@@ -164,6 +182,8 @@ struct priv {
int primary_socket; /* Unix socket for primary process. */
struct rte_intr_handle intr_handle_socket; /* Interrupt handler. */
struct mlx5_dev_config config; /* Device configuration. */
+ struct mlx5_verbs_alloc_ctx verbs_alloc_ctx;
+ /* Context for Verbs allocator. */
};
/**
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index 8e4fbbf2a..0274ccf31 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -655,6 +655,8 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
assert(rxq_data);
assert(!rxq_ctrl->ibv);
+ priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_RX_QUEUE;
+ priv->verbs_alloc_ctx.obj = rxq_ctrl;
tmpl = rte_calloc_socket(__func__, 1, sizeof(*tmpl), 0,
rxq_ctrl->socket);
if (!tmpl) {
@@ -818,6 +820,7 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
DEBUG("%p: Verbs Rx queue %p: refcnt %d", (void *)priv,
(void *)tmpl, rte_atomic32_read(&tmpl->refcnt));
LIST_INSERT_HEAD(&priv->rxqsibv, tmpl, next);
+ priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
return tmpl;
error:
if (tmpl->wq)
@@ -828,6 +831,7 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
claim_zero(ibv_destroy_comp_channel(tmpl->channel));
if (tmpl->mr)
priv_mr_release(priv, tmpl->mr);
+ priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
return NULL;
}
diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
index 49018303e..18321c3e3 100644
--- a/drivers/net/mlx5/mlx5_txq.c
+++ b/drivers/net/mlx5/mlx5_txq.c
@@ -396,6 +396,8 @@ mlx5_priv_txq_ibv_new(struct priv *priv, uint16_t idx)
int ret = 0;
assert(txq_data);
+ priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_TX_QUEUE;
+ priv->verbs_alloc_ctx.obj
Re: [dpdk-dev] [PATCH v5 2/2] build: add support for detecting march on ARM
On Mon, Jan 22, 2018 at 12:30:53PM +, Bruce Richardson wrote:
> On Mon, Jan 22, 2018 at 05:16:49PM +0530, Pavan Nikhilesh wrote:
> > Added support for detecting march and mcpu by reading midr_el1 register.
> > The implementer, primary part number values read can be used to figure
> > out the underlying arm cpu.
> >
> > Signed-off-by: Pavan Nikhilesh
> > ---
> > app/test-pmd/meson.build| 2 +-
> > config/arm/armv8_machine.py | 18 +
> > config/arm/meson.build | 95
> > +
> > config/meson.build | 19 -
> > drivers/meson.build | 2 +-
> > examples/meson.build| 2 +-
> > lib/meson.build | 2 +-
> > meson.build | 2 +-
> > test/test/meson.build | 2 +-
> > 9 files changed, 121 insertions(+), 23 deletions(-)
> > create mode 100755 config/arm/armv8_machine.py
> >
> > +
> > + if machine == 'generic'
> > + machine = impl_generic
> > + cmd_output = cmd_generic
> > + endif
> > +
> > + message('Implementer : ' + machine[0])
>
> When cross-compiling for arm I get an error at this line:
>
> Meson encountered an error in file config/arm/meson.build, line 69, column
> 1:
> Index 0 out of bounds of array of size 0.
>
Will be sending v2 of the cross patch soon(once directory structure and file
name is fininlized) that would resolve this issue.
> Regards,
> /Bruce
Thanks,
Pavan.
>
>
Re: [dpdk-dev] [PATCH] build: add support for vendor specific ARM cross builds
-Original Message- > Date: Fri, 19 Jan 2018 17:35:57 + > From: Bruce Richardson > To: Pavan Nikhilesh > CC: jerin.ja...@caviumnetworks.com, harry.van.haa...@intel.com, > tho...@monjalon.net, dev@dpdk.org > Subject: Re: [dpdk-dev] [PATCH] build: add support for vendor specific ARM > cross builds > User-Agent: Mutt/1.9.1 (2017-09-22) > > On Fri, Jan 19, 2018 at 10:56:08PM +0530, Pavan Nikhilesh wrote: > > On Fri, Jan 19, 2018 at 04:41:26PM +, Bruce Richardson wrote: > > > On Fri, Jan 19, 2018 at 06:45:08PM +0530, Pavan Nikhilesh wrote: > > > > Add various vendor specific cross build targets. > > > > This can be verified by using linaro toolchain and running > > > > > > > > meson build --cross-file config/arm/arch64_armv8__cross > > > > > > > > > > "arch64-armv8"? I thought we were standardizing on "arm64" as the naming > > > here, or alternatively I think it should be "aarch64", right? > > > > > > > Currently, make uses "arm64-" as the naming convention. > > I think either "arm64-" is better as we can easily represent > > "arm-" (v7). > > > Yes, keep it consistent with "make" names to avoid confusion. +1 to keep it consistent with "make" names. > > > > In terms of file naming, do we want to have a file extension on these > > > files. I wondering if we want to change "_cross" to ".cross" for > > > instance. The basic example in the meson docs uses a .txt extension but > > > that looks weird to me. No strong opinion on my end, just looking for > > > any other ideas. > > > > > > > In future more cross build targets can be added. > > > > > > Yes, good idea. Is config/ the best place to hold these, or should > > > we have a separate cross-build folder? I quite like having them in > > > config like you have done, but wondering if anyone disagrees? > > > > > > > I split this patch out from the other series specifically so that we could > > discuss and agree upon common name/path etc. :-). > > Good idea. If no discussion or objection I'll take your patch as-is > (with arm64 filenames) and we can always move/rename files later. > > > > > Thanks, Pavan > > > > > > > > Signed-off-by: Pavan Nikhilesh > > > > --- config/arm/arch64_armv8_generic_cross | 10 +++ > > > > config/arm/arch64_armv8_thunderx_cross | 13 + > > > > config/arm/meson.build | 52 > > > > +++--- 3 files changed, 52 > > > > insertions(+), 23 deletions(-) create mode 100644 > > > > config/arm/arch64_armv8_generic_cross create mode 100644 > > > > config/arm/arch64_armv8_thunderx_cross > > > > > > > > > > Adding Thomas on CC as he always has opinions on file locations and > > > naming. > > > > > > /Bruce
Re: [dpdk-dev] [PATCH 4/6] ethdev: introduce TX common tunnel offloads
Hi, On Tue, Jan 16, 2018 at 07:06:15PM +, Shahaf Shuler wrote: > Hi Oliver, Xueming, > > Tuesday, January 16, 2018 7:29 PM, Xueming(Steven) Li: > > > Hi Xueming, > > > > > > On Tue, Jan 09, 2018 at 10:11:08PM +0800, Xueming Li wrote: > > > > */ > > > > #define DEV_TX_OFFLOAD_SECURITY 0x0002 > > > > +/**< Device supports arbitrary tunnel chksum and tso offloading w/o > > > knowing > > > > + * tunnel detail. Checksum and TSO are calculated based on mbuf > > > fields: > > > > + * l*_len, outer_l*_len > > > > + * PKT_TX_OUTER_IPV6, PKT_TX_IPV6 > > > > + * PKT_TX_IP_CKSUM, PKT_TX_TCP_CKSUM, PKT_TX_UDP_CKSUM > > > > + * When set application must guarantee correct header fields, no need > > > to > > > > + * specify tunnel type PKT_TX_TUNNEL_* for HW. > > > > + */ > > I think some documentation is missing here. > What the NIC needs to know to support the generic tunnel TSO and checksum > offloads is: > 1. the length of each header > 2. the type of the outer/inner l3/l4. Meaning is it IPv4/IPv6 and whether it > is UDP/TCP. > > The outer IPv6 seems covered. The inner L4 seems missing. > > More details about this offload below. > > > > > +#define DEV_TX_OFFLOAD_GENERIC_TNL_CKSUM_TSO 0x0004 > > > > > > > > struct rte_pci_device; > > > > > > > > > > I'd like to have more details about this flag and its meaning. > > > > > > Let's say we want to do TSO on the following vxlan packet: > > > Ether / IP1 / UDP / VXLAN / Ether / IP2 / TCP / Data > > > > > > With the current API, we need to pass the tunnel type to the hardware > > > with the flag PKT_TX_TUNNEL_VXLAN. Thanks to that, the driver can > > > forward this information to the hardware so it knows that the > > > ip1->length, udp->length and optionally the udp->chksum have to be > > > updated for each generated segment. > > > > > > With your proposal, if I understand properly, it is not expected to > > > pass the tunnel type in the mbuf. So how can the hardware know if some > > > fields have to be updated in the outer header? > > > > I'm not expert on hardware, the driver has to supply outer and inner > > L3/L4 offsets, types and which field(s) to fill checksum, no length update > > as > > far as I know. > > Mellanox HW is capable to parse the packet according to hints from the driver. > > If you think about it, to calculate the IP checksum all you need to do is > know the inner/outer IP offset, and the fact it is an IPv4. > To calculate the inner TCP/UDP checksum it is the same. all that after the L4 > is counted as payload and the pseudo header can be done with the information > about the IP. > > About TSO - just need to get the offset till the inner header so that the NIC > can append the full headers to every segment and update the inner/outer L3 > and L4 fields accordingly (which their location is known). I think that's partially true. Let me try to clarify: - in case of VXLAN (my previous example), the hw needs to update the outer L3 (ip length) and L4 (udp length and optionnally checksum) - in case of GRE, an update of the checksum is required if present. The sequence number may also be increased (I don't know how widely it is used). - in case of a proprietary or unsupported tunnel, the hardware cannot know which fields to update in the outer header. So I'm not sure a "generic" flag is possible. How can the application know which tunnels types are supported by the hardware and which should be done in software? Olivier
Re: [dpdk-dev] [PATCH] examples: update copyright and license
On Wed, Jan 17, 2018 at 02:39:09PM +, Lee Daly wrote: > This updates the license on files in examples to be the standard > BSD-3-Clause license used for the rest of DPDK, > bringing the files in compliance with the DPDK licensing policy. > > Signed-off-by: Lee Daly For the 6WIND copyright part: Acked-by: Olivier Matz
Re: [dpdk-dev] mbuf vlan_tci validity unclear
Hi Morten, On Wed, Jan 17, 2018 at 10:20:53PM +0100, Morten Brørup wrote: > In rte_mbuf.h, the description of the PKT_RX_VLAN flag (lines 93-94) says that > mbuf->vlan_tci contains the VLAN TCI if the flag is set; however, the > description of the vlan_tci field (line 513) says that the > PKT_RX_VLAN_STRIPPED flag must be set for it to be valid. > > Which one is it? And will someone please update the comments in rte_mbuf.h > accordingly. Thanks for spotting this, I will send a patch to fix it. PKT_RX_VLAN means that mbuf->vlan_tci is valid. And PKT_RX_VLAN_STRIPPED implies that PKT_RX_VLAN is set too.
Re: [dpdk-dev] mbuf TX VLAN flags should be renamed
On Wed, Jan 17, 2018 at 10:23:06PM +0100, Morten Brørup wrote: > PKT_RX_VLAN_PKT and PKT_RX_QINQ_PKT were renamed to PKT_RX_VLAN and > PKT_RX_QINQ somewhere between DPDK version 16.07 and version 17.11. > > Shouldn’t PKT_TX_VLAN_PKT and PKT_TX_QINQ_PKT follow the same naming > convention and get rid of the _PKT postfix? Yes. I'll send a patch for this. Thanks Olivier
Re: [dpdk-dev] [PATCH] mbuf: remove void pointer cast
On Fri, Jan 19, 2018 at 06:18:13PM +0800, Zhiyong Yang wrote: > It is unnecessary to cast from void * to struct rte_mbuf *, > the change can make code clearer. > > Signed-off-by: Zhiyong Yang Acked-by: Olivier Matz Zhihong, for next time please prefix the patch with "PATCH v2" and use --in-reply-to with the message id of the first version. Thanks Olivier
[dpdk-dev] [RFC 1/3] lib/security: set/retrieve per packet protocol metadata
This patch enables the application to set & retrieve per packet protocol
parameters like seq no, which is required in case of protocol offload. The
ability to set/retrieve such data is PMD dependent and the application is
expected to use "mdata_flags" while using such fields.
Retrieving the sequence number is required to monitor the sequence
number overflow in inline IPsec offload.
Signed-off-by: Anoob Joseph
---
lib/librte_security/rte_security.c| 7 ++--
lib/librte_security/rte_security.h| 66 ---
lib/librte_security/rte_security_driver.h | 3 +-
3 files changed, 64 insertions(+), 12 deletions(-)
diff --git a/lib/librte_security/rte_security.c
b/lib/librte_security/rte_security.c
index 5805051..508046b 100644
--- a/lib/librte_security/rte_security.c
+++ b/lib/librte_security/rte_security.c
@@ -100,12 +100,11 @@ rte_security_session_destroy(struct rte_security_ctx
*instance,
int
rte_security_set_pkt_metadata(struct rte_security_ctx *instance,
- struct rte_security_session *sess,
- struct rte_mbuf *m, void *params)
+ struct rte_security_mdata *mdata,
+ struct rte_mbuf *m)
{
RTE_FUNC_PTR_OR_ERR_RET(*instance->ops->set_pkt_metadata, -ENOTSUP);
- return instance->ops->set_pkt_metadata(instance->device,
- sess, m, params);
+ return instance->ops->set_pkt_metadata(instance->device, mdata, m);
}
void *
diff --git a/lib/librte_security/rte_security.h
b/lib/librte_security/rte_security.h
index 004a0eb..9d322a8 100644
--- a/lib/librte_security/rte_security.h
+++ b/lib/librte_security/rte_security.h
@@ -284,6 +284,48 @@ struct rte_security_session {
/**< Private session material */
};
+/* IN/OUT flags for IPsec mdata */
+
+/**
+ * IN/OUT flag for sequence number
+ */
+#define RTE_SECURITY_IPSEC_MDATA_FLAGS_SEQ_NO (1ULL << 0)
+
+/**
+ * Metadata for IPsec protocol offload
+ */
+struct rte_security_ipsec_mdata {
+ uint64_t seq_no;
+ /**< Sequence number */
+};
+
+/**
+ * Per packet metadata for protocol offload
+ */
+struct rte_security_mdata {
+ struct rte_security_session *sess;
+ /**< Security session */
+ union {
+ struct rte_security_ipsec_mdata ipsec;
+ };
+ /**< Protocol specific metadata. This field is IN/OUT, and could be
+* used for setting and retrieving per packet metadata.
+*/
+ struct {
+ uint32_t set;
+ /**< Used by application to denote the fields it has set */
+ uint32_t get;
+ /**< Used by application to denote the fields PMD should
+* update back
+*/
+ uint32_t updated;
+ /**< Used by PMD to denote the fields it has set */
+ } mdata_flags;
+ /**< Flags to denote the usage of various fields in metadata */
+ void *params;
+ /**< Device specific pointer */
+};
+
/**
* Create security session as specified by the session configuration
*
@@ -331,13 +373,25 @@ rte_security_session_destroy(struct rte_security_ctx
*instance,
struct rte_security_session *sess);
/**
- * Updates the buffer with device-specific defined metadata
+ * Updates the buffer with the security metadata.
+ *
+ * This metadata could be used by the application to set some protocol defined
+ * fields per packet. For such protocol defined fields, application can only
+ * request the PMD to set various values, and it will be upto the PMD to
+ * decide whether the provided values should be used or not.
+ *
+ * In addition, this could be used by the application to probe such per packet
+ * fields used in inline offload case. PMD would update the metadata field with
+ * what it would use, if the corresponding "get" flag is set.
+ *
+ * E.g. for inline IPsec mode, application could request a sequence number by
+ * setting "rte_security_mdata.ipsec.seq_no" field and the corresponding flag.
+ * Additionally, "rte_security_mdata.mdata_flags.get" would give application
+ * the ability to check the sequence number selected for the packet.
*
* @param instancesecurity instance
- * @param sesssecurity session
+ * @param mdata security metadata
* @param mb packet mbuf to set metadata on.
- * @param params device-specific defined parameters
- * required for metadata
*
* @return
* - On success, zero.
@@ -345,8 +399,8 @@ rte_security_session_destroy(struct rte_security_ctx
*instance,
*/
int
rte_security_set_pkt_metadata(struct rte_security_ctx *instance,
- struct rte_security_session *sess,
- struct rte_mbuf *mb, void *params);
+ struct rte_security_mdata
[dpdk-dev] [RFC 0/3] set protocol specific metadata using set_pkt_metadata API
This series adds support for setting & retrieving per packet protocol specific metadata. This is primarily required by the application to monitor sequence number overflows in inline protocol processing. The feature is added to the existing set_pkt_metadata API. The existing API passes all arguments directly. This series introduces a new structure which could be used to pass all metadata required in such cases. The patch set adds the ability to both set & retrieve such parameters. The idea is to make the application determine the sequence number to be used, where it is supported. If the PMD doesn't support it that way (as in the parameters are maintained by PMD/device), then application could just retrieve the value and see if there is any overflow etc happening. SA expiry/overflow monitoring requires knowing the latest sequence number on an SA. So this change allows that ability - for now for the outbound SA. Anoob Joseph (3): lib/security: set/retrieve per packet protocol metadata net/ixgbe: use structure for passing metadata examples/ipsec-secgw: support for setting seq no drivers/net/ixgbe/ixgbe_ipsec.c | 5 ++- examples/ipsec-secgw/esp.h| 9 + examples/ipsec-secgw/ipsec.c | 42 +--- lib/librte_security/rte_security.c| 7 ++-- lib/librte_security/rte_security.h| 66 --- lib/librte_security/rte_security_driver.h | 3 +- 6 files changed, 112 insertions(+), 20 deletions(-) -- 2.7.4
[dpdk-dev] [RFC 2/3] net/ixgbe: use structure for passing metadata
Using structure to pass metadata
Signed-off-by: Anoob Joseph
---
drivers/net/ixgbe/ixgbe_ipsec.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_ipsec.c b/drivers/net/ixgbe/ixgbe_ipsec.c
index 85305c6..6c8d6b4 100644
--- a/drivers/net/ixgbe/ixgbe_ipsec.c
+++ b/drivers/net/ixgbe/ixgbe_ipsec.c
@@ -444,9 +444,10 @@ ixgbe_crypto_compute_pad_len(struct rte_mbuf *m)
static int
ixgbe_crypto_update_mb(void *device __rte_unused,
- struct rte_security_session *session,
- struct rte_mbuf *m, void *params __rte_unused)
+ struct rte_security_mdata *sec_mdata,
+ struct rte_mbuf *m)
{
+ struct rte_security_session *session = sec_mdata->sess;
struct ixgbe_crypto_session *ic_session =
get_sec_session_private_data(session);
if (ic_session->op == IXGBE_OP_AUTHENTICATED_ENCRYPTION) {
--
2.7.4
[dpdk-dev] [RFC 3/3] examples/ipsec-secgw: support for setting seq no
Adding support for setting sequence number for inline protocol processed
packets.
Signed-off-by: Anoob Joseph
---
examples/ipsec-secgw/esp.h | 9 +
examples/ipsec-secgw/ipsec.c | 42 --
2 files changed, 45 insertions(+), 6 deletions(-)
diff --git a/examples/ipsec-secgw/esp.h b/examples/ipsec-secgw/esp.h
index 792312c..ec9dbd1 100644
--- a/examples/ipsec-secgw/esp.h
+++ b/examples/ipsec-secgw/esp.h
@@ -6,6 +6,15 @@
struct mbuf;
+static inline int
+esp_inline_protocol_fill_mdata(struct ipsec_sa *sa,
+ struct rte_security_ipsec_mdata *md_ipsec)
+{
+ /* Set sequence number */
+ md_ipsec->seq_no = ++(sa->seq);
+
+ return 0;
+}
int
esp_inbound(struct rte_mbuf *m, struct ipsec_sa *sa,
diff --git a/examples/ipsec-secgw/ipsec.c b/examples/ipsec-secgw/ipsec.c
index 05e89a1..d602c6b 100644
--- a/examples/ipsec-secgw/ipsec.c
+++ b/examples/ipsec-secgw/ipsec.c
@@ -359,6 +359,40 @@ enqueue_cop(struct cdev_qp *cqp, struct rte_crypto_op *cop)
}
}
+static inline int
+inline_protocol_set_pkt_metadata(struct ipsec_sa *sa, struct rte_mbuf *pkt)
+{
+ int ret;
+ struct rte_security_mdata md = { 0 };
+
+ md.sess = sa->sec_session;
+
+ ret = esp_inline_protocol_fill_mdata(sa, &md.ipsec);
+
+ if (ret != 0) {
+ RTE_LOG(ERR, IPSEC,
+ "Could not generate per packet metadata for IPsec
offload\n");
+ return ret;
+ }
+
+ /* Update flags to hint the PMD to use seq_no provided */
+ md.mdata_flags.set = RTE_SECURITY_IPSEC_MDATA_FLAGS_SEQ_NO;
+
+ rte_security_set_pkt_metadata(sa->security_ctx, &md, pkt);
+
+ return 0;
+}
+
+static inline void
+inline_crypto_set_pkt_metadata(struct ipsec_sa *sa, struct rte_mbuf *pkt)
+{
+ struct rte_security_mdata mdata = { 0 };
+
+ mdata.sess = sa->sec_session;
+
+ rte_security_set_pkt_metadata(sa->security_ctx, &mdata, pkt);
+}
+
static inline void
ipsec_enqueue(ipsec_xform_fn xform_func, struct ipsec_ctx *ipsec_ctx,
struct rte_mbuf *pkts[], struct ipsec_sa *sas[],
@@ -434,9 +468,7 @@ ipsec_enqueue(ipsec_xform_fn xform_func, struct ipsec_ctx
*ipsec_ctx,
cqp = &ipsec_ctx->tbl[sa->cdev_id_qp];
cqp->ol_pkts[cqp->ol_pkts_cnt++] = pkts[i];
if (sa->ol_flags & RTE_SECURITY_TX_OLOAD_NEED_MDATA)
- rte_security_set_pkt_metadata(
- sa->security_ctx,
- sa->sec_session, pkts[i], NULL);
+ inline_protocol_set_pkt_metadata(sa, pkts[i]);
continue;
case RTE_SECURITY_ACTION_TYPE_INLINE_CRYPTO:
priv->cop.type = RTE_CRYPTO_OP_TYPE_SYMMETRIC;
@@ -462,9 +494,7 @@ ipsec_enqueue(ipsec_xform_fn xform_func, struct ipsec_ctx
*ipsec_ctx,
cqp = &ipsec_ctx->tbl[sa->cdev_id_qp];
cqp->ol_pkts[cqp->ol_pkts_cnt++] = pkts[i];
if (sa->ol_flags & RTE_SECURITY_TX_OLOAD_NEED_MDATA)
- rte_security_set_pkt_metadata(
- sa->security_ctx,
- sa->sec_session, pkts[i], NULL);
+ inline_crypto_set_pkt_metadata(sa, pkts[i]);
continue;
}
--
2.7.4
Re: [dpdk-dev] [PATCH] examples: update copyright and license
I will suggest to avoid this kind of patch with so many different copyrights. You need to break it into several patches with different copyright category. Simple rules: 1. You can add SPDX for any company copyright patches - without removing the license text. 2. if you are modifying or removing the license text, you need an explicit ack/permissions from copyright holder. Getting so many ack for a single patch will be difficult 😊 Regards, Hemant > -Original Message- > From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Lee Daly > Sent: Wednesday, January 17, 2018 8:09 PM > To: olivier.m...@6wind.com; remy.hor...@intel.com; > or...@mellanox.com; bruce.richard...@intel.com; > pablo.de.lara.gua...@intel.com; radu.nico...@intel.com; > tomasz.kante...@intel.com; cristian.dumitre...@intel.com; > chao...@linux.vnet.ibm.com; john.mcnam...@intel.com; > harry.van.haa...@intel.com; jijiang@intel.com > Cc: dev@dpdk.org; Lee Daly > Subject: [dpdk-dev] [PATCH] examples: update copyright and license > > This updates the license on files in examples to be the standard > BSD-3-Clause license used for the rest of DPDK, > bringing the files in compliance with the DPDK licensing policy. > > Signed-off-by: Lee Daly > --- > examples/Makefile | 31 +- > examples/cmdline/commands.c| 58 +- > examples/cmdline/main.c| 58 +- > examples/cmdline/parse_obj_list.c | 58 +- > examples/cmdline/parse_obj_list.h | 58 +- > examples/flow_filtering/Makefile | 33 +-- > examples/flow_filtering/flow_blocks.c | 32 +- > examples/flow_filtering/main.c | 32 +- > examples/ip_pipeline/parser.c | 69 > +- > examples/ip_pipeline/pipeline/hash_func_arm64.h| 35 ++- > examples/l3fwd/l3fwd_altivec.h | 37 ++-- > examples/l3fwd/l3fwd_common.h | 32 +- > examples/l3fwd/l3fwd_em_hlm.h | 37 ++-- > examples/l3fwd/l3fwd_em_hlm_neon.h | 36 ++- > examples/l3fwd/l3fwd_lpm_altivec.h | 36 ++- > examples/l3fwd/l3fwd_lpm_neon.h| 36 ++- > examples/l3fwd/l3fwd_neon.h| 36 ++- > examples/netmap_compat/netmap/netmap.h | 30 +- > examples/netmap_compat/netmap/netmap_user.h| 30 +- > examples/performance-thread/common/arch/x86/ctx.c | 58 +- > .../performance-thread/common/arch/x86/stack.h | 61 ++- > examples/performance-thread/common/lthread.c | 56 +- > examples/performance-thread/common/lthread.h | 56 +- > examples/performance-thread/common/lthread_api.h | 56 +- > examples/performance-thread/common/lthread_cond.c | 56 + > - > examples/performance-thread/common/lthread_cond.h | 56 + > - > examples/performance-thread/common/lthread_int.h | 58 ++ > 27 files changed, 79 insertions(+), 1152 deletions(-) > > diff --git a/examples/Makefile b/examples/Makefile > index 9f7974a..f0cf2a1 100644 > --- a/examples/Makefile > +++ b/examples/Makefile > @@ -1,32 +1,5 @@ > -# BSD LICENSE > -# > -# Copyright(c) 2016 6WIND S.A. > -# > -# Redistribution and use in source and binary forms, with or without > -# modification, are permitted provided that the following conditions > -# are met: > -# > -# * Redistributions of source code must retain the above copyright > -# notice, this list of conditions and the following disclaimer. > -# * Redistributions in binary form must reproduce the above copyright > -# notice, this list of conditions and the following disclaimer in > -# the documentation and/or other materials provided with the > -# distribution. > -# * Neither the name of 6WIND S.A. nor the names of its > -# contributors may be used to endorse or promote products derived > -# from this software without specific prior written permission. > -# > -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND > CONTRIBUTORS > -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT > NOT > -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND > FITNESS FOR > -# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE > COPYRIGHT > -# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, > INCIDENTAL, > -# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT > NOT > -# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS > OF USE, > -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED > AND ON ANY > -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
Re: [dpdk-dev] [PATCH v3] cmdline: fix dynamic tokens parsing
On Sat, Jan 20, 2018 at 02:16:10AM +0800, Xueming Li wrote:
> When using dynamic tokens, the result buffer contains pointers to some
> location inside the result buffer. When the content of the temporary
> buffer is copied in the final one, these pointers still point to the
> temporary buffer.
>
> This works until the temporary buffer is kept intact, but the next
> commit introduces a memset() that breaks this assumption.
>
> This commit keeps the successfully parsed buffers, and ensures that the
> pointers point to the valid location, by using temp buffer for following
> parsing.
>
> Fixes: 9b3fbb051d2e ("cmdline: fix parsing")
> Cc: sta...@dpdk.org
> Signed-off-by: Xueming Li
Acked-by: Olivier Matz
Re: [dpdk-dev] [PATCH] cmdline: avoid garbage in unused fields of parsed result
On Sat, Jan 20, 2018 at 11:26:31AM +0800, Xueming Li wrote:
> The result buffer was not initialized before parsing, inducing garbage
> in unused fields or padding of the parsed structure.
>
> Initialize the result buffer each time before parsing.
>
> Fixes: af75078fece3 ("first public release")
> Cc: sta...@dpdk.org
> Signed-off-by: Xueming Li
Acked-by: Olivier Matz
[dpdk-dev] [PATCH v2] build: add support for vendor specific ARM cross builds
Add various vendor specific cross build targets.
This can be verified by using linaro toolchain and running
meson build --cross-file config/arm/arch64_armv8__cross
In future more cross build targets can be added.
Signed-off-by: Pavan Nikhilesh
---
v2 Changes:
- rename cross file names.
- redo machine args selection logic.
config/arm/arm64_armv8_linuxapp_gcc| 10 ++
config/arm/arm64_thunderx_linuxapp_gcc | 13 +
config/arm/meson.build | 3 +++
3 files changed, 26 insertions(+)
create mode 100644 config/arm/arm64_armv8_linuxapp_gcc
create mode 100644 config/arm/arm64_thunderx_linuxapp_gcc
diff --git a/config/arm/arm64_armv8_linuxapp_gcc
b/config/arm/arm64_armv8_linuxapp_gcc
new file mode 100644
index 0..3b4d3c469
--- /dev/null
+++ b/config/arm/arm64_armv8_linuxapp_gcc
@@ -0,0 +1,10 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
diff --git a/config/arm/arm64_thunderx_linuxapp_gcc
b/config/arm/arm64_thunderx_linuxapp_gcc
new file mode 100644
index 0..7ff34af74
--- /dev/null
+++ b/config/arm/arm64_thunderx_linuxapp_gcc
@@ -0,0 +1,13 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x43'
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 212b94499..a5bfb9610 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -59,6 +59,9 @@ else
endif
# Set to generic if variable is not found
machine = get_variable('impl_' + cmd_output[0], 'generic')
+ else
+ impl_id = meson.get_cross_property('implementor_id', 'generic')
+ machine = get_variable('impl_' + impl_id)
endif
if machine == 'generic'
--
2.16.0
Re: [dpdk-dev] [PATCH] eal: fix a memory leak in regexp log level set API
On Sun, Jan 21, 2018 at 05:05:10PM +, Andrew Rybchenko wrote:
> From: Ivan Malov
>
> Fixes: a5279180f510 ("eal: change several log levels matching a regexp")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Ivan Malov
> Signed-off-by: Andrew Rybchenko
Acked-by: Olivier Matz
Re: [dpdk-dev] [PATCH v3 7/7] app/testpmd: adjust ethdev port ownership
Hi
From: Ananyev, Konstantin [mailto:konstantin.anan...@intel.com]
> Hi lads,
>
> >
> > Hi Matan,
> >
> > On Fri, Jan 19, 2018 at 01:35:10PM +, Matan Azrad wrote:
> > > Hi Konstantin
> > >
> > > From: Ananyev, Konstantin, Friday, January 19, 2018 3:09 PM
> > > > > -Original Message-
> > > > > From: Matan Azrad [mailto:ma...@mellanox.com]
> > > > > Sent: Friday, January 19, 2018 12:52 PM
> > > > > To: Ananyev, Konstantin ; Thomas
> > > > > Monjalon ; Gaetan Rivet
> > > > ;
> > > > > Wu, Jingjing
> > > > > Cc: dev@dpdk.org; Neil Horman ;
> > > > > Richardson, Bruce
> > > > > Subject: RE: [PATCH v3 7/7] app/testpmd: adjust ethdev port
> > > > > ownership
> > > > >
> > > > > Hi Konstantin
> > > > >
> > > > > From: Ananyev, Konstantin, Friday, January 19, 2018 2:38 PM
> > > > > > To: Matan Azrad ; Thomas Monjalon
> > > > > > ; Gaetan Rivet
> ;
> > > > Wu,
> > > > > > Jingjing
> > > > > > Cc: dev@dpdk.org; Neil Horman ;
> > > > > > Richardson, Bruce
> > > > > > Subject: RE: [PATCH v3 7/7] app/testpmd: adjust ethdev port
> > > > > > ownership
> > > > > >
> > > > > > Hi Matan,
> > > > > >
> > > > > > > -Original Message-
> > > > > > > From: Matan Azrad [mailto:ma...@mellanox.com]
> > > > > > > Sent: Thursday, January 18, 2018 4:35 PM
> > > > > > > To: Thomas Monjalon ; Gaetan Rivet
> > > > > > > ; Wu, Jingjing
> > > > > > >
> > > > > > > Cc: dev@dpdk.org; Neil Horman ;
> > > > Richardson,
> > > > > > > Bruce ; Ananyev, Konstantin
> > > > > > >
> > > > > > > Subject: [PATCH v3 7/7] app/testpmd: adjust ethdev port
> > > > > > > ownership
> > > > > > >
> > > > > > > Testpmd should not use ethdev ports which are managed by
> > > > > > > other DPDK entities.
> > > > > > >
> > > > > > > Set Testpmd ownership to each port which is not used by
> > > > > > > other entity and prevent any usage of ethdev ports which are
> > > > > > > not owned by
> > > > Testpmd.
> > > > > > >
> > > > > > > Signed-off-by: Matan Azrad
> > > > > > > ---
> > > > > > > app/test-pmd/cmdline.c | 89 +++--
> ---
> > > >
> > > > > > -
> > > > > > > app/test-pmd/cmdline_flow.c | 2 +-
> > > > > > > app/test-pmd/config.c | 37 ++-
> > > > > > > app/test-pmd/parameters.c | 4 +-
> > > > > > > app/test-pmd/testpmd.c | 63
>
> > > > > > > app/test-pmd/testpmd.h | 3 ++
> > > > > > > 6 files changed, 103 insertions(+), 95 deletions(-)
> > > > > > >
> > > > > > > diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
> > > > > > > index
> > > > > > > 31919ba..6199c64 100644
> > > > > > > --- a/app/test-pmd/cmdline.c
> > > > > > > +++ b/app/test-pmd/cmdline.c
> > > > > > > @@ -1394,7 +1394,7 @@ struct cmd_config_speed_all {
> > > > > > > &link_speed) < 0)
> > > > > > > return;
> > > > > > >
> > > > > > > - RTE_ETH_FOREACH_DEV(pid) {
> > > > > > > + RTE_ETH_FOREACH_DEV_OWNED_BY(pid, my_owner.id) {
> > > > > >
> > > > > > Why do we need all these changes?
> > > > > > As I understand you changed definition of
> > > > > > RTE_ETH_FOREACH_DEV(), so no testpmd should work ok default
> (no_owner case).
> > > > > > Am I missing something here?
> > > > >
> > > > > Now, After Gaetan suggestion RTE_ETH_FOREACH_DEV(pid) will
> > > > > iterate
> > > > over all valid and ownerless ports.
> > > >
> > > > Yes.
> > > >
> > > > > Here Testpmd wants to iterate over its owned ports.
> > > >
> > > > Why? Why it can't just iterate over all valid and ownerless ports?
> > > > As I understand it would be enough to fix current problems and
> > > > would allow us to avoid any changes in testmpd (which I think is a good
> thing).
> > >
> > > Yes, I understand that this big change is very daunted, But I think
> > > the current a lot of bugs in testpmd(regarding port ownership) even
> > > more
> > daunted.
> > >
> > > Look,
> > > Testpmd initiates some of its internal databases depends on specific
> > > port iteration, In some time someone may take ownership of Testpmd
> ports and testpmd will continue to touch them.
>
> But if someone will take the ownership (assign new owner_id) that port will
> not appear in RTE_ETH_FOREACH_DEV() any more.
>
Yes, but testpmd sometimes depends on previous iteration using internal
database.
So it uses internal database that was updated by old iteration.
> > >
> >
> > If I look back on the fail-safe, its sole purpose is to have seamless
> > hotplug with existing applications.
> >
> > Port ownership is a genericization of some functions introduced by the
> > fail-safe, that could structure DPDK further. It should allow
> > applications to have a seamless integration with subsystems using port
> > ownership. Without this, port ownership cannot be used.
> >
> > Testpmd should be fixed, but follow the most common design patterns of
> > DPDK applications. Going with port ownership seems like a paradigm
> > shift.
> >
> > > In addition
> > > Using the old iterator in some place
Re: [dpdk-dev] [PATCH v5 1/7] eal: prefix mbuf pool ops name with user defined
On Sat, Jan 20, 2018 at 11:45:02AM +0530, Hemant Agrawal wrote: > This patch prefix the mbuf pool ops name with "user" to indicate > that it is user defined. > > Signed-off-by: Hemant Agrawal Acked-by: Olivier Matz
Re: [dpdk-dev] [PATCH v5 2/7] mbuf: maintain user and compile time mempool ops name
On Sat, Jan 20, 2018 at 11:45:03AM +0530, Hemant Agrawal wrote: > This patch change the logic to maintain the value of > user defined and compile time i.e. RTE_MBUF_DEFAULT_MEMPOOL_OPS. > > The pktmbuf_create_pool is updated to reflect the same. > > Signed-off-by: Hemant Agrawal Acked-by: Olivier Matz
Re: [dpdk-dev] [PATCH v5 3/7] mbuf: add pool ops name selection API helpers
On Sat, Jan 20, 2018 at 11:45:04AM +0530, Hemant Agrawal wrote: > This patch add support for various mempool ops config helper APIs. > > 1.User defined mempool ops > 2.Platform detected HW mempool ops (active). > 3.Best selection of mempool ops by looking into user defined, > platform registered and compile time configured. > > Signed-off-by: Hemant Agrawal Acked-by: Olivier Matz
Re: [dpdk-dev] [PATCH v5 1/7] eal: prefix mbuf pool ops name with user defined
On 1/20/2018 11:45 AM, Hemant Agrawal wrote: This patch prefix the mbuf pool ops name with "user" to indicate that it is user defined. Signed-off-by: Hemant Agrawal --- lib/librte_eal/bsdapp/eal/eal.c | 4 ++-- lib/librte_eal/common/eal_internal_cfg.h | 3 ++- lib/librte_eal/linuxapp/eal/eal.c| 4 ++-- 3 files changed, 6 insertions(+), 5 deletions(-) There is a compilation issue with this patch. I will send a v6. Just waiting comments if any?
Re: [dpdk-dev] [PATCH v5 4/7] mbuf: pktmbuf pool create helper for specific mempool ops
On Sat, Jan 20, 2018 at 11:45:05AM +0530, Hemant Agrawal wrote: > Introduce a new helper for pktmbuf pool, which will allow > the application to optionally specify the mempool ops name > as well. > > Signed-off-by: Hemant Agrawal Acked-by: Olivier Matz
Re: [dpdk-dev] [PATCH v5 5/7] app/testpmd: set preferred mempool as default pktpool
On Sat, Jan 20, 2018 at 11:45:06AM +0530, Hemant Agrawal wrote: > From: Pavan Nikhilesh > > Set the mempool preferred by the ethernet devices as default mbuf > mempool before creating the pktpool. > > Signed-off-by: Pavan Nikhilesh > Signed-off-by: Hemant Agrawal Reviewed-by: Olivier Matz
Re: [dpdk-dev] [PATCH v6 05/14] net/dpaa2: use ethdev linkstatus helper functions
On Monday 22 January 2018 12:29 AM, Ferruh Yigit wrote: From: Stephen Hemminger Use new helper function to update the link status. Signed-off-by: Stephen Hemminger Signed-off-by: Ferruh Yigit --- v6: * Use correct APIs * Keep logic exact same, only use new APIs to get/set link --- drivers/net/dpaa2/dpaa2_ethdev.c | 77 +++- 1 file changed, 12 insertions(+), 65 deletions(-) Acked-by: Shreyansh Jain
Re: [dpdk-dev] [PATCH v2] build: add support for vendor specific ARM cross builds
-Original Message- > Date: Mon, 22 Jan 2018 18:44:50 +0530 > From: Pavan Nikhilesh > To: jerin.ja...@caviumnetworks.com, bruce.richard...@intel.com, > harry.van.haa...@intel.com, herbert.g...@arm.com, hemant.agra...@nxp.com > Cc: dev@dpdk.org, Pavan Nikhilesh > Subject: [dpdk-dev] [PATCH v2] build: add support for vendor specific ARM > cross builds > X-Mailer: git-send-email 2.14.1 > > Add various vendor specific cross build targets. > This can be verified by using linaro toolchain and running > > meson build --cross-file config/arm/arch64_armv8__cross Looks like git comment is _not_ updated. i.e comment is not sync with filename. IMO, it will useful to update the existing meson build document for the cross build procedure.
[dpdk-dev] [PATCH] lib/librte_flow_classify: fix memory leak issue
Free allocated memory of the rule if not added to the table.
Fixes: 50bdac5916d9 ("flow_classify: remove table id parameter from API")
Coverity issue: 257032
Signed-off-by: Jasvinder Singh
---
lib/librte_flow_classify/rte_flow_classify.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/lib/librte_flow_classify/rte_flow_classify.c
b/lib/librte_flow_classify/rte_flow_classify.c
index 6fa6a74..55492a6 100644
--- a/lib/librte_flow_classify/rte_flow_classify.c
+++ b/lib/librte_flow_classify/rte_flow_classify.c
@@ -560,6 +560,7 @@ rte_flow_classify_table_entry_add(struct
rte_flow_classifier *cls,
return rule;
}
}
+ free(rule);
return NULL;
}
--
2.9.3
Re: [dpdk-dev] [PATCH v5 2/2] build: add support for detecting march on ARM
On Mon, Jan 22, 2018 at 06:07:18PM +0530, Pavan Nikhilesh wrote:
> On Mon, Jan 22, 2018 at 12:30:53PM +, Bruce Richardson wrote:
> > On Mon, Jan 22, 2018 at 05:16:49PM +0530, Pavan Nikhilesh wrote:
> > > Added support for detecting march and mcpu by reading midr_el1
> > > register. The implementer, primary part number values read can be
> > > used to figure out the underlying arm cpu.
> > >
> > > Signed-off-by: Pavan Nikhilesh
> > > --- app/test-pmd/meson.build| 2 +-
> > > config/arm/armv8_machine.py | 18 + config/arm/meson.build
> > > | 95 +
> > > config/meson.build | 19 - drivers/meson.build
> > > | 2 +- examples/meson.build| 2 +- lib/meson.build
> > > | 2 +- meson.build | 2 +- test/test/meson.build
> > > | 2 +- 9 files changed, 121 insertions(+), 23 deletions(-) create
> > > mode 100755 config/arm/armv8_machine.py
> > >
>
> > > + + if machine == 'generic' + machine =
> > > impl_generic +cmd_output = cmd_generic + endif +
> > > + message('Implementer : ' + machine[0])
> >
> > When cross-compiling for arm I get an error at this line:
> >
> > Meson encountered an error in file config/arm/meson.build, line
> > 69, column 1: Index 0 out of bounds of array of size 0.
> >
> Will be sending v2 of the cross patch soon(once directory structure
> and file name is fininlized) that would resolve this issue.
>
So is there an expected patch ordering here? I believe the set for
adding Octeon drivers to build is ok to merge, though there is a small
change for renaming machine_arg to machine_args in it if these patches
are not applied first. Will I take that set, if my recent rebase on top
of mainline has not broken it, and you can rebase these to take account
of that extra driver?
/Bruce
Re: [dpdk-dev] [PATCH v2] build: add support for vendor specific ARM cross builds
On Mon, Jan 22, 2018 at 06:44:50PM +0530, Pavan Nikhilesh wrote: > Add various vendor specific cross build targets. > This can be verified by using linaro toolchain and running > > meson build --cross-file config/arm/arch64_armv8__cross > > In future more cross build targets can be added. > > Signed-off-by: Pavan Nikhilesh > --- Does this need to be merged into the set to add ARM compilation support in order to fix the cross-compile build? /Bruce
[dpdk-dev] Minutes of tech-board meeting 2018-1-17
Date: 17 Jan 2018 Attendees: Bruce Richardson, Ferruh Yigit, Hemant Agrawal, Jerin Jacob, Konstantin Ananyev, Olivier Matz, Thomas Monjalon Yuanhan Liu Absent: Stephen Hemminger Topic: Anatoly's request for discussing the DPDK dynamic memory allocation patches * mail thread: http://dpdk.org/ml/archives/dev/2018-January/087029.html * Since it is a significant change, it is planned to integrate early in v18.05 release. * Request all interested parties to provide their initial comments before Jan 31. Topic: Repository for compression work * Tech board decided to give a next tree in dpdk.org for compression work. * Next compression tree maintainer is not yet chosen. Tech board is looking forward to getting a volunteer for next compression tree maintainership. * Prefer to have an experienced dpdk contributor. Next Meeting: * 2018-01-31 @ 3pm UTC * Konstantin to chair discussion as per alphabetical order /Jerin
Re: [dpdk-dev] [PATCH v2] build: add support for vendor specific ARM cross builds
On Mon, Jan 22, 2018 at 02:12:05PM +, Bruce Richardson wrote: > On Mon, Jan 22, 2018 at 06:44:50PM +0530, Pavan Nikhilesh wrote: > > Add various vendor specific cross build targets. > > This can be verified by using linaro toolchain and running > > > > meson build --cross-file config/arm/arch64_armv8__cross > > > > In future more cross build targets can be added. > > > > Signed-off-by: Pavan Nikhilesh > > --- > > Does this need to be merged into the set to add ARM compilation support > in order to fix the cross-compile build? > Yup, this patch as to go after applying the ARM compilation support patches. > /Bruce Regards, Pavan.
Re: [dpdk-dev] [PATCH v4 2/4] drivers/net: add drivers for Cavium NICs to meson build
On Fri, Jan 19, 2018 at 11:45:19PM +0530, Pavan Nikhilesh wrote: > Add Cavium octeontx and thunder nicvf to meson build infrastructure. > > Signed-off-by: Pavan Nikhilesh Acked-by: Bruce Richardson NOTE: the NIC drivers should be kept in alphebetical order, but I'll fix that on apply of this set. /Bruce
Re: [dpdk-dev] [PATCH v4 1/4] drivers/mempool: add octeontx mempool driver to meson build
On Fri, Jan 19, 2018 at 11:45:18PM +0530, Pavan Nikhilesh wrote: > Add octeontx hardware mempool driver to meson build. > > Signed-off-by: Pavan Nikhilesh > Acked-by: Bruce Richardson > --- Set applied to dpdk-next-build [with minor fixups for compilation due to rebasing and not having ARM patches applied first.] Thanks, /Bruce
Re: [dpdk-dev] [PATCH v6 1/7] eal: prefix mbuf pool ops name with user defined
On Monday 22 January 2018 07:21 PM, Hemant Agrawal wrote: > This patch prefix the mbuf pool ops name with "user" to indicate > that it is user defined. > > Signed-off-by: Hemant Agrawal > Acked-by: Olivier Matz > --- Acked-by: Santosh Shukla
Re: [dpdk-dev] [PATCH v5 2/2] build: add support for detecting march on ARM
On Mon, Jan 22, 2018 at 02:09:28PM +, Bruce Richardson wrote:
> On Mon, Jan 22, 2018 at 06:07:18PM +0530, Pavan Nikhilesh wrote:
> > On Mon, Jan 22, 2018 at 12:30:53PM +, Bruce Richardson wrote:
> > > On Mon, Jan 22, 2018 at 05:16:49PM +0530, Pavan Nikhilesh wrote:
> > > > Added support for detecting march and mcpu by reading midr_el1
> > > > register. The implementer, primary part number values read can be
> > > > used to figure out the underlying arm cpu.
> > > >
> > > > Signed-off-by: Pavan Nikhilesh
> > > > --- app/test-pmd/meson.build| 2 +-
> > > > config/arm/armv8_machine.py | 18 + config/arm/meson.build
> > > > | 95 +
> > > > config/meson.build | 19 - drivers/meson.build
> > > > | 2 +- examples/meson.build| 2 +- lib/meson.build
> > > > | 2 +- meson.build | 2 +- test/test/meson.build
> > > > | 2 +- 9 files changed, 121 insertions(+), 23 deletions(-) create
> > > > mode 100755 config/arm/armv8_machine.py
> > > >
> >
> > > > + + if machine == 'generic' + machine =
> > > > impl_generic + cmd_output = cmd_generic + endif +
> > > > + message('Implementer : ' + machine[0])
> > >
> > > When cross-compiling for arm I get an error at this line:
> > >
> > > Meson encountered an error in file config/arm/meson.build, line
> > > 69, column 1: Index 0 out of bounds of array of size 0.
> > >
> > Will be sending v2 of the cross patch soon(once directory structure
> > and file name is fininlized) that would resolve this issue.
> >
> So is there an expected patch ordering here? I believe the set for
> adding Octeon drivers to build is ok to merge, though there is a small
> change for renaming machine_arg to machine_args in it if these patches
> are not applied first. Will I take that set, if my recent rebase on top
> of mainline has not broken it, and you can rebase these to take account
> of that extra driver?
Now that the cross files naming and directory structure is agreed upon I will
merge the patches as a single set and send it fixing the machine_args part for
app/test-eventdev.
>
> /Bruce
Thanks,
Pavan.
Re: [dpdk-dev] [PATCH v6 2/7] mbuf: maintain user and compile time mempool ops name
On Monday 22 January 2018 07:21 PM, Hemant Agrawal wrote: > This patch change the logic to maintain the value of > user defined and compile time i.e. RTE_MBUF_DEFAULT_MEMPOOL_OPS. > > The pktmbuf_create_pool is updated to reflect the same. > > Signed-off-by: Hemant Agrawal > Acked-by: Olivier Matz > --- Acked-by: Santosh Shukla
Re: [dpdk-dev] [PATCH] lib/librte_flow_classify: fix memory leak issue
On 1/22/2018 2:14 PM, Jasvinder Singh wrote:
> Free allocated memory of the rule if not added to the table.
>
> Coverity issue: 257032
> Fixes: 50bdac5916d9 ("flow_classify: remove table id parameter from API")
>
> Signed-off-by: Jasvinder Singh
Reviewed-by: Ferruh Yigit
> ---
> lib/librte_flow_classify/rte_flow_classify.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/lib/librte_flow_classify/rte_flow_classify.c
> b/lib/librte_flow_classify/rte_flow_classify.c
> index 6fa6a74..55492a6 100644
> --- a/lib/librte_flow_classify/rte_flow_classify.c
> +++ b/lib/librte_flow_classify/rte_flow_classify.c
> @@ -560,6 +560,7 @@ rte_flow_classify_table_entry_add(struct
> rte_flow_classifier *cls,
> return rule;
> }
> }
> + free(rule);
> return NULL;
> }
>
>
Re: [dpdk-dev] [PATCH v2] build: add support for vendor specific ARM cross builds
On Mon, Jan 22, 2018 at 07:10:53PM +0530, Jerin Jacob wrote: > -Original Message- > > Date: Mon, 22 Jan 2018 18:44:50 +0530 > > From: Pavan Nikhilesh > > To: jerin.ja...@caviumnetworks.com, bruce.richard...@intel.com, > > harry.van.haa...@intel.com, herbert.g...@arm.com, hemant.agra...@nxp.com > > Cc: dev@dpdk.org, Pavan Nikhilesh > > Subject: [dpdk-dev] [PATCH v2] build: add support for vendor specific ARM > > cross builds > > X-Mailer: git-send-email 2.14.1 > > > > Add various vendor specific cross build targets. > > This can be verified by using linaro toolchain and running > > > > meson build --cross-file config/arm/arch64_armv8__cross > > Looks like git comment is _not_ updated. i.e comment is not sync with > filename. Yup missed it, now that naming and directory structure is agreed upon will merge this patch with other set and send a v6. > > IMO, it will useful to update the existing meson build document for the > cross build procedure. > Will update the documentation and send it as a patch in the next series. Thanks, Pavan.
Re: [dpdk-dev] [PATCH v6 3/7] mbuf: add pool ops name selection API helpers
On Monday 22 January 2018 07:21 PM, Hemant Agrawal wrote: > This patch add support for various mempool ops config helper APIs. > > 1.User defined mempool ops > 2.Platform detected HW mempool ops (active). > 3.Best selection of mempool ops by looking into user defined, > platform registered and compile time configured. > > Signed-off-by: Hemant Agrawal > Acked-by: Olivier Matz > --- Acked-by: Santosh Shukla
Re: [dpdk-dev] [PATCH v6 4/7] mbuf: pktmbuf pool create helper for specific mempool ops
On Monday 22 January 2018 07:21 PM, Hemant Agrawal wrote: > Introduce a new helper for pktmbuf pool, which will allow > the application to optionally specify the mempool ops name > as well. > > Signed-off-by: Hemant Agrawal > Acked-by: Olivier Matz > --- Acked-by: Santosh Shukla
Re: [dpdk-dev] [PATCH v6 5/7] app/testpmd: set preferred mempool as default pktpool
On Monday 22 January 2018 07:21 PM, Hemant Agrawal wrote: > From: Pavan Nikhilesh > > Set the mempool preferred by the ethernet devices as default mbuf > mempool before creating the pktpool. > > Signed-off-by: Pavan Nikhilesh > Signed-off-by: Hemant Agrawal > Reviewed-by: Olivier Matz > --- Acked-by: Santosh Shukla
Re: [dpdk-dev] [PATCH] net/mlx5: remmap UAR address for multiple process
Hi Xueming,
On Fri, Jan 19, 2018 at 11:08:54PM +0800, Xueming Li wrote:
> UAR(doorbell) is hw resources that have to be same address between
> primary and secondary process, failed to mmap UAR will make TX packets
> invisible to HW.
> Today, UAR address returned from verbs api is mixed in heap and loaded
> library address space, prone to be occupied in secondary process.
> This patch reserves a dedicate UAR address space, both primary and
> secondary process re-mmap UAR pages into this space.
> Below is a brief picture of dpdk app address space allocation:
> Before This patch
> -- --
> [stack] [stack]
> [.so, uar, heap][.so, heap]
> [(empty)] [(empty)]
> [hugepage] [hugepage]
> [? others] [? others]
> [(empty)] [(empty)]
> [uar]
> [(empty)]
> To minimize conflicts, UAR address space comes after hugepage space with
> an offset to skip potential usage from other drivers.
Seems it is not the case when the memory is contiguous, according to
what I see in my testpmd /proc//maps:
PMD: mlx5.c:523: mlx5_uar_init_primary(): Reserved UAR address space:
0x0x7f4da580
And the fist huge page is at address 0x7f4fa580, new UAR space is
before and not after.
With this patch I still have the situation described as "before".
> Once UAR space reserved successfully, UAR pages are re-mmapped into new
> area to keep UAR address aligned between primary and secondary process.
>
> Signed-off-by: Xueming Li
> ---
> drivers/net/mlx5/mlx5.c | 107
>
> drivers/net/mlx5/mlx5.h | 1 +
> drivers/net/mlx5/mlx5_defs.h| 10
> drivers/net/mlx5/mlx5_rxtx.h| 3 +-
> drivers/net/mlx5/mlx5_trigger.c | 7 ++-
> drivers/net/mlx5/mlx5_txq.c | 51 +--
> 6 files changed, 163 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
> index fc2d59fee..1539ef608 100644
> --- a/drivers/net/mlx5/mlx5.c
> +++ b/drivers/net/mlx5/mlx5.c
> @@ -39,6 +39,7 @@
> #include
> #include
> #include
> +#include
>
> /* Verbs header. */
> /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
> @@ -56,6 +57,7 @@
> #include
> #include
> #include
> +#include
> #include
>
> #include "mlx5.h"
> @@ -466,6 +468,101 @@ mlx5_args(struct mlx5_dev_config *config, struct
> rte_devargs *devargs)
>
> static struct rte_pci_driver mlx5_driver;
>
> +/*
> + * Reserved UAR address space for TXQ UAR(hw doorbell) mapping, process
> + * local resource used by both primary and secondary to avoid duplicate
> + * reservation.
> + * The space has to be available on both primary and secondary process,
> + * TXQ UAR maps to this area using fixed mmap w/o double check.
> + */
> +static void *uar_base;
> +
> +/**
> + * Reserve UAR address space for primary process
> + *
> + * @param[in] priv
> + * Pointer to private structure.
> + *
> + * @return
> + * 0 on success, negative errno value on failure.
> + */
> +static int
> +mlx5_uar_init_primary(struct priv *priv)
> +{
> + void *addr = (void *)0;
> + int i;
> + const struct rte_mem_config *mcfg;
> +
> + if (uar_base) { /* UAR address space mapped */
> + priv->uar_base = uar_base;
> + return 0;
> + }
> + /* find out lower bound of hugepage segments */
> + mcfg = rte_eal_get_configuration()->mem_config;
> + for (i = 0; i < RTE_MAX_MEMSEG && mcfg->memseg[i].addr; i++) {
> + if (addr)
> + addr = RTE_MIN(addr, mcfg->memseg[i].addr);
> + else
> + addr = mcfg->memseg[i].addr;
This if/else is useless as addr is already initialised with the smallest
possible value.
> + }
> + /* offset down UAR area */
> + addr = RTE_PTR_SUB(addr, MLX5_UAR_OFFSET + MLX5_UAR_SIZE);
Seems the error is here, the loops get the address of the memseg with
the smallest address and then it subtract the UAR size, addr cannot be
after the huge pages unless if this subtraction overflows.
> + /* anonymous mmap, no real memory consumption */
> + addr = mmap(addr, MLX5_UAR_SIZE,
> + PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
> + if (addr == MAP_FAILED) {
> + ERROR("Failed to reserve UAR address space, please adjust "
> + "MLX5_UAR_SIZE or try --base-virtaddr");
How does a user knows the UAR memory space the NIC needs to adjust the
MLX5_UAR_SIZE?
> + return -ENOMEM;
> + }
> + /* Accept either same addr or a new addr returned from mmap if target
> + * range occupied.
> + */
> + INFO("Reserved UAR address space: 0x%p", addr);
The '%p' already prefix the address with the 0x.
> + priv->uar_base = addr; /* for primary and secon
Re: [dpdk-dev] [PATCH v2] meson: add tests to build
On Wed, Dec 20, 2017 at 12:06:21PM +, Kevin Laatz wrote:
> This commit adds most of the remaining tests to the meson build.
> They can be run using test binary as normal.
>
> Signed-off-by: Kevin Laatz
>
> ---
> v2:
> Added the test names for the added tests.
> ---
> test/test/meson.build | 37 +
> 1 file changed, 37 insertions(+)
>
Acked-by: Bruce Richardson
Applied to dpdk-next-build as
"test/test: add additional test cases to meson build"
More work I think is needed in cleaning up the tests and speeding up
test runs, but this is forward progress anyway.
> diff --git a/test/test/meson.build b/test/test/meson.build
> index 1a4f894..d5fc0e6 100644
> --- a/test/test/meson.build
> +++ b/test/test/meson.build
> @@ -47,6 +47,8 @@ test_sources = files('commands.c',
> 'test_common.c',
> 'test_cpuflags.c',
> 'test_crc.c',
> + 'test_cryptodev.c',
> + 'test_cryptodev_blockcipher.c',
> 'test_cycles.c',
> 'test_debug.c',
> 'test_devargs.c',
> @@ -62,6 +64,7 @@ test_sources = files('commands.c',
> 'test_eventdev_octeontx.c',
> 'test_eventdev_sw.c',
> 'test_func_reentrancy.c',
> + 'test_flow_classify.c',
> 'test_hash.c',
> 'test_hash_functions.c',
> 'test_hash_multiwriter.c',
> @@ -70,6 +73,8 @@ test_sources = files('commands.c',
> 'test_interrupts.c',
> 'test_kni.c',
> 'test_kvargs.c',
> + 'test_link_bonding.c',
> + 'test_link_bonding_mode4.c',
> 'test_logs.c',
> 'test_lpm.c',
> 'test_lpm6.c',
> @@ -77,6 +82,8 @@ test_sources = files('commands.c',
> 'test_lpm_perf.c',
> 'test_malloc.c',
> 'test_mbuf.c',
> + 'test_member.c',
> + 'test_member_perf.c',
> 'test_memcpy.c',
> 'test_memcpy_perf.c',
> 'test_memory.c',
> @@ -87,6 +94,8 @@ test_sources = files('commands.c',
> 'test_mp_secondary.c',
> 'test_per_lcore.c',
> 'test_pmd_perf.c',
> + 'test_pmd_ring.c',
> + 'test_pmd_ring_perf.c',
> 'test_power.c',
> 'test_power_acpi_cpufreq.c',
> 'test_power_kvm_vm.c',
> @@ -123,8 +132,10 @@ test_deps = ['acl',
> 'efd',
> 'ethdev',
> 'eventdev',
> + 'flow_classify',
> 'hash',
> 'lpm',
> + 'member',
> 'pipeline',
> 'port',
> 'power',
> @@ -142,6 +153,18 @@ test_names = [
> 'common_autotest',
> 'cpuflags_autotest',
> 'crc_autotest',
> + 'cryptodev_qat_autotest',
> + 'cryptodev_aesni_mb_autotest',
> + 'cryptodev_openssl_autotest',
> + 'cryptodev_aesni_gcm_autotest',
> + 'cryptodev_null_autotest',
> + 'cryptodev_sw_snow3g_autotest',
> + 'cryptodev_sw_kasumi_autotest',
> + 'cryptodev_sw_zuc_autotest',
> + 'cryptodev_sw_armv8_autotest',
> + 'cryptodev_sw_mrvl_autotest',
> + 'cryptodev_dpaa2_sec_autotest',
> + 'cryptodev_dpaa_sec_autotest',
> 'cycles_autotest',
> 'debug_autotest',
> 'devargs_autotest',
> @@ -157,6 +180,7 @@ test_names = [
> 'eventdev_octeontx_autotest',
> 'eventdev_sw_autotest',
> 'func_reentrancy_autotest',
> + 'flow_classify_autotest',
> 'has_scaling_autotest',
> 'hash_autotest',
> 'hash_functions_autotest',
> @@ -165,6 +189,8 @@ test_names = [
> 'interrupt_autotest',
> 'kni_autotest',
> 'kvargs_autotest',
> + 'link_bonding_autotest',
> + 'link_bonding_mode4_autotest',
> 'logs_autotest',
> 'lpm6_autotest',
> 'lpm6_perf_autotest',
> @@ -172,6 +198,8 @@ test_names = [
> 'lpm_perf_autotest',
> 'malloc_autotest',
> 'mbuf_autotest',
> + 'member_autotest',
> + 'member_perf_autotest',
> 'memcpy_autotest',
> 'memcpy_perf_autotest',
> 'memory_autotest',
> @@ -192,10 +220,13 @@ test_names = [
> 'reorder_autotest',
> 'ring_autotest',
> 'ring_perf_autotest',
> + 'ring_pmd_autotest',
> + 'ring_pmd_perf_autotest',
> 'rwlock_autotest',
> 'sched_autotest',
> 'service_autotest',
> 'spinlock_autotest',
> + 'string_autotest',
> 'table_autotest',
> 'tailq_autotest',
> 'thash_autotest',
> @@ -215,6 +246,12 @@ endif
> if dpdk_conf.has('RTE_LIBRTE_IXGBE_PMD')
> test_deps += 'pmd_ixgbe'
> endif
> +if dpdk_conf.has('RTE_LIBRTE_BOND_PMD')
> + test_deps += 'pmd_bond'
> +endif
> +if dpdk_conf.has('RTE_LIBRTE_RING_PMD')
> + test_deps += 'pmd_ring'
> +endif
>
> test_dep_objs = []
> foreach d:test_deps
> --
> 2.9.4
>
[dpdk-dev] [PATCH] app/testpmd: fix dereference null return valiue
Malloc() function might return NULL due to insufficient space. Therefore,
check for handling memory allocation failure is added.
Coverity issue: 257039
Fixes: e63b50162aa3 ("app/testpmd: clean metering and policing commands")
Signed-off-by: Jasvinder Singh
---
app/test-pmd/cmdline_mtr.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/app/test-pmd/cmdline_mtr.c b/app/test-pmd/cmdline_mtr.c
index 96a851b..f908fb3 100644
--- a/app/test-pmd/cmdline_mtr.c
+++ b/app/test-pmd/cmdline_mtr.c
@@ -86,6 +86,8 @@ parse_dscp_table_entries(char *str, enum rte_mtr_color
*dscp_table)
/* Allocate memory for dscp table */
dscp_table = (enum rte_mtr_color *)malloc(MAX_DSCP_TABLE_ENTRIES *
sizeof(enum rte_mtr_color));
+ if (dscp_table == NULL)
+ return -1;
while (1) {
if (strcmp(token, "G") == 0 ||
@@ -105,8 +107,10 @@ parse_dscp_table_entries(char *str, enum rte_mtr_color
*dscp_table)
break;
token = strtok_r(str, PARSE_DELIMITER, &str);
- if (token == NULL)
+ if (token == NULL) {
+ free(dscp_table);
return -1;
+ }
}
return 0;
}
--
2.9.3
[dpdk-dev] [PATCH v6 3/7] mbuf: add pool ops name selection API helpers
This patch add support for various mempool ops config helper APIs.
1.User defined mempool ops
2.Platform detected HW mempool ops (active).
3.Best selection of mempool ops by looking into user defined,
platform registered and compile time configured.
Signed-off-by: Hemant Agrawal
Acked-by: Olivier Matz
---
doc/api/doxy-api-index.md| 1 +
lib/librte_mbuf/Makefile | 4 +-
lib/librte_mbuf/rte_mbuf.c | 5 +-
lib/librte_mbuf/rte_mbuf_pool_ops.c | 96
lib/librte_mbuf/rte_mbuf_pool_ops.h | 93 ++
lib/librte_mbuf/rte_mbuf_version.map | 11 +
6 files changed, 205 insertions(+), 5 deletions(-)
create mode 100644 lib/librte_mbuf/rte_mbuf_pool_ops.c
create mode 100644 lib/librte_mbuf/rte_mbuf_pool_ops.h
diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md
index 76d606f..8cbd92a 100644
--- a/doc/api/doxy-api-index.md
+++ b/doc/api/doxy-api-index.md
@@ -136,6 +136,7 @@ The public API headers are grouped by topics:
- **containers**:
[mbuf] (@ref rte_mbuf.h),
+ [mbuf pool ops] (@ref rte_mbuf_pool_ops.h)
[ring] (@ref rte_ring.h),
[tailq] (@ref rte_tailq.h),
[bitmap] (@ref rte_bitmap.h)
diff --git a/lib/librte_mbuf/Makefile b/lib/librte_mbuf/Makefile
index 398f724..e2e3ec6 100644
--- a/lib/librte_mbuf/Makefile
+++ b/lib/librte_mbuf/Makefile
@@ -14,9 +14,9 @@ EXPORT_MAP := rte_mbuf_version.map
LIBABIVER := 3
# all source are stored in SRCS-y
-SRCS-$(CONFIG_RTE_LIBRTE_MBUF) := rte_mbuf.c rte_mbuf_ptype.c
+SRCS-$(CONFIG_RTE_LIBRTE_MBUF) := rte_mbuf.c rte_mbuf_ptype.c
rte_mbuf_pool_ops.c
# install includes
-SYMLINK-$(CONFIG_RTE_LIBRTE_MBUF)-include := rte_mbuf.h rte_mbuf_ptype.h
+SYMLINK-$(CONFIG_RTE_LIBRTE_MBUF)-include := rte_mbuf.h rte_mbuf_ptype.h
rte_mbuf_pool_ops.h
include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/lib/librte_mbuf/rte_mbuf.c b/lib/librte_mbuf/rte_mbuf.c
index c085c37..0c4d374 100644
--- a/lib/librte_mbuf/rte_mbuf.c
+++ b/lib/librte_mbuf/rte_mbuf.c
@@ -54,6 +54,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -176,9 +177,7 @@ rte_pktmbuf_pool_create(const char *name, unsigned n,
if (mp == NULL)
return NULL;
- mp_ops_name = rte_eal_mbuf_default_mempool_ops();
- if (mp_ops_name == NULL)
- mp_ops_name = RTE_MBUF_DEFAULT_MEMPOOL_OPS;
+ mp_ops_name = rte_mbuf_best_mempool_ops();
ret = rte_mempool_set_ops_byname(mp, mp_ops_name, NULL);
if (ret != 0) {
RTE_LOG(ERR, MBUF, "error setting mempool handler\n");
diff --git a/lib/librte_mbuf/rte_mbuf_pool_ops.c
b/lib/librte_mbuf/rte_mbuf_pool_ops.c
new file mode 100644
index 000..9aa1541
--- /dev/null
+++ b/lib/librte_mbuf/rte_mbuf_pool_ops.c
@@ -0,0 +1,96 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2018 NXP
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+int
+rte_mbuf_set_platform_mempool_ops(const char *ops_name)
+{
+ const struct rte_memzone *mz;
+
+ if (strlen(ops_name) >= RTE_MEMPOOL_OPS_NAMESIZE)
+ return -ENAMETOOLONG;
+
+ mz = rte_memzone_lookup("mbuf_platform_pool_ops");
+ if (mz == NULL) {
+ mz = rte_memzone_reserve("mbuf_platform_pool_ops",
+ RTE_MEMPOOL_OPS_NAMESIZE, SOCKET_ID_ANY, 0);
+ if (mz == NULL)
+ return -rte_errno;
+ strncpy(mz->addr, ops_name, strlen(ops_name));
+ return 0;
+ } else if (strcmp(mz->addr, ops_name) == 0) {
+ return 0;
+ }
+
+ RTE_LOG(ERR, MBUF,
+ "%s is already registered as platform mbuf pool ops\n",
+ (char *)mz->addr);
+ return -EEXIST;
+}
+
+const char *
+rte_mbuf_platform_mempool_ops(void)
+{
+ const struct rte_memzone *mz;
+
+ mz = rte_memzone_lookup("mbuf_platform_pool_ops");
+ if (mz == NULL)
+ return NULL;
+ return mz->addr;
+}
+
+int
+rte_mbuf_set_user_mempool_ops(const char *ops_name)
+{
+ const struct rte_memzone *mz;
+
+ if (strlen(ops_name) >= RTE_MEMPOOL_OPS_NAMESIZE)
+ return -ENAMETOOLONG;
+
+ mz = rte_memzone_lookup("mbuf_user_pool_ops");
+ if (mz == NULL) {
+ mz = rte_memzone_reserve("mbuf_user_pool_ops",
+ RTE_MEMPOOL_OPS_NAMESIZE, SOCKET_ID_ANY, 0);
+ if (mz == NULL)
+ return -rte_errno;
+ }
+
+ strncpy(mz->addr, ops_name, strlen(ops_name));
+ return 0;
+
+}
+
+const char *
+rte_mbuf_user_mempool_ops(void)
+{
+ const struct rte_memzone *mz;
+
+ mz = rte_memzone_lookup("mbuf_user_pool_ops");
+ if (mz == NULL)
+ return rte_eal_mbuf_default_mempool_ops();
+ return mz->addr;
+}
+
+/* Return mbuf pool ops name */
+const char *
+rte_mbuf_best_memp
[dpdk-dev] [PATCH v6 7/7] dpaa2: register dpaa2 as platform HW mempool on runtime
Detect if the DPAA2 mempool objects are present and register
it as platform default hw mempool
Signed-off-by: Hemant Agrawal
---
config/defconfig_arm64-dpaa2-linuxapp-gcc | 1 -
drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c | 3 +++
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 2 ++
drivers/mempool/dpaa2/dpaa2_hw_mempool.c | 2 +-
4 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc
b/config/defconfig_arm64-dpaa2-linuxapp-gcc
index d38d696..5d4437c 100644
--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc
+++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc
@@ -26,7 +26,6 @@ CONFIG_RTE_LIBRTE_VHOST_NUMA=n
# Compile Support Libraries for DPAA2
#
CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=y
-CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="dpaa2"
CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=n
#
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
b/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
index 139249c..9081625 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
@@ -20,6 +20,7 @@
#include
#include
#include
+#include
#include
#include
@@ -74,6 +75,8 @@ dpaa2_create_dpbp_device(int vdev_fd __rte_unused,
RTE_LOG(DEBUG, PMD, "DPAA2: Added [dpbp.%d]\n", dpbp_id);
+ rte_mbuf_set_platform_mempool_ops(DPAA2_MEMPOOL_OPS_NAME);
+
return 0;
}
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 9436d37..d421dbf 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -44,6 +44,8 @@
/* Maximum release/acquire from QBMAN */
#define DPAA2_MBUF_MAX_ACQ_REL 7
+#define DPAA2_MEMPOOL_OPS_NAME "dpaa2"
+
#define MAX_BPID 256
#define DPAA2_MBUF_HW_ANNOTATION 64
#define DPAA2_FD_PTA_SIZE 0
diff --git a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
index afda2c2..2bd62e8 100644
--- a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
+++ b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
@@ -354,7 +354,7 @@ rte_hw_mbuf_get_count(const struct rte_mempool *mp)
}
struct rte_mempool_ops dpaa2_mpool_ops = {
- .name = "dpaa2",
+ .name = DPAA2_MEMPOOL_OPS_NAME,
.alloc = rte_hw_mbuf_create_pool,
.free = rte_hw_mbuf_free_pool,
.enqueue = rte_hw_mbuf_free_bulk,
--
2.7.4
[dpdk-dev] [PATCH v6 1/7] eal: prefix mbuf pool ops name with user defined
This patch prefix the mbuf pool ops name with "user" to indicate
that it is user defined.
Signed-off-by: Hemant Agrawal
Acked-by: Olivier Matz
---
lib/librte_eal/bsdapp/eal/eal.c| 4 ++--
lib/librte_eal/common/eal_common_options.c | 2 +-
lib/librte_eal/common/eal_internal_cfg.h | 3 ++-
lib/librte_eal/linuxapp/eal/eal.c | 4 ++--
4 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/lib/librte_eal/bsdapp/eal/eal.c b/lib/librte_eal/bsdapp/eal/eal.c
index 04cbd81..c602d02 100644
--- a/lib/librte_eal/bsdapp/eal/eal.c
+++ b/lib/librte_eal/bsdapp/eal/eal.c
@@ -114,7 +114,7 @@ int rte_cycles_vmware_tsc_map;
const char *
rte_eal_mbuf_default_mempool_ops(void)
{
- return internal_config.mbuf_pool_ops_name;
+ return internal_config.user_mbuf_pool_ops_name;
}
/* Return a pointer to the configuration structure */
@@ -397,7 +397,7 @@ eal_parse_args(int argc, char **argv)
switch (opt) {
case OPT_MBUF_POOL_OPS_NAME_NUM:
- internal_config.mbuf_pool_ops_name = optarg;
+ internal_config.user_mbuf_pool_ops_name = optarg;
break;
case 'h':
eal_usage(prgname);
diff --git a/lib/librte_eal/common/eal_common_options.c
b/lib/librte_eal/common/eal_common_options.c
index 996a034..7a40414 100644
--- a/lib/librte_eal/common/eal_common_options.c
+++ b/lib/librte_eal/common/eal_common_options.c
@@ -218,7 +218,7 @@ eal_reset_internal_config(struct internal_config
*internal_cfg)
#endif
internal_cfg->vmware_tsc_map = 0;
internal_cfg->create_uio_dev = 0;
- internal_cfg->mbuf_pool_ops_name = RTE_MBUF_DEFAULT_MEMPOOL_OPS;
+ internal_cfg->user_mbuf_pool_ops_name = RTE_MBUF_DEFAULT_MEMPOOL_OPS;
}
static int
diff --git a/lib/librte_eal/common/eal_internal_cfg.h
b/lib/librte_eal/common/eal_internal_cfg.h
index c67685c..1169fcc 100644
--- a/lib/librte_eal/common/eal_internal_cfg.h
+++ b/lib/librte_eal/common/eal_internal_cfg.h
@@ -52,7 +52,8 @@ struct internal_config {
volatile enum rte_intr_mode vfio_intr_mode;
const char *hugefile_prefix; /**< the base filename of hugetlbfs
files */
const char *hugepage_dir; /**< specific hugetlbfs directory to
use */
- const char *mbuf_pool_ops_name; /**< mbuf pool ops name */
+ const char *user_mbuf_pool_ops_name;
+ /**< user defined mbuf pool ops name */
unsigned num_hugepage_sizes; /**< how many sizes on this system */
struct hugepage_info hugepage_info[MAX_HUGEPAGE_SIZES];
};
diff --git a/lib/librte_eal/linuxapp/eal/eal.c
b/lib/librte_eal/linuxapp/eal/eal.c
index 229eec9..e8c7100 100644
--- a/lib/librte_eal/linuxapp/eal/eal.c
+++ b/lib/librte_eal/linuxapp/eal/eal.c
@@ -124,7 +124,7 @@ int rte_cycles_vmware_tsc_map;
const char *
rte_eal_mbuf_default_mempool_ops(void)
{
- return internal_config.mbuf_pool_ops_name;
+ return internal_config.user_mbuf_pool_ops_name;
}
/* Return a pointer to the configuration structure */
@@ -609,7 +609,7 @@ eal_parse_args(int argc, char **argv)
break;
case OPT_MBUF_POOL_OPS_NAME_NUM:
- internal_config.mbuf_pool_ops_name = optarg;
+ internal_config.user_mbuf_pool_ops_name = optarg;
break;
default:
--
2.7.4
[dpdk-dev] [PATCH v6 4/7] mbuf: pktmbuf pool create helper for specific mempool ops
Introduce a new helper for pktmbuf pool, which will allow
the application to optionally specify the mempool ops name
as well.
Signed-off-by: Hemant Agrawal
Acked-by: Olivier Matz
---
lib/librte_mbuf/rte_mbuf.c | 23 +--
lib/librte_mbuf/rte_mbuf.h | 42 ++
2 files changed, 59 insertions(+), 6 deletions(-)
diff --git a/lib/librte_mbuf/rte_mbuf.c b/lib/librte_mbuf/rte_mbuf.c
index 0c4d374..a256b42 100644
--- a/lib/librte_mbuf/rte_mbuf.c
+++ b/lib/librte_mbuf/rte_mbuf.c
@@ -149,15 +149,15 @@ rte_pktmbuf_init(struct rte_mempool *mp,
m->next = NULL;
}
-/* helper to create a mbuf pool */
+/* Helper to create a mbuf pool with given mempool ops name*/
struct rte_mempool *
-rte_pktmbuf_pool_create(const char *name, unsigned n,
- unsigned cache_size, uint16_t priv_size, uint16_t data_room_size,
- int socket_id)
+rte_pktmbuf_pool_create_by_ops(const char *name, unsigned int n,
+ unsigned int cache_size, uint16_t priv_size, uint16_t data_room_size,
+ int socket_id, const char *ops_name)
{
struct rte_mempool *mp;
struct rte_pktmbuf_pool_private mbp_priv;
- const char *mp_ops_name;
+ const char *mp_ops_name = ops_name;
unsigned elt_size;
int ret;
@@ -177,7 +177,8 @@ rte_pktmbuf_pool_create(const char *name, unsigned n,
if (mp == NULL)
return NULL;
- mp_ops_name = rte_mbuf_best_mempool_ops();
+ if (mp_ops_name == NULL)
+ mp_ops_name = rte_mbuf_best_mempool_ops();
ret = rte_mempool_set_ops_byname(mp, mp_ops_name, NULL);
if (ret != 0) {
RTE_LOG(ERR, MBUF, "error setting mempool handler\n");
@@ -199,6 +200,16 @@ rte_pktmbuf_pool_create(const char *name, unsigned n,
return mp;
}
+/* helper to create a mbuf pool */
+struct rte_mempool *
+rte_pktmbuf_pool_create(const char *name, unsigned int n,
+ unsigned int cache_size, uint16_t priv_size, uint16_t data_room_size,
+ int socket_id)
+{
+ return rte_pktmbuf_pool_create_by_ops(name, n, cache_size, priv_size,
+ data_room_size, socket_id, NULL);
+}
+
/* do some sanity checks on a mbuf: panic if it fails */
void
rte_mbuf_sanity_check(const struct rte_mbuf *m, int is_header)
diff --git a/lib/librte_mbuf/rte_mbuf.h b/lib/librte_mbuf/rte_mbuf.h
index a594e47..e25b030 100644
--- a/lib/librte_mbuf/rte_mbuf.h
+++ b/lib/librte_mbuf/rte_mbuf.h
@@ -1103,6 +1103,48 @@ rte_pktmbuf_pool_create(const char *name, unsigned n,
int socket_id);
/**
+ * Create a mbuf pool with a given mempool ops name
+ *
+ * This function creates and initializes a packet mbuf pool. It is
+ * a wrapper to rte_mempool functions.
+ *
+ * @param name
+ * The name of the mbuf pool.
+ * @param n
+ * The number of elements in the mbuf pool. The optimum size (in terms
+ * of memory usage) for a mempool is when n is a power of two minus one:
+ * n = (2^q - 1).
+ * @param cache_size
+ * Size of the per-core object cache. See rte_mempool_create() for
+ * details.
+ * @param priv_size
+ * Size of application private are between the rte_mbuf structure
+ * and the data buffer. This value must be aligned to RTE_MBUF_PRIV_ALIGN.
+ * @param data_room_size
+ * Size of data buffer in each mbuf, including RTE_PKTMBUF_HEADROOM.
+ * @param socket_id
+ * The socket identifier where the memory should be allocated. The
+ * value can be *SOCKET_ID_ANY* if there is no NUMA constraint for the
+ * reserved zone.
+ * @param ops_name
+ * The mempool ops name to be used for this mempool instead of
+ * default mempool. The value can be *NULL* to use default mempool.
+ * @return
+ * The pointer to the new allocated mempool, on success. NULL on error
+ * with rte_errno set appropriately. Possible rte_errno values include:
+ *- E_RTE_NO_CONFIG - function could not get pointer to rte_config
structure
+ *- E_RTE_SECONDARY - function was called from a secondary process instance
+ *- EINVAL - cache size provided is too large, or priv_size is not aligned.
+ *- ENOSPC - the maximum number of memzones has already been allocated
+ *- EEXIST - a memzone with the same name already exists
+ *- ENOMEM - no appropriate memory area found in which to create memzone
+ */
+struct rte_mempool *
+rte_pktmbuf_pool_create_by_ops(const char *name, unsigned int n,
+ unsigned int cache_size, uint16_t priv_size, uint16_t data_room_size,
+ int socket_id, const char *ops_name);
+
+/**
* Get the data room size of mbufs stored in a pktmbuf_pool
*
* The data room size is the amount of data that can be stored in a
--
2.7.4
[dpdk-dev] [PATCH v6 2/7] mbuf: maintain user and compile time mempool ops name
This patch change the logic to maintain the value of
user defined and compile time i.e. RTE_MBUF_DEFAULT_MEMPOOL_OPS.
The pktmbuf_create_pool is updated to reflect the same.
Signed-off-by: Hemant Agrawal
Acked-by: Olivier Matz
---
lib/librte_eal/common/eal_common_options.c | 2 +-
lib/librte_mbuf/rte_mbuf.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/lib/librte_eal/common/eal_common_options.c
b/lib/librte_eal/common/eal_common_options.c
index 7a40414..b6d2762 100644
--- a/lib/librte_eal/common/eal_common_options.c
+++ b/lib/librte_eal/common/eal_common_options.c
@@ -218,7 +218,7 @@ eal_reset_internal_config(struct internal_config
*internal_cfg)
#endif
internal_cfg->vmware_tsc_map = 0;
internal_cfg->create_uio_dev = 0;
- internal_cfg->user_mbuf_pool_ops_name = RTE_MBUF_DEFAULT_MEMPOOL_OPS;
+ internal_cfg->user_mbuf_pool_ops_name = NULL;
}
static int
diff --git a/lib/librte_mbuf/rte_mbuf.c b/lib/librte_mbuf/rte_mbuf.c
index 937fd70..c085c37 100644
--- a/lib/librte_mbuf/rte_mbuf.c
+++ b/lib/librte_mbuf/rte_mbuf.c
@@ -177,6 +177,8 @@ rte_pktmbuf_pool_create(const char *name, unsigned n,
return NULL;
mp_ops_name = rte_eal_mbuf_default_mempool_ops();
+ if (mp_ops_name == NULL)
+ mp_ops_name = RTE_MBUF_DEFAULT_MEMPOOL_OPS;
ret = rte_mempool_set_ops_byname(mp, mp_ops_name, NULL);
if (ret != 0) {
RTE_LOG(ERR, MBUF, "error setting mempool handler\n");
--
2.7.4
[dpdk-dev] [PATCH v6 6/7] dpaa: register dpaa as platform HW mempool on runtime
Signed-off-by: Hemant Agrawal
---
config/defconfig_arm64-dpaa-linuxapp-gcc | 1 -
drivers/bus/dpaa/dpaa_bus.c | 2 ++
drivers/bus/dpaa/rte_dpaa_bus.h | 2 ++
drivers/mempool/dpaa/dpaa_mempool.c | 2 +-
4 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/config/defconfig_arm64-dpaa-linuxapp-gcc
b/config/defconfig_arm64-dpaa-linuxapp-gcc
index c2ca16a..ab9e67d 100644
--- a/config/defconfig_arm64-dpaa-linuxapp-gcc
+++ b/config/defconfig_arm64-dpaa-linuxapp-gcc
@@ -25,7 +25,6 @@ CONFIG_RTE_LIBRTE_DPAA_HWDEBUG=n
# NXP DPAA Mempool
CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=y
-CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="dpaa"
# Compile software NXP DPAA PMD
CONFIG_RTE_LIBRTE_DPAA_PMD=y
diff --git a/drivers/bus/dpaa/dpaa_bus.c b/drivers/bus/dpaa/dpaa_bus.c
index ba33566..f5840de 100644
--- a/drivers/bus/dpaa/dpaa_bus.c
+++ b/drivers/bus/dpaa/dpaa_bus.c
@@ -31,6 +31,7 @@
#include
#include
#include
+#include
#include
#include
@@ -469,6 +470,7 @@ rte_dpaa_bus_probe(void)
break;
}
}
+ rte_mbuf_set_platform_mempool_ops(DPAA_MEMPOOL_OPS_NAME);
svr_file = fopen(DPAA_SOC_ID_FILE, "r");
if (svr_file) {
diff --git a/drivers/bus/dpaa/rte_dpaa_bus.h b/drivers/bus/dpaa/rte_dpaa_bus.h
index 6fa0c3d..d613660 100644
--- a/drivers/bus/dpaa/rte_dpaa_bus.h
+++ b/drivers/bus/dpaa/rte_dpaa_bus.h
@@ -17,6 +17,8 @@
#define FSL_DPAA_BUS_NAME "FSL_DPAA_BUS"
+#define DPAA_MEMPOOL_OPS_NAME "dpaa"
+
#define DEV_TO_DPAA_DEVICE(ptr)\
container_of(ptr, struct rte_dpaa_device, device)
diff --git a/drivers/mempool/dpaa/dpaa_mempool.c
b/drivers/mempool/dpaa/dpaa_mempool.c
index ddc4e47..dc4bcc9 100644
--- a/drivers/mempool/dpaa/dpaa_mempool.c
+++ b/drivers/mempool/dpaa/dpaa_mempool.c
@@ -290,7 +290,7 @@ dpaa_register_memory_area(const struct rte_mempool *mp,
}
struct rte_mempool_ops dpaa_mpool_ops = {
- .name = "dpaa",
+ .name = DPAA_MEMPOOL_OPS_NAME,
.alloc = dpaa_mbuf_create_pool,
.free = dpaa_mbuf_free_pool,
.enqueue = dpaa_mbuf_free_bulk,
--
2.7.4
[dpdk-dev] [PATCH v6 5/7] app/testpmd: set preferred mempool as default pktpool
From: Pavan Nikhilesh
Set the mempool preferred by the ethernet devices as default mbuf
mempool before creating the pktpool.
Signed-off-by: Pavan Nikhilesh
Signed-off-by: Hemant Agrawal
Reviewed-by: Olivier Matz
---
app/test-pmd/testpmd.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c
index 5dc8cca..d8ac432 100644
--- a/app/test-pmd/testpmd.c
+++ b/app/test-pmd/testpmd.c
@@ -38,6 +38,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -499,6 +500,8 @@ mbuf_pool_create(uint16_t mbuf_seg_size, unsigned nb_mbuf,
rte_mempool_obj_iter(rte_mp, rte_pktmbuf_init, NULL);
} else {
/* wrapper to rte_mempool_create() */
+ TESTPMD_LOG(INFO, "preferred mempool ops selected: %s\n",
+ rte_mbuf_best_mempool_ops());
rte_mp = rte_pktmbuf_pool_create(pool_name, nb_mbuf,
mb_mempool_cache, 0, mbuf_seg_size, socket_id);
}
--
2.7.4
[dpdk-dev] [PATCH v6 0/7] Dynamic HW Mempool Detection Support
W.r.t the multiple discussions in the past about the ability to dynamically detect the HW mempool support. [1],[2] & [3] This patchset helps in removing the current static mempool selection model and provides a flexible model to select the pktmbuf mempool in more dynamic way. 1) This patchset updates the hw mempool on the basis of device probe()), thus avoiding the need to specify the hw mempool in config file and focing different binaries for diffirent config architectures. 2) Selection of mempool ops though --mbuf-pool-ops-name (cmd line arg) which can overridden the scheme(1) 3) A new best mempool ops selection logic. 4) A new wrapper for the pktmbuf_pool_create helper to take mempool ops name as an argument as well. *Future Discussion points* 1. Platform OPS name is to be registered by the respentive HW. So it is the responsibility of HW to take care of not registering it from secondary process. 2. This logic can be further extended with addition for following patch, which is still under discussion. The ethdev PMD capability exposed through existing rte_eth_dev_pool_ops_supported() to select the update the mempool ops with some "weight" based algorithm like: http://dpdk.org/dev/patchwork/patch/32245/ [1]Multiple Pktmbuf mempool support http://dpdk.org/ml/archives/dev/2017-September/076531.html [2]Allow application set mempool handle http://dpdk.org/ml/archives/dev/2017-June/067022.html Other discussions [3] http://dpdk.org/ml/archives/dev/2017-December/084775.html -- Changes in v6: 1. Fix compilation issue for patch 1/7 2. Fix return value comment for patch 3/7 Changes in v5: 1. Fix the doxygen API issues 2. remove unnecessary memset. Changes in v4: 1. Taking care of Olivier's comments 2. Changing the mempool ops name memory to named memzone Changes in v3: 1. Moving the new mbuf APIs to rte_mbuf_pool_ops.h 2. Taking care of comments from Jerin and Olivier 3. Adding memory for platform mempools ops in librte_mbuf Changes in v2: 1. Changed the active mempool to platform mempool 2. Moved all the relavant APIs to librte_mbuf 3. Added pktmbuf_create_pool_specific wrapper in this patch series. Hemant Agrawal (6): eal: prefix mbuf pool ops name with user defined mbuf: maintain user and compile time mempool ops name mbuf: add pool ops name selection API helpers mbuf: pktmbuf pool create helper for specific mempool ops dpaa: register dpaa as platform HW mempool on runtime dpaa2: register dpaa2 as platform HW mempool on runtime Pavan Nikhilesh (1): app/testpmd: set preferred mempool as default pktpool app/test-pmd/testpmd.c | 3 + config/defconfig_arm64-dpaa-linuxapp-gcc | 1 - config/defconfig_arm64-dpaa2-linuxapp-gcc | 1 - doc/api/doxy-api-index.md | 1 + drivers/bus/dpaa/dpaa_bus.c| 2 + drivers/bus/dpaa/rte_dpaa_bus.h| 2 + drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c | 3 + drivers/bus/fslmc/portal/dpaa2_hw_pvt.h| 2 + drivers/mempool/dpaa/dpaa_mempool.c| 2 +- drivers/mempool/dpaa2/dpaa2_hw_mempool.c | 2 +- lib/librte_eal/bsdapp/eal/eal.c| 4 +- lib/librte_eal/common/eal_common_options.c | 2 +- lib/librte_eal/common/eal_internal_cfg.h | 3 +- lib/librte_eal/linuxapp/eal/eal.c | 4 +- lib/librte_mbuf/Makefile | 4 +- lib/librte_mbuf/rte_mbuf.c | 24 ++-- lib/librte_mbuf/rte_mbuf.h | 42 + lib/librte_mbuf/rte_mbuf_pool_ops.c| 96 ++ lib/librte_mbuf/rte_mbuf_pool_ops.h| 93 + lib/librte_mbuf/rte_mbuf_version.map | 11 20 files changed, 284 insertions(+), 18 deletions(-) create mode 100644 lib/librte_mbuf/rte_mbuf_pool_ops.c create mode 100644 lib/librte_mbuf/rte_mbuf_pool_ops.h -- 2.7.4
[dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds
From: Bruce Richardson
Add files to enable compiling for ARM native/cross builds.
This can be tested by doing a cross-compile for armv8-a type using
the linaro gcc toolchain.
meson arm-build --cross-file aarch64_cross.txt
ninja -C arm-build
where aarch64_cross.txt contained the following
[binaries]
c = 'aarch64-linux-gnu-gcc'
cpp = 'aarch64-linux-gnu-cpp'
ar = 'aarch64-linux-gnu-ar'
[host_machine]
system = 'linux'
cpu_family = 'aarch64'
cpu = 'armv8-a'
endian = 'little'
Signed-off-by: Bruce Richardson
Signed-off-by: Pavan Nikhilesh
---
v6 Changes:
- add documentation for cross compiling with meson
- rebase onto master
- fix commit logs
v5 Changes:
- Use generic_armv8 config when script returns unknows machine args
v4 Changes:
- use set_quoted to set config instead of explicitly using quotes.
v3 Changes:
- Fix missing SPDX license tags
v2 Changes:
- Merged RFC patch.
- Added framework to easily other vendor specific flags
- renamed machine_arg to machine_args
config/arm/meson.build | 36 ++
config/meson.build | 4 ++-
lib/librte_eal/common/arch/arm/meson.build | 5 +++
lib/librte_eal/common/include/arch/arm/meson.build | 29 +
4 files changed, 73 insertions(+), 1 deletion(-)
create mode 100644 config/arm/meson.build
create mode 100644 lib/librte_eal/common/arch/arm/meson.build
create mode 100644 lib/librte_eal/common/include/arch/arm/meson.build
diff --git a/config/arm/meson.build b/config/arm/meson.build
new file mode 100644
index 0..f05de4c2c
--- /dev/null
+++ b/config/arm/meson.build
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+# Copyright(c) 2017 Cavium, Inc
+
+# for checking defines we need to use the correct compiler flags
+march_opt = '-march=@0@'.format(machine)
+
+dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
+if cc.sizeof('void *') == 8
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
+ dpdk_conf.set('RTE_ARCH_ARM64', 1)
+ dpdk_conf.set('RTE_ARCH_64', 1)
+else
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
+ dpdk_conf.set('RTE_ARCH_ARM', 1)
+ dpdk_conf.set('RTE_ARCH_ARMv7', 1)
+endif
+
+if cc.get_define('__ARM_NEON', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
+endif
+
+if cc.get_define('__ARM_FEATURE_CRC32', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
+endif
+
+if cc.get_define('__ARM_FEATURE_CRYPTO', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA2', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
+ 'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']
+endif
diff --git a/config/meson.build b/config/meson.build
index 95223042f..fa55c53a5 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -56,8 +56,10 @@ endforeach
compile_time_cpuflags = []
if host_machine.cpu_family().startswith('x86')
arch_subdir = 'x86'
- subdir(arch_subdir)
+elif host_machine.cpu_family().startswith('arm') or
host_machine.cpu_family().startswith('aarch')
+ arch_subdir = 'arm'
endif
+subdir(arch_subdir)
dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
# set the install path for the drivers
diff --git a/lib/librte_eal/common/arch/arm/meson.build
b/lib/librte_eal/common/arch/arm/meson.build
new file mode 100644
index 0..c6bd92272
--- /dev/null
+++ b/lib/librte_eal/common/arch/arm/meson.build
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+
+eal_common_arch_sources = files('rte_cpuflags.c',
+ 'rte_cycles.c')
diff --git a/lib/librte_eal/common/include/arch/arm/meson.build
b/lib/librte_eal/common/include/arch/arm/meson.build
new file mode 100644
index 0..77893fa35
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/meson.build
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+
+install_headers(
+ 'rte_atomic_32.h',
+ 'rte_atomic_64.h',
+ 'rte_atomic.h',
+ 'rte_byteorder.h',
+ 'rte_cpuflags_32.h',
+ 'rte_cpuflags_64.h',
+ 'rte_cpuflags.h',
+ 'rte_cycles_32.h',
+ 'rte_cycles_64.h',
+ 'rte_cycles.h',
+ 'rte_io_64.h',
+ 'rte_io.h',
+ 'rte_memcpy_32.h',
+ 'rte_memcpy_64.h',
+ 'rte_memcpy.h',
+ 'rte_pause_32.h',
+ 'rte_pause_64.h',
+ 'rte_pause.h',
+ 'rte_prefetch_32.h',
+ 'rte_prefetch_64.h',
+ 'rte_prefetch.h',
+ 'rte_rwlock.h',
+ 'rte
[dpdk-dev] [PATCH v6 2/4] build: add support for detecting march on ARM
Added support for detecting march and mcpu by reading midr_el1 register.
The implementer, primary part number values read can be used to figure
out the underlying arm cpu.
Signed-off-by: Pavan Nikhilesh
---
app/test-eventdev/meson.build | 2 +-
app/test-pmd/meson.build | 2 +-
config/arm/armv8_machine.py | 18
config/arm/meson.build| 98 +++
config/meson.build| 19 +
drivers/meson.build | 2 +-
examples/meson.build | 2 +-
lib/meson.build | 2 +-
meson.build | 2 +-
test/test/meson.build | 2 +-
10 files changed, 125 insertions(+), 24 deletions(-)
create mode 100755 config/arm/armv8_machine.py
diff --git a/app/test-eventdev/meson.build b/app/test-eventdev/meson.build
index 1dd954539..5beaa0070 100644
--- a/app/test-eventdev/meson.build
+++ b/app/test-eventdev/meson.build
@@ -21,7 +21,7 @@ endif
executable('dpdk-test-eventdev',
sources,
- c_args: machine_arg,
+ c_args: machine_args,
link_whole: link_libs,
dependencies: dep_objs,
install_rpath: join_paths(get_option('prefix'), driver_install_path),
diff --git a/app/test-pmd/meson.build b/app/test-pmd/meson.build
index e819677a5..2a3f0ba1f 100644
--- a/app/test-pmd/meson.build
+++ b/app/test-pmd/meson.build
@@ -45,7 +45,7 @@ endif
executable('dpdk-testpmd',
sources,
- c_args: machine_arg,
+ c_args: machine_args,
link_whole: link_libs,
dependencies: dep_objs,
install_rpath: join_paths(get_option('prefix'), driver_install_path),
diff --git a/config/arm/armv8_machine.py b/config/arm/armv8_machine.py
new file mode 100755
index 0..404866d2f
--- /dev/null
+++ b/config/arm/armv8_machine.py
@@ -0,0 +1,18 @@
+#!/usr/bin/python
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Cavium, Inc
+
+ident = []
+fname = '/sys/devices/system/cpu/cpu0/regs/identification/midr_el1'
+with open(fname) as f:
+content = f.read()
+
+midr_el1 = (int(content.rstrip('\n'), 16))
+
+ident.append(hex((midr_el1 >> 24) & 0xFF)) # Implementer
+ident.append(hex((midr_el1 >> 20) & 0xF)) # Variant
+ident.append(hex((midr_el1 >> 16) & 0XF)) # Architecture
+ident.append(hex((midr_el1 >> 4) & 0xFFF)) # Primary Part number
+ident.append(hex(midr_el1 & 0xF)) # Revision
+
+print(' '.join(ident))
diff --git a/config/arm/meson.build b/config/arm/meson.build
index f05de4c2c..a5bfb9610 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -5,28 +5,110 @@
# for checking defines we need to use the correct compiler flags
march_opt = '-march=@0@'.format(machine)
-dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
-if cc.sizeof('void *') == 8
- dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
- dpdk_conf.set('RTE_ARCH_ARM64', 1)
- dpdk_conf.set('RTE_ARCH_64', 1)
+machine_args_generic = [
+ ['default', ['-march=armv8-a+crc+crypto']]]
+machine_args_cavium = [
+ ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
+ ['0xa1', ['-mcpu=thunderxt88']],
+ ['0xa2', ['-mcpu=thunderxt81']],
+ ['0xa3', ['-mcpu=thunderxt83']]]
+
+flags_generic = [[]]
+flags_cavium = [
+ ['RTE_MACHINE', '"thunderx"'],
+ ['RTE_CACHE_LINE_SIZE', 128],
+ ['RTE_MAX_NUMA_NODES', 2],
+ ['RTE_MAX_LCORE', 96],
+ ['RTE_MAX_VFIO_GROUPS', 128],
+ ['RTE_RING_USE_C11_MEM_MODEL', false]]
+
+impl_generic = ['Generic armv8', flags_generic, machine_args_generic]
+impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
+
+if cc.get_define('__clang__') != ''
+ dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'clang')
+ dpdk_conf.set('RTE_TOOLCHAIN_CLANG', 1)
else
+ dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'gcc')
+ dpdk_conf.set('RTE_TOOLCHAIN_GCC', 1)
+endif
+
+dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
+
+if cc.sizeof('void *') != 8
dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
dpdk_conf.set('RTE_ARCH_ARM', 1)
dpdk_conf.set('RTE_ARCH_ARMv7', 1)
+else
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
+ dpdk_conf.set('RTE_ARCH_ARM64', 1)
+ dpdk_conf.set('RTE_ARCH_64', 1)
+
+ machine = []
+ cmd_generic = ['generic', '', '', 'default', '']
+ cmd_output = cmd_generic # Set generic by default
+ machine_args = [] # Clear previous machine args
+ if not meson.is_cross_build()
+ # The script returns ['Implementer', 'Variant', 'Architecture',
+ # 'Primary Part number', 'Revision']
+ detect_vendor = find_program(join_paths(
+ meson.current_source_dir(), 'armv8_machine.py'))
+ cmd = run_command(detect_vendor.path())
+ if cmd.returncode() == 0
+ cmd_output = cmd.stdout().strip().split(' ')
+ endif
+ # Set to generic if variable is not found
+ machine = get_variable('i
[dpdk-dev] [PATCH v6 3/4] build: add support for vendor specific ARM cross builds
Add various vendor specific cross build targets. This can be verified by using linaro toolchain and running meson build --cross-file config/arm/arm64___ In future more cross build targets can be added. Signed-off-by: Pavan Nikhilesh --- config/arm/arm64_armv8_linuxapp_gcc| 10 ++ config/arm/arm64_thunderx_linuxapp_gcc | 13 + 2 files changed, 23 insertions(+) create mode 100644 config/arm/arm64_armv8_linuxapp_gcc create mode 100644 config/arm/arm64_thunderx_linuxapp_gcc diff --git a/config/arm/arm64_armv8_linuxapp_gcc b/config/arm/arm64_armv8_linuxapp_gcc new file mode 100644 index 0..3b4d3c469 --- /dev/null +++ b/config/arm/arm64_armv8_linuxapp_gcc @@ -0,0 +1,10 @@ +[binaries] +c = 'aarch64-linux-gnu-gcc' +cpp = 'aarch64-linux-gnu-cpp' +ar = 'aarch64-linux-gnu-gcc-ar' + +[host_machine] +system = 'linux' +cpu_family = 'aarch64' +cpu = 'armv8-a' +endian = 'little' diff --git a/config/arm/arm64_thunderx_linuxapp_gcc b/config/arm/arm64_thunderx_linuxapp_gcc new file mode 100644 index 0..7ff34af74 --- /dev/null +++ b/config/arm/arm64_thunderx_linuxapp_gcc @@ -0,0 +1,13 @@ +[binaries] +c = 'aarch64-linux-gnu-gcc' +cpp = 'aarch64-linux-gnu-cpp' +ar = 'aarch64-linux-gnu-gcc-ar' + +[host_machine] +system = 'linux' +cpu_family = 'aarch64' +cpu = 'armv8-a' +endian = 'little' + +[properties] +implementor_id = '0x43' -- 2.16.0
[dpdk-dev] [PATCH] doc: add release note entry for meson build
Signed-off-by: Bruce Richardson --- doc/guides/rel_notes/release_18_02.rst | 14 ++ 1 file changed, 14 insertions(+) diff --git a/doc/guides/rel_notes/release_18_02.rst b/doc/guides/rel_notes/release_18_02.rst index 00b3224f3..cba8275a4 100644 --- a/doc/guides/rel_notes/release_18_02.rst +++ b/doc/guides/rel_notes/release_18_02.rst @@ -151,6 +151,20 @@ New Features renamed the application from SW PMD specific ``eventdev_pipeline_sw_pmd`` to PMD agnostic ``eventdev_pipeline``. +* **Added new DPDK build system using the tools "meson" and "ninja" [EXPERIMENTAL]** + + Added in support for building DPDK using ``meson`` and ``ninja``, which gives + additional features, such as automatic build-time configuration, over the + current build system using ``make``. For instructions on how to do a DPDK build + using the new system, see the instructions in ``doc/build-sdk-meson.txt``. + +.. note:: + +This new build system support is incomplete at this point and is added +as experimental in this release. The existing build system using ``make`` +is unaffected by these changes, and can continue to be used for this +and subsequent releases until such time as it's deprecation is announced. + API Changes --- -- 2.14.3
[dpdk-dev] [PATCH v6 4/4] doc: add instructions to cross compile using meson
Signed-off-by: Pavan Nikhilesh --- doc/build-sdk-meson.txt | 27 +++ 1 file changed, 27 insertions(+) diff --git a/doc/build-sdk-meson.txt b/doc/build-sdk-meson.txt index b5573f7a7..9618e759e 100644 --- a/doc/build-sdk-meson.txt +++ b/doc/build-sdk-meson.txt @@ -150,6 +150,33 @@ driver install path, so dynamically-linked applications can be run without having to pass in ``-d /path/to/driver`` options for standard drivers. +Cross Compiling DPDK + + +To cross-compile DPDK on a desired target machine we can use the following +command:: + + meson cross-build --cross-file + +For example if the target machine is arm64 we can use the following +command:: + meson arm-build --cross-file config/arm/arm64_armv8_linuxapp_gcc + +where config/arm/arm64_armv8_linuxapp_gcc contains the following +parameters:: + + [binaries] + c = 'aarch64-linux-gnu-gcc' + cpp = 'aarch64-linux-gnu-cpp' + ar = 'aarch64-linux-gnu-ar' + + [host_machine] + system = 'linux' + cpu_family = 'aarch64' + cpu = 'armv8-a' + endian = 'little' + + Using the DPDK within an Application - -- 2.16.0
[dpdk-dev] [PATCH] app/testpmd: fix dereference null return valiue
Calloc() function might returns NULL due to insufficient space. Therefore,
check for handling memory allocation failure is added.
Coverity issue: 257030
Fixes: 5b590fbe09b6 ("app/testpmd: add traffic management forwarding mode")
Signed-off-by: Jasvinder Singh
---
app/test-pmd/tm.c | 4
1 file changed, 4 insertions(+)
diff --git a/app/test-pmd/tm.c b/app/test-pmd/tm.c
index b76335c..7231552 100644
--- a/app/test-pmd/tm.c
+++ b/app/test-pmd/tm.c
@@ -575,6 +575,10 @@ softport_tm_tc_node_add(portid_t port_id, struct
tm_hierarchy *h,
tc_parent_node_id = h->pipe_node_id[i][j];
tnp.shared_shaper_id =
(uint32_t *)calloc(1, sizeof(uint32_t));
+ if (tnp.shared_shaper_id == NULL) {
+ printf("Shared shaper mem alloc err\n");
+ return -1;
+ }
tnp.shared_shaper_id[0] = k;
pos = j + (i * PIPE_NODES_PER_SUBPORT);
h->tc_node_id[pos][k] =
--
2.9.3
[dpdk-dev] [PATCH] build: make compat a universal dependency
By making "compat" lib (which consists of a header only) a dependency of
the EAL, we make the header file available to all other libs, drivers and
apps, and thereby make it less work to do ABI versioning.
Signed-off-by: Bruce Richardson
---
drivers/net/bonding/meson.build| 2 +-
lib/librte_distributor/meson.build | 2 +-
lib/librte_eal/meson.build | 1 +
lib/librte_ether/meson.build | 2 +-
lib/librte_hash/meson.build| 2 +-
lib/librte_lpm/meson.build | 1 -
6 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/net/bonding/meson.build b/drivers/net/bonding/meson.build
index 4dc5a5f67..b90abc6de 100644
--- a/drivers/net/bonding/meson.build
+++ b/drivers/net/bonding/meson.build
@@ -6,6 +6,6 @@ sources = files('rte_eth_bond_api.c', 'rte_eth_bond_pmd.c',
'rte_eth_bond_args.c', 'rte_eth_bond_8023ad.c', 'rte_eth_bond_alb.c')
deps += 'sched' # needed for rte_bitmap.h
-deps += ['compat', 'ip_frag', 'cmdline']
+deps += ['ip_frag', 'cmdline']
install_headers('rte_eth_bond.h', 'rte_eth_bond_8023ad.h')
diff --git a/lib/librte_distributor/meson.build
b/lib/librte_distributor/meson.build
index e9caf8675..dba7e3b2a 100644
--- a/lib/librte_distributor/meson.build
+++ b/lib/librte_distributor/meson.build
@@ -8,4 +8,4 @@ else
sources += files('rte_distributor_match_generic.c')
endif
headers = files('rte_distributor.h')
-deps += ['mbuf', 'compat']
+deps += ['mbuf']
diff --git a/lib/librte_eal/meson.build b/lib/librte_eal/meson.build
index 9c141b3c3..9f5f0f3ed 100644
--- a/lib/librte_eal/meson.build
+++ b/lib/librte_eal/meson.build
@@ -45,6 +45,7 @@ else
endif
version = 6 # the version of the EAL API
+deps += 'compat'
cflags += '-D_GNU_SOURCE'
sources = common_sources + env_sources
objs = common_objs + env_objs
diff --git a/lib/librte_ether/meson.build b/lib/librte_ether/meson.build
index f83991268..18f94bf96 100644
--- a/lib/librte_ether/meson.build
+++ b/lib/librte_ether/meson.build
@@ -21,4 +21,4 @@ headers = files('rte_ethdev.h',
'rte_tm.h',
'rte_tm_driver.h')
-deps += ['net', 'compat']
+deps += ['net']
diff --git a/lib/librte_hash/meson.build b/lib/librte_hash/meson.build
index 8e1113789..e139e1d76 100644
--- a/lib/librte_hash/meson.build
+++ b/lib/librte_hash/meson.build
@@ -14,4 +14,4 @@ headers = files('rte_cmp_arm64.h',
'rte_thash.h')
sources = files('rte_cuckoo_hash.c', 'rte_fbk_hash.c')
-deps += ['ring', 'compat']
+deps += ['ring']
diff --git a/lib/librte_lpm/meson.build b/lib/librte_lpm/meson.build
index a7c7fa7ae..067849427 100644
--- a/lib/librte_lpm/meson.build
+++ b/lib/librte_lpm/meson.build
@@ -7,4 +7,3 @@ headers = files('rte_lpm.h', 'rte_lpm6.h')
# since header files have different names, we can install all vector headers
# without worrying about which architecture we actually need
headers += files('rte_lpm_altivec.h', 'rte_lpm_neon.h', 'rte_lpm_sse.h')
-deps += ['compat']
--
2.14.3
[dpdk-dev] [PATCH] net/octeontx: register fpa as platform HW mempool
Register octeontx-fpavf as platform HW mempool when net/octeontx pmd is
used.
Signed-off-by: Pavan Nikhilesh
---
This patch depends on http://dpdk.org/dev/patchwork/patch/34239 patchset.
drivers/net/octeontx/octeontx_ethdev.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/octeontx/octeontx_ethdev.c
b/drivers/net/octeontx/octeontx_ethdev.c
index adca3435e..2b4a07d2b 100644
--- a/drivers/net/octeontx/octeontx_ethdev.c
+++ b/drivers/net/octeontx/octeontx_ethdev.c
@@ -16,6 +16,7 @@
#include
#include
#include
+#include
#include
#include
@@ -1326,6 +1327,7 @@ octeontx_probe(struct rte_vdev_device *dev)
res = -ENOTSUP;
goto parse_error;
}
+ rte_mbuf_set_platform_mempool_ops("octeontx_fpavf");
probe_once = 1;
return 0;
--
2.16.0
Re: [dpdk-dev] [PATCH v3 1/3] kni: support for MAC addr change
On 1/22/2018 5:20 AM, Hemant Agrawal wrote: > Hi Ferruh, > > On 1/22/2018 3:37 AM, Ferruh Yigit wrote: >> On 1/18/2018 6:12 AM, Hemant Agrawal wrote: >>> This patch adds following: >>> 1. Option to configure the mac address during create. Generate random >>>address only if the user has not provided any valid address. >>> 2. Inform usespace, if mac address is being changed in linux. >>> 3. Implement default handling of mac address change in the corresponding >>>ethernet device. >>> >>> Signed-off-by: Hemant Agrawal >> >> <...> >> >>> @@ -530,6 +556,14 @@ rte_kni_handle_request(struct rte_kni *kni) >>> req->result = kni->ops.config_network_if(\ >>> kni->ops.port_id, req->if_up); >>> break; >>> + case RTE_KNI_REQ_CHANGE_MAC_ADDR: /* Change MAC Address */ >>> + if (kni->ops.config_mac_address) >>> + req->result = kni->ops.config_mac_address( >>> + kni->ops.port_id, req->mac_addr); >>> + else if (kni->ops.port_id != UINT16_MAX) >> >> This won't be enough. rte_kni_alloc() can be called with NULL ops value. For >> that case m_ctx->ops won't be updated. And by default ops will have all >> zeros, >> not sure how to differentiate it from real port_id zero. >> > > I think, I tried to address that in the first patch. > > rte_kni_alloc(struct rte_mempool *pktmbuf_pool, > memset(ctx, 0, sizeof(struct rte_kni)); > if (ops) > memcpy(&ctx->ops, ops, sizeof(struct rte_kni_ops)); > + else > + ctx->ops.port_id = UINT16_MAX; > > Do you still see issue? You are right, this fixes it, I missed this part. So patch lgtm: Series, Acked-by: Ferruh Yigit > > Regards, > Hemant >
Re: [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds
On Mon, Jan 22, 2018 at 08:56:29PM +0530, Pavan Nikhilesh wrote: > From: Bruce Richardson > > Add files to enable compiling for ARM native/cross builds. > This can be tested by doing a cross-compile for armv8-a type using > the linaro gcc toolchain. > > meson arm-build --cross-file aarch64_cross.txt > ninja -C arm-build > > where aarch64_cross.txt contained the following > > [binaries] > c = 'aarch64-linux-gnu-gcc' > cpp = 'aarch64-linux-gnu-cpp' > ar = 'aarch64-linux-gnu-ar' > > [host_machine] > system = 'linux' > cpu_family = 'aarch64' > cpu = 'armv8-a' > endian = 'little' > > Signed-off-by: Bruce Richardson > Signed-off-by: Pavan Nikhilesh > --- Set LGTM. No issues in my cross-compilation testing. I'd appreciate a final Ack from someone more familiar with ARM than me before applying. Thanks, /Bruce
Re: [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds
-Original Message- > Date: Mon, 22 Jan 2018 20:56:29 +0530 > From: Pavan Nikhilesh > To: jerin.ja...@caviumnetworks.com, bruce.richard...@intel.com, > harry.van.haa...@intel.com, herbert.g...@arm.com, hemant.agra...@nxp.com > Cc: dev@dpdk.org, Pavan Nikhilesh > Subject: [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds > X-Mailer: git-send-email 2.14.1 > > From: Bruce Richardson > > Add files to enable compiling for ARM native/cross builds. > This can be tested by doing a cross-compile for armv8-a type using > the linaro gcc toolchain. > > meson arm-build --cross-file aarch64_cross.txt > ninja -C arm-build > > where aarch64_cross.txt contained the following > > [binaries] > c = 'aarch64-linux-gnu-gcc' > cpp = 'aarch64-linux-gnu-cpp' > ar = 'aarch64-linux-gnu-ar' > > [host_machine] > system = 'linux' > cpu_family = 'aarch64' > cpu = 'armv8-a' > endian = 'little' > > Signed-off-by: Bruce Richardson > Signed-off-by: Pavan Nikhilesh Series Acked-by: Jerin Jacob
Re: [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds
On Mon, Jan 22, 2018 at 09:50:04PM +0530, Jerin Jacob wrote: > -Original Message- > > Date: Mon, 22 Jan 2018 20:56:29 +0530 > > From: Pavan Nikhilesh > > To: jerin.ja...@caviumnetworks.com, bruce.richard...@intel.com, > > harry.van.haa...@intel.com, herbert.g...@arm.com, hemant.agra...@nxp.com > > Cc: dev@dpdk.org, Pavan Nikhilesh > > Subject: [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds > > X-Mailer: git-send-email 2.14.1 > > > > From: Bruce Richardson > > > > Add files to enable compiling for ARM native/cross builds. > > This can be tested by doing a cross-compile for armv8-a type using > > the linaro gcc toolchain. > > > > meson arm-build --cross-file aarch64_cross.txt > > ninja -C arm-build > > > > where aarch64_cross.txt contained the following > > > > [binaries] > > c = 'aarch64-linux-gnu-gcc' > > cpp = 'aarch64-linux-gnu-cpp' > > ar = 'aarch64-linux-gnu-ar' > > > > [host_machine] > > system = 'linux' > > cpu_family = 'aarch64' > > cpu = 'armv8-a' > > endian = 'little' > > > > Signed-off-by: Bruce Richardson > > Signed-off-by: Pavan Nikhilesh > > Series Acked-by: Jerin Jacob > Applied to dpdk-next-build. Thanks, /Bruce
