[dpdk-dev] [PATCH v3 16/26] cryptodev: remove AAD length from crypto op
Additional authenticated data (AAD) information was duplicated
in the authentication transform and in the crypto
operation structures.
Since AAD length is not meant to be changed in a same session,
it is removed from the crypto operation structure.
Signed-off-by: Pablo de Lara
Acked-by: Akhil Goyal
---
app/test-crypto-perf/cperf_ops.c | 3 ---
doc/guides/prog_guide/cryptodev_lib.rst | 1 -
doc/guides/rel_notes/release_17_08.rst | 3 +++
drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 6 +++--
drivers/crypto/aesni_gcm/aesni_gcm_pmd_private.h | 2 ++
drivers/crypto/openssl/rte_openssl_pmd.c | 4 ++-
drivers/crypto/openssl/rte_openssl_pmd_private.h | 3 +++
drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 1 +
drivers/crypto/qat/qat_crypto.c | 4 +--
examples/ipsec-secgw/esp.c | 2 --
examples/l2fwd-crypto/main.c | 4 ---
lib/librte_cryptodev/rte_crypto_sym.h| 6 +
test/test/test_cryptodev.c | 10 +++-
test/test/test_cryptodev_perf.c | 31 +---
14 files changed, 39 insertions(+), 41 deletions(-)
diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index 7d5d3f0..15a4b58 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -187,7 +187,6 @@ cperf_set_ops_auth(struct rte_crypto_op **ops,
sym_op->auth.digest.length = options->auth_digest_sz;
sym_op->auth.aad.phys_addr = test_vector->aad.phys_addr;
sym_op->auth.aad.data = test_vector->aad.data;
- sym_op->auth.aad.length = options->auth_aad_sz;
}
@@ -274,7 +273,6 @@ cperf_set_ops_cipher_auth(struct rte_crypto_op **ops,
sym_op->auth.digest.length = options->auth_digest_sz;
sym_op->auth.aad.phys_addr = test_vector->aad.phys_addr;
sym_op->auth.aad.data = test_vector->aad.data;
- sym_op->auth.aad.length = options->auth_aad_sz;
}
if (options->auth_algo == RTE_CRYPTO_AUTH_SNOW3G_UIA2 ||
@@ -335,7 +333,6 @@ cperf_set_ops_aead(struct rte_crypto_op **ops,
sym_op->auth.aad.data = rte_pktmbuf_mtod(bufs_in[i], uint8_t *);
sym_op->auth.aad.phys_addr = rte_pktmbuf_mtophys(bufs_in[i]);
- sym_op->auth.aad.length = options->auth_aad_sz;
/* authentication parameters */
if (options->auth_op == RTE_CRYPTO_AUTH_OP_VERIFY) {
diff --git a/doc/guides/prog_guide/cryptodev_lib.rst
b/doc/guides/prog_guide/cryptodev_lib.rst
index 68890ff..ea8fc00 100644
--- a/doc/guides/prog_guide/cryptodev_lib.rst
+++ b/doc/guides/prog_guide/cryptodev_lib.rst
@@ -553,7 +553,6 @@ chain.
struct {
uint8_t *data;
phys_addr_t phys_addr;
-uint16_t length;
} aad;/**< Additional authentication parameters */
} auth;
}
diff --git a/doc/guides/rel_notes/release_17_08.rst
b/doc/guides/rel_notes/release_17_08.rst
index eabf3dd..e633d73 100644
--- a/doc/guides/rel_notes/release_17_08.rst
+++ b/doc/guides/rel_notes/release_17_08.rst
@@ -163,6 +163,9 @@ API Changes
``rte_crypto_cipher_xform``.
* Added authentication IV parameters (offset and length) in
``rte_crypto_auth_xform``.
+ * Removed Additional Authentication Data (AAD) length from
``rte_crypto_sym_op``.
+ * Changed field size of AAD length in ``rte_crypto_auth_xform``,
+from uint32_t to uint16_t.
ABI Changes
diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
index 414f22b..f6136ba 100644
--- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
+++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
@@ -145,6 +145,8 @@ aesni_gcm_set_session_parameters(struct aesni_gcm_session
*sess,
return -EINVAL;
}
+ sess->aad_length = auth_xform->auth.add_auth_data_length;
+
return 0;
}
@@ -255,7 +257,7 @@ process_gcm_crypto_op(struct rte_crypto_op *op,
aesni_gcm_enc[session->key].init(&session->gdata,
iv_ptr,
sym_op->auth.aad.data,
- (uint64_t)sym_op->auth.aad.length);
+ (uint64_t)session->aad_length);
aesni_gcm_enc[session->key].update(&session->gdata, dst, src,
(uint64_t)part_len);
@@ -293,7 +295,7 @@ process_gcm_crypto_op(struct rte_crypto_op *op,
aesni_gcm_dec[session->key].init(&session->gdata,
iv_ptr,
sym_op->auth.aad.data,
- (uint64_t)sym_op->auth.aad.length);
+ (uint64_t)session-
[dpdk-dev] [PATCH v3 15/26] cryptodev: do not use AAD in wireless algorithms
For wireless algorithms (SNOW3G, KASUMI, ZUC),
the IV for the authentication algorithms (F9, UIA2 and EIA3)
was taken from the AAD parameter, as there was no IV parameter
in the authentication structure.
Now that IV is available for all algorithms, there is need
to keep doing this, so AAD is not used for these algorithms
anymore.
Signed-off-by: Pablo de Lara
Acked-by: Akhil Goyal
---
app/test-crypto-perf/cperf_test_vectors.c | 6 -
drivers/crypto/kasumi/rte_kasumi_pmd.c | 25 +-
drivers/crypto/kasumi/rte_kasumi_pmd_ops.c | 4 +-
drivers/crypto/kasumi/rte_kasumi_pmd_private.h | 3 +-
drivers/crypto/qat/qat_adf/qat_algs.h | 6 +-
drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 6 +-
drivers/crypto/qat/qat_crypto.c| 49 ++-
drivers/crypto/qat/qat_crypto_capabilities.h | 12 +-
drivers/crypto/snow3g/rte_snow3g_pmd.c | 26 +-
drivers/crypto/snow3g/rte_snow3g_pmd_ops.c | 4 +-
drivers/crypto/snow3g/rte_snow3g_pmd_private.h | 3 +-
drivers/crypto/zuc/rte_zuc_pmd.c | 24 +-
drivers/crypto/zuc/rte_zuc_pmd_ops.c | 4 +-
drivers/crypto/zuc/rte_zuc_pmd_private.h | 3 +-
lib/librte_cryptodev/rte_crypto_sym.h | 7 +-
test/test/test_cryptodev.c | 418 -
.../test/test_cryptodev_kasumi_hash_test_vectors.h | 16 +-
test/test/test_cryptodev_kasumi_test_vectors.h | 20 +-
test/test/test_cryptodev_perf.c| 20 +-
.../test/test_cryptodev_snow3g_hash_test_vectors.h | 14 +-
test/test/test_cryptodev_snow3g_test_vectors.h | 24 +-
test/test/test_cryptodev_zuc_test_vectors.h| 38 +-
22 files changed, 322 insertions(+), 410 deletions(-)
diff --git a/app/test-crypto-perf/cperf_test_vectors.c
b/app/test-crypto-perf/cperf_test_vectors.c
index 6829b86..b67d0f4 100644
--- a/app/test-crypto-perf/cperf_test_vectors.c
+++ b/app/test-crypto-perf/cperf_test_vectors.c
@@ -456,12 +456,6 @@ cperf_test_vector_get_dummy(struct cperf_options *options)
t_vec->auth_key.data = NULL;
aad_alloc = 1;
break;
- case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
- case RTE_CRYPTO_AUTH_KASUMI_F9:
- case RTE_CRYPTO_AUTH_ZUC_EIA3:
- t_vec->auth_key.data = auth_key;
- aad_alloc = 1;
- break;
case RTE_CRYPTO_AUTH_AES_GMAC:
/* auth key should be the same as cipher key */
t_vec->auth_key.data = cipher_key;
diff --git a/drivers/crypto/kasumi/rte_kasumi_pmd.c
b/drivers/crypto/kasumi/rte_kasumi_pmd.c
index c92f5d1..3a3ffa4 100644
--- a/drivers/crypto/kasumi/rte_kasumi_pmd.c
+++ b/drivers/crypto/kasumi/rte_kasumi_pmd.c
@@ -117,7 +117,7 @@ kasumi_set_session_parameters(struct kasumi_session *sess,
if (cipher_xform->cipher.algo != RTE_CRYPTO_CIPHER_KASUMI_F8)
return -EINVAL;
- sess->iv_offset = cipher_xform->cipher.iv.offset;
+ sess->cipher_iv_offset = cipher_xform->cipher.iv.offset;
if (cipher_xform->cipher.iv.length != KASUMI_IV_LENGTH) {
KASUMI_LOG_ERR("Wrong IV length");
return -EINVAL;
@@ -133,6 +133,13 @@ kasumi_set_session_parameters(struct kasumi_session *sess,
if (auth_xform->auth.algo != RTE_CRYPTO_AUTH_KASUMI_F9)
return -EINVAL;
sess->auth_op = auth_xform->auth.op;
+
+ sess->auth_iv_offset = auth_xform->auth.iv.offset;
+ if (auth_xform->auth.iv.length != KASUMI_IV_LENGTH) {
+ KASUMI_LOG_ERR("Wrong IV length");
+ return -EINVAL;
+ }
+
/* Initialize key */
sso_kasumi_init_f9_key_sched(auth_xform->auth.key.data,
&sess->pKeySched_hash);
@@ -194,7 +201,7 @@ process_kasumi_cipher_op(struct rte_crypto_op **ops,
rte_pktmbuf_mtod(ops[i]->sym->m_src, uint8_t *) +
(ops[i]->sym->cipher.data.offset >> 3);
iv_ptr = rte_crypto_op_ctod_offset(ops[i], uint8_t *,
- session->iv_offset);
+ session->cipher_iv_offset);
iv[i] = *((uint64_t *)(iv_ptr));
num_bytes[i] = ops[i]->sym->cipher.data.length >> 3;
@@ -227,7 +234,7 @@ process_kasumi_cipher_op_bit(struct rte_crypto_op *op,
}
dst = rte_pktmbuf_mtod(op->sym->m_dst, uint8_t *);
iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
- session->iv_offset);
+ session->cipher_iv_offset);
iv = *((uint64_t *)(iv_ptr));
length_in_bits = op->sym->cipher.data.length;
@@ -
[dpdk-dev] [PATCH v3 17/26] cryptodev: remove digest length from crypto op
Digest length was duplicated in the authentication transform
and the crypto operation structures.
Since digest length is not expected to change in a same
session, it is removed from the crypto operation.
Also, the length has been shrunk to 16 bits,
which should be sufficient for any digest.
Signed-off-by: Pablo de Lara
Acked-by: Akhil Goyal
---
app/test-crypto-perf/cperf_ops.c | 7 ---
doc/guides/prog_guide/cryptodev_lib.rst | 1 -
doc/guides/rel_notes/release_17_08.rst | 3 ++
drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 34 +++---
drivers/crypto/aesni_gcm/aesni_gcm_pmd_private.h | 2 +
drivers/crypto/armv8/rte_armv8_pmd.c | 9 ++--
drivers/crypto/armv8/rte_armv8_pmd_private.h | 2 +
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 34 +++---
drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h| 1 +
drivers/crypto/kasumi/rte_kasumi_pmd.c | 18
drivers/crypto/openssl/rte_openssl_pmd.c | 7 +--
drivers/crypto/openssl/rte_openssl_pmd_private.h | 2 +
drivers/crypto/qat/qat_adf/qat_algs.h| 1 +
drivers/crypto/qat/qat_crypto.c | 3 +-
drivers/crypto/snow3g/rte_snow3g_pmd.c | 18
drivers/crypto/zuc/rte_zuc_pmd.c | 18
examples/ipsec-secgw/esp.c | 2 -
examples/l2fwd-crypto/main.c | 1 -
lib/librte_cryptodev/rte_crypto_sym.h| 6 +--
test/test/test_cryptodev.c | 34 +-
test/test/test_cryptodev_blockcipher.c | 5 +--
test/test/test_cryptodev_perf.c | 56
22 files changed, 119 insertions(+), 145 deletions(-)
diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index 15a4b58..bc74371 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -161,7 +161,6 @@ cperf_set_ops_auth(struct rte_crypto_op **ops,
sym_op->auth.digest.data = test_vector->digest.data;
sym_op->auth.digest.phys_addr =
test_vector->digest.phys_addr;
- sym_op->auth.digest.length = options->auth_digest_sz;
} else {
uint32_t offset = options->test_buffer_size;
@@ -184,7 +183,6 @@ cperf_set_ops_auth(struct rte_crypto_op **ops,
uint8_t *, offset);
sym_op->auth.digest.phys_addr =
rte_pktmbuf_mtophys_offset(buf, offset);
- sym_op->auth.digest.length = options->auth_digest_sz;
sym_op->auth.aad.phys_addr = test_vector->aad.phys_addr;
sym_op->auth.aad.data = test_vector->aad.data;
@@ -247,7 +245,6 @@ cperf_set_ops_cipher_auth(struct rte_crypto_op **ops,
sym_op->auth.digest.data = test_vector->digest.data;
sym_op->auth.digest.phys_addr =
test_vector->digest.phys_addr;
- sym_op->auth.digest.length = options->auth_digest_sz;
} else {
uint32_t offset = options->test_buffer_size;
@@ -270,7 +267,6 @@ cperf_set_ops_cipher_auth(struct rte_crypto_op **ops,
uint8_t *, offset);
sym_op->auth.digest.phys_addr =
rte_pktmbuf_mtophys_offset(buf, offset);
- sym_op->auth.digest.length = options->auth_digest_sz;
sym_op->auth.aad.phys_addr = test_vector->aad.phys_addr;
sym_op->auth.aad.data = test_vector->aad.data;
}
@@ -339,7 +335,6 @@ cperf_set_ops_aead(struct rte_crypto_op **ops,
sym_op->auth.digest.data = test_vector->digest.data;
sym_op->auth.digest.phys_addr =
test_vector->digest.phys_addr;
- sym_op->auth.digest.length = options->auth_digest_sz;
} else {
uint32_t offset = sym_op->cipher.data.length +
@@ -363,8 +358,6 @@ cperf_set_ops_aead(struct rte_crypto_op **ops,
uint8_t *, offset);
sym_op->auth.digest.phys_addr =
rte_pktmbuf_mtophys_offset(buf, offset);
-
- sym_op->auth.digest.length = options->auth_digest_sz;
}
sym_op->auth.data.length = options->test_buffer_size;
diff --git a/doc/guides/prog_guide/cryptodev_lib.rst
b/doc/guides/prog_guide/cryptodev_lib.rst
index ea8fc00..e036611 100644
--- a/doc/guides/prog_guide/cryptodev_lib.rst
+++ b/doc/guides/prog_guide/cryptodev_lib.rst
@@ -547,7 +547,6 @@ chain.
s
[dpdk-dev] [PATCH v3 18/26] cryptodev: set AES-GMAC as auth-only algo
AES-GMAC is an authentication algorithm, based on AES-GCM
without encryption. To simplify its usage, now it can be used
setting the authentication parameters, without requiring
to concatenate a ciphering transform.
Therefore, it is not required to set AAD, but authentication
data length and offset, giving the user the option
to have Scatter-Gather List in the input buffer,
as long as the driver supports it.
Signed-off-by: Pablo de Lara
Acked-by: Akhil Goyal
---
app/test-crypto-perf/cperf_options_parsing.c | 3 +-
app/test-crypto-perf/cperf_test_vectors.c| 5 -
drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 169 ---
drivers/crypto/aesni_gcm/aesni_gcm_pmd_ops.c | 12 +-
drivers/crypto/aesni_gcm/aesni_gcm_pmd_private.h | 4 +-
drivers/crypto/openssl/rte_openssl_pmd.c | 52 +--
drivers/crypto/openssl/rte_openssl_pmd_ops.c | 9 +-
drivers/crypto/qat/qat_crypto.c | 151 ++--
drivers/crypto/qat/qat_crypto_capabilities.h | 11 +-
lib/librte_cryptodev/rte_crypto_sym.h| 39 +-
test/test/test_cryptodev.c | 159 ++---
test/test/test_cryptodev_gcm_test_vectors.h | 29 +---
12 files changed, 374 insertions(+), 269 deletions(-)
diff --git a/app/test-crypto-perf/cperf_options_parsing.c
b/app/test-crypto-perf/cperf_options_parsing.c
index 70b6a60..5c2dcff 100644
--- a/app/test-crypto-perf/cperf_options_parsing.c
+++ b/app/test-crypto-perf/cperf_options_parsing.c
@@ -820,8 +820,7 @@ cperf_options_check(struct cperf_options *options)
if (options->cipher_algo == RTE_CRYPTO_CIPHER_AES_GCM ||
options->cipher_algo == RTE_CRYPTO_CIPHER_AES_CCM ||
options->auth_algo == RTE_CRYPTO_AUTH_AES_GCM ||
- options->auth_algo == RTE_CRYPTO_AUTH_AES_CCM ||
- options->auth_algo == RTE_CRYPTO_AUTH_AES_GMAC) {
+ options->auth_algo == RTE_CRYPTO_AUTH_AES_CCM) {
if (options->op_type != CPERF_AEAD) {
RTE_LOG(ERR, USER1, "Use --optype aead\n");
return -EINVAL;
diff --git a/app/test-crypto-perf/cperf_test_vectors.c
b/app/test-crypto-perf/cperf_test_vectors.c
index b67d0f4..2e5339c 100644
--- a/app/test-crypto-perf/cperf_test_vectors.c
+++ b/app/test-crypto-perf/cperf_test_vectors.c
@@ -456,11 +456,6 @@ cperf_test_vector_get_dummy(struct cperf_options *options)
t_vec->auth_key.data = NULL;
aad_alloc = 1;
break;
- case RTE_CRYPTO_AUTH_AES_GMAC:
- /* auth key should be the same as cipher key */
- t_vec->auth_key.data = cipher_key;
- aad_alloc = 1;
- break;
default:
t_vec->auth_key.data = auth_key;
aad_alloc = 0;
diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
index fcf0f8b..36372a6 100644
--- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
+++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
@@ -79,35 +79,74 @@ aesni_gcm_set_session_parameters(struct aesni_gcm_session
*sess,
const struct rte_crypto_sym_xform *auth_xform;
const struct rte_crypto_sym_xform *cipher_xform;
uint16_t digest_length;
+ uint8_t key_length;
+ uint8_t *key;
- if (xform->next == NULL || xform->next->next != NULL) {
- GCM_LOG_ERR("Two and only two chained xform required");
- return -EINVAL;
- }
-
- if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
- xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
- auth_xform = xform->next;
- cipher_xform = xform;
- } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
- xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
+ /* AES-GMAC */
+ if (xform->next == NULL) {
auth_xform = xform;
- cipher_xform = xform->next;
+ if (auth_xform->auth.algo != RTE_CRYPTO_AUTH_AES_GMAC) {
+ GCM_LOG_ERR("Only AES GMAC is supported as an "
+ "authentication only algorithm");
+ return -EINVAL;
+ }
+ /* Set IV parameters */
+ sess->iv.offset = auth_xform->auth.iv.offset;
+ sess->iv.length = auth_xform->auth.iv.length;
+
+ /* Select Crypto operation */
+ if (auth_xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE)
+ sess->op = AESNI_GMAC_OP_GENERATE;
+ else
+ sess->op = AESNI_GMAC_OP_VERIFY;
+
+ key_length = auth_xform->auth.key.length;
+ key = auth_xform->auth.key.data;
+ /* AE
[dpdk-dev] [PATCH v3 21/26] examples/l2fwd-crypto: avoid too many tabs
Some extra functions have been created to avoid
too many nested conditionals.
Signed-off-by: Pablo de Lara
Acked-by: Akhil Goyal
---
examples/l2fwd-crypto/main.c | 125 ++-
1 file changed, 77 insertions(+), 48 deletions(-)
diff --git a/examples/l2fwd-crypto/main.c b/examples/l2fwd-crypto/main.c
index 6d88937..fb829e3 100644
--- a/examples/l2fwd-crypto/main.c
+++ b/examples/l2fwd-crypto/main.c
@@ -1556,7 +1556,8 @@ check_all_ports_link_status(uint8_t port_num, uint32_t
port_mask)
/* Check if device has to be HW/SW or any */
static int
-check_type(struct l2fwd_crypto_options *options, struct rte_cryptodev_info
*dev_info)
+check_type(const struct l2fwd_crypto_options *options,
+ const struct rte_cryptodev_info *dev_info)
{
if (options->type == CDEV_TYPE_HW &&
(dev_info->feature_flags &
RTE_CRYPTODEV_FF_HW_ACCELERATED))
@@ -1570,6 +1571,74 @@ check_type(struct l2fwd_crypto_options *options, struct
rte_cryptodev_info *dev_
return -1;
}
+static const struct rte_cryptodev_capabilities *
+check_device_support_cipher_algo(const struct l2fwd_crypto_options *options,
+ const struct rte_cryptodev_info *dev_info,
+ uint8_t cdev_id)
+{
+ unsigned int i = 0;
+ const struct rte_cryptodev_capabilities *cap =
&dev_info->capabilities[0];
+ enum rte_crypto_cipher_algorithm cap_cipher_algo;
+ enum rte_crypto_cipher_algorithm opt_cipher_algo =
+ options->cipher_xform.cipher.algo;
+
+ while (cap->op != RTE_CRYPTO_OP_TYPE_UNDEFINED) {
+ cap_cipher_algo = cap->sym.cipher.algo;
+ if (cap->sym.xform_type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
+ if (cap_cipher_algo == opt_cipher_algo) {
+ if (check_type(options, dev_info) == 0)
+ break;
+ }
+ }
+ cap = &dev_info->capabilities[++i];
+ }
+
+ if (cap->op == RTE_CRYPTO_OP_TYPE_UNDEFINED) {
+ printf("Algorithm %s not supported by cryptodev %u"
+ " or device not of preferred type (%s)\n",
+ rte_crypto_cipher_algorithm_strings[opt_cipher_algo],
+ cdev_id,
+ options->string_type);
+ return NULL;
+ }
+
+ return cap;
+}
+
+static const struct rte_cryptodev_capabilities *
+check_device_support_auth_algo(const struct l2fwd_crypto_options *options,
+ const struct rte_cryptodev_info *dev_info,
+ uint8_t cdev_id)
+{
+ unsigned int i = 0;
+ const struct rte_cryptodev_capabilities *cap =
&dev_info->capabilities[0];
+ enum rte_crypto_auth_algorithm cap_auth_algo;
+ enum rte_crypto_auth_algorithm opt_auth_algo =
+ options->auth_xform.auth.algo;
+
+ while (cap->op != RTE_CRYPTO_OP_TYPE_UNDEFINED) {
+ cap_auth_algo = cap->sym.auth.algo;
+ if (cap->sym.xform_type == RTE_CRYPTO_SYM_XFORM_AUTH) {
+ if (cap_auth_algo == opt_auth_algo) {
+ if (check_type(options, dev_info) == 0)
+ break;
+ }
+ }
+ cap = &dev_info->capabilities[++i];
+ }
+
+ if (cap->op == RTE_CRYPTO_OP_TYPE_UNDEFINED) {
+ printf("Algorithm %s not supported by cryptodev %u"
+ " or device not of preferred type (%s)\n",
+ rte_crypto_auth_algorithm_strings[opt_auth_algo],
+ cdev_id,
+ options->string_type);
+ return NULL;
+ }
+
+ return cap;
+}
+
/* Check if the device is enabled by cryptodev_mask */
static int
check_cryptodev_mask(struct l2fwd_crypto_options *options,
@@ -1647,12 +1716,8 @@ static int
initialize_cryptodevs(struct l2fwd_crypto_options *options, unsigned nb_ports,
uint8_t *enabled_cdevs)
{
- unsigned i, cdev_id, cdev_count, enabled_cdev_count = 0;
+ unsigned int cdev_id, cdev_count, enabled_cdev_count = 0;
const struct rte_cryptodev_capabilities *cap;
- enum rte_crypto_auth_algorithm cap_auth_algo;
- enum rte_crypto_auth_algorithm opt_auth_algo;
- enum rte_crypto_cipher_algorithm cap_cipher_algo;
- enum rte_crypto_cipher_algorithm opt_cipher_algo;
int retval;
cdev_count = rte_cryptodev_count();
@@ -1685,29 +1750,10 @@ initialize_cryptodevs(struct l2fwd_crypto_options
*options, unsigned nb_ports,
options->xform_chain ==
L2FWD_CRYPTO_HASH_CIPHER ||
options->xform_chain ==
L2FWD_CRYPTO_CIPHER_ONLY) {
/* Check if device supports cipher algo */
-
[dpdk-dev] [PATCH v3 19/26] cryptodev: add AEAD specific data
AEAD algorithms such as AES-GCM needed to be
used as a concatenation of a cipher transform and
an authentication transform.
Instead, a new transform and functions to handle it
are created to support these kind of algorithms,
making their use easier.
Signed-off-by: Pablo de Lara
Acked-by: Akhil Goyal
---
doc/guides/prog_guide/cryptodev_lib.rst | 14 +++--
doc/guides/prog_guide/img/crypto_xform_chain.svg | 8 ++-
doc/guides/rel_notes/release_17_08.rst | 6 ++
lib/librte_cryptodev/rte_crypto_sym.h| 80 +++-
lib/librte_cryptodev/rte_cryptodev.c | 61 ++
lib/librte_cryptodev/rte_cryptodev.h | 52 ++-
lib/librte_cryptodev/rte_cryptodev_version.map | 4 ++
7 files changed, 215 insertions(+), 10 deletions(-)
diff --git a/doc/guides/prog_guide/cryptodev_lib.rst
b/doc/guides/prog_guide/cryptodev_lib.rst
index e036611..b888554 100644
--- a/doc/guides/prog_guide/cryptodev_lib.rst
+++ b/doc/guides/prog_guide/cryptodev_lib.rst
@@ -188,8 +188,9 @@ the device having hardware acceleration or supporting
symmetric Crypto
operations,
The capabilities mechanism defines the individual algorithms/functions which
-the device supports, such as a specific symmetric Crypto cipher or
-authentication operation.
+the device supports, such as a specific symmetric Crypto cipher,
+authentication operation or Authenticated Encryption with Associated Data
+(AEAD) operation.
Device Features
@@ -477,9 +478,8 @@ operations such as cipher encrypt and authentication
generate, the next pointer
allows transform to be chained together. Crypto devices which support chaining
must publish the chaining of symmetric Crypto operations feature flag.
-Currently there are two transforms types cipher and authentication, to specify
-an AEAD operation it is required to chain a cipher and an authentication
-transform together. Also it is important to note that the order in which the
+Currently there are three transforms types cipher, authentication and AEAD.
+Also it is important to note that the order in which the
transforms are passed indicates the order of the chaining.
.. code-block:: c
@@ -494,6 +494,8 @@ transforms are passed indicates the order of the chaining.
/**< Authentication / hash xform */
struct rte_crypto_cipher_xform cipher;
/**< Cipher xform */
+struct rte_crypto_aead_xform aead;
+/**< AEAD xform */
};
};
@@ -514,7 +516,7 @@ operations.
As a minimum the symmetric operation must have a source data buffer
(``m_src``),
a valid session (or transform chain if in session-less mode) and the minimum
-authentication/ cipher parameters required depending on the type of operation
+authentication/ cipher/ AEAD parameters required depending on the type of
operation
specified in the session or the transform
chain.
diff --git a/doc/guides/prog_guide/img/crypto_xform_chain.svg
b/doc/guides/prog_guide/img/crypto_xform_chain.svg
index 4670a07..1368163 100644
--- a/doc/guides/prog_guide/img/crypto_xform_chain.svg
+++ b/doc/guides/prog_guide/img/crypto_xform_chain.svg
@@ -69,7 +69,9 @@
class="st3">auth_xform struct
rte_crypto_cipher_xform
+ class="st3">xformstruct rte_crypto_aead_xform
Rounded Rectangle.26
next transform (struct rte_crypto_sym_xform
*)
@@ -116,7 +118,9 @@
class="st3">auth_xform struct
rte_crypto_cipher_xform
+ class="st3">xformstruct rte_crypto_aead_xform
Rounded Rectangle.32
next transform (struct rte_crypto_sym_xform
*)
diff --git a/doc/guides/rel_notes/release_17_08.rst
b/doc/guides/rel_notes/release_17_08.rst
index a544639..b920142 100644
--- a/doc/guides/rel_notes/release_17_08.rst
+++ b/doc/guides/rel_notes/release_17_08.rst
@@ -75,6 +75,12 @@ New Features
Added support for firmwares with multiple Ethernet ports per physical port.
+* **Updated cryptodev library.**
+
+ Added AEAD algorithm specific functions and structures, so it is not
+ necessary to use a combination of cipher and authentication
+ structures anymore.
+
Resolved Issues
---
diff --git a/lib/librte_cryptodev/rte_crypto_sym.h
b/lib/librte_cryptodev/rte_crypto_sym.h
index f174e12..db3957e 100644
--- a/lib/librte_cryptodev/rte_crypto_sym.h
+++ b/lib/librte_cryptodev/rte_crypto_sym.h
@@ -404,11 +404,87 @@ struct rte_crypto_auth_xform {
} iv; /**< Initialisation vector parameters */
};
+
+/** Symmetric AEAD Algorithms */
+enum rte_crypto_aead_algorithm {
+ RTE_CRYPTO_AEAD_AES_CCM = 1,
+ /**< AES algorithm in CCM mode. */
+ RTE_CRY
[dpdk-dev] [PATCH v3 23/26] examples/ipsec-secgw: add AEAD parameters
Since there is a new operation type (AEAD), add parameters
for this in the application.
Signed-off-by: Pablo de Lara
Acked-by: Akhil Goyal
---
doc/guides/sample_app_ug/ipsec_secgw.rst | 32 +++--
examples/ipsec-secgw/ipsec.h | 1 +
examples/ipsec-secgw/sa.c| 116 +--
3 files changed, 139 insertions(+), 10 deletions(-)
diff --git a/doc/guides/sample_app_ug/ipsec_secgw.rst
b/doc/guides/sample_app_ug/ipsec_secgw.rst
index 885c77e..ca2a34d 100644
--- a/doc/guides/sample_app_ug/ipsec_secgw.rst
+++ b/doc/guides/sample_app_ug/ipsec_secgw.rst
@@ -412,7 +412,7 @@ where each options means:
* Cipher algorithm
- * Optional: No
+ * Optional: Yes, unless is not used
* Available options:
@@ -427,7 +427,8 @@ where each options means:
* Cipher key, NOT available when 'null' algorithm is used
- * Optional: No, must followed by option
+ * Optional: Yes, unless is not used.
+ Must be followed by option
* Syntax: Hexadecimal bytes (0x0-0xFF) concatenate by colon symbol ':'.
The number of bytes should be as same as the specified cipher algorithm
@@ -440,7 +441,7 @@ where each options means:
* Authentication algorithm
- * Optional: No
+ * Optional: Yes, unless is not used
* Available options:
@@ -453,7 +454,8 @@ where each options means:
* Authentication key, NOT available when 'null' or 'aes-128-gcm' algorithm
is used.
- * Optional: No, must followed by option
+ * Optional: Yes, unless is not used.
+ Must be followed by option
* Syntax: Hexadecimal bytes (0x0-0xFF) concatenate by colon symbol ':'.
The number of bytes should be as same as the specified authentication
@@ -462,6 +464,28 @@ where each options means:
For example: *auth_key A1:B2:C3:D4:A1:B2:C3:D4:A1:B2:C3:D4:A1:B2:C3:D4:
A1:B2:C3:D4*
+
+
+ * AEAD algorithm
+
+ * Optional: Yes, unless and are not used
+
+ * Syntax: *cipher_algo *
+
+
+
+ * Cipher key, NOT available when 'null' algorithm is used
+
+ * Optional: Yes, unless and are not used.
+ Must be followed by option
+
+ * Syntax: Hexadecimal bytes (0x0-0xFF) concatenate by colon symbol ':'.
+ The number of bytes should be as same as the specified AEAD algorithm
+ key size.
+
+ For example: *aead_key A1:B2:C3:D4:A1:B2:C3:D4:A1:B2:C3:D4:
+ A1:B2:C3:D4*
+
* The operation mode
diff --git a/examples/ipsec-secgw/ipsec.h b/examples/ipsec-secgw/ipsec.h
index 405cf3d..f8569ca 100644
--- a/examples/ipsec-secgw/ipsec.h
+++ b/examples/ipsec-secgw/ipsec.h
@@ -103,6 +103,7 @@ struct ipsec_sa {
struct rte_cryptodev_sym_session *crypto_session;
enum rte_crypto_cipher_algorithm cipher_algo;
enum rte_crypto_auth_algorithm auth_algo;
+ enum rte_crypto_aead_algorithm aead_algo;
uint16_t digest_len;
uint16_t iv_len;
uint16_t block_size;
diff --git a/examples/ipsec-secgw/sa.c b/examples/ipsec-secgw/sa.c
index 85e4d4e..9d80bd3 100644
--- a/examples/ipsec-secgw/sa.c
+++ b/examples/ipsec-secgw/sa.c
@@ -68,6 +68,17 @@ struct supported_auth_algo {
uint8_t key_not_req;
};
+struct supported_aead_algo {
+ const char *keyword;
+ enum rte_crypto_aead_algorithm algo;
+ uint16_t iv_len;
+ uint16_t block_size;
+ uint16_t digest_len;
+ uint16_t key_len;
+ uint8_t aad_len;
+};
+
+
const struct supported_cipher_algo cipher_algos[] = {
{
.keyword = "null",
@@ -128,6 +139,8 @@ const struct supported_auth_algo auth_algos[] = {
}
};
+const struct supported_aead_algo aead_algos[] = { { } };
+
struct ipsec_sa sa_out[IPSEC_SA_MAX_ENTRIES];
uint32_t nb_sa_out;
@@ -166,6 +179,22 @@ find_match_auth_algo(const char *auth_keyword)
return NULL;
}
+static const struct supported_aead_algo *
+find_match_aead_algo(const char *aead_keyword)
+{
+ size_t i;
+
+ for (i = 0; i < RTE_DIM(aead_algos); i++) {
+ const struct supported_aead_algo *algo =
+ &aead_algos[i];
+
+ if (strcmp(aead_keyword, algo->keyword) == 0)
+ return algo;
+ }
+
+ return NULL;
+}
+
/** parse_key_string
* parse x:x:x:x hex number key string into uint8_t *key
* return:
@@ -210,6 +239,7 @@ parse_sa_tokens(char **tokens, uint32_t n_tokens,
uint32_t *ri /*rule index*/;
uint32_t cipher_algo_p = 0;
uint32_t auth_algo_p = 0;
+ uint32_t aead_algo_p = 0;
uint32_t src_p = 0;
uint32_t dst_p = 0;
uint32_t mode_p = 0;
@@ -386,6 +416,61 @@ parse_sa_tokens(char **tokens, uint32_t n_tokens,
continue;
}
+ if (strcmp(tokens[ti], "aead_algo") == 0) {
+ const struct supported_aead_algo *algo;
+ uint32_t key_len;
+
+ APP_CHECK_PRESENCE(aead_algo_p, tokens[ti],
+ status);
+
[dpdk-dev] [PATCH v3 20/26] cryptodev: add AEAD parameters in crypto operation
AEAD operation parameters can be set in the new
aead structure, in the crypto operation.
This structure is within a union with the cipher
and authentication parameters, since operations can be:
- AEAD: using the aead structure
- Cipher only: using only the cipher structure
- Auth only: using only the authentication structure
- Cipher-then-auth/Auth-then-cipher: using both cipher
and authentication structures
Therefore, all three cannot be used at the same time.
Signed-off-by: Pablo de Lara
Acked-by: Akhil Goyal
---
doc/guides/prog_guide/cryptodev_lib.rst | 70 +++---
doc/guides/rel_notes/release_17_08.rst | 1 +
lib/librte_cryptodev/rte_crypto_sym.h | 375
3 files changed, 279 insertions(+), 167 deletions(-)
diff --git a/doc/guides/prog_guide/cryptodev_lib.rst
b/doc/guides/prog_guide/cryptodev_lib.rst
index b888554..5048839 100644
--- a/doc/guides/prog_guide/cryptodev_lib.rst
+++ b/doc/guides/prog_guide/cryptodev_lib.rst
@@ -431,7 +431,6 @@ operations, as well as also supporting AEAD operations.
Session and Session Management
-~~
Session are used in symmetric cryptographic processing to store the immutable
data defined in a cryptographic transform which is used in the operation
@@ -465,9 +464,6 @@ operation and its parameters. See the section below for
details on transforms.
struct rte_cryptodev_sym_session * rte_cryptodev_sym_session_create(
uint8_t dev_id, struct rte_crypto_sym_xform *xform);
-**Note**: For AEAD operations the algorithm selected for authentication and
-ciphering must aligned, eg AES_GCM.
-
Transforms and Transform Chaining
~
@@ -533,30 +529,54 @@ chain.
/**< Session-less API Crypto operation parameters */
};
-struct {
-struct {
-uint32_t offset;
-uint32_t length;
-} data; /**< Data offsets and length for ciphering */
-} cipher;
-
-struct {
-struct {
-uint32_t offset;
-uint32_t length;
-} data; /**< Data offsets and length for authentication */
-
+union {
struct {
-uint8_t *data;
-phys_addr_t phys_addr;
-} digest; /**< Digest parameters */
+struct {
+uint32_t offset;
+uint32_t length;
+} data; /**< Data offsets and length for AEAD */
+
+struct {
+uint8_t *data;
+phys_addr_t phys_addr;
+} digest; /**< Digest parameters */
+
+struct {
+uint8_t *data;
+phys_addr_t phys_addr;
+} aad;
+/**< Additional authentication parameters */
+} aead;
struct {
-uint8_t *data;
-phys_addr_t phys_addr;
-} aad;/**< Additional authentication parameters */
-} auth;
-}
+struct {
+struct {
+uint32_t offset;
+uint32_t length;
+} data; /**< Data offsets and length for ciphering */
+} cipher;
+
+struct {
+struct {
+uint32_t offset;
+uint32_t length;
+} data;
+/**< Data offsets and length for authentication */
+
+struct {
+uint8_t *data;
+phys_addr_t phys_addr;
+} digest; /**< Digest parameters */
+
+struct {
+uint8_t *data;
+phys_addr_t phys_addr;
+} aad;
+/**< Additional authentication parameters */
+} auth;
+};
+};
+};
Asymmetric Cryptography
diff --git a/doc/guides/rel_notes/release_17_08.rst
b/doc/guides/rel_notes/release_17_08.rst
index b920142..2c6bef5 100644
--- a/doc/guides/rel_notes/release_17_08.rst
+++ b/doc/guides/rel_notes/release_17_08.rst
@@ -175,6 +175,7 @@ API Changes
* Removed digest length from ``rte_crypto_sym_op``.
* Changed field size of digest length in ``rte_crypto_auth_xform``,
from uint32_t to uint16_t.
+ * Added AEAD structure in ``rte_crypto_sym_op``.
ABI Changes
diff --git a/lib/librte_cryptodev/rte_crypto_sym.h
b/lib/librte_cryptodev/rte_crypto_sym.h
index db3957e..f03d2fd 100644
--- a/lib/librte_cryptodev/rte_crypto_sym.h
+++ b/lib/librte_cryptodev/rte_crypto_sym.h
@@ -556,151 +556,242 @@ struct rte_crypto_sym_op {
/**< Session-less API crypto operation parameters */
};
- struct {
- struct {
- uint32_t offset;
-/**< Starting
[dpdk-dev] [PATCH v3 24/26] examples/l2fwd-crypto: add AEAD parameters
Since there is a new operation type (AEAD), add parameters
for this in the application.
Signed-off-by: Pablo de Lara
Acked-by: Akhil Goyal
---
doc/guides/sample_app_ug/l2_forward_crypto.rst | 24 +-
examples/l2fwd-crypto/main.c | 388 +
2 files changed, 357 insertions(+), 55 deletions(-)
diff --git a/doc/guides/sample_app_ug/l2_forward_crypto.rst
b/doc/guides/sample_app_ug/l2_forward_crypto.rst
index b9aa573..2880c43 100644
--- a/doc/guides/sample_app_ug/l2_forward_crypto.rst
+++ b/doc/guides/sample_app_ug/l2_forward_crypto.rst
@@ -110,7 +110,9 @@ where,
* chain: select the operation chaining to perform: Cipher->Hash
(CIPHER_HASH),
-Hash->Cipher (HASH_CIPHER), Cipher (CIPHER_ONLY), Hash(HASH_ONLY)
+Hash->Cipher (HASH_CIPHER), Cipher (CIPHER_ONLY), Hash (HASH_ONLY)
+
+or AEAD (AEAD)
(default is Cipher->Hash)
@@ -154,6 +156,26 @@ where,
Note that if --auth_iv is used, this will be ignored.
+* aead_algo: select the AEAD algorithm
+
+* aead_op: select the AEAD operation to perform: ENCRYPT or DECRYPT
+
+(default is ENCRYPT)
+
+* aead_key: set the AEAD key to be used. Bytes has to be separated with ":"
+
+* aead_key_random_size: set the size of the AEAD key,
+
+which will be generated randomly.
+
+Note that if --aead_key is used, this will be ignored.
+
+* aead_iv: set the AEAD IV to be used. Bytes has to be separated with ":"
+
+* aead_iv_random_size: set the size of the AEAD IV, which will be generated
randomly.
+
+Note that if --aead_iv is used, this will be ignored.
+
* aad: set the AAD to be used. Bytes has to be separated with ":"
* aad_random_size: set the size of the AAD, which will be generated randomly.
diff --git a/examples/l2fwd-crypto/main.c b/examples/l2fwd-crypto/main.c
index fb829e3..914f8ed 100644
--- a/examples/l2fwd-crypto/main.c
+++ b/examples/l2fwd-crypto/main.c
@@ -130,7 +130,8 @@ enum l2fwd_crypto_xform_chain {
L2FWD_CRYPTO_CIPHER_HASH,
L2FWD_CRYPTO_HASH_CIPHER,
L2FWD_CRYPTO_CIPHER_ONLY,
- L2FWD_CRYPTO_HASH_ONLY
+ L2FWD_CRYPTO_HASH_ONLY,
+ L2FWD_CRYPTO_AEAD
};
struct l2fwd_key {
@@ -172,6 +173,14 @@ struct l2fwd_crypto_options {
unsigned int auth_iv_param;
int auth_iv_random_size;
+ struct rte_crypto_sym_xform aead_xform;
+ unsigned int aead_key_param;
+ int aead_key_random_size;
+
+ struct l2fwd_iv aead_iv;
+ unsigned int aead_iv_param;
+ int aead_iv_random_size;
+
struct l2fwd_key aad;
unsigned aad_param;
int aad_random_size;
@@ -194,15 +203,18 @@ struct l2fwd_crypto_params {
struct l2fwd_iv cipher_iv;
struct l2fwd_iv auth_iv;
+ struct l2fwd_iv aead_iv;
struct l2fwd_key aad;
struct rte_cryptodev_sym_session *session;
uint8_t do_cipher;
uint8_t do_hash;
+ uint8_t do_aead;
uint8_t hash_verify;
enum rte_crypto_cipher_algorithm cipher_algo;
enum rte_crypto_auth_algorithm auth_algo;
+ enum rte_crypto_aead_algorithm aead_algo;
};
/** lcore configuration */
@@ -492,14 +504,6 @@ l2fwd_simple_crypto_enqueue(struct rte_mbuf *m,
op->sym->auth.data.offset = ipdata_offset;
op->sym->auth.data.length = data_len;
}
-
- if (cparams->aad.length) {
- op->sym->auth.aad.data = cparams->aad.data;
- op->sym->auth.aad.phys_addr = cparams->aad.phys_addr;
- } else {
- op->sym->auth.aad.data = NULL;
- op->sym->auth.aad.phys_addr = 0;
- }
}
if (cparams->do_cipher) {
@@ -521,6 +525,33 @@ l2fwd_simple_crypto_enqueue(struct rte_mbuf *m,
}
}
+ if (cparams->do_aead) {
+ uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
+ IV_OFFSET);
+ /* Copy IV at the end of the crypto operation */
+ rte_memcpy(iv_ptr, cparams->aead_iv.data,
cparams->aead_iv.length);
+
+ op->sym->aead.data.offset = ipdata_offset;
+ op->sym->aead.data.length = data_len;
+
+ if (!cparams->hash_verify) {
+ /* Append space for digest to end of packet */
+ op->sym->aead.digest.data = (uint8_t
*)rte_pktmbuf_append(m,
+ cparams->digest_length);
+ } else {
+ op->sym->aead.digest.data = rte_pktmbuf_mtod(m,
+ uint8_t *) + ipdata_offset + data_len;
+ }
+
+ op->sym->auth.digest.phys_addr = rte_pktmbuf_mtophys_offset(m,
+ rte_pktmbuf_pkt_len(m) -
cparams->digest_length);
+
+ if (cparams->aad.length) {
+ op-
[dpdk-dev] [PATCH v3 22/26] app/test-crypto-perf: add AEAD parameters
Since there is a new operation type (AEAD), add parameters
for this in the application.
Signed-off-by: Pablo de Lara
Acked-by: Akhil Goyal
---
app/test-crypto-perf/cperf_ops.c | 138 ++-
app/test-crypto-perf/cperf_options.h | 22 +++-
app/test-crypto-perf/cperf_options_parsing.c | 138 ---
app/test-crypto-perf/cperf_test_latency.c| 8 +-
app/test-crypto-perf/cperf_test_throughput.c | 8 +-
app/test-crypto-perf/cperf_test_vector_parsing.c | 12 +-
app/test-crypto-perf/cperf_test_vectors.c| 106 ++---
app/test-crypto-perf/cperf_test_vectors.h| 12 ++
app/test-crypto-perf/cperf_test_verify.c | 10 +-
app/test-crypto-perf/main.c | 42 +--
doc/guides/tools/cryptoperf.rst | 32 +-
11 files changed, 330 insertions(+), 198 deletions(-)
diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index bc74371..a63fd83 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -183,8 +183,6 @@ cperf_set_ops_auth(struct rte_crypto_op **ops,
uint8_t *, offset);
sym_op->auth.digest.phys_addr =
rte_pktmbuf_mtophys_offset(buf, offset);
- sym_op->auth.aad.phys_addr = test_vector->aad.phys_addr;
- sym_op->auth.aad.data = test_vector->aad.data;
}
@@ -267,8 +265,6 @@ cperf_set_ops_cipher_auth(struct rte_crypto_op **ops,
uint8_t *, offset);
sym_op->auth.digest.phys_addr =
rte_pktmbuf_mtophys_offset(buf, offset);
- sym_op->auth.aad.phys_addr = test_vector->aad.phys_addr;
- sym_op->auth.aad.data = test_vector->aad.data;
}
if (options->auth_algo == RTE_CRYPTO_AUTH_SNOW3G_UIA2 ||
@@ -322,23 +318,22 @@ cperf_set_ops_aead(struct rte_crypto_op **ops,
sym_op->m_src = bufs_in[i];
sym_op->m_dst = bufs_out[i];
- /* cipher parameters */
- sym_op->cipher.data.length = options->test_buffer_size;
- sym_op->cipher.data.offset =
- RTE_ALIGN_CEIL(options->auth_aad_sz, 16);
+ /* AEAD parameters */
+ sym_op->aead.data.length = options->test_buffer_size;
+ sym_op->aead.data.offset =
+ RTE_ALIGN_CEIL(options->aead_aad_sz, 16);
- sym_op->auth.aad.data = rte_pktmbuf_mtod(bufs_in[i], uint8_t *);
- sym_op->auth.aad.phys_addr = rte_pktmbuf_mtophys(bufs_in[i]);
+ sym_op->aead.aad.data = rte_pktmbuf_mtod(bufs_in[i], uint8_t *);
+ sym_op->aead.aad.phys_addr = rte_pktmbuf_mtophys(bufs_in[i]);
- /* authentication parameters */
- if (options->auth_op == RTE_CRYPTO_AUTH_OP_VERIFY) {
- sym_op->auth.digest.data = test_vector->digest.data;
- sym_op->auth.digest.phys_addr =
+ if (options->aead_op == RTE_CRYPTO_AEAD_OP_DECRYPT) {
+ sym_op->aead.digest.data = test_vector->digest.data;
+ sym_op->aead.digest.phys_addr =
test_vector->digest.phys_addr;
} else {
- uint32_t offset = sym_op->cipher.data.length +
- sym_op->cipher.data.offset;
+ uint32_t offset = sym_op->aead.data.length +
+ sym_op->aead.data.offset;
struct rte_mbuf *buf, *tbuf;
if (options->out_of_place) {
@@ -354,14 +349,11 @@ cperf_set_ops_aead(struct rte_crypto_op **ops,
}
}
- sym_op->auth.digest.data = rte_pktmbuf_mtod_offset(buf,
+ sym_op->aead.digest.data = rte_pktmbuf_mtod_offset(buf,
uint8_t *, offset);
- sym_op->auth.digest.phys_addr =
+ sym_op->aead.digest.phys_addr =
rte_pktmbuf_mtophys_offset(buf, offset);
}
-
- sym_op->auth.data.length = options->test_buffer_size;
- sym_op->auth.data.offset = options->auth_aad_sz;
}
if (options->test == CPERF_TEST_TYPE_VERIFY) {
@@ -369,8 +361,8 @@ cperf_set_ops_aead(struct rte_crypto_op **ops,
uint8_t *iv_ptr = rte_crypto_op_ctod_offset(ops[i],
uint8_t *, iv_offset);
- memcpy(iv_ptr, test_vector->cipher_iv.data,
-
[dpdk-dev] [PATCH v3 26/26] cryptodev: remove AAD from authentication structure
Now that AAD is only used in AEAD algorithms,
there is no need to keep AAD in the authentication
structure.
Signed-off-by: Pablo de Lara
Acked-by: Akhil Goyal
---
app/test-crypto-perf/cperf_ops.c | 2 --
doc/guides/prog_guide/cryptodev_lib.rst | 6 --
doc/guides/rel_notes/release_17_08.rst | 3 +++
drivers/crypto/openssl/rte_openssl_pmd.c | 1 -
lib/librte_cryptodev/rte_crypto_sym.h| 26 --
test/test/test_cryptodev.c | 4
test/test/test_cryptodev_perf.c | 1 -
7 files changed, 3 insertions(+), 40 deletions(-)
diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index a63fd83..8407503 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -425,7 +425,6 @@ cperf_create_session(uint8_t dev_id,
test_vector->auth_iv.length;
} else {
auth_xform.auth.digest_length = 0;
- auth_xform.auth.add_auth_data_length = 0;
auth_xform.auth.key.length = 0;
auth_xform.auth.key.data = NULL;
auth_xform.auth.iv.length = 0;
@@ -478,7 +477,6 @@ cperf_create_session(uint8_t dev_id,
test_vector->auth_key.data;
} else {
auth_xform.auth.digest_length = 0;
- auth_xform.auth.add_auth_data_length = 0;
auth_xform.auth.key.length = 0;
auth_xform.auth.key.data = NULL;
auth_xform.auth.iv.length = 0;
diff --git a/doc/guides/prog_guide/cryptodev_lib.rst
b/doc/guides/prog_guide/cryptodev_lib.rst
index 5048839..f250c00 100644
--- a/doc/guides/prog_guide/cryptodev_lib.rst
+++ b/doc/guides/prog_guide/cryptodev_lib.rst
@@ -567,12 +567,6 @@ chain.
uint8_t *data;
phys_addr_t phys_addr;
} digest; /**< Digest parameters */
-
-struct {
-uint8_t *data;
-phys_addr_t phys_addr;
-} aad;
-/**< Additional authentication parameters */
} auth;
};
};
diff --git a/doc/guides/rel_notes/release_17_08.rst
b/doc/guides/rel_notes/release_17_08.rst
index 2c6bef5..d29b203 100644
--- a/doc/guides/rel_notes/release_17_08.rst
+++ b/doc/guides/rel_notes/release_17_08.rst
@@ -176,6 +176,9 @@ API Changes
* Changed field size of digest length in ``rte_crypto_auth_xform``,
from uint32_t to uint16_t.
* Added AEAD structure in ``rte_crypto_sym_op``.
+ * Removed AAD length from ``rte_crypto_auth_xform``.
+ * Removed AAD pointer and physical address from auth structure
+in ``rte_crypto_sym_op``.
ABI Changes
diff --git a/drivers/crypto/openssl/rte_openssl_pmd.c
b/drivers/crypto/openssl/rte_openssl_pmd.c
index 7f5c6aa..73e7ff1 100644
--- a/drivers/crypto/openssl/rte_openssl_pmd.c
+++ b/drivers/crypto/openssl/rte_openssl_pmd.c
@@ -413,7 +413,6 @@ openssl_set_session_auth_parameters(struct openssl_session
*sess,
return -EINVAL;
}
- sess->auth.aad_length = xform->auth.add_auth_data_length;
sess->auth.digest_length = xform->auth.digest_length;
return 0;
diff --git a/lib/librte_cryptodev/rte_crypto_sym.h
b/lib/librte_cryptodev/rte_crypto_sym.h
index dab042b..742dc34 100644
--- a/lib/librte_cryptodev/rte_crypto_sym.h
+++ b/lib/librte_cryptodev/rte_crypto_sym.h
@@ -326,13 +326,6 @@ struct rte_crypto_auth_xform {
* the result shall be truncated.
*/
- uint16_t add_auth_data_length;
- /**< The length of the additional authenticated data (AAD) in bytes.
-* The maximum permitted value is 65535 (2^16 - 1) bytes, unless
-* otherwise specified below.
-*
-*/
-
struct {
uint16_t offset;
/**< Starting point for Initialisation Vector or Counter,
@@ -670,25 +663,6 @@ struct rte_crypto_sym_op {
phys_addr_t phys_addr;
/**< Physical address of digest */
} digest; /**< Digest parameters */
-
- struct {
- uint8_t *data;
- /**< Pointer to Additional Authenticated
-* Data (AAD) needed for authenticated
cipher
-* mechanisms (CCM and GCM).
-*
-* The length of the data pointed to by
this
-* field is set up for the session in
the @ref
-* rte_crypto_auth_xform structure as
part of
-
[dpdk-dev] [PATCH v3 25/26] cryptodev: use AES-GCM/CCM as AEAD algorithms
Now that all the structures/functions for AEAD algorithms
are in place, migrate the two supported algorithms
AES-GCM and AES-CCM to these, instead of using
cipher and authentication parameters.
Signed-off-by: Pablo de Lara
Acked-by: Akhil Goyal
---
doc/guides/sample_app_ug/ipsec_secgw.rst | 11 +-
doc/guides/sample_app_ug/l2_forward_crypto.rst | 2 +-
doc/guides/tools/cryptoperf.rst | 4 -
drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 76 ++--
drivers/crypto/aesni_gcm/aesni_gcm_pmd_ops.c | 24 +-
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 8 -
drivers/crypto/openssl/rte_openssl_pmd.c | 140 +--
drivers/crypto/openssl/rte_openssl_pmd_ops.c | 26 +-
drivers/crypto/openssl/rte_openssl_pmd_private.h | 4 +
drivers/crypto/qat/qat_crypto.c | 186 +++---
drivers/crypto/qat/qat_crypto.h | 4 +
drivers/crypto/qat/qat_crypto_capabilities.h | 34 +-
examples/ipsec-secgw/esp.c | 231 +++-
examples/ipsec-secgw/sa.c| 187 ++
examples/l2fwd-crypto/main.c | 3 +
lib/librte_cryptodev/rte_crypto_sym.h| 100 -
lib/librte_cryptodev/rte_cryptodev.c | 4 -
test/test/test_cryptodev.c | 218 +--
test/test/test_cryptodev_perf.c | 446 ---
19 files changed, 892 insertions(+), 816 deletions(-)
diff --git a/doc/guides/sample_app_ug/ipsec_secgw.rst
b/doc/guides/sample_app_ug/ipsec_secgw.rst
index ca2a34d..75b960f 100644
--- a/doc/guides/sample_app_ug/ipsec_secgw.rst
+++ b/doc/guides/sample_app_ug/ipsec_secgw.rst
@@ -419,7 +419,6 @@ where each options means:
* *null*: NULL algorithm
* *aes-128-cbc*: AES-CBC 128-bit algorithm
* *aes-128-ctr*: AES-CTR 128-bit algorithm
- * *aes-128-gcm*: AES-GCM 128-bit algorithm
* Syntax: *cipher_algo *
@@ -447,7 +446,6 @@ where each options means:
* *null*: NULL algorithm
* *sha1-hmac*: HMAC SHA1 algorithm
-* *aes-128-gcm*: AES-GCM 128-bit algorithm
@@ -470,6 +468,10 @@ where each options means:
* Optional: Yes, unless and are not used
+ * Available options:
+
+ * *aes-128-gcm*: AES-GCM 128-bit algorithm
+
* Syntax: *cipher_algo *
@@ -539,9 +541,8 @@ Example SA rules:
src ::::::: \
dst :::::::
-sa in 105 cipher_algo aes-128-gcm \
-cipher_key de:ad:be:ef:de:ad:be:ef:de:ad:be:ef:de:ad:be:ef:de:ad:be:ef \
-auth_algo aes-128-gcm \
+sa in 105 aead_algo aes-128-gcm \
+aead_key de:ad:be:ef:de:ad:be:ef:de:ad:be:ef:de:ad:be:ef:de:ad:be:ef \
mode ipv4-tunnel src 172.16.2.5 dst 172.16.1.5
Routing rule syntax
diff --git a/doc/guides/sample_app_ug/l2_forward_crypto.rst
b/doc/guides/sample_app_ug/l2_forward_crypto.rst
index 2880c43..2a61af7 100644
--- a/doc/guides/sample_app_ug/l2_forward_crypto.rst
+++ b/doc/guides/sample_app_ug/l2_forward_crypto.rst
@@ -156,7 +156,7 @@ where,
Note that if --auth_iv is used, this will be ignored.
-* aead_algo: select the AEAD algorithm
+* aead_algo: select the AEAD algorithm (default is aes-gcm)
* aead_op: select the AEAD operation to perform: ENCRYPT or DECRYPT
diff --git a/doc/guides/tools/cryptoperf.rst b/doc/guides/tools/cryptoperf.rst
index 6b797a7..a077e7d 100644
--- a/doc/guides/tools/cryptoperf.rst
+++ b/doc/guides/tools/cryptoperf.rst
@@ -223,10 +223,8 @@ The following are the appication command-line options:
3des-ecb
3des-ctr
aes-cbc
- aes-ccm
aes-ctr
aes-ecb
- aes-gcm
aes-f8
aes-xts
arc4
@@ -257,9 +255,7 @@ The following are the appication command-line options:
3des-cbc
aes-cbc-mac
- aes-ccm
aes-cmac
- aes-gcm
aes-gmac
aes-xcbc-mac
md5
diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
index 36372a6..567c2ec 100644
--- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
+++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
@@ -77,13 +77,13 @@ aesni_gcm_set_session_parameters(struct aesni_gcm_session
*sess,
const struct rte_crypto_sym_xform *xform)
{
const struct rte_crypto_sym_xform *auth_xform;
- const struct rte_crypto_sym_xform *cipher_xform;
+ const struct rte_crypto_sym_xform *aead_xform;
uint16_t digest_length;
uint8_t key_length;
uint8_t *key;
/* AES-GMAC */
- if (xform->next == NULL) {
+ if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
auth_xform = xform;
if (auth_xform->auth.algo != RTE_CRYPTO_AUTH_AES_GMAC) {
GCM_LOG_ERR("Only AES GMAC is supported as an "
@@ -102,52 +102,39 @@ aesni_gcm_set_session_par
[dpdk-dev] [PATCH] net/vmxnet3: avoid code duplication
Refactor vmxnet3_post_rx_bufs() to call vmxnet3_renew_desc()
to update the newly allocated mbufs. While here, relocate the
relevant comments to vmxnet3_renew_desc().
Signed-off-by: Chas Williams
---
drivers/net/vmxnet3/vmxnet3_rxtx.c | 61 +-
1 file changed, 21 insertions(+), 40 deletions(-)
diff --git a/drivers/net/vmxnet3/vmxnet3_rxtx.c
b/drivers/net/vmxnet3/vmxnet3_rxtx.c
index 13c73f6..d9cf437 100644
--- a/drivers/net/vmxnet3/vmxnet3_rxtx.c
+++ b/drivers/net/vmxnet3/vmxnet3_rxtx.c
@@ -593,24 +593,40 @@ static inline void
vmxnet3_renew_desc(vmxnet3_rx_queue_t *rxq, uint8_t ring_id,
struct rte_mbuf *mbuf)
{
- uint32_t val = 0;
+ uint32_t val;
struct vmxnet3_cmd_ring *ring = &rxq->cmd_ring[ring_id];
struct Vmxnet3_RxDesc *rxd =
(struct Vmxnet3_RxDesc *)(ring->base + ring->next2fill);
vmxnet3_buf_info_t *buf_info = &ring->buf_info[ring->next2fill];
- if (ring_id == 0)
+ if (ring_id == 0) {
+ /* Usually: One HEAD type buf per packet
+* val = (ring->next2fill % rxq->hw->bufs_per_pkt) ?
+* VMXNET3_RXD_BTYPE_BODY : VMXNET3_RXD_BTYPE_HEAD;
+*/
+
+ /* We use single packet buffer so all heads here */
val = VMXNET3_RXD_BTYPE_HEAD;
- else
+ } else {
+ /* All BODY type buffers for 2nd ring */
val = VMXNET3_RXD_BTYPE_BODY;
+ }
+ /*
+* Load mbuf pointer into buf_info[ring_size]
+* buf_info structure is equivalent to cookie for virtio-virtqueue
+*/
buf_info->m = mbuf;
buf_info->len = (uint16_t)(mbuf->buf_len - RTE_PKTMBUF_HEADROOM);
buf_info->bufPA = rte_mbuf_data_dma_addr_default(mbuf);
+ /* Load Rx Descriptor with the buffer's GPA */
rxd->addr = buf_info->bufPA;
+
+ /* After this point rxd->addr MUST not be NULL */
rxd->btype = val;
rxd->len = buf_info->len;
+ /* Flip gen bit at the end to change ownership */
rxd->gen = ring->gen;
vmxnet3_cmd_ring_adv_next2fill(ring);
@@ -629,28 +645,11 @@ static int
vmxnet3_post_rx_bufs(vmxnet3_rx_queue_t *rxq, uint8_t ring_id)
{
int err = 0;
- uint32_t i = 0, val = 0;
+ uint32_t i = 0;
struct vmxnet3_cmd_ring *ring = &rxq->cmd_ring[ring_id];
- if (ring_id == 0) {
- /* Usually: One HEAD type buf per packet
-* val = (ring->next2fill % rxq->hw->bufs_per_pkt) ?
-* VMXNET3_RXD_BTYPE_BODY : VMXNET3_RXD_BTYPE_HEAD;
-*/
-
- /* We use single packet buffer so all heads here */
- val = VMXNET3_RXD_BTYPE_HEAD;
- } else {
- /* All BODY type buffers for 2nd ring */
- val = VMXNET3_RXD_BTYPE_BODY;
- }
-
while (vmxnet3_cmd_ring_desc_avail(ring) > 0) {
- struct Vmxnet3_RxDesc *rxd;
struct rte_mbuf *mbuf;
- vmxnet3_buf_info_t *buf_info = &ring->buf_info[ring->next2fill];
-
- rxd = (struct Vmxnet3_RxDesc *)(ring->base + ring->next2fill);
/* Allocate blank mbuf for the current Rx Descriptor */
mbuf = rte_mbuf_raw_alloc(rxq->mp);
@@ -661,25 +660,7 @@ vmxnet3_post_rx_bufs(vmxnet3_rx_queue_t *rxq, uint8_t
ring_id)
break;
}
- /*
-* Load mbuf pointer into buf_info[ring_size]
-* buf_info structure is equivalent to cookie for
virtio-virtqueue
-*/
- buf_info->m = mbuf;
- buf_info->len = (uint16_t)(mbuf->buf_len -
- RTE_PKTMBUF_HEADROOM);
- buf_info->bufPA = rte_mbuf_data_dma_addr_default(mbuf);
-
- /* Load Rx Descriptor with the buffer's GPA */
- rxd->addr = buf_info->bufPA;
-
- /* After this point rxd->addr MUST not be NULL */
- rxd->btype = val;
- rxd->len = buf_info->len;
- /* Flip gen bit at the end to change ownership */
- rxd->gen = ring->gen;
-
- vmxnet3_cmd_ring_adv_next2fill(ring);
+ vmxnet3_renew_desc(rxq, ring_id, mbuf);
i++;
}
--
2.1.4
Re: [dpdk-dev] [PATCH] crypto/qat: fix typo
> -Original Message-
> From: De Lara Guarch, Pablo
> Sent: Thursday, June 29, 2017 12:16 PM
> To: Trahe, Fiona ; Griffin, John
> ; Jain, Deepak K
> Cc: dev@dpdk.org; De Lara Guarch, Pablo ;
> sta...@dpdk.org
> Subject: [PATCH] crypto/qat: fix typo
>
> Fixed a comment in QAT, referring to the IV size for AES-GCM, that should be
> in bytes, and not bits.
>
> Fixes: 53d8971cbe81 ("qat: fix AES-GCM decryption")
> CC: sta...@dpdk.org
>
> Signed-off-by: Pablo de Lara
> ---
> --
> 2.9.4
Acked-by: Deepak Kumar Jain
Re: [dpdk-dev] Service lcores and Application lcores
29/06/2017 18:35, Van Haaren, Harry: > 3) The problem; >If a service core runs the SW PMD schedule() function (option 2) *AND* >the application lcore runs schedule() func (option 1), the result is that >two threads are concurrently running a multi-thread unsafe function. Which function is multi-thread unsafe? Why the same function would be run by the service and by the scheduler?
[dpdk-dev] [PATCH 0/5] crypto/dpaa2_sec optimization and feature update
From: Akhil Goyal This patchset updates dpaa2_sec crypto driver with following: - optimization in data path for memory allocation - add support for additional AES algorithms like AES-GCM and AES-CTR - Update test cases in test_cryptodev for all the supported test cases. - Update documentation for supported algorithms The patches are based on dpdk-crypto-next and are rebased over the latest crypto restructuring changes by Pablo. http://dpdk.org/ml/archives/dev/2017-June/069372.html Akhil Goyal (5): crypto/dpaa2_sec: add per device mempool to store frame list entries crypto/dpaa2_sec: add descriptor support for gcm and ctr crypto/dpaa2_sec: add support for AES-GCM and CTR test/test: add test cases for gcm and ctr in dpaa2_sec test suite doc: update documentation for dpaa2_sec supported algos doc/guides/cryptodevs/dpaa2_sec.rst | 9 +- doc/guides/cryptodevs/features/dpaa2_sec.ini | 6 + drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 7 + drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 384 --- drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h| 100 --- drivers/crypto/dpaa2_sec/hw/desc/algo.h | 226 +++- drivers/crypto/dpaa2_sec/hw/desc/ipsec.h | 19 +- test/test/test_cryptodev.c | 94 ++- test/test/test_cryptodev_aes_test_vectors.h | 78 -- test/test/test_cryptodev_blockcipher.c | 1 + test/test/test_cryptodev_des_test_vectors.h | 24 +- test/test/test_cryptodev_hash_test_vectors.h | 36 ++- 12 files changed, 846 insertions(+), 138 deletions(-) -- 2.9.3
[dpdk-dev] [PATCH 1/5] crypto/dpaa2_sec: add per device mempool to store frame list entries
From: Akhil Goyal
rte_malloc uses common memory area for all cores.
Now rte_malloc are replaced by per device mempool to allocate
space for FLE. This removes contention and improves performance.
Signed-off-by: Akhil Goyal
---
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 7 +++
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 79 ++---
drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h | 2 +
3 files changed, 70 insertions(+), 18 deletions(-)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 429eaee..16cadf5 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -182,6 +182,13 @@ struct qbman_fle {
fle->addr_lo = lower_32_bits((uint64_t)addr); \
fle->addr_hi = upper_32_bits((uint64_t)addr); \
} while (0)
+#define DPAA2_GET_FLE_CTXT(fle)\
+ (uint64_t)uint64_t)((fle)->reserved[1])) << 32) + \
+ (fle)->reserved[0])
+#define DPAA2_FLE_SAVE_CTXT(fle, addr) do { \
+ fle->reserved[0] = lower_32_bits((uint64_t)addr); \
+ fle->reserved[1] = upper_32_bits((uint64_t)addr); \
+} while (0)
#define DPAA2_SET_FLE_OFFSET(fle, offset) \
((fle)->fin_bpid_offset |= (uint32_t)(offset) << 16)
#define DPAA2_SET_FLE_BPID(fle, bpid) ((fle)->fin_bpid_offset |=
(uint64_t)bpid)
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 3620751..dbdaf46 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -71,6 +71,13 @@
#define NO_PREFETCH 0
#define TDES_CBC_IV_LEN 8
#define AES_CBC_IV_LEN 16
+#define AES_CTR_IV_LEN 16
+#define AES_GCM_IV_LEN 12
+/* FLE_POOL_NUM_BUFS is set as per the ipsec-secgw application */
+#define FLE_POOL_NUM_BUFS 32000
+#define FLE_POOL_BUF_SIZE 256
+#define FLE_POOL_CACHE_SIZE512
+
enum rta_sec_era rta_sec_era = RTA_SEC_ERA_8;
static inline int
@@ -84,9 +91,8 @@ build_authenc_fd(dpaa2_sec_session *sess,
struct sec_flow_context *flc;
uint32_t auth_only_len = sym_op->auth.data.length -
sym_op->cipher.data.length;
- int icv_len = sess->digest_length;
+ int icv_len = sess->digest_length, retval;
uint8_t *old_icv;
- uint32_t mem_len = (7 * sizeof(struct qbman_fle)) + icv_len;
uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
sess->iv.offset);
@@ -98,12 +104,14 @@ build_authenc_fd(dpaa2_sec_session *sess,
* to get the MBUF Addr from the previous FLE.
* We can have a better approach to use the inline Mbuf
*/
- fle = rte_zmalloc(NULL, mem_len, RTE_CACHE_LINE_SIZE);
- if (!fle) {
+ retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
+ if (retval) {
RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
return -1;
}
+ memset(fle, 0, FLE_POOL_BUF_SIZE);
DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+ DPAA2_FLE_SAVE_CTXT(fle, priv);
fle = fle + 1;
sge = fle + 2;
if (likely(bpid < MAX_BPID)) {
@@ -214,21 +222,19 @@ build_auth_fd(dpaa2_sec_session *sess, struct
rte_crypto_op *op,
{
struct rte_crypto_sym_op *sym_op = op->sym;
struct qbman_fle *fle, *sge;
- uint32_t mem_len = (sess->dir == DIR_ENC) ?
- (3 * sizeof(struct qbman_fle)) :
- (5 * sizeof(struct qbman_fle) +
- sess->digest_length);
struct sec_flow_context *flc;
struct ctxt_priv *priv = sess->ctxt;
uint8_t *old_digest;
+ int retval;
PMD_INIT_FUNC_TRACE();
- fle = rte_zmalloc(NULL, mem_len, RTE_CACHE_LINE_SIZE);
- if (!fle) {
- RTE_LOG(ERR, PMD, "Memory alloc failed for FLE\n");
+ retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
+ if (retval) {
+ RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
return -1;
}
+ memset(fle, 0, FLE_POOL_BUF_SIZE);
/* TODO we are using the first FLE entry to store Mbuf.
* Currently we donot know which FLE has the mbuf stored.
* So while retreiving we can go back 1 FLE from the FD -ADDR
@@ -236,6 +242,7 @@ build_auth_fd(dpaa2_sec_session *sess, struct rte_crypto_op
*op,
* We can have a better approach to use the inline Mbuf
*/
DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+ DPAA2_FLE_SAVE_CTXT(fle, priv);
fle = fle + 1;
if (likely(bpid < MAX_BPID)) {
@@ -306,7 +313,7 @@ build_cipher_fd(dpaa2_sec_session *sess, struct
rte_crypto_op *op,
{
struct rte_crypto_sym_op *sym_op = op->sym;
struct qbman_fle *fle, *sge;
- uint32_t mem_len = (5 * sizeof(struct qbman_fle));
+
[dpdk-dev] [PATCH 3/5] crypto/dpaa2_sec: add support for AES-GCM and CTR
From: Akhil Goyal
AES-GCM support is added as per the AEAD type of crypto
operations.
Support for AES-CTR is also added.
Signed-off-by: Akhil Goyal
---
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 315 ++--
drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h | 98 ++---
2 files changed, 359 insertions(+), 54 deletions(-)
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index dbdaf46..997956f 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -69,10 +69,6 @@
#define FSL_MC_DPSECI_DEVID 3
#define NO_PREFETCH 0
-#define TDES_CBC_IV_LEN 8
-#define AES_CBC_IV_LEN 16
-#define AES_CTR_IV_LEN 16
-#define AES_GCM_IV_LEN 12
/* FLE_POOL_NUM_BUFS is set as per the ipsec-secgw application */
#define FLE_POOL_NUM_BUFS 32000
#define FLE_POOL_BUF_SIZE 256
@@ -81,6 +77,148 @@
enum rta_sec_era rta_sec_era = RTA_SEC_ERA_8;
static inline int
+build_authenc_gcm_fd(dpaa2_sec_session *sess,
+struct rte_crypto_op *op,
+struct qbman_fd *fd, uint16_t bpid)
+{
+ struct rte_crypto_sym_op *sym_op = op->sym;
+ struct ctxt_priv *priv = sess->ctxt;
+ struct qbman_fle *fle, *sge;
+ struct sec_flow_context *flc;
+ uint32_t auth_only_len = sess->ext_params.aead_ctxt.auth_only_len;
+ int icv_len = sess->digest_length, retval;
+ uint8_t *old_icv;
+ uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
+ sess->iv.offset);
+
+ PMD_INIT_FUNC_TRACE();
+
+ /* TODO we are using the first FLE entry to store Mbuf and session ctxt.
+ Currently we donot know which FLE has the mbuf stored.
+ So while retreiving we can go back 1 FLE from the FD -ADDR
+ to get the MBUF Addr from the previous FLE.
+ We can have a better approach to use the inline Mbuf*/
+ retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
+ if (retval) {
+ RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
+ return -1;
+ }
+ memset(fle, 0, FLE_POOL_BUF_SIZE);
+ DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+ DPAA2_FLE_SAVE_CTXT(fle, priv);
+ fle = fle + 1;
+ sge = fle + 2;
+ if (likely(bpid < MAX_BPID)) {
+ DPAA2_SET_FD_BPID(fd, bpid);
+ DPAA2_SET_FLE_BPID(fle, bpid);
+ DPAA2_SET_FLE_BPID(fle + 1, bpid);
+ DPAA2_SET_FLE_BPID(sge, bpid);
+ DPAA2_SET_FLE_BPID(sge + 1, bpid);
+ DPAA2_SET_FLE_BPID(sge + 2, bpid);
+ DPAA2_SET_FLE_BPID(sge + 3, bpid);
+ } else {
+ DPAA2_SET_FD_IVP(fd);
+ DPAA2_SET_FLE_IVP(fle);
+ DPAA2_SET_FLE_IVP((fle + 1));
+ DPAA2_SET_FLE_IVP(sge);
+ DPAA2_SET_FLE_IVP((sge + 1));
+ DPAA2_SET_FLE_IVP((sge + 2));
+ DPAA2_SET_FLE_IVP((sge + 3));
+ }
+
+ /* Save the shared descriptor */
+ flc = &priv->flc_desc[0].flc;
+ /* Configure FD as a FRAME LIST */
+ DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
+ DPAA2_SET_FD_COMPOUND_FMT(fd);
+ DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
+
+ PMD_TX_LOG(DEBUG, "auth_off: 0x%x/length %d, digest-len=%d\n"
+ "iv-len=%d data_off: 0x%x\n",
+ sym_op->aead.data.offset,
+ sym_op->aead.data.length,
+ sym_op->aead.digest.length,
+ sess->iv.length,
+ sym_op->m_src->data_off);
+
+ /* Configure Output FLE with Scatter/Gather Entry */
+ DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
+ if (auth_only_len)
+ DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
+ fle->length = (sess->dir == DIR_ENC) ?
+ (sym_op->aead.data.length + icv_len + auth_only_len) :
+ sym_op->aead.data.length + auth_only_len;
+
+ DPAA2_SET_FLE_SG_EXT(fle);
+
+ /* Configure Output SGE for Encap/Decap */
+ DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
+ DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
+ sym_op->m_src->data_off - auth_only_len);
+ sge->length = sym_op->aead.data.length + auth_only_len;
+
+ if (sess->dir == DIR_ENC) {
+ sge++;
+ DPAA2_SET_FLE_ADDR(sge,
+ DPAA2_VADDR_TO_IOVA(sym_op->aead.digest.data));
+ sge->length = sess->digest_length;
+ DPAA2_SET_FD_LEN(fd, (sym_op->aead.data.length +
+ sess->iv.length + auth_only_len));
+ }
+ DPAA2_SET_FLE_FIN(sge);
+
+ sge++;
+ fle++;
+
+ /* Configure Input FLE with Scatter/Gather Entry */
+ DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(s
[dpdk-dev] [PATCH 4/5] test/test: add test cases for gcm and ctr in dpaa2_sec test suite
From: Akhil Goyal
dpaa2_sec test cases updated for various supported
crypto alogorithms.
Signed-off-by: Akhil Goyal
---
test/test/test_cryptodev.c | 94
test/test/test_cryptodev_aes_test_vectors.h | 78 +++
test/test/test_cryptodev_blockcipher.c | 1 +
test/test/test_cryptodev_des_test_vectors.h | 24 ---
test/test/test_cryptodev_hash_test_vectors.h | 36 +++
5 files changed, 176 insertions(+), 57 deletions(-)
diff --git a/test/test/test_cryptodev.c b/test/test/test_cryptodev.c
index db0999e..fe6c8dd 100644
--- a/test/test/test_cryptodev.c
+++ b/test/test/test_cryptodev.c
@@ -1738,6 +1738,22 @@ test_AES_cipheronly_dpaa2_sec_all(void)
}
static int
+test_authonly_dpaa2_sec_all(void)
+{
+ struct crypto_testsuite_params *ts_params = &testsuite_params;
+ int status;
+
+ status = test_blockcipher_all_tests(ts_params->mbuf_pool,
+ ts_params->op_mpool, ts_params->valid_devs[0],
+ RTE_CRYPTODEV_DPAA2_SEC_PMD,
+ BLKCIPHER_AUTHONLY_TYPE);
+
+ TEST_ASSERT_EQUAL(status, 0, "Test failed");
+
+ return TEST_SUCCESS;
+}
+
+static int
test_authonly_openssl_all(void)
{
struct crypto_testsuite_params *ts_params = &testsuite_params;
@@ -8280,28 +8296,84 @@ static struct unit_test_suite
cryptodev_dpaa2_sec_testsuite = {
.teardown = testsuite_teardown,
.unit_test_cases = {
TEST_CASE_ST(ut_setup, ut_teardown,
-test_device_configure_invalid_dev_id),
+ test_device_configure_invalid_dev_id),
TEST_CASE_ST(ut_setup, ut_teardown,
-test_multi_session),
+ test_multi_session),
TEST_CASE_ST(ut_setup, ut_teardown,
-test_AES_chain_dpaa2_sec_all),
+ test_AES_chain_dpaa2_sec_all),
TEST_CASE_ST(ut_setup, ut_teardown,
-test_3DES_chain_dpaa2_sec_all),
+ test_3DES_chain_dpaa2_sec_all),
TEST_CASE_ST(ut_setup, ut_teardown,
-test_AES_cipheronly_dpaa2_sec_all),
+ test_AES_cipheronly_dpaa2_sec_all),
TEST_CASE_ST(ut_setup, ut_teardown,
-test_3DES_cipheronly_dpaa2_sec_all),
+ test_3DES_cipheronly_dpaa2_sec_all),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_authonly_dpaa2_sec_all),
- /** HMAC_MD5 Authentication */
+ /** AES GCM Authenticated Encryption */
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_encryption_test_case_1),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_encryption_test_case_2),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_encryption_test_case_3),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_encryption_test_case_4),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_encryption_test_case_5),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_encryption_test_case_6),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_encryption_test_case_7),
+
+ /** AES GCM Authenticated Decryption */
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_decryption_test_case_1),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_decryption_test_case_2),
TEST_CASE_ST(ut_setup, ut_teardown,
-test_MD5_HMAC_generate_case_1),
+ test_mb_AES_GCM_authenticated_decryption_test_case_3),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_decryption_test_case_4),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_decryption_test_case_5),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_decryption_test_case_6),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_authenticated_decryption_test_case_7),
+
+ /** AES GCM Authenticated Encryption 256 bits key */
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_encryption_test_case_256_1),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_mb_AES_GCM_auth_encryption_test_case_256_2),
+ TES
[dpdk-dev] [PATCH 5/5] doc: update documentation for dpaa2_sec supported algos
From: Akhil Goyal Signed-off-by: Akhil Goyal --- doc/guides/cryptodevs/dpaa2_sec.rst | 9 - doc/guides/cryptodevs/features/dpaa2_sec.ini | 6 ++ 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/doc/guides/cryptodevs/dpaa2_sec.rst b/doc/guides/cryptodevs/dpaa2_sec.rst index becb910..1444a91 100644 --- a/doc/guides/cryptodevs/dpaa2_sec.rst +++ b/doc/guides/cryptodevs/dpaa2_sec.rst @@ -126,7 +126,7 @@ fits in the DPAA2 Bus model Features -The DPAA2 PMD has support for: +The DPAA2_SEC PMD has support for: Cipher algorithms: @@ -134,6 +134,9 @@ Cipher algorithms: * ``RTE_CRYPTO_CIPHER_AES128_CBC`` * ``RTE_CRYPTO_CIPHER_AES192_CBC`` * ``RTE_CRYPTO_CIPHER_AES256_CBC`` +* ``RTE_CRYPTO_CIPHER_AES128_CTR`` +* ``RTE_CRYPTO_CIPHER_AES192_CTR`` +* ``RTE_CRYPTO_CIPHER_AES256_CTR`` Hash algorithms: @@ -144,6 +147,10 @@ Hash algorithms: * ``RTE_CRYPTO_AUTH_SHA512_HMAC`` * ``RTE_CRYPTO_AUTH_MD5_HMAC`` +AEAD algorithms: + +* ``RTE_CRYPTO_AEAD_AES_GCM`` + Supported DPAA2 SoCs diff --git a/doc/guides/cryptodevs/features/dpaa2_sec.ini b/doc/guides/cryptodevs/features/dpaa2_sec.ini index db0ea4f..9eb07aa 100644 --- a/doc/guides/cryptodevs/features/dpaa2_sec.ini +++ b/doc/guides/cryptodevs/features/dpaa2_sec.ini @@ -15,6 +15,9 @@ HW Accelerated = Y AES CBC (128) = Y AES CBC (192) = Y AES CBC (256) = Y +AES CTR (128) = Y +AES CTR (192) = Y +AES CTR (256) = Y 3DES CBC = Y ; @@ -32,3 +35,6 @@ SHA512 HMAC = Y ; Supported AEAD algorithms of the 'openssl' crypto driver. ; [AEAD] +AES GCM (128) = Y +AES GCM (192) = Y +AES GCM (256) = Y -- 2.9.3
Re: [dpdk-dev] [PATCH v3] efd: support lookup using neon intrinsics
Hi,
> -Original Message-
> From: Sekhar, Ashwin [mailto:ashwin.sek...@cavium.com]
> Sent: Tuesday, May 2, 2017 9:05 AM
> To: Jacob, Jerin ;
> jianbo@linaro.org
> Cc: Marohn, Byron ; De Lara Guarch, Pablo
> ; dev@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH v3] efd: support lookup using neon
> intrinsics
>
> On Tue, 2017-05-02 at 15:59 +0800, Jianbo Liu wrote:
> > On 2 May 2017 at 14:41, Jerin Jacob
> > wrote:
> > >
> > > -Original Message-
> > > >
> > > > Date: Mon, 1 May 2017 22:59:53 -0700
> > > > From: Ashwin Sekhar T K
> > > > To: byron.mar...@intel.com, pablo.de.lara.gua...@intel.com,
> > > > jerin.ja...@caviumnetworks.com, jianbo@linaro.org
> > > > Cc: dev@dpdk.org, Ashwin Sekhar T K
> > > > .com>
> > > > Subject: [dpdk-dev] [PATCH v3] efd: support lookup using neon
> > > > intrinsics
> > > > X-Mailer: git-send-email 2.13.0.rc1
> > > >
> > > > * Added file lib/librte_efd/rte_efd_arm64.h to hold arm64
> > > > specific definitions
> > > > * Verified the changes with efd_autotest unit test case
> > > >
> > > > Signed-off-by: Ashwin Sekhar T K > > > m>
> > > > ---
> > > > v2:
> > > > * Slightly modified the content of the commit message body
> > > > * Added prefix [dpdk-dev] to the email subject line
> > > >
> > > > v3:
> > > > * Moved enum 'EFD_LOOKUP_NEON' under '#if
> defined(RTE_ARCH_ARM64)'
> > > >
> > > > MAINTAINERS| 1 +
> > > > lib/librte_efd/rte_efd.c | 24 +
> > > > lib/librte_efd/rte_efd_arm64.h | 76
> > > > ++
> > > > 3 files changed, 101 insertions(+)
> > > > create mode 100644 lib/librte_efd/rte_efd_arm64.h
> > > >
> > > > diff --git a/MAINTAINERS b/MAINTAINERS index b6495d2..7d708ae
> > > > 100644
> > > > --- a/MAINTAINERS
> > > > +++ b/MAINTAINERS
> > > > @@ -147,6 +147,7 @@ F:
> > > > lib/librte_eal/common/include/arch/arm/*_64.h
> > > > F: lib/librte_acl/acl_run_neon.*
> > > > F: lib/librte_lpm/rte_lpm_neon.h
> > > > F: lib/librte_hash/rte*_arm64.h
> > > > +F: lib/librte_efd/rte*_arm64.h
> > > > F: drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c
> > > > F: drivers/net/i40e/i40e_rxtx_vec_neon.c
> > > > F: drivers/net/virtio/virtio_rxtx_simple_neon.c
> > > > diff --git a/lib/librte_efd/rte_efd.c b/lib/librte_efd/rte_efd.c
> > > > index f601d62..5cc6283 100644
> > > > --- a/lib/librte_efd/rte_efd.c
> > > > +++ b/lib/librte_efd/rte_efd.c
> > > > @@ -53,6 +53,8 @@
> > > > #include "rte_efd.h"
> > > > #if defined(RTE_ARCH_X86)
> > > > #include "rte_efd_x86.h"
> > > > +#elif defined(RTE_ARCH_ARM64)
> > > > +#include "rte_efd_arm64.h"
> > > > #endif
> > > >
> > > > #define EFD_KEY(key_idx, table) (table->keys + ((key_idx) *
> > > > table->key_len))
> > > > @@ -103,6 +105,9 @@ allocated memory
> > > > enum efd_lookup_internal_function {
> > > > EFD_LOOKUP_SCALAR = 0,
> > > > EFD_LOOKUP_AVX2,
> > > > +#if defined(RTE_ARCH_ARM64)
> > > > + EFD_LOOKUP_NEON,
> > > > +#endif
> > > I think, we can remove this ifdef to
> > > - Make code looks clean
> > > - In future, in some case a new enum value gets added then the value
> > > will be different for each build.
> > >
> > But the enum items are same for each ARCH.
> > Besides, the ifdef could be considered as explanation to that enum.
> > If
> > someone knows nothing about arm/neon, he can ignore it totally after
> > see the ifdef.
> >
> Have added the #if defined on your advice, but in my opinion also its better
> not to have "#if defined" for enums. Because the same enum can take
> different values for different builds.
>
> For eg: If somebody adds an EFD_LOOKUP_AVX512
> after EFD_LOOKUP_NEON here, it will take value 2 for x86 builds but value
> 3 for arm64 builds.
Sorry for not having replied earlier on this.
I don't see the reason why the new enumeration value needs to be within an
ifdef.
If the values mattered, then the EFD_LOOKUP_AVX2 should be also within an ifdef
for X86,
and as far as I know, it is not necessary.
The rest of the the patch looks good to me, I would just remove that ifdef.
Pablo
> > >
> > > Any valid point to keep under RTE_ARCH_ARM64?
> > >
> > > >
> > > > EFD_LOOKUP_NUM
> > > > };
Re: [dpdk-dev] [PATCH v7 15/15] ethdev: Use embedded rte_device to detach driver
29/06/2017 20:22, Jan Blunck: > --- a/lib/librte_eal/common/eal_common_dev.c > +++ b/lib/librte_eal/common/eal_common_dev.c > +int rte_eal_device_detach(struct rte_device *dev) [...] > int rte_eal_dev_detach(const char *name) I would be in favor of breaking the API without notice, and keep the name rte_eal_dev_detach for the function taking a rte_device as parameter. This function was introduced in 16.11 and has probably never been used, except in ethdev and testpmd. Legacy apps probably use rte_eth_dev_detach.
Re: [dpdk-dev] [PATCH v7 14/15] dev: use new hotplug API in attach / detach
29/06/2017 20:22, Jan Blunck:
> Using the new generic API allows attach and detach to be backwards
> compatible while decoupling from the concrete bus implementations.
>
> Signed-off-by: Jan Blunck
> ---
> int rte_eal_dev_attach(const char *name, const char *devargs)
> {
> - struct rte_pci_addr addr;
> + int ret;
>
> if (name == NULL || devargs == NULL) {
> RTE_LOG(ERR, EAL, "Invalid device or arguments provided\n");
> return -EINVAL;
> }
>
> - if (eal_parse_pci_DomBDF(name, &addr) == 0) {
> - if (rte_pci_probe_one(&addr) < 0)
> - goto err;
> + ret = rte_eal_hotplug_add("PCI", name, devargs);
> + if (ret && ret != -EINVAL)
> + return ret;
>
> - } else {
> - if (rte_vdev_init(name, devargs))
> - goto err;
> - }
> + /*
> + * If we haven't found a bus device the user meant to "hotplug" a
> + * virtual device instead.
> + */
> + ret = rte_vdev_init(name, devargs);
> + if (ret)
> + RTE_LOG(ERR, EAL, "Driver cannot attach the device (%s)\n",
> + name);
> + return ret;
> +}
I really don't like this function.
It is not really decoupled from the buses (cf "PCI" and rte_vdev_init).
However I think it is acceptable if it is explictly deprecated
and kept only for the legacy rte_eth_dev_attach() function.
Re: [dpdk-dev] [PATCH 5/5] doc: update documentation for dpaa2_sec supported algos
Hi Akhil > -Original Message- > From: akhil.go...@nxp.com [mailto:akhil.go...@nxp.com] > Sent: Thursday, June 29, 2017 9:49 PM > To: dev@dpdk.org > Cc: hemant.agra...@nxp.com; De Lara Guarch, Pablo > ; Doherty, Declan > ; Akhil Goyal > Subject: [PATCH 5/5] doc: update documentation for dpaa2_sec supported > algos > > From: Akhil Goyal > > Signed-off-by: Akhil Goyal Patch number 3 adds these algorithms, so I believe that's the right place to include this documentation change. Also, you should add an entry in release notes. Lastly, I spotted a typo below: openssl -> dpaa2_sec ... > > ; > @@ -32,3 +35,6 @@ SHA512 HMAC = Y > ; Supported AEAD algorithms of the 'openssl' crypto driver.
Re: [dpdk-dev] [PATCH v2 08/12] cryptodev: add PCI driver helpers
21/06/2017 08:28, Pablo de Lara: > +#ifndef _RTE_CRYPTODEV_PCI_H_ > +#define _RTE_CRYPTODEV_PCI_H_ > + > +#include > +#include The build fails because of the brackets instead of quotes. In a fresh build the cryptodev header is not available while compiling cryptodev. I am fixing it directly in master branch.
Re: [dpdk-dev] [pull-request] next-crypto 17.08 pre-rc1
24/06/2017 12:37, Pablo de Lara: > http://dpdk.org/git/next/dpdk-next-crypto Pulled after your last changes plus a build fix. Thanks
Re: [dpdk-dev] [PATCH 5/5] doc: update documentation for dpaa2_sec supported algos
Hi Pablo, On 6/30/2017 2:37 AM, De Lara Guarch, Pablo wrote: Hi Akhil -Original Message- From: akhil.go...@nxp.com [mailto:akhil.go...@nxp.com] Sent: Thursday, June 29, 2017 9:49 PM To: dev@dpdk.org Cc: hemant.agra...@nxp.com; De Lara Guarch, Pablo ; Doherty, Declan ; Akhil Goyal Subject: [PATCH 5/5] doc: update documentation for dpaa2_sec supported algos From: Akhil Goyal Signed-off-by: Akhil Goyal Patch number 3 adds these algorithms, so I believe that's the right place to include this documentation change. Also, you should add an entry in release notes. Lastly, I spotted a typo below: openssl -> dpaa2_sec ... ; @@ -32,3 +35,6 @@ SHA512 HMAC = Y ; Supported AEAD algorithms of the 'openssl' crypto driver. Thanks for a quick review. I will update the patch set and send again. Also, I could see my 2nd patch is missing. All my patches are at same location but somehow the patch is not received. Even the git-send-email is showing that all the patches are successfully accepted for delivery. I will send patch set again as soon as this problem is resolved. Regards, Akhil
[dpdk-dev] [PATCH] app/testpmd:add bond type description
In function cmd_show_bonding_config_parsed() use number
represent the bond type,in order more detailed,add bond
type description otherwise we may confused about the number
type.
And also,The primary port just use in mode active backup
and tlb,so,when the mode is the active backup or tlb we
show the primary port info.
Signed-off-by: RongQiang Xie
---
app/test-pmd/cmdline.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 4eac498..1ae5fc0 100755
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -4455,6 +4455,7 @@ static void cmd_show_bonding_config_parsed(void
*parsed_result,
printf("\tActive Slaves: []\n");
}
+
if (bonding_mode == BONDING_MODE_ACTIVE_BACKUP ||
bonding_mode == BONDING_MODE_TLB) {
primary_id = rte_eth_bond_primary_get(port_id);
--
1.8.3.1
Re: [dpdk-dev] [PATCH v8 2/3] lib/gro: add TCP/IPv4 GRO support
Hi Stephen, On Thu, Jun 29, 2017 at 10:51:50AM -0700, Stephen Hemminger wrote: > On Thu, 29 Jun 2017 18:58:59 +0800 > Jiayu Hu wrote: > > > + /* allocate a reassembly table for TCP/IPv4 GRO */ > > + uint32_t tcp_item_num = RTE_MIN(item_num, > > + RTE_GRO_MAX_BURST_ITEM_NUM); > > + struct gro_tcp_tbl tcp_tbl; > > + struct gro_tcp_key tcp_keys[tcp_item_num]; > > + struct gro_tcp_item tcp_items[tcp_item_num]; > > Variable size structures on stack were not supported by > CLANG, last time I checked. Why not always max size? The reason why I try to use the min value is to reduce the overhead of array initialization. But I ignore the clang issue. Thanks for your reminder. I will replace it with the max value. > > > + > > + struct rte_mbuf *unprocess_pkts[nb_pkts]; > > + uint16_t unprocess_num = 0; > > + int32_t ret; > > + uint64_t current_time; > > + > > + if ((param->desired_gro_types & RTE_GRO_TCP_IPV4) == 0) > > + return nb_pkts; > > + > > + memset(tcp_keys, 0, sizeof(struct gro_tcp_key) * > > + tcp_item_num); > > + memset(tcp_items, 0, sizeof(struct gro_tcp_item) * > > + tcp_item_num); > > Variable size memset's are slow. They generate 'rep; stoz' last > I checked in GCC and because of rep instruction it kills multi-execution > pipeline. Thanks, I will modify it. BRs, Jiayu
Re: [dpdk-dev] [PATCH 5/5] event/octeontx: add enqueue fwd op variant
Hi Jerin,
This patch set looks good. For the series:
Acked-by: Gage Eads
> -Original Message-
> From: Jerin Jacob [mailto:jerin.ja...@caviumnetworks.com]
> Sent: Thursday, June 29, 2017 9:20 AM
> To: dev@dpdk.org
> Cc: Richardson, Bruce ; Van Haaren, Harry
> ; hemant.agra...@nxp.com; Eads, Gage
> ; nipun.gu...@nxp.com; Vangati, Narender
> ; Rao, Nikhil ; Jerin Jacob
>
> Subject: [dpdk-dev] [PATCH 5/5] event/octeontx: add enqueue fwd op variant
>
> Signed-off-by: Jerin Jacob
> ---
> drivers/event/octeontx/ssovf_evdev.c | 2 +-
> drivers/event/octeontx/ssovf_evdev.h | 2 ++
> drivers/event/octeontx/ssovf_worker.c | 12
> 3 files changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/event/octeontx/ssovf_evdev.c
> b/drivers/event/octeontx/ssovf_evdev.c
> index 3cd0cd49d..eb349f60d 100644
> --- a/drivers/event/octeontx/ssovf_evdev.c
> +++ b/drivers/event/octeontx/ssovf_evdev.c
> @@ -159,7 +159,7 @@ ssovf_fastpath_fns_set(struct rte_eventdev *dev)
> dev->enqueue = ssows_enq;
> dev->enqueue_burst = ssows_enq_burst;
> dev->enqueue_new_burst = ssows_enq_new_burst;
> - dev->enqueue_forward_burst = ssows_enq_burst;
> + dev->enqueue_forward_burst = ssows_enq_fwd_burst;
> dev->dequeue = ssows_deq;
> dev->dequeue_burst = ssows_deq_burst;
>
> diff --git a/drivers/event/octeontx/ssovf_evdev.h
> b/drivers/event/octeontx/ssovf_evdev.h
> index 47091a46e..3b8c23e3a 100644
> --- a/drivers/event/octeontx/ssovf_evdev.h
> +++ b/drivers/event/octeontx/ssovf_evdev.h
> @@ -192,6 +192,8 @@ uint16_t ssows_enq_burst(void *port,
> const struct rte_event ev[], uint16_t nb_events); uint16_t
> ssows_enq_new_burst(void *port,
> const struct rte_event ev[], uint16_t nb_events);
> +uint16_t ssows_enq_fwd_burst(void *port,
> + const struct rte_event ev[], uint16_t nb_events);
> uint16_t ssows_deq(void *port, struct rte_event *ev, uint64_t timeout_ticks);
> uint16_t ssows_deq_burst(void *port, struct rte_event ev[],
> uint16_t nb_events, uint64_t timeout_ticks); diff --git
> a/drivers/event/octeontx/ssovf_worker.c
> b/drivers/event/octeontx/ssovf_worker.c
> index 5393febba..4d413d779 100644
> --- a/drivers/event/octeontx/ssovf_worker.c
> +++ b/drivers/event/octeontx/ssovf_worker.c
> @@ -213,6 +213,18 @@ ssows_enq_new_burst(void *port, const struct
> rte_event ev[], uint16_t nb_events)
>
> return nb_events;
> }
> +
> +uint16_t __hot
> +ssows_enq_fwd_burst(void *port, const struct rte_event ev[], uint16_t
> +nb_events) {
> + struct ssows *ws = port;
> + RTE_SET_USED(nb_events);
> +
> + ssows_forward_event(ws, ev);
> +
> + return 1;
> +}
> +
> void
> ssows_flush_events(struct ssows *ws, uint8_t queue_id) {
> --
> 2.13.2
Re: [dpdk-dev] [PATCH v8 3/3] app/testpmd: enable TCP/IPv4 GRO
> -Original Message- > From: Hu, Jiayu > Sent: Thursday, June 29, 2017 6:59 PM > To: dev@dpdk.org > Cc: Ananyev, Konstantin ; Tan, Jianfeng > ; y...@fridaylinux.org; step...@networkplumber.org; > Wu, Jingjing ; Bie, Tiwei ; Yao, > Lei A ; Hu, Jiayu > Subject: [PATCH v8 3/3] app/testpmd: enable TCP/IPv4 GRO > > This patch enables TCP/IPv4 GRO library in csum forwarding engine. > By default, GRO is turned off. Users can use command "gro (on|off) (port_id)" > to enable or disable GRO for a given port. If a port is enabled GRO, all > TCP/IPv4 > packets received from the port are performed GRO. Besides, users can set max > flow number and packets number per-flow by command "gro set > (max_flow_num) (max_item_num_per_flow) (port_id)". > > Signed-off-by: Jiayu Hu Looks fine from me about those new commands. Reviewed-by: Jingjing Wu Thanks Jingjing
Re: [dpdk-dev] [PATCH 2/7] net/bnxt: fix mtu configuration for the function
On Thu, Jun 29, 2017 at 5:55 AM, Ferruh Yigit wrote: > Just question, would this cause larger frames than expected in application? No. It just initializes the hardware early. The bp->eth_dev->data->mtu still controls what goes to the application.
Re: [dpdk-dev] [PATCH 6/7] net/bnxt: fix some link related issues
On Thu, Jun 29, 2017 at 5:55 AM, Ferruh Yigit
wrote:
> On 6/29/2017 3:51 AM, Ajit Khaparde wrote:
> > This patch fixes some link related issues that can occur because:
> >
> > bnxt_hwrm_port_phy_cfg() was setting enables inappropriately.
> > bnxt_hwrm_port_phy_qcfg() was overly complex.
> > bnxt_get_hwrm_link_config() was basing the speed on the link status.
> > bnxt_get_hwrm_link_config() was using the incorrect macros for auto_mode
> > we are not using supported speeds from phy_qcfg for auto mask.
>
> Does it make sense to split patch per issue fixed?
>
Sure. Working on that. Thanks
>
> >
> > Fixes: 7bc8e9a227cc ("net/bnxt: support async link notification")
> >
> > Signed-off-by: Stephen Hurd
> > Signed-off-by: Ajit Khaparde
> <...>
>
>
[dpdk-dev] [PATCH] app/testpmd:add bond type description
In function cmd_show_bonding_config_parsed() used number represent
the bond type,in order more detailed,add bond type description
otherwise we may confused about the number type.
And also,the primary port just use in mode active backup and tlb,
so,when the mode is active backup or tlb show the primary port info
may be more appropriate.
Signed-off-by: RongQiang Xie
---
app/test-pmd/cmdline.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
mode change 100644 => 100755 app/test-pmd/cmdline.c
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
old mode 100644
new mode 100755
index ff8ffd2..3878934
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -4390,7 +4390,9 @@ static void cmd_show_bonding_config_parsed(void
*parsed_result,
printf("\tFailed to get bonding mode for port = %d\n", port_id);
return;
} else
- printf("\tBonding mode: %d\n", bonding_mode);
+ printf("\tBonding mode: %d ", bonding_mode);
+ printf("[0:Round Robin, 1:Active Backup, 2:Balance, 3:Broadcast, ");
+ printf("\n\t\t\t4:802.3AD, 5:Adaptive TLB, 6:Adaptive Load
Balancing]\n");
if (bonding_mode == BONDING_MODE_BALANCE) {
int balance_xmit_policy;
@@ -4454,12 +4456,15 @@ static void cmd_show_bonding_config_parsed(void
*parsed_result,
}
- primary_id = rte_eth_bond_primary_get(port_id);
- if (primary_id < 0) {
- printf("\tFailed to get primary slave for port = %d\n",
port_id);
- return;
- } else
- printf("\tPrimary: [%d]\n", primary_id);
+ if (bonding_mode == BONDING_MODE_ACTIVE_BACKUP ||
+ bonding_mode == BONDING_MODE_TLB) {
+ primary_id = rte_eth_bond_primary_get(port_id);
+ if (primary_id < 0) {
+ printf("\tFailed to get primary slave for port = %d\n",
port_id);
+ return;
+ } else
+ printf("\tPrimary: [%d]\n", primary_id);
+ }
}
--
1.8.3.1
Re: [dpdk-dev] [PATCH] ether: add support for vtune task tracing
-Original Message-
> Date: Tue, 27 Jun 2017 16:16:01 +0300
> From: ilia.kura...@intel.com
> To: dev@dpdk.org
> CC: konstantin.anan...@intel.com, keith.wi...@intel.com,
> dmitry.gala...@intel.com, Ilia Kurakin
> Subject: [dpdk-dev] [PATCH] ether: add support for vtune task tracing
> X-Mailer: git-send-email 2.7.4
>
> From: Ilia Kurakin
>
> diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
> index f6e6c74..ee7cc42 100644
> --- a/lib/librte_ether/rte_ethdev.h
> +++ b/lib/librte_ether/rte_ethdev.h
> @@ -186,6 +186,10 @@ extern "C" {
> #include "rte_eth_ctrl.h"
> #include "rte_dev_info.h"
>
> +#ifdef RTE_ETHDEV_TRACE_WASTED_RX_ITERATIONS
> +#include "rte_eth_itt.h"
> +#endif
> +
> struct rte_mbuf;
>
> /**
> @@ -2710,6 +2714,25 @@ rte_eth_rx_burst(uint8_t port_id, uint16_t queue_id,
> int16_t nb_rx = (*dev->rx_pkt_burst)(dev->data->rx_queues[queue_id],
> rx_pkts, nb_pkts);
>
> +#ifdef RTE_ETHDEV_TRACE_WASTED_RX_ITERATIONS
If we give the generic name like above then the solution should be generic
and it should not be tightly coupled with itt.
Different architectures may have different profiling tools like x86 has
itt or it is possible to have generic perf based plugin in future.
Considering the above points, IMO, we can not add code in
rte_eth_rx_burst() for each profiling variants. I think, this code can
go in lib/librte_ether/rte_ethdev_profile.c and based on specific
conditional compilation flag(something like
RTE_ETHDEV_TRACE_ITT_WASTED_RX_ITERATIONS)
it can register a rx callback.
or any other scheme without directly modifying rte_eth_rx_burst() for
itt based profiling.
> + /* See rte_eth_itt.h to find comments on code below. */
> + if (unlikely(nb_rx == 0)) {
> + if (!itt_aux_data[port_id].queue_is_wasting_iters[queue_id]) {
> + __itt_task_begin(
> +
> itt_aux_data[port_id].wasted_iter_domains[queue_id],
> + __itt_null, __itt_null,
> +
> itt_aux_data[port_id].wasted_iter_handles[queue_id]);
> + itt_aux_data[port_id].queue_is_wasting_iters[queue_id]
> = 1;
> + }
> + } else {
> + if
> (unlikely(itt_aux_data[port_id].queue_is_wasting_iters[queue_id])) {
> + __itt_task_end(
> +
> itt_aux_data[port_id].wasted_iter_domains[queue_id]);
> + itt_aux_data[port_id].queue_is_wasting_iters[queue_id]
> = 0;
> + }
> + }
> +#endif
> +
> #ifdef RTE_ETHDEV_RXTX_CALLBACKS
> struct rte_eth_rxtx_callback *cb = dev->post_rx_burst_cbs[queue_id];
>
> --
> 2.7.4
>
>
>
> Joint Stock Company Intel A/O
> Registered legal address: Krylatsky Hills Business Park,
> 17 Krylatskaya Str., Bldg 4, Moscow 121614,
> Russian Federation
>
> This e-mail and any attachments may contain confidential material for
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> by others is strictly prohibited. If you are not the intended
> recipient, please contact the sender and delete all copies.
>
Re: [dpdk-dev] [RFC] Add hot plug event in rte eal interrupt and inplement it in i40e driver.
> -Original Message- > From: Stephen Hemminger [mailto:step...@networkplumber.org] > Sent: Friday, June 30, 2017 1:28 AM > To: Wu, Jingjing > Cc: Gaëtan Rivet ; Guo, Jia ; > Zhang, Helin ; Richardson, Bruce > ; Ananyev, Konstantin > ; Liu, Yuanhan ; > dev@dpdk.org > Subject: Re: [dpdk-dev] [RFC] Add hot plug event in rte eal interrupt and > inplement it in i40e driver. > > On Wed, 7 Jun 2017 07:40:37 + > "Wu, Jingjing" wrote: > > > > > > > > >Secondly, in order to read out the uevent that monitoring, we need > > > >to add uevent API in rte > > > layer. We plan add 2 , rte_uevent_connect and rte_get_uevent. All > > > driver interrupt handler could use these API to enable the uevent > > > monitoring, and read out the uevent type , then corresponding to handle > these uevent, such as detach the device when get the remove type. > > > > > > > > > > I find having a generic uevent API interesting. > > > > > > However, all specifics pertaining to UIO use (hotplug_fd, subsystem > > > enum) should stay in UIO specific code (eal_pci_uio.c?). > > > > > Yes, but it can be also considered as interrupt mechanism, right? > > > > > I am currently moving the PCI bus out of the EAL. EAL subsystems > > > should not rely on PCI specifics, as they won't be available afterward. > > > > Will the interrupt handling be kept in EAL, right? > > > > > It should also allow you to clean up your API. Exposing hotplug_fd > > > and requiring PMDs to link it can be avoided and should result in a > > > simpler API. > > You were right given the current model this is the correct way to do it. Does it mean this way in this RFC is reasonable given the current model? > It would be good if the interrupt model stuff could be moved back into EAL so > that if device is removed, no code in driver needs to be added. > At list we still need expose some interrupt/event by drivers. Such as LSC, Rx interrupt. > All the bus -> device -> interrupt state is visible, and EAL should be able to > unwind from there. Thinking more of the Linux model where there is no need > (in general) for hot plug specific code in each driver. Yes, such simpler API is what I like to see too. But now, the remove event report by this way is more economical. Thanks Jingjing
Re: [dpdk-dev] [PATCH v3 1/2] eal: add uevent api for hot plug
> -Original Message- > From: Guo, Jia > Sent: Thursday, June 29, 2017 12:38 PM > To: Zhang, Helin ; Wu, Jingjing > > Cc: dev@dpdk.org; Guo, Jia > Subject: [PATCH v3 1/2] eal: add uevent api for hot plug > > From: "Guo, Jia" > > This patch aim to add a variable "uevent_fd" in structure "rte_intr_handle" > for > enable kernel object uevent monitoring, and add some uevent API in rte eal > interrupt, that is “rte_uevent_connect” and “rte_uevent_get”, so that all > driver > could use these API to monitor and read out the uevent, then corresponding to > handle these uevent, such as detach or attach the device. > > Signed-off-by: Guo, Jia Looks fine from me. Reviewed-by: Jingjing Wu
Re: [dpdk-dev] [PATCH v3 2/2] net/i40e: add hot plug monitor in i40e
> -Original Message- > From: Guo, Jia > Sent: Thursday, June 29, 2017 12:38 PM > To: Zhang, Helin ; Wu, Jingjing > > Cc: dev@dpdk.org; Guo, Jia > Subject: [PATCH v3 2/2] net/i40e: add hot plug monitor in i40e > > From: "Guo, Jia" > > This patch enable the hot plug feature in i40e, by monitoring the hot plug > uevent of the device. When remove event got, call the app callback function to > handle the detach process. > > Signed-off-by: Guo, Jia Acked-by: Jingjing Wu
Re: [dpdk-dev] Service lcores and Application lcores
-Original Message- > Date: Thu, 29 Jun 2017 16:57:08 +0100 > From: Bruce Richardson > To: "Van Haaren, Harry" > CC: "dev@dpdk.org" , 'Jerin Jacob' > , "tho...@monjalon.net" > , "Wiles, Keith" > Subject: Re: Service lcores and Application lcores > User-Agent: Mutt/1.8.1 (2017-04-11) > > On Thu, Jun 29, 2017 at 03:36:04PM +0100, Van Haaren, Harry wrote: > > Hi All, > > > > > > The recently posted service cores patchset[1], introduces service lcores to > > run services for DPDK applications. Services are just an ordinary function > > for eg: eventdev scheduling, NIC RX, statistics and monitoring, etc. A > > service is just a callback function, which a core invokes. An atomic > > ensures that services that are > > non-multi-thread-safe are never concurrently invoked. > > > > The topic of discussion in this thread is how we can ensure that > > application lcores do not interfere with service cores. I have a solution > > described below, opinions welcome. > > > > > > Regards, -Harry > > > > > > PS: This discussion extends that in the ML thread here[2], participants of > > that thread added to CC. > > > > [1] Service Cores v2 patchset > > http://dpdk.org/dev/patchwork/bundle/hvanhaar/service_cores_v2/ > > [2] http://dpdk.org/ml/archives/dev/2017-June/069290.html > > > > > > > > > > > > > > A proposal for Eventdev, to ensure Service lcores and Application lcores > > play nice; > > > > 1) Application lcores must not directly call rte_eventdev_schedule() > > 2A) Service cores are the proper method to run services > > 2B) If an application insists on running a service "manually" on an app > > lcore, we provide a function for that: > > rte_service_run_from_app_lcore(struct service *srv); > > > > The above function would allow a pesky app to run services on its own > > (non-service core) lcores, but > > does so through the service-core framework, allowing the service-library > > atomic to keep access serialized as required for non-multi-thread-safe > > services. > > > > The above solution maintains the option of running the eventdev PMD as now > > (single-core dedicated to a single service), while providing correct > > serialization by using the rte_service_run_from_app_lcore() function. Given > > the atomic is only used when required (multiple cores mapped to the > > service) there should be no performance delta. > > > > Given that the application should not invoke rte_eventdev_schedule(), we > > could even consider removing it from the Eventdev API. A PMD that requires > > cycles registers a service, and an application can use a service core or > > the run_from_app_lcore() function if it wishes to invoke that service on an > > application owned lcore. > > > > > > Opinions? > > I would be in favour of this proposal, except for the proposed name for > the new function. It would be useful for an app to be able to "adopt" a > service into it's main loop if so desired. If we do this, I think I'd +1 Agree with Harry and Bruce here. I think, The adapter function should take "struct service *" and return lcore_function_t so that it can run using exiting rte_eal_remote_launch() > also support the removal of a dedicated schedule call from the eventdev > API, or alternatively, if it is needed by other PMDs, leave it as a > no-op in the sw PMD in favour of the service-cores managed function. I would be in favor of removing eventdev schedule and RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED capability so that it is completely transparent to application whether scheduler runs on HW or SW or "combination of both" > > /Bruce
Re: [dpdk-dev] [PATCH v4 0/5] Support NIC reset and keep same port id
Tested-by: Peng, Yuan - Tested commit bbe569daa7e99b36d44b12bb3d23ddfbc26d383c+the 5 patches. - OS: 4.8.6-300.fc25.x86_64 - GCC: gcc version 6.2.1 20160916 (Red Hat 6.2.1-2) (GCC) - CPU: Intel(R) Xeon(R) CPU E5-2699 v3 @ 2.30GHz - NIC: Ethernet controller [0200]: Intel Corporation Ethernet Controller 10G X550T [8086:1563] (rev 01) - Default x86_64-native-linuxapp-gcc configuration - Prerequisites: - Total 1cases, 1 passed, 0 failed Steps: DUT: 1. echo 2 >/sys/bus/pci/devices/:83:00.0/sriov_numvfs ./usertools/dpdk-devbind.py -b vfio-pci 83:10.0 83:10.2 ./x86_64-native-linuxapp-gcc/app/testpmd -c 0x3 -n 4 -- -i 2.testpmd> set verbose 1 testpmd> set fwd mac testpmd> start tester: scapy sendp([Ether(dst="02:09:C0:63:DA:4B")/IP()/UDP()], iface="ens6f0", count=1) dut: testpmd>show port stats all port0 can fwd the packet normally testpmd>show port info all show port number, PCI addr and MAC addr 3. ifconfig ens801f0 down Port 0: Interrupt reset event Port 1: Interrupt reset event ifconfig ens801f0 up 4.testpmd> stop 5. testpmd> port reset all Resetting ports... Finish resetting Port 0 with PCI Address: :83:10.0 Finish resetting Port 1 with PCI Address: :83:10.2 Done 6. testpmd> port stop all Stopping ports... Checking link statuses... Done testpmd> port start all Configuring Port 0 (socket 1) with PCI Address: :83:10.0 Port 0: 02:09:C0:63:DA:4B Configuring Port 1 (socket 1) with PCI Address: :83:10.2 Port 1: 02:09:C0:37:93:6F Checking link statuses... Done 7. testpmd> show port info all confirm same mapping of port id and PCI address. 8.testpmd> start Tester: scapy sendp([Ether(dst="02:09:C0:63:DA:4B")/IP()/UDP()], iface="ens6f0", count=1) dut: testpmd>show port stats all port0 can fwd the packet normally 9.repeat step3 to step8, the same result. -Original Message- From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Wei Dai Sent: Thursday, June 29, 2017 10:58 PM To: tho...@monjalon.net; Lu, Wenzhuo ; Ananyev, Konstantin ; Zhang, Helin ; Wu, Jingjing ; yuan.pntel@dpdk.org Cc: dev@dpdk.org; Dai, Wei Subject: [dpdk-dev] [PATCH v4 0/5] Support NIC reset and keep same port id Sometimes a port have to be reset. For example PF is reset, all its VF should also be reset. After reset, if the port goes through PCI remove() and then PCI probe() for restoration, its port id may be changed and this is not expected by some customer DPDK application. Normally, PCI probe() includes two parts: one is in rte_ethdev layer and the other is calling PMD dev_init(). PCI remove( ) release all resource allocated from rte_ethdev layer in PCI probe( ) and calls PMD dev_unit( ). To keep same port id and reset the port, only dev_uninit() and dev_init( ) in PMD can be called and keep all resources allocated from rte_ethdev layer poart in PCI probe( ). New rte_eth_dev_reset( ) calls rte_eth_dev_stop( ), PMD dev_uninit( ) and then PMD dev_init( ) to reset a port and keep same port id. And then application can go through rte_eth_dev_configure( ), rte_eth_rx_queue_setup( ), rte_eth_tx_queue_setup( ) and rte_eth_dev_start( ) again to restore its previous settings or to reconfigure itself with different settings. To test this new feature, a testpmd command "port reset port_id" is added. The mapping between port number and its PCI address can be monitored to confirm its port number is kept. And following test case can also be used to confirm the port can work again after reset. A typical test steps are listed as follows: For example, run "ifconfig PF-name down" will trigger a reset to VF. 1. run testpmd with 2 ixgbe VF ports belonging to same PF 2. testpmd > set verbose 1 //to observe VF working 3. testpmd > show port info all //show port number, PCI addr and MAC addr 4. testpmd > start 5. let all ports forwarding work for a while 6. testpmd > show port stats all 7. ifconfig name-of-PF down 8. A message is shown in testmd to indicate PF reset 9. ifconfig name-of-PF up 10. testpmd > stop // stop forwarding to avoid crash during reset 11. testpmd > port reset all 12. testpmd > port stop all 13. testpmd > port start all //recofnig all ports 14. testpmd > show port info all //confirm same mapping of port id and PCI addr 15. testpmd > start // restore forwarding 14. let all ports forwarding work for a while 15. testpmd > show port stats all //confirm all port can work again 16. repeat above step 7 - 15 chagnes: v4: add PCI address to confirm its port number keep same correct test method in cover letter v3: update testpmd command v2: only reset PMD layer resource and keep same port id, but not restore settings Wei Dai (5): ethdev: add support of NIC reset net/ixgbe: add support of reset net/i40e: add support of reset app/testpmd: display PCI address in port info app/testpmd: enhance command to test NIC reset app/test-pmd/cmdline.c | 10 -- app/test-pmd/config.c | 5 +++ app/test-pmd/testpmd.c
Re: [dpdk-dev] [PATCH v4 5/5] app/testpmd: enhance command to test NIC reset
Tested-by: Peng, Yuan
- Tested commit bbe569daa7e99b36d44b12bb3d23ddfbc26d383c+the 5 patches.
- OS: 4.8.6-300.fc25.x86_64
- GCC: gcc version 6.2.1 20160916 (Red Hat 6.2.1-2) (GCC)
- CPU: Intel(R) Xeon(R) CPU E5-2699 v3 @ 2.30GHz
- NIC: Ethernet controller [0200]: Intel Corporation Ethernet Controller 10G
X550T [8086:1563] (rev 01)
- Default x86_64-native-linuxapp-gcc configuration
- Prerequisites:
- Total 1cases, 1 passed, 0 failed
Steps:
DUT:
1. echo 2 >/sys/bus/pci/devices/:83:00.0/sriov_numvfs
./usertools/dpdk-devbind.py -b vfio-pci 83:10.0 83:10.2
./x86_64-native-linuxapp-gcc/app/testpmd -c 0x3 -n 4 -- -i
2.testpmd> set verbose 1
testpmd> set fwd mac
testpmd> start
tester:
scapy
sendp([Ether(dst="02:09:C0:63:DA:4B")/IP()/UDP()], iface="ens6f0", count=1)
dut:
testpmd>show port stats all
port0 can fwd the packet normally
testpmd>show port info all
show port number, PCI addr and MAC addr
3. ifconfig ens801f0 down
Port 0: Interrupt reset event
Port 1: Interrupt reset event
ifconfig ens801f0 up
4.testpmd> stop
5. testpmd> port reset all
Resetting ports...
Finish resetting Port 0 with PCI Address: :83:10.0 Finish resetting Port 1
with PCI Address: :83:10.2 Done
6. testpmd> port stop all
Stopping ports...
Checking link statuses...
Done
testpmd> port start all
Configuring Port 0 (socket 1) with PCI Address: :83:10.0 Port 0:
02:09:C0:63:DA:4B Configuring Port 1 (socket 1) with PCI Address: :83:10.2
Port 1: 02:09:C0:37:93:6F Checking link statuses...
Done
7. testpmd> show port info all
confirm same mapping of port id and PCI address.
8.testpmd> start
Tester:
scapy
sendp([Ether(dst="02:09:C0:63:DA:4B")/IP()/UDP()], iface="ens6f0", count=1)
dut:
testpmd>show port stats all
port0 can fwd the packet normally
9.repeat step3 to step8, the same result.
-Original Message-
From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Wei Dai
Sent: Thursday, June 29, 2017 10:58 PM
To: tho...@monjalon.net; Lu, Wenzhuo ; Ananyev,
Konstantin ; Zhang, Helin
; Wu, Jingjing ;
yuan.pntel@dpdk.org
Cc: dev@dpdk.org; Dai, Wei
Subject: [dpdk-dev] [PATCH v4 5/5] app/testpmd: enhance command to test NIC
reset
When PF is reset, a message will show it and all its VF need to be reset.
User can run the command "port reset port_id"
to reset the VF port and to keep same port id without any configuration. Then
user can run "port stop port_id"
and "port start port_id" to reconfigure its forwarding mode and parmaters as
previous ones.
To avoid crash, current forwarding should be stopped before running "port reset
port_id".
Signed-off-by: Wei Dai
---
app/test-pmd/cmdline.c | 10 ++---
app/test-pmd/testpmd.c | 61 +++---
app/test-pmd/testpmd.h | 1 +
3 files changed, 66 insertions(+), 6 deletions(-)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c index
ff8ffd2..58ba6e4 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -950,6 +950,8 @@ static void cmd_operate_port_parsed(void *parsed_result,
stop_port(RTE_PORT_ALL);
else if (!strcmp(res->name, "close"))
close_port(RTE_PORT_ALL);
+ else if (!strcmp(res->name, "reset"))
+ reset_port(RTE_PORT_ALL);
else
printf("Unknown parameter\n");
}
@@ -959,7 +961,7 @@ cmdline_parse_token_string_t cmd_operate_port_all_cmd =
"port");
cmdline_parse_token_string_t cmd_operate_port_all_port =
TOKEN_STRING_INITIALIZER(struct cmd_operate_port_result, name,
- "start#stop#close");
+ "start#stop#close#reset");
cmdline_parse_token_string_t cmd_operate_port_all_all =
TOKEN_STRING_INITIALIZER(struct cmd_operate_port_result, value, "all");
@@ -994,6 +996,8 @@ static void cmd_operate_specific_port_parsed(void
*parsed_result,
stop_port(res->value);
else if (!strcmp(res->name, "close"))
close_port(res->value);
+ else if (!strcmp(res->name, "reset"))
+ reset_port(res->value);
else
printf("Unknown parameter\n");
}
@@ -1003,7 +1007,7 @@ cmdline_parse_token_string_t
cmd_operate_specific_port_cmd =
keyword, "port");
cmdline_parse_token_string_t cmd_operate_specific_port_port =
TOKEN_STRING_INITIALIZER(struct cmd_operate_specific_port_result,
- name, "start#stop#close");
+ name, "start#stop#close#reset");
cmdline_parse_token_num_t cmd_operate_specific_port_id =
TOKEN_NUM_INITIALIZER(struct cmd_operate_specific_port_result,
value, UINT8);
@@ -1011,7 +1015,7 @@ cmdline_parse_token_num_t cmd_operate_specific_port_id =
cmdline_parse_inst_t cmd_op
Re: [dpdk-dev] [PATCH] crypto/qat: fix typo
> -Original Message-
> From: Jain, Deepak K
> Sent: Thursday, June 29, 2017 8:46 PM
> To: De Lara Guarch, Pablo ; Trahe, Fiona
> ; Griffin, John
> Cc: dev@dpdk.org; sta...@dpdk.org
> Subject: RE: [PATCH] crypto/qat: fix typo
>
>
>
> > -Original Message-
> > From: De Lara Guarch, Pablo
> > Sent: Thursday, June 29, 2017 12:16 PM
> > To: Trahe, Fiona ; Griffin, John
> > ; Jain, Deepak K
> > Cc: dev@dpdk.org; De Lara Guarch, Pablo
> > ; sta...@dpdk.org
> > Subject: [PATCH] crypto/qat: fix typo
> >
> > Fixed a comment in QAT, referring to the IV size for AES-GCM, that
> > should be in bytes, and not bits.
> >
> > Fixes: 53d8971cbe81 ("qat: fix AES-GCM decryption")
> > CC: sta...@dpdk.org
> >
> > Signed-off-by: Pablo de Lara
> > ---
> > --
> > 2.9.4
> Acked-by: Deepak Kumar Jain
Applied to dpdk-next-crypto.
Pablo
[dpdk-dev] [PATCH v9 3/3] app/testpmd: enable TCP/IPv4 GRO
This patch enables TCP/IPv4 GRO library in csum forwarding engine.
By default, GRO is turned off. Users can use command "gro (on|off)
(port_id)" to enable or disable GRO for a given port. If a port is
enabled GRO, all TCP/IPv4 packets received from the port are performed
GRO. Besides, users can set max flow number and packets number per-flow
by command "gro set (max_flow_num) (max_item_num_per_flow) (port_id)".
Signed-off-by: Jiayu Hu
Reviewed-by: Jingjing Wu
---
app/test-pmd/cmdline.c | 125
app/test-pmd/config.c | 37
app/test-pmd/csumonly.c | 5 ++
app/test-pmd/testpmd.c | 3 +
app/test-pmd/testpmd.h | 11 +++
doc/guides/testpmd_app_ug/testpmd_funcs.rst | 34
6 files changed, 215 insertions(+)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index ff8ffd2..cb359e1 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -76,6 +76,7 @@
#include
#include
#include
+#include
#include
#include
@@ -419,6 +420,14 @@ static void cmd_help_long_parsed(void *parsed_result,
"tso show (portid)"
"Display the status of TCP Segmentation
Offload.\n\n"
+ "gro (on|off) (port_id)"
+ "Enable or disable Generic Receive Offload in io"
+ " forward engine.\n\n"
+
+ "gro set (max_flow_num) (max_item_num_per_flow)
(port_id)\n"
+ "Set max flow number and max packet number per-flow"
+ " for GRO.\n\n"
+
"set fwd (%s)\n"
"Set packet forwarding mode.\n\n"
@@ -3827,6 +3836,120 @@ cmdline_parse_inst_t cmd_tunnel_tso_show = {
},
};
+/* *** SET GRO FOR A PORT *** */
+struct cmd_gro_result {
+ cmdline_fixed_string_t cmd_keyword;
+ cmdline_fixed_string_t mode;
+ uint8_t port_id;
+};
+
+static void
+cmd_enable_gro_parsed(void *parsed_result,
+ __attribute__((unused)) struct cmdline *cl,
+ __attribute__((unused)) void *data)
+{
+ struct cmd_gro_result *res;
+
+ res = parsed_result;
+ setup_gro(res->mode, res->port_id);
+}
+
+cmdline_parse_token_string_t cmd_gro_keyword =
+ TOKEN_STRING_INITIALIZER(struct cmd_gro_result,
+ cmd_keyword, "gro");
+cmdline_parse_token_string_t cmd_gro_mode =
+ TOKEN_STRING_INITIALIZER(struct cmd_gro_result,
+ mode, "on#off");
+cmdline_parse_token_num_t cmd_gro_pid =
+ TOKEN_NUM_INITIALIZER(struct cmd_gro_result,
+ port_id, UINT8);
+
+cmdline_parse_inst_t cmd_enable_gro = {
+ .f = cmd_enable_gro_parsed,
+ .data = NULL,
+ .help_str = "gro (on|off) (port_id)",
+ .tokens = {
+ (void *)&cmd_gro_keyword,
+ (void *)&cmd_gro_mode,
+ (void *)&cmd_gro_pid,
+ NULL,
+ },
+};
+
+/* *** SET MAX FLOW NUMBER AND ITEM NUM PER FLOW FOR GRO *** */
+struct cmd_gro_set_result {
+ cmdline_fixed_string_t gro;
+ cmdline_fixed_string_t mode;
+ uint16_t flow_num;
+ uint16_t item_num_per_flow;
+ uint8_t port_id;
+};
+
+static void
+cmd_gro_set_parsed(void *parsed_result,
+ __attribute__((unused)) struct cmdline *cl,
+ __attribute__((unused)) void *data)
+{
+ struct cmd_gro_set_result *res = parsed_result;
+
+ if (port_id_is_invalid(res->port_id, ENABLED_WARN))
+ return;
+ if (test_done == 0) {
+ printf("Before set GRO flow_num and item_num_per_flow,"
+ " please stop forwarding first\n");
+ return;
+ }
+
+ if (!strcmp(res->mode, "set")) {
+ if (res->flow_num == 0)
+ printf("Invalid flow number. Revert to default value:"
+ " %u.\n", GRO_DEFAULT_FLOW_NUM);
+ else
+ gro_ports[res->port_id].param.max_flow_num =
+ res->flow_num;
+
+ if (res->item_num_per_flow == 0)
+ printf("Invalid item number per-flow. Revert"
+ " to default value:%u.\n",
+ GRO_DEFAULT_ITEM_NUM_PER_FLOW);
+ else
+ gro_ports[res->port_id].param.max_item_per_flow =
+ res->item_num_per_flow;
+ }
+}
+
+cmdline_parse_token_string_t cmd_gro_set_gro =
+ TOKEN_STRING_INITIALIZER(struct cmd_gro_set_result,
+ gro, "gro");
+cmdline_parse_token_string_t cmd_gro_set_mode =
+ TOKEN_STRING_INITIALIZER(struct cmd_gro_set_result,
+ mode, "set");
+cmdline
[dpdk-dev] [PATCH v9 0/3] Support TCP/IPv4 GRO in DPDK
Generic Receive Offload (GRO) is a widely used SW-based offloading technique to reduce per-packet processing overhead. It gains performance by reassembling small packets into large ones. Therefore, we propose to support GRO in DPDK. To enable more flexibility to applications, DPDK GRO is implemented as a user library. Applications explicitly use the GRO library to merge small packets into large ones. DPDK GRO provides two reassembly modes: lightweight mode and heavyweight mode. If applications want to merge packets in a simple way and the number of packets is small, they can select the lightweight mode API. If applications need more fine-grained controls, they can select the heavyweight mode API. This patchset is to support TCP/IPv4 GRO in DPDK. The first patch is to provide a GRO API framework. The second patch is to support TCP/IPv4 GRO. The last patch is to enable TCP/IPv4 GRO in testpmd. We perform many iperf tests to see the performance gains from DPDK GRO. The test environment is: a. two 25Gbps physical ports (p0 and p1) are linked together. Assign p0 to one networking namespace and assign p1 to DPDK; b. enable TSO for p0. Run iperf client on p0; c. launch testpmd with p1 and a vhost-user port, and run it in csum forwarding mode. Select TCP HW checksum calculation for the vhost-user port in csum forwarding engine. And for better performance, we select IPv4 and TCP HW checksum calculation for p1 too; d. launch a VM with one CPU core and a virtio-net port. The VM OS is ubuntu 16.04 whose virtio-net driver supports GRO. Enables RX csum offloading and mrg_rxbuf for the VM. Iperf server runs in the VM; e. to run iperf tests, we need to avoid the csum forwarding engine compulsorily changes packet mac addresses. SO in our tests, we comment these codes out (line701 ~ line704 in csumonly.c). In each test, we run iperf with the following three configurations: - single flow and single TCP client thread - multiple flows and single TCP client thread - single flow and parallel TCP client threads We run above iperf tests on three scenarios: s1: disabling kernel GRO and enabling DPDK GRO s2: disabling kernel GRO and disabling DPDK GRO s3: enabling kernel GRO and disabling DPDK GRO Comparing the throughput of s1 with s2, we can see the performance gains from DPDK GRO. Comparing the throughput of s1 and s3, we can compare DPDK GRO performance with kernel GRO performance. Test results: - DPDK GRO throughput is almost 2 times than the throughput of no DPDK GRO and no kernel GRO; - DPDK GRO throughput is almost 1.2 times than the throughput of kernel GRO. Change log == v9: - avoid defining variable size structure array and memset variable size in rte_gro_reassemble_burst - change internal structure name from 'te_gro_tbl' to 'gro_tbl' - delete useless variables in rte_gro_tcp.c v8: - merge rte_gro_flush and rte_gro_timeout_flush together and optimize flushing operation - enable rte_gro_reassemble to process N inputted packets - add rte_gro_tbl_item_num to get packet num in the GRO table - add 'lastseg' to struct gro_tcp_item to get last segment faster - add operations to handle rte_malloc failure - use mbuf->l2_len/l3_len/l4_len instead of parsing header - remove 'is_groed' and 'is_valid' in struct gro_tcp_item - fix bugs in gro_tcp4_reassemble - pass start-time as a parameter to avoid frequently calling rte_rdtsc - modify rte_gro_tbl_create prototype - add 'RTE_' to external macros - remove 'goto' - remove inappropriate 'const' - hide internal variables v7: - add a macro 'GRO_MAX_BURST_ITEM_NUM' to avoid stack overflow in rte_gro_reassemble_burst - change macro name (_NB to _NUM) - add '#ifdef __cplusplus ...' in rte_gro.h v6: - avoid checksum validation and calculation - enable to process IP fragmented packets - add a command in testpmd - update documents - modify rte_gro_timeout_flush and rte_gro_reassemble_burst - rename veriable name v5: - fix some bugs - fix coding style issues v4: - implement DPDK GRO as an application-used library - introduce lightweight and heavyweight working modes to enable fine-grained controls to applications - replace cuckoo hash tables with simpler table structure v3: - fix compilation issues. v2: - provide generic reassembly function; - implement GRO as a device ability: add APIs for devices to support GRO; add APIs for applications to enable/disable GRO; - update testpmd example. Jiayu Hu (3): lib: add Generic Receive Offload API framework lib/gro: add TCP/IPv4 GRO support app/testpmd: enable TCP/IPv4 GRO app/test-pmd/cmdline.c | 125 + app/test-pmd/config.c | 37 +++ app/test-pmd/csumonly.c | 5 + app/test-pmd/testpmd.c | 3 + app/test-pmd/testpmd.h
[dpdk-dev] [PATCH v9 1/3] lib: add Generic Receive Offload API framework
Generic Receive Offload (GRO) is a widely used SW-based offloading technique to reduce per-packet processing overhead. It gains performance by reassembling small packets into large ones. This patchset is to support GRO in DPDK. To support GRO, this patch implements a GRO API framework. To enable more flexibility to applications, DPDK GRO is implemented as a user library. Applications explicitly use the GRO library to merge small packets into large ones. DPDK GRO provides two reassembly modes. One is called lightweight mode, the other is called heavyweight mode. If applications want to merge packets in a simple way and the number of packets is relatively small, they can use the lightweight mode. If applications need more fine-grained controls, they can choose the heavyweight mode. rte_gro_reassemble_burst is the main reassembly API which is used in lightweight mode and processes N packets at a time. For applications, performing GRO in lightweight mode is simple. They just need to invoke rte_gro_reassemble_burst. Applications can get GROed packets as soon as rte_gro_reassemble_burst returns. rte_gro_reassemble is the main reassembly API which is used in heavyweight mode and tries to merge N inputted packets with the packets in a givn GRO table. For applications, performing GRO in heavyweight mode is relatively complicated. Before performing GRO, applications need to create a GRO table by rte_gro_tbl_create. Then they can use rte_gro_reassemble to merge packets. The GROed packets are in the GRO table. If applications want to get them, applications need to manually flush them by flush API. Signed-off-by: Jiayu Hu --- config/common_base | 5 ++ lib/Makefile | 2 + lib/librte_gro/Makefile| 50 +++ lib/librte_gro/rte_gro.c | 176 + lib/librte_gro/rte_gro.h | 176 + lib/librte_gro/rte_gro_version.map | 12 +++ mk/rte.app.mk | 1 + 7 files changed, 422 insertions(+) create mode 100644 lib/librte_gro/Makefile create mode 100644 lib/librte_gro/rte_gro.c create mode 100644 lib/librte_gro/rte_gro.h create mode 100644 lib/librte_gro/rte_gro_version.map diff --git a/config/common_base b/config/common_base index f6aafd1..167f5ef 100644 --- a/config/common_base +++ b/config/common_base @@ -712,6 +712,11 @@ CONFIG_RTE_LIBRTE_VHOST_DEBUG=n CONFIG_RTE_LIBRTE_PMD_VHOST=n # +# Compile GRO library +# +CONFIG_RTE_LIBRTE_GRO=y + +# #Compile Xen domain0 support # CONFIG_RTE_LIBRTE_XEN_DOM0=n diff --git a/lib/Makefile b/lib/Makefile index 07e1fd0..ac1c2f6 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -106,6 +106,8 @@ DIRS-$(CONFIG_RTE_LIBRTE_REORDER) += librte_reorder DEPDIRS-librte_reorder := librte_eal librte_mempool librte_mbuf DIRS-$(CONFIG_RTE_LIBRTE_PDUMP) += librte_pdump DEPDIRS-librte_pdump := librte_eal librte_mempool librte_mbuf librte_ether +DIRS-$(CONFIG_RTE_LIBRTE_GRO) += librte_gro +DEPDIRS-librte_gro := librte_eal librte_mbuf librte_ether librte_net ifeq ($(CONFIG_RTE_EXEC_ENV_LINUXAPP),y) DIRS-$(CONFIG_RTE_LIBRTE_KNI) += librte_kni diff --git a/lib/librte_gro/Makefile b/lib/librte_gro/Makefile new file mode 100644 index 000..7e0f128 --- /dev/null +++ b/lib/librte_gro/Makefile @@ -0,0 +1,50 @@ +# BSD LICENSE +# +# Copyright(c) 2017 Intel Corporation. All rights reserved. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# * Neither the name of Intel Corporation nor the names of its +# contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF TH
[dpdk-dev] [PATCH v9 2/3] lib/gro: add TCP/IPv4 GRO support
In this patch, we introduce five APIs to support TCP/IPv4 GRO.
- gro_tcp_tbl_create: create a TCP reassembly table, which is used to
merge packets.
- gro_tcp_tbl_destroy: free memory space of a TCP reassembly table.
- gro_tcp_tbl_timeout_flush: flush timeout packets from a TCP
reassembly table.
- gro_tcp_tbl_item_num: return the number of packets in a TCP reassembly
table.
- gro_tcp4_reassemble: reassemble an inputted TCP/IPv4 packet.
TCP/IPv4 GRO API assumes all inputted packets are with correct IPv4
and TCP checksums. And TCP/IPv4 GRO API doesn't update IPv4 and TCP
checksums for merged packets. If inputted packets are IP fragmented,
TCP/IPv4 GRO API assumes they are complete packets (i.e. with L4
headers).
In TCP GRO, we use a table structure, called TCP reassembly table, to
reassemble packets. Both TCP/IPv4 and TCP/IPv6 GRO use the same table
structure. A TCP reassembly table includes a key array and a item array,
where the key array keeps the criteria to merge packets and the item
array keeps packet information.
One key in the key array points to an item group, which consists of
packets which have the same criteria value. If two packets are able to
merge, they must be in the same item group. Each key in the key array
includes two parts:
- criteria: the criteria of merging packets. If two packets can be
merged, they must have the same criteria value.
- start_index: the index of the first incoming packet of the item group.
Each element in the item array keeps the information of one packet. It
mainly includes two parts:
- pkt: packet address
- next_pkt_index: the index of the next packet in the same item group.
All packets in the same item group are chained by next_pkt_index.
With next_pkt_index, we can locate all packets in the same item
group one by one.
To process an incoming packet needs three steps:
a. check if the packet should be processed. Packets with the following
properties won't be processed:
- packets without data (e.g. SYN, SYN-ACK)
b. traverse the key array to find a key which has the same criteria
value with the incoming packet. If find, goto step c. Otherwise,
insert a new key and insert the packet into the item array.
c. locate the first packet in the item group via the start_index in the
key. Then traverse all packets in the item group via next_pkt_index.
If find one packet which can merge with the incoming one, merge them
together. If can't find, insert the packet into this item group.
Signed-off-by: Jiayu Hu
---
doc/guides/rel_notes/release_17_08.rst | 7 +
lib/librte_gro/Makefile| 1 +
lib/librte_gro/rte_gro.c | 123 --
lib/librte_gro/rte_gro.h | 6 +-
lib/librte_gro/rte_gro_tcp.c | 395 +
lib/librte_gro/rte_gro_tcp.h | 172 ++
6 files changed, 690 insertions(+), 14 deletions(-)
create mode 100644 lib/librte_gro/rte_gro_tcp.c
create mode 100644 lib/librte_gro/rte_gro_tcp.h
diff --git a/doc/guides/rel_notes/release_17_08.rst
b/doc/guides/rel_notes/release_17_08.rst
index 842f46f..f067247 100644
--- a/doc/guides/rel_notes/release_17_08.rst
+++ b/doc/guides/rel_notes/release_17_08.rst
@@ -75,6 +75,13 @@ New Features
Added support for firmwares with multiple Ethernet ports per physical port.
+* **Add Generic Receive Offload API support.**
+
+ Generic Receive Offload (GRO) API supports to reassemble TCP/IPv4
+ packets. GRO API assumes all inputted packets are with correct
+ checksums. GRO API doesn't update checksums for merged packets. If
+ inputted packets are IP fragmented, GRO API assumes they are complete
+ packets (i.e. with L4 headers).
Resolved Issues
---
diff --git a/lib/librte_gro/Makefile b/lib/librte_gro/Makefile
index 7e0f128..e89344d 100644
--- a/lib/librte_gro/Makefile
+++ b/lib/librte_gro/Makefile
@@ -43,6 +43,7 @@ LIBABIVER := 1
# source files
SRCS-$(CONFIG_RTE_LIBRTE_GRO) += rte_gro.c
+SRCS-$(CONFIG_RTE_LIBRTE_GRO) += rte_gro_tcp.c
# install this header file
SYMLINK-$(CONFIG_RTE_LIBRTE_GRO)-include += rte_gro.h
diff --git a/lib/librte_gro/rte_gro.c b/lib/librte_gro/rte_gro.c
index 648835b..993cf29 100644
--- a/lib/librte_gro/rte_gro.c
+++ b/lib/librte_gro/rte_gro.c
@@ -32,8 +32,11 @@
#include
#include
+#include
+#include
#include "rte_gro.h"
+#include "rte_gro_tcp.h"
typedef void *(*gro_tbl_create_fn)(uint16_t socket_id,
uint16_t max_flow_num,
@@ -41,9 +44,12 @@ typedef void *(*gro_tbl_create_fn)(uint16_t socket_id,
typedef void (*gro_tbl_destroy_fn)(void *tbl);
typedef uint32_t (*gro_tbl_item_num_fn)(void *tbl);
-static gro_tbl_create_fn tbl_create_functions[RTE_GRO_TYPE_MAX_NUM];
-static gro_tbl_destroy_fn tbl_destroy_functions[RTE_GRO_TYPE_MAX_NUM];
-static gro_tbl_item_num_fn tbl_item_num_functions[RTE_GRO_TYPE_MAX_NUM];
+static gro_tbl_create_fn tbl_create_functions[RTE_GRO_TYPE_MAX_NUM] = {
+ gro_tc
Re: [dpdk-dev] [PATCH v2 4/5] app/testpmd: add command to test NIC reset
> -Original Message-
> From: Wu, Jingjing
> Sent: Wednesday, June 28, 2017 5:11 PM
> To: Dai, Wei ; tho...@monjalon.net; Lu, Wenzhuo
> ; Ananyev, Konstantin
> ; Zhang, Helin
> Cc: dev@dpdk.org
> Subject: RE: [PATCH v2 4/5] app/testpmd: add command to test NIC reset
>
>
>
> > -Original Message-
> > From: Dai, Wei
> > Sent: Tuesday, June 27, 2017 10:07 PM
> > To: tho...@monjalon.net; Lu, Wenzhuo ; Ananyev,
> > Konstantin ; Zhang, Helin
> > ; Wu, Jingjing
> > Cc: dev@dpdk.org; Dai, Wei
> > Subject: [PATCH v2 4/5] app/testpmd: add command to test NIC reset
> >
> > When a NIC is reset, a message will show it.
> > And then user can run the command "reset_port port_id"
> > to process it.
> >
> > Signed-off-by: Wei Dai
> > ---
> > app/test-pmd/cmdline.c | 31 +++
> > app/test- pmd/config.c | 13 + app/test-pmd/testpmd.h |
> > 1 +
> > 3 files changed, 45 insertions(+)
> >
> > diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c index
> > ff8ffd2..90f6bde 100644
> > --- a/app/test-pmd/cmdline.c
> > +++ b/app/test-pmd/cmdline.c
> > @@ -2588,6 +2588,36 @@ cmdline_parse_inst_t cmd_stop = {
> > },
> > };
> >
> > +/* *** reset a port *** */
> > +struct cmd_reset_port_result {
> > + cmdline_fixed_string_t command;
> > + uint8_t port_id;
> > +};
> > +
> > +static void cmd_reset_port_parsed(__attribute__((unused)) void
> > *parsed_result,
> > + __attribute__((unused)) struct cmdline *cl,
> > + __attribute__((unused)) void *data) {
> > + struct cmd_reset_port_result *res = parsed_result;
> > + reset_port(res->port_id);
> > +}
> > +
> > +cmdline_parse_token_string_t cmd_reset_port_cmd =
> > + TOKEN_STRING_INITIALIZER(struct cmd_reset_port_result, command,
> > +"reset_port"); cmdline_parse_token_num_t cmd_reset_port_id =
> > + TOKEN_NUM_INITIALIZER(struct cmd_reset_port_result, port_id,
> > UINT8);
> > +
> > +cmdline_parse_inst_t cmd_reset_port = {
> > + .f = cmd_reset_port_parsed,
> > + .data = NULL,
> > + .help_str = "reset_port ",
>
> You can just add one more option in the commands "port start|stop|close
> " and " port start|stop|close all"
> To "port start|stop|close|reset " and " port start|stop|close|reset
> all" instead of defining a new one.
Thanks for your feedback.
V3 patch set will follow your guide.
Re: [dpdk-dev] [PATCH v10 1/2] mem: balanced allocation of hugepages
On 6/29/2017 11:29 AM, Ilya Maximets wrote:
Currently EAL allocates hugepages one by one not paying attention
from which NUMA node allocation was done.
Such behaviour leads to allocation failure if number of available
hugepages for application limited by cgroups or hugetlbfs and
memory requested not only from the first socket.
Example:
# 90 x 1GB hugepages availavle in a system
cgcreate -g hugetlb:/test
# Limit to 32GB of hugepages
cgset -r hugetlb.1GB.limit_in_bytes=34359738368 test
# Request 4GB from each of 2 sockets
cgexec -g hugetlb:test testpmd --socket-mem=4096,4096 ...
EAL: SIGBUS: Cannot mmap more hugepages of size 1024 MB
EAL: 32 not 90 hugepages of size 1024 MB allocated
EAL: Not enough memory available on socket 1!
Requested: 4096MB, available: 0MB
PANIC in rte_eal_init():
Cannot init memory
This happens beacause all allocated pages are
on socket 0.
Fix this issue by setting mempolicy MPOL_PREFERRED for each hugepage
to one of requested nodes using following schema:
1) Allocate essential hugepages:
1.1) Allocate as many hugepages from numa N to
only fit requested memory for this numa.
1.2) repeat 1.1 for all numa nodes.
2) Try to map all remaining free hugepages in a round-robin
fashion.
3) Sort pages and choose the most suitable.
In this case all essential memory will be allocated and all remaining
pages will be fairly distributed between all requested nodes.
New config option RTE_EAL_NUMA_AWARE_HUGEPAGES introduced and
enabled by default for linuxapp except armv7 and dpaa2.
Enabling of this option adds libnuma as a dependency for EAL.
Fixes: 77988fc08dc5 ("mem: fix allocating all free hugepages")
Signed-off-by: Ilya Maximets
Acked-by: Sergio Gonzalez Monroy
---
config/common_base| 1 +
config/common_linuxapp| 1 +
config/defconfig_arm-armv7a-linuxapp-gcc | 3 +
config/defconfig_arm64-dpaa2-linuxapp-gcc | 3 +
lib/librte_eal/linuxapp/eal/Makefile | 3 +
lib/librte_eal/linuxapp/eal/eal_memory.c | 120 --
mk/rte.app.mk | 3 +
7 files changed, 126 insertions(+), 8 deletions(-)
diff --git a/config/common_base b/config/common_base
index f6aafd1..660588a 100644
--- a/config/common_base
+++ b/config/common_base
@@ -103,6 +103,7 @@ CONFIG_RTE_EAL_ALWAYS_PANIC_ON_ERROR=n
CONFIG_RTE_EAL_IGB_UIO=n
CONFIG_RTE_EAL_VFIO=n
CONFIG_RTE_MALLOC_DEBUG=n
+CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
#
# Recognize/ignore the AVX/AVX512 CPU flags for performance/power testing.
diff --git a/config/common_linuxapp b/config/common_linuxapp
index b3cf41b..64bef87 100644
--- a/config/common_linuxapp
+++ b/config/common_linuxapp
@@ -35,6 +35,7 @@
CONFIG_RTE_EXEC_ENV="linuxapp"
CONFIG_RTE_EXEC_ENV_LINUXAPP=y
+CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=y
CONFIG_RTE_EAL_IGB_UIO=y
CONFIG_RTE_EAL_VFIO=y
CONFIG_RTE_KNI_KMOD=y
diff --git a/config/defconfig_arm-armv7a-linuxapp-gcc
b/config/defconfig_arm-armv7a-linuxapp-gcc
index 19607eb..e06b1d4 100644
--- a/config/defconfig_arm-armv7a-linuxapp-gcc
+++ b/config/defconfig_arm-armv7a-linuxapp-gcc
@@ -47,6 +47,9 @@ CONFIG_RTE_ARCH_STRICT_ALIGN=y
CONFIG_RTE_TOOLCHAIN="gcc"
CONFIG_RTE_TOOLCHAIN_GCC=y
+# NUMA is not supported on ARM
+CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
+
# ARM doesn't have support for vmware TSC map
CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=n
diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc
b/config/defconfig_arm64-dpaa2-linuxapp-gcc
index 2304ab6..f78449d 100644
--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc
+++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc
@@ -45,6 +45,9 @@ CONFIG_RTE_CACHE_LINE_SIZE=64
CONFIG_RTE_PKTMBUF_HEADROOM=256
+# Doesn't support NUMA
+CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
+
#
# Compile Support Libraries for DPAA2
#
diff --git a/lib/librte_eal/linuxapp/eal/Makefile
b/lib/librte_eal/linuxapp/eal/Makefile
index 640afd0..8651e27 100644
--- a/lib/librte_eal/linuxapp/eal/Makefile
+++ b/lib/librte_eal/linuxapp/eal/Makefile
@@ -50,6 +50,9 @@ LDLIBS += -ldl
LDLIBS += -lpthread
LDLIBS += -lgcc_s
LDLIBS += -lrt
+ifeq ($(CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES),y)
+LDLIBS += -lnuma
+endif
# specific to linuxapp exec-env
SRCS-$(CONFIG_RTE_EXEC_ENV_LINUXAPP) := eal.c
diff --git a/lib/librte_eal/linuxapp/eal/eal_memory.c
b/lib/librte_eal/linuxapp/eal/eal_memory.c
index e17c9cb..647d89c 100644
--- a/lib/librte_eal/linuxapp/eal/eal_memory.c
+++ b/lib/librte_eal/linuxapp/eal/eal_memory.c
@@ -54,6 +54,10 @@
#include
#include
#include
+#ifdef RTE_EAL_NUMA_AWARE_HUGEPAGES
+#include
+#include
+#endif
#include
#include
@@ -348,6 +352,14 @@ static int huge_wrap_sigsetjmp(void)
return sigsetjmp(huge_jmpenv, 1);
}
+#ifdef RTE_EAL_NUMA_AWARE_HUGEPAGES
+/* Callback for numa library. */
+
Re: [dpdk-dev] [PATCH 1/3] examples/eventdev_pipeline: added sample app
-Original Message- > Date: Tue, 27 Jun 2017 14:12:20 +0100 > From: "Hunt, David" > To: Jerin Jacob > CC: Harry van Haaren , dev@dpdk.org, Gage Eads > , Bruce Richardson > Subject: Re: [dpdk-dev] [PATCH 1/3] examples/eventdev_pipeline: added > sample app > User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:45.0) Gecko/20100101 > Thunderbird/45.8.0 > > Hi Jerin: > > > On 27/6/2017 10:35 AM, Jerin Jacob wrote: > > -Original Message- > > > Date: Mon, 26 Jun 2017 15:46:47 +0100 > > > From: "Hunt, David" > > > To: Jerin Jacob , Harry van Haaren > > > > > > CC: dev@dpdk.org, Gage Eads , Bruce Richardson > > > > > > Subject: Re: [dpdk-dev] [PATCH 1/3] examples/eventdev_pipeline: added > > > sample app > > > User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:45.0) Gecko/20100101 > > > Thunderbird/45.8.0 > > > > > > Hi Jerin, > > Hi David, > > > > Looks like you have sent the old version. The below mentioned comments > > are not addressed in v2. > > Oops. Glitch in the Matrix. I've just pushed a V3 with the changes. > > > > I'm assisting Harry on the sample app, and have just pushed up a V2 patch > > > based on your feedback. I've addressed most of your suggestions, comments > > > below. There may still a couple of outstanding questions that need further > > > discussion. > > A few general comments: > > 1) Nikhil/Gage's proposal on ethdev rx to eventdev adapter will change the > > major > > portion(eventdev setup and producer()) of this application > > 2) Producing one lcore worth of packets, really cant show as example > > eventdev application as it will be pretty bad in low-end machine. > > At least application infrastructure should not limit. > > > > Considering above points, Should we wait for rx adapter to complete > > first? I would like to show this as real world application to use eventdev. > > > > Thoughts? > > > > On the same note: > > Can we finalize on rx adapter proposal? I can work on v1 of patch and > > common code if Nikhil or Gage don't have bandwidth. Let me know? > > > > last followup: > > http://dpdk.org/ml/archives/dev/2017-June/068776.html > > I had a quick chat with Harry, and wonder if we'd be as well to merge the > app as it is now, and as the new frameworks become available, the app can be > updated to make use of them? I feel it would be better to have something out > there for people to play with than waiting for 17.11. I agree with your concern. How about renaming the test and doc specific to SW PMD and then once we fix the known issues with HW eventdev + ethdev(Rx adapter) integration and then rename the application to generic eventdev. > > Also, if you have bandwidth to patch the app for your desired use cases, > that would be a good contribution. I'd only be guessing for some of it :) > > > > > Regards, > > > Dave > > > > > > On 10/5/2017 3:12 PM, Jerin Jacob wrote: > > > > -Original Message- > > > > > Date: Fri, 21 Apr 2017 10:51:37 +0100 > > > > > From: Harry van Haaren > > > > > To: dev@dpdk.org > > > > > CC: jerin.ja...@caviumnetworks.com, Harry van Haaren > > > > > , Gage Eads , Bruce > > > > > Richardson > > > > > Subject: [PATCH 1/3] examples/eventdev_pipeline: added sample app > > > > > X-Mailer: git-send-email 2.7.4 > > > > > > > > > > This commit adds a sample app for the eventdev library. > > > > > The app has been tested with DPDK 17.05-rc2, hence this > > > > > release (or later) is recommended. > > > > > > > > > > The sample app showcases a pipeline processing use-case, > > > > > with event scheduling and processing defined per stage. > > > > > The application recieves traffic as normal, with each > > > > > packet traversing the pipeline. Once the packet has > > > > > been processed by each of the pipeline stages, it is > > > > > transmitted again. > > > > > > > > > > The app provides a framework to utilize cores for a single > > > > > role or multiple roles. Examples of roles are the RX core, > > > > > TX core, Scheduling core (in the case of the event/sw PMD), > > > > > and worker cores. > > > > > > > > > > Various flags are available to configure numbers of stages, > > > > > cycles of work at each stage, type of scheduling, number of > > > > > worker cores, queue depths etc. For a full explaination, > > > > > please refer to the documentation. > > > > > > > > > > Signed-off-by: Gage Eads > > > > > Signed-off-by: Bruce Richardson > > > > > Signed-off-by: Harry van Haaren > > > > Thanks for the example application to share the SW view. > > > > I could make it run on HW after some tweaking(not optimized though) > > > > > > > > [...] > > > > > +#define MAX_NUM_STAGES 8 > > > > > +#define BATCH_SIZE 16 > > > > > +#define MAX_NUM_CORE 64 > > > > How about RTE_MAX_LCORE? > > > Core usage in the sample app is held in a uint64_t. Adding arrays would be > > > possible, but I feel that the extra effort would not give that much > > > benefit. > > > I've left as is for the moment, unless you see any strong
Re: [dpdk-dev] [PATCH] vhost: fix checking of device features
On 06/29/2017 08:07 AM, Ivan Dyukov wrote:
On 06/28/2017 03:54 PM, Maxime Coquelin wrote:
On 06/28/2017 02:40 PM, Ivan Dyukov wrote:
To compare enabled features in current device we must use bit
mask instead of bit position.
CC: sta...@dpdk.org
Fixes: c843af3aa13e ("vhost: access header only")
Signed-off-by: Ivan Dyukov
---
lib/librte_vhost/virtio_net.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
Thanks for the fix Ivan, and sorry for introducing this bug.
Out of curiosity, did you noticed it because it broke offloading,
or just by code review?
I didn't see any breakages. It's just code review.
Ok, thanks.
Maxime
Re: [dpdk-dev] [PATCH] vhost: fix checking of device features
On 06/29/2017 08:13 AM, Tan, Jianfeng wrote:
-Original Message-
From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Ivan Dyukov
Sent: Wednesday, June 28, 2017 8:41 PM
To: y...@fridaylinux.org; maxime.coque...@redhat.com; dev@dpdk.org
Cc: i.maxim...@samsung.com; heetae82@samsung.com; Ivan Dyukov;
sta...@dpdk.org
Subject: [dpdk-dev] [PATCH] vhost: fix checking of device features
To compare enabled features in current device we must use bit
mask instead of bit position.
CC: sta...@dpdk.org
Fixes: c843af3aa13e ("vhost: access header only")
Signed-off-by: Ivan Dyukov
---
lib/librte_vhost/virtio_net.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/lib/librte_vhost/virtio_net.c b/lib/librte_vhost/virtio_net.c
index ebfda1c..4fae4c1 100644
--- a/lib/librte_vhost/virtio_net.c
+++ b/lib/librte_vhost/virtio_net.c
@@ -601,9 +601,11 @@ static inline bool
virtio_net_with_host_offload(struct virtio_net *dev)
{
if (dev->features &
- (VIRTIO_NET_F_CSUM | VIRTIO_NET_F_HOST_ECN |
-VIRTIO_NET_F_HOST_TSO4 |
VIRTIO_NET_F_HOST_TSO6 |
-VIRTIO_NET_F_HOST_UFO))
+ ((1ULL << VIRTIO_NET_F_CSUM) |
+(1ULL << VIRTIO_NET_F_HOST_ECN) |
+(1ULL << VIRTIO_NET_F_HOST_TSO4) |
+(1ULL << VIRTIO_NET_F_HOST_TSO6) |
+(1ULL << VIRTIO_NET_F_HOST_UFO)))
Another problem in this piece of code, we don't support VIRTIO_NET_F_HOST_ECN
and VIRTIO_NET_F_HOST_UFO in vhost-user. We might consider to remove those two
lines?
It is not really a problem as the feature is never negotiated as not
supported, it would just be a clean-up.
I think we should stick with this version as it targets also -stable.
Another patch could be sent on top to remove these unsupported feature
bits.
Thanks,
Maxime
Thanks,
Jianfeng
return true;
return false;
--
2.7.4
[dpdk-dev] release manager backup
Hi, I would like to propose to have more people able to commit in master branch, and make releases. The goal is to have some backups to make sure there is always someone to take this role in case of accident or long vacations. It will require to well document the procedures and make sure rights are granted. Given the role they have currently in the release process, I suggest to nominate Yuanhan Liu and Ferruh Yigit. Please, can it be discussed and voted during the next Technical Board meeting?
Re: [dpdk-dev] [PATCH] vhost: fix checking of device features
On 06/29/2017 09:21 AM, Maxime Coquelin wrote:
On 06/29/2017 08:07 AM, Ivan Dyukov wrote:
On 06/28/2017 03:54 PM, Maxime Coquelin wrote:
On 06/28/2017 02:40 PM, Ivan Dyukov wrote:
To compare enabled features in current device we must use bit
mask instead of bit position.
CC: sta...@dpdk.org
Fixes: c843af3aa13e ("vhost: access header only")
Signed-off-by: Ivan Dyukov
---
lib/librte_vhost/virtio_net.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
Thanks for the fix Ivan, and sorry for introducing this bug.
Out of curiosity, did you noticed it because it broke offloading,
or just by code review?
I didn't see any breakages. It's just code review.
Ok, thanks.
FYI, I just found another case in vhost.c, sending patch soon.
Cheers,
Maxime
Re: [dpdk-dev] [PATCH v2 2/2] net/i40e: add hot plug monitor in i40e
Agree with jingjing. That patch is definitely not for generic fashion of hot plug, the uevent just give the adding approach to monitor the remove event even if the driver not add it as interrupt , we know mlx driver have already implement the event of remove interrupt into their infinite framework driver, but other driver maybe not yet. So uevent is not unique for i40e or other intel nic, the aim just let more diversity drivers which use pci-uio framework to use the common hot plug feature in DPDK. Best regards, Jeff Guo -Original Message- From: Wu, Jingjing Sent: Thursday, June 29, 2017 12:48 PM To: Stephen Hemminger ; Guo, Jia Cc: Zhang, Helin ; dev@dpdk.org; Chang, Cunyin ; Liang, Cunming Subject: RE: [dpdk-dev] [PATCH v2 2/2] net/i40e: add hot plug monitor in i40e > -Original Message- > From: Stephen Hemminger [mailto:step...@networkplumber.org] > Sent: Thursday, June 29, 2017 11:35 AM > To: Guo, Jia > Cc: Zhang, Helin ; Wu, Jingjing > ; dev@dpdk.org > Subject: Re: [dpdk-dev] [PATCH v2 2/2] net/i40e: add hot plug monitor > in i40e > > On Wed, 28 Jun 2017 19:07:24 +0800 > Jeff Guo wrote: > > > From: "Guo, Jia" > > > > This patch enable the hot plug feature in i40e, by monitoring the > > hot plug uevent of the device. When remove event got, call the app > > callback function to handle the detach process. > > > > Signed-off-by: Guo, Jia > > --- > > Hot plug is good and needed. > > But it needs to be done in a generic fashion in the bus layer. > There is nothing about uevents that are unique to i40e or even Intel devices. > Plus the way hotplug is handled is OS specific, so this isn't going to > work well on BSD. > This patch is not a way to full support hut plug. And we know it is handled in OS specific. This patch just provides a way to tell DPDK user the remove happened on this device (DPDK dev). And Mlx driver already supports that with patch http://dpdk.org/dev/patchwork/patch/23695/ What GuoJia did is just making the EVENT can be process by application through interrupt callback Mechanisms. > Sorry if I sound like a broken record but there has been a repeated > pattern of Intel developers putting their head down (or in the sand) > and creating functionality inside device driver. Sorry, I cannot agree. Thanks Jingjing
Re: [dpdk-dev] [PATCH v5 5/7] bus: add helper to find a bus from a device name
On Wed, Jun 28, 2017 at 7:03 PM, Thomas Monjalon wrote: > 27/06/2017 20:55, Jan Blunck: >> On Wed, Jun 21, 2017 at 1:30 AM, Gaetan Rivet wrote: >> > /** >> > + * Find a bus capable of identifying a device. >> > + * >> > + * @param str >> > + * A device identifier (PCI address, virtual PMD name, ...). >> > + * >> > + * @return >> > + * A valid bus handle if found. >> > + * NULL if no bus is able to parse this device. >> > + */ >> > +struct rte_bus *rte_bus_from_dev(const char *str); >> >> I still don't agree with this. The bus name should be passed >> explicitly by the user of the API. >> >> NAK. > > Please explain why you think the bus name should be explicit. > If the bus is ambiguous, it can be explicited by the user. > > I see some good benefits in being tolerant with the bus/device > representation. It provides a smooth transition to the bus model. > We build libraries. The applications we build with the help of those libraries get notified by the OS about device events. Those devices are chields of their parent bus. At the time the event is fired the OS already knows about: - the bus name (parent) - the device name (child) - additional event parameters (environment) Blame me that I probably spent too much time with Kay Sievers and GregKH to understand that device naming is easy to get wrong. Just look at the hyperv device names and how they switched to the UUID scheme. I don't think that hyperv is the only bus that uses UUID as device identification. We should not codify a policy of how to deduce a bus name from a given device name if that is knowledge that is already present externally. Otherwise I fear this part of the EAL will be subject to constant churn.
[dpdk-dev] [PATCH] vhost: fix MTU device feature check
The MTU feature support check has to be done against MTU
feature bit mask, and not bit position.
Cc: sta...@dpdk.org
Fixes: 72e8543093df ("vhost: add API to get MTU value")
Signed-off-by: Maxime Coquelin
---
This is a follow-up of Ivan's patch, which made me check I didn't
introduced same bug elsewhere.
lib/librte_vhost/vhost.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/librte_vhost/vhost.c b/lib/librte_vhost/vhost.c
index 19c5a43..653152f 100644
--- a/lib/librte_vhost/vhost.c
+++ b/lib/librte_vhost/vhost.c
@@ -272,7 +272,7 @@ rte_vhost_get_mtu(int vid, uint16_t *mtu)
if (!(dev->flags & VIRTIO_DEV_READY))
return -EAGAIN;
- if (!(dev->features & VIRTIO_NET_F_MTU))
+ if (!(dev->features & (1ULL << VIRTIO_NET_F_MTU)))
return -ENOTSUP;
*mtu = dev->mtu;
--
2.9.4
Re: [dpdk-dev] [PATCH] vhost: fix MTU device feature check
> -Original Message-
> From: Maxime Coquelin [mailto:maxime.coque...@redhat.com]
> Sent: Thursday, June 29, 2017 3:58 PM
> To: dev@dpdk.org; y...@fridaylinux.org
> Cc: i.dyu...@samsung.com; Tan, Jianfeng; sta...@dpdk.org; Maxime
> Coquelin
> Subject: [PATCH] vhost: fix MTU device feature check
>
> The MTU feature support check has to be done against MTU
> feature bit mask, and not bit position.
>
> Cc: sta...@dpdk.org
> Fixes: 72e8543093df ("vhost: add API to get MTU value")
>
> Signed-off-by: Maxime Coquelin
Reviewed-by: Jianfeng Tan
Re: [dpdk-dev] [PATCH] vhost: fix checking of device features
> -Original Message-
> From: Maxime Coquelin [mailto:maxime.coque...@redhat.com]
> Sent: Thursday, June 29, 2017 3:27 PM
> To: Tan, Jianfeng; Ivan Dyukov; y...@fridaylinux.org; dev@dpdk.org
> Cc: i.maxim...@samsung.com; heetae82@samsung.com;
> sta...@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH] vhost: fix checking of device features
>
>
>
> On 06/29/2017 08:13 AM, Tan, Jianfeng wrote:
> >
> >
> >> -Original Message-
> >> From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Ivan Dyukov
> >> Sent: Wednesday, June 28, 2017 8:41 PM
> >> To: y...@fridaylinux.org; maxime.coque...@redhat.com; dev@dpdk.org
> >> Cc: i.maxim...@samsung.com; heetae82@samsung.com; Ivan
> Dyukov;
> >> sta...@dpdk.org
> >> Subject: [dpdk-dev] [PATCH] vhost: fix checking of device features
> >>
> >> To compare enabled features in current device we must use bit
> >> mask instead of bit position.
> >>
> >> CC: sta...@dpdk.org
> >> Fixes: c843af3aa13e ("vhost: access header only")
> >>
> >> Signed-off-by: Ivan Dyukov
> >> ---
> >> lib/librte_vhost/virtio_net.c | 8 +---
> >> 1 file changed, 5 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/lib/librte_vhost/virtio_net.c b/lib/librte_vhost/virtio_net.c
> >> index ebfda1c..4fae4c1 100644
> >> --- a/lib/librte_vhost/virtio_net.c
> >> +++ b/lib/librte_vhost/virtio_net.c
> >> @@ -601,9 +601,11 @@ static inline bool
> >> virtio_net_with_host_offload(struct virtio_net *dev)
> >> {
> >>if (dev->features &
> >> - (VIRTIO_NET_F_CSUM | VIRTIO_NET_F_HOST_ECN |
> >> - VIRTIO_NET_F_HOST_TSO4 |
> >> VIRTIO_NET_F_HOST_TSO6 |
> >> - VIRTIO_NET_F_HOST_UFO))
> >> + ((1ULL << VIRTIO_NET_F_CSUM) |
> >> + (1ULL << VIRTIO_NET_F_HOST_ECN) |
> >> + (1ULL << VIRTIO_NET_F_HOST_TSO4) |
> >> + (1ULL << VIRTIO_NET_F_HOST_TSO6) |
> >> + (1ULL << VIRTIO_NET_F_HOST_UFO)))
> >
> > Another problem in this piece of code, we don't support
> VIRTIO_NET_F_HOST_ECN and VIRTIO_NET_F_HOST_UFO in vhost-user. We
> might consider to remove those two lines?
>
> It is not really a problem as the feature is never negotiated as not
> supported, it would just be a clean-up.
Yes, it's a clean-up to avoid confusion.
>
> I think we should stick with this version as it targets also -stable.
>
> Another patch could be sent on top to remove these unsupported feature
> bits.
Agreed.
Thanks,
Jianfeng
>
> Thanks,
> Maxime
>
> > Thanks,
> > Jianfeng
> >
> >
> >>return true;
> >>
> >>return false;
> >> --
> >> 2.7.4
> >
Re: [dpdk-dev] [PATCH v5 5/7] bus: add helper to find a bus from a device name
29/06/2017 09:56, Jan Blunck: > On Wed, Jun 28, 2017 at 7:03 PM, Thomas Monjalon wrote: > > 27/06/2017 20:55, Jan Blunck: > >> On Wed, Jun 21, 2017 at 1:30 AM, Gaetan Rivet > >> wrote: > >> > /** > >> > + * Find a bus capable of identifying a device. > >> > + * > >> > + * @param str > >> > + * A device identifier (PCI address, virtual PMD name, ...). > >> > + * > >> > + * @return > >> > + * A valid bus handle if found. > >> > + * NULL if no bus is able to parse this device. > >> > + */ > >> > +struct rte_bus *rte_bus_from_dev(const char *str); > >> > >> I still don't agree with this. The bus name should be passed > >> explicitly by the user of the API. > >> > >> NAK. > > > > Please explain why you think the bus name should be explicit. > > If the bus is ambiguous, it can be explicited by the user. > > > > I see some good benefits in being tolerant with the bus/device > > representation. It provides a smooth transition to the bus model. > > > > We build libraries. The applications we build with the help of those > libraries get notified by the OS about device events. Those devices > are chields of their parent bus. At the time the event is fired the OS > already knows about: > > - the bus name (parent) > - the device name (child) > - additional event parameters (environment) > > Blame me that I probably spent too much time with Kay Sievers and > GregKH to understand that device naming is easy to get wrong. Just > look at the hyperv device names and how they switched to the UUID > scheme. I don't think that hyperv is the only bus that uses UUID as > device identification. We should not codify a policy of how to deduce > a bus name from a given device name if that is knowledge that is > already present externally. Otherwise I fear this part of the EAL will > be subject to constant churn. OK I understand your point that it is a weak identification. It is as weak as what we have currently. It works at least when we have only PCI and VDEV. However it does not prevent to use a strong identification with bus and parent names. I see rte_bus_from_dev() as a helper to transition to the new strong identification model. So we could remove it in few releases. Does it make sense?
[dpdk-dev] [PATCH v3 2/4] net/ixgbe: add support of reset
Reset a NIC by calling dev_uninit and then dev_init.
Go through same way in NIC PCI remove without release of
ethdev resource and then NIC PCI probe function without
ethdev resource allocation.
Signed-off-by: Wei Dai
---
drivers/net/ixgbe/ixgbe_ethdev.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index ebc5467..5ff8fbe 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -170,6 +170,7 @@ static void ixgbe_dev_stop(struct rte_eth_dev *dev);
static int ixgbe_dev_set_link_up(struct rte_eth_dev *dev);
static int ixgbe_dev_set_link_down(struct rte_eth_dev *dev);
static void ixgbe_dev_close(struct rte_eth_dev *dev);
+static int ixgbe_dev_reset(struct rte_eth_dev *dev);
static void ixgbe_dev_promiscuous_enable(struct rte_eth_dev *dev);
static void ixgbe_dev_promiscuous_disable(struct rte_eth_dev *dev);
static void ixgbe_dev_allmulticast_enable(struct rte_eth_dev *dev);
@@ -264,6 +265,7 @@ static int ixgbevf_dev_configure(struct rte_eth_dev *dev);
static int ixgbevf_dev_start(struct rte_eth_dev *dev);
static void ixgbevf_dev_stop(struct rte_eth_dev *dev);
static void ixgbevf_dev_close(struct rte_eth_dev *dev);
+static int ixgbevf_dev_reset(struct rte_eth_dev *dev);
static void ixgbevf_intr_disable(struct ixgbe_hw *hw);
static void ixgbevf_intr_enable(struct ixgbe_hw *hw);
static void ixgbevf_dev_stats_get(struct rte_eth_dev *dev,
@@ -525,6 +527,7 @@ static const struct eth_dev_ops ixgbe_eth_dev_ops = {
.dev_set_link_up= ixgbe_dev_set_link_up,
.dev_set_link_down = ixgbe_dev_set_link_down,
.dev_close= ixgbe_dev_close,
+ .dev_reset= ixgbe_dev_reset,
.promiscuous_enable = ixgbe_dev_promiscuous_enable,
.promiscuous_disable = ixgbe_dev_promiscuous_disable,
.allmulticast_enable = ixgbe_dev_allmulticast_enable,
@@ -614,6 +617,7 @@ static const struct eth_dev_ops ixgbevf_eth_dev_ops = {
.xstats_reset = ixgbevf_dev_stats_reset,
.xstats_get_names = ixgbevf_dev_xstats_get_names,
.dev_close= ixgbevf_dev_close,
+ .dev_reset= ixgbevf_dev_reset,
.allmulticast_enable = ixgbevf_dev_allmulticast_enable,
.allmulticast_disable = ixgbevf_dev_allmulticast_disable,
.dev_infos_get= ixgbevf_dev_info_get,
@@ -2838,6 +2842,23 @@ ixgbe_dev_close(struct rte_eth_dev *dev)
ixgbe_set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
}
+/*
+ * Reest PF device.
+ */
+static int
+ixgbe_dev_reset(struct rte_eth_dev *dev)
+{
+ int ret;
+
+ ret = eth_ixgbe_dev_uninit(dev);
+ if (ret)
+ return ret;
+
+ ret = eth_ixgbe_dev_init(dev);
+
+ return ret;
+}
+
static void
ixgbe_read_stats_registers(struct ixgbe_hw *hw,
struct ixgbe_hw_stats *hw_stats,
@@ -4902,6 +4923,23 @@ ixgbevf_dev_close(struct rte_eth_dev *dev)
ixgbevf_remove_mac_addr(dev, 0);
}
+/*
+ * Reset VF device
+ */
+static int
+ixgbevf_dev_reset(struct rte_eth_dev *dev)
+{
+ int ret;
+
+ ret = eth_ixgbevf_dev_uninit(dev);
+ if (ret)
+ return ret;
+
+ ret = eth_ixgbevf_dev_init(dev);
+
+ return ret;
+}
+
static void ixgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on)
{
struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
--
2.9.3
[dpdk-dev] [PATCH v3 1/4] ethdev: add support of NIC reset
A DPDK application can reset a NIC and keep its port id afterwards.
It means that all SW resources allocated in ethdev layer should be
kept and SW and HW resources of the NIC in PMD need to be reset
in similar way that it runs PCI dev_uninit() and then dev_init().
The sequence of dev_uninit() and dev_init() can be packed into a
single interface API rte_eth_dev_reset().
Signed-off-by: Wei Dai
---
lib/librte_ether/rte_ethdev.c | 16
lib/librte_ether/rte_ethdev.h | 12
lib/librte_ether/rte_ether_version.map | 2 +-
3 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
index 81a45c0..06b8839 100644
--- a/lib/librte_ether/rte_ethdev.c
+++ b/lib/librte_ether/rte_ethdev.c
@@ -3349,3 +3349,19 @@ rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
-ENOTSUP);
return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
}
+
+int
+rte_eth_dev_reset(uint8_t port_id)
+{
+ struct rte_eth_dev *dev;
+ int ret;
+
+ RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
+ dev = &rte_eth_devices[port_id];
+
+ RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
+
+ rte_eth_dev_stop(port_id);
+ ret = dev->dev_ops->dev_reset(dev);
+ return ret;
+}
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index f6e6c74..4922b36 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -1087,6 +1087,9 @@ typedef int (*eth_dev_set_link_down_t)(struct
rte_eth_dev *dev);
typedef void (*eth_dev_close_t)(struct rte_eth_dev *dev);
/**< @internal Function used to close a configured Ethernet device. */
+typedef int (*eth_dev_reset_t)(struct rte_eth_dev *dev);
+/** <@internal Function used to reset a configured Ethernet device. */
+
typedef void (*eth_promiscuous_enable_t)(struct rte_eth_dev *dev);
/**< @internal Function used to enable the RX promiscuous mode of an Ethernet
device. */
@@ -1404,6 +1407,7 @@ struct eth_dev_ops {
eth_dev_set_link_up_t dev_set_link_up; /**< Device link up. */
eth_dev_set_link_down_tdev_set_link_down; /**< Device link down. */
eth_dev_close_tdev_close; /**< Close device. */
+ eth_dev_reset_tdev_reset; /**< Reset device. */
eth_link_update_t link_update; /**< Get device link state. */
eth_promiscuous_enable_t promiscuous_enable; /**< Promiscuous ON. */
@@ -2104,6 +2108,14 @@ int rte_eth_dev_set_link_down(uint8_t port_id);
void rte_eth_dev_close(uint8_t port_id);
/**
+ * Reset a Ethernet device.
+ *
+ * @param port_id
+ * The port identifier of the Ethernet device.
+ */
+int rte_eth_dev_reset(uint8_t port_id);
+
+/**
* Enable receipt in promiscuous mode for an Ethernet device.
*
* @param port_id
diff --git a/lib/librte_ether/rte_ether_version.map
b/lib/librte_ether/rte_ether_version.map
index e0881f0..d569bcb 100644
--- a/lib/librte_ether/rte_ether_version.map
+++ b/lib/librte_ether/rte_ether_version.map
@@ -153,5 +153,5 @@ DPDK_17.08 {
global:
rte_flow_isolate;
-
+ rte_eth_dev_reset;
} DPDK_17.05;
--
2.9.3
[dpdk-dev] [PATCH v3 0/4] Support NIC reset and keep same port id
Sometimes a port have to be reset. After reset, if the port goes through PCI remove() and then PCI probe() for restoration, its port id may be changed and this is not expected by some customer DPDK application. Normally, PCI probe() includes two parts: one is in rte_ethdev layer and the other is calling PMD dev_init(). PCI remove( ) release all resource allocated from rte_ethdev layer in PCI probe( ) and calls PMD dev_unit( ). To keep same port id and reset the port, only dev_uninit() and dev_init( ) in PMD can be called and keep all resources allocated from rte_ethdev layer poart in PCI probe( ). New rte_eth_dev_reset( ) calls rte_eth_dev_stop( ), PMD dev_uninit( ) and then PMD dev_init( ) to reset a port and keep same port id. And then application can go through rte_eth_dev_configure( ), rte_eth_rx_queue_setup( ), rte_eth_tx_queue_setup( ) and rte_eth_dev_start( ) again to restore its previous settings or to reconfigure itself with different settings. To test this new feature, a testpmd command "port reset port_id" is added. A typical test steps are listed as follows: For example, run "ifconfig PF-name down" will trigger a reset to its VF. 1. run testpmd with ixgbe VF 2. testpmd > set verbose 1 //to observe VF working 3. ifconfig name-of-PF down 4. A message is shown in testmd to indicate PF reset 5. ifconfig name-of-PF up 6. testpmd > stop // stop forwarding to avoid crash during reset 7. testpmd > port reset port_id_of_VF 8. testpmd > start // restore forwarding chagnes: v3: update testpmd command v2: only reset PMD layer resource and keep same port id, but not restore settings Wei Dai (4): ethdev: add support of NIC reset net/ixgbe: add support of reset net/i40e: add support of reset app/testpmd: enhance command to test NIC reset app/test-pmd/cmdline.c | 10 ++--- app/test-pmd/testpmd.c | 39 ++ app/test-pmd/testpmd.h | 1 + drivers/net/i40e/i40e_ethdev.c | 16 ++ drivers/net/i40e/i40e_ethdev_vf.c | 16 ++ drivers/net/ixgbe/ixgbe_ethdev.c | 38 + lib/librte_ether/rte_ethdev.c | 16 ++ lib/librte_ether/rte_ethdev.h | 12 +++ lib/librte_ether/rte_ether_version.map | 2 +- 9 files changed, 146 insertions(+), 4 deletions(-) -- 2.9.3
[dpdk-dev] [PATCH v3 3/4] net/i40e: add support of reset
Reset a NIC by calling dev_uninit() and then dev_init().
Go through the same way in NIC PCI remove without release
of ethdev resource and then NIC PCI probe function without
ethdev resource allocation.
Signed-off-by: Wei Dai
---
drivers/net/i40e/i40e_ethdev.c| 16
drivers/net/i40e/i40e_ethdev_vf.c | 16
2 files changed, 32 insertions(+)
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 4ee1113..7694957 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -250,6 +250,7 @@ static int i40e_dev_configure(struct rte_eth_dev *dev);
static int i40e_dev_start(struct rte_eth_dev *dev);
static void i40e_dev_stop(struct rte_eth_dev *dev);
static void i40e_dev_close(struct rte_eth_dev *dev);
+static int i40e_dev_reset(struct rte_eth_dev *dev);
static void i40e_dev_promiscuous_enable(struct rte_eth_dev *dev);
static void i40e_dev_promiscuous_disable(struct rte_eth_dev *dev);
static void i40e_dev_allmulticast_enable(struct rte_eth_dev *dev);
@@ -449,6 +450,7 @@ static const struct eth_dev_ops i40e_eth_dev_ops = {
.dev_start= i40e_dev_start,
.dev_stop = i40e_dev_stop,
.dev_close= i40e_dev_close,
+ .dev_reset= i40e_dev_reset,
.promiscuous_enable = i40e_dev_promiscuous_enable,
.promiscuous_disable = i40e_dev_promiscuous_disable,
.allmulticast_enable = i40e_dev_allmulticast_enable,
@@ -2135,6 +2137,20 @@ i40e_dev_close(struct rte_eth_dev *dev)
I40E_WRITE_FLUSH(hw);
}
+static int
+i40e_dev_reset(struct rte_eth_dev *dev)
+{
+ int ret;
+
+ ret = eth_i40e_dev_uninit(dev);
+ if (ret)
+ return ret;
+
+ ret = eth_i40e_dev_init(dev);
+
+ return ret;
+}
+
static void
i40e_dev_promiscuous_enable(struct rte_eth_dev *dev)
{
diff --git a/drivers/net/i40e/i40e_ethdev_vf.c
b/drivers/net/i40e/i40e_ethdev_vf.c
index 2d5a9b5..bf287a0 100644
--- a/drivers/net/i40e/i40e_ethdev_vf.c
+++ b/drivers/net/i40e/i40e_ethdev_vf.c
@@ -123,6 +123,7 @@ static void i40evf_vlan_offload_set(struct rte_eth_dev
*dev, int mask);
static int i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid,
int on);
static void i40evf_dev_close(struct rte_eth_dev *dev);
+static int i40evf_dev_reset(struct rte_eth_dev *dev);
static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
@@ -204,6 +205,7 @@ static const struct eth_dev_ops i40evf_eth_dev_ops = {
.xstats_get_names = i40evf_dev_xstats_get_names,
.xstats_reset = i40evf_dev_xstats_reset,
.dev_close= i40evf_dev_close,
+ .dev_reset= i40evf_dev_reset,
.dev_infos_get= i40evf_dev_info_get,
.dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
.vlan_filter_set = i40evf_vlan_filter_set,
@@ -2347,6 +2349,20 @@ i40evf_dev_close(struct rte_eth_dev *dev)
}
static int
+i40evf_dev_reset(struct rte_eth_dev *dev)
+{
+ int ret;
+
+ ret = i40evf_dev_uninit(dev);
+ if (ret)
+ return ret;
+
+ ret = i40evf_dev_init(dev);
+
+ return ret;
+}
+
+static int
i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
{
struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
--
2.9.3
[dpdk-dev] [PATCH v3 4/4] app/testpmd: enhance command to test NIC reset
When PF is reset, a message will show it.
User can run the command "port reset port_id"
to reset the VF port and to keep same port id without any
without any configuration.
And then user can run "start port_id" to reconfigure
its forwarding mode and parmaters as previous.
To avoid crash, current forwarding should be stopped.
Signed-off-by: Wei Dai
---
app/test-pmd/cmdline.c | 10 +++---
app/test-pmd/testpmd.c | 39 +++
app/test-pmd/testpmd.h | 1 +
3 files changed, 47 insertions(+), 3 deletions(-)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index ff8ffd2..58ba6e4 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -950,6 +950,8 @@ static void cmd_operate_port_parsed(void *parsed_result,
stop_port(RTE_PORT_ALL);
else if (!strcmp(res->name, "close"))
close_port(RTE_PORT_ALL);
+ else if (!strcmp(res->name, "reset"))
+ reset_port(RTE_PORT_ALL);
else
printf("Unknown parameter\n");
}
@@ -959,7 +961,7 @@ cmdline_parse_token_string_t cmd_operate_port_all_cmd =
"port");
cmdline_parse_token_string_t cmd_operate_port_all_port =
TOKEN_STRING_INITIALIZER(struct cmd_operate_port_result, name,
- "start#stop#close");
+ "start#stop#close#reset");
cmdline_parse_token_string_t cmd_operate_port_all_all =
TOKEN_STRING_INITIALIZER(struct cmd_operate_port_result, value, "all");
@@ -994,6 +996,8 @@ static void cmd_operate_specific_port_parsed(void
*parsed_result,
stop_port(res->value);
else if (!strcmp(res->name, "close"))
close_port(res->value);
+ else if (!strcmp(res->name, "reset"))
+ reset_port(res->value);
else
printf("Unknown parameter\n");
}
@@ -1003,7 +1007,7 @@ cmdline_parse_token_string_t
cmd_operate_specific_port_cmd =
keyword, "port");
cmdline_parse_token_string_t cmd_operate_specific_port_port =
TOKEN_STRING_INITIALIZER(struct cmd_operate_specific_port_result,
- name, "start#stop#close");
+ name, "start#stop#close#reset");
cmdline_parse_token_num_t cmd_operate_specific_port_id =
TOKEN_NUM_INITIALIZER(struct cmd_operate_specific_port_result,
value, UINT8);
@@ -1011,7 +1015,7 @@ cmdline_parse_token_num_t cmd_operate_specific_port_id =
cmdline_parse_inst_t cmd_operate_specific_port = {
.f = cmd_operate_specific_port_parsed,
.data = NULL,
- .help_str = "port start|stop|close : Start/Stop/Close port_id",
+ .help_str = "port start|stop|close|reset :
Start/Stop/Close/Reset port_id",
.tokens = {
(void *)&cmd_operate_specific_port_cmd,
(void *)&cmd_operate_specific_port_port,
diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c
index b29328a..77a517f 100644
--- a/app/test-pmd/testpmd.c
+++ b/app/test-pmd/testpmd.c
@@ -1665,6 +1665,45 @@ close_port(portid_t pid)
}
void
+reset_port(portid_t pid)
+{
+ int diag;
+ portid_t pi;
+ struct rte_port *port;
+
+ if (port_id_is_invalid(pid, ENABLED_WARN))
+ return;
+
+ printf("Reseting ports...\n");
+
+ RTE_ETH_FOREACH_DEV(pi) {
+ if (pid != pi && pid != (portid_t)RTE_PORT_ALL)
+ continue;
+
+ if (port_is_forwarding(pi) != 0 && test_done == 0) {
+ printf("Please remove port %d from forwarding
configuration.\n", pi);
+ continue;
+ }
+
+ if (port_is_bonding_slave(pi)) {
+ printf("Please remove port %d from bonded device.\n",
pi);
+ continue;
+ }
+
+ diag = rte_eth_dev_reset(pi);
+ if (diag == 0) {
+ port = &ports[pi];
+ port->need_reconfig = 1;
+ port->need_reconfig_queues = 1;
+ }
+ else
+ printf("Failed to reset port %d. diag=%d\n", pi, diag);
+ }
+
+ printf("Done\n");
+}
+
+void
attach_port(char *identifier)
{
portid_t pi = 0;
diff --git a/app/test-pmd/testpmd.h b/app/test-pmd/testpmd.h
index 364502d..e4c704a 100644
--- a/app/test-pmd/testpmd.h
+++ b/app/test-pmd/testpmd.h
@@ -596,6 +596,7 @@ int init_port_dcb_config(portid_t pid, enum dcb_mode_enable
dcb_mode,
int start_port(portid_t pid);
void stop_port(portid_t pid);
void close_port(portid_t pid);
+void reset_port(portid_t pid);
void attach_port(char *identifier);
void detach_port(uint8_t port_id);
int all_ports_stopped(
[dpdk-dev] [PATCH v2] doc: add generic compilation doc for all sample apps
Moved duplicated, and occasionally outdated, doc sections from each
of the sample app guides chapters to a common chapter at the start.
This reduces the duplication in the docs and provides a single
point of reference for compiling the sample apps.
Fixes: d0dff9ba445e ("doc: sample application user guide")
Fixes: 60643134c1c1 ("doc: add distributor application")
Fixes: bda68ab9d1e7 ("examples/ethtool: add user-space ethtool sample
application")
Fixes: d299106e8e31 ("examples/ipsec-secgw: add IPsec sample application")
Fixes: e64833f2273a ("examples/l2fwd-keepalive: add sample application")
Fixes: d0dff9ba445e ("doc: sample application user guide")
Fixes: f6baccbc2b3b ("examples/l2fwd-cat: add sample application for PQoS CAT
and CDP")
Fixes: ba7b86b1419b ("doc: add l2fwd-crypto sample app guide")
Fixes: ccefe752cab0 ("doc: add jobstats sample guide")
Fixes: 1b2038b06fae ("doc: new packet ordering app description")
Fixes: 4d1a771bd88d ("doc: add guide for performance-thread example")
Fixes: 2d1232571112 ("doc: add PTP client sample guide")
Fixes: 0d8d3df6b81b ("doc: add Rx and Tx callbacks sample app user guide")
Fixes: eb21185d6f21 ("doc: add flow distributor example guide")
Fixes: 1443da3bbd71 ("doc: add basic forwarding skeleton user guide")
Fixes: 181654b7162e ("doc: add a VXLAN sample guide")
Fixes: c75f4e6a7a2b ("doc: add vm power mgmt app")
Signed-off-by: Herakliusz Lipiec
---
doc/guides/sample_app_ug/cmd_line.rst | 21 +---
doc/guides/sample_app_ug/compiling.rst | 138 +
doc/guides/sample_app_ug/dist_app.rst | 22 +---
doc/guides/sample_app_ug/ethtool.rst | 23 +---
doc/guides/sample_app_ug/exception_path.rst| 23 +---
doc/guides/sample_app_ug/hello_world.rst | 21 +---
doc/guides/sample_app_ug/index.rst | 1 +
doc/guides/sample_app_ug/ip_frag.rst | 27 +---
doc/guides/sample_app_ug/ip_reassembly.rst | 22 +---
doc/guides/sample_app_ug/ipsec_secgw.rst | 19 +--
doc/guides/sample_app_ug/ipv4_multicast.rst| 33 +
doc/guides/sample_app_ug/keep_alive.rst| 22 +---
doc/guides/sample_app_ug/kernel_nic_interface.rst | 24 +---
doc/guides/sample_app_ug/l2_forward_cat.rst| 34 ++---
doc/guides/sample_app_ug/l2_forward_crypto.rst | 21 +---
doc/guides/sample_app_ug/l2_forward_job_stats.rst | 21 +---
.../sample_app_ug/l2_forward_real_virtual.rst | 21 +---
doc/guides/sample_app_ug/l3_forward.rst| 23 +---
.../sample_app_ug/l3_forward_access_ctrl.rst | 23 +---
doc/guides/sample_app_ug/l3_forward_power_man.rst | 23 +---
doc/guides/sample_app_ug/l3_forward_virtual.rst| 29 +
doc/guides/sample_app_ug/link_status_intr.rst | 27 +---
doc/guides/sample_app_ug/load_balancer.rst | 19 +--
doc/guides/sample_app_ug/multi_process.rst | 22 +---
doc/guides/sample_app_ug/netmap_compatibility.rst | 25 +---
doc/guides/sample_app_ug/packet_ordering.rst | 23 +---
doc/guides/sample_app_ug/performance_thread.rst| 22 +---
doc/guides/sample_app_ug/ptpclient.rst | 33 ++---
doc/guides/sample_app_ug/qos_metering.rst | 24 +---
doc/guides/sample_app_ug/qos_scheduler.rst | 21 +---
doc/guides/sample_app_ug/quota_watermark.rst | 22 +---
doc/guides/sample_app_ug/rxtx_callbacks.rst| 25 +---
doc/guides/sample_app_ug/server_node_efd.rst | 21 +---
doc/guides/sample_app_ug/skeleton.rst | 25 +---
doc/guides/sample_app_ug/test_pipeline.rst | 20 +--
doc/guides/sample_app_ug/timer.rst | 21 +---
doc/guides/sample_app_ug/vhost.rst | 16 +--
doc/guides/sample_app_ug/vm_power_management.rst | 9 +-
doc/guides/sample_app_ug/vmdq_dcb_forwarding.rst | 19 +--
39 files changed, 244 insertions(+), 741 deletions(-)
create mode 100644 doc/guides/sample_app_ug/compiling.rst
diff --git a/doc/guides/sample_app_ug/cmd_line.rst
b/doc/guides/sample_app_ug/cmd_line.rst
index 36c7971..7ea0dea 100644
--- a/doc/guides/sample_app_ug/cmd_line.rst
+++ b/doc/guides/sample_app_ug/cmd_line.rst
@@ -68,26 +68,9 @@ There are three simple commands:
Compiling the Application
-
-#. Go to example directory:
+To compile the sample application see :ref:`sample_app_compilation`
-.. code-block:: console
-
-export RTE_SDK=/path/to/rte_sdk
-cd ${RTE_SDK}/examples/cmdline
-
-#. Set the target (a default target is used if not specified). For example:
-
-.. code-block:: console
-
-export RTE_TARGET=x86_64-native-linuxapp-gcc
-
-Refer to the *DPDK Getting Started Guide* for possible RTE_TARGET values.
-
-#. Build the application:
-
-.. code-block:: console
-
-make
+The application is located in the ``cmd_line`` sub-directory.
Running the Application
---
diff --git a/doc/guides/sample_app
Re: [dpdk-dev] [PATCH 1/2] LACP control packet filtering offload
On 27/05/17 12:27, Tomasz Kulasek wrote:
New API funtions implemented:
rte_eth_bond_8023ad_slow_queue_enable(uint8_t port_id);
rte_eth_bond_8023ad_slow_queue_disable(uint8_t port_id);
rte_eth_bond_8023ad_slow_queue_enable should be called before bonding port
start to enable new path.
When this option is enabled all slaves must support flow director's
filtering by ethernet type and support one additional queue on slaves
tx/rx.
Signed-off-by: Tomasz Kulasek
---
drivers/net/bonding/rte_eth_bond_8023ad.c | 141 +++--
drivers/net/bonding/rte_eth_bond_8023ad.h | 6 +
drivers/net/bonding/rte_eth_bond_8023ad_private.h | 15 +
drivers/net/bonding/rte_eth_bond_pmd.c| 345 +-
drivers/net/bonding/rte_eth_bond_version.map | 9 +
5 files changed, 481 insertions(+), 35 deletions(-)
diff --git a/drivers/net/bonding/rte_eth_bond_8023ad.c
b/drivers/net/bonding/rte_eth_bond_8023ad.c
index 7b863d6..125eb45 100644
--- a/drivers/net/bonding/rte_eth_bond_8023ad.c
+++ b/drivers/net/bonding/rte_eth_bond_8023ad.c
@@ -632,12 +632,20 @@
lacpdu->tlv_type_terminator = TLV_TYPE_TERMINATOR_INFORMATION;
lacpdu->terminator_length = 0;
- if (rte_ring_enqueue(port->tx_ring, lacp_pkt) == -ENOBUFS) {
- /* If TX ring full, drop packet and free message. Retransmission
-* will happen in next function call. */
- rte_pktmbuf_free(lacp_pkt);
- set_warning_flags(port, WRN_TX_QUEUE_FULL);
- return;
+ if (internals->mode4.slow_rx_queue == 0) {
I think we should have an explicit flag set for if hw filtering of slow
packets is enabled instead of checking the rx/tx queue id like above.
+ if (rte_ring_enqueue(port->tx_ring, lacp_pkt) == -ENOBUFS) {
+ /* If TX ring full, drop packet and free message.
Retransmission
+* will happen in next function call. */
+ rte_pktmbuf_free(lacp_pkt);
+ set_warning_flags(port, WRN_TX_QUEUE_FULL);
+ return;
+ }
+ } else {
+ if (rte_eth_tx_burst(slave_id, internals->mode4.slow_tx_queue,
&lacp_pkt, 1) == 0) {
+ rte_pktmbuf_free(lacp_pkt);
+ set_warning_flags(port, WRN_TX_QUEUE_FULL);
+ return;
+ }
}
MODE4_DEBUG("sending LACP frame\n");
@@ -741,6 +749,25 @@
}
static void
+rx_machine_update(struct bond_dev_private *internals, uint8_t slave_id,
+ struct rte_mbuf *lacp_pkt) {
+
+ /* Find LACP packet to this port. Do not check subtype, it is done in
+* function that queued packet */
+ if (lacp_pkt != NULL) {
+ struct lacpdu_header *lacp;
+
+ lacp = rte_pktmbuf_mtod(lacp_pkt, struct lacpdu_header *);
+ RTE_ASSERT(lacp->lacpdu.subtype == SLOW_SUBTYPE_LACP);
+
+ /* This is LACP frame so pass it to rx_machine */
+ rx_machine(internals, slave_id, &lacp->lacpdu);
+ rte_pktmbuf_free(lacp_pkt);
+ } else
+ rx_machine(internals, slave_id, NULL);
+}
+
+static void
bond_mode_8023ad_periodic_cb(void *arg)
{
struct rte_eth_dev *bond_dev = arg;
@@ -809,20 +836,21 @@
SM_FLAG_SET(port, LACP_ENABLED);
- /* Find LACP packet to this port. Do not check subtype, it is done in
-* function that queued packet */
- if (rte_ring_dequeue(port->rx_ring, &pkt) == 0) {
- struct rte_mbuf *lacp_pkt = pkt;
- struct lacpdu_header *lacp;
+ struct rte_mbuf *lacp_pkt = NULL;
- lacp = rte_pktmbuf_mtod(lacp_pkt, struct lacpdu_header *);
- RTE_ASSERT(lacp->lacpdu.subtype == SLOW_SUBTYPE_LACP);
+ if (internals->mode4.slow_rx_queue == 0) {
>
As above instead of checking rx queue id and explicit enable/disable
flag would be clearer.
+ /* Find LACP packet to this port. Do not check subtype,
it is done in
+* function that queued packet */
+ if (rte_ring_dequeue(port->rx_ring, &pkt) == 0)
+ lacp_pkt = pkt;
- /* This is LACP frame so pass it to rx_machine */
- rx_machine(internals, slave_id, &lacp->lacpdu);
- rte_pktmbuf_free(lacp_pkt);
- } else
- rx_machine(internals, slave_id, NULL);
+ rx_machine_update(internals, slave_id, lacp_pkt);
+ } else {
+ if (rte_eth_rx_burst(slave_id,
internals->mode4.slow_rx_queue, &lacp_pkt, 1) == 1)
+ bond_mode_8023ad_handle_slow_pkt(internals,
slave_id, lacp_pkt);
+ else
+ rx_machine_upd
Re: [dpdk-dev] [PATCH 21/21 v3] doc: add NXP DPAA2 EVENTDEV details
-Original Message- > Date: Wed, 28 Jun 2017 20:46:04 +0530 > From: Nipun Gupta > To: dev@dpdk.org > CC: hemant.agra...@nxp.com, jerin.ja...@caviumnetworks.com, > harry.van.haa...@intel.com, bruce.richard...@intel.com, > gage.e...@intel.com, shreyansh.j...@nxp.com, Nipun Gupta > > Subject: [PATCH 21/21 v3] doc: add NXP DPAA2 EVENTDEV details > X-Mailer: git-send-email 1.9.1 > > Signed-off-by: Nipun Gupta > --- > MAINTAINERS| 1 + > doc/guides/eventdevs/dpaa2.rst | 175 > + > 2 files changed, 176 insertions(+) > create mode 100644 doc/guides/eventdevs/dpaa2.rst > > diff --git a/MAINTAINERS b/MAINTAINERS > index fe1a25b..d9dbf8f 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -584,6 +584,7 @@ NXP DPAA2 Eventdev PMD > M: Hemant Agrawal > M: Nipun Gupta > F: drivers/event/dpaa2/ > +F: doc/guides/eventdevs/dpaa2.rst Fix the below warning from eventdevs/dpaa2.rst ➜ [master][dpdk-next-eventdev] $ ./devtools/test-build.sh -j8 x86_64-native-linuxapp-gcc+shared x86_64-native-linuxapp-gcc+debug ## x86_64-native-linuxapp-gcc+debug done. == Build doxygen HTML API == Build sphinx HTML guides == Check docs --- /dev/null 2017-06-29 11:41:04.749491167 +0530 +++ .check/doc.txt 2017-06-29 14:49:20.746576352 +0530 @@ -0,0 +1 @@ +/export/dpdk-next-eventdev/doc/guides/eventdevs/dpaa2.rst: WARNING: document isn't included in any toctree ➜ [master][dpdk-next-eventdev] $ echo $? 1
[dpdk-dev] [PATCH] app/testpmd:add bond type description In function cmd_show_bonding_config_parsed() use number represent the bond type, in order more detailed, add bond type description otherwise we
Signed-off-by: RongQiang Xie
---
app/test-pmd/cmdline.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index fcbc6b1..4eac498 100755
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -4456,7 +4456,7 @@ static void cmd_show_bonding_config_parsed(void
*parsed_result,
}
if (bonding_mode == BONDING_MODE_ACTIVE_BACKUP ||
- bonding_mode ==BONDING_MODE_TLB) {
+ bonding_mode == BONDING_MODE_TLB) {
primary_id = rte_eth_bond_primary_get(port_id);
if (primary_id < 0) {
printf("\tFailed to get primary slave for port = %d\n",
port_id);
--
1.8.3.1
[dpdk-dev] [PATCH 0/9] net/qede: update PMD to 2.5.1.1
Hi, This patch set contains minor enhancements and bug fixes for QEDE PMD. It updates the driver version to 2.5.1.1. The patch set is tested against dpdk-next-net. Thanks! Rasesh Harish Patil (3): net/qede: fix DMA memory leak net/qede: add notifying HW errors net/qede: limit ring size to 32k Rasesh Mody (6): net/qede: comments traces and format changes net/qede: change debug verbosity of PMD messages net/qede: set mdump flag net/qede: add missing check for VNI net/qede: use newer packet mbuf allocate API net/qede: update PMD version to 2.5.1.1 drivers/net/qede/base/bcm_osal.c | 82 ++--- drivers/net/qede/base/bcm_osal.h | 12 +++-- drivers/net/qede/base/ecore.h |2 +- drivers/net/qede/base/ecore_dev.c |1 + drivers/net/qede/base/ecore_dev_api.h |3 ++ drivers/net/qede/base/ecore_int.c |2 +- drivers/net/qede/base/ecore_mcp.c |3 +- drivers/net/qede/qede_ethdev.c| 45 +- drivers/net/qede/qede_ethdev.h|2 +- drivers/net/qede/qede_logs.h | 23 + drivers/net/qede/qede_main.c | 21 - drivers/net/qede/qede_rxtx.c | 73 - 12 files changed, 192 insertions(+), 77 deletions(-) -- 1.7.10.3
[dpdk-dev] [PATCH 2/9] net/qede: add notifying HW errors
From: Harish Patil
Log HW errmsg on the stdout and do minimal handling to prevent HW
attentions from being reasserted.
Signed-off-by: Harish Patil
Signed-off-by: Rasesh Mody
---
drivers/net/qede/base/bcm_osal.c | 32
drivers/net/qede/base/bcm_osal.h |6 +-
drivers/net/qede/base/ecore_int.c |2 +-
3 files changed, 38 insertions(+), 2 deletions(-)
diff --git a/drivers/net/qede/base/bcm_osal.c b/drivers/net/qede/base/bcm_osal.c
index 1ccfad0..4dee4da 100644
--- a/drivers/net/qede/base/bcm_osal.c
+++ b/drivers/net/qede/base/bcm_osal.c
@@ -255,3 +255,35 @@ u32 qede_unzip_data(struct ecore_hwfn *p_hwfn, u32
input_len,
type);
}
}
+
+void
+qede_hw_err_notify(struct ecore_hwfn *p_hwfn, enum ecore_hw_err_type err_type)
+{
+ char err_str[64];
+
+ switch (err_type) {
+ case ECORE_HW_ERR_FAN_FAIL:
+ strcpy(err_str, "Fan Failure");
+ break;
+ case ECORE_HW_ERR_MFW_RESP_FAIL:
+ strcpy(err_str, "MFW Response Failure");
+ break;
+ case ECORE_HW_ERR_HW_ATTN:
+ strcpy(err_str, "HW Attention");
+ break;
+ case ECORE_HW_ERR_DMAE_FAIL:
+ strcpy(err_str, "DMAE Failure");
+ break;
+ case ECORE_HW_ERR_RAMROD_FAIL:
+ strcpy(err_str, "Ramrod Failure");
+ break;
+ case ECORE_HW_ERR_FW_ASSERT:
+ strcpy(err_str, "FW Assertion");
+ break;
+ default:
+ strcpy(err_str, "Unknown");
+ }
+
+ DP_ERR(p_hwfn, "HW error occurred [%s]\n", err_str);
+ ecore_int_attn_clr_enable(p_hwfn->p_dev, true);
+}
diff --git a/drivers/net/qede/base/bcm_osal.h b/drivers/net/qede/base/bcm_osal.h
index 444512c..3acf8f7 100644
--- a/drivers/net/qede/base/bcm_osal.h
+++ b/drivers/net/qede/base/bcm_osal.h
@@ -27,6 +27,7 @@
struct vf_pf_resc_request;
enum ecore_mcp_protocol_type;
union ecore_mcp_protocol_stats;
+enum ecore_hw_err_type;
void qed_link_update(struct ecore_hwfn *hwfn);
@@ -350,6 +351,8 @@ u32 qede_unzip_data(struct ecore_hwfn *p_hwfn, u32
input_len,
u8 *input_buf, u32 max_size, u8 *unzip_buf);
void qede_vf_fill_driver_data(struct ecore_hwfn *, struct vf_pf_resc_request *,
struct ecore_vf_acquire_sw_info *);
+void qede_hw_err_notify(struct ecore_hwfn *p_hwfn,
+ enum ecore_hw_err_type err_type);
#define OSAL_VF_FILL_ACQUIRE_RESC_REQ(_dev_p, _resc_req, _os_info) \
qede_vf_fill_driver_data(_dev_p, _resc_req, _os_info)
@@ -358,7 +361,8 @@ void qede_vf_fill_driver_data(struct ecore_hwfn *, struct
vf_pf_resc_request *,
/* TODO: */
#define OSAL_SCHEDULE_RECOVERY_HANDLER(hwfn) nothing
-#define OSAL_HW_ERROR_OCCURRED(hwfn, err_type) nothing
+#define OSAL_HW_ERROR_OCCURRED(hwfn, err_type) \
+ qede_hw_err_notify(hwfn, err_type)
#define OSAL_NVM_IS_ACCESS_ENABLED(hwfn) (1)
#define OSAL_NUM_ACTIVE_CPU() 0
diff --git a/drivers/net/qede/base/ecore_int.c
b/drivers/net/qede/base/ecore_int.c
index 8dc4d15..2afca29 100644
--- a/drivers/net/qede/base/ecore_int.c
+++ b/drivers/net/qede/base/ecore_int.c
@@ -842,7 +842,7 @@ static void ecore_int_attn_print(struct ecore_hwfn *p_hwfn,
u32 mask = ~bitmask;
val = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en_reg);
ecore_wr(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en_reg, (val & mask));
- DP_INFO(p_hwfn, "`%s' - Disabled future attentions\n",
+ DP_ERR(p_hwfn, "`%s' - Disabled future attentions\n",
p_bit_name);
}
--
1.7.10.3
[dpdk-dev] [PATCH 1/9] net/qede: fix DMA memory leak
From: Harish Patil
Implement the macro OSAL_DMA_FREE_COHERENT to release DMA memories.
Track all DMA memory allocations using an array of memzone pointers and
use that to free memory resoureces along with other resource deallocation.
With this change there is no need to alter the base code to additionally
pass an unique string needed for memzone creation.
Fixes: ec94dbc57362 ("qede: add base driver")
Signed-off-by: Harish Patil
Signed-off-by: Rasesh Mody
---
drivers/net/qede/base/bcm_osal.c | 36 +++
drivers/net/qede/base/bcm_osal.h |6 +++--
drivers/net/qede/qede_ethdev.c |9 +--
drivers/net/qede/qede_rxtx.c | 50 +++---
4 files changed, 82 insertions(+), 19 deletions(-)
diff --git a/drivers/net/qede/base/bcm_osal.c b/drivers/net/qede/base/bcm_osal.c
index 3f895cd..1ccfad0 100644
--- a/drivers/net/qede/base/bcm_osal.c
+++ b/drivers/net/qede/base/bcm_osal.c
@@ -16,6 +16,10 @@
#include "ecore_mcp_api.h"
#include "ecore_l2_api.h"
+/* Array of memzone pointers */
+static const struct rte_memzone *ecore_mz_mapping[RTE_MAX_MEMZONE];
+/* Counter to track current memzone allocated */
+uint16_t ecore_mz_count;
unsigned long qede_log2_align(unsigned long n)
{
@@ -118,6 +122,13 @@ void *osal_dma_alloc_coherent(struct ecore_dev *p_dev,
uint32_t core_id = rte_lcore_id();
unsigned int socket_id;
+ if (ecore_mz_count >= RTE_MAX_MEMZONE) {
+ DP_ERR(p_dev, "Memzone allocation count exceeds %u\n",
+ RTE_MAX_MEMZONE);
+ *phys = 0;
+ return OSAL_NULL;
+ }
+
OSAL_MEM_ZERO(mz_name, sizeof(*mz_name));
snprintf(mz_name, sizeof(mz_name) - 1, "%lx",
(unsigned long)rte_get_timer_cycles());
@@ -134,6 +145,7 @@ void *osal_dma_alloc_coherent(struct ecore_dev *p_dev,
return OSAL_NULL;
}
*phys = mz->phys_addr;
+ ecore_mz_mapping[ecore_mz_count++] = mz;
DP_VERBOSE(p_dev, ECORE_MSG_PROBE,
"size=%zu phys=0x%" PRIx64 " virt=%p on socket=%u\n",
mz->len, mz->phys_addr, mz->addr, socket_id);
@@ -148,6 +160,13 @@ void *osal_dma_alloc_coherent_aligned(struct ecore_dev
*p_dev,
uint32_t core_id = rte_lcore_id();
unsigned int socket_id;
+ if (ecore_mz_count >= RTE_MAX_MEMZONE) {
+ DP_ERR(p_dev, "Memzone allocation count exceeds %u\n",
+ RTE_MAX_MEMZONE);
+ *phys = 0;
+ return OSAL_NULL;
+ }
+
OSAL_MEM_ZERO(mz_name, sizeof(*mz_name));
snprintf(mz_name, sizeof(mz_name) - 1, "%lx",
(unsigned long)rte_get_timer_cycles());
@@ -163,12 +182,29 @@ void *osal_dma_alloc_coherent_aligned(struct ecore_dev
*p_dev,
return OSAL_NULL;
}
*phys = mz->phys_addr;
+ ecore_mz_mapping[ecore_mz_count++] = mz;
DP_VERBOSE(p_dev, ECORE_MSG_PROBE,
"aligned memory size=%zu phys=0x%" PRIx64 " virt=%p
core=%d\n",
mz->len, mz->phys_addr, mz->addr, core_id);
return mz->addr;
}
+void osal_dma_free_mem(struct ecore_dev *p_dev, dma_addr_t phys)
+{
+ uint16_t j;
+
+ for (j = 0 ; j < ecore_mz_count; j++) {
+ if (phys == ecore_mz_mapping[j]->phys_addr) {
+ DP_VERBOSE(p_dev, ECORE_MSG_SP,
+ "Free memzone %s\n", ecore_mz_mapping[j]->name);
+ rte_memzone_free(ecore_mz_mapping[j]);
+ return;
+ }
+ }
+
+ DP_ERR(p_dev, "Unexpected memory free request\n");
+}
+
#ifdef CONFIG_ECORE_ZIPPED_FW
u32 qede_unzip_data(struct ecore_hwfn *p_hwfn, u32 input_len,
u8 *input_buf, u32 max_size, u8 *unzip_buf)
diff --git a/drivers/net/qede/base/bcm_osal.h b/drivers/net/qede/base/bcm_osal.h
index 340d5f0..444512c 100644
--- a/drivers/net/qede/base/bcm_osal.h
+++ b/drivers/net/qede/base/bcm_osal.h
@@ -107,14 +107,16 @@
void *osal_dma_alloc_coherent_aligned(struct ecore_dev *, dma_addr_t *,
size_t, int);
+void osal_dma_free_mem(struct ecore_dev *edev, dma_addr_t phys);
+
#define OSAL_DMA_ALLOC_COHERENT(dev, phys, size) \
osal_dma_alloc_coherent(dev, phys, size)
#define OSAL_DMA_ALLOC_COHERENT_ALIGNED(dev, phys, size, align) \
osal_dma_alloc_coherent_aligned(dev, phys, size, align)
-/* TODO: */
-#define OSAL_DMA_FREE_COHERENT(dev, virt, phys, size) nothing
+#define OSAL_DMA_FREE_COHERENT(dev, virt, phys, size) \
+ osal_dma_free_mem(dev, phys)
/* HW reads/writes */
diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index 6380c2b..3e9f359 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -1143,7 +1143,7 @@ static int qede_dev_configure(struct rte_eth_dev
[dpdk-dev] [PATCH 3/9] net/qede: limit ring size to 32k
From: Harish Patil
Since nb_max is a u16 it can store value upto 65535 only (not 64K), but
this value is not a power-of-2. So limit the ring sizes to 32K.
Signed-off-by: Harish Patil
---
drivers/net/qede/qede_ethdev.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index 3e9f359..fcc9bbb 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -1189,13 +1189,13 @@ static int qede_dev_configure(struct rte_eth_dev
*eth_dev)
/* Info about HW descriptor ring limitations */
static const struct rte_eth_desc_lim qede_rx_desc_lim = {
- .nb_max = NUM_RX_BDS_MAX,
+ .nb_max = 0x8000, /* 32K */
.nb_min = 128,
.nb_align = 128 /* lowest common multiple */
};
static const struct rte_eth_desc_lim qede_tx_desc_lim = {
- .nb_max = NUM_TX_BDS_MAX,
+ .nb_max = 0x8000, /* 32K */
.nb_min = 256,
.nb_align = 256,
.nb_seg_max = ETH_TX_MAX_BDS_PER_LSO_PACKET,
--
1.7.10.3
[dpdk-dev] [PATCH 5/9] net/qede: change debug verbosity of PMD messages
Convert DP_NOTICE() to DP_ERR() as appropriate in PMD files.
Change DP_NOTICE() macro to make use of boolean flag to log
it as error message or informational message.
Signed-off-by: Rasesh Mody
---
drivers/net/qede/qede_ethdev.c | 20 +---
drivers/net/qede/qede_logs.h | 23 ++-
drivers/net/qede/qede_main.c | 20 +---
drivers/net/qede/qede_rxtx.c | 15 ++-
4 files changed, 38 insertions(+), 40 deletions(-)
diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index 8e18a17..ad264ba 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -2434,8 +2434,7 @@ static int qede_common_dev_init(struct rte_eth_dev
*eth_dev, bool is_vf)
eth_dev->tx_pkt_prepare = qede_xmit_prep_pkts;
if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
- DP_NOTICE(edev, false,
- "Skipping device init from secondary process\n");
+ DP_ERR(edev, "Skipping device init from secondary process\n");
return 0;
}
@@ -2558,8 +2557,7 @@ static int qede_common_dev_init(struct rte_eth_dev
*eth_dev, bool is_vf)
ether_addr_copy(ð_dev->data->mac_addrs[0],
&adapter->primary_mac);
} else {
- DP_NOTICE(edev, false,
- "No VF macaddr assigned\n");
+ DP_ERR(edev, "No VF macaddr assigned\n");
}
}
}
@@ -2584,13 +2582,13 @@ static int qede_common_dev_init(struct rte_eth_dev
*eth_dev, bool is_vf)
if (qede_start_vport(adapter, adapter->mtu))
return -1;
- DP_NOTICE(edev, false, "MAC address : %02x:%02x:%02x:%02x:%02x:%02x\n",
- adapter->primary_mac.addr_bytes[0],
- adapter->primary_mac.addr_bytes[1],
- adapter->primary_mac.addr_bytes[2],
- adapter->primary_mac.addr_bytes[3],
- adapter->primary_mac.addr_bytes[4],
- adapter->primary_mac.addr_bytes[5]);
+ DP_INFO(edev, "MAC address : %02x:%02x:%02x:%02x:%02x:%02x\n",
+ adapter->primary_mac.addr_bytes[0],
+ adapter->primary_mac.addr_bytes[1],
+ adapter->primary_mac.addr_bytes[2],
+ adapter->primary_mac.addr_bytes[3],
+ adapter->primary_mac.addr_bytes[4],
+ adapter->primary_mac.addr_bytes[5]);
DP_INFO(edev, "Device initialized\n");
diff --git a/drivers/net/qede/qede_logs.h b/drivers/net/qede/qede_logs.h
index 25c14d8..1582115 100644
--- a/drivers/net/qede/qede_logs.h
+++ b/drivers/net/qede/qede_logs.h
@@ -16,16 +16,21 @@
(p_dev)->name ? (p_dev)->name : "", \
##__VA_ARGS__)
-#ifdef RTE_LIBRTE_QEDE_DEBUG_INFO
#define DP_NOTICE(p_dev, is_assert, fmt, ...) \
- rte_log(RTE_LOG_NOTICE, RTE_LOGTYPE_PMD,\
- "[QEDE PMD: (%s)]%s:" fmt, \
- (p_dev)->name ? (p_dev)->name : "", \
-__func__, \
- ##__VA_ARGS__)
-#else
-#define DP_NOTICE(p_dev, fmt, ...) do { } while (0)
-#endif
+do { \
+ if (is_assert) \
+ rte_log(RTE_LOG_ERR, RTE_LOGTYPE_PMD,\
+ "[QEDE PMD: (%s)]%s:" fmt, \
+ (p_dev)->name ? (p_dev)->name : "", \
+__func__, \
+ ##__VA_ARGS__); \
+ else \
+ rte_log(RTE_LOG_NOTICE, RTE_LOGTYPE_PMD,\
+ "[QEDE PMD: (%s)]%s:" fmt, \
+ (p_dev)->name ? (p_dev)->name : "", \
+__func__, \
+ ##__VA_ARGS__); \
+} while (0)
#ifdef RTE_LIBRTE_QEDE_DEBUG_INFO
#define DP_INFO(p_dev, fmt, ...) \
diff --git a/drivers/net/qede/qede_main.c b/drivers/net/qede/qede_main.c
index f74626b..01584f8 100644
--- a/drivers/net/qede/qede_main.c
+++ b/drivers/net/qede/qede_main.c
@@ -130,12 +130,12 @@ static int qed_load_firmware_data(struct ecore_dev *edev)
fd = open(fw_file, O_RDONLY);
if (fd < 0) {
- DP_NOTICE(edev, false, "Can't open firmware file\n");
+ DP_ERR(edev, "Can't open firmware file\n");
return -ENOENT;
}
if (fstat(fd, &st) < 0) {
- DP_NOTICE(edev, false, "Can't stat firmware file\n");
+ DP_ERR(edev, "Can't stat firmware file\n");
close(fd);
return -1;
}
@@ -143,20 +143,20 @@ static int qed_load_firmware_data(struct ecore_dev *edev)
edev->firmware = rte_zmalloc("qede_fw", st.st_size,
RTE_CACHE_LINE_SIZE);
if (!edev->firmware) {
- DP_NOTICE(edev, false, "Can't allocate memory for firmware\n");
+
[dpdk-dev] [PATCH 6/9] net/qede: set mdump flag
Set allow management FW dump flag during HW prepare.
Signed-off-by: Rasesh Mody
---
drivers/net/qede/base/ecore.h |2 +-
drivers/net/qede/base/ecore_dev.c |1 +
drivers/net/qede/base/ecore_dev_api.h |3 +++
drivers/net/qede/base/ecore_mcp.c |3 +--
drivers/net/qede/qede_main.c |1 +
5 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index d92988e..0d68a9b 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -770,7 +770,7 @@ struct ecore_dev {
boolattn_clr_en;
/* Indicates whether allowing the MFW to collect a crash dump */
- boolmdump_en;
+ boolallow_mdump;
/* Indicates if the reg_fifo is checked after any register access */
boolchk_reg_fifo;
diff --git a/drivers/net/qede/base/ecore_dev.c
b/drivers/net/qede/base/ecore_dev.c
index 138b986..4cfa668 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -3565,6 +3565,7 @@ enum _ecore_status_t ecore_hw_prepare(struct ecore_dev
*p_dev,
enum _ecore_status_t rc;
p_dev->chk_reg_fifo = p_params->chk_reg_fifo;
+ p_dev->allow_mdump = p_params->allow_mdump;
if (p_params->b_relaxed_probe)
p_params->p_relaxed_res = ECORE_HW_PREPARE_SUCCESS;
diff --git a/drivers/net/qede/base/ecore_dev_api.h
b/drivers/net/qede/base/ecore_dev_api.h
index e64a768..886407b 100644
--- a/drivers/net/qede/base/ecore_dev_api.h
+++ b/drivers/net/qede/base/ecore_dev_api.h
@@ -186,6 +186,9 @@ struct ecore_hw_prepare_params {
/* The OS Epoch time in seconds */
u32 epoch;
+ /* Allow the MFW to collect a crash dump */
+ bool allow_mdump;
+
/* Allow prepare to pass even if some initializations are failing.
* If set, the `p_prepare_res' field would be set with the return,
* and might allow probe to pass even if there are certain issues.
diff --git a/drivers/net/qede/base/ecore_mcp.c
b/drivers/net/qede/base/ecore_mcp.c
index a834ac7..03cc901 100644
--- a/drivers/net/qede/base/ecore_mcp.c
+++ b/drivers/net/qede/base/ecore_mcp.c
@@ -1556,10 +1556,9 @@ static void ecore_mcp_handle_critical_error(struct
ecore_hwfn *p_hwfn,
DP_NOTICE(p_hwfn, false,
"Received a critical error notification from the MFW!\n");
- if (p_hwfn->p_dev->mdump_en) {
+ if (p_hwfn->p_dev->allow_mdump) {
DP_NOTICE(p_hwfn, false,
"Not acknowledging the notification to allow the MFW
crash dump\n");
- p_hwfn->p_dev->mdump_en = false;
return;
}
diff --git a/drivers/net/qede/qede_main.c b/drivers/net/qede/qede_main.c
index 01584f8..a6ff7af 100644
--- a/drivers/net/qede/qede_main.c
+++ b/drivers/net/qede/qede_main.c
@@ -60,6 +60,7 @@ static void qed_init_pci(struct ecore_dev *edev, struct
rte_pci_device *pci_dev)
hw_prepare_params.drv_resc_alloc = false;
hw_prepare_params.chk_reg_fifo = false;
hw_prepare_params.initiate_pf_flr = true;
+ hw_prepare_params.allow_mdump = false;
hw_prepare_params.epoch = (u32)time(NULL);
rc = ecore_hw_prepare(edev, &hw_prepare_params);
if (rc) {
--
1.7.10.3
[dpdk-dev] [PATCH 4/9] net/qede: comments traces and format changes
Changes include
- comment modifications
- adds tracing during initialization
- adds/removes new lines
Signed-off-by: Rasesh Mody
---
drivers/net/qede/base/bcm_osal.c | 14 --
drivers/net/qede/qede_ethdev.c | 11 +++
drivers/net/qede/qede_rxtx.c |6 +++---
3 files changed, 22 insertions(+), 9 deletions(-)
diff --git a/drivers/net/qede/base/bcm_osal.c b/drivers/net/qede/base/bcm_osal.c
index 4dee4da..70c53f5 100644
--- a/drivers/net/qede/base/bcm_osal.c
+++ b/drivers/net/qede/base/bcm_osal.c
@@ -146,9 +146,10 @@ void *osal_dma_alloc_coherent(struct ecore_dev *p_dev,
}
*phys = mz->phys_addr;
ecore_mz_mapping[ecore_mz_count++] = mz;
- DP_VERBOSE(p_dev, ECORE_MSG_PROBE,
- "size=%zu phys=0x%" PRIx64 " virt=%p on socket=%u\n",
- mz->len, mz->phys_addr, mz->addr, socket_id);
+ DP_VERBOSE(p_dev, ECORE_MSG_SP,
+ "Allocated dma memory size=%zu phys=0x%lx"
+ " virt=%p core=%d\n",
+ mz->len, (uintptr_t)mz->phys_addr, mz->addr, core_id);
return mz->addr;
}
@@ -183,9 +184,10 @@ void *osal_dma_alloc_coherent_aligned(struct ecore_dev
*p_dev,
}
*phys = mz->phys_addr;
ecore_mz_mapping[ecore_mz_count++] = mz;
- DP_VERBOSE(p_dev, ECORE_MSG_PROBE,
- "aligned memory size=%zu phys=0x%" PRIx64 " virt=%p
core=%d\n",
- mz->len, mz->phys_addr, mz->addr, core_id);
+ DP_VERBOSE(p_dev, ECORE_MSG_SP,
+ "Allocated aligned dma memory size=%zu phys=0x%lx"
+ " virt=%p core=%d\n",
+ mz->len, (uintptr_t)mz->phys_addr, mz->addr, core_id);
return mz->addr;
}
diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index fcc9bbb..8e18a17 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -1121,8 +1121,10 @@ static int qede_dev_configure(struct rte_eth_dev
*eth_dev)
/* Sanity checks and throw warnings */
if (rxmode->enable_scatter)
eth_dev->data->scattered_rx = 1;
+
if (!rxmode->hw_strip_crc)
DP_INFO(edev, "L2 CRC stripping is always enabled in hw\n");
+
if (!rxmode->hw_ip_checksum)
DP_INFO(edev, "IP/UDP/TCP checksum offload is always enabled "
"in hw\n");
@@ -2163,6 +2165,8 @@ static int qede_vxlan_tunn_config(struct rte_eth_dev
*eth_dev,
uint16_t filter_type;
int rc, i;
+ PMD_INIT_FUNC_TRACE(edev);
+
filter_type = conf->filter_type | qdev->vxlan_filter_type;
/* First determine if the given filter classification is supported */
qede_get_ecore_tunn_params(filter_type, &type, &clss, str);
@@ -2605,6 +2609,13 @@ static int qede_eth_dev_init(struct rte_eth_dev *eth_dev)
static int qede_dev_common_uninit(struct rte_eth_dev *eth_dev)
{
+#ifdef RTE_LIBRTE_QEDE_DEBUG_INIT
+ struct qede_dev *qdev = eth_dev->data->dev_private;
+ struct ecore_dev *edev = &qdev->edev;
+
+ PMD_INIT_FUNC_TRACE(edev);
+#endif
+
/* only uninitialize in the primary process */
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c
index 5c9a4dd..e48fd66 100644
--- a/drivers/net/qede/qede_rxtx.c
+++ b/drivers/net/qede/qede_rxtx.c
@@ -82,6 +82,7 @@ static inline int qede_alloc_rx_buffer(struct qede_rx_queue
*rxq)
rxq->nb_rx_desc = nb_desc;
rxq->queue_id = queue_idx;
rxq->port_id = dev->data->port_id;
+
max_rx_pkt_len = (uint16_t)rxmode->max_rx_pkt_len;
qdev->mtu = max_rx_pkt_len;
@@ -94,6 +95,7 @@ static inline int qede_alloc_rx_buffer(struct qede_rx_queue
*rxq)
dev->data->scattered_rx = 1;
}
}
+
if (dev->data->scattered_rx)
rxq->rx_buf_size = bufsz + QEDE_ETH_OVERHEAD;
else
@@ -704,7 +706,6 @@ void qede_dealloc_fp_resc(struct rte_eth_dev *eth_dev)
qede_free_tx_pkt(txq);
}
-
static int qede_drain_txq(struct qede_dev *qdev,
struct qede_tx_queue *txq, bool allow_drain)
{
@@ -740,7 +741,6 @@ static int qede_drain_txq(struct qede_dev *qdev,
return 0;
}
-
/* Stops a given TX queue in the HW */
static int qede_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t
tx_queue_id)
{
@@ -1083,7 +1083,7 @@ static inline uint32_t
qede_rx_cqe_to_tunn_pkt_type(uint16_t flags)
pkt_len;
if (unlikely(!cur_size)) {
PMD_RX_LOG(ERR, rxq, "Length is 0 while %u BDs"
- " left for mapping jumbo", num_segs);
+ " left for mapping jumbo\n", num_segs);
qede_recycle_rx_bd_ring(rxq, qdev, num_segs);
[dpdk-dev] [PATCH 7/9] net/qede: add missing check for VNI
Add missing check for VNI field while adding unicast filter.
Signed-off-by: Rasesh Mody
---
drivers/net/qede/qede_ethdev.c |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index ad264ba..a0616a4 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -571,6 +571,7 @@ static void qede_set_cmn_tunn_param(struct
ecore_tunnel_info *p_tunn,
SLIST_FOREACH(tmp, &qdev->uc_list_head, list) {
if ((memcmp(mac_addr, &tmp->mac,
ETHER_ADDR_LEN) == 0) &&
+ucast->vni == tmp->vni &&
ucast->vlan == tmp->vlan) {
DP_ERR(edev, "Unicast MAC is already added"
" with vlan = %u, vni = %u\n",
--
1.7.10.3
[dpdk-dev] [PATCH 8/9] net/qede: use newer packet mbuf allocate API
Use rte_pktmbuf_alloc() API instead of rte_mbuf_raw_alloc().
Signed-off-by: Rasesh Mody
---
drivers/net/qede/qede_rxtx.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c
index 8063233..6b047a3 100644
--- a/drivers/net/qede/qede_rxtx.c
+++ b/drivers/net/qede/qede_rxtx.c
@@ -16,7 +16,7 @@ static inline int qede_alloc_rx_buffer(struct qede_rx_queue
*rxq)
dma_addr_t mapping;
uint16_t idx = rxq->sw_rx_prod & NUM_RX_BDS(rxq);
- new_mb = rte_mbuf_raw_alloc(rxq->mb_pool);
+ new_mb = rte_pktmbuf_alloc(rxq->mb_pool);
if (unlikely(!new_mb)) {
PMD_RX_LOG(ERR, rxq,
"Failed to allocate rx buffer "
--
1.7.10.3
[dpdk-dev] [PATCH 9/9] net/qede: update PMD version to 2.5.1.1
Signed-off-by: Rasesh Mody --- drivers/net/qede/qede_ethdev.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h index 9a93286..510b6e2 100644 --- a/drivers/net/qede/qede_ethdev.h +++ b/drivers/net/qede/qede_ethdev.h @@ -50,7 +50,7 @@ #define QEDE_PMD_VER_PREFIX"QEDE PMD" #define QEDE_PMD_VERSION_MAJOR 2 #define QEDE_PMD_VERSION_MINOR 5 -#define QEDE_PMD_VERSION_REVISION 0 +#define QEDE_PMD_VERSION_REVISION 1 #define QEDE_PMD_VERSION_PATCH 1 #define QEDE_PMD_VERSION qede_stringify(QEDE_PMD_VERSION_MAJOR) "." \ -- 1.7.10.3
Re: [dpdk-dev] [PATCH v5 5/7] bus: add helper to find a bus from a device name
On Thu, Jun 29, 2017 at 09:56:30AM +0200, Jan Blunck wrote: > On Wed, Jun 28, 2017 at 7:03 PM, Thomas Monjalon wrote: > > 27/06/2017 20:55, Jan Blunck: > >> On Wed, Jun 21, 2017 at 1:30 AM, Gaetan Rivet > >> wrote: > >> > /** > >> > + * Find a bus capable of identifying a device. > >> > + * > >> > + * @param str > >> > + * A device identifier (PCI address, virtual PMD name, ...). > >> > + * > >> > + * @return > >> > + * A valid bus handle if found. > >> > + * NULL if no bus is able to parse this device. > >> > + */ > >> > +struct rte_bus *rte_bus_from_dev(const char *str); > >> > >> I still don't agree with this. The bus name should be passed > >> explicitly by the user of the API. > >> > >> NAK. > > > > Please explain why you think the bus name should be explicit. > > If the bus is ambiguous, it can be explicited by the user. > > > > I see some good benefits in being tolerant with the bus/device > > representation. It provides a smooth transition to the bus model. > > > > We build libraries. The applications we build with the help of those > libraries get notified by the OS about device events. Those devices > are chields of their parent bus. At the time the event is fired the OS > already knows about: > > - the bus name (parent) > - the device name (child) > - additional event parameters (environment) > > Blame me that I probably spent too much time with Kay Sievers and > GregKH to understand that device naming is easy to get wrong. Just > look at the hyperv device names and how they switched to the UUID > scheme. I don't think that hyperv is the only bus that uses UUID as > device identification. We should not codify a policy of how to deduce > a bus name from a given device name if that is knowledge that is > already present externally. Otherwise I fear this part of the EAL will > be subject to constant churn. I agree in the context of device events. But this development concerns all device identification scheme, not only in the context of hotplug where we can retrieve events giving proper info. It is parsing user input as well (command line or configuration). In this user-centric device specification, the issue is that the current model expect the user to provide the bus implicitly by using the right parameter (--vdev, -w). This identification *cannot* stay, as those are parsed within the EAL and specifics are getting out. What is left is thus a choice: either * We let the current scheme work for a time, while the EAL is being cleaned out, during which we need some crutch to emulate the current behavior * We force all users to migrate to the new format straight away with a full identification scheme. I planned for both eventuality in my deprecation notice, by warning that device parameters and definition might change this version. However, while I thought that it was possible it would happen, I think it is best to provide as much stability as possible while we work out the EAL internals. This API is only there because I choose to keep backward compatibility. A compromise might be to make it private to the EAL (I proposed it before but no one really responded so I haven't acted on it). This would help the future transition to the fully-qualified-device-identifier that we will have to require from our users. I'd like to hear from other DPDK devs as I think that surprising users is not something that should be done lightly. I understand your concern and am not opposed to address it. -- Gaëtan Rivet 6WIND
Re: [dpdk-dev] [PATCH 21/21 v3] doc: add NXP DPAA2 EVENTDEV details
> -Original Message- > From: Jerin Jacob [mailto:jerin.ja...@caviumnetworks.com] > Sent: Thursday, June 29, 2017 14:56 > To: Nipun Gupta > Cc: dev@dpdk.org; Hemant Agrawal ; > harry.van.haa...@intel.com; bruce.richard...@intel.com; > gage.e...@intel.com; Shreyansh Jain > Subject: Re: [PATCH 21/21 v3] doc: add NXP DPAA2 EVENTDEV details > > -Original Message- > > Date: Wed, 28 Jun 2017 20:46:04 +0530 > > From: Nipun Gupta > > To: dev@dpdk.org > > CC: hemant.agra...@nxp.com, jerin.ja...@caviumnetworks.com, > > harry.van.haa...@intel.com, bruce.richard...@intel.com, > > gage.e...@intel.com, shreyansh.j...@nxp.com, Nipun Gupta > > > > Subject: [PATCH 21/21 v3] doc: add NXP DPAA2 EVENTDEV details > > X-Mailer: git-send-email 1.9.1 > > > > Signed-off-by: Nipun Gupta > > --- > > MAINTAINERS| 1 + > > doc/guides/eventdevs/dpaa2.rst | 175 > + > > 2 files changed, 176 insertions(+) > > create mode 100644 doc/guides/eventdevs/dpaa2.rst > > > > diff --git a/MAINTAINERS b/MAINTAINERS > > index fe1a25b..d9dbf8f 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -584,6 +584,7 @@ NXP DPAA2 Eventdev PMD > > M: Hemant Agrawal > > M: Nipun Gupta > > F: drivers/event/dpaa2/ > > +F: doc/guides/eventdevs/dpaa2.rst > > > Fix the below warning from eventdevs/dpaa2.rst > > > ➜ [master][dpdk-next-eventdev] $ ./devtools/test-build.sh -j8 x86_64-native- > linuxapp-gcc+shared x86_64-native-linuxapp-gcc+debug > > ## x86_64-native-linuxapp-gcc+debug done. > == Build doxygen HTML API > == Build sphinx HTML guides > == Check docs > --- /dev/null 2017-06-29 11:41:04.749491167 +0530 > +++ .check/doc.txt2017-06-29 14:49:20.746576352 +0530 > @@ -0,0 +1 @@ > +/export/dpdk-next-eventdev/doc/guides/eventdevs/dpaa2.rst: WARNING: > document isn't included in any toctree Ill just send a new version fixing this. Thanks, Nipun > > ➜ [master][dpdk-next-eventdev] $ echo $? > 1
[dpdk-dev] [PATCH 00/21 v4] next-eventdev: NXP DPAA2 eventdev PMD
The following patch set adds NXP DPAA2 HW based eventdev implementation to the next-eventdev tree. The patchset consists of the following: - DPCON support required by DPAA2 eventdev - DPCI support in fslmc bus - Interrupt support in QBMAN - Implemetation of eventdev API's for DPAA2 - Documentation of DPAA2 eventdev PMD Changes in v4: Fixed doxygen warning Changes in v3: Rebased to dpdk master branch Fix shared library parallel build (patch 01/21) Fixed a checkpatch error Changes in v2: Rebase to latest dpdk-next-eventdev Update to support only atomic and ordered queues Fix checkpatch errors Hemant Agrawal (3): drivers: add bus dependency for event bus/fslmc: generic framework for mc object creation bus/fslmc: export qbman dqrr funcs for eventdev usages Nipun Gupta (18): event/dpaa2: add basic build infrastructure bus/fslmc: integrating dpio and dpbp to object framework bus/fslmc: adding basic dpcon support event/dpaa2: register dpcon as dpaa2 device for bus scan bus/fslmc: adding basic dpci support bus/fslmc: register dpci as dpaa2 device for bus scan bus/fslmc: adding cpu support in stashing config event/dpaa2: add initialization of event device bus/fslmc: add support for static dequeue from portal event/dpaa2: add configuration functions bus/fslmc: support enqueue with multiple enqueue descriptors bus/fslmc: add callback per queue to enable bus/fslmc: change func argument to const to avoid warning event/dpaa2: add enqueue and dequeue functionality fslmc/bus: add interrupt enabling routine bus/fslmc: enable portal interrupt handling event/dpaa2: handle timeout using interrupts in dequeue doc: add NXP DPAA2 EVENTDEV details MAINTAINERS| 5 + config/defconfig_arm64-dpaa2-linuxapp-gcc | 6 + doc/guides/eventdevs/dpaa2.rst | 175 ++ doc/guides/eventdevs/index.rst | 1 + drivers/Makefile | 1 + drivers/bus/fslmc/Makefile | 5 +- drivers/bus/fslmc/fslmc_vfio.c | 69 +- drivers/bus/fslmc/fslmc_vfio.h | 47 +- drivers/bus/fslmc/mc/dpci.c| 307 + drivers/bus/fslmc/mc/dpcon.c | 230 +++ drivers/bus/fslmc/mc/dpio.c| 44 ++ drivers/bus/fslmc/mc/fsl_dpci.h| 404 drivers/bus/fslmc/mc/fsl_dpci_cmd.h| 147 + drivers/bus/fslmc/mc/fsl_dpcon.h | 238 +++ drivers/bus/fslmc/mc/fsl_dpcon_cmd.h | 175 ++ drivers/bus/fslmc/mc/fsl_dpio.h| 30 + drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c | 14 +- drivers/bus/fslmc/portal/dpaa2_hw_dpci.c | 179 ++ drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 133 +++- drivers/bus/fslmc/portal/dpaa2_hw_dpio.h | 5 + drivers/bus/fslmc/portal/dpaa2_hw_pvt.h| 28 +- drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 46 +- drivers/bus/fslmc/qbman/qbman_portal.c | 94 ++- drivers/bus/fslmc/rte_bus_fslmc_version.map| 18 + drivers/event/Makefile | 2 + drivers/event/dpaa2/Makefile | 60 ++ drivers/event/dpaa2/dpaa2_eventdev.c | 691 + drivers/event/dpaa2/dpaa2_eventdev.h | 114 drivers/event/dpaa2/dpaa2_hw_dpcon.c | 139 + .../event/dpaa2/rte_pmd_dpaa2_event_version.map| 3 + mk/rte.app.mk | 1 + 31 files changed, 3370 insertions(+), 41 deletions(-) create mode 100644 doc/guides/eventdevs/dpaa2.rst create mode 100644 drivers/bus/fslmc/mc/dpci.c create mode 100644 drivers/bus/fslmc/mc/dpcon.c create mode 100644 drivers/bus/fslmc/mc/fsl_dpci.h create mode 100644 drivers/bus/fslmc/mc/fsl_dpci_cmd.h create mode 100644 drivers/bus/fslmc/mc/fsl_dpcon.h create mode 100644 drivers/bus/fslmc/mc/fsl_dpcon_cmd.h create mode 100644 drivers/bus/fslmc/portal/dpaa2_hw_dpci.c create mode 100644 drivers/event/dpaa2/Makefile create mode 100644 drivers/event/dpaa2/dpaa2_eventdev.c create mode 100644 drivers/event/dpaa2/dpaa2_eventdev.h create mode 100644 drivers/event/dpaa2/dpaa2_hw_dpcon.c create mode 100644 drivers/event/dpaa2/rte_pmd_dpaa2_event_version.map -- 1.9.1
[dpdk-dev] [PATCH 04/21 v4] bus/fslmc: integrating dpio and dpbp to object framework
This patch removes the existing static call for dpio and dpbp
create and add them to object registration framework.
This patch also changes the vfio mc object processing to use
the framework.
Signed-off-by: Hemant Agrawal
Signed-off-by: Nipun Gupta
---
drivers/bus/fslmc/fslmc_vfio.c | 24 ++--
drivers/bus/fslmc/fslmc_vfio.h | 9 ++---
drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c | 14 +++---
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 11 +--
4 files changed, 32 insertions(+), 26 deletions(-)
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index b9dd2a9..6ebf779 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -374,7 +374,6 @@ int fslmc_vfio_process_group(void)
char path[PATH_MAX];
int64_t v_addr;
int ndev_count;
- int dpio_count = 0, dpbp_count = 0;
struct fslmc_vfio_group *group = &vfio_groups[0];
static int process_once;
@@ -513,18 +512,17 @@ int fslmc_vfio_process_group(void)
object_type, object_id);
fslmc_bus_add_device(dev);
- }
- if (!strcmp(object_type, "dpio")) {
- ret = dpaa2_create_dpio_device(vdev,
- &device_info,
+ } else {
+ /* Parse all other objects */
+ struct rte_dpaa2_object *object;
+
+ TAILQ_FOREACH(object, &fslmc_obj_list, next) {
+ if (!strcmp(object_type, object->name))
+ object->create(vdev, &device_info,
object_id);
- if (!ret)
- dpio_count++;
- }
- if (!strcmp(object_type, "dpbp")) {
- ret = dpaa2_create_dpbp_device(object_id);
- if (!ret)
- dpbp_count++;
+ else
+ continue;
+ }
}
}
closedir(d);
@@ -533,8 +531,6 @@ int fslmc_vfio_process_group(void)
if (ret)
FSLMC_VFIO_LOG(DEBUG, "Error in affining qbman swp %d", ret);
- FSLMC_VFIO_LOG(DEBUG, "DPAA2: Added dpbp_count = %d dpio_count=%d",
- dpbp_count, dpio_count);
return 0;
FAILURE:
diff --git a/drivers/bus/fslmc/fslmc_vfio.h b/drivers/bus/fslmc/fslmc_vfio.h
index 58b3acd..ffed62e 100644
--- a/drivers/bus/fslmc/fslmc_vfio.h
+++ b/drivers/bus/fslmc/fslmc_vfio.h
@@ -39,6 +39,8 @@
#define DPAA2_VENDOR_ID0x1957
#define DPAA2_MC_DPNI_DEVID7
#define DPAA2_MC_DPSECI_DEVID 3
+#define DPAA2_MC_DPIO_DEVID9
+#define DPAA2_MC_DPBP_DEVID10
#define VFIO_MAX_GRP 1
@@ -90,13 +92,6 @@ int vfio_dmamap_mem_region(
int fslmc_vfio_process_group(void);
int rte_fslmc_vfio_dmamap(void);
-/* create dpio device */
-int dpaa2_create_dpio_device(struct fslmc_vfio_device *vdev,
-struct vfio_device_info *obj_info,
-int object_id);
-
-int dpaa2_create_dpbp_device(int dpbp_id);
-
/**
* Register a DPAA2 MC Object driver.
*
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
b/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
index a665ec5..b55335a 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
@@ -57,9 +57,10 @@
static struct dpbp_dev_list dpbp_dev_list
= TAILQ_HEAD_INITIALIZER(dpbp_dev_list); /*!< DPBP device list */
-int
-dpaa2_create_dpbp_device(
- int dpbp_id)
+static int
+dpaa2_create_dpbp_device(struct fslmc_vfio_device *vdev __rte_unused,
+struct vfio_device_info *obj_info __rte_unused,
+int dpbp_id)
{
struct dpaa2_dpbp_dev *dpbp_node;
int ret;
@@ -127,3 +128,10 @@ void dpaa2_free_dpbp_dev(struct dpaa2_dpbp_dev *dpbp)
}
}
}
+
+static struct rte_dpaa2_object rte_dpaa2_dpbp_obj = {
+ .object_id = DPAA2_MC_DPBP_DEVID,
+ .create = dpaa2_create_dpbp_device,
+};
+
+RTE_PMD_REGISTER_DPAA2_OBJECT(dpbp, rte_dpaa2_dpbp_obj);
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index 3213237..730555f 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -334,10 +334,10 @@ static inline struct dpaa2_dpio_dev
*dpaa2_get_qbman_swp(void)
}
}
-int
+static int
dpaa2_create_dpio_device(struct fslmc_vfio_device *vdev,
struct vfio_device_info *obj_info,
- int object_id)
+int object_id)
{
struct dpaa2_dpio_dev *dpio_dev;
struct vfio_region_info reg_info =
[dpdk-dev] [PATCH 01/21 v4] drivers: add bus dependency for event
From: Hemant Agrawal Signed-off-by: Hemant Agrawal --- drivers/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/Makefile b/drivers/Makefile index a04a01f..7fef66d 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -39,5 +39,6 @@ DEPDIRS-net := bus mempool DIRS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += crypto DEPDIRS-crypto := mempool DIRS-$(CONFIG_RTE_LIBRTE_EVENTDEV) += event +DEPDIRS-event := bus include $(RTE_SDK)/mk/rte.subdir.mk -- 1.9.1
[dpdk-dev] [PATCH 03/21 v4] bus/fslmc: generic framework for mc object creation
From: Hemant Agrawal
There are muliple help mc object, which are not an independent
device, but they are required for dpaa2 based devices.
This framework allows registration and handling of all such
mc devices.
Signed-off-by: Hemant Agrawal
Signed-off-by: Nipun Gupta
---
drivers/bus/fslmc/fslmc_vfio.c | 11 +
drivers/bus/fslmc/fslmc_vfio.h | 37 +
drivers/bus/fslmc/rte_bus_fslmc_version.map | 1 +
3 files changed, 49 insertions(+)
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index 8471a9a..b9dd2a9 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -80,6 +80,17 @@
void *(*rte_mcp_ptr_list);
static uint32_t mcp_id;
static int is_dma_done;
+static struct rte_fslmc_object_list fslmc_obj_list =
+ TAILQ_HEAD_INITIALIZER(fslmc_obj_list);
+
+/*register a fslmc bus based dpaa2 driver */
+void
+rte_fslmc_object_register(struct rte_dpaa2_object *object)
+{
+ RTE_VERIFY(object);
+
+ TAILQ_INSERT_TAIL(&fslmc_obj_list, object, next);
+}
static int vfio_connect_container(struct fslmc_vfio_group *vfio_group)
{
diff --git a/drivers/bus/fslmc/fslmc_vfio.h b/drivers/bus/fslmc/fslmc_vfio.h
index 53dd0b7..58b3acd 100644
--- a/drivers/bus/fslmc/fslmc_vfio.h
+++ b/drivers/bus/fslmc/fslmc_vfio.h
@@ -63,6 +63,24 @@
struct fslmc_vfio_group *group_list[VFIO_MAX_GRP];
} fslmc_vfio_container;
+struct rte_dpaa2_object;
+
+TAILQ_HEAD(rte_fslmc_object_list, rte_dpaa2_object);
+
+typedef int (*rte_fslmc_obj_create_t)(struct fslmc_vfio_device *vdev,
+struct vfio_device_info *obj_info,
+int object_id);
+
+/**
+ * A structure describing a DPAA2 driver.
+ */
+struct rte_dpaa2_object {
+ TAILQ_ENTRY(rte_dpaa2_object) next; /**< Next in list. */
+ const char *name;/**< Name of Object. */
+ uint16_t object_id; /**< DPAA2 Object ID */
+ rte_fslmc_obj_create_t create;
+};
+
int vfio_dmamap_mem_region(
uint64_t vaddr,
uint64_t iova,
@@ -79,4 +97,23 @@ int dpaa2_create_dpio_device(struct fslmc_vfio_device *vdev,
int dpaa2_create_dpbp_device(int dpbp_id);
+/**
+ * Register a DPAA2 MC Object driver.
+ *
+ * @param mc_object
+ * A pointer to a rte_dpaa_object structure describing the mc object
+ * to be registered.
+ */
+void rte_fslmc_object_register(struct rte_dpaa2_object *object);
+
+/** Helper for DPAA2 object registration */
+#define RTE_PMD_REGISTER_DPAA2_OBJECT(nm, dpaa2_obj) \
+RTE_INIT(dpaa2objinitfn_ ##nm); \
+static void dpaa2objinitfn_ ##nm(void) \
+{\
+ (dpaa2_obj).name = RTE_STR(nm);\
+ rte_fslmc_object_register(&dpaa2_obj); \
+} \
+RTE_PMD_EXPORT_NAME(nm, __COUNTER__)
+
#endif /* _FSLMC_VFIO_H_ */
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map
b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index 43f3354..90db78c 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -56,6 +56,7 @@ DPDK_17.08 {
mc_get_soc_version;
mc_get_version;
qbman_result_SCN_state_in_mem;
+ rte_fslmc_object_register;
rte_global_active_dqs_list;
} DPDK_17.05;
--
1.9.1
[dpdk-dev] [PATCH 02/21 v4] event/dpaa2: add basic build infrastructure
Signed-off-by: Nipun Gupta Acked-by: Jerin Jacob --- MAINTAINERS| 4 ++ config/defconfig_arm64-dpaa2-linuxapp-gcc | 6 ++ drivers/event/Makefile | 2 + drivers/event/dpaa2/Makefile | 52 +++ drivers/event/dpaa2/dpaa2_eventdev.c | 74 ++ drivers/event/dpaa2/dpaa2_eventdev.h | 51 +++ .../event/dpaa2/rte_pmd_dpaa2_event_version.map| 3 + mk/rte.app.mk | 1 + 8 files changed, 193 insertions(+) create mode 100644 drivers/event/dpaa2/Makefile create mode 100644 drivers/event/dpaa2/dpaa2_eventdev.c create mode 100644 drivers/event/dpaa2/dpaa2_eventdev.h create mode 100644 drivers/event/dpaa2/rte_pmd_dpaa2_event_version.map diff --git a/MAINTAINERS b/MAINTAINERS index f6095ef..fe1a25b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -580,6 +580,10 @@ F: drivers/event/sw/ F: test/test/test_eventdev_sw.c F: doc/guides/eventdevs/sw.rst +NXP DPAA2 Eventdev PMD +M: Hemant Agrawal +M: Nipun Gupta +F: drivers/event/dpaa2/ Packet processing - diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc index 2304ab6..45e1eb5 100644 --- a/config/defconfig_arm64-dpaa2-linuxapp-gcc +++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc @@ -80,3 +80,9 @@ CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_RX=n # on a single DPAA2 SEC device. # CONFIG_RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS=2048 + +# +# Compile schedule-oriented NXP DPAA2 EVENTDEV driver +# +CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=y +CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV_DEBUG=n diff --git a/drivers/event/Makefile b/drivers/event/Makefile index 1cf389e..0f12cc9 100644 --- a/drivers/event/Makefile +++ b/drivers/event/Makefile @@ -39,5 +39,7 @@ DIRS-$(CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV) += sw DEPDIRS-sw = $(core-libs) librte_kvargs librte_ring DIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += octeontx DEPDIRS-octeontx = $(core-libs) +DIRS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV) += dpaa2 +DEPDIRS-dpaa2 = $(core-libs) librte_bus_fslmc include $(RTE_SDK)/mk/rte.subdir.mk diff --git a/drivers/event/dpaa2/Makefile b/drivers/event/dpaa2/Makefile new file mode 100644 index 000..8a021ca --- /dev/null +++ b/drivers/event/dpaa2/Makefile @@ -0,0 +1,52 @@ +# BSD LICENSE +# +# Copyright(c) 2017 NXP. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# * Neither the name of NXP nor the names of its +# contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +include $(RTE_SDK)/mk/rte.vars.mk + +# +# library name +# +LIB = librte_pmd_dpaa2_event.a + +CFLAGS += $(WERROR_FLAGS) + +CFLAGS += -I$(RTE_SDK)/drivers/event/dpaa2 +# versioning export map +EXPORT_MAP := rte_pmd_dpaa2_event_version.map + +LIBABIVER := 1 + +# +# all source are stored in SRCS-y +# +SRCS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV) += dpaa2_eventdev.c + +include $(RTE_SDK)/mk/rte.lib.mk diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c b/drivers/event/dpaa2/dpaa2_eventdev.c new file mode 100644 index 000..191901e --- /dev/null +++ b/drivers/event/dpaa2/dpaa2_eventdev.c @@ -0,0 +1,74 @@ +/*- + * BSD LICENSE + * + * Copyright 2017 NXP. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions
[dpdk-dev] [PATCH 05/21 v4] bus/fslmc: adding basic dpcon support
Signed-off-by: Nipun Gupta
---
drivers/bus/fslmc/Makefile | 3 +-
drivers/bus/fslmc/fslmc_vfio.h | 1 +
drivers/bus/fslmc/mc/dpcon.c| 230 +++
drivers/bus/fslmc/mc/fsl_dpcon.h| 238
drivers/bus/fslmc/mc/fsl_dpcon_cmd.h| 175
drivers/bus/fslmc/rte_bus_fslmc_version.map | 2 +
6 files changed, 648 insertions(+), 1 deletion(-)
create mode 100644 drivers/bus/fslmc/mc/dpcon.c
create mode 100644 drivers/bus/fslmc/mc/fsl_dpcon.h
create mode 100644 drivers/bus/fslmc/mc/fsl_dpcon_cmd.h
diff --git a/drivers/bus/fslmc/Makefile b/drivers/bus/fslmc/Makefile
index 7d9f4b6..38d884e 100644
--- a/drivers/bus/fslmc/Makefile
+++ b/drivers/bus/fslmc/Makefile
@@ -66,7 +66,8 @@ SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += \
mc/dpmng.c \
mc/dpbp.c \
mc/dpio.c \
-mc/mc_sys.c
+mc/mc_sys.c \
+ mc/dpcon.c \
SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += portal/dpaa2_hw_dpio.c
SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += portal/dpaa2_hw_dpbp.c
diff --git a/drivers/bus/fslmc/fslmc_vfio.h b/drivers/bus/fslmc/fslmc_vfio.h
index ffed62e..eddce31 100644
--- a/drivers/bus/fslmc/fslmc_vfio.h
+++ b/drivers/bus/fslmc/fslmc_vfio.h
@@ -39,6 +39,7 @@
#define DPAA2_VENDOR_ID0x1957
#define DPAA2_MC_DPNI_DEVID7
#define DPAA2_MC_DPSECI_DEVID 3
+#define DPAA2_MC_DPCON_DEVID 5
#define DPAA2_MC_DPIO_DEVID9
#define DPAA2_MC_DPBP_DEVID10
diff --git a/drivers/bus/fslmc/mc/dpcon.c b/drivers/bus/fslmc/mc/dpcon.c
new file mode 100644
index 000..b078dff
--- /dev/null
+++ b/drivers/bus/fslmc/mc/dpcon.c
@@ -0,0 +1,230 @@
+/* Copyright 2013-2016 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#include
+#include
+#include
+#include
+
+int dpcon_open(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ int dpcon_id,
+ uint16_t *token)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPCON_CMDID_OPEN,
+ cmd_flags,
+ 0);
+ DPCON_CMD_OPEN(cmd, dpcon_id);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+
+ return 0;
+}
+
+int dpcon_close(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPCON_CMDID_CLOSE,
+ cmd_flags,
+ token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpcon_create(struct fsl_mc_io *mc_io,
+uint16_t dprc_token,
+ uint32_t cmd_flags,
+ const struct dpcon_cfg *cfg,
+ uint32_t *obj_id)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.
[dpdk-dev] [PATCH 07/21 v4] event/dpaa2: register dpcon as dpaa2 device for bus scan
Registering dpcon as dpaa2 type device handling initialization,
allocation and freeing of the device
Signed-off-by: Nipun Gupta
---
drivers/event/dpaa2/Makefile | 8 ++
drivers/event/dpaa2/dpaa2_eventdev.h | 18 +
drivers/event/dpaa2/dpaa2_hw_dpcon.c | 139 +++
3 files changed, 165 insertions(+)
create mode 100644 drivers/event/dpaa2/dpaa2_hw_dpcon.c
diff --git a/drivers/event/dpaa2/Makefile b/drivers/event/dpaa2/Makefile
index 8a021ca..0566643 100644
--- a/drivers/event/dpaa2/Makefile
+++ b/drivers/event/dpaa2/Makefile
@@ -38,7 +38,14 @@ LIB = librte_pmd_dpaa2_event.a
CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc
+CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc/qbman/include
+CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc/mc
+CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc/portal
+CFLAGS += -I$(RTE_SDK)/drivers/mempool/dpaa2
CFLAGS += -I$(RTE_SDK)/drivers/event/dpaa2
+CFLAGS += -I$(RTE_SDK)/lib/librte_eal/linuxapp/eal
+
# versioning export map
EXPORT_MAP := rte_pmd_dpaa2_event_version.map
@@ -47,6 +54,7 @@ LIBABIVER := 1
#
# all source are stored in SRCS-y
#
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV) += dpaa2_hw_dpcon.c
SRCS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV) += dpaa2_eventdev.c
include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/event/dpaa2/dpaa2_eventdev.h
b/drivers/event/dpaa2/dpaa2_eventdev.h
index 959f443..b151502 100644
--- a/drivers/event/dpaa2/dpaa2_eventdev.h
+++ b/drivers/event/dpaa2/dpaa2_eventdev.h
@@ -34,6 +34,10 @@
#define __DPAA2_EVENTDEV_H__
#include
+#include
+#include
+#include
+
#define EVENTDEV_NAME_DPAA2_PMDevent_dpaa2
#ifdef RTE_LIBRTE_PMD_DPAA2_EVENTDEV_DEBUG
@@ -48,4 +52,18 @@
#define PMD_DRV_ERR(fmt, args...) \
RTE_LOG(ERR, PMD, "%s(): " fmt "\n", __func__, ## args)
+struct dpaa2_dpcon_dev {
+ TAILQ_ENTRY(dpaa2_dpcon_dev) next;
+ struct fsl_mc_io dpcon;
+ uint16_t token;
+ rte_atomic16_t in_use;
+ uint32_t dpcon_id;
+ uint16_t qbman_ch_id;
+ uint8_t num_priorities;
+ uint8_t channel_index;
+};
+
+struct dpaa2_dpcon_dev *rte_dpaa2_alloc_dpcon_dev(void);
+void rte_dpaa2_free_dpcon_dev(struct dpaa2_dpcon_dev *dpcon);
+
#endif /* __DPAA2_EVENTDEV_H__ */
diff --git a/drivers/event/dpaa2/dpaa2_hw_dpcon.c
b/drivers/event/dpaa2/dpaa2_hw_dpcon.c
new file mode 100644
index 000..27f5bcb
--- /dev/null
+++ b/drivers/event/dpaa2/dpaa2_hw_dpcon.c
@@ -0,0 +1,139 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright 2017 NXP.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of NXP nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include "dpaa2_eventdev.h"
+
+TAILQ_HEAD(dpcon_dev_list, dpaa2_dpcon_dev);
+static struct dpcon_dev_list dpcon_dev_list
+ = TAILQ_HEAD_INITIALIZER(dpcon_dev_list); /*!< DPCON device list */
+
+static int
+rte_dpaa2_create_dpcon_device(struct fslmc_vfio_device *vdev __rte_unused,
+ struct vfio_device_info *obj_info __rte_unused,
+int dpcon_id)
+{
+ struct dpaa2_dpcon_dev *dpcon_node;
+ struct dpcon_attr attr;
+ int ret;
+
+ /* Allocate DPAA2 dpcon handle */
+ dpcon_node = rte_malloc(NULL, sizeof(struct dpaa2_dpcon_dev), 0);
+ if (!dpcon_node) {
+ PMD_DRV_LOG(
[dpdk-dev] [PATCH 08/21 v4] bus/fslmc: adding basic dpci support
Signed-off-by: Nipun Gupta
---
drivers/bus/fslmc/Makefile | 1 +
drivers/bus/fslmc/mc/dpci.c | 307 +
drivers/bus/fslmc/mc/fsl_dpci.h | 404
drivers/bus/fslmc/mc/fsl_dpci_cmd.h | 147 ++
drivers/bus/fslmc/rte_bus_fslmc_version.map | 1 +
5 files changed, 860 insertions(+)
create mode 100644 drivers/bus/fslmc/mc/dpci.c
create mode 100644 drivers/bus/fslmc/mc/fsl_dpci.h
create mode 100644 drivers/bus/fslmc/mc/fsl_dpci_cmd.h
diff --git a/drivers/bus/fslmc/Makefile b/drivers/bus/fslmc/Makefile
index 38d884e..4884d87 100644
--- a/drivers/bus/fslmc/Makefile
+++ b/drivers/bus/fslmc/Makefile
@@ -68,6 +68,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += \
mc/dpio.c \
mc/mc_sys.c \
mc/dpcon.c \
+ mc/dpci.c
SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += portal/dpaa2_hw_dpio.c
SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += portal/dpaa2_hw_dpbp.c
diff --git a/drivers/bus/fslmc/mc/dpci.c b/drivers/bus/fslmc/mc/dpci.c
new file mode 100644
index 000..0ea7837
--- /dev/null
+++ b/drivers/bus/fslmc/mc/dpci.c
@@ -0,0 +1,307 @@
+/*-
+ * This file is provided under a dual BSD/GPLv2 license. When using or
+ * redistributing this file, you may do so under either license.
+ *
+ * BSD LICENSE
+ *
+ * Copyright 2013-2016 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * GPL LICENSE SUMMARY
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#include
+#include
+#include
+#include
+
+int dpci_open(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ int dpci_id,
+ uint16_t *token)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPCI_CMDID_OPEN,
+ cmd_flags,
+ 0);
+ DPCI_CMD_OPEN(cmd, dpci_id);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+
+ return 0;
+}
+
+int dpci_close(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPCI_CMDID_CLOSE,
+ cmd_flags,
+ token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpci_create(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ const struct dpci_cfg *cfg,
+ uint32_t *obj_id)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPCI_CMDID_CREATE,
+ cmd_flags,
+ dprc_token);
+ DPCI_CMD_CREATE(cmd, cfg);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ CMD_CRE
[dpdk-dev] [PATCH 06/21 v4] bus/fslmc: export qbman dqrr funcs for eventdev usages
From: Hemant Agrawal
Signed-off-by: Hemant Agrawal
---
drivers/bus/fslmc/rte_bus_fslmc_version.map | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map
b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index 783c3e5..01a7939 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -57,7 +57,15 @@ DPDK_17.08 {
dpcon_get_attributes;
mc_get_soc_version;
mc_get_version;
+ qbman_eq_desc_set_dca;
+ qbman_get_dqrr_from_idx;
+ qbman_get_dqrr_idx;
+ qbman_result_DQ_fqd_ctx;
qbman_result_SCN_state_in_mem;
+ qbman_swp_dqrr_consume;
+ qbman_swp_dqrr_next;
+ qbman_swp_push_set;
+ rte_dpaa2_alloc_dpci_dev;
rte_fslmc_object_register;
rte_global_active_dqs_list;
--
1.9.1
[dpdk-dev] [PATCH 10/21 v4] bus/fslmc: adding cpu support in stashing config
Stashing can also be configured by other drivers (for instance
event driver) passing cpu_id as an argument. This change
facilitates the same.
Signed-off-by: Nipun Gupta
---
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c| 14 ++
drivers/bus/fslmc/portal/dpaa2_hw_dpio.h| 4
drivers/bus/fslmc/rte_bus_fslmc_version.map | 2 ++
3 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index 730555f..63378f0 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -172,10 +172,9 @@
}
static int
-dpaa2_configure_stashing(struct dpaa2_dpio_dev *dpio_dev)
+dpaa2_configure_stashing(struct dpaa2_dpio_dev *dpio_dev, int cpu_id)
{
- int sdest;
- int cpu_id, ret;
+ int sdest, ret;
static int first_time;
/* find the SoC type for the first time */
@@ -194,7 +193,6 @@
}
/* Set the Stashing Destination */
- cpu_id = rte_lcore_id();
if (cpu_id < 0) {
cpu_id = rte_get_master_lcore();
if (cpu_id < 0) {
@@ -220,7 +218,7 @@
return 0;
}
-static inline struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(void)
+struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int cpu_id)
{
struct dpaa2_dpio_dev *dpio_dev = NULL;
int ret;
@@ -236,7 +234,7 @@ static inline struct dpaa2_dpio_dev
*dpaa2_get_qbman_swp(void)
PMD_DRV_LOG(DEBUG, "New Portal=0x%x (%d) affined thread - %lu",
dpio_dev, dpio_dev->index, syscall(SYS_gettid));
- ret = dpaa2_configure_stashing(dpio_dev);
+ ret = dpaa2_configure_stashing(dpio_dev, cpu_id);
if (ret)
PMD_DRV_LOG(ERR, "dpaa2_configure_stashing failed");
@@ -276,7 +274,7 @@ static inline struct dpaa2_dpio_dev
*dpaa2_get_qbman_swp(void)
}
/* Populate the dpaa2_io_portal structure */
- dpaa2_io_portal[lcore_id].dpio_dev = dpaa2_get_qbman_swp();
+ dpaa2_io_portal[lcore_id].dpio_dev = dpaa2_get_qbman_swp(lcore_id);
if (dpaa2_io_portal[lcore_id].dpio_dev) {
RTE_PER_LCORE(_dpaa2_io).dpio_dev
@@ -322,7 +320,7 @@ static inline struct dpaa2_dpio_dev
*dpaa2_get_qbman_swp(void)
}
/* Populate the dpaa2_io_portal structure */
- dpaa2_io_portal[lcore_id].sec_dpio_dev = dpaa2_get_qbman_swp();
+ dpaa2_io_portal[lcore_id].sec_dpio_dev = dpaa2_get_qbman_swp(lcore_id);
if (dpaa2_io_portal[lcore_id].sec_dpio_dev) {
RTE_PER_LCORE(_dpaa2_io).sec_dpio_dev
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
index f2e1168..4269800 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
@@ -53,6 +53,10 @@ struct dpaa2_io_portal_t {
#define DPAA2_PER_LCORE_SEC_DPIO RTE_PER_LCORE(_dpaa2_io).sec_dpio_dev
#define DPAA2_PER_LCORE_SEC_PORTAL DPAA2_PER_LCORE_SEC_DPIO->sw_portal
+extern struct dpaa2_io_portal_t dpaa2_io_portal[RTE_MAX_LCORE];
+
+struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int cpu_id);
+
/* Affine a DPIO portal to current processing thread */
int dpaa2_affine_qbman_swp(void);
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map
b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index cf7c0ee..4509051 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -53,6 +53,8 @@ DPDK_17.05 {
DPDK_17.08 {
global:
+ dpaa2_io_portal;
+ dpaa2_get_qbman_swp;
dpci_set_rx_queue;
dpcon_open;
dpcon_get_attributes;
--
1.9.1
[dpdk-dev] [PATCH 11/21 v4] event/dpaa2: add initialization of event device
Signed-off-by: Nipun Gupta
---
drivers/event/dpaa2/dpaa2_eventdev.c | 157 ++-
drivers/event/dpaa2/dpaa2_eventdev.h | 23 +
2 files changed, 176 insertions(+), 4 deletions(-)
diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c
b/drivers/event/dpaa2/dpaa2_eventdev.c
index 191901e..b8cc3f8 100644
--- a/drivers/event/dpaa2/dpaa2_eventdev.c
+++ b/drivers/event/dpaa2/dpaa2_eventdev.c
@@ -30,17 +30,168 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
#include
+#include
+#include
+#include
+#include
#include "dpaa2_eventdev.h"
+#include
+#include
+
+/* Clarifications
+ * Evendev = SoC Instance
+ * Eventport = DPIO Instance
+ * Eventqueue = DPCON Instance
+ * 1 Eventdev can have N Eventqueue
+ * Soft Event Flow is DPCI Instance
+ */
+
+static uint16_t
+dpaa2_eventdev_enqueue_burst(void *port, const struct rte_event ev[],
+uint16_t nb_events)
+{
+ RTE_SET_USED(port);
+ RTE_SET_USED(ev);
+ RTE_SET_USED(nb_events);
+
+ return 0;
+}
+
+static uint16_t
+dpaa2_eventdev_enqueue(void *port, const struct rte_event *ev)
+{
+ return dpaa2_eventdev_enqueue_burst(port, ev, 1);
+}
+
+static uint16_t
+dpaa2_eventdev_dequeue_burst(void *port, struct rte_event ev[],
+uint16_t nb_events, uint64_t timeout_ticks)
+{
+ RTE_SET_USED(port);
+ RTE_SET_USED(ev);
+ RTE_SET_USED(nb_events);
+ RTE_SET_USED(timeout_ticks);
+
+ return 0;
+}
+
+static uint16_t
+dpaa2_eventdev_dequeue(void *port, struct rte_event *ev,
+ uint64_t timeout_ticks)
+{
+ return dpaa2_eventdev_dequeue_burst(port, ev, 1, timeout_ticks);
+}
+
+static const struct rte_eventdev_ops dpaa2_eventdev_ops;
+
+static int
+dpaa2_eventdev_setup_dpci(struct dpaa2_dpci_dev *dpci_dev,
+ struct dpaa2_dpcon_dev *dpcon_dev)
+{
+ struct dpci_rx_queue_cfg rx_queue_cfg;
+ int ret, i;
+
+ /*Do settings to get the frame on a DPCON object*/
+ rx_queue_cfg.options = DPCI_QUEUE_OPT_DEST;
+ rx_queue_cfg.dest_cfg.dest_type = DPCI_DEST_DPCON;
+ rx_queue_cfg.dest_cfg.dest_id = dpcon_dev->dpcon_id;
+ rx_queue_cfg.dest_cfg.priority = DPAA2_EVENT_DEFAULT_DPCI_PRIO;
+
+ for (i = 0 ; i < DPAA2_EVENT_DPCI_MAX_QUEUES; i++) {
+ rx_queue_cfg.user_ctx = (uint64_t)(&dpci_dev->queue[i]);
+ ret = dpci_set_rx_queue(&dpci_dev->dpci,
+ CMD_PRI_LOW,
+ dpci_dev->token, i,
+ &rx_queue_cfg);
+ if (ret) {
+ PMD_DRV_LOG(ERR, PMD,
+ "set_rx_q failed with err code: %d", ret);
+ return ret;
+ }
+ }
+ return 0;
+}
static int
dpaa2_eventdev_create(const char *name)
{
- RTE_SET_USED(name);
+ struct rte_eventdev *eventdev;
+ struct dpaa2_eventdev *priv;
+ struct dpaa2_dpcon_dev *dpcon_dev = NULL;
+ struct dpaa2_dpci_dev *dpci_dev = NULL;
+ int ret;
+
+ eventdev = rte_event_pmd_vdev_init(name,
+ sizeof(struct dpaa2_eventdev),
+ rte_socket_id());
+ if (eventdev == NULL) {
+ PMD_DRV_ERR("Failed to create eventdev vdev %s", name);
+ goto fail;
+ }
+
+ eventdev->dev_ops = &dpaa2_eventdev_ops;
+ eventdev->schedule = NULL;
+ eventdev->enqueue = dpaa2_eventdev_enqueue;
+ eventdev->enqueue_burst = dpaa2_eventdev_enqueue_burst;
+ eventdev->dequeue = dpaa2_eventdev_dequeue;
+ eventdev->dequeue_burst = dpaa2_eventdev_dequeue_burst;
+
+ /* For secondary processes, the primary has done all the work */
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return 0;
+
+ priv = eventdev->data->dev_private;
+ priv->max_event_queues = 0;
+
+ do {
+ dpcon_dev = rte_dpaa2_alloc_dpcon_dev();
+ if (!dpcon_dev)
+ break;
+ priv->evq_info[priv->max_event_queues].dpcon = dpcon_dev;
+
+ dpci_dev = rte_dpaa2_alloc_dpci_dev();
+ if (!dpci_dev) {
+ rte_dpaa2_free_dpcon_dev(dpcon_dev);
+ break;
+ }
+ priv->evq_info[priv->max_event_queues].dpci = dpci_dev;
+
+ ret = dpaa2_eventdev_setup_dpci(dpci_dev, dpcon_dev);
+ if (ret) {
+ PMD_DRV_LOG(ERR, PMD,
+ "dpci setup failed wi
[dpdk-dev] [PATCH 09/21 v4] bus/fslmc: register dpci as dpaa2 device for bus scan
Registering dpci as dpaa2 type device handling initialization,
allocation and freeing of the device
Signed-off-by: Nipun Gupta
---
drivers/bus/fslmc/Makefile | 1 +
drivers/bus/fslmc/fslmc_vfio.h | 1 +
drivers/bus/fslmc/portal/dpaa2_hw_dpci.c | 179 +++
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 15 +++
4 files changed, 196 insertions(+)
create mode 100644 drivers/bus/fslmc/portal/dpaa2_hw_dpci.c
diff --git a/drivers/bus/fslmc/Makefile b/drivers/bus/fslmc/Makefile
index 4884d87..a156847 100644
--- a/drivers/bus/fslmc/Makefile
+++ b/drivers/bus/fslmc/Makefile
@@ -72,6 +72,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += \
SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += portal/dpaa2_hw_dpio.c
SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += portal/dpaa2_hw_dpbp.c
+SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += portal/dpaa2_hw_dpci.c
SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += fslmc_vfio.c
SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += fslmc_bus.c
diff --git a/drivers/bus/fslmc/fslmc_vfio.h b/drivers/bus/fslmc/fslmc_vfio.h
index eddce31..7c725f4 100644
--- a/drivers/bus/fslmc/fslmc_vfio.h
+++ b/drivers/bus/fslmc/fslmc_vfio.h
@@ -42,6 +42,7 @@
#define DPAA2_MC_DPCON_DEVID 5
#define DPAA2_MC_DPIO_DEVID9
#define DPAA2_MC_DPBP_DEVID10
+#define DPAA2_MC_DPCI_DEVID11
#define VFIO_MAX_GRP 1
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c
b/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c
new file mode 100644
index 000..d222f26
--- /dev/null
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c
@@ -0,0 +1,179 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright 2017 NXP.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Freescale Semiconductor, Inc nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include "portal/dpaa2_hw_pvt.h"
+#include "portal/dpaa2_hw_dpio.h"
+
+TAILQ_HEAD(dpci_dev_list, dpaa2_dpci_dev);
+static struct dpci_dev_list dpci_dev_list
+ = TAILQ_HEAD_INITIALIZER(dpci_dev_list); /*!< DPCI device list */
+
+static int
+rte_dpaa2_create_dpci_device(struct fslmc_vfio_device *vdev __rte_unused,
+struct vfio_device_info *obj_info __rte_unused,
+ int dpci_id)
+{
+ struct dpaa2_dpci_dev *dpci_node;
+ struct dpci_attr attr;
+ struct dpci_rx_queue_cfg rx_queue_cfg;
+ struct dpci_rx_queue_attr rx_attr;
+ int ret, i;
+
+ /* Allocate DPAA2 dpci handle */
+ dpci_node = rte_malloc(NULL, sizeof(struct dpaa2_dpci_dev), 0);
+ if (!dpci_node) {
+ PMD_INIT_LOG(ERR, "Memory allocation failed for DPCI Device");
+ return -1;
+ }
+
+ /* Open the dpci object */
+ dpci_node->dpci.regs = rte_mcp_ptr_list[MC_PORTAL_INDEX];
+ ret = dpci_open(&dpci_node->dpci,
+ CMD_PRI_LOW, dpci_id, &dpci_node->token);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "Resource alloc failure with err code: %d",
+ret);
+ rte_free(dpci_node);
+ return -1;
+ }
+
+ /* Get the device attributes */
+ ret = dpci_get_attributes(&dpci_node->dpci,
+ CMD_PRI_LOW, dpci_node->token, &attr);
+ if (ret != 0) {
+ PMD_INIT_LOG(ERR, "Reading device failed with err code: %d"
[dpdk-dev] [PATCH 12/21 v4] bus/fslmc: add support for static dequeue from portal
Signed-off-by: Nipun Gupta
---
drivers/bus/fslmc/mc/dpio.c | 44 +
drivers/bus/fslmc/mc/fsl_dpio.h | 30
drivers/bus/fslmc/portal/dpaa2_hw_dpio.h| 1 +
drivers/bus/fslmc/rte_bus_fslmc_version.map | 2 ++
4 files changed, 77 insertions(+)
diff --git a/drivers/bus/fslmc/mc/dpio.c b/drivers/bus/fslmc/mc/dpio.c
index d84232a..3553952 100644
--- a/drivers/bus/fslmc/mc/dpio.c
+++ b/drivers/bus/fslmc/mc/dpio.c
@@ -257,6 +257,50 @@ int dpio_get_stashing_destination(struct fsl_mc_io *mc_io,
return 0;
}
+int dpio_add_static_dequeue_channel(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ int dpcon_id,
+ uint8_t *channel_index)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPIO_CMDID_ADD_STATIC_DEQUEUE_CHANNEL,
+ cmd_flags,
+ token);
+ DPIO_CMD_ADD_STATIC_DEQUEUE_CHANNEL(cmd, dpcon_id);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ DPIO_RSP_ADD_STATIC_DEQUEUE_CHANNEL(cmd, *channel_index);
+
+ return 0;
+}
+
+int dpio_remove_static_dequeue_channel(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ int dpcon_id)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(
+ DPIO_CMDID_REMOVE_STATIC_DEQUEUE_CHANNEL,
+ cmd_flags,
+ token);
+ DPIO_CMD_REMOVE_STATIC_DEQUEUE_CHANNEL(cmd, dpcon_id);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
int dpio_get_api_version(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t *major_ver,
diff --git a/drivers/bus/fslmc/mc/fsl_dpio.h b/drivers/bus/fslmc/mc/fsl_dpio.h
index 6d86f07..39b572d 100644
--- a/drivers/bus/fslmc/mc/fsl_dpio.h
+++ b/drivers/bus/fslmc/mc/fsl_dpio.h
@@ -230,6 +230,36 @@ int dpio_get_stashing_destination(struct fsl_mc_io *mc_io,
uint8_t *sdest);
/**
+ * dpio_add_static_dequeue_channel() - Add a static dequeue channel.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPIO object
+ * @dpcon_id: DPCON object ID
+ * @channel_index: Returned channel index to be used in qbman API
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpio_add_static_dequeue_channel(struct fsl_mc_io *mc_io,
+ uint32_tcmd_flags,
+ uint16_ttoken,
+ int dpcon_id,
+ uint8_t *channel_index);
+
+/**
+ * dpio_remove_static_dequeue_channel() - Remove a static dequeue channel.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPIO object
+ * @dpcon_id: DPCON object ID
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpio_remove_static_dequeue_channel(struct fsl_mc_io*mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ int dpcon_id);
+
+/**
* struct dpio_attr - Structure representing DPIO attributes
* @id: DPIO object ID
* @qbman_portal_ce_offset: offset of the software portal cache-enabled area
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
index 4269800..77efe37 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
@@ -42,6 +42,7 @@ struct dpaa2_io_portal_t {
struct dpaa2_dpio_dev *sec_dpio_dev;
uint64_t net_tid;
uint64_t sec_tid;
+ void *eventdev;
};
/*! Global per thread DPIO portal */
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map
b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index 4509051..c879e2f 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -58,6 +58,8 @@ DPDK_17.08 {
dpci_set_rx_queue;
dpcon_open;
dpcon_get_attributes;
+ dpio_add_static_dequeue_channel;
+ dpio_remove_static_dequeue_channel;
mc_get_soc_version;
mc_get_version;
[dpdk-dev] [PATCH 13/21 v4] event/dpaa2: add configuration functions
This patch adds all the configuration API's for DPAA2 eventdev
including device config, start, stop & port and queue
related API's
Signed-off-by: Nipun Gupta
---
drivers/event/dpaa2/dpaa2_eventdev.c | 283 ++-
drivers/event/dpaa2/dpaa2_eventdev.h | 22 +++
2 files changed, 304 insertions(+), 1 deletion(-)
diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c
b/drivers/event/dpaa2/dpaa2_eventdev.c
index b8cc3f8..c00db7a 100644
--- a/drivers/event/dpaa2/dpaa2_eventdev.c
+++ b/drivers/event/dpaa2/dpaa2_eventdev.c
@@ -106,7 +106,288 @@
return dpaa2_eventdev_dequeue_burst(port, ev, 1, timeout_ticks);
}
-static const struct rte_eventdev_ops dpaa2_eventdev_ops;
+static void
+dpaa2_eventdev_info_get(struct rte_eventdev *dev,
+ struct rte_event_dev_info *dev_info)
+{
+ struct dpaa2_eventdev *priv = dev->data->dev_private;
+
+ PMD_DRV_FUNC_TRACE();
+
+ RTE_SET_USED(dev);
+
+ memset(dev_info, 0, sizeof(struct rte_event_dev_info));
+ dev_info->min_dequeue_timeout_ns =
+ DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
+ dev_info->max_dequeue_timeout_ns =
+ DPAA2_EVENT_MAX_DEQUEUE_TIMEOUT;
+ dev_info->dequeue_timeout_ns =
+ DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
+ dev_info->max_event_queues = priv->max_event_queues;
+ dev_info->max_event_queue_flows =
+ DPAA2_EVENT_MAX_QUEUE_FLOWS;
+ dev_info->max_event_queue_priority_levels =
+ DPAA2_EVENT_MAX_QUEUE_PRIORITY_LEVELS;
+ dev_info->max_event_priority_levels =
+ DPAA2_EVENT_MAX_EVENT_PRIORITY_LEVELS;
+ dev_info->max_event_ports = RTE_MAX_LCORE;
+ dev_info->max_event_port_dequeue_depth =
+ DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
+ dev_info->max_event_port_enqueue_depth =
+ DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
+ dev_info->max_num_events = DPAA2_EVENT_MAX_NUM_EVENTS;
+ dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED;
+}
+
+static int
+dpaa2_eventdev_configure(const struct rte_eventdev *dev)
+{
+ struct dpaa2_eventdev *priv = dev->data->dev_private;
+ struct rte_event_dev_config *conf = &dev->data->dev_conf;
+
+ PMD_DRV_FUNC_TRACE();
+
+ priv->dequeue_timeout_ns = conf->dequeue_timeout_ns;
+ priv->nb_event_queues = conf->nb_event_queues;
+ priv->nb_event_ports = conf->nb_event_ports;
+ priv->nb_event_queue_flows = conf->nb_event_queue_flows;
+ priv->nb_event_port_dequeue_depth = conf->nb_event_port_dequeue_depth;
+ priv->nb_event_port_enqueue_depth = conf->nb_event_port_enqueue_depth;
+ priv->event_dev_cfg = conf->event_dev_cfg;
+
+ PMD_DRV_LOG(DEBUG, "Configured eventdev devid=%d", dev->data->dev_id);
+ return 0;
+}
+
+static int
+dpaa2_eventdev_start(struct rte_eventdev *dev)
+{
+ PMD_DRV_FUNC_TRACE();
+
+ RTE_SET_USED(dev);
+
+ return 0;
+}
+
+static void
+dpaa2_eventdev_stop(struct rte_eventdev *dev)
+{
+ PMD_DRV_FUNC_TRACE();
+
+ RTE_SET_USED(dev);
+}
+
+static int
+dpaa2_eventdev_close(struct rte_eventdev *dev)
+{
+ PMD_DRV_FUNC_TRACE();
+
+ RTE_SET_USED(dev);
+
+ return 0;
+}
+
+static void
+dpaa2_eventdev_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
+ struct rte_event_queue_conf *queue_conf)
+{
+ PMD_DRV_FUNC_TRACE();
+
+ RTE_SET_USED(dev);
+ RTE_SET_USED(queue_id);
+ RTE_SET_USED(queue_conf);
+
+ queue_conf->nb_atomic_flows = DPAA2_EVENT_QUEUE_ATOMIC_FLOWS;
+ queue_conf->event_queue_cfg = RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY |
+ RTE_EVENT_QUEUE_CFG_PARALLEL_ONLY;
+ queue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
+}
+
+static void
+dpaa2_eventdev_queue_release(struct rte_eventdev *dev, uint8_t queue_id)
+{
+ PMD_DRV_FUNC_TRACE();
+
+ RTE_SET_USED(dev);
+ RTE_SET_USED(queue_id);
+}
+
+static int
+dpaa2_eventdev_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
+ const struct rte_event_queue_conf *queue_conf)
+{
+ struct dpaa2_eventdev *priv = dev->data->dev_private;
+ struct evq_info_t *evq_info =
+ &priv->evq_info[queue_id];
+
+ PMD_DRV_FUNC_TRACE();
+
+ evq_info->event_queue_cfg = queue_conf->event_queue_cfg;
+
+ return 0;
+}
+
+static void
+dpaa2_eventdev_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
+struct rte_event_port_conf *port_conf)
+{
+ PMD_DRV_FUNC_TRACE();
+
+ RTE_SET_USED(dev);
+ RTE_SET_USED(port_id);
+ RTE_SET_USED(port_conf);
+
+ port_conf->new_event_threshold =
+ DPAA2_EVENT_MAX_NUM_EVENTS;
+ port_conf->dequeue_depth =
+ DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
+ port_conf->enqueue_depth =
+ DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
+}
+
+static void
+dpaa2_
[dpdk-dev] [PATCH 14/21 v4] bus/fslmc: support enqueue with multiple enqueue descriptors
This patch adds the QBMAN API which support multiple enqueue
descriptors.
Signed-off-by: Nipun Gupta
---
drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 14 +
drivers/bus/fslmc/qbman/qbman_portal.c | 70 ++
drivers/bus/fslmc/rte_bus_fslmc_version.map| 1 +
3 files changed, 85 insertions(+)
diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
index 7731772..39407c8 100644
--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
@@ -883,6 +883,20 @@ void qbman_eq_desc_set_dca(struct qbman_eq_desc *d, int
enable,
*/
int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
const struct qbman_fd *fd);
+/**
+ * qbman_swp_enqueue_multiple_eqdesc() - Enqueue multiple frames with separte
+ * enqueue descriptors.
+ * @s: the software portal used for enqueue.
+ * @d: the enqueue descriptors
+ * @fd: the frame descriptor to be enqueued.
+ * @num_frames: the number of the frames to be enqueued.
+ *
+ * Return the number of enqueued frames, -EBUSY if the EQCR is not ready.
+ */
+int qbman_swp_enqueue_multiple_eqdesc(struct qbman_swp *s,
+ const struct qbman_eq_desc *d,
+ const struct qbman_fd *fd,
+ int num_frames);
/* TODO:
* qbman_swp_enqueue_thresh() - Set threshold for EQRI interrupt.
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c
b/drivers/bus/fslmc/qbman/qbman_portal.c
index be4e2e5..137b55d 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -574,6 +574,76 @@ int qbman_swp_enqueue(struct qbman_swp *s, const struct
qbman_eq_desc *d,
return qbman_swp_enqueue_ring_mode(s, d, fd);
}
+int qbman_swp_enqueue_multiple_eqdesc(struct qbman_swp *s,
+ const struct qbman_eq_desc *d,
+ const struct qbman_fd *fd,
+ int num_frames)
+{
+ uint32_t *p;
+ const uint32_t *cl = qb_cl(d);
+ uint32_t eqcr_ci, eqcr_pi;
+ uint8_t diff;
+ int i, num_enqueued = 0;
+ uint64_t addr_cena;
+
+ if (!s->eqcr.available) {
+ eqcr_ci = s->eqcr.ci;
+ s->eqcr.ci = qbman_cena_read_reg(&s->sys,
+ QBMAN_CENA_SWP_EQCR_CI) & 0xF;
+ diff = qm_cyc_diff(QBMAN_EQCR_SIZE,
+ eqcr_ci, s->eqcr.ci);
+ s->eqcr.available += diff;
+ if (!diff)
+ return 0;
+ }
+
+ eqcr_pi = s->eqcr.pi;
+ num_enqueued = (s->eqcr.available < num_frames) ?
+ s->eqcr.available : num_frames;
+ s->eqcr.available -= num_enqueued;
+ /* Fill in the EQCR ring */
+ for (i = 0; i < num_enqueued; i++) {
+ p = qbman_cena_write_start_wo_shadow(&s->sys,
+ QBMAN_CENA_SWP_EQCR(eqcr_pi & 7));
+ memcpy(&p[1], &cl[1], 28);
+ memcpy(&p[8], &fd[i], sizeof(*fd));
+ eqcr_pi++;
+ eqcr_pi &= 0xF;
+ /*Pointing to the next enqueue descriptor*/
+ cl += (sizeof(struct qbman_eq_desc) / sizeof(uint32_t));
+ }
+
+ lwsync();
+
+ /* Set the verb byte, have to substitute in the valid-bit */
+ eqcr_pi = s->eqcr.pi;
+ cl = qb_cl(d);
+ for (i = 0; i < num_enqueued; i++) {
+ p = qbman_cena_write_start_wo_shadow(&s->sys,
+ QBMAN_CENA_SWP_EQCR(eqcr_pi & 7));
+ p[0] = cl[0] | s->eqcr.pi_vb;
+ eqcr_pi++;
+ eqcr_pi &= 0xF;
+ if (!(eqcr_pi & 7))
+ s->eqcr.pi_vb ^= QB_VALID_BIT;
+ /*Pointing to the next enqueue descriptor*/
+ cl += (sizeof(struct qbman_eq_desc) / sizeof(uint32_t));
+ }
+
+ /* Flush all the cacheline without load/store in between */
+ eqcr_pi = s->eqcr.pi;
+ addr_cena = (uint64_t)s->sys.addr_cena;
+ for (i = 0; i < num_enqueued; i++) {
+ dcbf((uint64_t *)(addr_cena +
+ QBMAN_CENA_SWP_EQCR(eqcr_pi & 7)));
+ eqcr_pi++;
+ eqcr_pi &= 0xF;
+ }
+ s->eqcr.pi = eqcr_pi;
+
+ return num_enqueued;
+}
+
/*/
/* Static (push) dequeue */
/*/
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map
b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index c879e2f..9950557 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -69,6 +69,7 @@ DPDK_17.08 {
qbman_result_SCN_state_in_mem;
qbman_swp_dqrr_consume;
qbman_swp_dqrr_next;
+ qbman_swp_enqueue_mu
[dpdk-dev] [PATCH 16/21 v4] bus/fslmc: change func argument to const to avoid warning
qbman_get_dqrr_idx() API is required with constant dqrr entry
in the eventdev driver. Also, this routine is not updating the
dqrr. So, this patch updates its input argument to a const type.
Signed-off-by: Nipun Gupta
---
drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 2 +-
drivers/bus/fslmc/qbman/qbman_portal.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
index 39407c8..06bd063 100644
--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
@@ -349,7 +349,7 @@ void qbman_pull_desc_set_channel(struct qbman_pull_desc *d,
uint32_t chid,
*
* Return dqrr index.
*/
-uint8_t qbman_get_dqrr_idx(struct qbman_result *dqrr);
+uint8_t qbman_get_dqrr_idx(const struct qbman_result *dqrr);
/**
* qbman_get_dqrr_from_idx() - Use index to get the dqrr entry from the
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c
b/drivers/bus/fslmc/qbman/qbman_portal.c
index 137b55d..8002690 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -1463,7 +1463,7 @@ int qbman_swp_CDAN_set_context_enable(struct qbman_swp
*s, uint16_t channelid,
1, ctx);
}
-uint8_t qbman_get_dqrr_idx(struct qbman_result *dqrr)
+uint8_t qbman_get_dqrr_idx(const struct qbman_result *dqrr)
{
return QBMAN_IDX_FROM_DQRR(dqrr);
}
--
1.9.1
[dpdk-dev] [PATCH 17/21 v4] event/dpaa2: add enqueue and dequeue functionality
Signed-off-by: Nipun Gupta
---
drivers/event/dpaa2/dpaa2_eventdev.c | 170 +--
1 file changed, 163 insertions(+), 7 deletions(-)
diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c
b/drivers/event/dpaa2/dpaa2_eventdev.c
index c00db7a..a7f8516 100644
--- a/drivers/event/dpaa2/dpaa2_eventdev.c
+++ b/drivers/event/dpaa2/dpaa2_eventdev.c
@@ -49,6 +49,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -74,11 +75,85 @@
dpaa2_eventdev_enqueue_burst(void *port, const struct rte_event ev[],
uint16_t nb_events)
{
+ struct rte_eventdev *ev_dev =
+ ((struct dpaa2_io_portal_t *)port)->eventdev;
+ struct dpaa2_eventdev *priv = ev_dev->data->dev_private;
+ uint32_t queue_id = ev[0].queue_id;
+ struct evq_info_t *evq_info = &priv->evq_info[queue_id];
+ uint32_t fqid;
+ struct qbman_swp *swp;
+ struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
+ uint32_t loop, frames_to_send;
+ struct qbman_eq_desc eqdesc[MAX_TX_RING_SLOTS];
+ uint16_t num_tx = 0;
+ int ret;
+
RTE_SET_USED(port);
- RTE_SET_USED(ev);
- RTE_SET_USED(nb_events);
- return 0;
+ if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
+ ret = dpaa2_affine_qbman_swp();
+ if (ret) {
+ PMD_DRV_LOG(ERR, PMD, "Failure in affining portal\n");
+ return 0;
+ }
+ }
+
+ swp = DPAA2_PER_LCORE_PORTAL;
+
+ while (nb_events) {
+ frames_to_send = (nb_events >> 3) ?
+ MAX_TX_RING_SLOTS : nb_events;
+
+ for (loop = 0; loop < frames_to_send; loop++) {
+ const struct rte_event *event = &ev[num_tx + loop];
+
+ if (event->sched_type != RTE_SCHED_TYPE_ATOMIC)
+ fqid = evq_info->dpci->queue[
+ DPAA2_EVENT_DPCI_PARALLEL_QUEUE].fqid;
+ else
+ fqid = evq_info->dpci->queue[
+ DPAA2_EVENT_DPCI_ATOMIC_QUEUE].fqid;
+
+ /* Prepare enqueue descriptor */
+ qbman_eq_desc_clear(&eqdesc[loop]);
+ qbman_eq_desc_set_fq(&eqdesc[loop], fqid);
+ qbman_eq_desc_set_no_orp(&eqdesc[loop], 0);
+ qbman_eq_desc_set_response(&eqdesc[loop], 0, 0);
+
+ if (event->impl_opaque) {
+ uint8_t dqrr_index = event->impl_opaque - 1;
+
+ qbman_eq_desc_set_dca(&eqdesc[loop], 1,
+ dqrr_index, 0);
+ DPAA2_PER_LCORE_DPIO->dqrr_size--;
+ DPAA2_PER_LCORE_DPIO->dqrr_held &=
+ ~(1 << dqrr_index);
+ }
+
+ memset(&fd_arr[loop], 0, sizeof(struct qbman_fd));
+
+ /*
+* todo - need to align with hw context data
+* to avoid copy
+*/
+ struct rte_event *ev_temp = rte_malloc(NULL,
+ sizeof(struct rte_event), 0);
+ rte_memcpy(ev_temp, event, sizeof(struct rte_event));
+ DPAA2_SET_FD_ADDR((&fd_arr[loop]), ev_temp);
+ DPAA2_SET_FD_LEN((&fd_arr[loop]),
+sizeof(struct rte_event));
+ }
+ loop = 0;
+ while (loop < frames_to_send) {
+ loop += qbman_swp_enqueue_multiple_eqdesc(swp,
+ &eqdesc[loop], &fd_arr[loop],
+ frames_to_send - loop);
+ }
+ num_tx += frames_to_send;
+ nb_events -= frames_to_send;
+ }
+
+ return num_tx;
}
static uint16_t
@@ -87,16 +162,91 @@
return dpaa2_eventdev_enqueue_burst(port, ev, 1);
}
+static void dpaa2_eventdev_process_parallel(struct qbman_swp *swp,
+ const struct qbman_fd *fd,
+ const struct qbman_result *dq,
+ struct rte_event *ev)
+{
+ struct rte_event *ev_temp =
+ (struct rte_event *)DPAA2_GET_FD_ADDR(fd);
+ rte_memcpy(ev, ev_temp, sizeof(struct rte_event));
+ rte_free(ev_temp);
+
+ qbman_swp_dqrr_consume(swp, dq);
+}
+
+static void dpaa2_eventdev_process_atomic(struct qbman_swp *swp,
+ const struct qbman_fd *fd,
+ const struct qbman_result *dq,
+ struct rte_event
[dpdk-dev] [PATCH 15/21 v4] bus/fslmc: add callback per queue to enable
Dequeue from event device needs to process the event on
the basis of the hardware queue from which it is dequeued.
A callback is added into dpaa2_queue structure, to enable
event dequeue functionality to call that processing routine.
Signed-off-by: Nipun Gupta
---
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 0026ba9..975e431 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -34,6 +34,8 @@
#ifndef _DPAA2_HW_PVT_H_
#define _DPAA2_HW_PVT_H_
+#include
+
#include
#include
@@ -101,6 +103,8 @@ struct dpaa2_dpio_dev {
uintptr_t ci_size; /**< Size of the CI region */
int32_t vfio_fd; /**< File descriptor received via VFIO */
int32_t hw_id; /**< An unique ID of this DPIO device instance */
+ uint64_t dqrr_held;
+ uint8_t dqrr_size;
};
struct dpaa2_dpbp_dev {
@@ -119,6 +123,11 @@ struct queue_storage_info_t {
int toggle;
};
+typedef void (dpaa2_queue_cb_dqrr_t)(struct qbman_swp *swp,
+ const struct qbman_fd *fd,
+ const struct qbman_result *dq,
+ struct rte_event *ev);
+
struct dpaa2_queue {
struct rte_mempool *mb_pool; /**< mbuf pool to populate RX ring. */
void *dev;
@@ -133,6 +142,7 @@ struct dpaa2_queue {
struct queue_storage_info_t *q_storage;
struct qbman_result *cscn;
};
+ dpaa2_queue_cb_dqrr_t *cb;
};
struct swp_active_dqs {
--
1.9.1
[dpdk-dev] [PATCH 18/21 v4] fslmc/bus: add interrupt enabling routine
Signed-off-by: Nipun Gupta
---
drivers/bus/fslmc/fslmc_vfio.c | 34 ++
drivers/bus/fslmc/fslmc_vfio.h | 3 +++
2 files changed, 37 insertions(+)
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index 6ebf779..d8e3add 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -359,6 +359,40 @@ static int64_t vfio_map_mcp_obj(struct fslmc_vfio_group
*group, char *mcp_obj)
}
}
+#define IRQ_SET_BUF_LEN (sizeof(struct vfio_irq_set) + sizeof(int))
+
+int rte_dpaa2_intr_enable(struct rte_intr_handle *intr_handle,
+ uint32_t index)
+{
+ struct vfio_irq_set *irq_set;
+ char irq_set_buf[IRQ_SET_BUF_LEN];
+ int *fd_ptr, fd, ret;
+
+ /* Prepare vfio_irq_set structure and SET the IRQ in VFIO */
+ /* Give the eventfd to VFIO */
+ fd = eventfd(0, 0);
+ irq_set = (struct vfio_irq_set *)irq_set_buf;
+ irq_set->argsz = sizeof(irq_set_buf);
+ irq_set->count = 1;
+ irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
+VFIO_IRQ_SET_ACTION_TRIGGER;
+ irq_set->index = index;
+ irq_set->start = 0;
+ fd_ptr = (int *)&irq_set->data;
+ *fd_ptr = fd;
+
+ ret = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
+ if (ret < 0) {
+ FSLMC_VFIO_LOG(ERR, "Unable to set IRQ in VFIO, ret: %d\n",
+ ret);
+ return -1;
+ }
+
+ /* Set the FD and update the flags */
+ intr_handle->fd = fd;
+ return 0;
+}
+
/* Following function shall fetch total available list of MC devices
* from VFIO container & populate private list of devices and other
* data structures
diff --git a/drivers/bus/fslmc/fslmc_vfio.h b/drivers/bus/fslmc/fslmc_vfio.h
index 7c725f4..ebca2b0 100644
--- a/drivers/bus/fslmc/fslmc_vfio.h
+++ b/drivers/bus/fslmc/fslmc_vfio.h
@@ -90,6 +90,9 @@ int vfio_dmamap_mem_region(
uint64_t iova,
uint64_t size);
+int rte_dpaa2_intr_enable(struct rte_intr_handle *intr_handle,
+ uint32_t index);
+
int fslmc_vfio_setup_group(void);
int fslmc_vfio_process_group(void);
int rte_fslmc_vfio_dmamap(void);
--
1.9.1
[dpdk-dev] [PATCH 19/21 v4] bus/fslmc: enable portal interrupt handling
Eventdev requires portal interrupts to handle timeout in the
event dequeue. This patch provides mechanism to enable the
portal interrupts.
Signed-off-by: Nipun Gupta
---
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 108 -
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h| 3 +-
drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 30 ++
drivers/bus/fslmc/qbman/qbman_portal.c | 22 +
drivers/bus/fslmc/rte_bus_fslmc_version.map| 1 +
5 files changed, 158 insertions(+), 6 deletions(-)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index 63378f0..5d53342 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -46,6 +46,8 @@
#include
#include
#include
+#include
+#include
#include
#include
@@ -106,6 +108,95 @@
return dpaa2_core_cluster_base + x;
}
+static void dpaa2_affine_dpio_intr_to_respective_core(int32_t dpio_id)
+{
+#define STRING_LEN 28
+#define COMMAND_LEN50
+ uint32_t cpu_mask = 1;
+ int ret;
+ size_t len = 0;
+ char *temp = NULL, *token = NULL;
+ char string[STRING_LEN], command[COMMAND_LEN];
+ FILE *file;
+
+ snprintf(string, STRING_LEN, "dpio.%d", dpio_id);
+ file = fopen("/proc/interrupts", "r");
+ if (!file) {
+ PMD_DRV_LOG(WARN, "Failed to open /proc/interrupts file\n");
+ return;
+ }
+ while (getline(&temp, &len, file) != -1) {
+ if ((strstr(temp, string)) != NULL) {
+ token = strtok(temp, ":");
+ break;
+ }
+ }
+
+ if (!token) {
+ PMD_DRV_LOG(WARN, "Failed to get interrupt id for dpio.%d\n",
+ dpio_id);
+ if (temp)
+ free(temp);
+ fclose(file);
+ return;
+ }
+
+ cpu_mask = cpu_mask << rte_lcore_id();
+ snprintf(command, COMMAND_LEN, "echo %X > /proc/irq/%s/smp_affinity",
+cpu_mask, token);
+ ret = system(command);
+ if (ret < 0)
+ PMD_DRV_LOG(WARN,
+ "Failed to affine interrupts on respective core\n");
+ else
+ PMD_DRV_LOG(WARN, " %s command is executed\n", command);
+
+ free(temp);
+ fclose(file);
+}
+
+static int dpaa2_dpio_intr_init(struct dpaa2_dpio_dev *dpio_dev)
+{
+ struct epoll_event epoll_ev;
+ int eventfd, dpio_epoll_fd, ret;
+ int threshold = 0x3, timeout = 0xFF;
+
+ dpio_epoll_fd = epoll_create(1);
+ ret = rte_dpaa2_intr_enable(&dpio_dev->intr_handle, 0);
+ if (ret) {
+ PMD_DRV_LOG(ERR, "Interrupt registeration failed\n");
+ return -1;
+ }
+
+ if (getenv("DPAA2_PORTAL_INTR_THRESHOLD"))
+ threshold = atoi(getenv("DPAA2_PORTAL_INTR_THRESHOLD"));
+
+ if (getenv("DPAA2_PORTAL_INTR_TIMEOUT"))
+ sscanf(getenv("DPAA2_PORTAL_INTR_TIMEOUT"), "%x", &timeout);
+
+ qbman_swp_interrupt_set_trigger(dpio_dev->sw_portal,
+ QBMAN_SWP_INTERRUPT_DQRI);
+ qbman_swp_interrupt_clear_status(dpio_dev->sw_portal, 0x);
+ qbman_swp_interrupt_set_inhibit(dpio_dev->sw_portal, 0);
+ qbman_swp_dqrr_thrshld_write(dpio_dev->sw_portal, threshold);
+ qbman_swp_intr_timeout_write(dpio_dev->sw_portal, timeout);
+
+ eventfd = dpio_dev->intr_handle.fd;
+ epoll_ev.events = EPOLLIN | EPOLLPRI | EPOLLET;
+ epoll_ev.data.fd = eventfd;
+
+ ret = epoll_ctl(dpio_epoll_fd, EPOLL_CTL_ADD, eventfd, &epoll_ev);
+ if (ret < 0) {
+ PMD_DRV_LOG(ERR, "epoll_ctl failed\n");
+ return -1;
+ }
+ dpio_dev->epoll_fd = dpio_epoll_fd;
+
+ dpaa2_affine_dpio_intr_to_respective_core(dpio_dev->hw_id);
+
+ return 0;
+}
+
static int
configure_dpio_qbman_swp(struct dpaa2_dpio_dev *dpio_dev)
{
@@ -215,6 +306,11 @@
return -1;
}
+ if (dpaa2_dpio_intr_init(dpio_dev)) {
+ PMD_DRV_LOG(ERR, "Interrupt registration failed for dpio\n");
+ return -1;
+ }
+
return 0;
}
@@ -339,6 +435,7 @@ struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int cpu_id)
{
struct dpaa2_dpio_dev *dpio_dev;
struct vfio_region_info reg_info = { .argsz = sizeof(reg_info)};
+ int vfio_dev_fd;
if (obj_info->num_regions < NUM_DPIO_REGIONS) {
PMD_INIT_LOG(ERR, "ERROR, Not sufficient number "
@@ -355,13 +452,14 @@ struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int cpu_id)
dpio_dev->dpio = NULL;
dpio_dev->hw_id = object_id;
- dpio_dev->vfio_fd = vdev->fd;
+ dpio_dev->intr_handle.vfio_dev_fd = vdev->fd;
rte_atomic16_init(&dpio_dev->ref_count);
/* Using single portal for all devices */
