[clang] [mlir] [llvm] [AArch64] Replace LLVM IR function attributes for PSTATE.ZA. (PR #79166)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 5daf674feba0f57b083113ad7ed486cad433a916
04c7b856bac07476a3410f1334e703054bd3859d -- clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/CodeGen/CGCall.cpp clang/lib/CodeGen/CodeGenModule.cpp
clang/test/CodeGen/aarch64-sme-intrinsics/aarch64-sme-attrs.cpp
clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c
clang/test/Modules/aarch64-sme-keywords.cppm llvm/lib/IR/Verifier.cpp
llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
llvm/lib/Target/AArch64/SMEABIPass.cpp
llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.h
llvm/unittests/Target/AArch64/SMEAttributesTest.cpp
mlir/lib/Target/LLVMIR/ModuleImport.cpp
mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
``
View the diff from clang-format here.
``diff
diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp
index 53d923ced8..b04d39c700 100644
--- a/llvm/lib/IR/Verifier.cpp
+++ b/llvm/lib/IR/Verifier.cpp
@@ -2155,14 +2155,13 @@ void Verifier::verifyFunctionAttrs(FunctionType *FT,
AttributeList Attrs,
V);
}
- Check(
- (Attrs.hasFnAttr("aarch64_new_za") + Attrs.hasFnAttr("aarch64_in_za") +
- Attrs.hasFnAttr("aarch64_inout_za") +
- Attrs.hasFnAttr("aarch64_out_za") +
- Attrs.hasFnAttr("aarch64_preserves_za")) <= 1,
- "Attributes 'aarch64_new_za', 'aarch64_in_za', 'aarch64_out_za', "
- "'aarch64_inout_za' and 'aarch64_preserves_za' are mutually exclusive",
- V);
+ Check((Attrs.hasFnAttr("aarch64_new_za") + Attrs.hasFnAttr("aarch64_in_za") +
+ Attrs.hasFnAttr("aarch64_inout_za") +
+ Attrs.hasFnAttr("aarch64_out_za") +
+ Attrs.hasFnAttr("aarch64_preserves_za")) <= 1,
+"Attributes 'aarch64_new_za', 'aarch64_in_za', 'aarch64_out_za', "
+"'aarch64_inout_za' and 'aarch64_preserves_za' are mutually exclusive",
+V);
Check(
(Attrs.hasFnAttr("aarch64_new_zt0") + Attrs.hasFnAttr("aarch64_in_zt0") +
diff --git a/llvm/lib/Target/AArch64/SMEABIPass.cpp
b/llvm/lib/Target/AArch64/SMEABIPass.cpp
index bee5d63c5a..23b3cc9ec6 100644
--- a/llvm/lib/Target/AArch64/SMEABIPass.cpp
+++ b/llvm/lib/Target/AArch64/SMEABIPass.cpp
@@ -60,9 +60,8 @@ FunctionPass *llvm::createSMEABIPass() { return new SMEABI();
}
void emitTPIDR2Save(Module *M, IRBuilder<> &Builder) {
auto *TPIDR2SaveTy =
FunctionType::get(Builder.getVoidTy(), {}, /*IsVarArgs=*/false);
- auto Attrs =
- AttributeList()
- .addFnAttribute(M->getContext(), "aarch64_pstate_sm_compatible");
+ auto Attrs = AttributeList().addFnAttribute(M->getContext(),
+ "aarch64_pstate_sm_compatible");
FunctionCallee Callee =
M->getOrInsertFunction("__arm_tpidr2_save", TPIDR2SaveTy, Attrs);
CallInst *Call = Builder.CreateCall(Callee);
diff --git a/llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
b/llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
index ac07274a36..d399e0ac07 100644
--- a/llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
+++ b/llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
@@ -52,7 +52,7 @@ SMEAttrs::SMEAttrs(StringRef FuncName) : Bitmask(0) {
Bitmask |= (SMEAttrs::SM_Compatible | SMEAttrs::SME_ABI_Routine);
if (FuncName == "__arm_tpidr2_restore")
Bitmask |= SMEAttrs::SM_Compatible | encodeZAState(StateValue::In) |
-SMEAttrs::SME_ABI_Routine;
+ SMEAttrs::SME_ABI_Routine;
}
SMEAttrs::SMEAttrs(const AttributeList &Attrs) {
diff --git a/llvm/unittests/Target/AArch64/SMEAttributesTest.cpp
b/llvm/unittests/Target/AArch64/SMEAttributesTest.cpp
index 2c1c92dfa6..6036999e34 100644
--- a/llvm/unittests/Target/AArch64/SMEAttributesTest.cpp
+++ b/llvm/unittests/Target/AArch64/SMEAttributesTest.cpp
@@ -38,22 +38,21 @@ TEST(SMEAttributes, Constructors) {
->getFunction("foo"))
.hasStreamingCompatibleInterface());
-
ASSERT_TRUE(
SA(*parseIR("declare void @foo() \"aarch64_in_za\"")->getFunction("foo"))
.isInZA());
- ASSERT_TRUE(SA(*parseIR("declare void @foo() \"aarch64_out_za\"")
- ->getFunction("foo"))
- .isOutZA());
+ ASSERT_TRUE(
+ SA(*parseIR("declare void @foo()
\"aarch64_out_za\"")->getFunction("foo"))
+ .isOutZA());
ASSERT_TRUE(SA(*parseIR("declare void @foo() \"aarch64_inout_za\"")
->getFunction("foo"))
.isInOutZA());
ASSERT_TRUE(SA(*parseIR("declare void @foo() \"aarch64_preserves_za\"")
->getFunction("foo"))
.isPreservesZA());
- ASSERT_TRUE(SA(*parseIR("declare void @foo() \"aarch64_new_za\"")
- ->getFunction("foo"))
- .isNewZA());
+
[clang] [llvm] [CMake][PGO] Add option for using an external project to generate profile data (PR #78879)
@@ -1,6 +1,10 @@
+include(LLVMExternalProjectUtils)
+
set(CLANG_PGO_TRAINING_DATA "${CMAKE_CURRENT_SOURCE_DIR}" CACHE PATH
"The path to a lit testsuite containing samples for PGO and order file
generation"
)
+set(CLANG_PGO_TRAINING_DATA_SOURCE_DIR OFF CACHE STRING "Path to source
directory containing cmake project with source files to use for generating pgo
data")
+set(CLANG_PERF_TRAINING_DEPS "" CACHE STRING "Extra dependencies needed to
build the PGO training data.")
petrhosek wrote:
I don't see this variable being used anywhere, should it be added as a
dependency of `generate-profraw-external`? I'd also consider naming it
`CLANG_PGO_TRAINING_DEPS` for consistency with other variables in this file.
https://github.com/llvm/llvm-project/pull/78879
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[clang] [llvm] [CMake][PGO] Add option for using an external project to generate profile data (PR #78879)
@@ -30,26 +30,28 @@ def findFilesWithExtension(path, extension): def clean(args): -if len(args) != 2: +if len(args) < 2: print( -"Usage: %s clean \n" % __file__ +"Usage: %s clean \n" % __file__ + "\tRemoves all files with extension from ." ) return 1 -for filename in findFilesWithExtension(args[0], args[1]): -os.remove(filename) +for path in args[1:-1]: +for filename in findFilesWithExtension(path, args[-1]): +os.remove(filename) return 0 def merge(args): -if len(args) != 3: +if len(args) < 3: print( -"Usage: %s merge \n" % __file__ +"Usage: %s merge \n" % __file__ + "\tMerges all profraw files from path into output." ) return 1 cmd = [args[0], "merge", "-o", args[1]] -cmd.extend(findFilesWithExtension(args[2], "profraw")) +for i in range(2, len(args)): +cmd.extend(findFilesWithExtension(args[i], "profraw")) petrhosek wrote: ```suggestion for path in args[2:]: cmd.extend(findFilesWithExtension(path, "profraw")) ``` https://github.com/llvm/llvm-project/pull/78879 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang] Amend SME attributes with support for ZT0. (PR #77941)
RKSimon wrote: @sdesmalen-arm This appears to be failing on some buildbots: https://lab.llvm.org/buildbot/#/builders/176/builds/8232 ``` llvm-lit: /home/tcwg-buildbot/worker/clang-aarch64-sve-vls-2stage/llvm/llvm/utils/lit/lit/TestingConfig.py:152: fatal: unable to parse config file '/home/tcwg-buildbot/worker/clang-aarch64-sve-vls-2stage/stage2/runtimes/runtimes-bins/compiler-rt/unittests/lit.common.unit.configured', traceback: Traceback (most recent call last): File "/home/tcwg-buildbot/worker/clang-aarch64-sve-vls-2stage/llvm/llvm/utils/lit/lit/TestingConfig.py", line 140, in load_from_path exec(compile(data, path, "exec"), cfg_globals, None) File "/home/tcwg-buildbot/worker/clang-aarch64-sve-vls-2stage/stage2/runtimes/runtimes-bins/compiler-rt/unittests/lit.common.unit.configured", line 23 config.aarch64_sme = ^ SyntaxError: invalid syntax ``` https://github.com/llvm/llvm-project/pull/77941 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [clang] Document the type_visibility attribute (PR #79157)
@@ -5557,6 +5557,21 @@ See :doc:`LTOVisibility`.
}];
}
+def TypeVisibilityDocs : Documentation {
+ let Category = DocCatType;
+ let Content = [{
+The ``type_visibility`` attribute allows the ELF visibility of a type and its
vague
+linkage objects (vtable, typeinfo, typeinfo name) to be controlled separately
from
+the visibility of functions and data members of the type.
+
+For example, this can be used to give default visibility to the typeinfo and
the vtable
+of a type while still keeping hidden visibility on its member functions and
static data
+members.
+
+This attribute can only be applied to types and namespaces.
philnik777 wrote:
Maybe we also want to document the behavior of adding both
`clang::type_visibility` and `gnu::visibility` to a namespace? (I think
`clang::type_visibility` overrides `gnu::visibility`)
https://github.com/llvm/llvm-project/pull/79157
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[clang] [flang] [llvm] [libc] [clang-tools-extra] [compiler-rt] Apply kind code check on exitstat and cmdstat (PR #78286)
https://github.com/yi-wu-arm updated
https://github.com/llvm/llvm-project/pull/78286
>From d56eca56c8e4c64e649febc43e2c48b6e5146680 Mon Sep 17 00:00:00 2001
From: Yi Wu
Date: Tue, 16 Jan 2024 14:08:00 +
Subject: [PATCH 1/8] change exitstat and cmsstat from AnyInt to DefaultInt
---
flang/lib/Evaluate/intrinsics.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/flang/lib/Evaluate/intrinsics.cpp
b/flang/lib/Evaluate/intrinsics.cpp
index da6d5970089884..0b9bdac88a78dc 100644
--- a/flang/lib/Evaluate/intrinsics.cpp
+++ b/flang/lib/Evaluate/intrinsics.cpp
@@ -1314,9 +1314,9 @@ static const IntrinsicInterface intrinsicSubroutine[]{
{"execute_command_line",
{{"command", DefaultChar, Rank::scalar},
{"wait", AnyLogical, Rank::scalar, Optionality::optional},
-{"exitstat", AnyInt, Rank::scalar, Optionality::optional,
+{"exitstat", DefaultInt, Rank::scalar, Optionality::optional,
common::Intent::InOut},
-{"cmdstat", AnyInt, Rank::scalar, Optionality::optional,
+{"cmdstat", DefaultInt, Rank::scalar, Optionality::optional,
common::Intent::Out},
{"cmdmsg", DefaultChar, Rank::scalar, Optionality::optional,
common::Intent::InOut}},
>From 2741652cae00ca1a94ae7a3310af1f25308e8105 Mon Sep 17 00:00:00 2001
From: Yi Wu
Date: Tue, 16 Jan 2024 16:54:42 +
Subject: [PATCH 2/8] add KindCode::greaterEqualToKind
Now execute_command_line will accept exitstat kind>=4, cmdstat kind >=2
---
flang/lib/Evaluate/intrinsics.cpp | 23 +++
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/flang/lib/Evaluate/intrinsics.cpp
b/flang/lib/Evaluate/intrinsics.cpp
index 0b9bdac88a78dc..947e31967bdf45 100644
--- a/flang/lib/Evaluate/intrinsics.cpp
+++ b/flang/lib/Evaluate/intrinsics.cpp
@@ -77,7 +77,7 @@ static constexpr CategorySet AnyType{IntrinsicType |
DerivedType};
ENUM_CLASS(KindCode, none, defaultIntegerKind,
defaultRealKind, // is also the default COMPLEX kind
-doublePrecision, defaultCharKind, defaultLogicalKind,
+doublePrecision, defaultCharKind, defaultLogicalKind,
greaterAndEqualToKind,
any, // matches any kind value; each instance is independent
// match any kind, but all "same" kinds must be equal. For characters, also
// implies that lengths must be equal.
@@ -104,7 +104,8 @@ ENUM_CLASS(KindCode, none, defaultIntegerKind,
struct TypePattern {
CategorySet categorySet;
KindCode kindCode{KindCode::none};
- int exactKindValue{0}; // for KindCode::exactKind
+ int kindValue{
+ 0}; // for KindCode::exactKind and KindCode::greaterAndEqualToKind
llvm::raw_ostream &Dump(llvm::raw_ostream &) const;
};
@@ -1314,10 +1315,12 @@ static const IntrinsicInterface intrinsicSubroutine[]{
{"execute_command_line",
{{"command", DefaultChar, Rank::scalar},
{"wait", AnyLogical, Rank::scalar, Optionality::optional},
-{"exitstat", DefaultInt, Rank::scalar, Optionality::optional,
-common::Intent::InOut},
-{"cmdstat", DefaultInt, Rank::scalar, Optionality::optional,
-common::Intent::Out},
+{"exitstat",
+TypePattern{IntType, KindCode::greaterAndEqualToKind, 4},
+Rank::scalar, Optionality::optional, common::Intent::InOut},
+{"cmdstat",
+TypePattern{IntType, KindCode::greaterAndEqualToKind, 2},
+Rank::scalar, Optionality::optional, common::Intent::Out},
{"cmdmsg", DefaultChar, Rank::scalar, Optionality::optional,
common::Intent::InOut}},
{}, Rank::elemental, IntrinsicClass::impureSubroutine},
@@ -1834,7 +1837,10 @@ std::optional IntrinsicInterface::Match(
argOk = true;
break;
case KindCode::exactKind:
- argOk = type->kind() == d.typePattern.exactKindValue;
+ argOk = type->kind() == d.typePattern.kindValue;
+ break;
+case KindCode::greaterAndEqualToKind:
+ argOk = type->kind() >= d.typePattern.kindValue;
break;
case KindCode::sameAtom:
if (!sameArg) {
@@ -2177,8 +2183,9 @@ std::optional IntrinsicInterface::Match(
resultType = DynamicType{
GetBuiltinDerivedType(builtinsScope, "__builtin_team_type")};
break;
+case KindCode::greaterAndEqualToKind:
case KindCode::exactKind:
- resultType = DynamicType{*category, result.exactKindValue};
+ resultType = DynamicType{*category, result.kindValue};
break;
case KindCode::typeless:
case KindCode::any:
>From cea484080cba83ad32abb5622048b1864e4a49dc Mon Sep 17 00:00:00 2001
From: Yi Wu
Date: Tue, 16 Jan 2024 17:25:12 +
Subject: [PATCH 3/8] doc fixes
---
flang/docs/Intrinsics.md | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/flang/docs/Intrinsics.md b/flang/docs/Intrinsics.md
index 5ade2574032977..981
[clang] [llvm] [JITLink][AArch32] Implement Armv5 ldr-pc stubs and use them for all pre-v7 targets (PR #79082)
https://github.com/weliveindetail closed https://github.com/llvm/llvm-project/pull/79082 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [flang] [llvm] [libc] [clang-tools-extra] [compiler-rt] Apply kind code check on exitstat and cmdstat (PR #78286)
https://github.com/yi-wu-arm updated
https://github.com/llvm/llvm-project/pull/78286
>From d56eca56c8e4c64e649febc43e2c48b6e5146680 Mon Sep 17 00:00:00 2001
From: Yi Wu
Date: Tue, 16 Jan 2024 14:08:00 +
Subject: [PATCH 1/8] change exitstat and cmsstat from AnyInt to DefaultInt
---
flang/lib/Evaluate/intrinsics.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/flang/lib/Evaluate/intrinsics.cpp
b/flang/lib/Evaluate/intrinsics.cpp
index da6d5970089884..0b9bdac88a78dc 100644
--- a/flang/lib/Evaluate/intrinsics.cpp
+++ b/flang/lib/Evaluate/intrinsics.cpp
@@ -1314,9 +1314,9 @@ static const IntrinsicInterface intrinsicSubroutine[]{
{"execute_command_line",
{{"command", DefaultChar, Rank::scalar},
{"wait", AnyLogical, Rank::scalar, Optionality::optional},
-{"exitstat", AnyInt, Rank::scalar, Optionality::optional,
+{"exitstat", DefaultInt, Rank::scalar, Optionality::optional,
common::Intent::InOut},
-{"cmdstat", AnyInt, Rank::scalar, Optionality::optional,
+{"cmdstat", DefaultInt, Rank::scalar, Optionality::optional,
common::Intent::Out},
{"cmdmsg", DefaultChar, Rank::scalar, Optionality::optional,
common::Intent::InOut}},
>From 2741652cae00ca1a94ae7a3310af1f25308e8105 Mon Sep 17 00:00:00 2001
From: Yi Wu
Date: Tue, 16 Jan 2024 16:54:42 +
Subject: [PATCH 2/8] add KindCode::greaterEqualToKind
Now execute_command_line will accept exitstat kind>=4, cmdstat kind >=2
---
flang/lib/Evaluate/intrinsics.cpp | 23 +++
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/flang/lib/Evaluate/intrinsics.cpp
b/flang/lib/Evaluate/intrinsics.cpp
index 0b9bdac88a78dc..947e31967bdf45 100644
--- a/flang/lib/Evaluate/intrinsics.cpp
+++ b/flang/lib/Evaluate/intrinsics.cpp
@@ -77,7 +77,7 @@ static constexpr CategorySet AnyType{IntrinsicType |
DerivedType};
ENUM_CLASS(KindCode, none, defaultIntegerKind,
defaultRealKind, // is also the default COMPLEX kind
-doublePrecision, defaultCharKind, defaultLogicalKind,
+doublePrecision, defaultCharKind, defaultLogicalKind,
greaterAndEqualToKind,
any, // matches any kind value; each instance is independent
// match any kind, but all "same" kinds must be equal. For characters, also
// implies that lengths must be equal.
@@ -104,7 +104,8 @@ ENUM_CLASS(KindCode, none, defaultIntegerKind,
struct TypePattern {
CategorySet categorySet;
KindCode kindCode{KindCode::none};
- int exactKindValue{0}; // for KindCode::exactKind
+ int kindValue{
+ 0}; // for KindCode::exactKind and KindCode::greaterAndEqualToKind
llvm::raw_ostream &Dump(llvm::raw_ostream &) const;
};
@@ -1314,10 +1315,12 @@ static const IntrinsicInterface intrinsicSubroutine[]{
{"execute_command_line",
{{"command", DefaultChar, Rank::scalar},
{"wait", AnyLogical, Rank::scalar, Optionality::optional},
-{"exitstat", DefaultInt, Rank::scalar, Optionality::optional,
-common::Intent::InOut},
-{"cmdstat", DefaultInt, Rank::scalar, Optionality::optional,
-common::Intent::Out},
+{"exitstat",
+TypePattern{IntType, KindCode::greaterAndEqualToKind, 4},
+Rank::scalar, Optionality::optional, common::Intent::InOut},
+{"cmdstat",
+TypePattern{IntType, KindCode::greaterAndEqualToKind, 2},
+Rank::scalar, Optionality::optional, common::Intent::Out},
{"cmdmsg", DefaultChar, Rank::scalar, Optionality::optional,
common::Intent::InOut}},
{}, Rank::elemental, IntrinsicClass::impureSubroutine},
@@ -1834,7 +1837,10 @@ std::optional IntrinsicInterface::Match(
argOk = true;
break;
case KindCode::exactKind:
- argOk = type->kind() == d.typePattern.exactKindValue;
+ argOk = type->kind() == d.typePattern.kindValue;
+ break;
+case KindCode::greaterAndEqualToKind:
+ argOk = type->kind() >= d.typePattern.kindValue;
break;
case KindCode::sameAtom:
if (!sameArg) {
@@ -2177,8 +2183,9 @@ std::optional IntrinsicInterface::Match(
resultType = DynamicType{
GetBuiltinDerivedType(builtinsScope, "__builtin_team_type")};
break;
+case KindCode::greaterAndEqualToKind:
case KindCode::exactKind:
- resultType = DynamicType{*category, result.exactKindValue};
+ resultType = DynamicType{*category, result.kindValue};
break;
case KindCode::typeless:
case KindCode::any:
>From cea484080cba83ad32abb5622048b1864e4a49dc Mon Sep 17 00:00:00 2001
From: Yi Wu
Date: Tue, 16 Jan 2024 17:25:12 +
Subject: [PATCH 3/8] doc fixes
---
flang/docs/Intrinsics.md | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/flang/docs/Intrinsics.md b/flang/docs/Intrinsics.md
index 5ade2574032977..981
[clang-tools-extra] [libc] [clang] [compiler-rt] [llvm] [flang] Apply kind code check on exitstat and cmdstat (PR #78286)
@@ -122,10 +122,22 @@ void RTNAME(ExecuteCommandLine)(const Descriptor
&command, bool wait,
if (exitstat) {
RUNTIME_CHECK(terminator, IsValidIntDescriptor(exitstat));
+auto exitstatKind{exitstat->type().GetCategoryAndKind()->second};
+if (exitstatKind < 4) {
klausler wrote:
The runtime code doesn't need to check these descriptors -- that will have been
done statically when the intrinsic procedure reference was analyzed!
What has to be done in the runtime is using those descriptors to store the
integer result values properly, and I think that the code already does that.
https://github.com/llvm/llvm-project/pull/78286
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[libc] [llvm] [clang] [clang-tools-extra] [flang] [compiler-rt] Apply kind code check on exitstat and cmdstat (PR #78286)
yi-wu-arm wrote: > Is there another patch that adds integer kind handling for these two > arguments to the runtime implementation? Thanks for mention the kind code in the runtime! I've added kind code check in runtime and provide test, an incorrect kind code would result in a `terminator.Crash` "exitstat/cmdstat must have an integer kind greater or equal to 4/2 but have: %d". The tests also test the terminator printout. https://github.com/llvm/llvm-project/pull/78286 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[libc] [llvm] [clang] [clang-tools-extra] [flang] [compiler-rt] Apply kind code check on exitstat and cmdstat (PR #78286)
https://github.com/klausler approved this pull request. https://github.com/llvm/llvm-project/pull/78286 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[flang] [clang] [libc] [clang-tools-extra] [compiler-rt] [llvm] Apply kind code check on exitstat and cmdstat (PR #78286)
@@ -122,10 +122,22 @@ void RTNAME(ExecuteCommandLine)(const Descriptor
&command, bool wait,
if (exitstat) {
RUNTIME_CHECK(terminator, IsValidIntDescriptor(exitstat));
+auto exitstatKind{exitstat->type().GetCategoryAndKind()->second};
+if (exitstatKind < 4) {
yi-wu-arm wrote:
Sorry I misunderstood your comment.
https://github.com/llvm/llvm-project/pull/78286
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[clang] [openmp] [libcxx] [mlir] [compiler-rt] [lld] [llvm] [HEXAGON] Inlining Division (PR #79021)
iajbar wrote: It looks good to me. Thanks Abinaya! https://github.com/llvm/llvm-project/pull/79021 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] 42b28c6 - [clang] Add missing streaming attributes to SVE builtins (#79134)
Author: Sam Tebbs
Date: 2024-01-23T17:21:52Z
New Revision: 42b28c694ebc8a4ab09ef0b419308d47fc1e21ba
URL:
https://github.com/llvm/llvm-project/commit/42b28c694ebc8a4ab09ef0b419308d47fc1e21ba
DIFF:
https://github.com/llvm/llvm-project/commit/42b28c694ebc8a4ab09ef0b419308d47fc1e21ba.diff
LOG: [clang] Add missing streaming attributes to SVE builtins (#79134)
This patch adds `IsStreamingCompatible` or `IsStreamingOrSVE2p1` to the
SVE builtins that missed them.
Added:
Modified:
clang/include/clang/Basic/arm_sve.td
clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_x2.c
Removed:
diff --git a/clang/include/clang/Basic/arm_sve.td
b/clang/include/clang/Basic/arm_sve.td
index 4c5c1b5603f181a..6da30e08e7521e7 100644
--- a/clang/include/clang/Basic/arm_sve.td
+++ b/clang/include/clang/Basic/arm_sve.td
@@ -543,13 +543,13 @@ def SVADRD : SInst<"svadrd[_{0}base]_[{2}]index", "uud",
"ilUiUl", MergeNone, "
// Scalar to vector
-def SVDUPQ_8 : SInst<"svdupq[_n]_{d}", "d", "cUc",
MergeNone>;
-def SVDUPQ_16 : SInst<"svdupq[_n]_{d}", "d", "sUsh", MergeNone>;
+def SVDUPQ_8 : SInst<"svdupq[_n]_{d}", "d", "cUc",
MergeNone, "", [IsStreamingCompatible]>;
+def SVDUPQ_16 : SInst<"svdupq[_n]_{d}", "d", "sUsh", MergeNone, "",
[IsStreamingCompatible]>;
let TargetGuard = "sve,bf16" in {
- def SVDUPQ_BF16 : SInst<"svdupq[_n]_{d}", "d", "b", MergeNone>;
+ def SVDUPQ_BF16 : SInst<"svdupq[_n]_{d}", "d", "b", MergeNone, "",
[IsStreamingCompatible]>;
}
-def SVDUPQ_32 : SInst<"svdupq[_n]_{d}", "d", "iUif", MergeNone>;
-def SVDUPQ_64 : SInst<"svdupq[_n]_{d}", "dss", "lUld", MergeNone>;
+def SVDUPQ_32 : SInst<"svdupq[_n]_{d}", "d", "iUif", MergeNone, "",
[IsStreamingCompatible]>;
+def SVDUPQ_64 : SInst<"svdupq[_n]_{d}", "dss", "lUld", MergeNone, "",
[IsStreamingCompatible]>;
multiclass svdup_base {
def NAME : SInst;
@@ -638,8 +638,8 @@ def SVQADD_N_U : SInst<"svqadd[_n_{d}]", "dda",
"UcUsUiUl", MergeNone, "aarch64
def SVQSUB_N_S : SInst<"svqsub[_n_{d}]", "dda", "csil", MergeNone,
"aarch64_sve_sqsub_x", [IsStreamingCompatible]>;
def SVQSUB_N_U : SInst<"svqsub[_n_{d}]", "dda", "UcUsUiUl", MergeNone,
"aarch64_sve_uqsub_x", [IsStreamingCompatible]>;
-def SVDOT_LANE_S : SInst<"svdot_lane[_{d}]", "ddqqi", "il", MergeNone,
"aarch64_sve_sdot_lane", [], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>;
-def SVDOT_LANE_U : SInst<"svdot_lane[_{d}]", "ddqqi", "UiUl", MergeNone,
"aarch64_sve_udot_lane", [], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>;
+def SVDOT_LANE_S : SInst<"svdot_lane[_{d}]", "ddqqi", "il", MergeNone,
"aarch64_sve_sdot_lane", [IsStreamingCompatible], [ImmCheck<3,
ImmCheckLaneIndexDot, 2>]>;
+def SVDOT_LANE_U : SInst<"svdot_lane[_{d}]", "ddqqi", "UiUl", MergeNone,
"aarch64_sve_udot_lane", [IsStreamingCompatible], [ImmCheck<3,
ImmCheckLaneIndexDot, 2>]>;
// Logical operations
@@ -835,14 +835,14 @@ def SVSCALE_N_M : SInst<"svscale[_n_{d}]", "dPdK", "hfd",
MergeOp1, "aarch64_sv
def SVSCALE_N_X : SInst<"svscale[_n_{d}]", "dPdK", "hfd", MergeAny,
"aarch64_sve_fscale", [IsStreamingCompatible]>;
def SVSCALE_N_Z : SInst<"svscale[_n_{d}]", "dPdK", "hfd", MergeZero,
"aarch64_sve_fscale", [IsStreamingCompatible]>;
-defm SVMAD_F : SInstZPZZZ<"svmad", "hfd", "aarch64_sve_fmad",
"aarch64_sve_fmla_u", [ReverseMergeAnyAccOp]>;
-defm SVMLA_F : SInstZPZZZ<"svmla", "hfd", "aarch64_sve_fmla",
"aarch64_sve_fmla_u">;
-defm SVMLS_F : SInstZPZZZ<"svmls", "hfd", "aarch64_sve_fmls",
"aarch64_sve_fmls_u">;
-defm SVMSB_F : SInstZPZZZ<"svmsb", "hfd", "aarch64_sve_fmsb",
"aarch64_sve_fmls_u", [ReverseMergeAnyAccOp]>;
-defm SVNMAD_F : SInstZPZZZ<"svnmad", "hfd", "aarch64_sve_fnmad",
"aarch64_sve_fnmla_u", [ReverseMergeAnyAccOp]>;
-defm SVNMLA_F : SInstZPZZZ<"svnmla", "hfd", "aarch64_sve_fnmla",
"aarch64_sve_fnmla_u">;
-defm SVNMLS_F : SInstZPZZZ<"svnmls", "hfd", "aarch64_sve_fnmls",
"aarch64_sve_fnmls_u">;
-defm SVNMSB_F : SInstZPZZZ<"svnmsb", "hfd", "aarch64_sve_fnmsb",
"aarch64_sve_fnmls_u", [ReverseMergeAnyAccOp]>;
+defm SVMAD_F : SInstZPZZZ<"svmad", "hfd", "aarch64_sve_fmad",
"aarch64_sve_fmla_u", [IsStreamingCompatible, ReverseMergeAnyAccOp]>;
+defm SVMLA_F : SInstZPZZZ<"svmla", "hfd", "aarch64_sve_fmla",
"aarch64_sve_fmla_u", [IsStreamingCompatible]>;
+defm SVMLS_F : SInstZPZZZ<"svmls", "hfd", "aarch64_sve_fmls",
"aarch64_sve_fmls_u", [IsStreamingCompatible]>;
+defm SVMSB_F : SInstZPZZZ<"svmsb", "hfd", "aarch64_sve_fmsb",
"aarch64_sve_fmls_u", [IsStreamingCompatible, ReverseMergeAnyAccOp]>;
+defm SVNMAD_F : SInstZPZZZ<"svnmad", "hfd", "aarch64_sve_fnmad",
"aarch64_sve_fnmla_u", [IsStreamingCompatible, Rev
[clang] [clang] Add missing streaming attributes to SVE builtins (PR #79134)
https://github.com/SamTebbs33 closed https://github.com/llvm/llvm-project/pull/79134 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] 2531a15 - [OpenACC] Implement 'device_type' clause parsing
Author: erichkeane
Date: 2024-01-23T09:23:42-08:00
New Revision: 2531a15dfd4eafda21622e3a828a93fc9a27e3b6
URL:
https://github.com/llvm/llvm-project/commit/2531a15dfd4eafda21622e3a828a93fc9a27e3b6
DIFF:
https://github.com/llvm/llvm-project/commit/2531a15dfd4eafda21622e3a828a93fc9a27e3b6.diff
LOG: [OpenACC] Implement 'device_type' clause parsing
'device_type' takes either an asterisk or a list of impementation
specific identifiers. This patch implements the parsing for it.
Additionally, 'dtype' is an alias for 'device_type', though we're
implementing it as its own clause kind to improve future diagnostics, as
this will allow us to differentiate the spellings.
Added:
Modified:
clang/include/clang/Basic/OpenACCKinds.h
clang/include/clang/Parse/Parser.h
clang/lib/Parse/ParseOpenACC.cpp
clang/test/ParserOpenACC/parse-clauses.c
Removed:
diff --git a/clang/include/clang/Basic/OpenACCKinds.h
b/clang/include/clang/Basic/OpenACCKinds.h
index 872faec0deaebb..6487a95910eddc 100644
--- a/clang/include/clang/Basic/OpenACCKinds.h
+++ b/clang/include/clang/Basic/OpenACCKinds.h
@@ -232,6 +232,12 @@ enum class OpenACCClauseKind {
DeviceNum,
/// 'default_async' clause, allowed on 'set' construct.
DefaultAsync,
+ /// 'device_type' clause, allowed on Constructs, 'data', 'init', 'shutdown',
+ /// 'set', update', 'loop', 'routine', and Combined constructs.
+ DeviceType,
+ /// 'dtype' clause, an alias for 'device_type', stored separately for
+ /// diagnostic purposes.
+ DType,
/// Represents an invalid clause, for the purposes of parsing.
Invalid,
@@ -348,6 +354,12 @@ inline const StreamingDiagnostic &operator<<(const
StreamingDiagnostic &Out,
case OpenACCClauseKind::DefaultAsync:
return Out << "default_async";
+ case OpenACCClauseKind::DeviceType:
+return Out << "device_type";
+
+ case OpenACCClauseKind::DType:
+return Out << "dtype";
+
case OpenACCClauseKind::Invalid:
return Out << "";
}
diff --git a/clang/include/clang/Parse/Parser.h
b/clang/include/clang/Parse/Parser.h
index 6bfcd3a0d84129..ffbde370e8f9c6 100644
--- a/clang/include/clang/Parse/Parser.h
+++ b/clang/include/clang/Parse/Parser.h
@@ -3587,6 +3587,9 @@ class Parser : public CodeCompletionHandler {
/// Parses the clause kind of 'int-expr', which can be any integral
/// expression.
ExprResult ParseOpenACCIntExpr();
+ /// Parses the 'device-type-list', which is a list of identifiers.
+ bool ParseOpenACCDeviceTypeList();
+
private:
//======//
// C++ 14: Templates [temp]
diff --git a/clang/lib/Parse/ParseOpenACC.cpp
b/clang/lib/Parse/ParseOpenACC.cpp
index 8020c455feecbc..9f7e63ecdc9518 100644
--- a/clang/lib/Parse/ParseOpenACC.cpp
+++ b/clang/lib/Parse/ParseOpenACC.cpp
@@ -104,7 +104,9 @@ OpenACCClauseKind getOpenACCClauseKind(Token Tok) {
.Case("device", OpenACCClauseKind::Device)
.Case("device_num", OpenACCClauseKind::DeviceNum)
.Case("device_resident", OpenACCClauseKind::DeviceResident)
+ .Case("device_type", OpenACCClauseKind::DeviceType)
.Case("deviceptr", OpenACCClauseKind::DevicePtr)
+ .Case("dtype", OpenACCClauseKind::DType)
.Case("finalize", OpenACCClauseKind::Finalize)
.Case("firstprivate", OpenACCClauseKind::FirstPrivate)
.Case("host", OpenACCClauseKind::Host)
@@ -488,6 +490,8 @@ ClauseParensKind getClauseParensKind(OpenACCDirectiveKind
DirKind,
case OpenACCClauseKind::NumWorkers:
case OpenACCClauseKind::DeviceNum:
case OpenACCClauseKind::DefaultAsync:
+ case OpenACCClauseKind::DeviceType:
+ case OpenACCClauseKind::DType:
return ClauseParensKind::Required;
case OpenACCClauseKind::Auto:
@@ -580,6 +584,38 @@ bool Parser::ParseOpenACCClauseVarList(OpenACCClauseKind
Kind) {
}
return false;
}
+
+/// OpenACC 3.3 Section 2.4:
+/// The argument to the device_type clause is a comma-separated list of one or
+/// more device architecture name identifiers, or an asterisk.
+///
+/// The syntax of the device_type clause is
+/// device_type( * )
+/// device_type( device-type-list )
+///
+/// The device_type clause may be abbreviated to dtype.
+bool Parser::ParseOpenACCDeviceTypeList() {
+
+ if (expectIdentifierOrKeyword(*this)) {
+SkipUntil(tok::r_paren, tok::annot_pragma_openacc_end,
+ Parser::StopBeforeMatch);
+return false;
+ }
+ ConsumeToken();
+
+ while (!getCurToken().isOneOf(tok::r_paren, tok::annot_pragma_openacc_end)) {
+ExpectAndConsume(tok::comma);
+
+if (expectIdentifierOrKeyword(*this)) {
+ SkipUntil(tok::r_paren, tok::annot_pragma_openacc_end,
+Parser::StopBeforeMatch);
+ return false;
+}
+ConsumeToken();
+ }
+ return false;
+}
+
// The OpenACC Clause List is a comma or space-delimited list of clauses (see
// the comment on ParseOpenACC
[clang] [Clang][Driver] Fix `--save-temps` for OpenCL AoT compilation (PR #78333)
https://github.com/jhuber6 approved this pull request. https://github.com/llvm/llvm-project/pull/78333 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] c5a33be - [clang][modules] Fix CodeGen options that can affect the AST. (#78816)
Author: Juergen Ributzka
Date: 2024-01-23T09:30:58-08:00
New Revision: c5a33befcc328339a84c35f6899ff3f3309399fc
URL:
https://github.com/llvm/llvm-project/commit/c5a33befcc328339a84c35f6899ff3f3309399fc
DIFF:
https://github.com/llvm/llvm-project/commit/c5a33befcc328339a84c35f6899ff3f3309399fc.diff
LOG: [clang][modules] Fix CodeGen options that can affect the AST. (#78816)
`OptimizationLevel` and `OptimizeSize` can affect the generated AST. They
indirectly affect the `Optimize` and `OptimizeSize` frontend options, which in
turn set predefined macro definitions.
This fixes rdar://121228252.
Added:
Modified:
clang/include/clang/Basic/CodeGenOptions.def
clang/lib/Basic/CodeGenOptions.cpp
clang/test/ClangScanDeps/strip-codegen-args.m
Removed:
diff --git a/clang/include/clang/Basic/CodeGenOptions.def
b/clang/include/clang/Basic/CodeGenOptions.def
index 2c4fb6745bc172..2f2e45d5cf63df 100644
--- a/clang/include/clang/Basic/CodeGenOptions.def
+++ b/clang/include/clang/Basic/CodeGenOptions.def
@@ -12,6 +12,9 @@
// that have enumeration type and VALUE_CODEGENOPT is a code
// generation option that describes a value rather than a flag.
//
+// AFFECTING_VALUE_CODEGENOPT is used for code generation options that can
+// affect the AST.
+//
//===--===//
#ifndef CODEGENOPT
# error Define the CODEGENOPT macro to handle language options
@@ -27,6 +30,11 @@ CODEGENOPT(Name, Bits, Default)
CODEGENOPT(Name, Bits, Default)
#endif
+#ifndef AFFECTING_VALUE_CODEGENOPT
+# define AFFECTING_VALUE_CODEGENOPT(Name, Bits, Default) \
+VALUE_CODEGENOPT(Name, Bits, Default)
+#endif
+
CODEGENOPT(DisableIntegratedAS, 1, 0) ///< -no-integrated-as
CODEGENOPT(RelaxELFRelocations, 1, 1) ///< -Wa,-mrelax-relocations={yes,no}
CODEGENOPT(AsmVerbose, 1, 0) ///< -dA, -fverbose-asm.
@@ -193,8 +201,10 @@ ENUM_CODEGENOPT(ObjCDispatchMethod,
ObjCDispatchMethodKind, 2, Legacy)
CODEGENOPT(ObjCConvertMessagesToRuntimeCalls , 1, 1)
CODEGENOPT(ObjCAvoidHeapifyLocalBlocks, 1, 0)
-VALUE_CODEGENOPT(OptimizationLevel, 2, 0) ///< The -O[0-3] option specified.
-VALUE_CODEGENOPT(OptimizeSize, 2, 0) ///< If -Os (==1) or -Oz (==2) is
specified.
+
+// The optimization options affect frontend options, whicn in turn do affect
the AST.
+AFFECTING_VALUE_CODEGENOPT(OptimizationLevel, 2, 0) ///< The -O[0-3] option
specified.
+AFFECTING_VALUE_CODEGENOPT(OptimizeSize, 2, 0) ///< If -Os (==1) or -Oz (==2)
is specified.
CODEGENOPT(AtomicProfileUpdate , 1, 0) ///< Set -fprofile-update=atomic
/// Choose profile instrumenation kind or no instrumentation.
@@ -437,3 +447,4 @@ CODEGENOPT(CtorDtorReturnThis, 1, 0)
#undef CODEGENOPT
#undef ENUM_CODEGENOPT
#undef VALUE_CODEGENOPT
+#undef AFFECTING_VALUE_CODEGENOPT
diff --git a/clang/lib/Basic/CodeGenOptions.cpp
b/clang/lib/Basic/CodeGenOptions.cpp
index 182d0a2fa4d88f..79d715305ef20b 100644
--- a/clang/lib/Basic/CodeGenOptions.cpp
+++ b/clang/lib/Basic/CodeGenOptions.cpp
@@ -27,6 +27,8 @@ void CodeGenOptions::resetNonModularOptions(StringRef
ModuleFormat) {
#define ENUM_DEBUGOPT(Name, Type, Bits, Default)
#define CODEGENOPT(Name, Bits, Default) Name = Default;
#define ENUM_CODEGENOPT(Name, Type, Bits, Default) set##Name(Default);
+// Do not reset AST affecting code generation options.
+#define AFFECTING_VALUE_CODEGENOPT(Name, Bits, Default)
#include "clang/Basic/CodeGenOptions.def"
// Next reset all debug options that can always be reset, because they never
diff --git a/clang/test/ClangScanDeps/strip-codegen-args.m
b/clang/test/ClangScanDeps/strip-codegen-args.m
index bb7e76e86aa2f9..71171f4983386d 100644
--- a/clang/test/ClangScanDeps/strip-codegen-args.m
+++ b/clang/test/ClangScanDeps/strip-codegen-args.m
@@ -5,11 +5,14 @@
// RUN: clang-scan-deps -compilation-database %t/cdb1.json -format
experimental-full > %t/result1.txt
// RUN: FileCheck %s -input-file %t/result1.txt
-// This tests that codegen option that do not affect the AST or generation of
a module are removed.
+// This tests that codegen option that do not affect the AST or generation of a
+// module are removed. It also tests that the optimization options that affect
+// the AST are not reset to -O0.
// CHECK:"modules": [
// CHECK-NEXT: {
// CHECK:"command-line": [
+// CHECK-NOT: "-O0"
// CHECK-NOT: "-flto"
// CHECK-NOT: "-fno-autolink"
// CHECK-NOT: "-mrelax-relocations=no"
@@ -23,17 +26,17 @@
[
{
"directory": "DIR",
-"command": "clang -Imodules/A -fmodules
-fmodules-cache-path=DIR/module-cache -fimplicit-modules -flto -fno-autolink
-Xclang -mrelax-relocations=no -fsyntax-only DIR/t1.m",
+"command": "clang -Imodules/A -fmodules
-fmodules-cache-path=DIR/module-cache -fimplicit-modules -O2 -flto
-fno-autolink -Xclang -mrelax-relocations=no -fsy
[clang] [clang][modules] Fix CodeGen options that can affect the AST. (PR #78816)
https://github.com/ributzka closed https://github.com/llvm/llvm-project/pull/78816 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Update test intrinsic to support immediates (PR #79174)
https://github.com/AtariDreams created
https://github.com/llvm/llvm-project/pull/79174
None
>From 9ed2a138bd980c1c043e1585cb8e5d82a1592f1e Mon Sep 17 00:00:00 2001
From: Rose <83477269+ataridre...@users.noreply.github.com>
Date: Tue, 23 Jan 2024 12:31:49 -0500
Subject: [PATCH] Update test intrinsic to support immediates
---
clang/lib/CodeGen/CGBuiltin.cpp | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 7ef764b8e1ac80e..e404f92c284aafc 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -1203,10 +1203,24 @@ static llvm::Value
*EmitX86BitTestIntrinsic(CodeGenFunction &CGF,
AsmOS << "bt";
if (Action)
AsmOS << Action;
- AsmOS << SizeSuffix << " $2, ($1)";
- // Build the constraints. FIXME: We should support immediates when possible.
- std::string Constraints = "={@ccc},r,r,~{cc},~{memory}";
+ // Check if BitPos is a ConstantInt (immediate value)
+ if (llvm::ConstantInt *CI = llvm::dyn_cast(BitPos)) {
+// If it is, use the immediate value in the assembly string
+AsmOS << SizeSuffix << " $" << CI->getZExtValue() << ", ($1)";
+ } else {
+// Otherwise, fall back to the existing behavior
+AsmOS << SizeSuffix << " $2, ($1)";
+ }
+
+ // Build the constraints.
+ std::string Constraints;
+ if (llvm::isa(BitPos)) {
+Constraints = "={@ccc},r,~{cc},~{memory}";
+ } else {
+Constraints = "={@ccc},r,r,~{cc},~{memory}";
+ }
+
std::string_view MachineClobbers = CGF.getTarget().getClobbers();
if (!MachineClobbers.empty()) {
Constraints += ',';
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[clang] Update test intrinsic to support immediates (PR #79174)
llvmbot wrote:
@llvm/pr-subscribers-clang
@llvm/pr-subscribers-clang-codegen
Author: AtariDreams (AtariDreams)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/79174.diff
1 Files Affected:
- (modified) clang/lib/CodeGen/CGBuiltin.cpp (+17-3)
``diff
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 7ef764b8e1ac80..e404f92c284aaf 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -1203,10 +1203,24 @@ static llvm::Value
*EmitX86BitTestIntrinsic(CodeGenFunction &CGF,
AsmOS << "bt";
if (Action)
AsmOS << Action;
- AsmOS << SizeSuffix << " $2, ($1)";
- // Build the constraints. FIXME: We should support immediates when possible.
- std::string Constraints = "={@ccc},r,r,~{cc},~{memory}";
+ // Check if BitPos is a ConstantInt (immediate value)
+ if (llvm::ConstantInt *CI = llvm::dyn_cast(BitPos)) {
+// If it is, use the immediate value in the assembly string
+AsmOS << SizeSuffix << " $" << CI->getZExtValue() << ", ($1)";
+ } else {
+// Otherwise, fall back to the existing behavior
+AsmOS << SizeSuffix << " $2, ($1)";
+ }
+
+ // Build the constraints.
+ std::string Constraints;
+ if (llvm::isa(BitPos)) {
+Constraints = "={@ccc},r,~{cc},~{memory}";
+ } else {
+Constraints = "={@ccc},r,r,~{cc},~{memory}";
+ }
+
std::string_view MachineClobbers = CGF.getTarget().getClobbers();
if (!MachineClobbers.empty()) {
Constraints += ',';
``
https://github.com/llvm/llvm-project/pull/79174
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[clang] Update test intrinsic to support immediates (PR #79174)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 51f9e982ed5c9a1f39c50d0501ab1bcb6ebf5de4
9ed2a138bd980c1c043e1585cb8e5d82a1592f1e -- clang/lib/CodeGen/CGBuiltin.cpp
``
View the diff from clang-format here.
``diff
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index e404f92c28..4c205be47f 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -1220,7 +1220,7 @@ static llvm::Value
*EmitX86BitTestIntrinsic(CodeGenFunction &CGF,
} else {
Constraints = "={@ccc},r,r,~{cc},~{memory}";
}
-
+
std::string_view MachineClobbers = CGF.getTarget().getClobbers();
if (!MachineClobbers.empty()) {
Constraints += ',';
``
https://github.com/llvm/llvm-project/pull/79174
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[clang] [Clang][Driver] Fix `--save-temps` for OpenCL AoT compilation (PR #78333)
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/78333
>From 9ae3562ab4a6fb152c2a92f50b72d86711bbad8b Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 23 Jan 2024 12:35:42 -0500
Subject: [PATCH] [Clang][Driver] Fix `--save-temps` for OpenCL AoT compilation
We can directly call `clang -c -x cl -target amdgcn -mcpu=gfx90a test.cl -o
test.o`
to compile an OpenCL kernel file. However, when `--save-temps` is enabled, it
doesn't
work because the preprocessed file (`.i` file) is taken as C source file when
it
is fed to the front end, thus causing compilation error because those OpenCL
keywords
can't be recognized. This patch fixes the issue.
---
clang/include/clang/Driver/Types.def | 6 --
clang/lib/Driver/Types.cpp | 7 ++-
clang/test/Driver/opencl_aot_save_temps.cl | 19 +++
3 files changed, 29 insertions(+), 3 deletions(-)
create mode 100644 clang/test/Driver/opencl_aot_save_temps.cl
diff --git a/clang/include/clang/Driver/Types.def
b/clang/include/clang/Driver/Types.def
index b889883125c4c1..f72c27e1ee7019 100644
--- a/clang/include/clang/Driver/Types.def
+++ b/clang/include/clang/Driver/Types.def
@@ -37,8 +37,10 @@
// C family source language (with and without preprocessing).
TYPE("cpp-output", PP_C, INVALID, "i",
phases::Compile, phases::Backend, phases::Assemble, phases::Link)
TYPE("c",C,PP_C,"c",
phases::Preprocess, phases::Compile, phases::Backend, phases::Assemble,
phases::Link)
-TYPE("cl", CL, PP_C,"cl",
phases::Preprocess, phases::Compile, phases::Backend, phases::Assemble,
phases::Link)
-TYPE("clcpp",CLCXX,PP_CXX, "clcpp",
phases::Preprocess, phases::Compile, phases::Backend, phases::Assemble,
phases::Link)
+TYPE("cl", CL, PP_CL, "cl",
phases::Preprocess, phases::Compile, phases::Backend, phases::Assemble,
phases::Link)
+TYPE("cl-cpp-output",PP_CL,INVALID, "cli",
phases::Compile, phases::Backend, phases::Assemble, phases::Link)
+TYPE("clcpp",CLCXX,PP_CLCXX,"clcpp",
phases::Preprocess, phases::Compile, phases::Backend, phases::Assemble,
phases::Link)
+TYPE("clcpp-cpp-output", PP_CLCXX, INVALID, "clii",
phases::Compile, phases::Backend, phases::Assemble, phases::Link)
TYPE("cuda-cpp-output", PP_CUDA, INVALID, "cui",
phases::Compile, phases::Backend, phases::Assemble, phases::Link)
TYPE("cuda", CUDA, PP_CUDA, "cu",
phases::Preprocess, phases::Compile, phases::Backend, phases::Assemble,
phases::Link)
TYPE("cuda", CUDA_DEVICE, PP_CUDA, "cu",
phases::Preprocess, phases::Compile, phases::Backend, phases::Assemble,
phases::Link)
diff --git a/clang/lib/Driver/Types.cpp b/clang/lib/Driver/Types.cpp
index 08df34ade7b653..a7b6b9000e1d2b 100644
--- a/clang/lib/Driver/Types.cpp
+++ b/clang/lib/Driver/Types.cpp
@@ -133,7 +133,7 @@ bool types::isAcceptedByClang(ID Id) {
case TY_Asm:
case TY_C: case TY_PP_C:
- case TY_CL: case TY_CLCXX:
+ case TY_CL: case TY_PP_CL: case TY_CLCXX: case TY_PP_CLCXX:
case TY_CUDA: case TY_PP_CUDA:
case TY_CUDA_DEVICE:
case TY_HIP:
@@ -181,7 +181,9 @@ bool types::isDerivedFromC(ID Id) {
case TY_PP_C:
case TY_C:
case TY_CL:
+ case TY_PP_CL:
case TY_CLCXX:
+ case TY_PP_CLCXX:
case TY_PP_CUDA:
case TY_CUDA:
case TY_CUDA_DEVICE:
@@ -241,6 +243,7 @@ bool types::isCXX(ID Id) {
case TY_PP_CXXHeaderUnit:
case TY_ObjCXXHeader: case TY_PP_ObjCXXHeader:
case TY_CXXModule: case TY_PP_CXXModule:
+ case TY_PP_CLCXX:
case TY_CUDA: case TY_PP_CUDA: case TY_CUDA_DEVICE:
case TY_HIP:
case TY_PP_HIP:
@@ -310,7 +313,9 @@ types::ID types::lookupTypeForExtension(llvm::StringRef
Ext) {
.Case("cc", TY_CXX)
.Case("CC", TY_CXX)
.Case("cl", TY_CL)
+ .Case("cli", TY_PP_CL)
.Case("clcpp", TY_CLCXX)
+ .Case("clii", TY_PP_CLCXX)
.Case("cp", TY_CXX)
.Case("cu", TY_CUDA)
.Case("hh", TY_CXXHeader)
diff --git a/clang/test/Driver/opencl_aot_save_temps.cl
b/clang/test/Driver/opencl_aot_save_temps.cl
new file mode 100644
index 00..b78014ca617b9a
--- /dev/null
+++ b/clang/test/Driver/opencl_aot_save_temps.cl
@@ -0,0 +1,19 @@
+// RUN: %clang -x cl --save-temps -c -### %s 2>&1 | FileCheck %s
+// RUN: %clang -x cl -ccc-print-phases -c %s 2>&1 | FileCheck %s
-check-prefix=CHECK-PHASES
+
+// CHECK: "-o" "[[CLI_NAME:.+]].cli" "-x" "cl"
+// CHECK-NEXT: "-o" "[[CLI_NAME]].bc" "-x"
"cl-cpp-output"{{.*}}"[[CLI_NAME:.+]].cli"
+
+// CHECK-PHASES: 0: input, {{.*}}, cl
+// CHECK-PHASES: 1: preprocessor, {0}, cl-cpp-output
+// CHECK-PHASES: 2: compiler, {1}, ir
+// CHECK-PHASES: 3: backen
[lld] [clang-tools-extra] [llvm] [clang] [ELF] --save-temps --lto-emit-asm: derive ELF/asm file names from bitcode file names (PR #78835)
@@ -53,10 +53,10 @@
; RUN: rm -fr cache && mkdir cache
; RUN: ld.lld --thinlto-cache-dir=cache --save-temps -o out b.bc a.bc -M |
FileCheck %s --check-prefix=MAP
-; RUN: ls out1.lto.o a.bc.0.preopt.bc b.bc.0.preopt.bc
+; RUN: ls out.lto.a.o a.bc.0.preopt.bc b.bc.0.preopt.bc
-; MAP: llvmcache-{{.*}}:(.text)
-; MAP: llvmcache-{{.*}}:(.text)
+; MAP: out.lto.b.o:(.text)
MaskRay wrote:
This is a new test. I noticed the `-Map` difference, so I pre-committed a test
and changed this PR to demonstrate the difference.
https://github.com/llvm/llvm-project/pull/78835
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[clang] [llvm] [JITLink][AArch32] Implement Armv5 ldr-pc stubs and use them for all pre-v7 targets (PR #79082)
Stefan =?utf-8?q?Gr=C3=A4nitz?= , Stefan =?utf-8?q?Gr=C3=A4nitz?= , Stefan =?utf-8?q?Gr=C3=A4nitz?= Message-ID: In-Reply-To: https://github.com/lhames commented: LGTM. I love the detail in the testing here -- thanks @weliveindetail! https://github.com/llvm/llvm-project/pull/79082 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Revert "[clang-repl] Enable native CPU detection by default (#77491)" (PR #79178)
https://github.com/weliveindetail created
https://github.com/llvm/llvm-project/pull/79178
Reverting because `clang-repl -Xcc -mcpu=arm1176jzf-s` isn't overwriting this
as I had expected. We need to check whether a specific CPU flag was given by
the user first.
Reverts llvm/llvm-project#77491
From c9a439ed53bc6852b913c202749b3aa8833b4207 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Stefan=20Gr=C3=A4nitz?=
Date: Tue, 23 Jan 2024 18:39:57 +0100
Subject: [PATCH] Revert "[clang-repl] Enable native CPU detection by default"
---
clang/lib/Interpreter/Interpreter.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/clang/lib/Interpreter/Interpreter.cpp
b/clang/lib/Interpreter/Interpreter.cpp
index d1764d07dfd240..9f97a3c6b0be9e 100644
--- a/clang/lib/Interpreter/Interpreter.cpp
+++ b/clang/lib/Interpreter/Interpreter.cpp
@@ -148,7 +148,6 @@ IncrementalCompilerBuilder::create(std::vector &ClangArgv) {
// We do C++ by default; append right after argv[0] if no "-x" given
ClangArgv.insert(ClangArgv.end(), "-Xclang");
ClangArgv.insert(ClangArgv.end(), "-fincremental-extensions");
- ClangArgv.insert(ClangArgv.end(), "-mcpu=native");
ClangArgv.insert(ClangArgv.end(), "-c");
// Put a dummy C++ file on to ensure there's at least one compile job for the
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[clang] 6a7abea - Revert "[clang-repl] Enable native CPU detection by default (#77491)" (#79178)
Author: Stefan Gränitz
Date: 2024-01-23T18:44:07+01:00
New Revision: 6a7abea47418721616c9dd7a16f5cc3e5a67d49c
URL:
https://github.com/llvm/llvm-project/commit/6a7abea47418721616c9dd7a16f5cc3e5a67d49c
DIFF:
https://github.com/llvm/llvm-project/commit/6a7abea47418721616c9dd7a16f5cc3e5a67d49c.diff
LOG: Revert "[clang-repl] Enable native CPU detection by default (#77491)"
(#79178)
Reverting because `clang-repl -Xcc -mcpu=arm1176jzf-s` isn't overwriting
this as I had expected. We need to check whether a specific CPU flag was
given by the user first.
Reverts llvm/llvm-project#77491
Added:
Modified:
clang/lib/Interpreter/Interpreter.cpp
Removed:
diff --git a/clang/lib/Interpreter/Interpreter.cpp
b/clang/lib/Interpreter/Interpreter.cpp
index d1764d07dfd2407..9f97a3c6b0be9e6 100644
--- a/clang/lib/Interpreter/Interpreter.cpp
+++ b/clang/lib/Interpreter/Interpreter.cpp
@@ -148,7 +148,6 @@ IncrementalCompilerBuilder::create(std::vector &ClangArgv) {
// We do C++ by default; append right after argv[0] if no "-x" given
ClangArgv.insert(ClangArgv.end(), "-Xclang");
ClangArgv.insert(ClangArgv.end(), "-fincremental-extensions");
- ClangArgv.insert(ClangArgv.end(), "-mcpu=native");
ClangArgv.insert(ClangArgv.end(), "-c");
// Put a dummy C++ file on to ensure there's at least one compile job for the
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[clang] Revert "[clang-repl] Enable native CPU detection by default (#77491)" (PR #79178)
https://github.com/weliveindetail closed https://github.com/llvm/llvm-project/pull/79178 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[compiler-rt] [clang] [libc] [libcxx] [lld] [clang-tools-extra] [llvm] [flang] [ELF] --save-temps --lto-emit-asm: derive ELF/asm file names from bitcode file names (PR #78835)
https://github.com/MaskRay updated
https://github.com/llvm/llvm-project/pull/78835
>From 37b3ff263f2b46bd4541157bee5b5e1bf2639604 Mon Sep 17 00:00:00 2001
From: Fangrui Song
Date: Sat, 20 Jan 2024 00:40:53 -0800
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
=?UTF-8?q?l=20version?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Created using spr 1.3.4
---
lld/ELF/LTO.cpp| 70 ++
lld/ELF/LTO.h | 3 +-
lld/test/ELF/common-archive-lookup.s | 7 ++-
lld/test/ELF/lto/comdat-mixed-archive.test | 4 +-
lld/test/ELF/lto/emit-asm.ll | 13 ++--
lld/test/ELF/lto/exclude-libs-libcall.ll | 2 +-
lld/test/ELF/lto/obj-path.ll | 4 +-
lld/test/ELF/lto/parallel-internalize.ll | 2 +-
lld/test/ELF/lto/parallel.ll | 2 +-
lld/test/ELF/lto/pseudo-probe-lto.ll | 3 +-
lld/test/ELF/lto/save-temps-eq.ll | 10 ++--
lld/test/ELF/lto/thinlto.ll| 48 +++
12 files changed, 97 insertions(+), 71 deletions(-)
diff --git a/lld/ELF/LTO.cpp b/lld/ELF/LTO.cpp
index 504c12aac6c5696..843ee59479eae92 100644
--- a/lld/ELF/LTO.cpp
+++ b/lld/ELF/LTO.cpp
@@ -12,6 +12,7 @@
#include "SymbolTable.h"
#include "Symbols.h"
#include "lld/Common/Args.h"
+#include "lld/Common/CommonLinkerContext.h"
#include "lld/Common/ErrorHandler.h"
#include "lld/Common/Filesystem.h"
#include "lld/Common/Strings.h"
@@ -26,6 +27,7 @@
#include "llvm/Support/Caching.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/Error.h"
+#include "llvm/Support/Path.h"
#include "llvm/Support/FileSystem.h"
#include "llvm/Support/MemoryBuffer.h"
#include
@@ -303,6 +305,7 @@ std::vector BitcodeCompiler::compile() {
unsigned maxTasks = ltoObj->getMaxTasks();
buf.resize(maxTasks);
files.resize(maxTasks);
+ filenames.resize(maxTasks);
// The --thinlto-cache-dir option specifies the path to a directory in which
// to cache native object files for ThinLTO incremental builds. If a path was
@@ -313,13 +316,15 @@ std::vector BitcodeCompiler::compile() {
[&](size_t task, const Twine &moduleName,
std::unique_ptr mb) {
files[task] = std::move(mb);
+ filenames[task] = moduleName.str();
}));
if (!ctx.bitcodeFiles.empty())
checkError(ltoObj->run(
[&](size_t task, const Twine &moduleName) {
+ buf[task].first = moduleName.str();
return std::make_unique(
- std::make_unique(buf[task]));
+ std::make_unique(buf[task].second));
},
cache));
@@ -338,7 +343,7 @@ std::vector BitcodeCompiler::compile() {
if (config->thinLTOIndexOnly) {
if (!config->ltoObjPath.empty())
- saveBuffer(buf[0], config->ltoObjPath);
+ saveBuffer(buf[0].second, config->ltoObjPath);
// ThinLTO with index only option is required to generate only the index
// files. After that, we exit from linker and ThinLTO backend runs in a
@@ -352,32 +357,49 @@ std::vector BitcodeCompiler::compile() {
pruneCache(config->thinLTOCacheDir, config->thinLTOCachePolicy, files);
if (!config->ltoObjPath.empty()) {
-saveBuffer(buf[0], config->ltoObjPath);
+saveBuffer(buf[0].second, config->ltoObjPath);
for (unsigned i = 1; i != maxTasks; ++i)
- saveBuffer(buf[i], config->ltoObjPath + Twine(i));
- }
-
- if (config->saveTempsArgs.contains("prelink")) {
-if (!buf[0].empty())
- saveBuffer(buf[0], config->outputFile + ".lto.o");
-for (unsigned i = 1; i != maxTasks; ++i)
- saveBuffer(buf[i], config->outputFile + Twine(i) + ".lto.o");
- }
-
- if (config->ltoEmitAsm) {
-saveBuffer(buf[0], config->outputFile);
-for (unsigned i = 1; i != maxTasks; ++i)
- saveBuffer(buf[i], config->outputFile + Twine(i));
-return {};
+ saveBuffer(buf[i].second, config->ltoObjPath + Twine(i));
}
+ bool savePrelink = config->saveTempsArgs.contains("prelink");
std::vector ret;
- for (unsigned i = 0; i != maxTasks; ++i)
-if (!buf[i].empty())
- ret.push_back(createObjFile(MemoryBufferRef(buf[i], "lto.tmp")));
+ const char *ext = config->ltoEmitAsm ? ".s" : ".o";
+ for (unsigned i = 0; i != maxTasks; ++i) {
+StringRef bitcodeFilePath;
+StringRef objBuf;
+if (files[i]) {
+ objBuf = files[i]->getBuffer();
+ bitcodeFilePath = filenames[i];
+} else {
+ objBuf = buf[i].second;
+ bitcodeFilePath = buf[i].first;
+}
+if (objBuf.empty())
+ continue;
- for (std::unique_ptr &file : files)
-if (file)
- ret.push_back(createObjFile(*file));
+// If the input bitcode file is path/to/a.o and -o specifies a.out, then
the
+// corresponding lto object file name will look something like:
+//
[compiler-rt] [clang] [libc] [libcxx] [lld] [clang-tools-extra] [llvm] [flang] [ELF] --save-temps --lto-emit-asm: derive ELF/asm file names from bitcode file names (PR #78835)
@@ -352,32 +357,49 @@ std::vector BitcodeCompiler::compile() {
pruneCache(config->thinLTOCacheDir, config->thinLTOCachePolicy, files);
if (!config->ltoObjPath.empty()) {
-saveBuffer(buf[0], config->ltoObjPath);
+saveBuffer(buf[0].second, config->ltoObjPath);
for (unsigned i = 1; i != maxTasks; ++i)
- saveBuffer(buf[i], config->ltoObjPath + Twine(i));
- }
-
- if (config->saveTempsArgs.contains("prelink")) {
-if (!buf[0].empty())
- saveBuffer(buf[0], config->outputFile + ".lto.o");
-for (unsigned i = 1; i != maxTasks; ++i)
- saveBuffer(buf[i], config->outputFile + Twine(i) + ".lto.o");
- }
-
- if (config->ltoEmitAsm) {
-saveBuffer(buf[0], config->outputFile);
-for (unsigned i = 1; i != maxTasks; ++i)
- saveBuffer(buf[i], config->outputFile + Twine(i));
-return {};
+ saveBuffer(buf[i].second, config->ltoObjPath + Twine(i));
}
+ bool savePrelink = config->saveTempsArgs.contains("prelink");
std::vector ret;
- for (unsigned i = 0; i != maxTasks; ++i)
-if (!buf[i].empty())
- ret.push_back(createObjFile(MemoryBufferRef(buf[i], "lto.tmp")));
+ const char *ext = config->ltoEmitAsm ? ".s" : ".o";
+ for (unsigned i = 0; i != maxTasks; ++i) {
+StringRef bitcodeFilePath;
+StringRef objBuf;
+if (files[i]) {
MaskRay wrote:
Clarified the comment a bit
https://github.com/llvm/llvm-project/pull/78835
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[clang] Revert "[clang-repl] Enable native CPU detection by default (#77491)" (PR #79178)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Stefan Gränitz (weliveindetail)
Changes
Reverting because `clang-repl -Xcc -mcpu=arm1176jzf-s` isn't overwriting this
as I had expected. We need to check whether a specific CPU flag was given by
the user first.
Reverts llvm/llvm-project#77491
---
Full diff: https://github.com/llvm/llvm-project/pull/79178.diff
1 Files Affected:
- (modified) clang/lib/Interpreter/Interpreter.cpp (-1)
``diff
diff --git a/clang/lib/Interpreter/Interpreter.cpp
b/clang/lib/Interpreter/Interpreter.cpp
index d1764d07dfd2407..9f97a3c6b0be9e6 100644
--- a/clang/lib/Interpreter/Interpreter.cpp
+++ b/clang/lib/Interpreter/Interpreter.cpp
@@ -148,7 +148,6 @@ IncrementalCompilerBuilder::create(std::vector &ClangArgv) {
// We do C++ by default; append right after argv[0] if no "-x" given
ClangArgv.insert(ClangArgv.end(), "-Xclang");
ClangArgv.insert(ClangArgv.end(), "-fincremental-extensions");
- ClangArgv.insert(ClangArgv.end(), "-mcpu=native");
ClangArgv.insert(ClangArgv.end(), "-c");
// Put a dummy C++ file on to ensure there's at least one compile job for the
``
https://github.com/llvm/llvm-project/pull/79178
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[libcxx] [libc] [clang] [lld] [clang-tools-extra] [flang] [compiler-rt] [llvm] [ELF] --save-temps --lto-emit-asm: derive ELF/asm file names from bitcode file names (PR #78835)
@@ -46,8 +46,9 @@ class BitcodeCompiler {
private:
std::unique_ptr ltoObj;
- std::vector> buf;
+ SmallVector>, 0> buf;
MaskRay wrote:
Added a comment
https://github.com/llvm/llvm-project/pull/78835
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[clang-tools-extra] [clang] [llvm] Add clang-tidy check to suggest replacement of conditional statement with std::min/std::max (PR #77816)
@@ -0,0 +1,151 @@
+//===--- UseStdMinMaxCheck.cpp - clang-tidy
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "UseStdMinMaxCheck.h"
+#include "../utils/ASTUtils.h"
+#include "clang/AST/ASTContext.h"
+#include "clang/ASTMatchers/ASTMatchFinder.h"
+#include "clang/Lex/Preprocessor.h"
+
+using namespace clang::ast_matchers;
+
+namespace clang::tidy::readability {
+
+static const llvm::StringRef AlgorithmHeader("");
+
+static bool MinCondition(const BinaryOperator::Opcode &Op, const Expr *CondLhs,
+ const Expr *CondRhs, const Expr *AssignLhs,
+ const Expr *AssignRhs, const ASTContext &Context) {
+ if ((Op == BO_LT || Op == BO_LE) &&
+ (tidy::utils::areStatementsIdentical(CondLhs, AssignRhs, Context) &&
+ tidy::utils::areStatementsIdentical(CondRhs, AssignLhs, Context)))
+return true;
+
+ if ((Op == BO_GT || Op == BO_GE) &&
+ (tidy::utils::areStatementsIdentical(CondLhs, AssignLhs, Context) &&
+ tidy::utils::areStatementsIdentical(CondRhs, AssignRhs, Context)))
+return true;
+
+ return false;
+}
+
+static bool MaxCondition(const BinaryOperator::Opcode &Op, const Expr *CondLhs,
+ const Expr *CondRhs, const Expr *AssignLhs,
+ const Expr *AssignRhs, const ASTContext &Context) {
+ if ((Op == BO_LT || Op == BO_LE) &&
+ (tidy::utils::areStatementsIdentical(CondLhs, AssignLhs, Context) &&
+ tidy::utils::areStatementsIdentical(CondRhs, AssignRhs, Context)))
+return true;
+
+ if ((Op == BO_GT || Op == BO_GE) &&
+ (tidy::utils::areStatementsIdentical(CondLhs, AssignRhs, Context) &&
+ tidy::utils::areStatementsIdentical(CondRhs, AssignLhs, Context)))
+return true;
+
+ return false;
+}
+
+static std::string
+CreateReplacement(const bool UseMax, const BinaryOperator::Opcode &Op,
+ const Expr *CondLhs, const Expr *CondRhs,
+ const Expr *AssignLhs, const ASTContext &Context,
+ const SourceManager &Source, const LangOptions &LO,
+ const StringRef &FunctionName) {
+ const auto CondLhsStr = Lexer::getSourceText(
+ Source.getExpansionRange(CondLhs->getSourceRange()), Source, LO);
+ const auto CondRhsStr = Lexer::getSourceText(
+ Source.getExpansionRange(CondRhs->getSourceRange()), Source, LO);
+ const auto AssignLhsStr = Lexer::getSourceText(
+ Source.getExpansionRange(AssignLhs->getSourceRange()), Source, LO);
+ return (AssignLhsStr + " = " + FunctionName +
+ ((CondLhs->getType() != CondRhs->getType())
+ ? "<" + AssignLhs->getType().getAsString() + ">("
11happy wrote:
@PiotrZSL Can you please guide me for this as I am not sure how to move
forward. I am not very good at handling these Implicit casts.
https://github.com/llvm/llvm-project/pull/77816
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[compiler-rt] [libc] [clang] [libcxx] [clang-tools-extra] [llvm] [flang] [clang][FatLTO] Avoid UnifiedLTO until it can support WPD/CFI (PR #79061)
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/79061
>From 2e0cd6077a756fa28023d907045e6e53c50ec732 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 22 Jan 2024 21:48:16 +
Subject: [PATCH 1/3] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=
=?UTF-8?q?itial=20version?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Created using spr 1.3.4
---
clang/lib/CodeGen/BackendUtil.cpp | 9 ++--
clang/lib/Driver/ToolChains/Clang.cpp | 4 +-
clang/lib/Frontend/CompilerInvocation.cpp | 14 ---
clang/test/CodeGen/fat-lto-objects.c | 42 +--
clang/test/Driver/fat-lto-objects.c | 12 --
llvm/docs/FatLTO.rst | 4 +-
llvm/include/llvm/Passes/PassBuilder.h| 3 +-
.../llvm/Transforms/IPO/EmbedBitcodePass.h| 16 ++-
llvm/lib/Passes/PassBuilder.cpp | 20 +
llvm/lib/Passes/PassBuilderPipelines.cpp | 37 +---
llvm/lib/Passes/PassRegistry.def | 5 ++-
llvm/lib/Transforms/IPO/EmbedBitcodePass.cpp | 12 +-
llvm/test/CodeGen/X86/fat-lto-section.ll | 2 +-
llvm/test/Transforms/EmbedBitcode/embed.ll| 3 ++
14 files changed, 107 insertions(+), 76 deletions(-)
diff --git a/clang/lib/CodeGen/BackendUtil.cpp
b/clang/lib/CodeGen/BackendUtil.cpp
index a6142d99f3b688d..9369c8828231421 100644
--- a/clang/lib/CodeGen/BackendUtil.cpp
+++ b/clang/lib/CodeGen/BackendUtil.cpp
@@ -1001,8 +1001,9 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
}
if (CodeGenOpts.FatLTO) {
- assert(CodeGenOpts.UnifiedLTO && "FatLTO requires UnifiedLTO");
- MPM.addPass(PB.buildFatLTODefaultPipeline(Level));
+ MPM.addPass(PB.buildFatLTODefaultPipeline(
+ Level, PrepareForThinLTO,
+ PrepareForThinLTO || shouldEmitRegularLTOSummary()));
} else if (PrepareForThinLTO) {
MPM.addPass(PB.buildThinLTOPreLinkDefaultPipeline(Level));
} else if (PrepareForLTO) {
@@ -1046,6 +1047,7 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
MPM.addPass(PrintModulePass(*OS, "", CodeGenOpts.EmitLLVMUseLists,
/*EmitLTOSummary=*/true));
}
+
} else {
// Emit a module summary by default for Regular LTO except for ld64
// targets
@@ -1073,8 +1075,7 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
if (!TheModule->getModuleFlag("EnableSplitLTOUnit"))
TheModule->addModuleFlag(llvm::Module::Error, "EnableSplitLTOUnit",
uint32_t(CodeGenOpts.EnableSplitLTOUnit));
-// FatLTO always means UnifiedLTO
-if (!TheModule->getModuleFlag("UnifiedLTO"))
+if (CodeGenOpts.UnifiedLTO && !TheModule->getModuleFlag("UnifiedLTO"))
TheModule->addModuleFlag(llvm::Module::Error, "UnifiedLTO", uint32_t(1));
}
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp
b/clang/lib/Driver/ToolChains/Clang.cpp
index 2f33943de45c5da..928dca653dabdc1 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -4854,9 +4854,7 @@ void Clang::ConstructJob(Compilation &C, const JobAction
&JA,
bool UnifiedLTO = false;
if (IsUsingLTO) {
UnifiedLTO = Args.hasFlag(options::OPT_funified_lto,
- options::OPT_fno_unified_lto, Triple.isPS()) ||
- Args.hasFlag(options::OPT_ffat_lto_objects,
- options::OPT_fno_fat_lto_objects, false);
+ options::OPT_fno_unified_lto, Triple.isPS());
if (UnifiedLTO)
CmdArgs.push_back("-funified-lto");
}
diff --git a/clang/lib/Frontend/CompilerInvocation.cpp
b/clang/lib/Frontend/CompilerInvocation.cpp
index 7edea7798af1ef0..feb4de2084b830b 100644
--- a/clang/lib/Frontend/CompilerInvocation.cpp
+++ b/clang/lib/Frontend/CompilerInvocation.cpp
@@ -1861,20 +1861,6 @@ bool CompilerInvocation::ParseCodeGenArgs(CodeGenOptions
&Opts, ArgList &Args,
if (Args.hasArg(OPT_funified_lto))
Opts.PrepareForThinLTO = true;
}
- if (Arg *A = Args.getLastArg(options::OPT_ffat_lto_objects,
- options::OPT_fno_fat_lto_objects)) {
-if (A->getOption().matches(options::OPT_ffat_lto_objects)) {
- if (Arg *Uni = Args.getLastArg(options::OPT_funified_lto,
- options::OPT_fno_unified_lto)) {
-if (Uni->getOption().matches(options::OPT_fno_unified_lto))
- Diags.Report(diag::err_drv_incompatible_options)
- << A->getAsString(Args) << "-fno-unified-lto";
- } else
-Diags.Report(diag::err_drv_argument_only_allowed_with)
-<< A->getAsString(Args) << "-funified-lto";
-}
- }
-
if (Arg *A = Args.getLastArg(OPT_fthinlto_index_EQ)) {
if (IK.getLanguage() != Language::LLVM_IR)
Diags.Report(diag::err_drv_argument_only_allowed_with)
diff --git a/clang/test/Co
[clang] [clang-tools-extra] [llvm] [X86] Use RORX over SHR imm (PR #77964)
https://github.com/Bryce-MW updated
https://github.com/llvm/llvm-project/pull/77964
>From d4c312b9dbf447d0a53dda0e6cdc482bd908430b Mon Sep 17 00:00:00 2001
From: Bryce Wilson
Date: Fri, 12 Jan 2024 16:01:32 -0600
Subject: [PATCH 1/9] [X86] Use RORX over SHR imm
---
llvm/lib/Target/X86/X86InstrShiftRotate.td | 78 ++
llvm/test/CodeGen/X86/atomic-unordered.ll | 3 +-
llvm/test/CodeGen/X86/bmi2.ll | 6 +-
llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll | 3 +-
llvm/test/CodeGen/X86/pr35636.ll | 4 +-
llvm/test/CodeGen/X86/vector-trunc-ssat.ll | 116 ++---
6 files changed, 143 insertions(+), 67 deletions(-)
diff --git a/llvm/lib/Target/X86/X86InstrShiftRotate.td
b/llvm/lib/Target/X86/X86InstrShiftRotate.td
index f951894db1890cd..238e8e9b6e97f30 100644
--- a/llvm/lib/Target/X86/X86InstrShiftRotate.td
+++ b/llvm/lib/Target/X86/X86InstrShiftRotate.td
@@ -879,6 +879,26 @@ let Predicates = [HasBMI2, HasEGPR, In64BitMode] in {
defm SHLX64 : bmi_shift<"shlx{q}", GR64, i64mem, "_EVEX">, T8, PD, REX_W,
EVEX;
}
+
+def immle16_8 : ImmLeaf;
+def immle32_8 : ImmLeaf;
+def immle64_8 : ImmLeaf;
+def immle32_16 : ImmLeaf;
+def immle64_16 : ImmLeaf;
+def immle64_32 : ImmLeaf;
+
let Predicates = [HasBMI2] in {
// Prefer RORX which is non-destructive and doesn't update EFLAGS.
let AddedComplexity = 10 in {
@@ -891,6 +911,64 @@ let Predicates = [HasBMI2] in {
(RORX32ri GR32:$src, (ROT32L2R_imm8 imm:$shamt))>;
def : Pat<(rotl GR64:$src, (i8 imm:$shamt)),
(RORX64ri GR64:$src, (ROT64L2R_imm8 imm:$shamt))>;
+
+// A right shift by less than a smaller register size that is then
+// truncated to that register size can be replaced by RORX to
+// preserve flags with the same execution cost
+
+def : Pat<(i8 (trunc (srl GR16:$src, (i8 immle16_8:$shamt,
+ (EXTRACT_SUBREG (RORX32ri (INSERT_SUBREG (i32 (IMPLICIT_DEF)),
GR16:$src, sub_16bit), imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (sra GR16:$src, (i8 immle16_8:$shamt,
+ (EXTRACT_SUBREG (RORX32ri (INSERT_SUBREG (i32 (IMPLICIT_DEF)),
GR16:$src, sub_16bit), imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (srl GR32:$src, (i8 immle32_8:$shamt,
+ (EXTRACT_SUBREG (RORX32ri GR32:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (sra GR32:$src, (i8 immle32_8:$shamt,
+ (EXTRACT_SUBREG (RORX32ri GR32:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (srl GR64:$src, (i8 immle64_8:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (sra GR64:$src, (i8 immle64_8:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_8bit)>;
+
+
+def : Pat<(i16 (trunc (srl GR32:$src, (i8 immle32_16:$shamt,
+ (EXTRACT_SUBREG (RORX32ri GR32:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (sra GR32:$src, (i8 immle32_16:$shamt,
+ (EXTRACT_SUBREG (RORX32ri GR32:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (srl GR64:$src, (i8 immle64_16:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (sra GR64:$src, (i8 immle64_16:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_16bit)>;
+
+def : Pat<(i32 (trunc (srl GR64:$src, (i8 immle64_32:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_32bit)>;
+def : Pat<(i32 (trunc (sra GR64:$src, (i8 immle64_32:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_32bit)>;
+
+
+// Can't expand the load
+def : Pat<(i8 (trunc (srl (loadi32 addr:$src), (i8 immle32_8:$shamt,
+ (EXTRACT_SUBREG (RORX32mi addr:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (sra (loadi32 addr:$src), (i8 immle32_8:$shamt,
+ (EXTRACT_SUBREG (RORX32mi addr:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (srl (loadi64 addr:$src), (i8 immle64_8:$shamt,
+ (EXTRACT_SUBREG (RORX64mi addr:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (sra (loadi64 addr:$src), (i8 immle64_8:$shamt,
+ (EXTRACT_SUBREG (RORX64mi addr:$src, imm:$shamt), sub_8bit)>;
+
+
+def : Pat<(i16 (trunc (srl (loadi32 addr:$src), (i8 immle32_16:$shamt,
+ (EXTRACT_SUBREG (RORX32mi addr:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (sra (loadi32 addr:$src), (i8 immle32_16:$shamt,
+ (EXTRACT_SUBREG (RORX32mi addr:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (srl (loadi64 addr:$src), (i8 immle64_16:$shamt,
+ (EXTRACT_SUBREG (RORX64mi addr:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (sra (loadi64 addr:$src), (i8 immle64_16:$shamt,
+ (EXTRACT_SUBREG (RORX64mi addr:$src, imm:$shamt), sub_16bit)>;
+
+def : Pat<(i32 (trunc (sr
[clang] [clang-tools-extra] [llvm] Add clang-tidy check to suggest replacement of conditional statement with std::min/std::max (PR #77816)
11happy wrote: @felix642, I am not able to reproduce this error on my end. Could you please provide steps to reproduce it? Your guidance is highly appreciated. the piece of code you mentioned seems to be causing no error when put with current tests. thank you https://github.com/llvm/llvm-project/pull/77816 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[compiler-rt] [clang] [clang-tools-extra] [llvm] [flang] [Bazel][Clang Tidy] Include builtin headers with clang-tidy (PR #67626)
https://github.com/jathu updated https://github.com/llvm/llvm-project/pull/67626
>From 20d9ca99fbf11868a5816df217b2aad09e079fb6 Mon Sep 17 00:00:00 2001
From: jathu
Date: Wed, 27 Sep 2023 18:01:19 -0700
Subject: [PATCH] [clang-tidy][bazel] Include builtin headers with clang-tidy
---
.../clang-tools-extra/BUILD.bazel | 21 +++
.../clang-tools-extra/clang-tidy/BUILD.bazel | 1 +
.../clang-tools-extra/defs.bzl| 26 +++
.../llvm-project-overlay/clang/BUILD.bazel| 12 ++---
.../bazel/llvm-project-overlay/clang/defs.bzl | 5
5 files changed, 61 insertions(+), 4 deletions(-)
create mode 100644
utils/bazel/llvm-project-overlay/clang-tools-extra/BUILD.bazel
create mode 100644 utils/bazel/llvm-project-overlay/clang-tools-extra/defs.bzl
create mode 100644 utils/bazel/llvm-project-overlay/clang/defs.bzl
diff --git a/utils/bazel/llvm-project-overlay/clang-tools-extra/BUILD.bazel
b/utils/bazel/llvm-project-overlay/clang-tools-extra/BUILD.bazel
new file mode 100644
index 000..d7559a376698583
--- /dev/null
+++ b/utils/bazel/llvm-project-overlay/clang-tools-extra/BUILD.bazel
@@ -0,0 +1,21 @@
+# This file is licensed under the Apache License v2.0 with LLVM Exceptions.
+# See https://llvm.org/LICENSE.txt for license information.
+# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+load("//:vars.bzl", "LLVM_VERSION_MAJOR")
+load("//clang:defs.bzl", "BUILTIN_HEADERS_GEN_DIR")
+load("defs.bzl", "symlink")
+
+package(
+default_visibility = ["//visibility:public"],
+features = ["layering_check"],
+)
+
+licenses(["notice"])
+
+symlink(
+name = "builtin_headers",
+srcs = ["//clang:builtin_headers_gen"],
+destination = "lib/clang/{0}/include".format(LLVM_VERSION_MAJOR),
+partition = BUILTIN_HEADERS_GEN_DIR,
+)
diff --git
a/utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy/BUILD.bazel
b/utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy/BUILD.bazel
index bbabc5397e98937..257c9e875d0133b 100644
--- a/utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy/BUILD.bazel
+++ b/utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy/BUILD.bazel
@@ -370,6 +370,7 @@ cc_library(
cc_binary(
name = "clang-tidy",
srcs = ["tool/ClangTidyToolMain.cpp"],
+data = ["//clang-tools-extra:builtin_headers"],
stamp = 0,
deps = [":tool"],
)
diff --git a/utils/bazel/llvm-project-overlay/clang-tools-extra/defs.bzl
b/utils/bazel/llvm-project-overlay/clang-tools-extra/defs.bzl
new file mode 100644
index 000..fd992c052b0f055
--- /dev/null
+++ b/utils/bazel/llvm-project-overlay/clang-tools-extra/defs.bzl
@@ -0,0 +1,26 @@
+# This file is licensed under the Apache License v2.0 with LLVM Exceptions.
+# See https://llvm.org/LICENSE.txt for license information.
+# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+load("@bazel_skylib//lib:paths.bzl", "paths")
+
+def _symlink_impl(ctx):
+copied_files = []
+for input_file in ctx.files.srcs:
+(_, _, relative_filename) =
input_file.path.rpartition(ctx.attr.partition)
+output_file =
ctx.actions.declare_file(paths.join(ctx.attr.destination, relative_filename))
+ctx.actions.symlink(
+target_file = input_file,
+output = output_file,
+)
+copied_files.append(output_file)
+return DefaultInfo(files = depset(copied_files))
+
+symlink = rule(
+implementation = _symlink_impl,
+attrs = {
+"destination": attr.string(mandatory = True),
+"partition": attr.string(mandatory = True),
+"srcs": attr.label_list(allow_files = True),
+},
+)
diff --git a/utils/bazel/llvm-project-overlay/clang/BUILD.bazel
b/utils/bazel/llvm-project-overlay/clang/BUILD.bazel
index cac8ec120929a37..02f0f6076c6fddd 100644
--- a/utils/bazel/llvm-project-overlay/clang/BUILD.bazel
+++ b/utils/bazel/llvm-project-overlay/clang/BUILD.bazel
@@ -14,6 +14,7 @@ load(
"LLVM_VERSION_MINOR",
"LLVM_VERSION_PATCH",
)
+load("defs.bzl", "BUILTIN_HEADERS_GEN_DIR")
package(
default_visibility = ["//visibility:public"],
@@ -1696,14 +1697,17 @@ builtin_headers = glob(
genrule(
name = "builtin_headers_gen",
srcs = builtin_headers,
-outs = [hdr.replace("lib/Headers/", "staging/include/") for hdr in
builtin_headers],
+outs = [
+header.replace("lib/Headers/", BUILTIN_HEADERS_GEN_DIR)
+for header in builtin_headers
+],
cmd = """
for src in $(SRCS); do
- relsrc=$${src#*"$(WORKSPACE_ROOT)"/clang/lib/Headers}
- target=$(@D)/staging/include/$$relsrc
+ relsrc=$${{src#*"$(WORKSPACE_ROOT)"/clang/lib/Headers}}
+ target=$(@D)/{resource_dir}$$relsrc
mkdir -p $$(dirname $$target)
cp $$src $$target
- done""",
+ done""".format(resource_dir = BUILTIN_HEADERS_GEN_DIR),
output_to_bindir = 1,
toolchains = [
":workspace_root",
diff --g
[clang] Update test intrinsic to support immediates (PR #79174)
https://github.com/AtariDreams updated
https://github.com/llvm/llvm-project/pull/79174
>From 6c2774f100b3637126d4da1dffafe0fcd01f2424 Mon Sep 17 00:00:00 2001
From: Rose <83477269+ataridre...@users.noreply.github.com>
Date: Tue, 23 Jan 2024 12:31:49 -0500
Subject: [PATCH] Update test intrinsic to support immediates
---
clang/lib/CodeGen/CGBuiltin.cpp | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 7ef764b8e1ac80..4c205be47ff429 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -1203,10 +1203,24 @@ static llvm::Value
*EmitX86BitTestIntrinsic(CodeGenFunction &CGF,
AsmOS << "bt";
if (Action)
AsmOS << Action;
- AsmOS << SizeSuffix << " $2, ($1)";
- // Build the constraints. FIXME: We should support immediates when possible.
- std::string Constraints = "={@ccc},r,r,~{cc},~{memory}";
+ // Check if BitPos is a ConstantInt (immediate value)
+ if (llvm::ConstantInt *CI = llvm::dyn_cast(BitPos)) {
+// If it is, use the immediate value in the assembly string
+AsmOS << SizeSuffix << " $" << CI->getZExtValue() << ", ($1)";
+ } else {
+// Otherwise, fall back to the existing behavior
+AsmOS << SizeSuffix << " $2, ($1)";
+ }
+
+ // Build the constraints.
+ std::string Constraints;
+ if (llvm::isa(BitPos)) {
+Constraints = "={@ccc},r,~{cc},~{memory}";
+ } else {
+Constraints = "={@ccc},r,r,~{cc},~{memory}";
+ }
+
std::string_view MachineClobbers = CGF.getTarget().getClobbers();
if (!MachineClobbers.empty()) {
Constraints += ',';
___
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[libcxx] [libc] [clang] [lld] [clang-tools-extra] [flang] [compiler-rt] [llvm] [ELF] --save-temps --lto-emit-asm: derive ELF/asm file names from bitcode file names (PR #78835)
https://github.com/teresajohnson approved this pull request. https://github.com/llvm/llvm-project/pull/78835 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [RISCV][MC] Add experimental support of Zaamo and Zalrsc (PR #78970)
@@ -168,6 +168,18 @@ def FeatureStdExtZa64rs : SubtargetFeature<"za64rs", "HasStdExtZa64rs", "true", def FeatureStdExtZa128rs : SubtargetFeature<"za128rs", "HasStdExtZa128rs", "true", "'Za128rs' (Reservation Set Size of at Most 128 Bytes)">; +def FeatureStdExtZaamo +: SubtargetFeature<"experimental-zaamo", "HasStdExtZaamo", "true", + "'Zaamo' (Atomic Memory Operations)">; +def HasStdExtZaamo : Predicate<"Subtarget->hasStdExtZaamo()">, topperc wrote: This predicate isn't used https://github.com/llvm/llvm-project/pull/78970 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [RISCV][MC] Add experimental support of Zaamo and Zalrsc (PR #78970)
@@ -168,6 +168,18 @@ def FeatureStdExtZa64rs : SubtargetFeature<"za64rs", "HasStdExtZa64rs", "true", def FeatureStdExtZa128rs : SubtargetFeature<"za128rs", "HasStdExtZa128rs", "true", "'Za128rs' (Reservation Set Size of at Most 128 Bytes)">; +def FeatureStdExtZaamo +: SubtargetFeature<"experimental-zaamo", "HasStdExtZaamo", "true", + "'Zaamo' (Atomic Memory Operations)">; +def HasStdExtZaamo : Predicate<"Subtarget->hasStdExtZaamo()">, + AssemblerPredicate<(all_of FeatureStdExtZaamo), topperc wrote: Please reformat this like to have `AssemblerPredicate` start at the same column as `Predicate` like 79076 https://github.com/llvm/llvm-project/pull/78970 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [RISCV][MC] Add experimental support of Zaamo and Zalrsc (PR #78970)
@@ -176,6 +188,18 @@ def HasStdExtZacas : Predicate<"Subtarget->hasStdExtZacas()">, "'Zacas' (Atomic Compare-And-Swap Instructions)">; def NoStdExtZacas : Predicate<"!Subtarget->hasStdExtZacas()">; +def FeatureStdExtZalrsc +: SubtargetFeature<"experimental-zalrsc", "HasStdExtZalrsc", "true", + "'Zalrsc' (Load-Reserved/Store-Conditional)">; +def HasStdExtZalrsc : Predicate<"Subtarget->hasStdExtZalrsc()">, topperc wrote: This isn't used https://github.com/llvm/llvm-project/pull/78970 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang-tools-extra] [clang] [X86] Use RORX over SHR imm (PR #77964)
https://github.com/Bryce-MW updated
https://github.com/llvm/llvm-project/pull/77964
>From d4c312b9dbf447d0a53dda0e6cdc482bd908430b Mon Sep 17 00:00:00 2001
From: Bryce Wilson
Date: Fri, 12 Jan 2024 16:01:32 -0600
Subject: [PATCH 01/10] [X86] Use RORX over SHR imm
---
llvm/lib/Target/X86/X86InstrShiftRotate.td | 78 ++
llvm/test/CodeGen/X86/atomic-unordered.ll | 3 +-
llvm/test/CodeGen/X86/bmi2.ll | 6 +-
llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll | 3 +-
llvm/test/CodeGen/X86/pr35636.ll | 4 +-
llvm/test/CodeGen/X86/vector-trunc-ssat.ll | 116 ++---
6 files changed, 143 insertions(+), 67 deletions(-)
diff --git a/llvm/lib/Target/X86/X86InstrShiftRotate.td
b/llvm/lib/Target/X86/X86InstrShiftRotate.td
index f951894db1890cd..238e8e9b6e97f30 100644
--- a/llvm/lib/Target/X86/X86InstrShiftRotate.td
+++ b/llvm/lib/Target/X86/X86InstrShiftRotate.td
@@ -879,6 +879,26 @@ let Predicates = [HasBMI2, HasEGPR, In64BitMode] in {
defm SHLX64 : bmi_shift<"shlx{q}", GR64, i64mem, "_EVEX">, T8, PD, REX_W,
EVEX;
}
+
+def immle16_8 : ImmLeaf;
+def immle32_8 : ImmLeaf;
+def immle64_8 : ImmLeaf;
+def immle32_16 : ImmLeaf;
+def immle64_16 : ImmLeaf;
+def immle64_32 : ImmLeaf;
+
let Predicates = [HasBMI2] in {
// Prefer RORX which is non-destructive and doesn't update EFLAGS.
let AddedComplexity = 10 in {
@@ -891,6 +911,64 @@ let Predicates = [HasBMI2] in {
(RORX32ri GR32:$src, (ROT32L2R_imm8 imm:$shamt))>;
def : Pat<(rotl GR64:$src, (i8 imm:$shamt)),
(RORX64ri GR64:$src, (ROT64L2R_imm8 imm:$shamt))>;
+
+// A right shift by less than a smaller register size that is then
+// truncated to that register size can be replaced by RORX to
+// preserve flags with the same execution cost
+
+def : Pat<(i8 (trunc (srl GR16:$src, (i8 immle16_8:$shamt,
+ (EXTRACT_SUBREG (RORX32ri (INSERT_SUBREG (i32 (IMPLICIT_DEF)),
GR16:$src, sub_16bit), imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (sra GR16:$src, (i8 immle16_8:$shamt,
+ (EXTRACT_SUBREG (RORX32ri (INSERT_SUBREG (i32 (IMPLICIT_DEF)),
GR16:$src, sub_16bit), imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (srl GR32:$src, (i8 immle32_8:$shamt,
+ (EXTRACT_SUBREG (RORX32ri GR32:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (sra GR32:$src, (i8 immle32_8:$shamt,
+ (EXTRACT_SUBREG (RORX32ri GR32:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (srl GR64:$src, (i8 immle64_8:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (sra GR64:$src, (i8 immle64_8:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_8bit)>;
+
+
+def : Pat<(i16 (trunc (srl GR32:$src, (i8 immle32_16:$shamt,
+ (EXTRACT_SUBREG (RORX32ri GR32:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (sra GR32:$src, (i8 immle32_16:$shamt,
+ (EXTRACT_SUBREG (RORX32ri GR32:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (srl GR64:$src, (i8 immle64_16:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (sra GR64:$src, (i8 immle64_16:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_16bit)>;
+
+def : Pat<(i32 (trunc (srl GR64:$src, (i8 immle64_32:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_32bit)>;
+def : Pat<(i32 (trunc (sra GR64:$src, (i8 immle64_32:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_32bit)>;
+
+
+// Can't expand the load
+def : Pat<(i8 (trunc (srl (loadi32 addr:$src), (i8 immle32_8:$shamt,
+ (EXTRACT_SUBREG (RORX32mi addr:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (sra (loadi32 addr:$src), (i8 immle32_8:$shamt,
+ (EXTRACT_SUBREG (RORX32mi addr:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (srl (loadi64 addr:$src), (i8 immle64_8:$shamt,
+ (EXTRACT_SUBREG (RORX64mi addr:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (sra (loadi64 addr:$src), (i8 immle64_8:$shamt,
+ (EXTRACT_SUBREG (RORX64mi addr:$src, imm:$shamt), sub_8bit)>;
+
+
+def : Pat<(i16 (trunc (srl (loadi32 addr:$src), (i8 immle32_16:$shamt,
+ (EXTRACT_SUBREG (RORX32mi addr:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (sra (loadi32 addr:$src), (i8 immle32_16:$shamt,
+ (EXTRACT_SUBREG (RORX32mi addr:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (srl (loadi64 addr:$src), (i8 immle64_16:$shamt,
+ (EXTRACT_SUBREG (RORX64mi addr:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (sra (loadi64 addr:$src), (i8 immle64_16:$shamt,
+ (EXTRACT_SUBREG (RORX64mi addr:$src, imm:$shamt), sub_16bit)>;
+
+def : Pat<(i32 (trunc (
[libcxx] [libc] [lldb] [openmp] [clang] [mlir] [clang-tools-extra] [flang] [lld] [compiler-rt] [llvm] AMDGPU: Do not generate non-temporal hint when Load_Tr intrinsic did not specify it (PR #79104)
https://github.com/changpeng closed https://github.com/llvm/llvm-project/pull/79104 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [clang] Make sure the same UsingType is searched and inserted (PR #79182)
https://github.com/apolloww created
https://github.com/llvm/llvm-project/pull/79182
When creating a new UsingType, the underlying type may change if it is a
declaration. This creates an inconsistency between the type searched and type
created. Move the update before search so that we always use the same type for
search and creation.
>From a542d63f472d799eb2d041c82cac402cfb8dec1a Mon Sep 17 00:00:00 2001
From: Wei Wang
Date: Tue, 23 Jan 2024 10:01:57 -0800
Subject: [PATCH] [clang] Make sure the same UsingType is searched and inserted
---
clang/lib/AST/ASTContext.cpp | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 5eb7aa3664569dd..d312ef61fb15d4a 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -4672,12 +4672,6 @@ QualType ASTContext::getTypedefType(const
TypedefNameDecl *Decl,
QualType ASTContext::getUsingType(const UsingShadowDecl *Found,
QualType Underlying) const {
llvm::FoldingSetNodeID ID;
- UsingType::Profile(ID, Found, Underlying);
-
- void *InsertPos = nullptr;
- if (UsingType *T = UsingTypes.FindNodeOrInsertPos(ID, InsertPos))
-return QualType(T, 0);
-
const Type *TypeForDecl =
cast(Found->getTargetDecl())->getTypeForDecl();
@@ -4687,6 +4681,13 @@ QualType ASTContext::getUsingType(const UsingShadowDecl
*Found,
if (Underlying.getTypePtr() == TypeForDecl)
Underlying = QualType();
+ UsingType::Profile(ID, Found, Underlying);
+
+ void *InsertPos = nullptr;
+ if (UsingType *T = UsingTypes.FindNodeOrInsertPos(ID, InsertPos)) {
+return QualType(T, 0);
+ }
+
void *Mem =
Allocate(UsingType::totalSizeToAlloc(!Underlying.isNull()),
alignof(UsingType));
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[clang] [clang] Make sure the same UsingType is searched and inserted (PR #79182)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Wei Wang (apolloww)
Changes
When creating a new UsingType, the underlying type may change if it is a
declaration. This creates an inconsistency between the type searched and type
created. Move the update before search so that we always use the same type for
search and creation.
---
Full diff: https://github.com/llvm/llvm-project/pull/79182.diff
1 Files Affected:
- (modified) clang/lib/AST/ASTContext.cpp (+7-6)
``diff
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 5eb7aa3664569dd..d312ef61fb15d4a 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -4672,12 +4672,6 @@ QualType ASTContext::getTypedefType(const
TypedefNameDecl *Decl,
QualType ASTContext::getUsingType(const UsingShadowDecl *Found,
QualType Underlying) const {
llvm::FoldingSetNodeID ID;
- UsingType::Profile(ID, Found, Underlying);
-
- void *InsertPos = nullptr;
- if (UsingType *T = UsingTypes.FindNodeOrInsertPos(ID, InsertPos))
-return QualType(T, 0);
-
const Type *TypeForDecl =
cast(Found->getTargetDecl())->getTypeForDecl();
@@ -4687,6 +4681,13 @@ QualType ASTContext::getUsingType(const UsingShadowDecl
*Found,
if (Underlying.getTypePtr() == TypeForDecl)
Underlying = QualType();
+ UsingType::Profile(ID, Found, Underlying);
+
+ void *InsertPos = nullptr;
+ if (UsingType *T = UsingTypes.FindNodeOrInsertPos(ID, InsertPos)) {
+return QualType(T, 0);
+ }
+
void *Mem =
Allocate(UsingType::totalSizeToAlloc(!Underlying.isNull()),
alignof(UsingType));
``
https://github.com/llvm/llvm-project/pull/79182
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[flang] [libcxx] [libcxxabi] [libc] [llvm] [clang] [compiler-rt] [clang-tools-extra] [lld] [CSSPGO] Compute and report post-match profile staleness (PR #79090)
https://github.com/wlei-llvm updated
https://github.com/llvm/llvm-project/pull/79090
>From 54784e26f33178efd21b0289a1f673d66ea26cc3 Mon Sep 17 00:00:00 2001
From: wlei
Date: Mon, 22 Jan 2024 19:16:26 -0800
Subject: [PATCH] [CSSPGO] Support post-match profile staleness metrics
---
llvm/lib/Transforms/IPO/SampleProfile.cpp | 440 +++---
.../Inputs/profile-mismatch.prof | 7 +-
.../SampleProfile/profile-mismatch.ll | 12 +-
.../pseudo-probe-profile-mismatch-thinlto.ll | 6 +-
.../pseudo-probe-profile-mismatch.ll | 76 +--
5 files changed, 324 insertions(+), 217 deletions(-)
diff --git a/llvm/lib/Transforms/IPO/SampleProfile.cpp
b/llvm/lib/Transforms/IPO/SampleProfile.cpp
index 2fd8668d15e200f..a7170faa65dc07c 100644
--- a/llvm/lib/Transforms/IPO/SampleProfile.cpp
+++ b/llvm/lib/Transforms/IPO/SampleProfile.cpp
@@ -433,12 +433,19 @@ using CandidateQueue =
PriorityQueue,
CandidateComparer>;
+using IRAnchorMap = std::map;
+using ProfileAnchorMap = std::map>;
+
// Sample profile matching - fuzzy match.
class SampleProfileMatcher {
Module &M;
SampleProfileReader &Reader;
const PseudoProbeManager *ProbeManager;
SampleProfileMap FlattenedProfiles;
+
+ std::unordered_map FuncIRAnchors;
+ std::unordered_map FuncProfileAnchors;
+
// For each function, the matcher generates a map, of which each entry is a
// mapping from the source location of current build to the source location
in
// the profile.
@@ -448,6 +455,8 @@ class SampleProfileMatcher {
uint64_t TotalProfiledCallsites = 0;
uint64_t NumMismatchedCallsites = 0;
uint64_t MismatchedCallsiteSamples = 0;
+ uint64_t PostMatchNumMismatchedCallsites = 0;
+ uint64_t PostMatchMismatchedCallsiteSamples = 0;
uint64_t TotalCallsiteSamples = 0;
uint64_t TotalProfiledFunc = 0;
uint64_t NumMismatchedFuncHash = 0;
@@ -474,24 +483,22 @@ class SampleProfileMatcher {
return nullptr;
}
void runOnFunction(const Function &F);
- void findIRAnchors(const Function &F,
- std::map &IRAnchors);
- void findProfileAnchors(
+ void findFuncAnchors();
+ void UpdateIRAnchors();
+ void findIRAnchors(const Function &F, IRAnchorMap &IRAnchors);
+ void findProfileAnchors(const FunctionSamples &FS,
+ ProfileAnchorMap &ProfileAnchors);
+ void countMismatchedHashSamples(const FunctionSamples &FS);
+ void countProfileMismatches(bool IsPreMatch);
+ void countMismatchedHashes(const Function &F, const FunctionSamples &FS);
+ void countMismatchedCallsites(
+ const Function &F,
+ StringMap> &FuncToMismatchCallsites,
+ uint64_t &FuncProfiledCallsites, uint64_t &FuncMismatchedCallsites)
const;
+ void countMismatchedCallsiteSamples(
const FunctionSamples &FS,
- std::map>
- &ProfileAnchors);
- void countMismatchedSamples(const FunctionSamples &FS);
- void countProfileMismatches(
- const Function &F, const FunctionSamples &FS,
- const std::map &IRAnchors,
- const std::map>
- &ProfileAnchors);
- void countProfileCallsiteMismatches(
- const FunctionSamples &FS,
- const std::map &IRAnchors,
- const std::map>
- &ProfileAnchors,
- uint64_t &FuncMismatchedCallsites, uint64_t &FuncProfiledCallsites);
+ StringMap> &FuncToMismatchCallsites,
+ uint64_t &FuncMismatchedCallsiteSamples) const;
LocToLocMap &getIRToProfileLocationMap(const Function &F) {
auto Ret = FuncMappings.try_emplace(
FunctionSamples::getCanonicalFnName(F.getName()), LocToLocMap());
@@ -499,11 +506,10 @@ class SampleProfileMatcher {
}
void distributeIRToProfileLocationMap();
void distributeIRToProfileLocationMap(FunctionSamples &FS);
- void runStaleProfileMatching(
- const Function &F, const std::map &IRAnchors,
- const std::map>
- &ProfileAnchors,
- LocToLocMap &IRToProfileLocationMap);
+ void runStaleProfileMatching();
+ void runStaleProfileMatching(const Function &F, const IRAnchorMap &IRAnchors,
+ const ProfileAnchorMap &ProfileAnchors,
+ LocToLocMap &IRToProfileLocationMap);
};
/// Sample profile pass.
@@ -1129,7 +1135,7 @@ void SampleProfileLoader::findExternalInlineCandidate(
CalleeSample->getContext().hasAttribute(ContextShouldBeInlined);
if (!PreInline && CalleeSample->getHeadSamplesEstimate() < Threshold)
continue;
-
+
Function *Func = SymbolMap.lookup(CalleeSample->getFunction());
// Add to the import list only when it's defined out of module.
if (!Func || Func->isDeclaration())
@@ -2123,8 +2129,8 @@ bool SampleProfileLoader::doInitialization(Module &M,
return true;
}
-void SampleProfileMatcher::findIRAnchors(
-const Function &F, std::map &IRAnchors) {
+void SampleProfileMatcher::findIRAnchors(const Function &F,
+ IRAnchorMap &IRAnchors) {
/
[clang] [test] Avoid libc dep in Update warn-unsafe-buffer-usage-warning-data… (PR #79183)
https://github.com/dklimkin created
https://github.com/llvm/llvm-project/pull/79183
Avoid libc dep in warn-unsafe-buffer-usage-warning-data-invocation.
To keep the test hermetic. This is in line with other existing declarations in
the file that avoid includes.
>From bd284ac0ea8d84b6c7913479063209e21d9180aa Mon Sep 17 00:00:00 2001
From: Danial Klimkin
Date: Tue, 23 Jan 2024 19:07:42 +0100
Subject: [PATCH] [test] Avoid libc dep in Update
warn-unsafe-buffer-usage-warning-data-invocation
To keep the test hermetic. This is in line with other existing declarations in
the file that avoid includes.
---
.../warn-unsafe-buffer-usage-warning-data-invocation.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
a/clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
b/clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
index 574afcd0eb6dce..5c9df12513e521 100644
--- a/clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
+++ b/clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
@@ -7,7 +7,6 @@
// RUN: %clang_cc1 -std=c++20 -fblocks -include %s %s 2>&1 | FileCheck
--allow-empty %s
// CHECK-NOT: [-Wunsafe-buffer-usage]
-#include
#ifndef INCLUDED
#define INCLUDED
#pragma clang system_header
@@ -15,6 +14,8 @@
// no spanification warnings for system headers
#else
+typedef __INTPTR_TYPE__ intptr_t;
+
namespace std {
class type_info;
class bad_cast;
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[llvm] [clang] [clang-tools-extra] [X86] Use RORX over SHR imm (PR #77964)
@@ -4212,6 +4213,96 @@ MachineSDNode *X86DAGToDAGISel::emitPCMPESTR(unsigned
ROpc, unsigned MOpc,
return CNode;
}
+// When the consumer of a right shift (arithmetic or logical) wouldn't notice
+// the difference if the instruction was a rotate right instead (because the
+// bits shifted in are truncated away), the shift can be replaced by the RORX
+// instruction from BMI2. This doesn't set flags and can output to a different
+// register. However, this increases code size in most cases, and doesn't leave
+// the high bits in a useful state. There may be other situations where this
+// transformation is profitable given those conditions, but currently the
+// transformation is only made when it likely avoids spilling flags.
+bool X86DAGToDAGISel::rightShiftUncloberFlags(SDNode *N) {
+ EVT VT = N->getValueType(0);
+
+ // Target has to have BMI2 for RORX
+ if (!Subtarget->hasBMI2())
+return false;
+
+ // Only handle scalar shifts.
+ if (VT.isVector())
+return false;
+
+ unsigned OpSize;
+ if (VT == MVT::i64)
+OpSize = 64;
+ else if (VT == MVT::i32)
+OpSize = 32;
+ else if (VT == MVT::i16)
+OpSize = 16;
+ else if (VT == MVT::i8)
+return false; // i8 shift can't be truncated.
+ else
+llvm_unreachable("Unexpected shift size");
+
+ unsigned TruncateSize = 0;
+ // This only works when the result is truncated.
+ for (const SDNode *User : N->uses()) {
+auto name = User->getOperationName(CurDAG);
+if (User->getMachineOpcode() != TargetOpcode::EXTRACT_SUBREG)
+ return false;
+EVT TuncateType = User->getValueType(0);
+if (TuncateType == MVT::i32)
+ TruncateSize = std::max(TruncateSize, 32U);
+else if (TuncateType == MVT::i16)
+ TruncateSize = std::max(TruncateSize, 16U);
+else if (TuncateType == MVT::i8)
+ TruncateSize = std::max(TruncateSize, 8U);
+else
+ return false;
+ }
+ if (TruncateSize >= OpSize)
+return false;
+
+ // The shift must be by an immediate that wouldn't expose the zero or sign
+ // extended result.
+ auto *ShiftAmount = dyn_cast(N->getOperand(1));
+ if (!ShiftAmount || ShiftAmount->getZExtValue() > OpSize - TruncateSize)
+return false;
+
+ // Only make the replacement when it avoids clobbering used flags. This is a
+ // similar heuristic as used in the conversion to LEA, namely looking at the
+ // operand for an instruction that creates flags where those flags are used.
+ // This will have both false positives and false negatives. Ideally, both of
+ // these happen later on. Perhaps in copy to flags lowering or in register
+ // allocation.
+ bool MightClobberFlags = false;
+ SDNode *Input = N->getOperand(0).getNode();
+ for (auto Use : Input->uses()) {
+if (Use->getOpcode() == ISD::CopyToReg) {
+ auto RegisterNode =
topperc wrote:
`auto *RegisterSDNode` to make it clear it's a pointer.
https://github.com/llvm/llvm-project/pull/77964
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[clang] [test] Avoid libc dep in Update warn-unsafe-buffer-usage-warning-data… (PR #79183)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Danial Klimkin (dklimkin)
Changes
Avoid libc dep in warn-unsafe-buffer-usage-warning-data-invocation.
To keep the test hermetic. This is in line with other existing declarations in
the file that avoid includes.
---
Full diff: https://github.com/llvm/llvm-project/pull/79183.diff
1 Files Affected:
- (modified)
clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp (+2-1)
``diff
diff --git
a/clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
b/clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
index 574afcd0eb6dce3..5c9df12513e521a 100644
--- a/clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
+++ b/clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
@@ -7,7 +7,6 @@
// RUN: %clang_cc1 -std=c++20 -fblocks -include %s %s 2>&1 | FileCheck
--allow-empty %s
// CHECK-NOT: [-Wunsafe-buffer-usage]
-#include
#ifndef INCLUDED
#define INCLUDED
#pragma clang system_header
@@ -15,6 +14,8 @@
// no spanification warnings for system headers
#else
+typedef __INTPTR_TYPE__ intptr_t;
+
namespace std {
class type_info;
class bad_cast;
``
https://github.com/llvm/llvm-project/pull/79183
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[clang] [clang] Make sure the same UsingType is searched and inserted (PR #79182)
apolloww wrote: We saw a huge build speed regression from internal codebase when migrating to clang-17 triggered by this issue. The search for the same `UsingType` always ends up with "not found" and the folding set `UsingTypes` contains lots of duplicated notes. This is a quick fix I come up with. Feel free to propose a better one because I don't work in clang front end often. If it looks good, I'll try to add a test case. https://github.com/llvm/llvm-project/pull/79182 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [RISCV][MC] Add experimental support of Zaamo and Zalrsc (PR #78970)
@@ -1307,6 +1309,13 @@
// CHECK-ZVKT-EXT: __riscv_zvkt 100{{$}}
// Experimental extensions
+// RUN: %clang --target=riscv32 -menable-experimental-extensions \
+// RUN: -march=rv32i_zaamo0p1 -x c -E -dM %s \
topperc wrote:
It's not working. It failed the automated testing
```
clang: error: invalid arch name 'rv32i_zaamo0p1', unsupported version number
0.1 for experimental extension 'zaamo' (this compiler supports 0.2)
```
https://github.com/llvm/llvm-project/pull/78970
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[clang] 5a7d68c - [test] Avoid libc dep in Update warn-unsafe-buffer-usage-warning-data… (#79183)
Author: Danial Klimkin
Date: 2024-01-23T13:14:57-05:00
New Revision: 5a7d68c8c4b13aea9922c860e56f6c6cdc223d87
URL:
https://github.com/llvm/llvm-project/commit/5a7d68c8c4b13aea9922c860e56f6c6cdc223d87
DIFF:
https://github.com/llvm/llvm-project/commit/5a7d68c8c4b13aea9922c860e56f6c6cdc223d87.diff
LOG: [test] Avoid libc dep in Update warn-unsafe-buffer-usage-warning-data…
(#79183)
Avoid libc dep in warn-unsafe-buffer-usage-warning-data-invocation.
To keep the test hermetic. This is in line with other existing
declarations in the file that avoid includes.
Added:
Modified:
clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
Removed:
diff --git
a/clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
b/clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
index 574afcd0eb6dce3..5c9df12513e521a 100644
--- a/clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
+++ b/clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
@@ -7,7 +7,6 @@
// RUN: %clang_cc1 -std=c++20 -fblocks -include %s %s 2>&1 | FileCheck
--allow-empty %s
// CHECK-NOT: [-Wunsafe-buffer-usage]
-#include
#ifndef INCLUDED
#define INCLUDED
#pragma clang system_header
@@ -15,6 +14,8 @@
// no spanification warnings for system headers
#else
+typedef __INTPTR_TYPE__ intptr_t;
+
namespace std {
class type_info;
class bad_cast;
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[clang] [test] Avoid libc dep in Update warn-unsafe-buffer-usage-warning-data… (PR #79183)
https://github.com/durin42 closed https://github.com/llvm/llvm-project/pull/79183 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang-tools-extra] [llvm] [clang] [libc] [libcxx] [compiler-rt] [flang] [clang][FatLTO] Avoid UnifiedLTO until it can support WPD/CFI (PR #79061)
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/79061
>From 2e0cd6077a756fa28023d907045e6e53c50ec732 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 22 Jan 2024 21:48:16 +
Subject: [PATCH 1/4] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=
=?UTF-8?q?itial=20version?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Created using spr 1.3.4
---
clang/lib/CodeGen/BackendUtil.cpp | 9 ++--
clang/lib/Driver/ToolChains/Clang.cpp | 4 +-
clang/lib/Frontend/CompilerInvocation.cpp | 14 ---
clang/test/CodeGen/fat-lto-objects.c | 42 +--
clang/test/Driver/fat-lto-objects.c | 12 --
llvm/docs/FatLTO.rst | 4 +-
llvm/include/llvm/Passes/PassBuilder.h| 3 +-
.../llvm/Transforms/IPO/EmbedBitcodePass.h| 16 ++-
llvm/lib/Passes/PassBuilder.cpp | 20 +
llvm/lib/Passes/PassBuilderPipelines.cpp | 37 +---
llvm/lib/Passes/PassRegistry.def | 5 ++-
llvm/lib/Transforms/IPO/EmbedBitcodePass.cpp | 12 +-
llvm/test/CodeGen/X86/fat-lto-section.ll | 2 +-
llvm/test/Transforms/EmbedBitcode/embed.ll| 3 ++
14 files changed, 107 insertions(+), 76 deletions(-)
diff --git a/clang/lib/CodeGen/BackendUtil.cpp
b/clang/lib/CodeGen/BackendUtil.cpp
index a6142d99f3b688d..9369c8828231421 100644
--- a/clang/lib/CodeGen/BackendUtil.cpp
+++ b/clang/lib/CodeGen/BackendUtil.cpp
@@ -1001,8 +1001,9 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
}
if (CodeGenOpts.FatLTO) {
- assert(CodeGenOpts.UnifiedLTO && "FatLTO requires UnifiedLTO");
- MPM.addPass(PB.buildFatLTODefaultPipeline(Level));
+ MPM.addPass(PB.buildFatLTODefaultPipeline(
+ Level, PrepareForThinLTO,
+ PrepareForThinLTO || shouldEmitRegularLTOSummary()));
} else if (PrepareForThinLTO) {
MPM.addPass(PB.buildThinLTOPreLinkDefaultPipeline(Level));
} else if (PrepareForLTO) {
@@ -1046,6 +1047,7 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
MPM.addPass(PrintModulePass(*OS, "", CodeGenOpts.EmitLLVMUseLists,
/*EmitLTOSummary=*/true));
}
+
} else {
// Emit a module summary by default for Regular LTO except for ld64
// targets
@@ -1073,8 +1075,7 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
if (!TheModule->getModuleFlag("EnableSplitLTOUnit"))
TheModule->addModuleFlag(llvm::Module::Error, "EnableSplitLTOUnit",
uint32_t(CodeGenOpts.EnableSplitLTOUnit));
-// FatLTO always means UnifiedLTO
-if (!TheModule->getModuleFlag("UnifiedLTO"))
+if (CodeGenOpts.UnifiedLTO && !TheModule->getModuleFlag("UnifiedLTO"))
TheModule->addModuleFlag(llvm::Module::Error, "UnifiedLTO", uint32_t(1));
}
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp
b/clang/lib/Driver/ToolChains/Clang.cpp
index 2f33943de45c5da..928dca653dabdc1 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -4854,9 +4854,7 @@ void Clang::ConstructJob(Compilation &C, const JobAction
&JA,
bool UnifiedLTO = false;
if (IsUsingLTO) {
UnifiedLTO = Args.hasFlag(options::OPT_funified_lto,
- options::OPT_fno_unified_lto, Triple.isPS()) ||
- Args.hasFlag(options::OPT_ffat_lto_objects,
- options::OPT_fno_fat_lto_objects, false);
+ options::OPT_fno_unified_lto, Triple.isPS());
if (UnifiedLTO)
CmdArgs.push_back("-funified-lto");
}
diff --git a/clang/lib/Frontend/CompilerInvocation.cpp
b/clang/lib/Frontend/CompilerInvocation.cpp
index 7edea7798af1ef0..feb4de2084b830b 100644
--- a/clang/lib/Frontend/CompilerInvocation.cpp
+++ b/clang/lib/Frontend/CompilerInvocation.cpp
@@ -1861,20 +1861,6 @@ bool CompilerInvocation::ParseCodeGenArgs(CodeGenOptions
&Opts, ArgList &Args,
if (Args.hasArg(OPT_funified_lto))
Opts.PrepareForThinLTO = true;
}
- if (Arg *A = Args.getLastArg(options::OPT_ffat_lto_objects,
- options::OPT_fno_fat_lto_objects)) {
-if (A->getOption().matches(options::OPT_ffat_lto_objects)) {
- if (Arg *Uni = Args.getLastArg(options::OPT_funified_lto,
- options::OPT_fno_unified_lto)) {
-if (Uni->getOption().matches(options::OPT_fno_unified_lto))
- Diags.Report(diag::err_drv_incompatible_options)
- << A->getAsString(Args) << "-fno-unified-lto";
- } else
-Diags.Report(diag::err_drv_argument_only_allowed_with)
-<< A->getAsString(Args) << "-funified-lto";
-}
- }
-
if (Arg *A = Args.getLastArg(OPT_fthinlto_index_EQ)) {
if (IK.getLanguage() != Language::LLVM_IR)
Diags.Report(diag::err_drv_argument_only_allowed_with)
diff --git a/clang/test/Co
[clang-tools-extra] [llvm] [clang] [X86] Use RORX over SHR imm (PR #77964)
https://github.com/Bryce-MW updated
https://github.com/llvm/llvm-project/pull/77964
>From d4c312b9dbf447d0a53dda0e6cdc482bd908430b Mon Sep 17 00:00:00 2001
From: Bryce Wilson
Date: Fri, 12 Jan 2024 16:01:32 -0600
Subject: [PATCH 01/11] [X86] Use RORX over SHR imm
---
llvm/lib/Target/X86/X86InstrShiftRotate.td | 78 ++
llvm/test/CodeGen/X86/atomic-unordered.ll | 3 +-
llvm/test/CodeGen/X86/bmi2.ll | 6 +-
llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll | 3 +-
llvm/test/CodeGen/X86/pr35636.ll | 4 +-
llvm/test/CodeGen/X86/vector-trunc-ssat.ll | 116 ++---
6 files changed, 143 insertions(+), 67 deletions(-)
diff --git a/llvm/lib/Target/X86/X86InstrShiftRotate.td
b/llvm/lib/Target/X86/X86InstrShiftRotate.td
index f951894db1890cd..238e8e9b6e97f30 100644
--- a/llvm/lib/Target/X86/X86InstrShiftRotate.td
+++ b/llvm/lib/Target/X86/X86InstrShiftRotate.td
@@ -879,6 +879,26 @@ let Predicates = [HasBMI2, HasEGPR, In64BitMode] in {
defm SHLX64 : bmi_shift<"shlx{q}", GR64, i64mem, "_EVEX">, T8, PD, REX_W,
EVEX;
}
+
+def immle16_8 : ImmLeaf;
+def immle32_8 : ImmLeaf;
+def immle64_8 : ImmLeaf;
+def immle32_16 : ImmLeaf;
+def immle64_16 : ImmLeaf;
+def immle64_32 : ImmLeaf;
+
let Predicates = [HasBMI2] in {
// Prefer RORX which is non-destructive and doesn't update EFLAGS.
let AddedComplexity = 10 in {
@@ -891,6 +911,64 @@ let Predicates = [HasBMI2] in {
(RORX32ri GR32:$src, (ROT32L2R_imm8 imm:$shamt))>;
def : Pat<(rotl GR64:$src, (i8 imm:$shamt)),
(RORX64ri GR64:$src, (ROT64L2R_imm8 imm:$shamt))>;
+
+// A right shift by less than a smaller register size that is then
+// truncated to that register size can be replaced by RORX to
+// preserve flags with the same execution cost
+
+def : Pat<(i8 (trunc (srl GR16:$src, (i8 immle16_8:$shamt,
+ (EXTRACT_SUBREG (RORX32ri (INSERT_SUBREG (i32 (IMPLICIT_DEF)),
GR16:$src, sub_16bit), imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (sra GR16:$src, (i8 immle16_8:$shamt,
+ (EXTRACT_SUBREG (RORX32ri (INSERT_SUBREG (i32 (IMPLICIT_DEF)),
GR16:$src, sub_16bit), imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (srl GR32:$src, (i8 immle32_8:$shamt,
+ (EXTRACT_SUBREG (RORX32ri GR32:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (sra GR32:$src, (i8 immle32_8:$shamt,
+ (EXTRACT_SUBREG (RORX32ri GR32:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (srl GR64:$src, (i8 immle64_8:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (sra GR64:$src, (i8 immle64_8:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_8bit)>;
+
+
+def : Pat<(i16 (trunc (srl GR32:$src, (i8 immle32_16:$shamt,
+ (EXTRACT_SUBREG (RORX32ri GR32:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (sra GR32:$src, (i8 immle32_16:$shamt,
+ (EXTRACT_SUBREG (RORX32ri GR32:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (srl GR64:$src, (i8 immle64_16:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (sra GR64:$src, (i8 immle64_16:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_16bit)>;
+
+def : Pat<(i32 (trunc (srl GR64:$src, (i8 immle64_32:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_32bit)>;
+def : Pat<(i32 (trunc (sra GR64:$src, (i8 immle64_32:$shamt,
+ (EXTRACT_SUBREG (RORX64ri GR64:$src, imm:$shamt), sub_32bit)>;
+
+
+// Can't expand the load
+def : Pat<(i8 (trunc (srl (loadi32 addr:$src), (i8 immle32_8:$shamt,
+ (EXTRACT_SUBREG (RORX32mi addr:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (sra (loadi32 addr:$src), (i8 immle32_8:$shamt,
+ (EXTRACT_SUBREG (RORX32mi addr:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (srl (loadi64 addr:$src), (i8 immle64_8:$shamt,
+ (EXTRACT_SUBREG (RORX64mi addr:$src, imm:$shamt), sub_8bit)>;
+def : Pat<(i8 (trunc (sra (loadi64 addr:$src), (i8 immle64_8:$shamt,
+ (EXTRACT_SUBREG (RORX64mi addr:$src, imm:$shamt), sub_8bit)>;
+
+
+def : Pat<(i16 (trunc (srl (loadi32 addr:$src), (i8 immle32_16:$shamt,
+ (EXTRACT_SUBREG (RORX32mi addr:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (sra (loadi32 addr:$src), (i8 immle32_16:$shamt,
+ (EXTRACT_SUBREG (RORX32mi addr:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (srl (loadi64 addr:$src), (i8 immle64_16:$shamt,
+ (EXTRACT_SUBREG (RORX64mi addr:$src, imm:$shamt), sub_16bit)>;
+def : Pat<(i16 (trunc (sra (loadi64 addr:$src), (i8 immle64_16:$shamt,
+ (EXTRACT_SUBREG (RORX64mi addr:$src, imm:$shamt), sub_16bit)>;
+
+def : Pat<(i32 (trunc (
[clang] [Modules] [HeaderSearch] Don't reenter headers if it is pragma once (PR #76119)
vsapsai wrote: So far the testing shows there are no regressions. https://github.com/llvm/llvm-project/pull/76119 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[flang] [clang] [flang][driver] Rename `flang-new` as `flang` (PR #74377)
everythingfunctional wrote: Not that it's the end of the world if this doesn't get in before the this release, but @sscalpone , exactly what feedback are we wanting before merging? https://github.com/llvm/llvm-project/pull/74377 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [clang-tools-extra] [llvm] Add STACK_SIZES section for MachOS. (PR #77106)
shamithoke wrote: Ping https://github.com/llvm/llvm-project/pull/77106 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang-tools-extra] [include-cleaner] Check emptiness instead of occurences (PR #79154)
https://github.com/hokein approved this pull request. https://github.com/llvm/llvm-project/pull/79154 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [RISCV] Add Zicfiss support to the shadow call stack implementation. (PR #68075)
@@ -57,11 +57,16 @@ compiled application or the operating system. Integrating the runtime into the operating system should be preferred since otherwise all thread creation and destruction would need to be intercepted by the application. -The instrumentation makes use of the platform register ``x18`` on AArch64 and -``x3`` (``gp``) on RISC-V. For simplicity we will refer to this as the -``SCSReg``. On some platforms, ``SCSReg`` is reserved, and on others, it is -designated as a scratch register. This generally means that any code that may -run on the same thread as code compiled with ShadowCallStack must either target +The instrumentation makes use of the platform register ``x18`` on AArch64, +``x3`` (``gp``) on RISC-V with software shadow stack and ``ssp`` on RISC-V with +hardware shadow stack, which needs `Zicfiss`_ and ``-mno-forced-sw-shadow-stack`` ilovepi wrote: I guess I'm in the minority here in thinking that the compiler should pick based on the HW capabilities. I think I'd be surprised if I was compiling w/ SCS on HW that supported it and got the software SCS... but at the end of the day, as long as we document the usage clearly its probably fine. I acknowledge the concern about falling back to a less secure method, but it still feels like the wrong tradeoff to me. That said, if there's a consensus that the other way makes more sense(which there seems to be), then I'm 100% fine with that. Related: what are our thoughts about a frontend warning/diagnostic when the mcpu supports the feature, but hasn't been selected? https://github.com/llvm/llvm-project/pull/68075 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang-tools-extra] Add support for renaming objc methods, even those with multiple selector pieces (PR #76466)
https://github.com/DavidGoldman updated
https://github.com/llvm/llvm-project/pull/76466
>From 4caf5b3c779bf18236b4b0be5bc7147d10339f2b Mon Sep 17 00:00:00 2001
From: David Goldman
Date: Tue, 26 Dec 2023 15:59:01 -0500
Subject: [PATCH 1/4] [clangd][SymbolCollector] Treat ObjC methods as spelled
We'll treat multi-arg methods as spelled once we have full rename
support for them.
---
.../clangd/index/SymbolCollector.cpp | 6 ++-
.../clangd/unittests/SymbolCollectorTests.cpp | 42 +++
2 files changed, 47 insertions(+), 1 deletion(-)
diff --git a/clang-tools-extra/clangd/index/SymbolCollector.cpp
b/clang-tools-extra/clangd/index/SymbolCollector.cpp
index 7ef4b15febad22f..336bc3506bb3608 100644
--- a/clang-tools-extra/clangd/index/SymbolCollector.cpp
+++ b/clang-tools-extra/clangd/index/SymbolCollector.cpp
@@ -174,7 +174,9 @@ bool isSpelled(SourceLocation Loc, const NamedDecl &ND) {
auto Name = ND.getDeclName();
const auto NameKind = Name.getNameKind();
if (NameKind != DeclarationName::Identifier &&
- NameKind != DeclarationName::CXXConstructorName)
+ NameKind != DeclarationName::CXXConstructorName &&
+ NameKind != DeclarationName::ObjCZeroArgSelector &&
+ NameKind != DeclarationName::ObjCOneArgSelector)
return false;
const auto &AST = ND.getASTContext();
const auto &SM = AST.getSourceManager();
@@ -183,6 +185,8 @@ bool isSpelled(SourceLocation Loc, const NamedDecl &ND) {
if (clang::Lexer::getRawToken(Loc, Tok, SM, LO))
return false;
auto StrName = Name.getAsString();
+ if (const auto *MD = dyn_cast(&ND))
+StrName = MD->getSelector().getNameForSlot(0).str();
return clang::Lexer::getSpelling(Tok, SM, LO) == StrName;
}
} // namespace
diff --git a/clang-tools-extra/clangd/unittests/SymbolCollectorTests.cpp
b/clang-tools-extra/clangd/unittests/SymbolCollectorTests.cpp
index 9cdc57ec01f3276..1d4e1c1d75ea230 100644
--- a/clang-tools-extra/clangd/unittests/SymbolCollectorTests.cpp
+++ b/clang-tools-extra/clangd/unittests/SymbolCollectorTests.cpp
@@ -105,6 +105,9 @@ MATCHER(refRange, "") {
MATCHER_P2(OverriddenBy, Subject, Object, "") {
return arg == Relation{Subject.ID, RelationKind::OverriddenBy, Object.ID};
}
+MATCHER(isSpelled, "") {
+ return static_cast(arg.Kind & RefKind::Spelled);
+}
::testing::Matcher &>
haveRanges(const std::vector Ranges) {
return ::testing::UnorderedPointwise(refRange(), Ranges);
@@ -524,6 +527,45 @@ TEST_F(SymbolCollectorTest, templateArgs) {
forCodeCompletion(false);
}
+TEST_F(SymbolCollectorTest, ObjCRefs) {
+ Annotations Header(R"(
+ @interface Person
+ - (void)$talk[[talk]];
+ - (void)$say[[say]]:(id)something;
+ @end
+ @interface Person (Category)
+ - (void)categoryMethod;
+ - (void)multiArg:(id)a method:(id)b;
+ @end
+ )");
+ Annotations Main(R"(
+ @implementation Person
+ - (void)$talk[[talk]] {}
+ - (void)$say[[say]]:(id)something {}
+ @end
+
+ void fff(Person *p) {
+[p $talk[[talk]]];
+[p $say[[say]]:0];
+[p categoryMethod];
+[p multiArg:0 method:0];
+ }
+ )");
+ CollectorOpts.RefFilter = RefKind::All;
+ CollectorOpts.CollectMainFileRefs = true;
+ TestFileName = testPath("test.m");
+ runSymbolCollector(Header.code(), Main.code(),
+ {"-fblocks", "-xobjective-c++", "-Wno-objc-root-class"});
+ EXPECT_THAT(Refs, Contains(Pair(findSymbol(Symbols, "Person::talk").ID,
+ haveRanges(Main.ranges("talk");
+ EXPECT_THAT(Refs, Contains(Pair(findSymbol(Symbols, "Person::say:").ID,
+ haveRanges(Main.ranges("say");
+ EXPECT_THAT(Refs, Contains(Pair(findSymbol(Symbols,
"Person::categoryMethod").ID,
+ ElementsAre(isSpelled();
+ EXPECT_THAT(Refs, Contains(Pair(findSymbol(Symbols,
"Person::multiArg:method:").ID,
+ ElementsAre(Not(isSpelled());
+}
+
TEST_F(SymbolCollectorTest, ObjCSymbols) {
const std::string Header = R"(
@interface Person
>From 1b6a09464ff5c7b1988fcb479d0a4ff876f696e6 Mon Sep 17 00:00:00 2001
From: David Goldman
Date: Tue, 26 Dec 2023 16:12:03 -0500
Subject: [PATCH 2/4] Run clang-format
---
.../clangd/unittests/SymbolCollectorTests.cpp | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/clang-tools-extra/clangd/unittests/SymbolCollectorTests.cpp
b/clang-tools-extra/clangd/unittests/SymbolCollectorTests.cpp
index 1d4e1c1d75ea230..5c20b950e4eac0d 100644
--- a/clang-tools-extra/clangd/unittests/SymbolCollectorTests.cpp
+++ b/clang-tools-extra/clangd/unittests/SymbolCollectorTests.cpp
@@ -560,10 +560,12 @@ TEST_F(SymbolCollectorTest, ObjCRefs) {
haveRanges(Main.ranges("talk");
EXPECT_THAT(Refs, Contains(Pair(findSymbol(Symbols, "Person::say:").ID,
haveRanges(Main.ranges("say");
- EXPECT_THAT(Refs, Contains(Pair(find
[clang-tools-extra] Add support for renaming objc methods, even those with multiple selector pieces (PR #76466)
@@ -893,22 +964,36 @@ llvm::Expected buildRenameEdit(llvm::StringRef
AbsFilePath,
return LastOffset;
};
- std::vector> OccurrencesOffsets;
- for (const auto &R : Occurrences) {
-auto StartOffset = Offset(R.start);
-if (!StartOffset)
- return StartOffset.takeError();
-auto EndOffset = Offset(R.end);
-if (!EndOffset)
- return EndOffset.takeError();
-OccurrencesOffsets.push_back({*StartOffset, *EndOffset});
+ struct OccurrenceOffset {
+size_t Start;
+size_t End;
+llvm::StringRef NewName;
+
+OccurrenceOffset(size_t Start, size_t End, llvm::StringRef NewName) :
+ Start(Start), End(End), NewName(NewName) {}
+ };
+
+ std::vector OccurrencesOffsets;
+ for (const auto &SR : Occurrences) {
+for (auto It = SR.Ranges.begin(); It != SR.Ranges.end(); ++It) {
DavidGoldman wrote:
Done
https://github.com/llvm/llvm-project/pull/76466
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[clang] Use unaligned atomic load and stores on x86 (PR #79191)
https://github.com/AtariDreams created
https://github.com/llvm/llvm-project/pull/79191
The backend supports it now, so we can use it.
>From de9497dcfee7c3f49f7729f75bf2714b6059617d Mon Sep 17 00:00:00 2001
From: Rose <83477269+ataridre...@users.noreply.github.com>
Date: Tue, 23 Jan 2024 13:59:05 -0500
Subject: [PATCH] Use unaligned atomic load and stores on x86
The backend supports it now, so we can use it.
---
clang/lib/CodeGen/CGObjC.cpp | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/clang/lib/CodeGen/CGObjC.cpp b/clang/lib/CodeGen/CGObjC.cpp
index 03fc0ec7ff54e1..debfc84f49e484 100644
--- a/clang/lib/CodeGen/CGObjC.cpp
+++ b/clang/lib/CodeGen/CGObjC.cpp
@@ -846,8 +846,9 @@ static void emitStructGetterCall(CodeGenFunction &CGF,
ObjCIvarDecl *ivar,
/// accesses. They don't have to be fast, just faster than a function
/// call and a mutex.
static bool hasUnalignedAtomics(llvm::Triple::ArchType arch) {
- // FIXME: Allow unaligned atomic load/store on x86. (It is not
- // currently supported by the backend.)
+ // x86 is the only one so far that we know support this as of now
+ if (arch == llvm::Triple::x86 || arch == llvm::Triple::x86_64)
+return true;
return false;
}
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[clang] Use unaligned atomic load and stores on x86 (PR #79191)
llvmbot wrote:
@llvm/pr-subscribers-clang-codegen
Author: AtariDreams (AtariDreams)
Changes
The backend supports it now, so we can use it.
---
Full diff: https://github.com/llvm/llvm-project/pull/79191.diff
1 Files Affected:
- (modified) clang/lib/CodeGen/CGObjC.cpp (+3-2)
``diff
diff --git a/clang/lib/CodeGen/CGObjC.cpp b/clang/lib/CodeGen/CGObjC.cpp
index 03fc0ec7ff54e1c..debfc84f49e4848 100644
--- a/clang/lib/CodeGen/CGObjC.cpp
+++ b/clang/lib/CodeGen/CGObjC.cpp
@@ -846,8 +846,9 @@ static void emitStructGetterCall(CodeGenFunction &CGF,
ObjCIvarDecl *ivar,
/// accesses. They don't have to be fast, just faster than a function
/// call and a mutex.
static bool hasUnalignedAtomics(llvm::Triple::ArchType arch) {
- // FIXME: Allow unaligned atomic load/store on x86. (It is not
- // currently supported by the backend.)
+ // x86 is the only one so far that we know support this as of now
+ if (arch == llvm::Triple::x86 || arch == llvm::Triple::x86_64)
+return true;
return false;
}
``
https://github.com/llvm/llvm-project/pull/79191
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[clang] [llvm] Use unaligned atomic load and stores on x86 (PR #79191)
https://github.com/AtariDreams updated
https://github.com/llvm/llvm-project/pull/79191
>From 4716a62d936ee174b6ffd0a4a7f9f7fbc5f2ae0f Mon Sep 17 00:00:00 2001
From: Rose <83477269+ataridre...@users.noreply.github.com>
Date: Tue, 23 Jan 2024 13:59:05 -0500
Subject: [PATCH] Use unaligned atomic load and stores on x86
The backend supports it now, so we can use it.
---
clang/lib/CodeGen/CGObjC.cpp| 5 +++--
llvm/lib/Target/X86/X86ISelLowering.cpp | 1 +
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/clang/lib/CodeGen/CGObjC.cpp b/clang/lib/CodeGen/CGObjC.cpp
index 03fc0ec7ff54e1..debfc84f49e484 100644
--- a/clang/lib/CodeGen/CGObjC.cpp
+++ b/clang/lib/CodeGen/CGObjC.cpp
@@ -846,8 +846,9 @@ static void emitStructGetterCall(CodeGenFunction &CGF,
ObjCIvarDecl *ivar,
/// accesses. They don't have to be fast, just faster than a function
/// call and a mutex.
static bool hasUnalignedAtomics(llvm::Triple::ArchType arch) {
- // FIXME: Allow unaligned atomic load/store on x86. (It is not
- // currently supported by the backend.)
+ // x86 is the only one so far that we know support this as of now
+ if (arch == llvm::Triple::x86 || arch == llvm::Triple::x86_64)
+return true;
return false;
}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index e158312caffdec..9b5128cc136114 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -107,6 +107,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine
&TM,
setSchedulingPreference(Sched::RegPressure);
const X86RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
setStackPointerRegisterToSaveRestore(RegInfo->getStackRegister());
+ setSupportsUnalignedAtomics(true);
// Bypass expensive divides and use cheaper ones.
if (TM.getOptLevel() >= CodeGenOptLevel::Default) {
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[clang] [llvm] Use unaligned atomic load and stores on x86 (PR #79191)
https://github.com/AtariDreams updated
https://github.com/llvm/llvm-project/pull/79191
>From c12e481e0a375d58e0d09df0e0e3b80321c2055d Mon Sep 17 00:00:00 2001
From: Rose <83477269+ataridre...@users.noreply.github.com>
Date: Tue, 23 Jan 2024 13:59:05 -0500
Subject: [PATCH] Use unaligned atomic load and stores on x86
The backend supports it now, so we can use it.
---
clang/lib/CodeGen/CGObjC.cpp| 5 +++--
llvm/lib/Target/X86/X86ISelLowering.cpp | 1 +
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/clang/lib/CodeGen/CGObjC.cpp b/clang/lib/CodeGen/CGObjC.cpp
index 03fc0ec7ff54e1c..debfc84f49e4848 100644
--- a/clang/lib/CodeGen/CGObjC.cpp
+++ b/clang/lib/CodeGen/CGObjC.cpp
@@ -846,8 +846,9 @@ static void emitStructGetterCall(CodeGenFunction &CGF,
ObjCIvarDecl *ivar,
/// accesses. They don't have to be fast, just faster than a function
/// call and a mutex.
static bool hasUnalignedAtomics(llvm::Triple::ArchType arch) {
- // FIXME: Allow unaligned atomic load/store on x86. (It is not
- // currently supported by the backend.)
+ // x86 is the only one so far that we know support this as of now
+ if (arch == llvm::Triple::x86 || arch == llvm::Triple::x86_64)
+return true;
return false;
}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index e158312caffdec7..9b5128cc1361147 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -107,6 +107,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine
&TM,
setSchedulingPreference(Sched::RegPressure);
const X86RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
setStackPointerRegisterToSaveRestore(RegInfo->getStackRegister());
+ setSupportsUnalignedAtomics(true);
// Bypass expensive divides and use cheaper ones.
if (TM.getOptLevel() >= CodeGenOptLevel::Default) {
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[clang] 3c20e25 - [NFC] Size and element numbers are often swapped when calling calloc (#79081)
Author: AtariDreams
Date: 2024-01-23T11:13:55-08:00
New Revision: 3c20e25b0c51c67e35d028ba0d1d5f1dd5e206bb
URL:
https://github.com/llvm/llvm-project/commit/3c20e25b0c51c67e35d028ba0d1d5f1dd5e206bb
DIFF:
https://github.com/llvm/llvm-project/commit/3c20e25b0c51c67e35d028ba0d1d5f1dd5e206bb.diff
LOG: [NFC] Size and element numbers are often swapped when calling calloc
(#79081)
gcc-14 will now throw a warning if size and elements are swapped.
Added:
Modified:
clang/test/Analysis/malloc.mm
clang/test/Analysis/uninit-vals.m
clang/test/CodeGen/alloc-size.c
compiler-rt/lib/profile/InstrProfilingFile.c
compiler-rt/test/tsan/java_finalizer2.cpp
Removed:
diff --git a/clang/test/Analysis/malloc.mm b/clang/test/Analysis/malloc.mm
index 9c0f013c4df88a..94a46d731090b3 100644
--- a/clang/test/Analysis/malloc.mm
+++ b/clang/test/Analysis/malloc.mm
@@ -116,17 +116,17 @@ void testUseAfterFree() {
}
void testNoCopy() {
- char *p = (char *)calloc(sizeof(int), 1);
+ char *p = (char *)calloc(1, sizeof(int));
CustomData *w = [CustomData somethingNoCopy:p]; // no-warning
}
void testFreeWhenDone() {
- char *p = (char *)calloc(sizeof(int), 1);
+ char *p = (char *)calloc(1, sizeof(int));
CustomData *w = [CustomData something:p freeWhenDone:1]; // no-warning
}
void testFreeWhenDonePositive() {
- char *p = (char *)calloc(sizeof(int), 1);
+ char *p = (char *)calloc(1, sizeof(int));
CustomData *w = [CustomData something:p freeWhenDone:0]; //
expected-warning{{leak}}
}
diff --git a/clang/test/Analysis/uninit-vals.m
b/clang/test/Analysis/uninit-vals.m
index 9d18f0ef69b927..a6ec4fb74e128f 100644
--- a/clang/test/Analysis/uninit-vals.m
+++ b/clang/test/Analysis/uninit-vals.m
@@ -158,7 +158,7 @@ Point makePoint(float x, float y) {
}
void PR14765_test(void) {
- Circle *testObj = calloc(sizeof(Circle), 1);
+ Circle *testObj = calloc(1, sizeof(Circle));
clang_analyzer_eval(testObj->size == 0); // expected-warning{{TRUE}}
// expected-note@-1{{TRUE}}
@@ -207,7 +207,7 @@ IntPoint makeIntPoint(int x, int y) {
}
void PR14765_test_int(void) {
- IntCircle *testObj = calloc(sizeof(IntCircle), 1);
+ IntCircle *testObj = calloc(1, sizeof(IntCircle));
clang_analyzer_eval(testObj->size == 0); // expected-warning{{TRUE}}
// expected-note@-1{{TRUE}}
@@ -311,7 +311,7 @@ void testLargeStructsNotCopiedPerField(void) {
}
void testSmallStructInLargerStruct(void) {
- IntCircle2D *testObj = calloc(sizeof(IntCircle2D), 1);
+ IntCircle2D *testObj = calloc(1, sizeof(IntCircle2D));
clang_analyzer_eval(testObj->size == 0); // expected-warning{{TRUE}}
// expected-note@-1{{TRUE}}
diff --git a/clang/test/CodeGen/alloc-size.c b/clang/test/CodeGen/alloc-size.c
index 370f61058c4937..bbac7965521b6e 100644
--- a/clang/test/CodeGen/alloc-size.c
+++ b/clang/test/CodeGen/alloc-size.c
@@ -137,7 +137,7 @@ void test5(void) {
// CHECK: store i32 36
gi = OBJECT_SIZE_BUILTIN(&data->t[1], 3);
- struct Data *const arr = my_calloc(sizeof(*data), 2);
+ struct Data *const arr = my_calloc(2, sizeof(*data));
// CHECK: store i32 96
gi = OBJECT_SIZE_BUILTIN(arr, 0);
// CHECK: store i32 96
@@ -171,7 +171,7 @@ void test6(void) {
// CHECK: store i32 11
gi = OBJECT_SIZE_BUILTIN(data->end, 3);
- struct Data *const arr = my_calloc(sizeof(*arr) + 5, 3);
+ struct Data *const arr = my_calloc(3, sizeof(*arr) + 5);
// AFAICT, GCC treats malloc and calloc identically. So, we should do the
// same.
//
diff --git a/compiler-rt/lib/profile/InstrProfilingFile.c
b/compiler-rt/lib/profile/InstrProfilingFile.c
index e72a2ba86f5466..867ae73f0d3b27 100644
--- a/compiler-rt/lib/profile/InstrProfilingFile.c
+++ b/compiler-rt/lib/profile/InstrProfilingFile.c
@@ -335,10 +335,10 @@ static void initFileWriter(ProfDataWriter *This, FILE
*File) {
COMPILER_RT_VISIBILITY ProfBufferIO *
lprofCreateBufferIOInternal(void *File, uint32_t BufferSz) {
FreeHook = &free;
- DynamicBufferIOBuffer = (uint8_t *)calloc(BufferSz, 1);
+ DynamicBufferIOBuffer = (uint8_t *)calloc(1, BufferSz);
VPBufferSize = BufferSz;
ProfDataWriter *fileWriter =
- (ProfDataWriter *)calloc(sizeof(ProfDataWriter), 1);
+ (ProfDataWriter *)calloc(1, sizeof(ProfDataWriter));
initFileWriter(fileWriter, File);
ProfBufferIO *IO = lprofCreateBufferIO(fileWriter);
IO->OwnFileWriter = 1;
diff --git a/compiler-rt/test/tsan/java_finalizer2.cpp
b/compiler-rt/test/tsan/java_finalizer2.cpp
index 87528900541a84..0d677be2ba1a0b 100644
--- a/compiler-rt/test/tsan/java_finalizer2.cpp
+++ b/compiler-rt/test/tsan/java_finalizer2.cpp
@@ -51,7 +51,7 @@ void *Ballast(void *p) {
}
int main() {
- Heap* heap = (Heap*)calloc(sizeof(Heap), 2) + 1;
+ Heap *heap = (Heap *)calloc(2, sizeof
[clang] [compiler-rt] [NFC] Size and element numbers are often swapped when calling calloc (PR #79081)
https://github.com/fmayer closed https://github.com/llvm/llvm-project/pull/79081 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [RISCV] Add Zicfiss support to the shadow call stack implementation. (PR #68075)
@@ -57,11 +57,16 @@ compiled application or the operating system. Integrating the runtime into the operating system should be preferred since otherwise all thread creation and destruction would need to be intercepted by the application. -The instrumentation makes use of the platform register ``x18`` on AArch64 and -``x3`` (``gp``) on RISC-V. For simplicity we will refer to this as the -``SCSReg``. On some platforms, ``SCSReg`` is reserved, and on others, it is -designated as a scratch register. This generally means that any code that may -run on the same thread as code compiled with ShadowCallStack must either target +The instrumentation makes use of the platform register ``x18`` on AArch64, +``x3`` (``gp``) on RISC-V with software shadow stack and ``ssp`` on RISC-V with +hardware shadow stack, which needs `Zicfiss`_ and ``-mno-forced-sw-shadow-stack`` enh-google wrote: > Related: what are our thoughts about a frontend warning/diagnostic when the > mcpu supports the feature, but hasn't been selected? isn't the problem there that it's unlikely to be a decision that's in the developer's hands? (because the real question is "does the OS support it?", and i think that's the counter-suggestion? "decide based on the whole triple", in effect, since taking Android as an example it's likely to be something like "if android && riscv64 && api level >= where you can assume hardware scs works".) (apologies if this isn't what's really being talked about here --- i came in very late to a long conversation :-) ) https://github.com/llvm/llvm-project/pull/68075 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[libcxxabi] [clang] [openmp] [libc] [clang-tools-extra] [mlir] [flang] [compiler-rt] [libcxx] [llvm] [AArch64] Combine store (trunc X to <3 x i8>) to sequence of ST1.b. (PR #78637)
@@ -281,23 +279,19 @@ entry:
define void @store_trunc_add_from_64bits(ptr %src, ptr %dst) {
; CHECK-LABEL: store_trunc_add_from_64bits:
; CHECK: ; %bb.0: ; %entry
-; CHECK-NEXT:sub sp, sp, #16
-; CHECK-NEXT:.cfi_def_cfa_offset 16
; CHECK-NEXT:ldr s0, [x0]
; CHECK-NEXT:add x9, x0, #4
; CHECK-NEXT: Lloh0:
; CHECK-NEXT:adrp x8, lCPI7_0@PAGE
; CHECK-NEXT: Lloh1:
; CHECK-NEXT:ldr d1, [x8, lCPI7_0@PAGEOFF]
+; CHECK-NEXT:add x8, x1, #1
; CHECK-NEXT:ld1.h { v0 }[2], [x9]
+; CHECK-NEXT:add x9, x1, #2
; CHECK-NEXT:add.4h v0, v0, v1
-; CHECK-NEXT:xtn.8b v1, v0
-; CHECK-NEXT:umov.h w8, v0[2]
-; CHECK-NEXT:str s1, [sp, #12]
-; CHECK-NEXT:ldrh w9, [sp, #12]
efriedma-quic wrote:
Spent a little time looking at why the default code is so horrible; the primary
issue is actually the way the legalizer (GenWidenVectorStores) is trying to
lower the operation into an i16 store followed by an i8 store. It ends up
generating a bitcast from v4i8 to v2i16, and the default handling for that is
completely terrible (it doesn't know how to use a shuffle, so it goes through a
stack temporary).
Maybe worth looking into improving the bitcast situation if you're going to
continue looking at very narrow vector types.
https://github.com/llvm/llvm-project/pull/78637
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[mlir] [flang] [openmp] [libcxxabi] [libcxx] [compiler-rt] [libc] [llvm] [clang] [clang-tools-extra] [AArch64] Combine store (trunc X to <3 x i8>) to sequence of ST1.b. (PR #78637)
@@ -21471,6 +21471,57 @@ bool isHalvingTruncateOfLegalScalableType(EVT SrcVT,
EVT DstVT) {
(SrcVT == MVT::nxv2i64 && DstVT == MVT::nxv2i32);
}
+// Combine store (trunc X to <3 x i8>) to sequence of ST1.b.
+static SDValue combineI8TruncStore(StoreSDNode *ST, SelectionDAG &DAG,
+ const AArch64Subtarget *Subtarget) {
+ SDValue Value = ST->getValue();
+ EVT ValueVT = Value.getValueType();
+
+ if (ST->isVolatile() || !Subtarget->isLittleEndian() ||
+ ST->getOriginalAlign() >= 4 || Value.getOpcode() != ISD::TRUNCATE ||
+ ValueVT != EVT::getVectorVT(*DAG.getContext(), MVT::i8, 3))
+return SDValue();
+
+ assert(ST->getOffset().isUndef() && "undef offset expected");
+ SDLoc DL(ST);
+ auto WideVT = EVT::getVectorVT(
+ *DAG.getContext(),
+ Value->getOperand(0).getValueType().getVectorElementType(), 4);
+ SDValue UndefVector = DAG.getUNDEF(WideVT);
+ SDValue WideTrunc = DAG.getNode(
+ ISD::INSERT_SUBVECTOR, DL, WideVT,
+ {UndefVector, Value->getOperand(0), DAG.getVectorIdxConstant(0, DL)});
+ SDValue Cast = DAG.getNode(
+ ISD::BITCAST, DL, WideVT.getSizeInBits() == 64 ? MVT::v8i8 : MVT::v16i8,
+ WideTrunc);
+
+ unsigned IdxScale = WideVT.getScalarSizeInBits() / 8;
efriedma-quic wrote:
Instead of writing this out, can we just use
TargetLowering::scalarizeVectorStore? I think it does roughly the same thing.
https://github.com/llvm/llvm-project/pull/78637
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[libc] [libcxxabi] [clang-tools-extra] [openmp] [mlir] [clang] [flang] [compiler-rt] [libcxx] [llvm] [AArch64] Combine store (trunc X to <3 x i8>) to sequence of ST1.b. (PR #78637)
@@ -21471,6 +21471,57 @@ bool isHalvingTruncateOfLegalScalableType(EVT SrcVT,
EVT DstVT) {
(SrcVT == MVT::nxv2i64 && DstVT == MVT::nxv2i32);
}
+// Combine store (trunc X to <3 x i8>) to sequence of ST1.b.
+static SDValue combineI8TruncStore(StoreSDNode *ST, SelectionDAG &DAG,
+ const AArch64Subtarget *Subtarget) {
+ SDValue Value = ST->getValue();
+ EVT ValueVT = Value.getValueType();
+
+ if (ST->isVolatile() || !Subtarget->isLittleEndian() ||
+ ST->getOriginalAlign() >= 4 || Value.getOpcode() != ISD::TRUNCATE ||
efriedma-quic wrote:
What is `ST->getOriginalAlign() >= 4` protecting against? Increasing the known
alignment of the pointer doesn't change the generated code, as far as I can
tell.
https://github.com/llvm/llvm-project/pull/78637
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[clang] [llvm] [CMake][PGO] Add option for using an external project to generate profile data (PR #78879)
@@ -15,7 +19,7 @@ if(LLVM_BUILD_INSTRUMENTED) ) tstellar wrote: @petrhosek CLANG_PERF_TRAINING_DEPS was an existing variable that's used here. I think it was meant to be added to cache files, but I added it to CMakeLists.txt file here so that it could be passed on the command line without modifying the cache files. https://github.com/llvm/llvm-project/pull/78879 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[libcxx] [llvm] [openmp] [mlir] [compiler-rt] [clang] [lld] [HEXAGON] Inlining Division (PR #79021)
https://github.com/iajbar approved this pull request. It looks good to me. https://github.com/llvm/llvm-project/pull/79021 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [CMake][PGO] Add option for using an external project to generate profile data (PR #78879)
https://github.com/tstellar updated
https://github.com/llvm/llvm-project/pull/78879
>From 0719f49ecc6dd69ae4698c3e84dbf175a1bf2ed3 Mon Sep 17 00:00:00 2001
From: Tom Stellard
Date: Sun, 21 Jan 2024 00:25:47 +
Subject: [PATCH 1/3] [CMake][PGO] Add libunwind to list of stage1 runtimes
This fixes the build since 8f90e6937a1fac80873bb2dab5f382c82ba1ba4e
which made libcxxabi use llvm's libunwind by default.
---
clang/cmake/caches/PGO.cmake | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/clang/cmake/caches/PGO.cmake b/clang/cmake/caches/PGO.cmake
index e1d0585e453f825..15bc755d110d19a 100644
--- a/clang/cmake/caches/PGO.cmake
+++ b/clang/cmake/caches/PGO.cmake
@@ -2,7 +2,7 @@ set(CMAKE_BUILD_TYPE RELEASE CACHE STRING "")
set(CLANG_ENABLE_BOOTSTRAP ON CACHE BOOL "")
set(LLVM_ENABLE_PROJECTS "clang;lld" CACHE STRING "")
-set(LLVM_ENABLE_RUNTIMES "compiler-rt;libcxx;libcxxabi" CACHE STRING "")
+set(LLVM_ENABLE_RUNTIMES "compiler-rt;libcxx;libcxxabi;libunwind" CACHE STRING
"")
set(LLVM_TARGETS_TO_BUILD Native CACHE STRING "")
set(BOOTSTRAP_LLVM_BUILD_INSTRUMENTED ON CACHE BOOL "")
>From 5c602233ef4e54e850f6c8a17c25968bc706b898 Mon Sep 17 00:00:00 2001
From: Tom Stellard
Date: Sat, 6 Jan 2024 07:46:01 +
Subject: [PATCH 2/3] [CMake][PGO] Add option for using an external project to
generate profile data.
The new CLANG_PGO_TRAINING_DATA_SOURCE_DIR allows users to specify a CMake
project to use for generating the profile data.
For example, to use the llvm-test-suite to generate profile data you
would do:
$ cmake -G Ninja -B build -S llvm -C /clang/cmake/caches/PGO.cmake \
-DBOOTSTRAP_CLANG_PGO_TRAINING_DATA_SOURCE_DIR= \
-DBOOTSTRAP_CLANG_PERF_TRAINING_DEPS=runtimes
---
clang/utils/perf-training/CMakeLists.txt | 13 +++--
clang/utils/perf-training/perf-helper.py | 16 +---
llvm/docs/AdvancedBuilds.rst | 23 +++
3 files changed, 43 insertions(+), 9 deletions(-)
diff --git a/clang/utils/perf-training/CMakeLists.txt
b/clang/utils/perf-training/CMakeLists.txt
index c6d51863fb1b5c2..f9d673b2e92e775 100644
--- a/clang/utils/perf-training/CMakeLists.txt
+++ b/clang/utils/perf-training/CMakeLists.txt
@@ -1,6 +1,10 @@
+include(LLVMExternalProjectUtils)
+
set(CLANG_PGO_TRAINING_DATA "${CMAKE_CURRENT_SOURCE_DIR}" CACHE PATH
"The path to a lit testsuite containing samples for PGO and order file
generation"
)
+set(CLANG_PGO_TRAINING_DATA_SOURCE_DIR OFF CACHE STRING "Path to source
directory containing cmake project with source files to use for generating pgo
data")
+set(CLANG_PERF_TRAINING_DEPS "" CACHE STRING "Extra dependencies needed to
build the PGO training data.")
if(LLVM_BUILD_INSTRUMENTED)
configure_lit_site_cfg(
@@ -15,7 +19,7 @@ if(LLVM_BUILD_INSTRUMENTED)
)
add_custom_target(clear-profraw
-COMMAND "${Python3_EXECUTABLE}" ${CMAKE_CURRENT_SOURCE_DIR}/perf-helper.py
clean ${CMAKE_CURRENT_BINARY_DIR} profraw
+COMMAND "${Python3_EXECUTABLE}" ${CMAKE_CURRENT_SOURCE_DIR}/perf-helper.py
clean ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_BINARY_DIR}/profiles/ profraw
COMMENT "Clearing old profraw data")
if(NOT LLVM_PROFDATA)
@@ -26,9 +30,14 @@ if(LLVM_BUILD_INSTRUMENTED)
message(STATUS "To enable merging PGO data LLVM_PROFDATA has to point to
llvm-profdata")
else()
add_custom_target(generate-profdata
- COMMAND "${Python3_EXECUTABLE}"
${CMAKE_CURRENT_SOURCE_DIR}/perf-helper.py merge ${LLVM_PROFDATA}
${CMAKE_CURRENT_BINARY_DIR}/clang.profdata ${CMAKE_CURRENT_BINARY_DIR}
+ COMMAND "${Python3_EXECUTABLE}"
${CMAKE_CURRENT_SOURCE_DIR}/perf-helper.py merge ${LLVM_PROFDATA}
${CMAKE_CURRENT_BINARY_DIR}/clang.profdata ${CMAKE_CURRENT_BINARY_DIR}
${CMAKE_BINARY_DIR}/profiles/
COMMENT "Merging profdata"
DEPENDS generate-profraw)
+if (CLANG_PGO_TRAINING_DATA_SOURCE_DIR)
+ llvm_ExternalProject_Add(generate-profraw-external
${CLANG_PGO_TRAINING_DATA_SOURCE_DIR}
+ USE_TOOLCHAIN EXLUDE_FROM_ALL NO_INSTALL DEPENDS
generate-profraw)
+ add_dependencies(generate-profdata generate-profraw-external)
+endif()
endif()
endif()
diff --git a/clang/utils/perf-training/perf-helper.py
b/clang/utils/perf-training/perf-helper.py
index 99d6ab6ef08..844aa274f049aaa 100644
--- a/clang/utils/perf-training/perf-helper.py
+++ b/clang/utils/perf-training/perf-helper.py
@@ -30,26 +30,28 @@ def findFilesWithExtension(path, extension):
def clean(args):
-if len(args) != 2:
+if len(args) < 2:
print(
-"Usage: %s clean \n" % __file__
+"Usage: %s clean \n" % __file__
+ "\tRemoves all files with extension from ."
)
return 1
-for filename in findFilesWithExtension(args[0], args[1]):
-os.remove(filename)
+for path in args[1:-1]:
+for filename in findFilesWithExtension(path, args[-1]):
+os.remove(filename)
return 0
def
[llvm] [clang] [RISCV] Add Zicfiss support to the shadow call stack implementation. (PR #68075)
@@ -57,11 +57,16 @@ compiled application or the operating system. Integrating the runtime into the operating system should be preferred since otherwise all thread creation and destruction would need to be intercepted by the application. -The instrumentation makes use of the platform register ``x18`` on AArch64 and -``x3`` (``gp``) on RISC-V. For simplicity we will refer to this as the -``SCSReg``. On some platforms, ``SCSReg`` is reserved, and on others, it is -designated as a scratch register. This generally means that any code that may -run on the same thread as code compiled with ShadowCallStack must either target +The instrumentation makes use of the platform register ``x18`` on AArch64, +``x3`` (``gp``) on RISC-V with software shadow stack and ``ssp`` on RISC-V with +hardware shadow stack, which needs `Zicfiss`_ and ``-mno-forced-sw-shadow-stack`` ilovepi wrote: > isn't the problem there that it's unlikely to be a decision that's in the > developer's hands? (because the real question is "does the OS support it?", > and i think that's the counter-suggestion? "decide based on the whole > triple", in effect, since taking Android as an example it's likely to be > something like "if android && riscv64 && api level >= where you can assume > hardware scs works".) > > (apologies if this isn't what's really being talked about here --- i came in > very late to a long conversation :-) ) No, I think your comment is on point. w.r.t. the diagnostic, my thoughts were that it at least makes sense to point out the need for the developer to double check the flags. Maybe i'm being overly cautious, though. I think using the whole triple is a good approach for platforms like Android and Fuchsia, where we can enable/disable certain features based on the target OS/SDK version. I don' think we can generalize that to other systems, but if *some* systems can automagically do the right thing its better than nothing. https://github.com/llvm/llvm-project/pull/68075 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] f6ced35 - [CMake][Release] Add option for enabling PGO to release cache file. (#78823)
Author: Tom Stellard
Date: 2024-01-23T11:32:37-08:00
New Revision: f6ced3579a8c7fe1ef93e25ecf521629afa928dd
URL:
https://github.com/llvm/llvm-project/commit/f6ced3579a8c7fe1ef93e25ecf521629afa928dd
DIFF:
https://github.com/llvm/llvm-project/commit/f6ced3579a8c7fe1ef93e25ecf521629afa928dd.diff
LOG: [CMake][Release] Add option for enabling PGO to release cache file.
(#78823)
The option is LLVM_RELEASE_ENABLE_PGO and it's turned on by default.
-
Co-authored-by: Petr Hosek
Added:
Modified:
clang/cmake/caches/Release.cmake
llvm/utils/release/test-release.sh
Removed:
diff --git a/clang/cmake/caches/Release.cmake
b/clang/cmake/caches/Release.cmake
index a7b9a8d0e29f88f..1ca9138b9807311 100644
--- a/clang/cmake/caches/Release.cmake
+++ b/clang/cmake/caches/Release.cmake
@@ -4,27 +4,53 @@
# General Options
set(LLVM_RELEASE_ENABLE_LTO THIN CACHE STRING "")
+set(LLVM_RELEASE_ENABLE_PGO ON CACHE BOOL "")
set(CMAKE_BUILD_TYPE RELEASE CACHE STRING "")
# Stage 1 Bootstrap Setup
set(CLANG_ENABLE_BOOTSTRAP ON CACHE BOOL "")
-set(CLANG_BOOTSTRAP_TARGETS
- clang
- check-all
- check-llvm
- check-clang
- test-suite
- stage3
- stage3-clang
- stage3-check-all
- stage3-check-llvm
- stage3-check-clang
- stage3-install
- stage3-test-suite CACHE STRING "")
+if (LLVM_RELEASE_ENABLE_PGO)
+ set(CLANG_BOOTSTRAP_TARGETS
+generate-profdata
+stage2
+stage2-clang
+stage2-distribution
+stage2-install
+stage2-install-distribution
+stage2-install-distribution-toolchain
+stage2-check-all
+stage2-check-llvm
+stage2-check-clang
+stage2-test-suite CACHE STRING "")
+else()
+ set(CLANG_BOOTSTRAP_TARGETS
+clang
+check-all
+check-llvm
+check-clang
+test-suite
+stage3
+stage3-clang
+stage3-check-all
+stage3-check-llvm
+stage3-check-clang
+stage3-install
+stage3-test-suite CACHE STRING "")
+endif()
# Stage 1 Options
-set(LLVM_ENABLE_PROJECTS "clang" CACHE STRING "")
+set(STAGE1_PROJECTS "clang")
+set(STAGE1_RUNTIMES "")
+
+if (LLVM_RELEASE_ENABLE_PGO)
+ list(APPEND STAGE1_PROJECTS "lld")
+ list(APPEND STAGE1_RUNTIMES "compiler-rt")
+endif()
+
+set(LLVM_ENABLE_RUNTIMES ${STAGE1_RUNTIMES} CACHE STRING "")
+set(LLVM_ENABLE_PROJECTS ${STAGE1_PROJECTS} CACHE STRING "")
+
set(LLVM_TARGETS_TO_BUILD Native CACHE STRING "")
# Stage 2 Bootstrap Setup
@@ -37,11 +63,26 @@ set(BOOTSTRAP_CLANG_BOOTSTRAP_TARGETS
# Stage 2 Options
set(STAGE2_PROJECTS "clang")
-if (LLVM_RELEASE_ENABLE_LTO)
+set(STAGE2_RUNTIMES "")
+
+if (LLVM_RELEASE_ENABLE_LTO OR LLVM_RELEASE_ENABLE_PGO)
list(APPEND STAGE2_PROJECTS "lld")
endif()
+
+if (LLVM_RELEASE_ENABLE_PGO)
+ set(BOOTSTRAP_LLVM_BUILD_INSTRUMENTED IR CACHE STRING "")
+ list(APPEND STAGE2_RUNTIMES "compiler-rt")
+ set(BOOTSTRAP_LLVM_ENABLE_LTO ${LLVM_RELEASE_ENABLE_LTO})
+ if (LLVM_RELEASE_ENABLE_LTO)
+set(BOOTSTRAP_LLVM_ENABLE_LLD ON CACHE BOOL "")
+ endif()
+endif()
+
set(BOOTSTRAP_LLVM_ENABLE_PROJECTS ${STAGE2_PROJECTS} CACHE STRING "")
-set(BOOTSTRAP_LLVM_TARGETS_TO_BUILD Native CACHE STRING "")
+set(BOOTSTRAP_LLVM_ENABLE_RUNTIMES ${STAGE2_RUNTIMES} CACHE STRING "")
+if (NOT LLVM_RELEASE_ENABLE_PGO)
+ set(BOOTSTRAP_LLVM_TARGETS_TO_BUILD Native CACHE STRING "")
+endif()
# Stage 3 Options
set(BOOTSTRAP_BOOTSTRAP_LLVM_ENABLE_RUNTIMES
"compiler-rt;libcxx;libcxxabi;libunwind" CACHE STRING "")
diff --git a/llvm/utils/release/test-release.sh
b/llvm/utils/release/test-release.sh
index 544d4bfdd799ce8..5b1945df47d24a7 100755
--- a/llvm/utils/release/test-release.sh
+++ b/llvm/utils/release/test-release.sh
@@ -359,11 +359,11 @@ function build_with_cmake_cache() {
$ExtraConfigureFlags
2>&1 | tee $LogDir/llvm.configure-$Flavor.log
- ${MAKE} $J_ARG $Verbose -C $CMakeBuildDir stage3-check-all \
+ ${MAKE} $J_ARG $Verbose -C $CMakeBuildDir stage2-check-all \
2>&1 | tee $LogDir/llvm.make-$Flavor.log > $redir
DESTDIR="${InstallDir}" \
- ${MAKE} -C $CMakeBuildDir stage3-install \
+ ${MAKE} -C $CMakeBuildDir stage2-install \
2>&1 | tee $LogDir/llvm.install-$Flavor.log > $redir
mkdir -p $BuildDir/Release
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [CMake][Release] Add option for enabling PGO to release cache file. (PR #78823)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/78823 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [RISCV] Add Zicfiss support to the shadow call stack implementation. (PR #68075)
@@ -57,11 +57,16 @@ compiled application or the operating system. Integrating the runtime into the operating system should be preferred since otherwise all thread creation and destruction would need to be intercepted by the application. -The instrumentation makes use of the platform register ``x18`` on AArch64 and -``x3`` (``gp``) on RISC-V. For simplicity we will refer to this as the -``SCSReg``. On some platforms, ``SCSReg`` is reserved, and on others, it is -designated as a scratch register. This generally means that any code that may -run on the same thread as code compiled with ShadowCallStack must either target +The instrumentation makes use of the platform register ``x18`` on AArch64, +``x3`` (``gp``) on RISC-V with software shadow stack and ``ssp`` on RISC-V with +hardware shadow stack, which needs `Zicfiss`_ and ``-mno-forced-sw-shadow-stack`` jrtc27 wrote: I think it's really (non-Android) Linux that's the odd one out due to not having a version number in the triple? https://github.com/llvm/llvm-project/pull/68075 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [RISCV] Add Zicfiss support to the shadow call stack implementation. (PR #68075)
@@ -57,11 +57,16 @@ compiled application or the operating system. Integrating the runtime into the operating system should be preferred since otherwise all thread creation and destruction would need to be intercepted by the application. -The instrumentation makes use of the platform register ``x18`` on AArch64 and -``x3`` (``gp``) on RISC-V. For simplicity we will refer to this as the -``SCSReg``. On some platforms, ``SCSReg`` is reserved, and on others, it is -designated as a scratch register. This generally means that any code that may -run on the same thread as code compiled with ShadowCallStack must either target +The instrumentation makes use of the platform register ``x18`` on AArch64, +``x3`` (``gp``) on RISC-V with software shadow stack and ``ssp`` on RISC-V with +hardware shadow stack, which needs `Zicfiss`_ and ``-mno-forced-sw-shadow-stack`` jrtc27 wrote: (Though you still have the related problem that some older LLVM may not know that OS version X supports it, and still default it to off) https://github.com/llvm/llvm-project/pull/68075 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang-tools-extra] [libcxx] [llvm] [openmp] [mlir] [compiler-rt] [flang] [clang] [libc] [lld] [ELF] --save-temps --lto-emit-asm: derive ELF/asm file names from bitcode file names (PR #78835)
https://github.com/MaskRay edited https://github.com/llvm/llvm-project/pull/78835 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [libcxx] [flang] [lld] [clang-tools-extra] [mlir] [openmp] [compiler-rt] [llvm] [libc] [ELF] --save-temps --lto-emit-asm: derive ELF/asm file names from bitcode file names (PR #78835)
https://github.com/MaskRay updated
https://github.com/llvm/llvm-project/pull/78835
>From 37b3ff263f2b46bd4541157bee5b5e1bf2639604 Mon Sep 17 00:00:00 2001
From: Fangrui Song
Date: Sat, 20 Jan 2024 00:40:53 -0800
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
=?UTF-8?q?l=20version?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Created using spr 1.3.4
---
lld/ELF/LTO.cpp| 70 ++
lld/ELF/LTO.h | 3 +-
lld/test/ELF/common-archive-lookup.s | 7 ++-
lld/test/ELF/lto/comdat-mixed-archive.test | 4 +-
lld/test/ELF/lto/emit-asm.ll | 13 ++--
lld/test/ELF/lto/exclude-libs-libcall.ll | 2 +-
lld/test/ELF/lto/obj-path.ll | 4 +-
lld/test/ELF/lto/parallel-internalize.ll | 2 +-
lld/test/ELF/lto/parallel.ll | 2 +-
lld/test/ELF/lto/pseudo-probe-lto.ll | 3 +-
lld/test/ELF/lto/save-temps-eq.ll | 10 ++--
lld/test/ELF/lto/thinlto.ll| 48 +++
12 files changed, 97 insertions(+), 71 deletions(-)
diff --git a/lld/ELF/LTO.cpp b/lld/ELF/LTO.cpp
index 504c12aac6c569..843ee59479eae9 100644
--- a/lld/ELF/LTO.cpp
+++ b/lld/ELF/LTO.cpp
@@ -12,6 +12,7 @@
#include "SymbolTable.h"
#include "Symbols.h"
#include "lld/Common/Args.h"
+#include "lld/Common/CommonLinkerContext.h"
#include "lld/Common/ErrorHandler.h"
#include "lld/Common/Filesystem.h"
#include "lld/Common/Strings.h"
@@ -26,6 +27,7 @@
#include "llvm/Support/Caching.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/Error.h"
+#include "llvm/Support/Path.h"
#include "llvm/Support/FileSystem.h"
#include "llvm/Support/MemoryBuffer.h"
#include
@@ -303,6 +305,7 @@ std::vector BitcodeCompiler::compile() {
unsigned maxTasks = ltoObj->getMaxTasks();
buf.resize(maxTasks);
files.resize(maxTasks);
+ filenames.resize(maxTasks);
// The --thinlto-cache-dir option specifies the path to a directory in which
// to cache native object files for ThinLTO incremental builds. If a path was
@@ -313,13 +316,15 @@ std::vector BitcodeCompiler::compile() {
[&](size_t task, const Twine &moduleName,
std::unique_ptr mb) {
files[task] = std::move(mb);
+ filenames[task] = moduleName.str();
}));
if (!ctx.bitcodeFiles.empty())
checkError(ltoObj->run(
[&](size_t task, const Twine &moduleName) {
+ buf[task].first = moduleName.str();
return std::make_unique(
- std::make_unique(buf[task]));
+ std::make_unique(buf[task].second));
},
cache));
@@ -338,7 +343,7 @@ std::vector BitcodeCompiler::compile() {
if (config->thinLTOIndexOnly) {
if (!config->ltoObjPath.empty())
- saveBuffer(buf[0], config->ltoObjPath);
+ saveBuffer(buf[0].second, config->ltoObjPath);
// ThinLTO with index only option is required to generate only the index
// files. After that, we exit from linker and ThinLTO backend runs in a
@@ -352,32 +357,49 @@ std::vector BitcodeCompiler::compile() {
pruneCache(config->thinLTOCacheDir, config->thinLTOCachePolicy, files);
if (!config->ltoObjPath.empty()) {
-saveBuffer(buf[0], config->ltoObjPath);
+saveBuffer(buf[0].second, config->ltoObjPath);
for (unsigned i = 1; i != maxTasks; ++i)
- saveBuffer(buf[i], config->ltoObjPath + Twine(i));
- }
-
- if (config->saveTempsArgs.contains("prelink")) {
-if (!buf[0].empty())
- saveBuffer(buf[0], config->outputFile + ".lto.o");
-for (unsigned i = 1; i != maxTasks; ++i)
- saveBuffer(buf[i], config->outputFile + Twine(i) + ".lto.o");
- }
-
- if (config->ltoEmitAsm) {
-saveBuffer(buf[0], config->outputFile);
-for (unsigned i = 1; i != maxTasks; ++i)
- saveBuffer(buf[i], config->outputFile + Twine(i));
-return {};
+ saveBuffer(buf[i].second, config->ltoObjPath + Twine(i));
}
+ bool savePrelink = config->saveTempsArgs.contains("prelink");
std::vector ret;
- for (unsigned i = 0; i != maxTasks; ++i)
-if (!buf[i].empty())
- ret.push_back(createObjFile(MemoryBufferRef(buf[i], "lto.tmp")));
+ const char *ext = config->ltoEmitAsm ? ".s" : ".o";
+ for (unsigned i = 0; i != maxTasks; ++i) {
+StringRef bitcodeFilePath;
+StringRef objBuf;
+if (files[i]) {
+ objBuf = files[i]->getBuffer();
+ bitcodeFilePath = filenames[i];
+} else {
+ objBuf = buf[i].second;
+ bitcodeFilePath = buf[i].first;
+}
+if (objBuf.empty())
+ continue;
- for (std::unique_ptr &file : files)
-if (file)
- ret.push_back(createObjFile(*file));
+// If the input bitcode file is path/to/a.o and -o specifies a.out, then
the
+// corresponding lto object file name will look something like:
+// p
[compiler-rt] [openmp] [libc] [libcxx] [flang] [mlir] [llvm] [clang] [clang-tools-extra] [lld] [ELF] --save-temps --lto-emit-asm: derive ELF/asm file names from bitcode file names (PR #78835)
https://github.com/MaskRay closed https://github.com/llvm/llvm-project/pull/78835 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[lldb] [clang-tools-extra] [libcxx] [compiler-rt] [libc] [clang] [lld] [llvm] [flang] [AMDGPU][GFX12] VOP encoding and codegen - add support for v_cvt fp8/… (PR #78414)
Mirko =?utf-8?q?Brkušanin?= , Mirko =?utf-8?q?Brkušanin?= ,Mirko Brkusanin ,Mariusz Sikora Message-ID: In-Reply-To: https://github.com/Sisyph commented: DPP changes look good, and functionally I'm fine with the patch. I don't think the tablegen 'bit IsFP8' version of managing the op_sel bits is any better than adding a fake src1. It doesn't scale up to any more op_sel bits (Hence why we can't use it for V_CVT_SR_BF8_F32_e64_dpp_gfx12) and it is a new abstraction, whereas we have many instances of fake src operands already. Consider it a +1 but not +2 from me as is, based on that. https://github.com/llvm/llvm-project/pull/78414 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [CMake][PGO] Add option for using an external project to generate profile data (PR #78879)
@@ -15,7 +19,7 @@ if(LLVM_BUILD_INSTRUMENTED) ) petrhosek wrote: Looks like I added that in https://reviews.llvm.org/D138974 but I'm not aware of it being used anywhere at the moment. I'd still prefer renaming it to `CLANG_PGO_TRAINING_DEPS` for consistency, especially that we're now adding it to cache. https://github.com/llvm/llvm-project/pull/78879 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Preprocessor][test] Test ARM64EC definitions (PR #78916)
https://github.com/bylaws updated https://github.com/llvm/llvm-project/pull/78916 >From 76e6e6fb01868a73c0c35c1a8a04ac34af2ea088 Mon Sep 17 00:00:00 2001 From: Billy Laws Date: Sun, 21 Jan 2024 22:55:44 + Subject: [PATCH] [Preprocessor][test] Test ARM64EC definitions --- clang/test/Preprocessor/init-aarch64.c | 370 + 1 file changed, 370 insertions(+) diff --git a/clang/test/Preprocessor/init-aarch64.c b/clang/test/Preprocessor/init-aarch64.c index 94c091a69e8444e..f1f1bbbf66945c2 100644 --- a/clang/test/Preprocessor/init-aarch64.c +++ b/clang/test/Preprocessor/init-aarch64.c @@ -728,6 +728,376 @@ // AARCH64-MSVC: #define __WINT_WIDTH__ 16 // AARCH64-MSVC: #define __aarch64__ 1 +// RUN: %clang_cc1 -E -dM -ffreestanding -triple=arm64ec-windows-msvc < /dev/null | FileCheck -match-full-lines -check-prefix ARM64EC-MSVC %s + +// ARM64EC-MSVC: #define _INTEGRAL_MAX_BITS 64 +// ARM64EC-MSVC: #define _M_AMD64 100 +// ARM64EC-MSVC: #define _M_ARM64EC 1 +// ARM64EC-MSVC: #define _M_X64 100 +// ARM64EC-MSVC: #define _WIN32 1 +// ARM64EC-MSVC: #define _WIN64 1 +// ARM64EC-MSVC: #define __AARCH64EL__ 1 +// ARM64EC-MSVC: #define __AARCH64_CMODEL_SMALL__ 1 +// ARM64EC-MSVC: #define __ARM_64BIT_STATE 1 +// ARM64EC-MSVC: #define __ARM_ACLE 200 +// ARM64EC-MSVC: #define __ARM_ALIGN_MAX_STACK_PWR 4 +// ARM64EC-MSVC: #define __ARM_ARCH 8 +// ARM64EC-MSVC: #define __ARM_ARCH_ISA_A64 1 +// ARM64EC-MSVC: #define __ARM_ARCH_PROFILE 'A' +// ARM64EC-MSVC: #define __ARM_FEATURE_CLZ 1 +// ARM64EC-MSVC: #define __ARM_FEATURE_DIRECTED_ROUNDING 1 +// ARM64EC-MSVC: #define __ARM_FEATURE_DIV 1 +// ARM64EC-MSVC: #define __ARM_FEATURE_FMA 1 +// ARM64EC-MSVC: #define __ARM_FEATURE_IDIV 1 +// ARM64EC-MSVC: #define __ARM_FEATURE_LDREX 0xF +// ARM64EC-MSVC: #define __ARM_FEATURE_NUMERIC_MAXMIN 1 +// ARM64EC-MSVC: #define __ARM_FEATURE_UNALIGNED 1 +// ARM64EC-MSVC: #define __ARM_FP 0xE +// ARM64EC-MSVC: #define __ARM_FP16_ARGS 1 +// ARM64EC-MSVC: #define __ARM_FP16_FORMAT_IEEE 1 +// ARM64EC-MSVC: #define __ARM_PCS_AAPCS64 1 +// ARM64EC-MSVC: #define __ARM_SIZEOF_MINIMAL_ENUM 4 +// ARM64EC-MSVC: #define __ARM_SIZEOF_WCHAR_T 4 +// ARM64EC-MSVC: #define __ATOMIC_ACQUIRE 2 +// ARM64EC-MSVC: #define __ATOMIC_ACQ_REL 4 +// ARM64EC-MSVC: #define __ATOMIC_CONSUME 1 +// ARM64EC-MSVC: #define __ATOMIC_RELAXED 0 +// ARM64EC-MSVC: #define __ATOMIC_RELEASE 3 +// ARM64EC-MSVC: #define __ATOMIC_SEQ_CST 5 +// ARM64EC-MSVC: #define __BIGGEST_ALIGNMENT__ 16 +// ARM64EC-MSVC: #define __BITINT_MAXWIDTH__ 128 +// ARM64EC-MSVC: #define __BOOL_WIDTH__ 8 +// ARM64EC-MSVC: #define __BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__ +// ARM64EC-MSVC: #define __CHAR16_TYPE__ unsigned short +// ARM64EC-MSVC: #define __CHAR32_TYPE__ unsigned int +// ARM64EC-MSVC: #define __CHAR_BIT__ 8 +// ARM64EC-MSVC: #define __CLANG_ATOMIC_BOOL_LOCK_FREE 2 +// ARM64EC-MSVC: #define __CLANG_ATOMIC_CHAR16_T_LOCK_FREE 2 +// ARM64EC-MSVC: #define __CLANG_ATOMIC_CHAR32_T_LOCK_FREE 2 +// ARM64EC-MSVC: #define __CLANG_ATOMIC_CHAR_LOCK_FREE 2 +// ARM64EC-MSVC: #define __CLANG_ATOMIC_INT_LOCK_FREE 2 +// ARM64EC-MSVC: #define __CLANG_ATOMIC_LLONG_LOCK_FREE 2 +// ARM64EC-MSVC: #define __CLANG_ATOMIC_LONG_LOCK_FREE 2 +// ARM64EC-MSVC: #define __CLANG_ATOMIC_POINTER_LOCK_FREE 2 +// ARM64EC-MSVC: #define __CLANG_ATOMIC_SHORT_LOCK_FREE 2 +// ARM64EC-MSVC: #define __CLANG_ATOMIC_WCHAR_T_LOCK_FREE 2 +// ARM64EC-MSVC: #define __CONSTANT_CFSTRINGS__ 1 +// ARM64EC-MSVC: #define __DBL_DECIMAL_DIG__ 17 +// ARM64EC-MSVC: #define __DBL_DENORM_MIN__ 4.9406564584124654e-324 +// ARM64EC-MSVC: #define __DBL_DIG__ 15 +// ARM64EC-MSVC: #define __DBL_EPSILON__ 2.2204460492503131e-16 +// ARM64EC-MSVC: #define __DBL_HAS_DENORM__ 1 +// ARM64EC-MSVC: #define __DBL_HAS_INFINITY__ 1 +// ARM64EC-MSVC: #define __DBL_HAS_QUIET_NAN__ 1 +// ARM64EC-MSVC: #define __DBL_MANT_DIG__ 53 +// ARM64EC-MSVC: #define __DBL_MAX_10_EXP__ 308 +// ARM64EC-MSVC: #define __DBL_MAX_EXP__ 1024 +// ARM64EC-MSVC: #define __DBL_MAX__ 1.7976931348623157e+308 +// ARM64EC-MSVC: #define __DBL_MIN_10_EXP__ (-307) +// ARM64EC-MSVC: #define __DBL_MIN_EXP__ (-1021) +// ARM64EC-MSVC: #define __DBL_MIN__ 2.2250738585072014e-308 +// ARM64EC-MSVC: #define __DECIMAL_DIG__ __LDBL_DECIMAL_DIG__ +// ARM64EC-MSVC: #define __FINITE_MATH_ONLY__ 0 +// ARM64EC-MSVC: #define __FLT16_DECIMAL_DIG__ 5 +// ARM64EC-MSVC: #define __FLT16_DENORM_MIN__ 5.9604644775390625e-8F16 +// ARM64EC-MSVC: #define __FLT16_DIG__ 3 +// ARM64EC-MSVC: #define __FLT16_EPSILON__ 9.765625e-4F16 +// ARM64EC-MSVC: #define __FLT16_HAS_DENORM__ 1 +// ARM64EC-MSVC: #define __FLT16_HAS_INFINITY__ 1 +// ARM64EC-MSVC: #define __FLT16_HAS_QUIET_NAN__ 1 +// ARM64EC-MSVC: #define __FLT16_MANT_DIG__ 11 +// ARM64EC-MSVC: #define __FLT16_MAX_10_EXP__ 4 +// ARM64EC-MSVC: #define __FLT16_MAX_EXP__ 16 +// ARM64EC-MSVC: #define __FLT16_MAX__ 6.5504e+4F16 +// ARM64EC-MSVC: #define __FLT16_MIN_10_EXP__ (-4) +// ARM64EC-MSVC: #define __FLT16_MIN_EXP__ (-13) +// ARM64EC-MSVC: #define __FLT16
[clang] [Preprocessor][test] Test ARM64EC definitions (PR #78916)
bylaws wrote: @efriedma-quic should be fixed https://github.com/llvm/llvm-project/pull/78916 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] Use unaligned atomic load and stores on x86 (PR #79191)
https://github.com/AtariDreams updated
https://github.com/llvm/llvm-project/pull/79191
>From 9454e1cc48088508d4df33b7a4de47418de03348 Mon Sep 17 00:00:00 2001
From: Rose <83477269+ataridre...@users.noreply.github.com>
Date: Tue, 23 Jan 2024 13:59:05 -0500
Subject: [PATCH] Use unaligned atomic load and stores on x86
The backend supports it now, so we can use it.
---
clang/lib/CodeGen/CGObjC.cpp| 5 +++--
llvm/lib/Target/X86/X86ISelLowering.cpp | 1 +
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/clang/lib/CodeGen/CGObjC.cpp b/clang/lib/CodeGen/CGObjC.cpp
index 03fc0ec7ff54e1c..debfc84f49e4848 100644
--- a/clang/lib/CodeGen/CGObjC.cpp
+++ b/clang/lib/CodeGen/CGObjC.cpp
@@ -846,8 +846,9 @@ static void emitStructGetterCall(CodeGenFunction &CGF,
ObjCIvarDecl *ivar,
/// accesses. They don't have to be fast, just faster than a function
/// call and a mutex.
static bool hasUnalignedAtomics(llvm::Triple::ArchType arch) {
- // FIXME: Allow unaligned atomic load/store on x86. (It is not
- // currently supported by the backend.)
+ // x86 is the only one so far that we know support this as of now
+ if (arch == llvm::Triple::x86 || arch == llvm::Triple::x86_64)
+return true;
return false;
}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index e158312caffdec7..9b5128cc1361147 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -107,6 +107,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine
&TM,
setSchedulingPreference(Sched::RegPressure);
const X86RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
setStackPointerRegisterToSaveRestore(RegInfo->getStackRegister());
+ setSupportsUnalignedAtomics(true);
// Bypass expensive divides and use cheaper ones.
if (TM.getOptLevel() >= CodeGenOptLevel::Default) {
___
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[llvm] [clang] [clang-tools-extra] Add clang-tidy check to suggest replacement of conditional statement with std::min/std::max (PR #77816)
felix642 wrote: @11happy I was testing with `d5b8dc25598` but this seems to be working properly now. I would assume that this has been fixed in your latest commits https://github.com/llvm/llvm-project/pull/77816 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [RISCV] Add sifive-p670 processor (PR #79015)
@@ -241,7 +241,17 @@ // MCPU-SIFIVE-P450-SAME: "-target-feature" "+zbb" // MCPU-SIFIVE-P450-SAME: "-target-feature" "+zbs" // MCPU-SIFIVE-P450-SAME: "-target-abi" "lp64d" -// + +// RUN: %clang -target riscv64 -### -c %s 2>&1 -mcpu=sifive-p670 | FileCheck -check-prefix=MCPU-SIFIVE-P670 %s michaelmaitland wrote: updated. https://github.com/llvm/llvm-project/pull/79015 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [RISCV] Add sifive-p670 processor (PR #79015)
https://github.com/michaelmaitland updated
https://github.com/llvm/llvm-project/pull/79015
>From 639d404b3b8a8ca7e92160fa8512459be07e631f Mon Sep 17 00:00:00 2001
From: Michael Maitland
Date: Mon, 22 Jan 2024 07:53:55 -0800
Subject: [PATCH 1/5] [RISCV] Add sifive-p670 processor
This is an OOO core that has a vector unit. For more information see
https://www.sifive.com/cores/performance-p650-670.
This CPU prefers to not sink splat operands since it requires a s2V
transfer buffer to move scalars into buffers.
Scheduler model and other tuning will come in separate patches.
---
clang/test/Driver/riscv-cpus.c| 12 +-
clang/test/Misc/target-invalid-cpu-note.c | 4 +-
llvm/lib/Target/RISCV/RISCVFeatures.td| 7 +
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 8 +
llvm/lib/Target/RISCV/RISCVProcessors.td | 37 ++
.../RISCV/rvv/dont-sink-splat-operands.ll | 353 ++
6 files changed, 418 insertions(+), 3 deletions(-)
create mode 100644 llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
diff --git a/clang/test/Driver/riscv-cpus.c b/clang/test/Driver/riscv-cpus.c
index d181755bb585070..666a3e2beabeb1e 100644
--- a/clang/test/Driver/riscv-cpus.c
+++ b/clang/test/Driver/riscv-cpus.c
@@ -241,7 +241,17 @@
// MCPU-SIFIVE-P450-SAME: "-target-feature" "+zbb"
// MCPU-SIFIVE-P450-SAME: "-target-feature" "+zbs"
// MCPU-SIFIVE-P450-SAME: "-target-abi" "lp64d"
-//
+
+// RUN: %clang -target riscv64 -### -c %s 2>&1 -mcpu=sifive-p670 | FileCheck
-check-prefix=MCPU-SIFIVE-P670 %s
+// MCPU-SIFIVE-P670: "-target-cpu" "sifive-p670"
+// MCPU-SIFIVE-P670-SAME: "-target-feature" "+m" "-target-feature" "+a"
"-target-feature" "+f" "-target-feature" "+d"
+// MCPU-SIFIVE-P670-SAME: "-target-feature" "+c" "-target-feature" "+v"
"-target-feature" "+zic64b" "-target-feature" "+zicbom" "-target-feature"
"+zicbop" "-target-feature" "+zicboz" "-target-feature" "+ziccamoa"
"-target-feature" "+ziccif" "-target-feature" "+zicclsm" "-target-feature"
"+ziccrse" "-target-feature" "+zicsr" "-target-feature" "+zifencei"
"-target-feature" "+zihintntl" "-target-feature" "+zihintpause"
"-target-feature" "+zihpm" "-target-feature" "+za64rs" "-target-feature"
"+zfhmin"
+// MCPU-SIFIVE-P670-SAME: "-target-feature" "+zba" "-target-feature" "+zbb"
"-target-feature" "+zbs"
+// MCPU-SIFIVE-P670-SAME: "-target-feature" "+zvbb" "-target-feature" "+zvbc"
+// MCPU-SIFIVE-P670-SAME: "-target-feature" "+zve32f" "-target-feature"
"+zve32x" "-target-feature" "+zve64d" "-target-feature" "+zve64f"
"-target-feature" "+zve64x"
+// MCPU-SIFIVE-P670-SAME: "-target-feature" "+zvkg" "-target-feature" "+zvkn"
"-target-feature" "+zvknc" "-target-feature" "+zvkned" "-target-feature"
"+zvkng" "-target-feature" "+zvknhb" "-target-feature" "+zvks"
"-target-feature" "+zvksc" "-target-feature" "+zvksed" "-target-feature"
"+zvksg" "-target-feature" "+zvksh" "-target-feature" "+zvkt"
+// MCPU-SIFIVE-P670-SAME: "-target-abi" "lp64d"
+
// Check failed cases
// RUN: not %clang --target=riscv32 -### -c %s 2>&1 -mcpu=generic-rv321 |
FileCheck -check-prefix=FAIL-MCPU-NAME %s
diff --git a/clang/test/Misc/target-invalid-cpu-note.c
b/clang/test/Misc/target-invalid-cpu-note.c
index 48e9f05d9b03de2..84aed5c9c36fe47 100644
--- a/clang/test/Misc/target-invalid-cpu-note.c
+++ b/clang/test/Misc/target-invalid-cpu-note.c
@@ -85,7 +85,7 @@
// RUN: not %clang_cc1 -triple riscv64 -target-cpu not-a-cpu -fsyntax-only %s
2>&1 | FileCheck %s --check-prefix RISCV64
// RISCV64: error: unknown target CPU 'not-a-cpu'
-// RISCV64-NEXT: note: valid target CPU values are: generic-rv64, rocket-rv64,
sifive-p450, sifive-s21, sifive-s51, sifive-s54, sifive-s76, sifive-u54,
sifive-u74, sifive-x280, veyron-v1, xiangshan-nanhu{{$}}
+// RISCV64-NEXT: note: valid target CPU values are: generic-rv64, rocket-rv64,
sifive-p450, sifive-p670, sifive-s21, sifive-s51, sifive-s54, sifive-s76,
sifive-u54, sifive-u74, sifive-x280, veyron-v1, xiangshan-nanhu{{$}}
// RUN: not %clang_cc1 -triple riscv32 -tune-cpu not-a-cpu -fsyntax-only %s
2>&1 | FileCheck %s --check-prefix TUNE-RISCV32
// TUNE-RISCV32: error: unknown target CPU 'not-a-cpu'
@@ -93,4 +93,4 @@
// RUN: not %clang_cc1 -triple riscv64 -tune-cpu not-a-cpu -fsyntax-only %s
2>&1 | FileCheck %s --check-prefix TUNE-RISCV64
// TUNE-RISCV64: error: unknown target CPU 'not-a-cpu'
-// TUNE-RISCV64-NEXT: note: valid target CPU values are: generic-rv64,
rocket-rv64, sifive-p450, sifive-s21, sifive-s51, sifive-s54, sifive-s76,
sifive-u54, sifive-u74, sifive-x280, veyron-v1, xiangshan-nanhu, generic,
rocket, sifive-7-series{{$}}
+// TUNE-RISCV64-NEXT: note: valid target CPU values are: generic-rv64,
rocket-rv64, sifive-p450, sifive-p670, sifive-s21, sifive-s51, sifive-s54,
sifive-s76, sifive-u54, sifive-u74, sifive-x280, veyron-v1, xiangshan-nanhu,
generic, rocket, sifive-7-series{{$}}
diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td
b/llvm/lib/Target/RISCV/RISCVFea
[clang] [llvm] Use unaligned atomic load and stores on x86 (PR #79191)
https://github.com/AtariDreams updated
https://github.com/llvm/llvm-project/pull/79191
>From 9d8ca53e5439f838eea7c8d8531cac6c27df2c47 Mon Sep 17 00:00:00 2001
From: Rose <83477269+ataridre...@users.noreply.github.com>
Date: Tue, 23 Jan 2024 13:59:05 -0500
Subject: [PATCH] Use unaligned atomic load and stores on x86
The backend supports it now, so we can use it.
---
clang/lib/CodeGen/CGObjC.cpp | 5 +-
llvm/lib/Target/X86/X86ISelLowering.cpp | 1 +
llvm/test/CodeGen/X86/unaligned-atomic-ops.ll | 92 +++
3 files changed, 96 insertions(+), 2 deletions(-)
create mode 100644 llvm/test/CodeGen/X86/unaligned-atomic-ops.ll
diff --git a/clang/lib/CodeGen/CGObjC.cpp b/clang/lib/CodeGen/CGObjC.cpp
index 03fc0ec7ff54e1c..debfc84f49e4848 100644
--- a/clang/lib/CodeGen/CGObjC.cpp
+++ b/clang/lib/CodeGen/CGObjC.cpp
@@ -846,8 +846,9 @@ static void emitStructGetterCall(CodeGenFunction &CGF,
ObjCIvarDecl *ivar,
/// accesses. They don't have to be fast, just faster than a function
/// call and a mutex.
static bool hasUnalignedAtomics(llvm::Triple::ArchType arch) {
- // FIXME: Allow unaligned atomic load/store on x86. (It is not
- // currently supported by the backend.)
+ // x86 is the only one so far that we know support this as of now
+ if (arch == llvm::Triple::x86 || arch == llvm::Triple::x86_64)
+return true;
return false;
}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index e158312caffdec7..9b5128cc1361147 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -107,6 +107,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine
&TM,
setSchedulingPreference(Sched::RegPressure);
const X86RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
setStackPointerRegisterToSaveRestore(RegInfo->getStackRegister());
+ setSupportsUnalignedAtomics(true);
// Bypass expensive divides and use cheaper ones.
if (TM.getOptLevel() >= CodeGenOptLevel::Default) {
diff --git a/llvm/test/CodeGen/X86/unaligned-atomic-ops.ll
b/llvm/test/CodeGen/X86/unaligned-atomic-ops.ll
new file mode 100644
index 000..9e5173ff2b37e61
--- /dev/null
+++ b/llvm/test/CodeGen/X86/unaligned-atomic-ops.ll
@@ -0,0 +1,92 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 4
+; RUN: llc < %s -mtriple=i386-apple-darwin10.0 -mcpu=core2
-relocation-model=dynamic-no-pic| FileCheck -check-prefix=I386 %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -mcpu=core2
-relocation-model=dynamic-no-pic | FileCheck -check-prefix=CORE2 %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -mcpu=corei7
-relocation-model=dynamic-no-pic | FileCheck -check-prefix=COREI7 %s
+
+; This verifies that the middle end can handle an unaligned atomic load.
+;
+; In the past, an assertion inside the SelectionDAGBuilder would always
+; hit an assertion for unaligned loads and stores.
+
+%AtomicI16 = type { %CellI16, [0 x i8] }
+%CellI16 = type { i16, [0 x i8] }
+
+; CHECK-LABEL: foo
+; CHECK: ret
+define void @foo(%AtomicI16* %self) {
+; I386-LABEL: foo:
+; I386: ## %bb.0: ## %start
+; I386-NEXT:pushl %esi
+; I386-NEXT:.cfi_def_cfa_offset 8
+; I386-NEXT:subl $24, %esp
+; I386-NEXT:.cfi_def_cfa_offset 32
+; I386-NEXT:.cfi_offset %esi, -8
+; I386-NEXT:movl {{[0-9]+}}(%esp), %esi
+; I386-NEXT:leal {{[0-9]+}}(%esp), %eax
+; I386-NEXT:movl %eax, {{[0-9]+}}(%esp)
+; I386-NEXT:movl %esi, {{[0-9]+}}(%esp)
+; I386-NEXT:movl $5, {{[0-9]+}}(%esp)
+; I386-NEXT:movl $2, (%esp)
+; I386-NEXT:calll ___atomic_load
+; I386-NEXT:movw $5, {{[0-9]+}}(%esp)
+; I386-NEXT:leal {{[0-9]+}}(%esp), %eax
+; I386-NEXT:movl %eax, {{[0-9]+}}(%esp)
+; I386-NEXT:movl %esi, {{[0-9]+}}(%esp)
+; I386-NEXT:movl $5, {{[0-9]+}}(%esp)
+; I386-NEXT:movl $2, (%esp)
+; I386-NEXT:calll ___atomic_store
+; I386-NEXT:addl $24, %esp
+; I386-NEXT:popl %esi
+; I386-NEXT:retl
+;
+; CORE2-LABEL: foo:
+; CORE2: ## %bb.0: ## %start
+; CORE2-NEXT:pushq %rbx
+; CORE2-NEXT:.cfi_def_cfa_offset 16
+; CORE2-NEXT:subq $16, %rsp
+; CORE2-NEXT:.cfi_def_cfa_offset 32
+; CORE2-NEXT:.cfi_offset %rbx, -16
+; CORE2-NEXT:movq %rdi, %rbx
+; CORE2-NEXT:leaq {{[0-9]+}}(%rsp), %rdx
+; CORE2-NEXT:movl $2, %edi
+; CORE2-NEXT:movq %rbx, %rsi
+; CORE2-NEXT:movl $5, %ecx
+; CORE2-NEXT:callq ___atomic_load
+; CORE2-NEXT:movw $5, {{[0-9]+}}(%rsp)
+; CORE2-NEXT:leaq {{[0-9]+}}(%rsp), %rdx
+; CORE2-NEXT:movl $2, %edi
+; CORE2-NEXT:movq %rbx, %rsi
+; CORE2-NEXT:movl $5, %ecx
+; CORE2-NEXT:callq ___atomic_store
+; CORE2-NEXT:addq $16, %rsp
+; CORE2-NEXT:popq %rbx
+; CORE2-NEXT:retq
+;
+; COREI7-LABEL: foo:
+; COREI7: ## %bb.0: ## %start
+; COREI7-NEXT:pushq %rbx
+; COREI7-NEXT:.cfi_def_cfa_offset 16
+; COREI7-NEXT:subq $16,
[llvm] [clang] [RISCV] Add sifive-p670 processor (PR #79015)
@@ -1082,6 +1082,13 @@ def TuneShortForwardBranchOpt def HasShortForwardBranchOpt : Predicate<"Subtarget->hasShortForwardBranchOpt()">; def NoShortForwardBranchOpt : Predicate<"!Subtarget->hasShortForwardBranchOpt()">; +// P670 requires a S2V transfer buffer to move scalars into vectors. +// FIXME: Forming .vx/.vf can reduce register pressure. +def TuneDontSinkSplatOperands michaelmaitland wrote: https://github.com/llvm/llvm-project/pull/79199 https://github.com/llvm/llvm-project/pull/79015 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [Clang] Correct __builtin_dynamic_object_size for subobject types (PR #78526)
efriedma-quic wrote: Trying to summarize my understanding here: - Using the type of an alloca in LLVM IR is wrong, for a variety of reasons. (At this point, the type of an alloca is basically just leftover junk from before the opaque pointer transition; I expect that we'll kill it off completely at some point.) - There's some dispute over what it means to compute the size of a subobject "conservatively", in particular what's supposed to happen if we can't identify a subobject. - clang returns significantly worse results than gcc in many cases because we don't encode subobject information into LLVM IR, and there's no IR between clang ASTs and LLVM IR we can use for this sort of analysis. Encoding the information into LLVM IR (metadata on allocas, or something like that) might be feasible, but tricky to design well. Doing dataflow analysis directly on the clang AST is extremely complicated and bug-prone because we don't directly encode control flow. - Both gcc and LLVM compute object sizes after optimization in some cases; it's impossible to completely replicate that behavior because it depends on unrelated optimizations driven by heuristics. But that's not really relevant for the cases we're discussing here. https://github.com/llvm/llvm-project/pull/78526 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Preprocessor][test] Test ARM64EC definitions (PR #78916)
https://github.com/bylaws edited https://github.com/llvm/llvm-project/pull/78916 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[flang] [clang] [flang][driver] Rename `flang-new` as `flang` (PR #74377)
banach-space wrote: > Not that it's the end of the world if this doesn't get in before the this > release, but @sscalpone , exactly what feedback are we wanting before merging? IIUC, this: https://discourse.llvm.org/t/proposal-rename-flang-new-to-flang/69462/55 https://github.com/llvm/llvm-project/pull/74377 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[flang] [clang] [flang][driver] Rename `flang-new` as `flang` (PR #74377)
everythingfunctional wrote: > > Not that it's the end of the world if this doesn't get in before the this > > release, but @sscalpone , exactly what feedback are we wanting before > > merging? > > IIUC, this: > https://discourse.llvm.org/t/proposal-rename-flang-new-to-flang/69462/55 ok, but is there some threshold of percent that pass, or a specific list that we want to be sure pass? My understanding is that we've been running (at least a subset of) the gfortran test suite for a while now. What makes the current results not sufficient? https://github.com/llvm/llvm-project/pull/74377 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [RISCV] Add sifive-p670 processor (PR #79015)
@@ -2000,6 +2000,14 @@ bool RISCVTargetLowering::shouldSinkOperands( if (!I->getType()->isVectorTy() || !Subtarget.hasVInstructions()) return false; + // Don't sink splat operands if the target prefers it. Some targets requires topperc wrote: These should probably be stacked the other way. Adding a new cpu that uses existing extensions with no new scheduler mode is easy to get approved. Adding a new tuning flag potentially requires more discussion. So in my opinion the stack should be -Add new mcpu=sifive-p670 -Add TuneSinkSplatOperand and add to sifive-p670 https://github.com/llvm/llvm-project/pull/79015 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang][AArch64] Define __USER_LABEL_PREFIX__ to # for ARM64EC (PR #78913)
https://github.com/bylaws closed https://github.com/llvm/llvm-project/pull/78913 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
