Mirko =?utf-8?q?Brkušanin?= <mirko.brkusa...@amd.com>, Mirko =?utf-8?q?Brkušanin?= <mirko.brkusa...@amd.com>,Mirko Brkusanin <mirko.brkusa...@amd.com>,Mariusz Sikora <mariusz.sik...@amd.com> Message-ID: In-Reply-To: <llvm.org/llvm/llvm-project/pull/78...@github.com>
https://github.com/Sisyph commented: DPP changes look good, and functionally I'm fine with the patch. I don't think the tablegen 'bit IsFP8' version of managing the op_sel bits is any better than adding a fake src1. It doesn't scale up to any more op_sel bits (Hence why we can't use it for V_CVT_SR_BF8_F32_e64_dpp_gfx12) and it is a new abstraction, whereas we have many instances of fake src operands already. Consider it a +1 but not +2 from me as is, based on that. https://github.com/llvm/llvm-project/pull/78414 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
