date:20231215

[clang] [ClangRepl] Reland Semanic Code Completion (PR #75556)

2023-12-15 Thread Vassil Vassilev via cfe-commits


vgvassilev wrote:

@capfredf, can you include the original commit message in the commit and add a 
line about what was done to resolve the reason we have reverted it earlier?

https://github.com/llvm/llvm-project/pull/75556
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Fix CTAD not respect default template arguments that were added after the definition. (PR #75569)

2023-12-15 Thread Haojian Wu via cfe-commits


https://github.com/hokein created 
https://github.com/llvm/llvm-project/pull/75569

Fixes https://github.com/llvm/llvm-project/issues/69987

>From 0f49d91b4a22944216cff8654f9c00f892bb02be Mon Sep 17 00:00:00 2001
From: Haojian Wu 
Date: Fri, 15 Dec 2023 08:44:57 +0100
Subject: [PATCH] [clang] Fix CTAD not respect default template arguments that
 were added after the definition.

Fixes https://github.com/llvm/llvm-project/issues/69987
---
 clang/docs/ReleaseNotes.rst  |  2 ++
 clang/lib/Sema/SemaTemplate.cpp  | 22 +-
 clang/test/SemaTemplate/ctad.cpp | 10 ++
 3 files changed, 25 insertions(+), 9 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index f5ae6bb8925202..be826e6a44bfc7 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -685,6 +685,8 @@ Bug Fixes in This Version
   (`#62157 `_) and
   (`#64885 `_) and
   (`#65568 `_)
+- Fix an issue where clang doesn't respect detault template arguments that
+  are added in a later redeclaration for CTAD. (#69987 
`_)
 
 Bug Fixes to Compiler Builtins
 ^^
diff --git a/clang/lib/Sema/SemaTemplate.cpp b/clang/lib/Sema/SemaTemplate.cpp
index f10abeaba0d451..450a1a1db0ba86 100644
--- a/clang/lib/Sema/SemaTemplate.cpp
+++ b/clang/lib/Sema/SemaTemplate.cpp
@@ -1824,6 +1824,15 @@ static void SetNestedNameSpecifier(Sema &S, TagDecl *T,
 T->setQualifierInfo(SS.getWithLocInContext(S.Context));
 }
 
+// Returns the template parameter list with all default template argument
+// information.
+static TemplateParameterList *GetTemplateParameterList(TemplateDecl *TD) {
+  // Make sure we get the template parameter list from the most
+  // recent declaration, since that is the only one that is guaranteed to
+  // have all the default template argument information.
+  return cast(TD->getMostRecentDecl())->getTemplateParameters();
+}
+
 DeclResult Sema::CheckClassTemplate(
 Scope *S, unsigned TagSpec, TagUseKind TUK, SourceLocation KWLoc,
 CXXScopeSpec &SS, IdentifierInfo *Name, SourceLocation NameLoc,
@@ -2062,7 +2071,7 @@ DeclResult Sema::CheckClassTemplate(
   CheckTemplateParameterList(
   TemplateParams,
   PrevClassTemplate
-  ? PrevClassTemplate->getMostRecentDecl()->getTemplateParameters()
+  ? GetTemplateParameterList(PrevClassTemplate)
   : nullptr,
   (SS.isSet() && SemanticContext && SemanticContext->isRecord() &&
SemanticContext->isDependentContext())
@@ -2298,7 +2307,7 @@ struct ConvertConstructorToDeductionGuideTransform {
 //-- The template parameters are the template parameters of the class
 //   template followed by the template parameters (including default
 //   template arguments) of the constructor, if any.
-TemplateParameterList *TemplateParams = Template->getTemplateParameters();
+TemplateParameterList *TemplateParams = GetTemplateParameterList(Template);
 if (FTD) {
   TemplateParameterList *InnerParams = FTD->getTemplateParameters();
   SmallVector AllParams;
@@ -2424,7 +2433,7 @@ struct ConvertConstructorToDeductionGuideTransform {
   Params.push_back(NewParam);
 }
 
-return buildDeductionGuide(Template->getTemplateParameters(), nullptr,
+return buildDeductionGuide(GetTemplateParameterList(Template), nullptr,
ExplicitSpecifier(), TSI, Loc, Loc, Loc);
   }
 
@@ -5956,12 +5965,7 @@ bool Sema::CheckTemplateArgumentList(
   // template.
   TemplateArgumentListInfo NewArgs = TemplateArgs;
 
-  // Make sure we get the template parameter list from the most
-  // recent declaration, since that is the only one that is guaranteed to
-  // have all the default template argument information.
-  TemplateParameterList *Params =
-  cast(Template->getMostRecentDecl())
-  ->getTemplateParameters();
+  TemplateParameterList *Params = GetTemplateParameterList(Template);
 
   SourceLocation RAngleLoc = NewArgs.getRAngleLoc();
 
diff --git a/clang/test/SemaTemplate/ctad.cpp b/clang/test/SemaTemplate/ctad.cpp
index 4d836839d8c346..388ed7d4cced18 100644
--- a/clang/test/SemaTemplate/ctad.cpp
+++ b/clang/test/SemaTemplate/ctad.cpp
@@ -44,3 +44,13 @@ namespace Access {
   };
   D z = {Z(), {}};
 }
+
+namespace GH69987 {
+template struct X {};
+template struct X;
+X x;
+
+template struct Y { Y(T); };
+template struct Y ;
+Y y(1);
+};

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Fix CTAD not respect default template arguments that were added after the definition. (PR #75569)

2023-12-15 Thread via cfe-commits


llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Haojian Wu (hokein)


Changes

Fixes https://github.com/llvm/llvm-project/issues/69987

---
Full diff: https://github.com/llvm/llvm-project/pull/75569.diff


3 Files Affected:

- (modified) clang/docs/ReleaseNotes.rst (+2) 
- (modified) clang/lib/Sema/SemaTemplate.cpp (+13-9) 
- (modified) clang/test/SemaTemplate/ctad.cpp (+10) 


``diff
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index f5ae6bb8925202..be826e6a44bfc7 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -685,6 +685,8 @@ Bug Fixes in This Version
   (`#62157 `_) and
   (`#64885 `_) and
   (`#65568 `_)
+- Fix an issue where clang doesn't respect detault template arguments that
+  are added in a later redeclaration for CTAD. (#69987 
`_)
 
 Bug Fixes to Compiler Builtins
 ^^
diff --git a/clang/lib/Sema/SemaTemplate.cpp b/clang/lib/Sema/SemaTemplate.cpp
index f10abeaba0d451..450a1a1db0ba86 100644
--- a/clang/lib/Sema/SemaTemplate.cpp
+++ b/clang/lib/Sema/SemaTemplate.cpp
@@ -1824,6 +1824,15 @@ static void SetNestedNameSpecifier(Sema &S, TagDecl *T,
 T->setQualifierInfo(SS.getWithLocInContext(S.Context));
 }
 
+// Returns the template parameter list with all default template argument
+// information.
+static TemplateParameterList *GetTemplateParameterList(TemplateDecl *TD) {
+  // Make sure we get the template parameter list from the most
+  // recent declaration, since that is the only one that is guaranteed to
+  // have all the default template argument information.
+  return cast(TD->getMostRecentDecl())->getTemplateParameters();
+}
+
 DeclResult Sema::CheckClassTemplate(
 Scope *S, unsigned TagSpec, TagUseKind TUK, SourceLocation KWLoc,
 CXXScopeSpec &SS, IdentifierInfo *Name, SourceLocation NameLoc,
@@ -2062,7 +2071,7 @@ DeclResult Sema::CheckClassTemplate(
   CheckTemplateParameterList(
   TemplateParams,
   PrevClassTemplate
-  ? PrevClassTemplate->getMostRecentDecl()->getTemplateParameters()
+  ? GetTemplateParameterList(PrevClassTemplate)
   : nullptr,
   (SS.isSet() && SemanticContext && SemanticContext->isRecord() &&
SemanticContext->isDependentContext())
@@ -2298,7 +2307,7 @@ struct ConvertConstructorToDeductionGuideTransform {
 //-- The template parameters are the template parameters of the class
 //   template followed by the template parameters (including default
 //   template arguments) of the constructor, if any.
-TemplateParameterList *TemplateParams = Template->getTemplateParameters();
+TemplateParameterList *TemplateParams = GetTemplateParameterList(Template);
 if (FTD) {
   TemplateParameterList *InnerParams = FTD->getTemplateParameters();
   SmallVector AllParams;
@@ -2424,7 +2433,7 @@ struct ConvertConstructorToDeductionGuideTransform {
   Params.push_back(NewParam);
 }
 
-return buildDeductionGuide(Template->getTemplateParameters(), nullptr,
+return buildDeductionGuide(GetTemplateParameterList(Template), nullptr,
ExplicitSpecifier(), TSI, Loc, Loc, Loc);
   }
 
@@ -5956,12 +5965,7 @@ bool Sema::CheckTemplateArgumentList(
   // template.
   TemplateArgumentListInfo NewArgs = TemplateArgs;
 
-  // Make sure we get the template parameter list from the most
-  // recent declaration, since that is the only one that is guaranteed to
-  // have all the default template argument information.
-  TemplateParameterList *Params =
-  cast(Template->getMostRecentDecl())
-  ->getTemplateParameters();
+  TemplateParameterList *Params = GetTemplateParameterList(Template);
 
   SourceLocation RAngleLoc = NewArgs.getRAngleLoc();
 
diff --git a/clang/test/SemaTemplate/ctad.cpp b/clang/test/SemaTemplate/ctad.cpp
index 4d836839d8c346..388ed7d4cced18 100644
--- a/clang/test/SemaTemplate/ctad.cpp
+++ b/clang/test/SemaTemplate/ctad.cpp
@@ -44,3 +44,13 @@ namespace Access {
   };
   D z = {Z(), {}};
 }
+
+namespace GH69987 {
+template struct X {};
+template struct X;
+X x;
+
+template struct Y { Y(T); };
+template struct Y ;
+Y y(1);
+};

``




https://github.com/llvm/llvm-project/pull/75569
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[llvm] [clang] [X86][AVX10] Allow 64-bit mask register used without EVEX512 (PR #75571)

2023-12-15 Thread via cfe-commits


llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Phoebe Wang (phoebewang)


Changes

This is to reflect new document change that 64-bit mask is support by AVX10 
256-bit targets.

Latest documents can be found in:
https://cdrdv2.intel.com/v1/dl/getContent/784267
https://cdrdv2.intel.com/v1/dl/getContent/784343

---
Full diff: https://github.com/llvm/llvm-project/pull/75571.diff


4 Files Affected:

- (modified) clang/include/clang/Basic/BuiltinsX86.def (+15-15) 
- (modified) clang/lib/Headers/avx512bwintrin.h (+18-19) 
- (modified) clang/test/CodeGen/X86/avx512-error.c (+14-32) 
- (modified) llvm/lib/Target/X86/X86RegisterInfo.cpp (-6) 


``diff
diff --git a/clang/include/clang/Basic/BuiltinsX86.def 
b/clang/include/clang/Basic/BuiltinsX86.def
index e4802f8ab1c156..60b752ad48548f 100644
--- a/clang/include/clang/Basic/BuiltinsX86.def
+++ b/clang/include/clang/Basic/BuiltinsX86.def
@@ -979,7 +979,7 @@ TARGET_BUILTIN(__builtin_ia32_scatterpfqps, 
"vUcV8Oiv*IiIi", "nV:512:", "avx512p
 TARGET_BUILTIN(__builtin_ia32_knotqi, "UcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_knothi, "UsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_knotsi, "UiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_knotdi, "UOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_knotdi, "UOiUOi", "nc", "avx512bw")
 
 TARGET_BUILTIN(__builtin_ia32_cmpb128_mask, "UsV16cV16cIiUs", "ncV:128:", 
"avx512vl,avx512bw")
 TARGET_BUILTIN(__builtin_ia32_cmpd128_mask, "UcV4iV4iIiUc", "ncV:128:", 
"avx512vl")
@@ -1349,7 +1349,7 @@ TARGET_BUILTIN(__builtin_ia32_vpmadd52luq128, 
"V2OiV2OiV2OiV2Oi", "ncV:128:", "a
 TARGET_BUILTIN(__builtin_ia32_vpmadd52luq256, "V4OiV4OiV4OiV4Oi", "ncV:256:", 
"avx512ifma,avx512vl|avxifma")
 TARGET_BUILTIN(__builtin_ia32_vcomisd, "iV2dV2dIiIi", "ncV:128:", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_vcomiss, "iV4fV4fIiIi", "ncV:128:", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_kunpckdi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kunpckdi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kunpcksi, "UiUiUi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_loaddquhi512_mask, "V32sV32sC*V32sUi", 
"nV:512:", "avx512bw,evex512")
 TARGET_BUILTIN(__builtin_ia32_loaddquqi512_mask, "V64cV64cC*V64cUOi", 
"nV:512:", "avx512bw,evex512")
@@ -1665,56 +1665,56 @@ TARGET_BUILTIN(__builtin_ia32_fpcla_mask, 
"UcV4fIiUc", "ncV:128:", "avx512dq
 TARGET_BUILTIN(__builtin_ia32_kaddqi, "UcUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kaddhi, "UsUsUs", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kaddsi, "UiUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kadddi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kadddi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kandqi, "UcUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kandhi, "UsUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_kandsi, "UiUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kanddi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kanddi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kandnqi, "UcUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kandnhi, "UsUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_kandnsi, "UiUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kandndi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kandndi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_korqi, "UcUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_korhi, "UsUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_korsi, "UiUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kordi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kordi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kortestcqi, "iUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kortestzqi, "iUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kortestchi, "iUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_kortestzhi, "iUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_kortestcsi, "iUiUi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kortestzsi, "iUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kortestcdi, "iUOiUOi", "nc", "avx512bw,evex512")
-TARGET_BUILTIN(__builtin_ia32_kortestzdi, "iUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kortestcdi, "iUOiUOi", "nc", "avx512bw")
+TARGET_BUILTIN(__builtin_ia32_kortestzdi, "iUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_ktestcqi, "iUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_ktestzqi, "iUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_ktestchi, "iUsUs", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_ktestzhi, "iUsUs", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_ktestcsi, "iUiUi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_ktestzsi, "iUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_ktestcdi,

[clang] [llvm] [X86][AVX10] Allow 64-bit mask register used without EVEX512 (PR #75571)

2023-12-15 Thread via cfe-commits


llvmbot wrote:




@llvm/pr-subscribers-backend-x86

Author: Phoebe Wang (phoebewang)


Changes

This is to reflect new document change that 64-bit mask is support by AVX10 
256-bit targets.

Latest documents can be found in:
https://cdrdv2.intel.com/v1/dl/getContent/784267
https://cdrdv2.intel.com/v1/dl/getContent/784343

---
Full diff: https://github.com/llvm/llvm-project/pull/75571.diff


4 Files Affected:

- (modified) clang/include/clang/Basic/BuiltinsX86.def (+15-15) 
- (modified) clang/lib/Headers/avx512bwintrin.h (+18-19) 
- (modified) clang/test/CodeGen/X86/avx512-error.c (+14-32) 
- (modified) llvm/lib/Target/X86/X86RegisterInfo.cpp (-6) 


``diff
diff --git a/clang/include/clang/Basic/BuiltinsX86.def 
b/clang/include/clang/Basic/BuiltinsX86.def
index e4802f8ab1c156..60b752ad48548f 100644
--- a/clang/include/clang/Basic/BuiltinsX86.def
+++ b/clang/include/clang/Basic/BuiltinsX86.def
@@ -979,7 +979,7 @@ TARGET_BUILTIN(__builtin_ia32_scatterpfqps, 
"vUcV8Oiv*IiIi", "nV:512:", "avx512p
 TARGET_BUILTIN(__builtin_ia32_knotqi, "UcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_knothi, "UsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_knotsi, "UiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_knotdi, "UOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_knotdi, "UOiUOi", "nc", "avx512bw")
 
 TARGET_BUILTIN(__builtin_ia32_cmpb128_mask, "UsV16cV16cIiUs", "ncV:128:", 
"avx512vl,avx512bw")
 TARGET_BUILTIN(__builtin_ia32_cmpd128_mask, "UcV4iV4iIiUc", "ncV:128:", 
"avx512vl")
@@ -1349,7 +1349,7 @@ TARGET_BUILTIN(__builtin_ia32_vpmadd52luq128, 
"V2OiV2OiV2OiV2Oi", "ncV:128:", "a
 TARGET_BUILTIN(__builtin_ia32_vpmadd52luq256, "V4OiV4OiV4OiV4Oi", "ncV:256:", 
"avx512ifma,avx512vl|avxifma")
 TARGET_BUILTIN(__builtin_ia32_vcomisd, "iV2dV2dIiIi", "ncV:128:", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_vcomiss, "iV4fV4fIiIi", "ncV:128:", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_kunpckdi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kunpckdi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kunpcksi, "UiUiUi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_loaddquhi512_mask, "V32sV32sC*V32sUi", 
"nV:512:", "avx512bw,evex512")
 TARGET_BUILTIN(__builtin_ia32_loaddquqi512_mask, "V64cV64cC*V64cUOi", 
"nV:512:", "avx512bw,evex512")
@@ -1665,56 +1665,56 @@ TARGET_BUILTIN(__builtin_ia32_fpcla_mask, 
"UcV4fIiUc", "ncV:128:", "avx512dq
 TARGET_BUILTIN(__builtin_ia32_kaddqi, "UcUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kaddhi, "UsUsUs", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kaddsi, "UiUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kadddi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kadddi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kandqi, "UcUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kandhi, "UsUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_kandsi, "UiUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kanddi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kanddi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kandnqi, "UcUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kandnhi, "UsUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_kandnsi, "UiUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kandndi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kandndi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_korqi, "UcUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_korhi, "UsUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_korsi, "UiUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kordi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kordi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kortestcqi, "iUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kortestzqi, "iUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kortestchi, "iUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_kortestzhi, "iUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_kortestcsi, "iUiUi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kortestzsi, "iUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kortestcdi, "iUOiUOi", "nc", "avx512bw,evex512")
-TARGET_BUILTIN(__builtin_ia32_kortestzdi, "iUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kortestcdi, "iUOiUOi", "nc", "avx512bw")
+TARGET_BUILTIN(__builtin_ia32_kortestzdi, "iUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_ktestcqi, "iUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_ktestzqi, "iUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_ktestchi, "iUsUs", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_ktestzhi, "iUsUs", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_ktestcsi, "iUiUi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_ktestzsi, "iUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_ktes

[clang] [clang] Fix CTAD not respect default template arguments that were added after the definition. (PR #75569)

2023-12-15 Thread via cfe-commits


github-actions[bot] wrote:




:warning: C/C++ code formatter, clang-format found issues in your code. 
:warning:



You can test this locally with the following command:


``bash
git-clang-format --diff f1ea77f7be8acda2aa4b08ba27f454512a872057 
0f49d91b4a22944216cff8654f9c00f892bb02be -- clang/lib/Sema/SemaTemplate.cpp 
clang/test/SemaTemplate/ctad.cpp
``





View the diff from clang-format here.


``diff
diff --git a/clang/lib/Sema/SemaTemplate.cpp b/clang/lib/Sema/SemaTemplate.cpp
index 450a1a1db0..5fcc39ec70 100644
--- a/clang/lib/Sema/SemaTemplate.cpp
+++ b/clang/lib/Sema/SemaTemplate.cpp
@@ -2070,13 +2070,13 @@ DeclResult Sema::CheckClassTemplate(
   if (!(TUK == TUK_Friend && CurContext->isDependentContext()) &&
   CheckTemplateParameterList(
   TemplateParams,
-  PrevClassTemplate
-  ? GetTemplateParameterList(PrevClassTemplate)
-  : nullptr,
+  PrevClassTemplate ? GetTemplateParameterList(PrevClassTemplate)
+: nullptr,
   (SS.isSet() && SemanticContext && SemanticContext->isRecord() &&
SemanticContext->isDependentContext())
   ? TPC_ClassTemplateMember
-  : TUK == TUK_Friend ? TPC_FriendClassTemplate : 
TPC_ClassTemplate,
+  : TUK == TUK_Friend ? TPC_FriendClassTemplate
+  : TPC_ClassTemplate,
   SkipBody))
 Invalid = true;
 

``




https://github.com/llvm/llvm-project/pull/75569
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[llvm] [clang-tools-extra] [LoopVectorize] Enable hoisting of runtime checks by default (PR #71538)

2023-12-15 Thread David Green via cfe-commits


https://github.com/davemgreen approved this pull request.

With that fixed, and from the perf Ive seen, this LGTM. Thanks

https://github.com/llvm/llvm-project/pull/71538
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [X86][AVX10] Allow 64-bit mask register used without EVEX512 (PR #75571)

2023-12-15 Thread via cfe-commits


github-actions[bot] wrote:




:warning: C/C++ code formatter, clang-format found issues in your code. 
:warning:



You can test this locally with the following command:


``bash
git-clang-format --diff 295415e720209a368b74390fa933c83290e002d3 
2e31cbd1a0b5b9c1689f664c6c261cabbc656f2a -- clang/lib/Headers/avx512bwintrin.h 
clang/test/CodeGen/X86/avx512-error.c llvm/lib/Target/X86/X86RegisterInfo.cpp
``





View the diff from clang-format here.


``diff
diff --git a/clang/lib/Headers/avx512bwintrin.h 
b/clang/lib/Headers/avx512bwintrin.h
index e90e3ce744..c854720de6 100644
--- a/clang/lib/Headers/avx512bwintrin.h
+++ b/clang/lib/Headers/avx512bwintrin.h
@@ -18,7 +18,9 @@ typedef unsigned int __mmask32;
 typedef unsigned long long __mmask64;
 
 /* Define the default attributes for the functions in this file. */
-#define __DEFAULT_FN_ATTRS512 __attribute__((__always_inline__, __nodebug__, 
__target__("avx512bw,evex512"), __min_vector_width__(512)))
+#define __DEFAULT_FN_ATTRS512  
\
+  __attribute__((__always_inline__, __nodebug__,   
\
+ __target__("avx512bw,evex512"), __min_vector_width__(512)))
 #define __DEFAULT_FN_ATTRS 
\
   __attribute__((__always_inline__, __nodebug__,   
\
  __target__("avx512bw,no-evex512")))
@@ -29,9 +31,7 @@ _knot_mask32(__mmask32 __M)
   return __builtin_ia32_knotsi(__M);
 }
 
-static __inline __mmask64 __DEFAULT_FN_ATTRS
-_knot_mask64(__mmask64 __M)
-{
+static __inline __mmask64 __DEFAULT_FN_ATTRS _knot_mask64(__mmask64 __M) {
   return __builtin_ia32_knotdi(__M);
 }
 
@@ -41,9 +41,8 @@ _kand_mask32(__mmask32 __A, __mmask32 __B)
   return (__mmask32)__builtin_ia32_kandsi((__mmask32)__A, (__mmask32)__B);
 }
 
-static __inline__ __mmask64 __DEFAULT_FN_ATTRS
-_kand_mask64(__mmask64 __A, __mmask64 __B)
-{
+static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kand_mask64(__mmask64 __A,
+__mmask64 __B) {
   return (__mmask64)__builtin_ia32_kanddi((__mmask64)__A, (__mmask64)__B);
 }
 
@@ -53,9 +52,8 @@ _kandn_mask32(__mmask32 __A, __mmask32 __B)
   return (__mmask32)__builtin_ia32_kandnsi((__mmask32)__A, (__mmask32)__B);
 }
 
-static __inline__ __mmask64 __DEFAULT_FN_ATTRS
-_kandn_mask64(__mmask64 __A, __mmask64 __B)
-{
+static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kandn_mask64(__mmask64 __A,
+ __mmask64 __B) {
   return (__mmask64)__builtin_ia32_kandndi((__mmask64)__A, (__mmask64)__B);
 }
 
@@ -65,9 +63,8 @@ _kor_mask32(__mmask32 __A, __mmask32 __B)
   return (__mmask32)__builtin_ia32_korsi((__mmask32)__A, (__mmask32)__B);
 }
 
-static __inline__ __mmask64 __DEFAULT_FN_ATTRS
-_kor_mask64(__mmask64 __A, __mmask64 __B)
-{
+static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kor_mask64(__mmask64 __A,
+   __mmask64 __B) {
   return (__mmask64)__builtin_ia32_kordi((__mmask64)__A, (__mmask64)__B);
 }
 
@@ -77,9 +74,8 @@ _kxnor_mask32(__mmask32 __A, __mmask32 __B)
   return (__mmask32)__builtin_ia32_kxnorsi((__mmask32)__A, (__mmask32)__B);
 }
 
-static __inline__ __mmask64 __DEFAULT_FN_ATTRS
-_kxnor_mask64(__mmask64 __A, __mmask64 __B)
-{
+static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kxnor_mask64(__mmask64 __A,
+ __mmask64 __B) {
   return (__mmask64)__builtin_ia32_kxnordi((__mmask64)__A, (__mmask64)__B);
 }
 
@@ -89,9 +85,8 @@ _kxor_mask32(__mmask32 __A, __mmask32 __B)
   return (__mmask32)__builtin_ia32_kxorsi((__mmask32)__A, (__mmask32)__B);
 }
 
-static __inline__ __mmask64 __DEFAULT_FN_ATTRS
-_kxor_mask64(__mmask64 __A, __mmask64 __B)
-{
+static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kxor_mask64(__mmask64 __A,
+__mmask64 __B) {
   return (__mmask64)__builtin_ia32_kxordi((__mmask64)__A, (__mmask64)__B);
 }
 
@@ -114,14 +109,12 @@ _kortest_mask32_u8(__mmask32 __A, __mmask32 __B, unsigned 
char *__C) {
 }
 
 static __inline__ unsigned char __DEFAULT_FN_ATTRS
-_kortestc_mask64_u8(__mmask64 __A, __mmask64 __B)
-{
+_kortestc_mask64_u8(__mmask64 __A, __mmask64 __B) {
   return (unsigned char)__builtin_ia32_kortestcdi(__A, __B);
 }
 
 static __inline__ unsigned char __DEFAULT_FN_ATTRS
-_kortestz_mask64_u8(__mmask64 __A, __mmask64 __B)
-{
+_kortestz_mask64_u8(__mmask64 __A, __mmask64 __B) {
   return (unsigned char)__builtin_ia32_kortestzdi(__A, __B);
 }
 
@@ -150,14 +143,12 @@ _ktest_mask32_u8(__mmask32 __A, __mmask32 __B, unsigned 
char *__C) {
 }
 
 static __inline__ unsigned char __DEFAULT_FN_ATTRS
-_ktestc_mask64_u8(__mmask64 __A, __mmask64 __B)
-{
+_ktestc_mask64_u8(__mmask64 __A, __mmask64 __B) {
   return (unsigned char)__builtin_ia32_ktestcdi(__A, __B);
 }
 
 static __inline__ unsigned

[clang] [llvm] [X86][AVX10] Allow 64-bit mask register used without EVEX512 (PR #75571)

2023-12-15 Thread Phoebe Wang via cfe-commits


https://github.com/phoebewang updated 
https://github.com/llvm/llvm-project/pull/75571

>From 2e31cbd1a0b5b9c1689f664c6c261cabbc656f2a Mon Sep 17 00:00:00 2001
From: Phoebe Wang 
Date: Fri, 15 Dec 2023 16:11:02 +0800
Subject: [PATCH 1/2] [X86][AVX10] Allow 64-bit mask register used without
 EVEX512

This is to reflect new document change that 64-bit mask is support by
AVX10 256-bit targets.

Latest documents can be found in:
https://cdrdv2.intel.com/v1/dl/getContent/784267
https://cdrdv2.intel.com/v1/dl/getContent/784343
---
 clang/include/clang/Basic/BuiltinsX86.def | 30 +++
 clang/lib/Headers/avx512bwintrin.h| 37 +-
 clang/test/CodeGen/X86/avx512-error.c | 46 +++
 llvm/lib/Target/X86/X86RegisterInfo.cpp   |  6 ---
 4 files changed, 47 insertions(+), 72 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.def 
b/clang/include/clang/Basic/BuiltinsX86.def
index e4802f8ab1c156..60b752ad48548f 100644
--- a/clang/include/clang/Basic/BuiltinsX86.def
+++ b/clang/include/clang/Basic/BuiltinsX86.def
@@ -979,7 +979,7 @@ TARGET_BUILTIN(__builtin_ia32_scatterpfqps, 
"vUcV8Oiv*IiIi", "nV:512:", "avx512p
 TARGET_BUILTIN(__builtin_ia32_knotqi, "UcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_knothi, "UsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_knotsi, "UiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_knotdi, "UOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_knotdi, "UOiUOi", "nc", "avx512bw")
 
 TARGET_BUILTIN(__builtin_ia32_cmpb128_mask, "UsV16cV16cIiUs", "ncV:128:", 
"avx512vl,avx512bw")
 TARGET_BUILTIN(__builtin_ia32_cmpd128_mask, "UcV4iV4iIiUc", "ncV:128:", 
"avx512vl")
@@ -1349,7 +1349,7 @@ TARGET_BUILTIN(__builtin_ia32_vpmadd52luq128, 
"V2OiV2OiV2OiV2Oi", "ncV:128:", "a
 TARGET_BUILTIN(__builtin_ia32_vpmadd52luq256, "V4OiV4OiV4OiV4Oi", "ncV:256:", 
"avx512ifma,avx512vl|avxifma")
 TARGET_BUILTIN(__builtin_ia32_vcomisd, "iV2dV2dIiIi", "ncV:128:", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_vcomiss, "iV4fV4fIiIi", "ncV:128:", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_kunpckdi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kunpckdi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kunpcksi, "UiUiUi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_loaddquhi512_mask, "V32sV32sC*V32sUi", 
"nV:512:", "avx512bw,evex512")
 TARGET_BUILTIN(__builtin_ia32_loaddquqi512_mask, "V64cV64cC*V64cUOi", 
"nV:512:", "avx512bw,evex512")
@@ -1665,56 +1665,56 @@ TARGET_BUILTIN(__builtin_ia32_fpcla_mask, 
"UcV4fIiUc", "ncV:128:", "avx512dq
 TARGET_BUILTIN(__builtin_ia32_kaddqi, "UcUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kaddhi, "UsUsUs", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kaddsi, "UiUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kadddi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kadddi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kandqi, "UcUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kandhi, "UsUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_kandsi, "UiUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kanddi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kanddi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kandnqi, "UcUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kandnhi, "UsUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_kandnsi, "UiUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kandndi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kandndi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_korqi, "UcUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_korhi, "UsUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_korsi, "UiUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kordi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kordi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kortestcqi, "iUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kortestzqi, "iUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kortestchi, "iUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_kortestzhi, "iUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_kortestcsi, "iUiUi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kortestzsi, "iUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kortestcdi, "iUOiUOi", "nc", "avx512bw,evex512")
-TARGET_BUILTIN(__builtin_ia32_kortestzdi, "iUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kortestcdi, "iUOiUOi", "nc", "avx512bw")
+TARGET_BUILTIN(__builtin_ia32_kortestzdi, "iUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_ktestcqi, "iUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_ktestzqi, "iUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_ktestchi, "iUsUs", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_ktestzhi, "iUsUs", "nc", "avx512dq")
 TARGE

[clang] cd09f21 - [clang] Report narrowing conversions with const references (#75332)

2023-12-15 Thread via cfe-commits


Author: Mariya Podchishchaeva
Date: 2023-12-15T09:42:20+01:00
New Revision: cd09f21b223688d58c00866c6e01f3a073993a4c

URL: 
https://github.com/llvm/llvm-project/commit/cd09f21b223688d58c00866c6e01f3a073993a4c
DIFF: 
https://github.com/llvm/llvm-project/commit/cd09f21b223688d58c00866c6e01f3a073993a4c.diff

LOG: [clang] Report narrowing conversions with const references (#75332)

Fixes https://github.com/llvm/llvm-project/issues/63151

-

Co-authored-by: Erich Keane 

Added: 
clang/test/SemaCXX/GH63151.cpp

Modified: 
clang/docs/ReleaseNotes.rst
clang/lib/Sema/SemaInit.cpp

Removed: 




diff  --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index f5ae6bb8925202..26ba4f8f72508a 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -521,6 +521,9 @@ Improvements to Clang's diagnostics
   |   ~~~^
 
 - Clang now diagnoses definitions of friend function specializations, e.g. 
``friend void f<>(int) {}``.
+- Clang now diagnoses narrowing conversions involving const references.
+  (`#63151: `_).
+
 
 Improvements to Clang's time-trace
 --

diff  --git a/clang/lib/Sema/SemaInit.cpp b/clang/lib/Sema/SemaInit.cpp
index 4028b2d642b212..de0d92edb550dd 100644
--- a/clang/lib/Sema/SemaInit.cpp
+++ b/clang/lib/Sema/SemaInit.cpp
@@ -4432,7 +4432,8 @@ static void TryReferenceInitializationCore(Sema &S,
Qualifiers T1Quals,
QualType cv2T2, QualType T2,
Qualifiers T2Quals,
-   InitializationSequence &Sequence);
+   InitializationSequence &Sequence,
+   bool TopLevelOfInitList);
 
 static void TryValueInitialization(Sema &S,
const InitializedEntity &Entity,
@@ -4486,7 +4487,8 @@ static void TryReferenceListInitialization(Sema &S,
 if (RefRelationship >= Sema::Ref_Related) {
   // Try to bind the reference here.
   TryReferenceInitializationCore(S, Entity, Kind, Initializer, cv1T1, T1,
- T1Quals, cv2T2, T2, T2Quals, Sequence);
+ T1Quals, cv2T2, T2, T2Quals, Sequence,
+ /*TopLevelOfInitList=*/true);
   if (Sequence)
 Sequence.RewrapReferenceInitList(cv1T1, InitList);
   return;
@@ -4945,11 +4947,11 @@ static void CheckCXX98CompatAccessibleCopy(Sema &S,
Expr *CurInitExpr);
 
 /// Attempt reference initialization (C++0x [dcl.init.ref])
-static void TryReferenceInitialization(Sema &S,
-   const InitializedEntity &Entity,
+static void TryReferenceInitialization(Sema &S, const InitializedEntity 
&Entity,
const InitializationKind &Kind,
Expr *Initializer,
-   InitializationSequence &Sequence) {
+   InitializationSequence &Sequence,
+   bool TopLevelOfInitList) {
   QualType DestType = Entity.getType();
   QualType cv1T1 = DestType->castAs()->getPointeeType();
   Qualifiers T1Quals;
@@ -4967,7 +4969,8 @@ static void TryReferenceInitialization(Sema &S,
 
   // Delegate everything else to a subfunction.
   TryReferenceInitializationCore(S, Entity, Kind, Initializer, cv1T1, T1,
- T1Quals, cv2T2, T2, T2Quals, Sequence);
+ T1Quals, cv2T2, T2, T2Quals, Sequence,
+ TopLevelOfInitList);
 }
 
 /// Determine whether an expression is a non-referenceable glvalue (one to
@@ -4990,7 +4993,8 @@ static void TryReferenceInitializationCore(Sema &S,
Qualifiers T1Quals,
QualType cv2T2, QualType T2,
Qualifiers T2Quals,
-   InitializationSequence &Sequence) {
+   InitializationSequence &Sequence,
+   bool TopLevelOfInitList) {
   QualType DestType = Entity.getType();
   SourceLocation DeclLoc = Initializer->getBeginLoc();
 
@@ -5264,7 +5268,8 @@ static void TryReferenceInitializationCore(Sema &S,
   Sequence.SetFailed(InitializationSequence::FK_ReferenceInitFailed);
 return;
   } else {
-Sequence.AddConversionSequenceStep(ICS, TempEntity.getType());
+Sequence.AddConversionSequenceStep(ICS, TempEntity.getType(),
+   TopLevelOfInitList);

[clang] [clang] Report narrowing conversions with const references (PR #75332)

2023-12-15 Thread Mariya Podchishchaeva via cfe-commits


https://github.com/Fznamznon closed 
https://github.com/llvm/llvm-project/pull/75332
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AMDGPU][GFX12] Add new v_permlane16 variants (PR #75475)

2023-12-15 Thread Mariusz Sikora via cfe-commits


mariusz-sikora-at-amd wrote:

> LGTM
> 
> You could also update existing permlane tests with run lines for gfx12:
> 
> * test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
> 
> * test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir
> 
> 
> This can also be a separate patch.

New patch: https://github.com/llvm/llvm-project/pull/75572

https://github.com/llvm/llvm-project/pull/75475
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Fix CTAD not respect default template arguments that were added after the definition. (PR #75569)

2023-12-15 Thread Mariya Podchishchaeva via cfe-commits



@@ -685,6 +685,8 @@ Bug Fixes in This Version
   (`#62157 `_) and
   (`#64885 `_) and
   (`#65568 `_)
+- Fix an issue where clang doesn't respect detault template arguments that
+  are added in a later redeclaration for CTAD. (#69987 
`_)

Fznamznon wrote:

A little nit to align the style
```suggestion
  are added in a later redeclaration for CTAD.
  Fixes (#69987 `_)
```

https://github.com/llvm/llvm-project/pull/75569
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Add size filter for stack auto init (PR #74777)

2023-12-15 Thread Vitaly Buka via cfe-commits



@@ -1205,10 +1205,19 @@ static void emitStoresForConstant(CodeGenModule &CGM, 
const VarDecl &D,
   }
 
   auto *SizeVal = llvm::ConstantInt::get(CGM.IntPtrTy, ConstantSize);
+  auto trivialAutoVarInitMaxSize =

vitalybuka wrote:

would it be simpler 

```
 if (IsAutoInit && sizeVal->getValue().sgt(trivialAutoVarInitMaxSize)) 
return;
```

https://github.com/llvm/llvm-project/pull/74777
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Add size filter for stack auto init (PR #74777)

2023-12-15 Thread Vitaly Buka via cfe-commits


https://github.com/vitalybuka edited 
https://github.com/llvm/llvm-project/pull/74777
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][dataflow] Fix an issue with `Environment::getResultObjectLocation()`. (PR #75483)

2023-12-15 Thread via cfe-commits


https://github.com/martinboehme updated 
https://github.com/llvm/llvm-project/pull/75483

>From 3262b0056708614f2a3d68750a0f118508f79ccb Mon Sep 17 00:00:00 2001
From: Martin Braenne 
Date: Thu, 14 Dec 2023 15:43:52 +
Subject: [PATCH 1/3] [clang][dataflow] Fix an issue with
 `Environment::getResultObjectLocation()`.

So far, if there was a chain of record type prvalues,
`getResultObjectLocation()` would assign a different result object location to
each one. This makes no sense, of course, as all of these prvalues end up
initializing the same result object.

This patch fixes this by propagating storage locations up through the entire
chain of prvalues.

The new implementation also has the desirable effect of making it possible to
make `getResultObjectLocation()` const, which seems appropriate given that,
logically, it is just an accessor.
---
 .../FlowSensitive/DataflowEnvironment.h   | 33 ++--
 .../FlowSensitive/DataflowEnvironment.cpp | 77 ++-
 clang/lib/Analysis/FlowSensitive/Transfer.cpp |  9 ++-
 .../Analysis/FlowSensitive/TransferTest.cpp   | 48 
 4 files changed, 120 insertions(+), 47 deletions(-)

diff --git a/clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h 
b/clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
index d7e39ab2616fd9..5943af50b6ad8f 100644
--- a/clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
+++ b/clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
@@ -325,7 +325,8 @@ class Environment {
   ///
   /// Requirements:
   ///  `E` must be a prvalue of record type.
-  RecordStorageLocation &getResultObjectLocation(const Expr &RecordPRValue);
+  RecordStorageLocation &
+  getResultObjectLocation(const Expr &RecordPRValue) const;
 
   /// Returns the return value of the current function. This can be null if:
   /// - The function has a void return type
@@ -434,24 +435,14 @@ class Environment {
 
   /// Assigns `Val` as the value of the prvalue `E` in the environment.
   ///
-  /// If `E` is not yet associated with a storage location, associates it with
-  /// a newly created storage location. In any case, associates the storage
-  /// location of `E` with `Val`.
-  ///
-  /// Once the migration to strict handling of value categories is complete
-  /// (see https://discourse.llvm.org/t/70086), this function will be renamed 
to
-  /// `setValue()`. At this point, prvalue expressions will be associated
-  /// directly with `Value`s, and the legacy behavior of associating prvalue
-  /// expressions with storage locations (as described above) will be
-  /// eliminated.
-  ///
   /// Requirements:
   ///
-  ///  `E` must be a prvalue
-  ///  If `Val` is a `RecordValue`, its `RecordStorageLocation` must be the
-  ///  same as that of any `RecordValue` that has already been associated with
-  ///  `E`. This is to guarantee that the result object initialized by a 
prvalue
-  ///  `RecordValue` has a durable storage location.
+  ///  - `E` must be a prvalue
+  ///  - If `Val` is a `RecordValue`, its `RecordStorageLocation` must be
+  ///`getResultObjectLocation(E)`. An exception to this is if `E` is an
+  ///expression that originally creates a `RecordValue` (such as a
+  ///`CXXConstructExpr` or `CallExpr`), as these establish the location of
+  ///the result object in the first place.
   void setValue(const Expr &E, Value &Val);
 
   /// Returns the value assigned to `Loc` in the environment or null if `Loc`
@@ -608,14 +599,6 @@ class Environment {
   // The copy-constructor is for use in fork() only.
   Environment(const Environment &) = default;
 
-  /// Internal version of `setStorageLocation()` that doesn't check if the
-  /// expression is a prvalue.
-  void setStorageLocationInternal(const Expr &E, StorageLocation &Loc);
-
-  /// Internal version of `getStorageLocation()` that doesn't check if the
-  /// expression is a prvalue.
-  StorageLocation *getStorageLocationInternal(const Expr &E) const;
-
   /// Creates a value appropriate for `Type`, if `Type` is supported, otherwise
   /// return null.
   ///
diff --git a/clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp 
b/clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
index b98037b7364522..12192e6a32dc04 100644
--- a/clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
+++ b/clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
@@ -726,27 +726,69 @@ void Environment::setStorageLocation(const Expr &E, 
StorageLocation &Loc) {
   // so allow these as an exception.
   assert(E.isGLValue() ||
  E.getType()->isSpecificBuiltinType(BuiltinType::BuiltinFn));
-  setStorageLocationInternal(E, Loc);
+  const Expr &CanonE = ignoreCFGOmittedNodes(E);
+  assert(!ExprToLoc.contains(&CanonE));
+  ExprToLoc[&CanonE] = &Loc;
 }
 
 StorageLocation *Environment::getStorageLocation(const Expr &E) const {
   // See comment in `setStorageLocation()`.
   assert(E.isGLValue() ||
  E.getType()->isSpecificBuiltinT

[clang] [llvm] [AMDGPU][GFX12] Add new v_permlane16 variants (PR #75475)

2023-12-15 Thread Mariusz Sikora via cfe-commits


https://github.com/mariusz-sikora-at-amd closed 
https://github.com/llvm/llvm-project/pull/75475
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 966416b - [AMDGPU][GFX12] Add new v_permlane16 variants (#75475)

2023-12-15 Thread via cfe-commits


Author: Mariusz Sikora
Date: 2023-12-15T10:14:38+01:00
New Revision: 966416b9e8e315494d586c5f0e88516e22135698

URL: 
https://github.com/llvm/llvm-project/commit/966416b9e8e315494d586c5f0e88516e22135698
DIFF: 
https://github.com/llvm/llvm-project/commit/966416b9e8e315494d586c5f0e88516e22135698.diff

LOG: [AMDGPU][GFX12] Add new v_permlane16 variants (#75475)

Added: 
clang/test/SemaOpenCL/builtins-amdgcn-error-gfx12-param.cl
clang/test/SemaOpenCL/builtins-amdgcn-error-gfx12.cl
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.var.ll
llvm/test/CodeGen/AMDGPU/permlane16_var-op-sel.ll
llvm/test/CodeGen/AMDGPU/vcmpx-permlane16var-hazard.mir

Modified: 
clang/include/clang/Basic/BuiltinsAMDGPU.def
clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
llvm/include/llvm/IR/IntrinsicsAMDGPU.td
llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
llvm/lib/Target/AMDGPU/VOP3Instructions.td
llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
llvm/test/MC/AMDGPU/gfx11_unsupported.s
llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
llvm/test/MC/AMDGPU/gfx12_asm_vop3_err.s
llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsAMDGPU.def 
b/clang/include/clang/Basic/BuiltinsAMDGPU.def
index 7465f13d552d6e..e562ef04a30194 100644
--- a/clang/include/clang/Basic/BuiltinsAMDGPU.def
+++ b/clang/include/clang/Basic/BuiltinsAMDGPU.def
@@ -410,6 +410,8 @@ TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_fp8_f32, "ifiiIi", 
"nc", "fp8-insts")
 // GFX12+ only builtins.
 
//===--===//
 
+TARGET_BUILTIN(__builtin_amdgcn_permlane16_var,  "UiUiUiUiIbIb", "nc", 
"gfx12-insts")
+TARGET_BUILTIN(__builtin_amdgcn_permlanex16_var, "UiUiUiUiIbIb", "nc", 
"gfx12-insts")
 TARGET_BUILTIN(__builtin_amdgcn_s_barrier_signal, "vIi", "n", "gfx12-insts")
 TARGET_BUILTIN(__builtin_amdgcn_s_barrier_signal_var, "vi", "n", "gfx12-insts")
 TARGET_BUILTIN(__builtin_amdgcn_s_barrier_wait, "vIs", "n", "gfx12-insts")

diff  --git a/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl 
b/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
index b8d281531e218e..2899d9e5c28898 100644
--- a/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
+++ b/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
@@ -1,6 +1,54 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // RUN: %clang_cc1 -cl-std=CL2.0 -O0 -triple amdgcn-unknown-unknown 
-target-cpu gfx1200 -S -emit-llvm -o - %s | FileCheck %s
 
+// REQUIRES: amdgpu-registered-target
+
+typedef unsigned int uint;
+
+// CHECK-LABEL: @test_permlane16_var(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[OUT_ADDR:%.*]] = alloca ptr addrspace(1), align 8, 
addrspace(5)
+// CHECK-NEXT:[[A_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:[[B_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:[[C_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:store ptr addrspace(1) [[OUT:%.*]], ptr addrspace(5) 
[[OUT_ADDR]], align 8
+// CHECK-NEXT:store i32 [[A:%.*]], ptr addrspace(5) [[A_ADDR]], align 4
+// CHECK-NEXT:store i32 [[B:%.*]], ptr addrspace(5) [[B_ADDR]], align 4
+// CHECK-NEXT:store i32 [[C:%.*]], ptr addrspace(5) [[C_ADDR]], align 4
+// CHECK-NEXT:[[TMP0:%.*]] = load i32, ptr addrspace(5) [[A_ADDR]], align 4
+// CHECK-NEXT:[[TMP1:%.*]] = load i32, ptr addrspace(5) [[B_ADDR]], align 4
+// CHECK-NEXT:[[TMP2:%.*]] = load i32, ptr addrspace(5) [[C_ADDR]], align 4
+// CHECK-NEXT:[[TMP3:%.*]] = call i32 @llvm.amdgcn.permlane16.var(i32 
[[TMP0]], i32 [[TMP1]], i32 [[TMP2]], i1 false, i1 false)
+// CHECK-NEXT:[[TMP4:%.*]] = load ptr addrspace(1), ptr addrspace(5) 
[[OUT_ADDR]], align 8
+// CHECK-NEXT:store i32 [[TMP3]], ptr addrspace(1) [[TMP4]], align 4
+// CHECK-NEXT:ret void
+//
+void test_permlane16_var(global uint* out, uint a, uint b, uint c) {
+  *out = __builtin_amdgcn_permlane16_var(a, b, c, 0, 0);
+}
+
+// CHECK-LABEL: @test_permlanex16_var(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[OUT_ADDR:%.*]] = alloca ptr addrspace(1), align 8, 
addrspace(5)
+// CHECK-NEXT:[[A_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:[[B_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:[[C_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:store ptr addrspace(1) [[OUT:%.*]], ptr addrspace(5) 
[[OUT_ADDR]], align 8
+// CHECK-NEXT:store i32 [[A:%.*]], ptr addrspace(5) [[A_ADDR]], align 4
+// CHECK-NEXT:store i32 [[B:%.*]], ptr addrspace(5) [[B_ADDR]], align 4
+// CHECK-NEXT:store i32 [[C:%.*]], ptr addrspace(5) [[C_A

[clang] [llvm] [clang-tools-extra] [libc] [compiler-rt] [libcxx] [openmp] [mlir] [lldb] [flang] [libcxxabi] [lld] [builtins][arm64] Build __init_cpu_features_resolver on Apple platforms (PR #73685)

2023-12-15 Thread Martin Storsjö via cfe-commits


mstorsjo wrote:

This commit broken building compiler-rt builtins for Windows on aarch64; 
building now hits these errors:
```
llvm-project/compiler-rt/lib/builtins/cpu_model.c:1192:2: error: No support for 
checking for lse atomics on this platfrom yet.
 1192 | #error No support for checking for lse atomics on this platfrom yet.
  |  ^
llvm-project/compiler-rt/lib/builtins/cpu_model.c:1571:2: error: No support for 
checking hwcap on this platform yet.
 1571 | #error No support for checking hwcap on this platform yet.
  |  ^
2 errors generated.
```
Before this change, most of this whole file was ifdeffed out when building on 
Windows (and Apple platforms, I would presume), but now most of it is included, 
then hitting this `#error`.

I guess it could work to just remove the `#error` cases, but this file suffers 
from a pretty deep ifdef nesting jungle, so I'm not sure if that's the best 
solution. (FWIW, if we wanted to add aarch64 CPU feature detection for Windows 
here, the code would be more of a separate codepath just like the Apple case, 
it doesn't share the linux/BSD HWCAP style.)

I can push a quick fix, either removing the `#error` or reverting this commit, 
later during the day.

BTW, when compiling the file I also get a bunch of warnings in this style:
```
llvm-project/compiler-rt/lib/builtins/cpu_model.c:1448:36: warning: value size 
does not match register size specified by the constraint and modifier 
[-Wasm-operand-widths]
 1448 | getCPUFeature(ID_AA64PFR1_EL1, ftr);
  |^
llvm-project/compiler-rt/lib/builtins/cpu_model.c:1448:5: note: use constraint 
modifier "w"
 1448 | getCPUFeature(ID_AA64PFR1_EL1, ftr);
  | ^
llvm-project/compiler-rt/lib/builtins/cpu_model.c:1345:45: note: expanded from 
macro 'getCPUFeature'
 1345 | #define getCPUFeature(id, ftr) __asm__("mrs %0, " #id : "=r"(ftr))
  |
```

https://github.com/llvm/llvm-project/pull/73685
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [clang-tools-extra] [libc] [compiler-rt] [libcxx] [lldb] [mlir] [flang] [lld] [AMDGPU] GFX12: Add Split Workgroup Barrier (PR #74836)

2023-12-15 Thread Mariusz Sikora via cfe-commits



@@ -684,6 +684,51 @@ s_rndne_f16 s5, 0xfe0b
 s_rndne_f16 s5, 0x3456
 // GFX12: encoding: [0xff,0x6e,0x85,0xbe,0x56,0x34,0x00,0x00]
 
+s_barrier_signal -2

mariusz-sikora-at-amd wrote:

Patch: https://github.com/llvm/llvm-project/pull/75575

https://github.com/llvm/llvm-project/pull/74836
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][dataflow] Fix an issue with `Environment::getResultObjectLocation()`. (PR #75483)

2023-12-15 Thread via cfe-commits



@@ -726,27 +726,69 @@ void Environment::setStorageLocation(const Expr &E, 
StorageLocation &Loc) {
   // so allow these as an exception.
   assert(E.isGLValue() ||
  E.getType()->isSpecificBuiltinType(BuiltinType::BuiltinFn));
-  setStorageLocationInternal(E, Loc);
+  const Expr &CanonE = ignoreCFGOmittedNodes(E);
+  assert(!ExprToLoc.contains(&CanonE));
+  ExprToLoc[&CanonE] = &Loc;
 }
 
 StorageLocation *Environment::getStorageLocation(const Expr &E) const {
   // See comment in `setStorageLocation()`.
   assert(E.isGLValue() ||
  E.getType()->isSpecificBuiltinType(BuiltinType::BuiltinFn));
-  return getStorageLocationInternal(E);
+  auto It = ExprToLoc.find(&ignoreCFGOmittedNodes(E));
+  return It == ExprToLoc.end() ? nullptr : &*It->second;
+}
+
+// Returns whether a prvalue of record type is the one that originally
+// constructs the object (i.e. it doesn't propagate it from one of its
+// children).
+static bool isOriginalRecordConstructor(const Expr &RecordPRValue) {
+  if (auto *Init = dyn_cast(&RecordPRValue))
+return !Init->isSemanticForm() || !Init->isTransparent();
+  return isa(RecordPRValue) || isa(RecordPRValue) 
||
+ isa(RecordPRValue) ||
+ // The framework currently does not propagate the objects created in
+ // the two branches of a `ConditionalOperator` because there is no way
+ // to reconcile their storage locations, which are different. We
+ // therefore claim that the `ConditionalOperator` is the expression
+ // that originally constructs the object.
+ // Ultimately, this will be fixed by propagating locations down from
+ // the result object, rather than up from the original constructor as
+ // we do now.
+ isa(RecordPRValue);

martinboehme wrote:

I didn't add one originally because there's already an extensive FIXME in the 
documentation for `getResultObjectLocation()` that describes this in more 
detail, but your comment made me realize we should refer to that FIXME here. 
Done.

https://github.com/llvm/llvm-project/pull/75483
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Add size filter for stack auto init (PR #74777)

2023-12-15 Thread Vitaly Buka via cfe-commits



@@ -0,0 +1,60 @@
+// Pattern related max size tests: 1, 1024, 4096
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown 
-ftrivial-auto-var-init=pattern -ftrivial-auto-var-init-max-size=1 %s 
-emit-llvm -o - | FileCheck -check-prefix=PATTERN-COMMON 
-check-prefix=PATTERN-MAX-1 %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown 
-ftrivial-auto-var-init=pattern -ftrivial-auto-var-init-max-size=1024 %s 
-emit-llvm -o - | FileCheck -check-prefix=PATTERN-COMMON 
-check-prefix=PATTERN-MAX-1024 %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown 
-ftrivial-auto-var-init=pattern -ftrivial-auto-var-init-max-size=4096 %s 
-emit-llvm -o - | FileCheck -check-prefix=PATTERN-COMMON 
-check-prefix=PATTERN-MAX-4096 %s
+//
+// Zero related max size tests: 1, 1024, 4096
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -ftrivial-auto-var-init=zero 
-ftrivial-auto-var-init-max-size=1 %s -emit-llvm -o - | FileCheck 
-check-prefix=ZERO-COMMON -check-prefix=ZERO-MAX-1 %s

vitalybuka wrote:

it would be nice to test something like `test_huge_larger_init`, to show that 
user requested initialization is preserved.

https://github.com/llvm/llvm-project/pull/74777
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][dataflow] Fix an issue with `Environment::getResultObjectLocation()`. (PR #75483)

2023-12-15 Thread via cfe-commits



@@ -726,27 +726,69 @@ void Environment::setStorageLocation(const Expr &E, 
StorageLocation &Loc) {
   // so allow these as an exception.
   assert(E.isGLValue() ||
  E.getType()->isSpecificBuiltinType(BuiltinType::BuiltinFn));
-  setStorageLocationInternal(E, Loc);
+  const Expr &CanonE = ignoreCFGOmittedNodes(E);
+  assert(!ExprToLoc.contains(&CanonE));
+  ExprToLoc[&CanonE] = &Loc;
 }
 
 StorageLocation *Environment::getStorageLocation(const Expr &E) const {
   // See comment in `setStorageLocation()`.
   assert(E.isGLValue() ||
  E.getType()->isSpecificBuiltinType(BuiltinType::BuiltinFn));
-  return getStorageLocationInternal(E);
+  auto It = ExprToLoc.find(&ignoreCFGOmittedNodes(E));
+  return It == ExprToLoc.end() ? nullptr : &*It->second;
+}
+
+// Returns whether a prvalue of record type is the one that originally
+// constructs the object (i.e. it doesn't propagate it from one of its
+// children).
+static bool isOriginalRecordConstructor(const Expr &RecordPRValue) {
+  if (auto *Init = dyn_cast(&RecordPRValue))
+return !Init->isSemanticForm() || !Init->isTransparent();
+  return isa(RecordPRValue) || isa(RecordPRValue) 
||
+ isa(RecordPRValue) ||
+ // The framework currently does not propagate the objects created in
+ // the two branches of a `ConditionalOperator` because there is no way
+ // to reconcile their storage locations, which are different. We
+ // therefore claim that the `ConditionalOperator` is the expression
+ // that originally constructs the object.
+ // Ultimately, this will be fixed by propagating locations down from
+ // the result object, rather than up from the original constructor as
+ // we do now.
+ isa(RecordPRValue);
 }
 
 RecordStorageLocation &
-Environment::getResultObjectLocation(const Expr &RecordPRValue) {
+Environment::getResultObjectLocation(const Expr &RecordPRValue) const {
   assert(RecordPRValue.getType()->isRecordType());
   assert(RecordPRValue.isPRValue());
 
-  if (StorageLocation *ExistingLoc = getStorageLocationInternal(RecordPRValue))
-return *cast(ExistingLoc);
-  auto &Loc = cast(
-  DACtx->getStableStorageLocation(RecordPRValue));
-  setStorageLocationInternal(RecordPRValue, Loc);
-  return Loc;
+  // Returns a storage location that we can use if assertions fail.
+  auto FallbackForAssertFailure =
+  [this, &RecordPRValue]() -> RecordStorageLocation & {
+return cast(
+DACtx->getStableStorageLocation(RecordPRValue));
+  };
+

martinboehme wrote:

I think what's unusual about this code is that it's handling a lot of 
expression node kinds generically.

I think I've enumerated all the "is original record constructor" nodes that we 
need, but it felt sensible to put some kind of fallback in place in case there 
is some node kind I haven't discovered that doesn't have any children and would 
therefore return an invalid reference if we didn't have this fallback.

https://github.com/llvm/llvm-project/pull/75483
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[libunwind] [compiler-rt] [mlir] [llvm] [lld] [flang] [lldb] [libcxx] [libcxxabi] [clang] [libc] [clang-tools-extra] [asan] Install `pthread_atfork` (PR #75290)

2023-12-15 Thread Rainer Orth via cfe-commits


rorth wrote:

Since this patch, all asan tests loop on Solaris.  This had been hidden for a 
bit by an unrelated extended build breakage on the bots, but now every `ninja 
check-all` on the Solaris/amd64 bot times out.  I could trace this to this 
patch.

E.g. when running 
`projects/compiler-rt/test/asan/I386SunOSConfig/TestCases/Output/alloca_big_alignment.cpp.tmp`,
 I get the expected output
```
=
==3==ERROR: AddressSanitizer: dynamic-stack-buffer-overflow on address 
0xfeffd88a at pc 0x0812907d bp 0xfeffd7f4 sp 0xfeffd7ec
WRITE of size 1 at 0xfeffd88a thread T0
```
and afterwards the test loops.  `truss` shows an unending series of
```
22210:  yield() = 0
22210:  yield() = 0
22210:  yield() = 0
```
and `pstack` gives
```
22213:  /var/llvm/local-amd64-release-stage2-A-flang-492214/tools/clang/stage2
 fdfbebc5 yield(0x8139158, 0x8109558, 0x818a580, 0x0, 0x5dd, 0x8139158) + 15
 0810cd32 __sanitizer::FutexWait(__sanitizer::atomic_uint32_t*, unsigned int) 
(0xfe00a000, 0xfdebdd56, 0x805ad7c, 0xfdfa0107, 0xfeffc68c, 0x5) + 12
 080f4952 __asan::InstallAtForkHandler()::$_0::__invoke() (0xfde26fc0, 0x7, 
0xfe010200, 0xfe010140, 0x7, 0x5) + 12
 fdfa49c8 forkx(0x0, 0xfe5ad000, 0x89f, 0xfdfa4b8c) + c8
 fdfa4b9d fork (0x8139158, 0x811563e, 0xfeffc720, 0xfd6007a0, 0x4, 
0x8139158) + 1d
 0810ccd2 __sanitizer::internal_fork() () + 12
```
This seems no wonder given that `sanitizer_common/sanitizer_solaris.cpp` has
```
void FutexWait(atomic_uint32_t *p, u32 cmp) {
  // FIXME: implement actual blocking.
  sched_yield();
}
```
`sanitizer_mac.cpp` is the same, btw., and even `sanitizer_linux.cpp` has
```
#  if !SANITIZER_SOLARIS
void FutexWait(atomic_uint32_t *p, u32 cmp) {
#if SANITIZER_FREEBSD
  _umtx_op(p, UMTX_OP_WAIT_UINT, cmp, 0, 0);
#elif SANITIZER_NETBSD
  sched_yield(); /* No userspace futex-like synchronization */
#else
  internal_syscall(SYSCALL(futex), (uptr)p, FUTEX_WAIT_PRIVATE, cmp, 0, 0, 0);
#endif
}
```
so even NetBSD would be affected.

https://github.com/llvm/llvm-project/pull/75290
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [OpenMP] Introduce -fopenmp-force-usm flag (PR #75468)

2023-12-15 Thread Jan Patrick Lehr via cfe-commits


https://github.com/jplehr updated 
https://github.com/llvm/llvm-project/pull/75468

>From 4ecd07d786a5a994b33b9177d4e21d839bfe3fc9 Mon Sep 17 00:00:00 2001
From: JP Lehr 
Date: Thu, 6 Jul 2023 16:47:21 -0400
Subject: [PATCH] [OpenMP] Introduce -fopenmp-force-usm flag

The new flag implements logic to include #pragma omp requires
unified_shared_memory in every translation unit.
This enables a straightforward way to enable USM for an application
without the need to modify sources.
---
 clang/include/clang/Driver/Options.td|  2 ++
 clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp | 16 
 clang/lib/Headers/CMakeLists.txt |  1 +
 .../lib/Headers/openmp_wrappers/usm/force_usm.h  |  6 ++
 4 files changed, 25 insertions(+)
 create mode 100644 clang/lib/Headers/openmp_wrappers/usm/force_usm.h

diff --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 1b02087425b751..73325d5620cc10 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -3381,6 +3381,8 @@ def fopenmp_cuda_blocks_per_sm_EQ : Joined<["-"], 
"fopenmp-cuda-blocks-per-sm=">
   Flags<[NoArgumentUnused, HelpHidden]>, Visibility<[ClangOption, CC1Option]>;
 def fopenmp_cuda_teams_reduction_recs_num_EQ : Joined<["-"], 
"fopenmp-cuda-teams-reduction-recs-num=">, Group,
   Flags<[NoArgumentUnused, HelpHidden]>, Visibility<[ClangOption, CC1Option]>;
+def fopenmp_force_usm : Flag<["-"], "fopenmp-force-usm">, Group,
+  Flags<[NoArgumentUnused, HelpHidden]>, Visibility<[ClangOption, CC1Option]>;
 
 
//===--===//
 // Shared cc1 + fc1 OpenMP Target Options
diff --git a/clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp 
b/clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
index b012b7cb729378..a077f2f06d7728 100644
--- a/clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
+++ b/clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
@@ -129,6 +129,22 @@ AMDGPUOpenMPToolChain::GetCXXStdlibType(const ArgList 
&Args) const {
 void AMDGPUOpenMPToolChain::AddClangSystemIncludeArgs(
 const ArgList &DriverArgs, ArgStringList &CC1Args) const {
   HostTC.AddClangSystemIncludeArgs(DriverArgs, CC1Args);
+
+  CC1Args.push_back("-internal-isystem");
+  SmallString<128> P(HostTC.getDriver().ResourceDir);
+  llvm::sys::path::append(P, "include/cuda_wrappers");
+  CC1Args.push_back(DriverArgs.MakeArgString(P));
+
+  // Force USM mode will forcefully include #pragma omp requires
+  // unified_shared_memory via the force_usm header
+  // XXX This may result in a compilation error if the source
+  // file already includes that pragma.
+  if (DriverArgs.hasArg(options::OPT_fopenmp_force_usm)) {
+CC1Args.push_back("-include");
+CC1Args.push_back(
+DriverArgs.MakeArgString(HostTC.getDriver().ResourceDir +
+ "/include/openmp_wrappers/force_usm.h"));
+  }
 }
 
 void AMDGPUOpenMPToolChain::AddIAMCUIncludeArgs(const ArgList &Args,
diff --git a/clang/lib/Headers/CMakeLists.txt b/clang/lib/Headers/CMakeLists.txt
index f8fdd402777e48..aac232fa8b4405 100644
--- a/clang/lib/Headers/CMakeLists.txt
+++ b/clang/lib/Headers/CMakeLists.txt
@@ -319,6 +319,7 @@ set(openmp_wrapper_files
   openmp_wrappers/__clang_openmp_device_functions.h
   openmp_wrappers/complex_cmath.h
   openmp_wrappers/new
+  openmp_wrappers/usm/force_usm.h
 )
 
 set(llvm_libc_wrapper_files
diff --git a/clang/lib/Headers/openmp_wrappers/usm/force_usm.h 
b/clang/lib/Headers/openmp_wrappers/usm/force_usm.h
new file mode 100644
index 00..15c394e27ce9c2
--- /dev/null
+++ b/clang/lib/Headers/openmp_wrappers/usm/force_usm.h
@@ -0,0 +1,6 @@
+#ifndef __CLANG_FORCE_OPENMP_USM
+#define __CLANG_FORCE_OPENMP_USM
+
+#pragma omp requires unified_shared_memory
+
+#endif

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [X86] Emit Warnings for frontend options to enable knl/knm. (PR #75580)

2023-12-15 Thread Freddy Ye via cfe-commits


https://github.com/FreddyLeaf created 
https://github.com/llvm/llvm-project/pull/75580

Since Knight Landing and Knight Mill microarchitectures are EOL, we
would like to remove its support in LLVM 19. In LLVM 18, we will first
emit a warning for the usage.


>From e16afbdc9f0c04bad0e8f80f90c0eb26c13d3326 Mon Sep 17 00:00:00 2001
From: Freddy Ye 
Date: Fri, 15 Dec 2023 16:50:23 +0800
Subject: [PATCH] [X86] Emit Warnings for frontend options to enable knl/knm.

Since Knight Landing and Knight Mill microarchitectures are EOL, we
would like to remove its support in LLVM 19. In LLVM 18, we will first
emit a warning for the usage.
---
 clang/include/clang/Basic/DiagnosticCommonKinds.td |  2 ++
 clang/lib/Basic/Targets/X86.cpp|  3 +++
 clang/test/CodeGen/X86/avx512er-builtins.c |  2 +-
 clang/test/CodeGen/X86/avx512pf-builtins.c |  2 +-
 clang/test/Driver/cl-x86-flags.c   | 10 --
 clang/test/Frontend/x86-target-cpu.c   | 10 --
 clang/test/Misc/warning-flags.c|  3 ++-
 7 files changed, 25 insertions(+), 7 deletions(-)

diff --git a/clang/include/clang/Basic/DiagnosticCommonKinds.td 
b/clang/include/clang/Basic/DiagnosticCommonKinds.td
index 65a33f61a6948a..40841e9df547bc 100644
--- a/clang/include/clang/Basic/DiagnosticCommonKinds.td
+++ b/clang/include/clang/Basic/DiagnosticCommonKinds.td
@@ -349,6 +349,8 @@ def warn_invalid_feature_combination : Warning<
 def warn_target_unrecognized_env : Warning<
   "mismatch between architecture and environment in target triple '%0'; did 
you mean '%1'?">,
   InGroup;
+def warn_knl_knm_target_supports_remove : Warning<
+  "KNL/KNM's feature support will be removed in LLVM 19.">;
 
 // Source manager
 def err_cannot_open_file : Error<"cannot open file '%0': %1">, DefaultFatal;
diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index b97f88647fa49f..dc56524d378104 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -295,11 +295,13 @@ bool 
X86TargetInfo::handleTargetFeatures(std::vector &Features,
   HasAVX512BF16 = true;
 } else if (Feature == "+avx512er") {
   HasAVX512ER = true;
+  Diags.Report(diag::warn_knl_knm_target_supports_remove);
 } else if (Feature == "+avx512fp16") {
   HasAVX512FP16 = true;
   HasLegalHalfType = true;
 } else if (Feature == "+avx512pf") {
   HasAVX512PF = true;
+  Diags.Report(diag::warn_knl_knm_target_supports_remove);
 } else if (Feature == "+avx512dq") {
   HasAVX512DQ = true;
 } else if (Feature == "+avx512bitalg") {
@@ -358,6 +360,7 @@ bool 
X86TargetInfo::handleTargetFeatures(std::vector &Features,
   HasPREFETCHI = true;
 } else if (Feature == "+prefetchwt1") {
   HasPREFETCHWT1 = true;
+  Diags.Report(diag::warn_knl_knm_target_supports_remove);
 } else if (Feature == "+clzero") {
   HasCLZERO = true;
 } else if (Feature == "+cldemote") {
diff --git a/clang/test/CodeGen/X86/avx512er-builtins.c 
b/clang/test/CodeGen/X86/avx512er-builtins.c
index ee31236a3c01aa..11ec6aabec1e3f 100644
--- a/clang/test/CodeGen/X86/avx512er-builtins.c
+++ b/clang/test/CodeGen/X86/avx512er-builtins.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s 
-triple=x86_64-apple-darwin -target-feature +avx512f -target-feature +avx512er 
-emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s 
-triple=x86_64-apple-darwin -target-feature +avx512f -target-feature +avx512er 
-emit-llvm -o - -Wall | FileCheck %s
 
 
 #include 
diff --git a/clang/test/CodeGen/X86/avx512pf-builtins.c 
b/clang/test/CodeGen/X86/avx512pf-builtins.c
index 4ca70f5787968b..3a117ed6a9460e 100644
--- a/clang/test/CodeGen/X86/avx512pf-builtins.c
+++ b/clang/test/CodeGen/X86/avx512pf-builtins.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s 
-triple=x86_64-apple-darwin -target-feature +avx512pf -emit-llvm -o - -Wall 
-Werror | FileCheck %s
+// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s 
-triple=x86_64-apple-darwin -target-feature +avx512pf -emit-llvm -o - -Wall | 
FileCheck %s
 
 
 #include 
diff --git a/clang/test/Driver/cl-x86-flags.c b/clang/test/Driver/cl-x86-flags.c
index 51b16f0ce35463..ae35a312fe8a4b 100644
--- a/clang/test/Driver/cl-x86-flags.c
+++ b/clang/test/Driver/cl-x86-flags.c
@@ -69,7 +69,10 @@
 // RUN: %clang_cl -m32 -arch:avx2 --target=i386-pc-windows -### -- 2>&1 %s | 
FileCheck -check-prefix=avx2 %s
 // avx2: invalid /arch: argument
 
-// RUN: %clang_cl -m32 -arch:AVX512F --target=i386-pc-windows /c /Fo%t.obj 
-Xclang -verify -DTEST_32_ARCH_AVX512F -- %s
+// RUN: %clang_cl -m32 -arch:AVX512F --target=i386-pc-windows /c /Fo%t.obj 
-Xclang -verify=KNL1 -DTEST_32_ARCH_AVX512F -- %s
+// KNL1-warning@*:* {{KNL/KNM's feature support will be removed in LLVM 19.}}
+// KNL1-warning@*:* {{KNL/KNM's feature supp

[clang] [X86] Emit Warnings for frontend options to enable knl/knm. (PR #75580)

2023-12-15 Thread via cfe-commits


llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Freddy Ye (FreddyLeaf)


Changes

Since Knight Landing and Knight Mill microarchitectures are EOL, we
would like to remove its support in LLVM 19. In LLVM 18, we will first
emit a warning for the usage.


---
Full diff: https://github.com/llvm/llvm-project/pull/75580.diff


7 Files Affected:

- (modified) clang/include/clang/Basic/DiagnosticCommonKinds.td (+2) 
- (modified) clang/lib/Basic/Targets/X86.cpp (+3) 
- (modified) clang/test/CodeGen/X86/avx512er-builtins.c (+1-1) 
- (modified) clang/test/CodeGen/X86/avx512pf-builtins.c (+1-1) 
- (modified) clang/test/Driver/cl-x86-flags.c (+8-2) 
- (modified) clang/test/Frontend/x86-target-cpu.c (+8-2) 
- (modified) clang/test/Misc/warning-flags.c (+2-1) 


``diff
diff --git a/clang/include/clang/Basic/DiagnosticCommonKinds.td 
b/clang/include/clang/Basic/DiagnosticCommonKinds.td
index 65a33f61a6948a..40841e9df547bc 100644
--- a/clang/include/clang/Basic/DiagnosticCommonKinds.td
+++ b/clang/include/clang/Basic/DiagnosticCommonKinds.td
@@ -349,6 +349,8 @@ def warn_invalid_feature_combination : Warning<
 def warn_target_unrecognized_env : Warning<
   "mismatch between architecture and environment in target triple '%0'; did 
you mean '%1'?">,
   InGroup;
+def warn_knl_knm_target_supports_remove : Warning<
+  "KNL/KNM's feature support will be removed in LLVM 19.">;
 
 // Source manager
 def err_cannot_open_file : Error<"cannot open file '%0': %1">, DefaultFatal;
diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index b97f88647fa49f..dc56524d378104 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -295,11 +295,13 @@ bool 
X86TargetInfo::handleTargetFeatures(std::vector &Features,
   HasAVX512BF16 = true;
 } else if (Feature == "+avx512er") {
   HasAVX512ER = true;
+  Diags.Report(diag::warn_knl_knm_target_supports_remove);
 } else if (Feature == "+avx512fp16") {
   HasAVX512FP16 = true;
   HasLegalHalfType = true;
 } else if (Feature == "+avx512pf") {
   HasAVX512PF = true;
+  Diags.Report(diag::warn_knl_knm_target_supports_remove);
 } else if (Feature == "+avx512dq") {
   HasAVX512DQ = true;
 } else if (Feature == "+avx512bitalg") {
@@ -358,6 +360,7 @@ bool 
X86TargetInfo::handleTargetFeatures(std::vector &Features,
   HasPREFETCHI = true;
 } else if (Feature == "+prefetchwt1") {
   HasPREFETCHWT1 = true;
+  Diags.Report(diag::warn_knl_knm_target_supports_remove);
 } else if (Feature == "+clzero") {
   HasCLZERO = true;
 } else if (Feature == "+cldemote") {
diff --git a/clang/test/CodeGen/X86/avx512er-builtins.c 
b/clang/test/CodeGen/X86/avx512er-builtins.c
index ee31236a3c01aa..11ec6aabec1e3f 100644
--- a/clang/test/CodeGen/X86/avx512er-builtins.c
+++ b/clang/test/CodeGen/X86/avx512er-builtins.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s 
-triple=x86_64-apple-darwin -target-feature +avx512f -target-feature +avx512er 
-emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s 
-triple=x86_64-apple-darwin -target-feature +avx512f -target-feature +avx512er 
-emit-llvm -o - -Wall | FileCheck %s
 
 
 #include 
diff --git a/clang/test/CodeGen/X86/avx512pf-builtins.c 
b/clang/test/CodeGen/X86/avx512pf-builtins.c
index 4ca70f5787968b..3a117ed6a9460e 100644
--- a/clang/test/CodeGen/X86/avx512pf-builtins.c
+++ b/clang/test/CodeGen/X86/avx512pf-builtins.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s 
-triple=x86_64-apple-darwin -target-feature +avx512pf -emit-llvm -o - -Wall 
-Werror | FileCheck %s
+// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s 
-triple=x86_64-apple-darwin -target-feature +avx512pf -emit-llvm -o - -Wall | 
FileCheck %s
 
 
 #include 
diff --git a/clang/test/Driver/cl-x86-flags.c b/clang/test/Driver/cl-x86-flags.c
index 51b16f0ce35463..ae35a312fe8a4b 100644
--- a/clang/test/Driver/cl-x86-flags.c
+++ b/clang/test/Driver/cl-x86-flags.c
@@ -69,7 +69,10 @@
 // RUN: %clang_cl -m32 -arch:avx2 --target=i386-pc-windows -### -- 2>&1 %s | 
FileCheck -check-prefix=avx2 %s
 // avx2: invalid /arch: argument
 
-// RUN: %clang_cl -m32 -arch:AVX512F --target=i386-pc-windows /c /Fo%t.obj 
-Xclang -verify -DTEST_32_ARCH_AVX512F -- %s
+// RUN: %clang_cl -m32 -arch:AVX512F --target=i386-pc-windows /c /Fo%t.obj 
-Xclang -verify=KNL1 -DTEST_32_ARCH_AVX512F -- %s
+// KNL1-warning@*:* {{KNL/KNM's feature support will be removed in LLVM 19.}}
+// KNL1-warning@*:* {{KNL/KNM's feature support will be removed in LLVM 19.}}
+// KNL1-warning@*:* {{KNL/KNM's feature support will be removed in LLVM 19.}}
 #if defined(TEST_32_ARCH_AVX512F)
 #if _M_IX86_FP != 2 || !__AVX__ || !__AVX2__ || !__AVX512F__  || __AVX512BW__
 #error fail
@@ -109,7 +112,10 @@
 // RUN: %clang_cl -m64 -arch:avx2 --target=x86_64-pc-windows -### -- 2>&1 %s | 
FileC

[clang] [clang][dataflow] Fix an issue with `Environment::getResultObjectLocation()`. (PR #75483)

2023-12-15 Thread via cfe-commits

@@ -726,27 +726,69 @@ void Environment::setStorageLocation(const Expr &E, 
StorageLocation &Loc) {
   // so allow these as an exception.
   assert(E.isGLValue() ||
  E.getType()->isSpecificBuiltinType(BuiltinType::BuiltinFn));
-  setStorageLocationInternal(E, Loc);
+  const Expr &CanonE = ignoreCFGOmittedNodes(E);
+  assert(!ExprToLoc.contains(&CanonE));
+  ExprToLoc[&CanonE] = &Loc;
 }

 StorageLocation *Environment::getStorageLocation(const Expr &E) const {
   // See comment in `setStorageLocation()`.
   assert(E.isGLValue() ||
  E.getType()->isSpecificBuiltinType(BuiltinType::BuiltinFn));
-  return getStorageLocationInternal(E);
+  auto It = ExprToLoc.find(&ignoreCFGOmittedNodes(E));
+  return It == ExprToLoc.end() ? nullptr : &*It->second;
+}
+
+// Returns whether a prvalue of record type is the one that originally
+// constructs the object (i.e. it doesn't propagate it from one of its
+// children).
+static bool isOriginalRecordConstructor(const Expr &RecordPRValue) {

martinboehme wrote:

> I am wondering whether it is better to enumerate the "transparent" AST nodes 
> where we need to do the propagation. My questions are:
> 
> * Roughly how many such transparent nodes do we have?

[This 
function](https://github.com/google/crubit/blob/f2bba114d350a0e3c59676504e02047a74637b20/lifetime_analysis/object_repository.cc#L316)
 in the Crubit lifetime analysis gives a rough idea. It does essentially what 
the FIXME in the documentation for `getResultObjectLocation()` says we 
eventually want to do also in the framework.

>From this, we see that there are more "transparent" nodes than "is original 
>record constructor" nodes. Also, the "is original record constructor" nodes 
>are the ones for which we know that the framework produces a `RecordValue` -- 
>so it seemed to make more sense to enumerate those.

> * In case we miss something, is it less desirable to erroneously propagate 
> something or to erroneously create a new PRValue?

I think it's a wash. In both cases:

* We will hit one of the assertions (or will perform the fallback behavior in 
non-assertion compiles)
* We will model the behavior of the code incorrectly. I don't think one of the 
two variants of wrong behavior will clearly be more benign in all cases -- I 
think there are some cases where we would prefer one variant and some cases 
where we would prefer the other, but of course ultimately we should fix such 
errors anyway.

https://github.com/llvm/llvm-project/pull/75483
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][dataflow] Fix an issue with `Environment::getResultObjectLocation()`. (PR #75483)

2023-12-15 Thread via cfe-commits


https://github.com/martinboehme updated 
https://github.com/llvm/llvm-project/pull/75483

>From 3262b0056708614f2a3d68750a0f118508f79ccb Mon Sep 17 00:00:00 2001
From: Martin Braenne 
Date: Thu, 14 Dec 2023 15:43:52 +
Subject: [PATCH 1/4] [clang][dataflow] Fix an issue with
 `Environment::getResultObjectLocation()`.

So far, if there was a chain of record type prvalues,
`getResultObjectLocation()` would assign a different result object location to
each one. This makes no sense, of course, as all of these prvalues end up
initializing the same result object.

This patch fixes this by propagating storage locations up through the entire
chain of prvalues.

The new implementation also has the desirable effect of making it possible to
make `getResultObjectLocation()` const, which seems appropriate given that,
logically, it is just an accessor.
---
 .../FlowSensitive/DataflowEnvironment.h   | 33 ++--
 .../FlowSensitive/DataflowEnvironment.cpp | 77 ++-
 clang/lib/Analysis/FlowSensitive/Transfer.cpp |  9 ++-
 .../Analysis/FlowSensitive/TransferTest.cpp   | 48 
 4 files changed, 120 insertions(+), 47 deletions(-)

diff --git a/clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h 
b/clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
index d7e39ab2616fd9..5943af50b6ad8f 100644
--- a/clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
+++ b/clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
@@ -325,7 +325,8 @@ class Environment {
   ///
   /// Requirements:
   ///  `E` must be a prvalue of record type.
-  RecordStorageLocation &getResultObjectLocation(const Expr &RecordPRValue);
+  RecordStorageLocation &
+  getResultObjectLocation(const Expr &RecordPRValue) const;
 
   /// Returns the return value of the current function. This can be null if:
   /// - The function has a void return type
@@ -434,24 +435,14 @@ class Environment {
 
   /// Assigns `Val` as the value of the prvalue `E` in the environment.
   ///
-  /// If `E` is not yet associated with a storage location, associates it with
-  /// a newly created storage location. In any case, associates the storage
-  /// location of `E` with `Val`.
-  ///
-  /// Once the migration to strict handling of value categories is complete
-  /// (see https://discourse.llvm.org/t/70086), this function will be renamed 
to
-  /// `setValue()`. At this point, prvalue expressions will be associated
-  /// directly with `Value`s, and the legacy behavior of associating prvalue
-  /// expressions with storage locations (as described above) will be
-  /// eliminated.
-  ///
   /// Requirements:
   ///
-  ///  `E` must be a prvalue
-  ///  If `Val` is a `RecordValue`, its `RecordStorageLocation` must be the
-  ///  same as that of any `RecordValue` that has already been associated with
-  ///  `E`. This is to guarantee that the result object initialized by a 
prvalue
-  ///  `RecordValue` has a durable storage location.
+  ///  - `E` must be a prvalue
+  ///  - If `Val` is a `RecordValue`, its `RecordStorageLocation` must be
+  ///`getResultObjectLocation(E)`. An exception to this is if `E` is an
+  ///expression that originally creates a `RecordValue` (such as a
+  ///`CXXConstructExpr` or `CallExpr`), as these establish the location of
+  ///the result object in the first place.
   void setValue(const Expr &E, Value &Val);
 
   /// Returns the value assigned to `Loc` in the environment or null if `Loc`
@@ -608,14 +599,6 @@ class Environment {
   // The copy-constructor is for use in fork() only.
   Environment(const Environment &) = default;
 
-  /// Internal version of `setStorageLocation()` that doesn't check if the
-  /// expression is a prvalue.
-  void setStorageLocationInternal(const Expr &E, StorageLocation &Loc);
-
-  /// Internal version of `getStorageLocation()` that doesn't check if the
-  /// expression is a prvalue.
-  StorageLocation *getStorageLocationInternal(const Expr &E) const;
-
   /// Creates a value appropriate for `Type`, if `Type` is supported, otherwise
   /// return null.
   ///
diff --git a/clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp 
b/clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
index b98037b7364522..12192e6a32dc04 100644
--- a/clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
+++ b/clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
@@ -726,27 +726,69 @@ void Environment::setStorageLocation(const Expr &E, 
StorageLocation &Loc) {
   // so allow these as an exception.
   assert(E.isGLValue() ||
  E.getType()->isSpecificBuiltinType(BuiltinType::BuiltinFn));
-  setStorageLocationInternal(E, Loc);
+  const Expr &CanonE = ignoreCFGOmittedNodes(E);
+  assert(!ExprToLoc.contains(&CanonE));
+  ExprToLoc[&CanonE] = &Loc;
 }
 
 StorageLocation *Environment::getStorageLocation(const Expr &E) const {
   // See comment in `setStorageLocation()`.
   assert(E.isGLValue() ||
  E.getType()->isSpecificBuiltinT

[clang] [X86] Emit Warnings for frontend options to enable knl/knm. (PR #75580)

2023-12-15 Thread Simon Pilgrim via cfe-commits


RKSimon wrote:

Why do you want to remove these? We don't support any of the more exotic 
behaviors of Xeon Phi, but removing a x86 cpu just because its EOL doesn't make 
sense to me.

https://github.com/llvm/llvm-project/pull/75580
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AArch64][SME2] Add FCLAMP, CNTP builtins for SME2 (PR #72487)

2023-12-15 Thread Sander de Smalen via cfe-commits



@@ -8,6 +8,14 @@
 // RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64-none-linux-gnu -target-feature +sve2p1 \
 // RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu 
-target-feature +sme2 -target-feature +sve \
+// RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s
+// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64-none-linux-gnu -target-feature +sme2 -target-feature +sve \
+// RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu 
-target-feature +sme2 -target-feature +sve \
+// RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64-none-linux-gnu -target-feature +sme2 -target-feature +sve \
+// RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu 
-target-feature +sve2p1 \
 // RUN:   -S -disable-O0-optnone -Werror -Wall -o /dev/null %s

sdesmalen-arm wrote:

For instructions that are available for both SVE2p1 and SME2, I think it is 
sufficient to only duplicate this specific RUN line (which checks we can 
compile end-to-end) and replace `-target-feature +sve2p1` with `-target-feature 
+sve -target-feature +sme2`.

There is probably no need to duplicate the other run lines, so please remove 
those.

https://github.com/llvm/llvm-project/pull/72487
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[llvm] [clang] [clang-tools-extra] [clang] Fix false positive -Wmissing-field-initializer for anonymous unions (PR #70829)

2023-12-15 Thread via cfe-commits


mikaelholmen wrote:

Hi @Fznamznon and others!

It looks like this patch not only avoids a false positive, but it also causes 
warnigns on stuff it didn't warn on before.
So if I add the following to clang/test/Sema/missing-field-initializers.c
```
struct S1 {
  long int l;
  struct  { int a, b; } d1;
};

struct S1 s01 = { 1, {1} }; // expected-warning {{missing field 'b' 
initializer}}
struct S1 s02 = { .d1.a = 1 };

union U1 {
  long int l;
  struct  { int a, b; } d1;
};

union U1 u01 = { 1 };
union U1 u02 = { .d1.a = 1 };
```
Without the patch it's silent, but with the patch I get
```
  File /repo/uabelho/main-github/clang/test/Sema/missing-field-initializers.c 
Line 11: missing field 'b' initializer
  File /repo/uabelho/main-github/clang/test/Sema/missing-field-initializers.c 
Line 19: missing field 'b' initializer
```
so it warns on
```
struct S1 s02 = { .d1.a = 1 };
```
and
```
union U1 u02 = { .d1.a = 1 };
```
I suppose this is not as expected?

We see thousands of warnings like this with our downstream compiler.

https://github.com/llvm/llvm-project/pull/70829
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AArch64][SME2] Add SME2 MLA/MLS builtins. (PR #75584)

2023-12-15 Thread via cfe-commits


llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Dinar Temirbulatov (dtemirbulatov)


Changes

Add SME2 MLA/MLS builtins.

---

Patch is 291.39 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/75584.diff


5 Files Affected:

- (modified) clang/include/clang/Basic/arm_sme.td (+217) 
- (modified) clang/lib/CodeGen/CGBuiltin.cpp (+25) 
- (added) clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlal.c (+760) 
- (added) clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlall.c (+1950) 
- (added) clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlsl.c (+760) 


``diff
diff --git a/clang/include/clang/Basic/arm_sme.td 
b/clang/include/clang/Basic/arm_sme.td
index fcff6fe35b7ba3..40256544c7bbc6 100644
--- a/clang/include/clang/Basic/arm_sme.td
+++ b/clang/include/clang/Basic/arm_sme.td
@@ -315,6 +315,223 @@ let TargetGuard = "sme2" in {
   def SVBMOPS : Inst<"svbmops_za32[_{d}]_m", "viPPdd", "iUi", MergeNone, 
"aarch64_sme_bmops_za32", [IsSharedZA, IsStreaming], [ImmCheck<0, 
ImmCheck0_3>]>;
 }
 
+// FMLA/FMLS
+let TargetGuard = "sme2" in {
+  def SVMLA_MULTI_VG1x2_F32 : Inst<"svmla_za32[_{d}]_vg1x2", "vm22", "f", 
MergeNone, "aarch64_sme_fmla_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLA_MULTI_VG1x4_F32 : Inst<"svmla_za32[_{d}]_vg1x4", "vm44", "f", 
MergeNone, "aarch64_sme_fmla_vg1x4", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_MULTI_VG1x2_F32 : Inst<"svmls_za32[_{d}]_vg1x2", "vm22", "f", 
MergeNone, "aarch64_sme_fmls_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_MULTI_VG1x4_F32 : Inst<"svmls_za32[_{d}]_vg1x4", "vm44", "f", 
MergeNone, "aarch64_sme_fmls_vg1x4", [IsStreaming, IsSharedZA], []>;
+
+  def SVMLA_SINGLE_VG1x2_F32 : Inst<"svmla[_single]_za32[_{d}]_vg1x2", "vm2d", 
"f", MergeNone, "aarch64_sme_fmla_single_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLA_SINGLE_VG1x4_F32 : Inst<"svmla[_single]_za32[_{d}]_vg1x4", "vm4d", 
"f", MergeNone, "aarch64_sme_fmla_single_vg1x4", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_SINGLE_VG1x2_F32 : Inst<"svmls[_single]_za32[_{d}]_vg1x2", "vm2d", 
"f", MergeNone, "aarch64_sme_fmls_single_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_SINGLE_VG1x4_F32 : Inst<"svmls[_single]_za32[_{d}]_vg1x4", "vm4d", 
"f", MergeNone, "aarch64_sme_fmls_single_vg1x4", [IsStreaming, IsSharedZA], []>;
+
+  def SVMLA_LANE_VG1x2_F32 : Inst<"svmla_lane_za32[_{d}]_vg1x2", "vm2di", "f", 
MergeNone, "aarch64_sme_fmla_lane_vg1x2", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_3>]>;
+  def SVMLA_LANE_VG1x4_F32 : Inst<"svmla_lane_za32[_{d}]_vg1x4", "vm4di", "f", 
MergeNone, "aarch64_sme_fmla_lane_vg1x4", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_3>]>;
+  def SVMLS_LANE_VG1x2_F32 : Inst<"svmls_lane_za32[_{d}]_vg1x2", "vm2di", "f", 
MergeNone, "aarch64_sme_fmls_lane_vg1x2", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_3>]>;
+  def SVMLS_LANE_VG1x4_F32 : Inst<"svmls_lane_za32[_{d}]_vg1x4", "vm4di", "f", 
MergeNone, "aarch64_sme_fmls_lane_vg1x4", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_3>]>;
+}
+
+let TargetGuard = "sme2,sme-f64f64" in {
+  def SVMLA_MULTI_VG1x2_F64 : Inst<"svmla_za64[_{d}]_vg1x2", "vm22", "d", 
MergeNone, "aarch64_sme_fmla_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLA_MULTI_VG1x4_F64 : Inst<"svmla_za64[_{d}]_vg1x4", "vm44", "d", 
MergeNone, "aarch64_sme_fmla_vg1x4", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_MULTI_VG1x2_F64 : Inst<"svmls_za64[_{d}]_vg1x2", "vm22", "d", 
MergeNone, "aarch64_sme_fmls_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_MULTI_VG1x4_F64 : Inst<"svmls_za64[_{d}]_vg1x4", "vm44", "d", 
MergeNone, "aarch64_sme_fmls_vg1x4", [IsStreaming, IsSharedZA], []>;
+
+  def SVMLA_SINGLE_VG1x2_F64 : Inst<"svmla[_single]_za64[_{d}]_vg1x2", "vm2d", 
"d", MergeNone, "aarch64_sme_fmla_single_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLA_SINGLE_VG1x4_F64 : Inst<"svmla[_single]_za64[_{d}]_vg1x4", "vm4d", 
"d", MergeNone, "aarch64_sme_fmla_single_vg1x4", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_SINGLE_VG1x2_F64 : Inst<"svmls[_single]_za64[_{d}]_vg1x2", "vm2d", 
"d", MergeNone, "aarch64_sme_fmls_single_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_SINGLE_VG1x4_F64 : Inst<"svmls[_single]_za64[_{d}]_vg1x4", "vm4d", 
"d", MergeNone, "aarch64_sme_fmls_single_vg1x4", [IsStreaming, IsSharedZA], []>;
+
+  def SVMLA_LANE_VG1x2_F64 : Inst<"svmla_lane_za64[_{d}]_vg1x2", "vm2di", "d", 
MergeNone, "aarch64_sme_fmla_lane_vg1x2", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_1>]>;
+  def SVMLA_LANE_VG1x4_F64 : Inst<"svmla_lane_za64[_{d}]_vg1x4", "vm4di", "d", 
MergeNone, "aarch64_sme_fmla_lane_vg1x4", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_1>]>;
+  def SVMLS_LANE_VG1x2_F64 : Inst<"svmls_lane_za64[_{d}]_vg1x2", "vm2di", "d", 
MergeNone, "aarch64_sme_fmls_lane_vg1x2", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_1>]>;
+  def SVMLS_LANE_VG1x4_F64 : Inst<"svmls_lane_za64[_{d}]_vg1x4", "vm4di", "d", 
MergeNone, "aarch64_sme_fmls_

[clang] [AArch64][SME2] Add SME2 MLA/MLS builtins. (PR #75584)

2023-12-15 Thread via cfe-commits


llvmbot wrote:




@llvm/pr-subscribers-clang-codegen

Author: Dinar Temirbulatov (dtemirbulatov)


Changes

Add SME2 MLA/MLS builtins.

---

Patch is 291.39 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/75584.diff


5 Files Affected:

- (modified) clang/include/clang/Basic/arm_sme.td (+217) 
- (modified) clang/lib/CodeGen/CGBuiltin.cpp (+25) 
- (added) clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlal.c (+760) 
- (added) clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlall.c (+1950) 
- (added) clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlsl.c (+760) 


``diff
diff --git a/clang/include/clang/Basic/arm_sme.td 
b/clang/include/clang/Basic/arm_sme.td
index fcff6fe35b7ba3..40256544c7bbc6 100644
--- a/clang/include/clang/Basic/arm_sme.td
+++ b/clang/include/clang/Basic/arm_sme.td
@@ -315,6 +315,223 @@ let TargetGuard = "sme2" in {
   def SVBMOPS : Inst<"svbmops_za32[_{d}]_m", "viPPdd", "iUi", MergeNone, 
"aarch64_sme_bmops_za32", [IsSharedZA, IsStreaming], [ImmCheck<0, 
ImmCheck0_3>]>;
 }
 
+// FMLA/FMLS
+let TargetGuard = "sme2" in {
+  def SVMLA_MULTI_VG1x2_F32 : Inst<"svmla_za32[_{d}]_vg1x2", "vm22", "f", 
MergeNone, "aarch64_sme_fmla_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLA_MULTI_VG1x4_F32 : Inst<"svmla_za32[_{d}]_vg1x4", "vm44", "f", 
MergeNone, "aarch64_sme_fmla_vg1x4", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_MULTI_VG1x2_F32 : Inst<"svmls_za32[_{d}]_vg1x2", "vm22", "f", 
MergeNone, "aarch64_sme_fmls_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_MULTI_VG1x4_F32 : Inst<"svmls_za32[_{d}]_vg1x4", "vm44", "f", 
MergeNone, "aarch64_sme_fmls_vg1x4", [IsStreaming, IsSharedZA], []>;
+
+  def SVMLA_SINGLE_VG1x2_F32 : Inst<"svmla[_single]_za32[_{d}]_vg1x2", "vm2d", 
"f", MergeNone, "aarch64_sme_fmla_single_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLA_SINGLE_VG1x4_F32 : Inst<"svmla[_single]_za32[_{d}]_vg1x4", "vm4d", 
"f", MergeNone, "aarch64_sme_fmla_single_vg1x4", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_SINGLE_VG1x2_F32 : Inst<"svmls[_single]_za32[_{d}]_vg1x2", "vm2d", 
"f", MergeNone, "aarch64_sme_fmls_single_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_SINGLE_VG1x4_F32 : Inst<"svmls[_single]_za32[_{d}]_vg1x4", "vm4d", 
"f", MergeNone, "aarch64_sme_fmls_single_vg1x4", [IsStreaming, IsSharedZA], []>;
+
+  def SVMLA_LANE_VG1x2_F32 : Inst<"svmla_lane_za32[_{d}]_vg1x2", "vm2di", "f", 
MergeNone, "aarch64_sme_fmla_lane_vg1x2", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_3>]>;
+  def SVMLA_LANE_VG1x4_F32 : Inst<"svmla_lane_za32[_{d}]_vg1x4", "vm4di", "f", 
MergeNone, "aarch64_sme_fmla_lane_vg1x4", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_3>]>;
+  def SVMLS_LANE_VG1x2_F32 : Inst<"svmls_lane_za32[_{d}]_vg1x2", "vm2di", "f", 
MergeNone, "aarch64_sme_fmls_lane_vg1x2", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_3>]>;
+  def SVMLS_LANE_VG1x4_F32 : Inst<"svmls_lane_za32[_{d}]_vg1x4", "vm4di", "f", 
MergeNone, "aarch64_sme_fmls_lane_vg1x4", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_3>]>;
+}
+
+let TargetGuard = "sme2,sme-f64f64" in {
+  def SVMLA_MULTI_VG1x2_F64 : Inst<"svmla_za64[_{d}]_vg1x2", "vm22", "d", 
MergeNone, "aarch64_sme_fmla_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLA_MULTI_VG1x4_F64 : Inst<"svmla_za64[_{d}]_vg1x4", "vm44", "d", 
MergeNone, "aarch64_sme_fmla_vg1x4", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_MULTI_VG1x2_F64 : Inst<"svmls_za64[_{d}]_vg1x2", "vm22", "d", 
MergeNone, "aarch64_sme_fmls_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_MULTI_VG1x4_F64 : Inst<"svmls_za64[_{d}]_vg1x4", "vm44", "d", 
MergeNone, "aarch64_sme_fmls_vg1x4", [IsStreaming, IsSharedZA], []>;
+
+  def SVMLA_SINGLE_VG1x2_F64 : Inst<"svmla[_single]_za64[_{d}]_vg1x2", "vm2d", 
"d", MergeNone, "aarch64_sme_fmla_single_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLA_SINGLE_VG1x4_F64 : Inst<"svmla[_single]_za64[_{d}]_vg1x4", "vm4d", 
"d", MergeNone, "aarch64_sme_fmla_single_vg1x4", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_SINGLE_VG1x2_F64 : Inst<"svmls[_single]_za64[_{d}]_vg1x2", "vm2d", 
"d", MergeNone, "aarch64_sme_fmls_single_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_SINGLE_VG1x4_F64 : Inst<"svmls[_single]_za64[_{d}]_vg1x4", "vm4d", 
"d", MergeNone, "aarch64_sme_fmls_single_vg1x4", [IsStreaming, IsSharedZA], []>;
+
+  def SVMLA_LANE_VG1x2_F64 : Inst<"svmla_lane_za64[_{d}]_vg1x2", "vm2di", "d", 
MergeNone, "aarch64_sme_fmla_lane_vg1x2", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_1>]>;
+  def SVMLA_LANE_VG1x4_F64 : Inst<"svmla_lane_za64[_{d}]_vg1x4", "vm4di", "d", 
MergeNone, "aarch64_sme_fmla_lane_vg1x4", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_1>]>;
+  def SVMLS_LANE_VG1x2_F64 : Inst<"svmls_lane_za64[_{d}]_vg1x2", "vm2di", "d", 
MergeNone, "aarch64_sme_fmls_lane_vg1x2", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_1>]>;
+  def SVMLS_LANE_VG1x4_F64 : Inst<"svmls_lane_za64[_{d}]_vg1x4", "vm4di", "d", 
MergeNone, "aarch64_s

[clang] [AArch64][SME2] Add SME2 MLA/MLS builtins. (PR #75584)

2023-12-15 Thread via cfe-commits


github-actions[bot] wrote:




:warning: C/C++ code formatter, clang-format found issues in your code. 
:warning:



You can test this locally with the following command:


``bash
git-clang-format --diff ed4194bb8dbca5222628c2cddbc032fff57193b5 
222104ad4d5eb037b5ffd9af8e49c26edcb20a76 -- 
clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlal.c 
clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlall.c 
clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlsl.c 
clang/lib/CodeGen/CGBuiltin.cpp
``





View the diff from clang-format here.


``diff
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index ad39c1274e..5f083fcfd0 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -10475,7 +10475,7 @@ Value 
*CodeGenFunction::EmitAArch64SVEBuiltinExpr(unsigned BuiltinID,
 }
 
 static void swapCommutativeSMEOperands(unsigned BuiltinID,
-   SmallVectorImpl &Ops) {
+   SmallVectorImpl &Ops) {
   unsigned MultiVec;
   switch (BuiltinID) {
   default:

``




https://github.com/llvm/llvm-project/pull/75584
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][AArch64]Add QCVTN builtin to SVE2.1 (PR #75454)

2023-12-15 Thread Kerry McLaughlin via cfe-commits


https://github.com/kmclaughlin-arm approved this pull request.


https://github.com/llvm/llvm-project/pull/75454
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][wasm] Resolve assertion errors caused by converting ComplexTy… (PR #70496)

2023-12-15 Thread Vlad Serebrennikov via cfe-commits



@@ -0,0 +1,9 @@
+// RUN: %clang --target=wasm32 -mmultivalue -Xclang -target-abi -Xclang 
experimental-mv %s -S -Xclang -verify
+
+float crealf() { return 0;} // expected-no-diagnostics

Endilll wrote:

Single `expected-no-diagnostics` is sufficient for the whole file

https://github.com/llvm/llvm-project/pull/70496
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [X86] Emit Warnings for frontend options to enable knl/knm. (PR #75580)

2023-12-15 Thread Freddy Ye via cfe-commits


FreddyLeaf wrote:

Let me first paste reasons I listed before:
1. INTEL has officially announced these products’ EOL on about Aug. 2017
1. Even for now, clang/llvm’s supports on these products are incomplete. For 
example, knm targets has AVX5124FMAPS instructions, while its intrinsic and 
assembly support is missing. And it is weird that avx5124fmaps is still listed 
at llvm/include/llvm/TargetParser/X86TargetParser.def.
1. It sometimes leads to bad performance by wrong usage of options.
1. We can claim this change on release notes to notify users intentionally 
support these targets to use older releases.


https://github.com/llvm/llvm-project/pull/75580
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [X86] Emit Warnings for frontend options to enable knl/knm. (PR #75580)

2023-12-15 Thread Freddy Ye via cfe-commits


FreddyLeaf wrote:

And here're two more reasons I collected from gcc:
1. previously ICC and ICX has removed the support and emitted errors
1. we would also like to remove the support in GCC to reduce maintainence 
effort.

https://github.com/llvm/llvm-project/pull/75580
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[llvm] [clang] [clang-tools-extra] [clang] Fix false positive -Wmissing-field-initializer for anonymous unions (PR #70829)

2023-12-15 Thread Mariya Podchishchaeva via cfe-commits


Fznamznon wrote:

@mikaelholmen , thanks for the report. These warnings are kind of expected, 
there is no big difference between `struct S1 s01 = { 1, {1} };` and `struct S1 
s02 = { .d1.a = 1 };` in both cases field `b` of `d1` is not initialized. But 
they are not expected for C, since we aim to silence missing field initializer 
warning for designated initializers in C, just to match gcc behavior. It seems 
the patch broke this "silencing" for nested designators, I'll try to provide 
the fix shortly. If I'm not able, I'll revert. 

https://github.com/llvm/llvm-project/pull/70829
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-tools-extra] [llvm] [clang] Fix false positive -Wmissing-field-initializer for anonymous unions (PR #70829)

2023-12-15 Thread via cfe-commits


mikaelholmen wrote:

> I'll try to provide the fix shortly. If I'm not able, I'll revert.

Sounds good. Thank you!

https://github.com/llvm/llvm-project/pull/70829
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][SVE2.1] Make a part of the name optional for `svwhileXX` builtins with predicate-as-counter (PR #75200)

2023-12-15 Thread Sander de Smalen via cfe-commits



@@ -148,10 +151,10 @@ void test_svpmov_lane(){
   svuint64_t zn_u64;
   svbool_t pn;
 
-  svpmov_lane_u8(zn_u8, -1); // expected-error {{argument value -1 is outside 
the valid range [0, 0]}}
-  svpmov_lane_u16(zn_u16, -1); // expected-error {{argument value -1 is 
outside the valid range [0, 1]}}
-  svpmov_lane_u32(zn_u32, -1); // expected-error {{argument value -1 is 
outside the valid range [0, 3]}}
-  svpmov_lane_u64(zn_u64, -1); // expected-error {{argument value -1 is 
outside the valid range [0, 7]}}
+  svpmov_lane_u8(zn_u8, -1); // expected-error {{argument value 
18446744073709551615 is outside the valid range [0, 0]}}

sdesmalen-arm wrote:

How did this test ever pass? :) is that because of the misspelling in 
`aarch14-registered-target` ?

https://github.com/llvm/llvm-project/pull/75200
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][SVE2.1] Make a part of the name optional for `svwhileXX` builtins with predicate-as-counter (PR #75200)

2023-12-15 Thread Sander de Smalen via cfe-commits



@@ -1,12 +1,20 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S 
-O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S 
-O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s 
-check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sve2p1 -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sve2p1 -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | 
FileCheck %s -check-prefix=CPP-CHECK
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S 
-disable-O0-optnone -Werror -Wall -o /dev/null %s

sdesmalen-arm wrote:

I don't think we need to duplicate all RUN lines for `+sme2`. If we're choosing 
to use a single RUN line, I would like to suggest this one:

```
RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S 
-disable-O0-optnone -Werror -Wall -o /dev/null %s
```
(but with `-target-feature +sve -target-feature +sme2` instead of just 
`-target-feature +sve2p1`)

Because this tests the builtin -> asm flow and ensures we fully support the 
intrinsics end to end. We can probably trust the lowering from C/C++ -> LLVM IR 
to happen the same way as it does for SVE2p1, but if we want to have test 
coverage for that too we could keep one of the other RUN lines you've added in 
the current version of this patch/PR.

https://github.com/llvm/llvm-project/pull/75200
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AArch64][SME2] Add FCLAMP, CNTP builtins for SME2 (PR #72487)

2023-12-15 Thread Dinar Temirbulatov via cfe-commits


https://github.com/dtemirbulatov updated 
https://github.com/llvm/llvm-project/pull/72487

>From 6e2c1015c6cf6b226bc9e28c563167e07b9c4074 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov 
Date: Thu, 16 Nov 2023 07:21:17 +
Subject: [PATCH 1/2] [AArch64][SME2] Add FCLAMP, CNTP builtins for SME2

This change enables FCLAMP, CNTP builtins for SME2 target.
---
 clang/include/clang/Basic/arm_sve.td  | 7 +++
 .../CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c  | 3 +++
 .../aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c| 8 
 3 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/clang/include/clang/Basic/arm_sve.td 
b/clang/include/clang/Basic/arm_sve.td
index aa9b105364a51a..e10076a7663856 100644
--- a/clang/include/clang/Basic/arm_sve.td
+++ b/clang/include/clang/Basic/arm_sve.td
@@ -1953,8 +1953,6 @@ def SVPEXT_X2 : SInst<"svpext_lane_{d}_x2", "2.P}i", 
"QcQsQiQl", MergeNone,
 }
 
 let TargetGuard = "sve2p1" in {
-def SVFCLAMP   : SInst<"svclamp[_{d}]", "", "hfd", MergeNone, 
"aarch64_sve_fclamp", [], []>;
-
 def SVWHILEGE_COUNT  : SInst<"svwhilege_{d}",  "}lli", "QcQsQiQl", MergeNone, 
"aarch64_sve_whilege_{d}", [IsOverloadNone], [ImmCheck<2, ImmCheck2_4_Mul2>]>;
 def SVWHILEGT_COUNT  : SInst<"svwhilegt_{d}",  "}lli", "QcQsQiQl", MergeNone, 
"aarch64_sve_whilegt_{d}", [IsOverloadNone], [ImmCheck<2, ImmCheck2_4_Mul2>]>;
 def SVWHILELE_COUNT  : SInst<"svwhilele_{d}",  "}lli", "QcQsQiQl", MergeNone, 
"aarch64_sve_whilele_{d}", [IsOverloadNone], [ImmCheck<2, ImmCheck2_4_Mul2>]>;
@@ -2054,8 +2052,6 @@ let TargetGuard = "sve2p1" in {
 def SVSCLAMP : SInst<"svclamp[_{d}]", "", "csil", MergeNone, 
"aarch64_sve_sclamp", [], []>;
 def SVUCLAMP : SInst<"svclamp[_{d}]", "", "UcUsUiUl", MergeNone, 
"aarch64_sve_uclamp", [], []>;
 
-def SVCNTP_COUNT : SInst<"svcntp_{d}", "n}i", "QcQsQiQl", MergeNone, 
"aarch64_sve_cntp_{d}", [IsOverloadNone], [ImmCheck<1, ImmCheck2_4_Mul2>]>;
-
 defm SVREVD : SInstZPZ<"svrevd", "csilUcUsUiUl", "aarch64_sve_revd">;
 }
 
@@ -2064,6 +2060,9 @@ let TargetGuard = "sve2p1|sme2" in {
   def SVPTRUE_COUNT  : SInst<"svptrue_{d}", "}v", "QcQsQiQl", MergeNone, 
"aarch64_sve_ptrue_{d}", [IsOverloadNone, IsStreamingCompatible], []>;
 
   def SVPFALSE_COUNT_ALIAS : SInst<"svpfalse_c", "}v", "", MergeNone, "", 
[IsOverloadNone, IsStreamingCompatible]>;
+
+  def SVFCLAMP   : SInst<"svclamp[_{d}]", "", "hfd", MergeNone, 
"aarch64_sve_fclamp", [IsStreamingCompatible], []>;
+  def SVCNTP_COUNT : SInst<"svcntp_{d}", "n}i", "QcQsQiQl", MergeNone, 
"aarch64_sve_cntp_{d}", [IsOverloadNone, IsStreamingCompatible], [ImmCheck<1, 
ImmCheck2_4_Mul2>]>;
 }
 
 let TargetGuard = "sve2p1,b16b16" in {
diff --git a/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c 
b/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c
index 18973a6467450a..01b995c1b05833 100644
--- a/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c
+++ b/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c
@@ -3,6 +3,9 @@
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S 
-O1 -Werror -emit-llvm -o - %s | FileCheck %s
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S 
-O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S 
-disable-O0-optnone -Werror -Wall -o /dev/null %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 
-target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 
-target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s 
-check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 
-target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
 
 #include 
 
diff --git a/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c 
b/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c
index a9f482cab39698..3adb28b8cc71bf 100644
--- a/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c
+++ b/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c
@@ -8,6 +8,14 @@
 // RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64-none-linux-gnu -target-feature +sve2p1 \
 // RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu 
-target-feature +sme2 -target-feature +sve \
+// RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s
+// RUN: %clan

[clang] [Clang][SVE2.1] Make a part of the name optional for `svwhileXX` builtins with predicate-as-counter (PR #75200)

2023-12-15 Thread Momchil Velikov via cfe-commits



@@ -148,10 +151,10 @@ void test_svpmov_lane(){
   svuint64_t zn_u64;
   svbool_t pn;
 
-  svpmov_lane_u8(zn_u8, -1); // expected-error {{argument value -1 is outside 
the valid range [0, 0]}}
-  svpmov_lane_u16(zn_u16, -1); // expected-error {{argument value -1 is 
outside the valid range [0, 1]}}
-  svpmov_lane_u32(zn_u32, -1); // expected-error {{argument value -1 is 
outside the valid range [0, 3]}}
-  svpmov_lane_u64(zn_u64, -1); // expected-error {{argument value -1 is 
outside the valid range [0, 7]}}
+  svpmov_lane_u8(zn_u8, -1); // expected-error {{argument value 
18446744073709551615 is outside the valid range [0, 0]}}

momchil-velikov wrote:

Yes, the test wasn't running. It's fixed in a followup commit. 
https://github.com/llvm/llvm-project/pull/75200/commits/3406e10bac69bd3d091bca6aa368f646fb4506e8

https://github.com/llvm/llvm-project/pull/75200
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][SVE2.1] Make a part of the name optional for `svwhileXX` builtins with predicate-as-counter (PR #75200)

2023-12-15 Thread Momchil Velikov via cfe-commits



@@ -1,12 +1,20 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S 
-O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S 
-O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s 
-check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sve2p1 -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sve2p1 -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | 
FileCheck %s -check-prefix=CPP-CHECK
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S 
-disable-O0-optnone -Werror -Wall -o /dev/null %s

momchil-velikov wrote:

Yes, that's what I approximately did in another patch (not yet uploaded):
```
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 
-target-feature +b16b16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s 
| opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 
-target-feature +b16b16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x 
c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s 
-check-prefix=CPP-CHECK
// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sve2 -target-feature +b16b16 -S -disable-O0-optnone -Werror 
-Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | 
FileCheck %s
// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sve2 -target-feature +b16b16 -S -disable-O0-optnone -Werror 
-Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | 
FileCheck %s -check-prefix=CPP-CHECK
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 
-target-feature +b16b16 -disable-O0-optnone -Werror -Wall -o /dev/null %s
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 
-target-feature +b16b16 -disable-O0-optnone -Werror -Wall -o /dev/null %s
```

The first  line with `sme2` and an *extra* end-to-end run with `sme2`.
I'll update like this the rest of the in-flight PRs.

https://github.com/llvm/llvm-project/pull/75200
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AArch64][SME2] Add FCLAMP, CNTP builtins for SME2 (PR #72487)

2023-12-15 Thread Sander de Smalen via cfe-commits



@@ -8,6 +8,14 @@
 // RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64-none-linux-gnu -target-feature +sve2p1 \
 // RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu 
-target-feature +sme2 -target-feature +sve \
+// RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s
+// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64-none-linux-gnu -target-feature +sme2 -target-feature +sve \
+// RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu 
-target-feature +sme2 -target-feature +sve \
+// RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64-none-linux-gnu -target-feature +sme2 -target-feature +sve \
+// RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu 
-target-feature +sve2p1 \
 // RUN:   -S -disable-O0-optnone -Werror -Wall -o /dev/null %s

sdesmalen-arm wrote:

Perhaps you missed the lines that I was referring to. I was talking about the 
RUN command on lines 13-14.

(Please also apply the same change to the other test file)

https://github.com/llvm/llvm-project/pull/72487
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[llvm] [clang] [X86][AVX10] Allow 64-bit mask register used without EVEX512 (PR #75571)

2023-12-15 Thread Shengchen Kan via cfe-commits


https://github.com/KanRobert approved this pull request.

LGTM

https://github.com/llvm/llvm-project/pull/75571
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[flang] [llvm] [clang] [clang-tools-extra] [flang] Pass to add frame pointer attribute (PR #74598)

2023-12-15 Thread Radu Salavat via cfe-commits


https://github.com/Radu2k updated 
https://github.com/llvm/llvm-project/pull/74598

>From fda39a4d196c6cdafe3ee42358c962ef0173aaca Mon Sep 17 00:00:00 2001
From: Radu2k 
Date: Wed, 6 Dec 2023 14:39:24 +
Subject: [PATCH 01/11] Pass to add frame pointer attribute

---
 .../include/flang/Frontend/CodeGenOptions.def |  1 +
 .../flang/Optimizer/Transforms/Passes.h   |  8 ++
 .../flang/Optimizer/Transforms/Passes.td  | 17 
 flang/include/flang/Tools/CLOptions.inc   |  4 +
 flang/include/flang/Tools/CrossToolHelpers.h  |  2 +
 flang/lib/Frontend/CompilerInvocation.cpp | 13 +++
 flang/lib/Optimizer/Transforms/CMakeLists.txt |  1 +
 .../lib/Optimizer/Transforms/FunctionAttr.cpp | 97 +++
 flang/test/Driver/func-attr.f90   | 12 +++
 .../test/Driver/mlir-debug-pass-pipeline.f90  |  2 +
 flang/test/Driver/mlir-pass-pipeline.f90  |  2 +
 flang/test/Driver/save-mlir-temps.f90 |  4 +-
 flang/test/Fir/basic-program.fir  |  2 +
 flang/test/Fir/box-offset-codegen.fir |  8 +-
 flang/test/Fir/polymorphic.fir|  8 +-
 flang/test/Fir/tbaa-codegen.fir   |  2 +-
 flang/test/Fir/tbaa-codegen2.fir  |  2 +-
 17 files changed, 173 insertions(+), 12 deletions(-)
 create mode 100644 flang/lib/Optimizer/Transforms/FunctionAttr.cpp
 create mode 100644 flang/test/Driver/func-attr.f90

diff --git a/flang/include/flang/Frontend/CodeGenOptions.def 
b/flang/include/flang/Frontend/CodeGenOptions.def
index 72e7bdab12a14d..774f225974d7ea 100644
--- a/flang/include/flang/Frontend/CodeGenOptions.def
+++ b/flang/include/flang/Frontend/CodeGenOptions.def
@@ -38,6 +38,7 @@ CODEGENOPT(Underscoring, 1, 1)
 ENUM_CODEGENOPT(RelocationModel, llvm::Reloc::Model, 3, llvm::Reloc::PIC_) 
///< Name of the relocation model to use.
 ENUM_CODEGENOPT(DebugInfo,  llvm::codegenoptions::DebugInfoKind, 4,  
llvm::codegenoptions::NoDebugInfo) ///< Level of debug info to generate
 ENUM_CODEGENOPT(VecLib, llvm::driver::VectorLibrary, 3, 
llvm::driver::VectorLibrary::NoLibrary) ///< Vector functions library to use
+ENUM_CODEGENOPT(FramePointer, llvm::FramePointerKind, 2, 
llvm::FramePointerKind::None) /// frame-pointer: all,non-leaf,none
 
 #undef CODEGENOPT
 #undef ENUM_CODEGENOPT
diff --git a/flang/include/flang/Optimizer/Transforms/Passes.h 
b/flang/include/flang/Optimizer/Transforms/Passes.h
index 92bc7246eca700..c5f09fc2581bd3 100644
--- a/flang/include/flang/Optimizer/Transforms/Passes.h
+++ b/flang/include/flang/Optimizer/Transforms/Passes.h
@@ -12,6 +12,7 @@
 #include "flang/Optimizer/Dialect/FIROps.h"
 #include "mlir/Pass/Pass.h"
 #include "mlir/Pass/PassRegistry.h"
+#include "llvm/Support/CodeGen.h"
 #include 
 
 namespace mlir {
@@ -83,6 +84,13 @@ std::unique_ptr createVScaleAttrPass();
 std::unique_ptr
 createVScaleAttrPass(std::pair vscaleAttr);
 
+struct FunctionAttrTypes{
+llvm::FramePointerKind framePointerKind;
+};
+
+std::unique_ptr createFunctionAttrPass();
+std::unique_ptr createFunctionAttrPass(FunctionAttrTypes 
&functionAttr);
+
 // declarative passes
 #define GEN_PASS_REGISTRATION
 #include "flang/Optimizer/Transforms/Passes.h.inc"
diff --git a/flang/include/flang/Optimizer/Transforms/Passes.td 
b/flang/include/flang/Optimizer/Transforms/Passes.td
index c3768fd2d689c1..eddf94e162e9c9 100644
--- a/flang/include/flang/Optimizer/Transforms/Passes.td
+++ b/flang/include/flang/Optimizer/Transforms/Passes.td
@@ -349,4 +349,21 @@ def VScaleAttr : Pass<"vscale-attr", "mlir::func::FuncOp"> 
{
   let constructor = "::fir::createVScaleAttrPass()";
 }
 
+def FunctionAttr : Pass<"function-attr", "mlir::func::FuncOp"> {
+  let summary = "Enhance functions with different attributes";
+  let description = [{ This feature introduces a general attribute aimed at 
customizing function characteristics. 
+ Options include:
+ Add "frame-pointer" attribute to functions: Set an attribute for the 
frame pointer on functions, to enable 
+ the compiler, to avoid saving the frame pointer in a register in 
functions where it is unnecessary. 
+ This eliminates the need for instructions to save, establish, and restore 
frame pointers, while also freeing up an additional register in numerous 
functions. 
+ However, this approach can make debugging unfeasible on certain machines.
+  }];
+  let options = [
+Option<"framePointerKind", "frame-pointer",
+   "mlir::LLVM::framePointerKind::FramePointerKind", 
/*default=*/"mlir::LLVM::framePointerKind::FramePointerKind{}",
+   "frame pointer">,
+  ];
+  let constructor = "::fir::createFunctionAttrPass()";
+}
+
 #endif // FLANG_OPTIMIZER_TRANSFORMS_PASSES
diff --git a/flang/include/flang/Tools/CLOptions.inc 
b/flang/include/flang/Tools/CLOptions.inc
index d3e4dc6cd4a243..3494e588b34606 100644
--- a/flang/include/flang/Tools/CLOptions.inc
+++ b/flang/include/flang/Tools/CLOptions.inc
@@ -311,6 +311,10 @@ inline void createDefaultFIRCodeGenPassPipeline(
   if (config.VScaleMin

[clang] 77c40ea - [Clang][AArch64]Add QCVTN builtin to SVE2.1 (#75454)

2023-12-15 Thread via cfe-commits


Author: CarolineConcatto
Date: 2023-12-15T11:42:00Z
New Revision: 77c40ea3d26e12a1162dcb643d498b7a98c3eb68

URL: 
https://github.com/llvm/llvm-project/commit/77c40ea3d26e12a1162dcb643d498b7a98c3eb68
DIFF: 
https://github.com/llvm/llvm-project/commit/77c40ea3d26e12a1162dcb643d498b7a98c3eb68.diff

LOG: [Clang][AArch64]Add QCVTN builtin to SVE2.1 (#75454)

``` c
   // All the intrinsics below are [SVE2.1 or SME2]
   // Variants are also available for _u16[_s32]_x2 and _u16[_u32]_x2
   svint16_t svqcvtn_s16[_s32_x2](svint32x2_t zn);
   ```

According to PR#257[1]

[1]https://github.com/ARM-software/acle/pull/257

Added: 
clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_qcvtn.c

Modified: 
clang/include/clang/Basic/arm_sve.td
clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtn.c

Removed: 




diff  --git a/clang/include/clang/Basic/arm_sve.td 
b/clang/include/clang/Basic/arm_sve.td
index 278a791ff760dc..519438a9bc69b2 100644
--- a/clang/include/clang/Basic/arm_sve.td
+++ b/clang/include/clang/Basic/arm_sve.td
@@ -2281,11 +2281,13 @@ let TargetGuard = "sme2" in {
 //
 // Multi-vector saturating extract narrow and interleave
 //
-let TargetGuard = "sme2" in {
+let TargetGuard = "sme2|sve2p1" in {
   def SVQCVTN_S16_S32_X2 : SInst<"svqcvtn_s16[_{d}_x2]", "h2.d", "i", 
MergeNone, "aarch64_sve_sqcvtn_x2", [IsStreamingCompatible], []>;
   def SVQCVTN_U16_U32_X2 : SInst<"svqcvtn_u16[_{d}_x2]", "e2.d", "Ui", 
MergeNone, "aarch64_sve_uqcvtn_x2", [IsStreamingCompatible], []>;
   def SVQCVTN_U16_S32_X2 : SInst<"svqcvtn_u16[_{d}_x2]", "e2.d", "i", 
MergeNone, "aarch64_sve_sqcvtun_x2", [IsStreamingCompatible], []>;
+}
 
+let TargetGuard = "sme2" in {
   def SVQCVTN_S8_S32_X4 : SInst<"svqcvtn_s8[_{d}_x4]", "q4.d", "i", MergeNone, 
"aarch64_sve_sqcvtn_x4", [IsStreaming], []>;
   def SVQCVTN_U8_U32_X4 : SInst<"svqcvtn_u8[_{d}_x4]", "b4.d", "Ui", 
MergeNone, "aarch64_sve_uqcvtn_x4", [IsStreaming], []>;
   def SVQCVTN_U8_S32_X4 : SInst<"svqcvtn_u8[_{d}_x4]", "b4.d", "i", MergeNone, 
"aarch64_sve_sqcvtun_x4", [IsStreaming], []>;

diff  --git a/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtn.c 
b/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtn.c
index 84aa6764ba380a..a865fd1bd5f5fb 100644
--- a/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtn.c
+++ b/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtn.c
@@ -53,60 +53,6 @@ svbfloat16_t test_cvtn_bf16_x2(svfloat32x2_t zn) 
__arm_streaming {
   return SVE_ACLE_FUNC(svcvtn_bf16,_f32_x2,,)(zn);
 }
 
-// CHECK-LABEL: @test_qcvtn_s16_s32_x2(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call  
@llvm.vector.extract.nxv4i32.nxv8i32( [[ZN:%.*]], i64 0)
-// CHECK-NEXT:[[TMP1:%.*]] = tail call  
@llvm.vector.extract.nxv4i32.nxv8i32( [[ZN]], i64 4)
-// CHECK-NEXT:[[TMP2:%.*]] = tail call  
@llvm.aarch64.sve.sqcvtn.x2.nxv4i32( [[TMP0]],  [[TMP1]])
-// CHECK-NEXT:ret  [[TMP2]]
-//
-// CPP-CHECK-LABEL: @_Z21test_qcvtn_s16_s32_x211svint32x2_t(
-// CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call  
@llvm.vector.extract.nxv4i32.nxv8i32( [[ZN:%.*]], i64 0)
-// CPP-CHECK-NEXT:[[TMP1:%.*]] = tail call  
@llvm.vector.extract.nxv4i32.nxv8i32( [[ZN]], i64 4)
-// CPP-CHECK-NEXT:[[TMP2:%.*]] = tail call  
@llvm.aarch64.sve.sqcvtn.x2.nxv4i32( [[TMP0]],  [[TMP1]])
-// CPP-CHECK-NEXT:ret  [[TMP2]]
-//
-svint16_t test_qcvtn_s16_s32_x2(svint32x2_t zn) __arm_streaming_compatible {
-  return SVE_ACLE_FUNC(svqcvtn_s16,_s32_x2,,)(zn);
-}
-
-// CHECK-LABEL: @test_qcvtn_u16_u32_x2(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call  
@llvm.vector.extract.nxv4i32.nxv8i32( [[ZN:%.*]], i64 0)
-// CHECK-NEXT:[[TMP1:%.*]] = tail call  
@llvm.vector.extract.nxv4i32.nxv8i32( [[ZN]], i64 4)
-// CHECK-NEXT:[[TMP2:%.*]] = tail call  
@llvm.aarch64.sve.uqcvtn.x2.nxv4i32( [[TMP0]],  [[TMP1]])
-// CHECK-NEXT:ret  [[TMP2]]
-//
-// CPP-CHECK-LABEL: @_Z21test_qcvtn_u16_u32_x212svuint32x2_t(
-// CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call  
@llvm.vector.extract.nxv4i32.nxv8i32( [[ZN:%.*]], i64 0)
-// CPP-CHECK-NEXT:[[TMP1:%.*]] = tail call  
@llvm.vector.extract.nxv4i32.nxv8i32( [[ZN]], i64 4)
-// CPP-CHECK-NEXT:[[TMP2:%.*]] = tail call  
@llvm.aarch64.sve.uqcvtn.x2.nxv4i32( [[TMP0]],  [[TMP1]])
-// CPP-CHECK-NEXT:ret  [[TMP2]]
-//
-svuint16_t test_qcvtn_u16_u32_x2(svuint32x2_t zn) __arm_streaming_compatible {
-  return SVE_ACLE_FUNC(svqcvtn_u16,_u32_x2,,)(zn);
-}
-
-// CHECK-LABEL: @test_qcvtn_u16_s32_x2(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call  
@llvm.vector.extract.nxv4i32.nxv8i32( [[ZN:%.*]], i64 0)
-// CHECK-NEXT:[[TMP1:%.*]] = tail call  
@llvm.vector.extract.nxv4i32.nxv8i32( [[ZN]], i64 4)
-// CHECK-NEXT:[[TMP2:%.*]] = tail call  
@llvm.aarch64.sve.sqcvtun.x2.nxv4i32( [[TMP0]],  [[TMP1]])
-// CHECK-NEXT:ret  [[TMP

[clang] [Clang][AArch64]Add QCVTN builtin to SVE2.1 (PR #75454)

2023-12-15 Thread via cfe-commits


https://github.com/CarolineConcatto closed 
https://github.com/llvm/llvm-project/pull/75454
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AArch64][SME] Warn when using a streaming builtin from a non-streaming function (PR #75487)

2023-12-15 Thread Sam Tebbs via cfe-commits

SamTebbs33 wrote:

> If it's not too much trouble, could you `git cherry-pick 
> c60663d128f8e0dccd418bdf16ecc403b96aa74a` into this? (Cool if not, ofc.)

Sure, I can do that. Would you also mind attempting to reproduce the compile 
time with the latest commit, just to make sure it fixes the issue on your end? 
I saw a 36 -> 31 second (compared to 30 on main) decrease which seems OK but 
isn't on the same scale as the numbers you're seeing.

https://github.com/llvm/llvm-project/pull/75487
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AArch64][SME2] Add SME2 MLA/MLS builtins. (PR #75584)

2023-12-15 Thread Kerry McLaughlin via cfe-commits



@@ -0,0 +1,760 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// REQUIRES: aarch64-registered-target
+
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 -S 
-disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 -S 
-disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | 
opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x 
c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s 
-check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 -S 
-disable-O0-optnone -Werror -Wall -o /dev/null %s
+#include 
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED,A5) A1##A3##A5
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4,A5) A1##A2##A3##A4##A5
+#endif
+
+//
+// Multi, multi
+// CHECK-LABEL: @test_svmla2_f16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[ADD:%.*]] = add i32 [[SLICE_BASE:%.*]], 6
+// CHECK-NEXT:[[TMP0:%.*]] = tail call  
@llvm.vector.extract.nxv8f16.nxv16f16( [[ZN:%.*]], i64 0)
+// CHECK-NEXT:[[TMP1:%.*]] = tail call  
@llvm.vector.extract.nxv8f16.nxv16f16( [[ZN]], i64 8)
+// CHECK-NEXT:[[TMP2:%.*]] = tail call  
@llvm.vector.extract.nxv8f16.nxv16f16( [[ZM:%.*]], i64 0)
+// CHECK-NEXT:[[TMP3:%.*]] = tail call  
@llvm.vector.extract.nxv8f16.nxv16f16( [[ZM]], i64 8)
+// CHECK-NEXT:tail call void @llvm.aarch64.sme.fmlal.vg2x2.nxv8f16(i32 
[[ADD]],  [[TMP0]],  [[TMP1]],  [[TMP2]],  [[TMP3]])
+// CHECK-NEXT:ret void
+//
+// CPP-CHECK-LABEL: @_Z15test_svmla2_f16j13svfloat16x2_tS_(
+// CPP-CHECK-NEXT:  entry:
+// CPP-CHECK-NEXT:[[ADD:%.*]] = add i32 [[SLICE_BASE:%.*]], 6
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call  
@llvm.vector.extract.nxv8f16.nxv16f16( [[ZN:%.*]], i64 0)
+// CPP-CHECK-NEXT:[[TMP1:%.*]] = tail call  
@llvm.vector.extract.nxv8f16.nxv16f16( [[ZN]], i64 8)
+// CPP-CHECK-NEXT:[[TMP2:%.*]] = tail call  
@llvm.vector.extract.nxv8f16.nxv16f16( [[ZM:%.*]], i64 0)
+// CPP-CHECK-NEXT:[[TMP3:%.*]] = tail call  
@llvm.vector.extract.nxv8f16.nxv16f16( [[ZM]], i64 8)
+// CPP-CHECK-NEXT:tail call void @llvm.aarch64.sme.fmlal.vg2x2.nxv8f16(i32 
[[ADD]],  [[TMP0]],  [[TMP1]],  [[TMP2]],  [[TMP3]])
+// CPP-CHECK-NEXT:ret void
+//
+void test_svmla2_f16(uint32_t slice_base, svfloat16x2_t zn, svfloat16x2_t zm) 
__arm_streaming __arm_shared_za
+{
+   SVE_ACLE_FUNC(svmla_za32,_f16,_vg2x2,,)(slice_base + 6, zn, zm);

kmclaughlin-arm wrote:

Since the slice base and offset are now combined, I don't think there is much 
value in adding an immediate to `slice_base` in any of these tests.

https://github.com/llvm/llvm-project/pull/75584
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[llvm] [clang] [SystemZ] Support i128 as legal type in VRs (PR #74625)

2023-12-15 Thread Ulrich Weigand via cfe-commits


https://github.com/uweigand closed 
https://github.com/llvm/llvm-project/pull/74625
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][Interp] Implement integral->complex casts (PR #75590)

2023-12-15 Thread Timm Baeder via cfe-commits


https://github.com/tbaederr created 
https://github.com/llvm/llvm-project/pull/75590

None

>From 8166141def296995ed48272f457a412625a483cf Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Timm=20B=C3=A4der?= 
Date: Fri, 15 Dec 2023 13:11:16 +0100
Subject: [PATCH] [clang][Interp] Implement integral->complex casts

---
 clang/lib/AST/Interp/ByteCodeExprGen.cpp | 26 
 clang/test/AST/Interp/complex.cpp|  9 
 2 files changed, 30 insertions(+), 5 deletions(-)

diff --git a/clang/lib/AST/Interp/ByteCodeExprGen.cpp 
b/clang/lib/AST/Interp/ByteCodeExprGen.cpp
index d0980882f402b9..d7e1f3d3a3872a 100644
--- a/clang/lib/AST/Interp/ByteCodeExprGen.cpp
+++ b/clang/lib/AST/Interp/ByteCodeExprGen.cpp
@@ -283,6 +283,28 @@ bool ByteCodeExprGen::VisitCastExpr(const 
CastExpr *CE) {
   case CK_ToVoid:
 return discard(SubExpr);
 
+  case CK_IntegralRealToComplex:
+  case CK_FloatingRealToComplex: {
+// We're creating a complex value here, so need to
+// allocate storage for it.
+if (!Initializing) {
+  std::optional LocalIndex =
+  allocateLocal(CE, /*IsExtended=*/true);
+  if (!LocalIndex)
+return false;
+  if (!this->emitGetPtrLocal(*LocalIndex, CE))
+return false;
+}
+
+if (!this->visitArrayElemInit(0, SubExpr))
+  return false;
+// Zero-init the second element.
+PrimType T = classifyPrim(SubExpr->getType());
+if (!this->visitZeroInitializer(T, SubExpr->getType(), SubExpr))
+  return false;
+return this->emitInitElem(T, 1, SubExpr);
+  }
+
   default:
 assert(false && "Cast not implemented");
   }
@@ -835,6 +857,10 @@ bool ByteCodeExprGen::VisitInitListExpr(const 
InitListExpr *E) {
 
   if (T->isAnyComplexType()) {
 unsigned NumInits = E->getNumInits();
+
+if (NumInits == 1)
+  return this->delegate(E->inits()[0]);
+
 QualType ElemQT = E->getType()->getAs()->getElementType();
 PrimType ElemT = classifyPrim(ElemQT);
 if (NumInits == 0) {
diff --git a/clang/test/AST/Interp/complex.cpp 
b/clang/test/AST/Interp/complex.cpp
index 66490e973988bb..bf340d6e3ff68a 100644
--- a/clang/test/AST/Interp/complex.cpp
+++ b/clang/test/AST/Interp/complex.cpp
@@ -37,21 +37,20 @@ constexpr _Complex int I2 = {};
 static_assert(__real(I2) == 0, "");
 static_assert(__imag(I2) == 0, "");
 
+static_assert(__real((_Complex unsigned)5) == 5);
+static_assert(__imag((_Complex unsigned)5) == 0);
 
 /// Standalone complex expressions.
 static_assert(__real((_Complex float){1.0, 3.0}) == 1.0, "");
 
 
-#if 0
-/// FIXME: This should work in the new interpreter.
 constexpr _Complex double D2 = {12};
 static_assert(__real(D2) == 12, "");
-static_assert(__imag(D2) == 12, "");
+static_assert(__imag(D2) == 0, "");
 
 constexpr _Complex int I3 = {15};
 static_assert(__real(I3) == 15, "");
-static_assert(__imag(I3) == 15, "");
-#endif
+static_assert(__imag(I3) == 0, "");
 
 /// FIXME: This should work in the new interpreter as well.
 // constexpr _Complex _BitInt(8) A = 0;// = {4};

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-repl] fix top-level statement declaration context (PR #75547)

2023-12-15 Thread Pavel Kalugin via cfe-commits


https://github.com/p4vook updated 
https://github.com/llvm/llvm-project/pull/75547

>From bf1bd0d9618d05ce718a9d834727ff25c3e92a18 Mon Sep 17 00:00:00 2001
From: Pavel Kalugin 
Date: Fri, 15 Dec 2023 03:07:06 +0300
Subject: [PATCH 1/3] clang-repl: fix top-level statement declaration context

Change the declaration context where we insert top-level
statements to CurrentContext.

Previously, top-level statement declarations were inserted
directly into the translation unit. This is incorrect, as
it leads to ignoring such statements located inside namespaces.

Fixes: #73632
Signed-off-by: Pavel Kalugin 
---
 clang/include/clang/AST/Decl.h | 3 ++-
 clang/lib/AST/Decl.cpp | 4 ++--
 clang/lib/Sema/SemaDecl.cpp| 4 ++--
 3 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/clang/include/clang/AST/Decl.h b/clang/include/clang/AST/Decl.h
index cd0878d7082514..7b1d9e8be6c59a 100644
--- a/clang/include/clang/AST/Decl.h
+++ b/clang/include/clang/AST/Decl.h
@@ -4440,7 +4440,8 @@ class TopLevelStmtDecl : public Decl {
   virtual void anchor();
 
 public:
-  static TopLevelStmtDecl *Create(ASTContext &C, Stmt *Statement);
+  static TopLevelStmtDecl *Create(ASTContext &C, DeclContext *DC,
+  Stmt *Statement);
   static TopLevelStmtDecl *CreateDeserialized(ASTContext &C, unsigned ID);
 
   SourceRange getSourceRange() const override LLVM_READONLY;
diff --git a/clang/lib/AST/Decl.cpp b/clang/lib/AST/Decl.cpp
index 527ea6042daa03..5c0f4f5b6b4ca1 100644
--- a/clang/lib/AST/Decl.cpp
+++ b/clang/lib/AST/Decl.cpp
@@ -5513,13 +5513,13 @@ FileScopeAsmDecl 
*FileScopeAsmDecl::CreateDeserialized(ASTContext &C,
 
 void TopLevelStmtDecl::anchor() {}
 
-TopLevelStmtDecl *TopLevelStmtDecl::Create(ASTContext &C, Stmt *Statement) {
+TopLevelStmtDecl *TopLevelStmtDecl::Create(ASTContext &C, DeclContext *DC,
+   Stmt *Statement) {
   assert(Statement);
   assert(C.getLangOpts().IncrementalExtensions &&
  "Must be used only in incremental mode");
 
   SourceLocation BeginLoc = Statement->getBeginLoc();
-  DeclContext *DC = C.getTranslationUnitDecl();
 
   return new (C, DC) TopLevelStmtDecl(DC, BeginLoc, Statement);
 }
diff --git a/clang/lib/Sema/SemaDecl.cpp b/clang/lib/Sema/SemaDecl.cpp
index be6a136ef37bc4..f78fada57f62d3 100644
--- a/clang/lib/Sema/SemaDecl.cpp
+++ b/clang/lib/Sema/SemaDecl.cpp
@@ -20287,8 +20287,8 @@ Decl *Sema::ActOnFileScopeAsmDecl(Expr *expr,
 }
 
 Decl *Sema::ActOnTopLevelStmtDecl(Stmt *Statement) {
-  auto *New = TopLevelStmtDecl::Create(Context, Statement);
-  Context.getTranslationUnitDecl()->addDecl(New);
+  auto *New = TopLevelStmtDecl::Create(Context, CurContext, Statement);
+  CurContext->addDecl(New);
   return New;
 }
 

>From 9a3c0c5e0e3f915ef94bc5612474a98fe4e78b26 Mon Sep 17 00:00:00 2001
From: Pavel Kalugin 
Date: Fri, 15 Dec 2023 15:05:45 +0300
Subject: [PATCH 2/3] [clang-repl] fix segfault in CleanUpPTU()

Check if the last translation unit or its first declaration
are actually empty and do not nead cleanup.

Previously this caused segmentation fault on empty PTUs.

Fixes: #72980
Signed-off-by: Pavel Kalugin 
---
 clang/lib/Interpreter/IncrementalParser.cpp | 8 
 1 file changed, 8 insertions(+)

diff --git a/clang/lib/Interpreter/IncrementalParser.cpp 
b/clang/lib/Interpreter/IncrementalParser.cpp
index 370bcbfee8b014..f894af881134bb 100644
--- a/clang/lib/Interpreter/IncrementalParser.cpp
+++ b/clang/lib/Interpreter/IncrementalParser.cpp
@@ -373,7 +373,15 @@ std::unique_ptr 
IncrementalParser::GenModule() {
 
 void IncrementalParser::CleanUpPTU(PartialTranslationUnit &PTU) {
   TranslationUnitDecl *MostRecentTU = PTU.TUPart;
+  if (!MostRecentTU) {
+return;
+  }
+
   TranslationUnitDecl *FirstTU = MostRecentTU->getFirstDecl();
+  if (!FirstTU) {
+return;
+  }
+
   if (StoredDeclsMap *Map = FirstTU->getPrimaryContext()->getLookupPtr()) {
 for (auto I = Map->begin(); I != Map->end(); ++I) {
   StoredDeclsList &List = I->second;

>From 5daf80f5063174646a724c2ecf55c78164717c29 Mon Sep 17 00:00:00 2001
From: Pavel Kalugin 
Date: Fri, 15 Dec 2023 15:11:43 +0300
Subject: [PATCH 3/3] [clang-repl] fix cleanup context in CleanUpPTU()

Get the last context returned by collectAllContexts() instead of just
the primary context.

This fixes cleanup in nested namespaces: instead of cleaning up all the
namespace hierarchy it cleans up just the innermost namespace.
---
 clang/lib/Interpreter/IncrementalParser.cpp | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/clang/lib/Interpreter/IncrementalParser.cpp 
b/clang/lib/Interpreter/IncrementalParser.cpp
index f894af881134bb..366610abecb071 100644
--- a/clang/lib/Interpreter/IncrementalParser.cpp
+++ b/clang/lib/Interpreter/IncrementalParser.cpp
@@ -382,7 +382,13 @@ void IncrementalParser::CleanUpPTU(PartialTranslationUnit 
&PTU) {
 return;
   }
 
-  if (StoredDeclsMap *Map = FirstTU->getPrimaryContext()->getLookupPtr()

[clang] [clang][Interp] Implement integral->complex casts (PR #75590)

2023-12-15 Thread via cfe-commits


llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Timm Baeder (tbaederr)


Changes



---
Full diff: https://github.com/llvm/llvm-project/pull/75590.diff


2 Files Affected:

- (modified) clang/lib/AST/Interp/ByteCodeExprGen.cpp (+26) 
- (modified) clang/test/AST/Interp/complex.cpp (+4-5) 


``diff
diff --git a/clang/lib/AST/Interp/ByteCodeExprGen.cpp 
b/clang/lib/AST/Interp/ByteCodeExprGen.cpp
index d0980882f402b9..d7e1f3d3a3872a 100644
--- a/clang/lib/AST/Interp/ByteCodeExprGen.cpp
+++ b/clang/lib/AST/Interp/ByteCodeExprGen.cpp
@@ -283,6 +283,28 @@ bool ByteCodeExprGen::VisitCastExpr(const 
CastExpr *CE) {
   case CK_ToVoid:
 return discard(SubExpr);
 
+  case CK_IntegralRealToComplex:
+  case CK_FloatingRealToComplex: {
+// We're creating a complex value here, so need to
+// allocate storage for it.
+if (!Initializing) {
+  std::optional LocalIndex =
+  allocateLocal(CE, /*IsExtended=*/true);
+  if (!LocalIndex)
+return false;
+  if (!this->emitGetPtrLocal(*LocalIndex, CE))
+return false;
+}
+
+if (!this->visitArrayElemInit(0, SubExpr))
+  return false;
+// Zero-init the second element.
+PrimType T = classifyPrim(SubExpr->getType());
+if (!this->visitZeroInitializer(T, SubExpr->getType(), SubExpr))
+  return false;
+return this->emitInitElem(T, 1, SubExpr);
+  }
+
   default:
 assert(false && "Cast not implemented");
   }
@@ -835,6 +857,10 @@ bool ByteCodeExprGen::VisitInitListExpr(const 
InitListExpr *E) {
 
   if (T->isAnyComplexType()) {
 unsigned NumInits = E->getNumInits();
+
+if (NumInits == 1)
+  return this->delegate(E->inits()[0]);
+
 QualType ElemQT = E->getType()->getAs()->getElementType();
 PrimType ElemT = classifyPrim(ElemQT);
 if (NumInits == 0) {
diff --git a/clang/test/AST/Interp/complex.cpp 
b/clang/test/AST/Interp/complex.cpp
index 66490e973988bb..bf340d6e3ff68a 100644
--- a/clang/test/AST/Interp/complex.cpp
+++ b/clang/test/AST/Interp/complex.cpp
@@ -37,21 +37,20 @@ constexpr _Complex int I2 = {};
 static_assert(__real(I2) == 0, "");
 static_assert(__imag(I2) == 0, "");
 
+static_assert(__real((_Complex unsigned)5) == 5);
+static_assert(__imag((_Complex unsigned)5) == 0);
 
 /// Standalone complex expressions.
 static_assert(__real((_Complex float){1.0, 3.0}) == 1.0, "");
 
 
-#if 0
-/// FIXME: This should work in the new interpreter.
 constexpr _Complex double D2 = {12};
 static_assert(__real(D2) == 12, "");
-static_assert(__imag(D2) == 12, "");
+static_assert(__imag(D2) == 0, "");
 
 constexpr _Complex int I3 = {15};
 static_assert(__real(I3) == 15, "");
-static_assert(__imag(I3) == 15, "");
-#endif
+static_assert(__imag(I3) == 0, "");
 
 /// FIXME: This should work in the new interpreter as well.
 // constexpr _Complex _BitInt(8) A = 0;// = {4};

``




https://github.com/llvm/llvm-project/pull/75590
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Fix unexpected warnings after a01307a (PR #75591)

2023-12-15 Thread Mariya Podchishchaeva via cfe-commits


https://github.com/Fznamznon created 
https://github.com/llvm/llvm-project/pull/75591

a01307a broke silencing of -Wmissing-field-initializers warnings in C for 
nested designators. This fixes the issue.

>From 7d93f51878c495e245ce21d4be97c4ca7cddd404 Mon Sep 17 00:00:00 2001
From: "Podchishchaeva, Mariya" 
Date: Fri, 15 Dec 2023 04:05:41 -0800
Subject: [PATCH] [clang] Fix unexpected warnings after a01307a

a01307a broke silencing of -Wmissing-field-initializers warnings in C for
nested designators. This fixes the issue.
---
 clang/lib/Sema/SemaInit.cpp  |  8 +++
 clang/test/Sema/missing-field-initializers.c | 23 
 2 files changed, 31 insertions(+)

diff --git a/clang/lib/Sema/SemaInit.cpp b/clang/lib/Sema/SemaInit.cpp
index de0d92edb550dd..1cd2198503abaf 100644
--- a/clang/lib/Sema/SemaInit.cpp
+++ b/clang/lib/Sema/SemaInit.cpp
@@ -864,6 +864,14 @@ InitListChecker::FillInEmptyInitializations(const 
InitializedEntity &Entity,
   WarnIfMissingField &=
   SemaRef.getLangOpts().CPlusPlus || !hasAnyDesignatedInits(SForm);
 
+  if (OuterILE) {
+InitListExpr *OuterSForm = OuterILE->isSyntacticForm()
+   ? OuterILE
+   : OuterILE->getSyntacticForm();
+WarnIfMissingField &= SemaRef.getLangOpts().CPlusPlus ||
+  !hasAnyDesignatedInits(OuterSForm);
+  }
+
   unsigned NumElems = numStructUnionElements(ILE->getType());
   if (!RDecl->isUnion() && RDecl->hasFlexibleArrayMember())
 ++NumElems;
diff --git a/clang/test/Sema/missing-field-initializers.c 
b/clang/test/Sema/missing-field-initializers.c
index 8653591ff1187a..8dc8288ad92e6c 100644
--- a/clang/test/Sema/missing-field-initializers.c
+++ b/clang/test/Sema/missing-field-initializers.c
@@ -61,3 +61,26 @@ struct S {
 // f1, now we no longer issue that warning (note, this code is still unsafe
 // because of the buffer overrun).
 struct S s = {1, {1, 2}};
+
+struct S1 {
+  long int l;
+  struct  { int a, b; } d1;
+};
+
+struct S1 s01 = { 1, {1} }; // expected-warning {{missing field 'b' 
initializer}}
+struct S1 s02 = { .d1.a = 1 }; // designator avoids MFI warning
+
+union U1 {
+  long int l;
+  struct  { int a, b; } d1;
+};
+
+union U1 u01 = { 1 };
+union U1 u02 = { .d1.a = 1 }; // designator avoids MFI warning
+
+struct S2 {
+  long int l;
+  struct { int a, b; struct {int c; } d2; } d1;
+};
+
+struct S2 s22 = { .d1.d2.c = 1 }; // designator avoids MFI warning

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Fix unexpected warnings after a01307a (PR #75591)

2023-12-15 Thread via cfe-commits


llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Mariya Podchishchaeva (Fznamznon)


Changes

a01307a broke silencing of -Wmissing-field-initializers warnings in C for 
nested designators. This fixes the issue.

---
Full diff: https://github.com/llvm/llvm-project/pull/75591.diff


2 Files Affected:

- (modified) clang/lib/Sema/SemaInit.cpp (+8) 
- (modified) clang/test/Sema/missing-field-initializers.c (+23) 


``diff
diff --git a/clang/lib/Sema/SemaInit.cpp b/clang/lib/Sema/SemaInit.cpp
index de0d92edb550dd..1cd2198503abaf 100644
--- a/clang/lib/Sema/SemaInit.cpp
+++ b/clang/lib/Sema/SemaInit.cpp
@@ -864,6 +864,14 @@ InitListChecker::FillInEmptyInitializations(const 
InitializedEntity &Entity,
   WarnIfMissingField &=
   SemaRef.getLangOpts().CPlusPlus || !hasAnyDesignatedInits(SForm);
 
+  if (OuterILE) {
+InitListExpr *OuterSForm = OuterILE->isSyntacticForm()
+   ? OuterILE
+   : OuterILE->getSyntacticForm();
+WarnIfMissingField &= SemaRef.getLangOpts().CPlusPlus ||
+  !hasAnyDesignatedInits(OuterSForm);
+  }
+
   unsigned NumElems = numStructUnionElements(ILE->getType());
   if (!RDecl->isUnion() && RDecl->hasFlexibleArrayMember())
 ++NumElems;
diff --git a/clang/test/Sema/missing-field-initializers.c 
b/clang/test/Sema/missing-field-initializers.c
index 8653591ff1187a..8dc8288ad92e6c 100644
--- a/clang/test/Sema/missing-field-initializers.c
+++ b/clang/test/Sema/missing-field-initializers.c
@@ -61,3 +61,26 @@ struct S {
 // f1, now we no longer issue that warning (note, this code is still unsafe
 // because of the buffer overrun).
 struct S s = {1, {1, 2}};
+
+struct S1 {
+  long int l;
+  struct  { int a, b; } d1;
+};
+
+struct S1 s01 = { 1, {1} }; // expected-warning {{missing field 'b' 
initializer}}
+struct S1 s02 = { .d1.a = 1 }; // designator avoids MFI warning
+
+union U1 {
+  long int l;
+  struct  { int a, b; } d1;
+};
+
+union U1 u01 = { 1 };
+union U1 u02 = { .d1.a = 1 }; // designator avoids MFI warning
+
+struct S2 {
+  long int l;
+  struct { int a, b; struct {int c; } d2; } d1;
+};
+
+struct S2 s22 = { .d1.d2.c = 1 }; // designator avoids MFI warning

``




https://github.com/llvm/llvm-project/pull/75591
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AArch64] Update target feature requirements of SVE bfloat instructions (PR #75596)

2023-12-15 Thread Momchil Velikov via cfe-commits


https://github.com/momchil-velikov created 
https://github.com/llvm/llvm-project/pull/75596

According to the latest update of the ISA
https://developer.arm.com/documentation/ddi0602/2023-09/?lang=en all of the 
affected instruction encodings now require

(FEAT_SVE2 or FEAT_SME2) and FEAT_SVE_B16B16

>From fa5fbcb55eceb02ea9d516922cfa3a7e23ec8faf Mon Sep 17 00:00:00 2001
From: Momchil Velikov 
Date: Fri, 15 Dec 2023 12:18:53 +
Subject: [PATCH] [AArch64] Update target feature requirements of SVE bfloat
 instructions

According to the latest update of the ISA
https://developer.arm.com/documentation/ddi0602/2023-09/?lang=en
all of the affected instruction encodings now require

(FEAT_SVE2 or FEAT_SME2) and FEAT_SVE_B16B16
---
 clang/include/clang/Basic/arm_sve.td  |  2 +-
 .../acle_sve2p1_bfadd.c   | 11 ++--
 .../acle_sve2p1_bfmax.c   | 11 ++--
 .../acle_sve2p1_bfmaxnm.c | 11 ++--
 .../acle_sve2p1_bfmin.c   | 11 ++--
 .../acle_sve2p1_bfminnm.c | 11 ++--
 .../acle_sve2p1_bfmla.c   | 11 ++--
 .../acle_sve2p1_bfmls.c   | 11 ++--
 .../acle_sve2p1_bfmul.c   | 11 ++--
 .../acle_sve2p1_bfsub.c   | 11 ++--
 llvm/lib/Target/AArch64/AArch64.td|  4 +-
 .../lib/Target/AArch64/AArch64SVEInstrInfo.td | 10 ++--
 llvm/test/MC/AArch64/SVE2p1/bfadd.s   | 43 ++--
 llvm/test/MC/AArch64/SVE2p1/bfclamp.s | 32 
 llvm/test/MC/AArch64/SVE2p1/bfmax.s   | 34 -
 llvm/test/MC/AArch64/SVE2p1/bfmaxnm.s | 34 -
 llvm/test/MC/AArch64/SVE2p1/bfmin.s   | 34 -
 llvm/test/MC/AArch64/SVE2p1/bfminnm.s | 34 -
 llvm/test/MC/AArch64/SVE2p1/bfmla.s   | 44 +---
 llvm/test/MC/AArch64/SVE2p1/bfmls.s   | 45 +---
 llvm/test/MC/AArch64/SVE2p1/bfmul.s   | 51 +++
 llvm/test/MC/AArch64/SVE2p1/bfsub.s   | 43 ++--
 22 files changed, 311 insertions(+), 198 deletions(-)

diff --git a/clang/include/clang/Basic/arm_sve.td 
b/clang/include/clang/Basic/arm_sve.td
index aa9b105364a51a..b53409a3e1656a 100644
--- a/clang/include/clang/Basic/arm_sve.td
+++ b/clang/include/clang/Basic/arm_sve.td
@@ -2066,7 +2066,7 @@ let TargetGuard = "sve2p1|sme2" in {
   def SVPFALSE_COUNT_ALIAS : SInst<"svpfalse_c", "}v", "", MergeNone, "", 
[IsOverloadNone, IsStreamingCompatible]>;
 }
 
-let TargetGuard = "sve2p1,b16b16" in {
+let TargetGuard = "(sve2|sme2),b16b16" in {
 defm SVMUL_BF  : SInstZPZZ<"svmul",  "b", "aarch64_sve_fmul",   
"aarch64_sve_fmul_u">;
 defm SVADD_BF  : SInstZPZZ<"svadd",  "b", "aarch64_sve_fadd",   
"aarch64_sve_fadd_u">;
 defm SVSUB_BF  : SInstZPZZ<"svsub",  "b", "aarch64_sve_fsub",   
"aarch64_sve_fsub_u">;
diff --git a/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c 
b/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c
index 327c4f078872b3..a3026fee3f6d29 100644
--- a/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c
+++ b/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c
@@ -1,10 +1,11 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // REQUIRES: aarch64-registered-target
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 
-target-feature +b16b16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s 
| opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 
-target-feature +b16b16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x 
c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s 
-check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sve2p1 -target-feature +b16b16 -S -disable-O0-optnone -Werror 
-Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | 
FileCheck %s
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sve2p1 -target-feature +b16b16 -S -disable-O0-optnone -Werror 
-Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | 
FileCheck %s -check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 
-target-feature +b16b16 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 
-target-feature +b16b16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s 
| opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 
-target-feature +b16b16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x 
c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s 
-check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -DS

[llvm] [clang] [AArch64] Update target feature requirements of SVE bfloat instructions (PR #75596)

2023-12-15 Thread via cfe-commits


llvmbot wrote:




@llvm/pr-subscribers-backend-aarch64

Author: Momchil Velikov (momchil-velikov)


Changes

According to the latest update of the ISA
https://developer.arm.com/documentation/ddi0602/2023-09/?lang=en all of the 
affected instruction encodings now require

(FEAT_SVE2 or FEAT_SME2) and FEAT_SVE_B16B16

---

Patch is 81.56 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/75596.diff


22 Files Affected:

- (modified) clang/include/clang/Basic/arm_sve.td (+1-1) 
- (modified) clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c 
(+6-5) 
- (modified) clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmax.c 
(+6-5) 
- (modified) clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmaxnm.c 
(+6-5) 
- (modified) clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmin.c 
(+6-5) 
- (modified) clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfminnm.c 
(+6-5) 
- (modified) clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla.c 
(+6-5) 
- (modified) clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls.c 
(+6-5) 
- (modified) clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul.c 
(+6-5) 
- (modified) clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfsub.c 
(+6-5) 
- (modified) llvm/lib/Target/AArch64/AArch64.td (+2-2) 
- (modified) llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td (+5-5) 
- (modified) llvm/test/MC/AArch64/SVE2p1/bfadd.s (+27-16) 
- (modified) llvm/test/MC/AArch64/SVE2p1/bfclamp.s (+21-11) 
- (modified) llvm/test/MC/AArch64/SVE2p1/bfmax.s (+22-12) 
- (modified) llvm/test/MC/AArch64/SVE2p1/bfmaxnm.s (+22-12) 
- (modified) llvm/test/MC/AArch64/SVE2p1/bfmin.s (+22-12) 
- (modified) llvm/test/MC/AArch64/SVE2p1/bfminnm.s (+22-12) 
- (modified) llvm/test/MC/AArch64/SVE2p1/bfmla.s (+27-17) 
- (modified) llvm/test/MC/AArch64/SVE2p1/bfmls.s (+28-17) 
- (modified) llvm/test/MC/AArch64/SVE2p1/bfmul.s (+31-20) 
- (modified) llvm/test/MC/AArch64/SVE2p1/bfsub.s (+27-16) 


``diff
diff --git a/clang/include/clang/Basic/arm_sve.td 
b/clang/include/clang/Basic/arm_sve.td
index aa9b105364a51a..b53409a3e1656a 100644
--- a/clang/include/clang/Basic/arm_sve.td
+++ b/clang/include/clang/Basic/arm_sve.td
@@ -2066,7 +2066,7 @@ let TargetGuard = "sve2p1|sme2" in {
   def SVPFALSE_COUNT_ALIAS : SInst<"svpfalse_c", "}v", "", MergeNone, "", 
[IsOverloadNone, IsStreamingCompatible]>;
 }
 
-let TargetGuard = "sve2p1,b16b16" in {
+let TargetGuard = "(sve2|sme2),b16b16" in {
 defm SVMUL_BF  : SInstZPZZ<"svmul",  "b", "aarch64_sve_fmul",   
"aarch64_sve_fmul_u">;
 defm SVADD_BF  : SInstZPZZ<"svadd",  "b", "aarch64_sve_fadd",   
"aarch64_sve_fadd_u">;
 defm SVSUB_BF  : SInstZPZZ<"svsub",  "b", "aarch64_sve_fsub",   
"aarch64_sve_fsub_u">;
diff --git a/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c 
b/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c
index 327c4f078872b3..a3026fee3f6d29 100644
--- a/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c
+++ b/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c
@@ -1,10 +1,11 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // REQUIRES: aarch64-registered-target
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 
-target-feature +b16b16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s 
| opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 
-target-feature +b16b16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x 
c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s 
-check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sve2p1 -target-feature +b16b16 -S -disable-O0-optnone -Werror 
-Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | 
FileCheck %s
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sve2p1 -target-feature +b16b16 -S -disable-O0-optnone -Werror 
-Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | 
FileCheck %s -check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 
-target-feature +b16b16 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 
-target-feature +b16b16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s 
| opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 
-target-feature +b16b16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x 
c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s 
-check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sve2 -target-feature +b16b16 -S -disabl

[clang] [clang] Fix unexpected warnings after a01307a (PR #75591)

2023-12-15 Thread via cfe-commits


https://github.com/mikaelholmen commented:

I really don't know this, and I have no easy way to test that this really fixes 
all the new warnings we see with a01307a6ee788, but at least it seems to fix 
the added cases in the missing-field-initializers.c test so it's at least seems 
to be a step in the right direction.

https://github.com/llvm/llvm-project/pull/75591
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Fix unexpected warnings after a01307a (PR #75591)

2023-12-15 Thread via cfe-commits



@@ -864,6 +864,14 @@ InitListChecker::FillInEmptyInitializations(const 
InitializedEntity &Entity,
   WarnIfMissingField &=
   SemaRef.getLangOpts().CPlusPlus || !hasAnyDesignatedInits(SForm);
 
+  if (OuterILE) {

mikaelholmen wrote:

Perhaps add a comment here about why this is needed?

https://github.com/llvm/llvm-project/pull/75591
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Fix unexpected warnings after a01307a (PR #75591)

2023-12-15 Thread via cfe-commits


https://github.com/mikaelholmen edited 
https://github.com/llvm/llvm-project/pull/75591
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AArch64][SME2] Add FCLAMP, CNTP builtins for SME2 (PR #72487)

2023-12-15 Thread Dinar Temirbulatov via cfe-commits


https://github.com/dtemirbulatov updated 
https://github.com/llvm/llvm-project/pull/72487

>From 6e2c1015c6cf6b226bc9e28c563167e07b9c4074 Mon Sep 17 00:00:00 2001
From: Dinar Temirbulatov 
Date: Thu, 16 Nov 2023 07:21:17 +
Subject: [PATCH 1/3] [AArch64][SME2] Add FCLAMP, CNTP builtins for SME2

This change enables FCLAMP, CNTP builtins for SME2 target.
---
 clang/include/clang/Basic/arm_sve.td  | 7 +++
 .../CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c  | 3 +++
 .../aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c| 8 
 3 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/clang/include/clang/Basic/arm_sve.td 
b/clang/include/clang/Basic/arm_sve.td
index aa9b105364a51a..e10076a7663856 100644
--- a/clang/include/clang/Basic/arm_sve.td
+++ b/clang/include/clang/Basic/arm_sve.td
@@ -1953,8 +1953,6 @@ def SVPEXT_X2 : SInst<"svpext_lane_{d}_x2", "2.P}i", 
"QcQsQiQl", MergeNone,
 }
 
 let TargetGuard = "sve2p1" in {
-def SVFCLAMP   : SInst<"svclamp[_{d}]", "", "hfd", MergeNone, 
"aarch64_sve_fclamp", [], []>;
-
 def SVWHILEGE_COUNT  : SInst<"svwhilege_{d}",  "}lli", "QcQsQiQl", MergeNone, 
"aarch64_sve_whilege_{d}", [IsOverloadNone], [ImmCheck<2, ImmCheck2_4_Mul2>]>;
 def SVWHILEGT_COUNT  : SInst<"svwhilegt_{d}",  "}lli", "QcQsQiQl", MergeNone, 
"aarch64_sve_whilegt_{d}", [IsOverloadNone], [ImmCheck<2, ImmCheck2_4_Mul2>]>;
 def SVWHILELE_COUNT  : SInst<"svwhilele_{d}",  "}lli", "QcQsQiQl", MergeNone, 
"aarch64_sve_whilele_{d}", [IsOverloadNone], [ImmCheck<2, ImmCheck2_4_Mul2>]>;
@@ -2054,8 +2052,6 @@ let TargetGuard = "sve2p1" in {
 def SVSCLAMP : SInst<"svclamp[_{d}]", "", "csil", MergeNone, 
"aarch64_sve_sclamp", [], []>;
 def SVUCLAMP : SInst<"svclamp[_{d}]", "", "UcUsUiUl", MergeNone, 
"aarch64_sve_uclamp", [], []>;
 
-def SVCNTP_COUNT : SInst<"svcntp_{d}", "n}i", "QcQsQiQl", MergeNone, 
"aarch64_sve_cntp_{d}", [IsOverloadNone], [ImmCheck<1, ImmCheck2_4_Mul2>]>;
-
 defm SVREVD : SInstZPZ<"svrevd", "csilUcUsUiUl", "aarch64_sve_revd">;
 }
 
@@ -2064,6 +2060,9 @@ let TargetGuard = "sve2p1|sme2" in {
   def SVPTRUE_COUNT  : SInst<"svptrue_{d}", "}v", "QcQsQiQl", MergeNone, 
"aarch64_sve_ptrue_{d}", [IsOverloadNone, IsStreamingCompatible], []>;
 
   def SVPFALSE_COUNT_ALIAS : SInst<"svpfalse_c", "}v", "", MergeNone, "", 
[IsOverloadNone, IsStreamingCompatible]>;
+
+  def SVFCLAMP   : SInst<"svclamp[_{d}]", "", "hfd", MergeNone, 
"aarch64_sve_fclamp", [IsStreamingCompatible], []>;
+  def SVCNTP_COUNT : SInst<"svcntp_{d}", "n}i", "QcQsQiQl", MergeNone, 
"aarch64_sve_cntp_{d}", [IsOverloadNone, IsStreamingCompatible], [ImmCheck<1, 
ImmCheck2_4_Mul2>]>;
 }
 
 let TargetGuard = "sve2p1,b16b16" in {
diff --git a/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c 
b/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c
index 18973a6467450a..01b995c1b05833 100644
--- a/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c
+++ b/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c
@@ -3,6 +3,9 @@
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S 
-O1 -Werror -emit-llvm -o - %s | FileCheck %s
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S 
-O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S 
-disable-O0-optnone -Werror -Wall -o /dev/null %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 
-target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 
-target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s 
-check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 
-target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
 
 #include 
 
diff --git a/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c 
b/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c
index a9f482cab39698..3adb28b8cc71bf 100644
--- a/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c
+++ b/clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c
@@ -8,6 +8,14 @@
 // RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64-none-linux-gnu -target-feature +sve2p1 \
 // RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu 
-target-feature +sme2 -target-feature +sve \
+// RUN:   -S -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s
+// RUN: %clan

[clang] [clang] Fix unexpected warnings after a01307a (PR #75591)

2023-12-15 Thread via cfe-commits


https://github.com/mikaelholmen edited 
https://github.com/llvm/llvm-project/pull/75591
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[llvm] [clang-tools-extra] [LoopVectorize] Enable hoisting of runtime checks by default (PR #71538)

2023-12-15 Thread Florian Hahn via cfe-commits


https://github.com/fhahn approved this pull request.

LGTM with the earlier adjustments, thanks!

https://github.com/llvm/llvm-project/pull/71538
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][wasm] Resolve assertion errors caused by converting ComplexTy… (PR #70496)

2023-12-15 Thread via cfe-commits



@@ -0,0 +1,9 @@
+// RUN: %clang --target=wasm32 -mmultivalue -Xclang -target-abi -Xclang 
experimental-mv %s -S -Xclang -verify
+
+float crealf() { return 0;} // expected-no-diagnostics

knightXun wrote:

ok, nice hit!

https://github.com/llvm/llvm-project/pull/70496
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [flang] [Flang, Clang] Enable and test 'rdynamic' flag (PR #75598)

2023-12-15 Thread Radu Salavat via cfe-commits


https://github.com/Radu2k created 
https://github.com/llvm/llvm-project/pull/75598

Enable and test 'rdynamic' flag

>From 6180787f9bc9449ce90999c3c5f9c96cfd057a50 Mon Sep 17 00:00:00 2001
From: Radu2k 
Date: Fri, 15 Dec 2023 12:11:04 +
Subject: [PATCH] Enable and test 'rdynamic' flag

---
 clang/include/clang/Driver/Options.td |  3 ++-
 flang/test/Driver/rdynamic-check.f90  | 10 ++
 2 files changed, 12 insertions(+), 1 deletion(-)
 create mode 100644 flang/test/Driver/rdynamic-check.f90

diff --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 1b02087425b751..9678165bfd98e8 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -5308,7 +5308,8 @@ def rewrite_objc : Flag<["-"], "rewrite-objc">, 
Flags<[NoXarchOption]>,
 def rewrite_legacy_objc : Flag<["-"], "rewrite-legacy-objc">,
   Flags<[NoXarchOption]>,
   HelpText<"Rewrite Legacy Objective-C source to C++">;
-def rdynamic : Flag<["-"], "rdynamic">, Group;
+def rdynamic : Flag<["-"], "rdynamic">, Group,
+  Visibility<[ClangOption, FlangOption]>;
 def resource_dir : Separate<["-"], "resource-dir">,
   Flags<[NoXarchOption, HelpHidden]>,
   Visibility<[ClangOption, CC1Option, CLOption, DXCOption]>,
diff --git a/flang/test/Driver/rdynamic-check.f90 
b/flang/test/Driver/rdynamic-check.f90
new file mode 100644
index 00..6892d8ac67f212
--- /dev/null
+++ b/flang/test/Driver/rdynamic-check.f90
@@ -0,0 +1,10 @@
+! Verify that rdynamic flag adds -export-dynamic flag and passes it on to the 
linker.
+
+! RUN: %flang -### --target=x86_64-linux-gnu -rdynamic %s 2>&1 | FileCheck 
--check-prefixes=GNU-LINKER-OPTIONS %s
+! RUN: %flang -### --target=aarch64-linux-none -rdynamic %s 2>&1 | FileCheck 
--check-prefixes=AARCH-LINKER-OPTIONS %s
+
+! GNU-LINKER-OPTIONS: "{{.*}}ld"
+! GNU-LINKER-OPTIONS-SAME: "-export-dynamic"
+
+! AARCH-LINKER-OPTIONS: "{{.*}}ld"
+! AARCH-LINKER-OPTIONS-SAME: "-export-dynamic"

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [flang] [Flang, Clang] Enable and test 'rdynamic' flag (PR #75598)

2023-12-15 Thread via cfe-commits


llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Radu Salavat (Radu2k)


Changes

Enable and test 'rdynamic' flag

---
Full diff: https://github.com/llvm/llvm-project/pull/75598.diff


2 Files Affected:

- (modified) clang/include/clang/Driver/Options.td (+2-1) 
- (added) flang/test/Driver/rdynamic-check.f90 (+10) 


``diff
diff --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 1b02087425b751..9678165bfd98e8 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -5308,7 +5308,8 @@ def rewrite_objc : Flag<["-"], "rewrite-objc">, 
Flags<[NoXarchOption]>,
 def rewrite_legacy_objc : Flag<["-"], "rewrite-legacy-objc">,
   Flags<[NoXarchOption]>,
   HelpText<"Rewrite Legacy Objective-C source to C++">;
-def rdynamic : Flag<["-"], "rdynamic">, Group;
+def rdynamic : Flag<["-"], "rdynamic">, Group,
+  Visibility<[ClangOption, FlangOption]>;
 def resource_dir : Separate<["-"], "resource-dir">,
   Flags<[NoXarchOption, HelpHidden]>,
   Visibility<[ClangOption, CC1Option, CLOption, DXCOption]>,
diff --git a/flang/test/Driver/rdynamic-check.f90 
b/flang/test/Driver/rdynamic-check.f90
new file mode 100644
index 00..6892d8ac67f212
--- /dev/null
+++ b/flang/test/Driver/rdynamic-check.f90
@@ -0,0 +1,10 @@
+! Verify that rdynamic flag adds -export-dynamic flag and passes it on to the 
linker.
+
+! RUN: %flang -### --target=x86_64-linux-gnu -rdynamic %s 2>&1 | FileCheck 
--check-prefixes=GNU-LINKER-OPTIONS %s
+! RUN: %flang -### --target=aarch64-linux-none -rdynamic %s 2>&1 | FileCheck 
--check-prefixes=AARCH-LINKER-OPTIONS %s
+
+! GNU-LINKER-OPTIONS: "{{.*}}ld"
+! GNU-LINKER-OPTIONS-SAME: "-export-dynamic"
+
+! AARCH-LINKER-OPTIONS: "{{.*}}ld"
+! AARCH-LINKER-OPTIONS-SAME: "-export-dynamic"

``




https://github.com/llvm/llvm-project/pull/75598
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [X86] Emit Warnings for frontend options to enable knl/knm. (PR #75580)

2023-12-15 Thread Phoebe Wang via cfe-commits


phoebewang wrote:

One more reason I can think of is with KNL/KNM removal, we can simplify 
supporting widen 128/256-bit vector to 512-bit without AVX512VL feature since 
all reset targets support AVX512VL. The test cases can be simplified too.

https://github.com/llvm/llvm-project/pull/75580
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] f5e48fe - [X86][AVX10] Allow 64-bit mask register used without EVEX512 (#75571)

2023-12-15 Thread via cfe-commits


Author: Phoebe Wang
Date: 2023-12-15T20:41:42+08:00
New Revision: f5e48fed043eaa24546aeaa656cb88342d3085e6

URL: 
https://github.com/llvm/llvm-project/commit/f5e48fed043eaa24546aeaa656cb88342d3085e6
DIFF: 
https://github.com/llvm/llvm-project/commit/f5e48fed043eaa24546aeaa656cb88342d3085e6.diff

LOG: [X86][AVX10] Allow 64-bit mask register used without EVEX512 (#75571)

This is to reflect new document change that 64-bit mask is support by
AVX10 256-bit targets.

Latest documents can be found in:
https://cdrdv2.intel.com/v1/dl/getContent/784267
https://cdrdv2.intel.com/v1/dl/getContent/784343

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsX86.def
clang/lib/Headers/avx512bwintrin.h
clang/test/CodeGen/X86/avx512-error.c
llvm/lib/Target/X86/X86RegisterInfo.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsX86.def 
b/clang/include/clang/Basic/BuiltinsX86.def
index e4802f8ab1c156..60b752ad48548f 100644
--- a/clang/include/clang/Basic/BuiltinsX86.def
+++ b/clang/include/clang/Basic/BuiltinsX86.def
@@ -979,7 +979,7 @@ TARGET_BUILTIN(__builtin_ia32_scatterpfqps, 
"vUcV8Oiv*IiIi", "nV:512:", "avx512p
 TARGET_BUILTIN(__builtin_ia32_knotqi, "UcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_knothi, "UsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_knotsi, "UiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_knotdi, "UOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_knotdi, "UOiUOi", "nc", "avx512bw")
 
 TARGET_BUILTIN(__builtin_ia32_cmpb128_mask, "UsV16cV16cIiUs", "ncV:128:", 
"avx512vl,avx512bw")
 TARGET_BUILTIN(__builtin_ia32_cmpd128_mask, "UcV4iV4iIiUc", "ncV:128:", 
"avx512vl")
@@ -1349,7 +1349,7 @@ TARGET_BUILTIN(__builtin_ia32_vpmadd52luq128, 
"V2OiV2OiV2OiV2Oi", "ncV:128:", "a
 TARGET_BUILTIN(__builtin_ia32_vpmadd52luq256, "V4OiV4OiV4OiV4Oi", "ncV:256:", 
"avx512ifma,avx512vl|avxifma")
 TARGET_BUILTIN(__builtin_ia32_vcomisd, "iV2dV2dIiIi", "ncV:128:", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_vcomiss, "iV4fV4fIiIi", "ncV:128:", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_kunpckdi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kunpckdi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kunpcksi, "UiUiUi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_loaddquhi512_mask, "V32sV32sC*V32sUi", 
"nV:512:", "avx512bw,evex512")
 TARGET_BUILTIN(__builtin_ia32_loaddquqi512_mask, "V64cV64cC*V64cUOi", 
"nV:512:", "avx512bw,evex512")
@@ -1665,56 +1665,56 @@ TARGET_BUILTIN(__builtin_ia32_fpcla_mask, 
"UcV4fIiUc", "ncV:128:", "avx512dq
 TARGET_BUILTIN(__builtin_ia32_kaddqi, "UcUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kaddhi, "UsUsUs", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kaddsi, "UiUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kadddi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kadddi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kandqi, "UcUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kandhi, "UsUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_kandsi, "UiUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kanddi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kanddi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kandnqi, "UcUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kandnhi, "UsUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_kandnsi, "UiUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kandndi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kandndi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_korqi, "UcUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_korhi, "UsUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_korsi, "UiUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kordi, "UOiUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kordi, "UOiUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kortestcqi, "iUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kortestzqi, "iUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_kortestchi, "iUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_kortestzhi, "iUsUs", "nc", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_kortestcsi, "iUiUi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_kortestzsi, "iUiUi", "nc", "avx512bw")
-TARGET_BUILTIN(__builtin_ia32_kortestcdi, "iUOiUOi", "nc", "avx512bw,evex512")
-TARGET_BUILTIN(__builtin_ia32_kortestzdi, "iUOiUOi", "nc", "avx512bw,evex512")
+TARGET_BUILTIN(__builtin_ia32_kortestcdi, "iUOiUOi", "nc", "avx512bw")
+TARGET_BUILTIN(__builtin_ia32_kortestzdi, "iUOiUOi", "nc", "avx512bw")
 TARGET_BUILTIN(__builtin_ia32_ktestcqi, "iUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_ktestzqi, "iUcUc", "nc", "avx512dq")
 TARGET_BUILTIN(__builtin_ia32_ktestchi, "iUsUs", "nc", "avx512dq")
 TARGET_BUILTIN(_

[clang] [llvm] [X86][AVX10] Allow 64-bit mask register used without EVEX512 (PR #75571)

2023-12-15 Thread Phoebe Wang via cfe-commits


https://github.com/phoebewang closed 
https://github.com/llvm/llvm-project/pull/75571
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[flang] [clang] [mlir] [lldb] [libcxxabi] [libc] [compiler-rt] [clang-tools-extra] [lld] [llvm] [libcxx] [openmp] [builtins][arm64] Build __init_cpu_features_resolver on Apple platforms (PR #73685)

2023-12-15 Thread David Spickett via cfe-commits


DavidSpickett wrote:

Also seen on Linaro's Windows on Arm 2 stage bot: 
https://lab.llvm.org/buildbot/#/builders/120/builds/5990

https://github.com/llvm/llvm-project/pull/73685
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][wasm] Resolve assertion errors caused by converting ComplexTy… (PR #70496)

2023-12-15 Thread via cfe-commits


https://github.com/knightXun updated 
https://github.com/llvm/llvm-project/pull/70496

>From d51afcd3e8f41bcf94259561e71fd10628fc78c3 Mon Sep 17 00:00:00 2001
From: xuknight 
Date: Sat, 28 Oct 2023 02:52:43 +0800
Subject: [PATCH] [clang][wasm] Resolve assertion errors caused by converting
 ComplexType to RecordType

When a function parameter is of the built-in Complex type in Clang,
the conversion from ComplexType to RecordType is not possible, resulting in a 
crash in Clang.
RecordType is a helper class for structs, unions, and classes.
---
 clang/lib/CodeGen/Targets/WebAssembly.cpp | 3 +++
 clang/test/CodeGen/pr70496.c  | 3 +++
 2 files changed, 6 insertions(+)
 create mode 100644 clang/test/CodeGen/pr70496.c

diff --git a/clang/lib/CodeGen/Targets/WebAssembly.cpp 
b/clang/lib/CodeGen/Targets/WebAssembly.cpp
index bd332228ce5bbe..b3f6473eb9bc74 100644
--- a/clang/lib/CodeGen/Targets/WebAssembly.cpp
+++ b/clang/lib/CodeGen/Targets/WebAssembly.cpp
@@ -114,6 +114,9 @@ ABIArgInfo 
WebAssemblyABIInfo::classifyArgumentType(QualType Ty) const {
   return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0)));
 // For the experimental multivalue ABI, fully expand all other aggregates
 if (Kind == WebAssemblyABIKind::ExperimentalMV) {
+  if (Ty->getAs()) {
+return ABIArgInfo::getDirect();
+  }
   const RecordType *RT = Ty->getAs();
   assert(RT);
   bool HasBitField = false;
diff --git a/clang/test/CodeGen/pr70496.c b/clang/test/CodeGen/pr70496.c
new file mode 100644
index 00..e5abf3e547ac27
--- /dev/null
+++ b/clang/test/CodeGen/pr70496.c
@@ -0,0 +1,3 @@
+// RUN: %clang --target=wasm32 -mmultivalue -Xclang -target-abi -Xclang 
experimental-mv %s -S -Xclang -verify
+
+float crealf() { return 0;} // expected-no-diagnostics
\ No newline at end of file

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AArch64] Update target feature requirements of SVE bfloat instructions (PR #75596)

2023-12-15 Thread Sander de Smalen via cfe-commits



@@ -2066,7 +2066,7 @@ let TargetGuard = "sve2p1|sme2" in {
   def SVPFALSE_COUNT_ALIAS : SInst<"svpfalse_c", "}v", "", MergeNone, "", 
[IsOverloadNone, IsStreamingCompatible]>;
 }
 
-let TargetGuard = "sve2p1,b16b16" in {
+let TargetGuard = "(sve2|sme2),b16b16" in {

sdesmalen-arm wrote:

nit: Github doesn't allow me to select the right line, but the comment on line 
2083 is no longer correct.

https://github.com/llvm/llvm-project/pull/75596
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[flang] [clang] [lldb] [libcxxabi] [lld] [compiler-rt] [clang-tools-extra] [llvm] [libcxx] [AMDGPU] GFX12: select @llvm.prefetch intrinsic (PR #74576)

2023-12-15 Thread Mariusz Sikora via cfe-commits


https://github.com/mariusz-sikora-at-amd updated 
https://github.com/llvm/llvm-project/pull/74576

>From 23759746b66c33028ad2340b1e98067ebf1f8074 Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin 
Date: Tue, 28 Jun 2022 15:24:24 -0700
Subject: [PATCH 1/4] [AMDGPU] GFX12: select @llvm.prefetch intrinsic

---
 .../Target/AMDGPU/AMDGPURegisterBankInfo.cpp  |  21 +
 llvm/lib/Target/AMDGPU/GCNSubtarget.h |   2 +
 llvm/lib/Target/AMDGPU/SIISelLowering.cpp |  22 +
 llvm/lib/Target/AMDGPU/SIISelLowering.h   |   2 +
 llvm/lib/Target/AMDGPU/SIInstrInfo.cpp|   2 +
 llvm/lib/Target/AMDGPU/SIInstructions.td  |  12 +
 llvm/lib/Target/AMDGPU/SMInstructions.td  |  34 ++
 llvm/test/CodeGen/AMDGPU/llvm.prefetch.ll | 496 ++
 8 files changed, 591 insertions(+)
 create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.prefetch.ll

diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
index 62996a3b3fb79f..f0b3ed7adc294c 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
@@ -3101,6 +3101,24 @@ void AMDGPURegisterBankInfo::applyMappingImpl(
   applyDefaultMapping(OpdMapper);
   constrainOpWithReadfirstlane(B, MI, 8); // M0
   return;
+case Intrinsic::prefetch: {
+  if (!Subtarget.hasPrefetch()) {
+MI.eraseFromParent();
+return;
+  }
+  unsigned PtrBank =
+  getRegBankID(MI.getOperand(1).getReg(), MRI, AMDGPU::SGPRRegBankID);
+  if (PtrBank == AMDGPU::VGPRRegBankID) {
+MI.eraseFromParent();
+return;
+  }
+  // FIXME: There is currently no support for prefetch in global isel.
+  // There is no node equivalence and what's worse there is no MMO produced
+  // for a prefetch on global isel path.
+  // Prefetch does not affect execution so erase it for now.
+  MI.eraseFromParent();
+  return;
+}
 default: {
   if (const AMDGPU::RsrcIntrinsic *RSrcIntrin =
   AMDGPU::lookupRsrcIntrinsic(IntrID)) {
@@ -4830,6 +4848,9 @@ AMDGPURegisterBankInfo::getInstrMapping(const 
MachineInstr &MI) const {
   getVGPROpMapping(MI.getOperand(5).getReg(), MRI, *TRI); // %data1
   break;
 }
+case Intrinsic::prefetch:
+  OpdsMapping[1] = getSGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI);
+  break;
 
 default:
   return getInvalidInstructionMapping();
diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h 
b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
index 94b9e49b765a6f..21a9b8147034fc 100644
--- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
@@ -828,6 +828,8 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
 
   bool hasInstPrefetch() const { return getGeneration() >= GFX10; }
 
+  bool hasPrefetch() const { return GFX12Insts; }
+
   // Scratch is allocated in 256 dword per wave blocks for the entire
   // wavefront. When viewed from the perspective of an arbitrary workitem, this
   // is 4-byte aligned.
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp 
b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index a7f4d63229b7ef..93af38d877c5d4 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -763,6 +763,9 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM,
   if (Subtarget->hasMad64_32())
 setOperationAction({ISD::SMUL_LOHI, ISD::UMUL_LOHI}, MVT::i32, Custom);
 
+  if (Subtarget->hasPrefetch())
+setOperationAction(ISD::PREFETCH, MVT::Other, Custom);
+
   setOperationAction(ISD::INTRINSIC_WO_CHAIN,
  {MVT::Other, MVT::f32, MVT::v4f32, MVT::i16, MVT::f16,
   MVT::v2i16, MVT::v2f16, MVT::i128},
@@ -3858,6 +3861,23 @@ SDValue SITargetLowering::lowerGET_ROUNDING(SDValue Op,
   return DAG.getMergeValues({Result, GetReg.getValue(1)}, SL);
 }
 
+SDValue SITargetLowering::lowerPREFETCH(SDValue Op, SelectionDAG &DAG) const {
+  if (Op->isDivergent())
+return SDValue();
+
+  switch (cast(Op)->getAddressSpace()) {
+  case AMDGPUAS::FLAT_ADDRESS:
+  case AMDGPUAS::GLOBAL_ADDRESS:
+  case AMDGPUAS::CONSTANT_ADDRESS:
+  case AMDGPUAS::CONSTANT_ADDRESS_32BIT:
+break;
+  default:
+return SDValue();
+  }
+
+  return Op;
+}
+
 Register SITargetLowering::getRegisterByName(const char* RegName, LLT VT,
  const MachineFunction &MF) const {
   Register Reg = StringSwitch(RegName)
@@ -5395,6 +5415,8 @@ SDValue SITargetLowering::LowerOperation(SDValue Op, 
SelectionDAG &DAG) const {
 return LowerSTACKSAVE(Op, DAG);
   case ISD::GET_ROUNDING:
 return lowerGET_ROUNDING(Op, DAG);
+  case ISD::PREFETCH:
+return lowerPREFETCH(Op, DAG);
   }
   return SDValue();
 }
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h 
b/llvm/lib/Target/AMDGPU/SIISelLowering.h
index c9cc149218a997..5bc091d6e84de3 100644
--- a/llvm/lib/Target/AMDGPU/SIISe

[flang] [clang] [lldb] [libc] [compiler-rt] [clang-tools-extra] [lld] [llvm] [libcxx] [openmp] Gcc 75 libomptarget type convert (PR #75562)

2023-12-15 Thread Joseph Huber via cfe-commits



@@ -47,7 +47,9 @@ PluginAdaptorTy::create(const std::string &Name) {
   new PluginAdaptorTy(Name, std::move(LibraryHandler)));
   if (auto Err = PluginAdaptor->init())
 return Err;
-  return PluginAdaptor;

jhuber6 wrote:

Does putting `std::move` here not work?

https://github.com/llvm/llvm-project/pull/75562
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[lld] [flang] [clang-tools-extra] [lldb] [compiler-rt] [libcxx] [clang] [libc] [llvm] [openmp] Gcc 75 libomptarget type convert (PR #75562)

2023-12-15 Thread Shilei Tian via cfe-commits


shiltian wrote:

FYI: #75419

https://github.com/llvm/llvm-project/pull/75562
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AArch64][SME2] Add SME2 MLA/MLS builtins. (PR #75584)

2023-12-15 Thread Sander de Smalen via cfe-commits



@@ -315,6 +315,223 @@ let TargetGuard = "sme2" in {
   def SVBMOPS : Inst<"svbmops_za32[_{d}]_m", "viPPdd", "iUi", MergeNone, 
"aarch64_sme_bmops_za32", [IsSharedZA, IsStreaming], [ImmCheck<0, 
ImmCheck0_3>]>;
 }
 
+// FMLA/FMLS
+let TargetGuard = "sme2" in {
+  def SVMLA_MULTI_VG1x2_F32 : Inst<"svmla_za32[_{d}]_vg1x2", "vm22", "f", 
MergeNone, "aarch64_sme_fmla_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLA_MULTI_VG1x4_F32 : Inst<"svmla_za32[_{d}]_vg1x4", "vm44", "f", 
MergeNone, "aarch64_sme_fmla_vg1x4", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_MULTI_VG1x2_F32 : Inst<"svmls_za32[_{d}]_vg1x2", "vm22", "f", 
MergeNone, "aarch64_sme_fmls_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_MULTI_VG1x4_F32 : Inst<"svmls_za32[_{d}]_vg1x4", "vm44", "f", 
MergeNone, "aarch64_sme_fmls_vg1x4", [IsStreaming, IsSharedZA], []>;
+
+  def SVMLA_SINGLE_VG1x2_F32 : Inst<"svmla[_single]_za32[_{d}]_vg1x2", "vm2d", 
"f", MergeNone, "aarch64_sme_fmla_single_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLA_SINGLE_VG1x4_F32 : Inst<"svmla[_single]_za32[_{d}]_vg1x4", "vm4d", 
"f", MergeNone, "aarch64_sme_fmla_single_vg1x4", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_SINGLE_VG1x2_F32 : Inst<"svmls[_single]_za32[_{d}]_vg1x2", "vm2d", 
"f", MergeNone, "aarch64_sme_fmls_single_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_SINGLE_VG1x4_F32 : Inst<"svmls[_single]_za32[_{d}]_vg1x4", "vm4d", 
"f", MergeNone, "aarch64_sme_fmls_single_vg1x4", [IsStreaming, IsSharedZA], []>;
+
+  def SVMLA_LANE_VG1x2_F32 : Inst<"svmla_lane_za32[_{d}]_vg1x2", "vm2di", "f", 
MergeNone, "aarch64_sme_fmla_lane_vg1x2", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_3>]>;
+  def SVMLA_LANE_VG1x4_F32 : Inst<"svmla_lane_za32[_{d}]_vg1x4", "vm4di", "f", 
MergeNone, "aarch64_sme_fmla_lane_vg1x4", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_3>]>;
+  def SVMLS_LANE_VG1x2_F32 : Inst<"svmls_lane_za32[_{d}]_vg1x2", "vm2di", "f", 
MergeNone, "aarch64_sme_fmls_lane_vg1x2", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_3>]>;
+  def SVMLS_LANE_VG1x4_F32 : Inst<"svmls_lane_za32[_{d}]_vg1x4", "vm4di", "f", 
MergeNone, "aarch64_sme_fmls_lane_vg1x4", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_3>]>;
+}
+
+let TargetGuard = "sme2,sme-f64f64" in {
+  def SVMLA_MULTI_VG1x2_F64 : Inst<"svmla_za64[_{d}]_vg1x2", "vm22", "d", 
MergeNone, "aarch64_sme_fmla_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLA_MULTI_VG1x4_F64 : Inst<"svmla_za64[_{d}]_vg1x4", "vm44", "d", 
MergeNone, "aarch64_sme_fmla_vg1x4", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_MULTI_VG1x2_F64 : Inst<"svmls_za64[_{d}]_vg1x2", "vm22", "d", 
MergeNone, "aarch64_sme_fmls_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_MULTI_VG1x4_F64 : Inst<"svmls_za64[_{d}]_vg1x4", "vm44", "d", 
MergeNone, "aarch64_sme_fmls_vg1x4", [IsStreaming, IsSharedZA], []>;
+
+  def SVMLA_SINGLE_VG1x2_F64 : Inst<"svmla[_single]_za64[_{d}]_vg1x2", "vm2d", 
"d", MergeNone, "aarch64_sme_fmla_single_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLA_SINGLE_VG1x4_F64 : Inst<"svmla[_single]_za64[_{d}]_vg1x4", "vm4d", 
"d", MergeNone, "aarch64_sme_fmla_single_vg1x4", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_SINGLE_VG1x2_F64 : Inst<"svmls[_single]_za64[_{d}]_vg1x2", "vm2d", 
"d", MergeNone, "aarch64_sme_fmls_single_vg1x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLS_SINGLE_VG1x4_F64 : Inst<"svmls[_single]_za64[_{d}]_vg1x4", "vm4d", 
"d", MergeNone, "aarch64_sme_fmls_single_vg1x4", [IsStreaming, IsSharedZA], []>;
+
+  def SVMLA_LANE_VG1x2_F64 : Inst<"svmla_lane_za64[_{d}]_vg1x2", "vm2di", "d", 
MergeNone, "aarch64_sme_fmla_lane_vg1x2", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_1>]>;
+  def SVMLA_LANE_VG1x4_F64 : Inst<"svmla_lane_za64[_{d}]_vg1x4", "vm4di", "d", 
MergeNone, "aarch64_sme_fmla_lane_vg1x4", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_1>]>;
+  def SVMLS_LANE_VG1x2_F64 : Inst<"svmls_lane_za64[_{d}]_vg1x2", "vm2di", "d", 
MergeNone, "aarch64_sme_fmls_lane_vg1x2", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_1>]>;
+  def SVMLS_LANE_VG1x4_F64 : Inst<"svmls_lane_za64[_{d}]_vg1x4", "vm4di", "d", 
MergeNone, "aarch64_sme_fmls_lane_vg1x4", [IsStreaming, IsSharedZA], 
[ImmCheck<3, ImmCheck0_1>]>;
+}
+
+// FMLAL/FMLSL/UMLAL/SMLAL
+// SMLALL/UMLALL/USMLALL/SUMLALL
+let TargetGuard = "sme2" in {
+  // MULTI MLAL
+  def SVMLAL_MULTI_VG2x2_F16 : Inst<"svmla_za32[_{d}]_vg2x2", "vm22", "bh", 
MergeNone, "aarch64_sme_fmlal_vg2x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLAL_MULTI_VG2x4_F16 : Inst<"svmla_za32[_{d}]_vg2x4", "vm44", "bh", 
MergeNone, "aarch64_sme_fmlal_vg2x4", [IsStreaming, IsSharedZA], []>;
+  def SVMLAL_MULTI_VG2x2_S16 : Inst<"svmla_za32[_{d}]_vg2x2", "vm22", "s", 
MergeNone, "aarch64_sme_smlal_vg2x2", [IsStreaming, IsSharedZA], []>;
+  def SVMLAL_MULTI_VG2x4_S16 : Inst<"svmla_za32[_{d}]_vg2x4", "vm44", "s", 
MergeNone, "aarch64_sme_smlal_vg2x4", [IsStreaming, IsSharedZA], []>;
+  def SVMLAL_MULTI_VG2x2_U16 : Inst<"svmla_za32[_{d}]_vg2x2", "v

[clang] [AArch64][SME] Warn when using a streaming builtin from a non-streaming function (PR #75487)

2023-12-15 Thread Sander de Smalen via cfe-commits


sdesmalen-arm wrote:

> > If it's not too much trouble, could you `git cherry-pick 
> > c60663d128f8e0dccd418bdf16ecc403b96aa74a` into this? (Cool if not, ofc.)
> 
> Sure, I can do that. Would you also mind attempting to reproduce the compile 
> time with the latest commit, just to make sure it fixes the issue on your 
> end? I saw a 36 -> 31 second (compared to 30 on main) decrease which seems OK 
> but isn't on the same scale as the numbers you're seeing.

FWIW, on my machine (using -O3) compile time of SemaChecking.cpp goes from 25s 
(before this patch) -> 25.4s (after this patch), whereas before I saw a similar 
order of magnitude slowdown as @nico.

https://github.com/llvm/llvm-project/pull/75487
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Fix unexpected warnings after a01307a (PR #75591)

2023-12-15 Thread Mariya Podchishchaeva via cfe-commits


https://github.com/Fznamznon updated 
https://github.com/llvm/llvm-project/pull/75591

>From 7d93f51878c495e245ce21d4be97c4ca7cddd404 Mon Sep 17 00:00:00 2001
From: "Podchishchaeva, Mariya" 
Date: Fri, 15 Dec 2023 04:05:41 -0800
Subject: [PATCH 1/2] [clang] Fix unexpected warnings after a01307a

a01307a broke silencing of -Wmissing-field-initializers warnings in C for
nested designators. This fixes the issue.
---
 clang/lib/Sema/SemaInit.cpp  |  8 +++
 clang/test/Sema/missing-field-initializers.c | 23 
 2 files changed, 31 insertions(+)

diff --git a/clang/lib/Sema/SemaInit.cpp b/clang/lib/Sema/SemaInit.cpp
index de0d92edb550dd..1cd2198503abaf 100644
--- a/clang/lib/Sema/SemaInit.cpp
+++ b/clang/lib/Sema/SemaInit.cpp
@@ -864,6 +864,14 @@ InitListChecker::FillInEmptyInitializations(const 
InitializedEntity &Entity,
   WarnIfMissingField &=
   SemaRef.getLangOpts().CPlusPlus || !hasAnyDesignatedInits(SForm);
 
+  if (OuterILE) {
+InitListExpr *OuterSForm = OuterILE->isSyntacticForm()
+   ? OuterILE
+   : OuterILE->getSyntacticForm();
+WarnIfMissingField &= SemaRef.getLangOpts().CPlusPlus ||
+  !hasAnyDesignatedInits(OuterSForm);
+  }
+
   unsigned NumElems = numStructUnionElements(ILE->getType());
   if (!RDecl->isUnion() && RDecl->hasFlexibleArrayMember())
 ++NumElems;
diff --git a/clang/test/Sema/missing-field-initializers.c 
b/clang/test/Sema/missing-field-initializers.c
index 8653591ff1187a..8dc8288ad92e6c 100644
--- a/clang/test/Sema/missing-field-initializers.c
+++ b/clang/test/Sema/missing-field-initializers.c
@@ -61,3 +61,26 @@ struct S {
 // f1, now we no longer issue that warning (note, this code is still unsafe
 // because of the buffer overrun).
 struct S s = {1, {1, 2}};
+
+struct S1 {
+  long int l;
+  struct  { int a, b; } d1;
+};
+
+struct S1 s01 = { 1, {1} }; // expected-warning {{missing field 'b' 
initializer}}
+struct S1 s02 = { .d1.a = 1 }; // designator avoids MFI warning
+
+union U1 {
+  long int l;
+  struct  { int a, b; } d1;
+};
+
+union U1 u01 = { 1 };
+union U1 u02 = { .d1.a = 1 }; // designator avoids MFI warning
+
+struct S2 {
+  long int l;
+  struct { int a, b; struct {int c; } d2; } d1;
+};
+
+struct S2 s22 = { .d1.d2.c = 1 }; // designator avoids MFI warning

>From d779611237a5a4b8824c011a09639ff4f745fd23 Mon Sep 17 00:00:00 2001
From: "Podchishchaeva, Mariya" 
Date: Fri, 15 Dec 2023 05:29:56 -0800
Subject: [PATCH 2/2] Add comment

---
 clang/lib/Sema/SemaInit.cpp | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/clang/lib/Sema/SemaInit.cpp b/clang/lib/Sema/SemaInit.cpp
index 1cd2198503abaf..035eaae58965a4 100644
--- a/clang/lib/Sema/SemaInit.cpp
+++ b/clang/lib/Sema/SemaInit.cpp
@@ -865,6 +865,9 @@ InitListChecker::FillInEmptyInitializations(const 
InitializedEntity &Entity,
   SemaRef.getLangOpts().CPlusPlus || !hasAnyDesignatedInits(SForm);
 
   if (OuterILE) {
+// When nested designators are present, there might be two nested init
+// lists created and only outer will contain designated initializer
+// expression, so check outer list as well.
 InitListExpr *OuterSForm = OuterILE->isSyntacticForm()
? OuterILE
: OuterILE->getSyntacticForm();

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Fix unexpected warnings after a01307a (PR #75591)

2023-12-15 Thread Mariya Podchishchaeva via cfe-commits



@@ -864,6 +864,14 @@ InitListChecker::FillInEmptyInitializations(const 
InitializedEntity &Entity,
   WarnIfMissingField &=
   SemaRef.getLangOpts().CPlusPlus || !hasAnyDesignatedInits(SForm);
 
+  if (OuterILE) {

Fznamznon wrote:

Okay, sure.

https://github.com/llvm/llvm-project/pull/75591
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] f32662a - [clang][Interp][NFC] Remove outdated FIXME comment

2023-12-15 Thread Timm Bäder via cfe-commits


Author: Timm Bäder
Date: 2023-12-15T14:30:44+01:00
New Revision: f32662a40b0cc25f779ed10ea6515ba798922df8

URL: 
https://github.com/llvm/llvm-project/commit/f32662a40b0cc25f779ed10ea6515ba798922df8
DIFF: 
https://github.com/llvm/llvm-project/commit/f32662a40b0cc25f779ed10ea6515ba798922df8.diff

LOG: [clang][Interp][NFC] Remove outdated FIXME comment

This rework has already happened.

Added: 


Modified: 
clang/lib/AST/Interp/ByteCodeExprGen.cpp

Removed: 




diff  --git a/clang/lib/AST/Interp/ByteCodeExprGen.cpp 
b/clang/lib/AST/Interp/ByteCodeExprGen.cpp
index d0980882f402b9..e6b3097a80d8f7 100644
--- a/clang/lib/AST/Interp/ByteCodeExprGen.cpp
+++ b/clang/lib/AST/Interp/ByteCodeExprGen.cpp
@@ -563,8 +563,8 @@ bool ByteCodeExprGen::VisitLogicalBinOp(const 
BinaryOperator *E) {
 
 template 
 bool ByteCodeExprGen::VisitComplexBinOp(const BinaryOperator *E) {
-  // FIXME: We expect a pointer on the stack here.
-  //   we should not do that, but that's part of a bigger rework.
+  assert(Initializing);
+
   const Expr *LHS = E->getLHS();
   const Expr *RHS = E->getRHS();
   PrimType LHSElemT = *this->classifyComplexElementType(LHS->getType());



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang-tools-extra] 2103de0 - [clangd] Add header mapping for struct_rusage.h

2023-12-15 Thread Kadir Cetinkaya via cfe-commits


Author: Kadir Cetinkaya
Date: 2023-12-15T14:39:02+01:00
New Revision: 2103de0c4cced5d06165a8a8a84cec89c8ab3be0

URL: 
https://github.com/llvm/llvm-project/commit/2103de0c4cced5d06165a8a8a84cec89c8ab3be0
DIFF: 
https://github.com/llvm/llvm-project/commit/2103de0c4cced5d06165a8a8a84cec89c8ab3be0.diff

LOG: [clangd] Add header mapping for struct_rusage.h

Added: 


Modified: 
clang-tools-extra/clangd/index/CanonicalIncludes.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/index/CanonicalIncludes.cpp 
b/clang-tools-extra/clangd/index/CanonicalIncludes.cpp
index 9ba4d7a95415bc..42eeba36a80e43 100644
--- a/clang-tools-extra/clangd/index/CanonicalIncludes.cpp
+++ b/clang-tools-extra/clangd/index/CanonicalIncludes.cpp
@@ -670,6 +670,7 @@ const std::pair 
IncludeMappings[] = {
 {"bits/types.h", ""},
 {"bits/types/siginfo_t.h", ""},
 {"bits/types/struct_itimerspec.h", ""},
+{"bits/types/struct_rusage.h", ""},
 {"bits/uio.h", ""},
 {"bits/ustat.h", ""},
 {"bits/utmp.h", ""},



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Fix unexpected warnings after a01307a (PR #75591)

2023-12-15 Thread via cfe-commits



@@ -864,6 +864,14 @@ InitListChecker::FillInEmptyInitializations(const 
InitializedEntity &Entity,
   WarnIfMissingField &=
   SemaRef.getLangOpts().CPlusPlus || !hasAnyDesignatedInits(SForm);
 
+  if (OuterILE) {

mikaelholmen wrote:

Ok, ideally this should be reviewed by someone who knows the code but it LGTM.

https://github.com/llvm/llvm-project/pull/75591
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-repl] fix top-level statement declaration context (PR #75547)

2023-12-15 Thread Pavel Kalugin via cfe-commits


https://github.com/p4vook updated 
https://github.com/llvm/llvm-project/pull/75547

>From bf1bd0d9618d05ce718a9d834727ff25c3e92a18 Mon Sep 17 00:00:00 2001
From: Pavel Kalugin 
Date: Fri, 15 Dec 2023 03:07:06 +0300
Subject: [PATCH 1/4] clang-repl: fix top-level statement declaration context

Change the declaration context where we insert top-level
statements to CurrentContext.

Previously, top-level statement declarations were inserted
directly into the translation unit. This is incorrect, as
it leads to ignoring such statements located inside namespaces.

Fixes: #73632
Signed-off-by: Pavel Kalugin 
---
 clang/include/clang/AST/Decl.h | 3 ++-
 clang/lib/AST/Decl.cpp | 4 ++--
 clang/lib/Sema/SemaDecl.cpp| 4 ++--
 3 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/clang/include/clang/AST/Decl.h b/clang/include/clang/AST/Decl.h
index cd0878d7082514..7b1d9e8be6c59a 100644
--- a/clang/include/clang/AST/Decl.h
+++ b/clang/include/clang/AST/Decl.h
@@ -4440,7 +4440,8 @@ class TopLevelStmtDecl : public Decl {
   virtual void anchor();
 
 public:
-  static TopLevelStmtDecl *Create(ASTContext &C, Stmt *Statement);
+  static TopLevelStmtDecl *Create(ASTContext &C, DeclContext *DC,
+  Stmt *Statement);
   static TopLevelStmtDecl *CreateDeserialized(ASTContext &C, unsigned ID);
 
   SourceRange getSourceRange() const override LLVM_READONLY;
diff --git a/clang/lib/AST/Decl.cpp b/clang/lib/AST/Decl.cpp
index 527ea6042daa03..5c0f4f5b6b4ca1 100644
--- a/clang/lib/AST/Decl.cpp
+++ b/clang/lib/AST/Decl.cpp
@@ -5513,13 +5513,13 @@ FileScopeAsmDecl 
*FileScopeAsmDecl::CreateDeserialized(ASTContext &C,
 
 void TopLevelStmtDecl::anchor() {}
 
-TopLevelStmtDecl *TopLevelStmtDecl::Create(ASTContext &C, Stmt *Statement) {
+TopLevelStmtDecl *TopLevelStmtDecl::Create(ASTContext &C, DeclContext *DC,
+   Stmt *Statement) {
   assert(Statement);
   assert(C.getLangOpts().IncrementalExtensions &&
  "Must be used only in incremental mode");
 
   SourceLocation BeginLoc = Statement->getBeginLoc();
-  DeclContext *DC = C.getTranslationUnitDecl();
 
   return new (C, DC) TopLevelStmtDecl(DC, BeginLoc, Statement);
 }
diff --git a/clang/lib/Sema/SemaDecl.cpp b/clang/lib/Sema/SemaDecl.cpp
index be6a136ef37bc4..f78fada57f62d3 100644
--- a/clang/lib/Sema/SemaDecl.cpp
+++ b/clang/lib/Sema/SemaDecl.cpp
@@ -20287,8 +20287,8 @@ Decl *Sema::ActOnFileScopeAsmDecl(Expr *expr,
 }
 
 Decl *Sema::ActOnTopLevelStmtDecl(Stmt *Statement) {
-  auto *New = TopLevelStmtDecl::Create(Context, Statement);
-  Context.getTranslationUnitDecl()->addDecl(New);
+  auto *New = TopLevelStmtDecl::Create(Context, CurContext, Statement);
+  CurContext->addDecl(New);
   return New;
 }
 

>From 9a3c0c5e0e3f915ef94bc5612474a98fe4e78b26 Mon Sep 17 00:00:00 2001
From: Pavel Kalugin 
Date: Fri, 15 Dec 2023 15:05:45 +0300
Subject: [PATCH 2/4] [clang-repl] fix segfault in CleanUpPTU()

Check if the last translation unit or its first declaration
are actually empty and do not nead cleanup.

Previously this caused segmentation fault on empty PTUs.

Fixes: #72980
Signed-off-by: Pavel Kalugin 
---
 clang/lib/Interpreter/IncrementalParser.cpp | 8 
 1 file changed, 8 insertions(+)

diff --git a/clang/lib/Interpreter/IncrementalParser.cpp 
b/clang/lib/Interpreter/IncrementalParser.cpp
index 370bcbfee8b014..f894af881134bb 100644
--- a/clang/lib/Interpreter/IncrementalParser.cpp
+++ b/clang/lib/Interpreter/IncrementalParser.cpp
@@ -373,7 +373,15 @@ std::unique_ptr 
IncrementalParser::GenModule() {
 
 void IncrementalParser::CleanUpPTU(PartialTranslationUnit &PTU) {
   TranslationUnitDecl *MostRecentTU = PTU.TUPart;
+  if (!MostRecentTU) {
+return;
+  }
+
   TranslationUnitDecl *FirstTU = MostRecentTU->getFirstDecl();
+  if (!FirstTU) {
+return;
+  }
+
   if (StoredDeclsMap *Map = FirstTU->getPrimaryContext()->getLookupPtr()) {
 for (auto I = Map->begin(); I != Map->end(); ++I) {
   StoredDeclsList &List = I->second;

>From 5daf80f5063174646a724c2ecf55c78164717c29 Mon Sep 17 00:00:00 2001
From: Pavel Kalugin 
Date: Fri, 15 Dec 2023 15:11:43 +0300
Subject: [PATCH 3/4] [clang-repl] fix cleanup context in CleanUpPTU()

Get the last context returned by collectAllContexts() instead of just
the primary context.

This fixes cleanup in nested namespaces: instead of cleaning up all the
namespace hierarchy it cleans up just the innermost namespace.
---
 clang/lib/Interpreter/IncrementalParser.cpp | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/clang/lib/Interpreter/IncrementalParser.cpp 
b/clang/lib/Interpreter/IncrementalParser.cpp
index f894af881134bb..366610abecb071 100644
--- a/clang/lib/Interpreter/IncrementalParser.cpp
+++ b/clang/lib/Interpreter/IncrementalParser.cpp
@@ -382,7 +382,13 @@ void IncrementalParser::CleanUpPTU(PartialTranslationUnit 
&PTU) {
 return;
   }
 
-  if (StoredDeclsMap *Map = FirstTU->getPrimaryContext()->getLookupPtr()

[clang] [clang-repl] fix top-level statement declaration context (PR #75547)

2023-12-15 Thread Pavel Kalugin via cfe-commits


https://github.com/p4vook edited https://github.com/llvm/llvm-project/pull/75547
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Fix unexpected warnings after a01307a (PR #75591)

2023-12-15 Thread via cfe-commits


https://github.com/mikaelholmen approved this pull request.

Ok, ideally this should be reviewed by someone who knows the code but it LGTM.


https://github.com/llvm/llvm-project/pull/75591
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Fix unexpected warnings after a01307a (PR #75591)

2023-12-15 Thread Mariya Podchishchaeva via cfe-commits


Fznamznon wrote:

> Ok, ideally this should be reviewed by someone who knows the code but it LGTM.

I know, but a lot of folks are now on vacation already. The change is not 
complicated, so I'll probably wait till green pre-commit, then leave it for 
post-commit review to resolve the issue.

https://github.com/llvm/llvm-project/pull/75591
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Fix unexpected warnings after a01307a (PR #75591)

2023-12-15 Thread via cfe-commits


mikaelholmen wrote:

> > Ok, ideally this should be reviewed by someone who knows the code but it 
> > LGTM.
> 
> I know, but a lot of folks are now on vacation already. The change is not 
> complicated, so I'll probably wait till green pre-commit, then leave it for 
> post-commit review to resolve the issue.

Yeah, sounds good. Thanks!


https://github.com/llvm/llvm-project/pull/75591
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [mlir] [clang-tools-extra] [llvm] Support for dynamic dimensions in 'tensor.splat' (PR #74626)

2023-12-15 Thread Spenser Bauman via cfe-commits


https://github.com/sabauma closed 
https://github.com/llvm/llvm-project/pull/74626
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AArch64][SME] Warn when using a streaming builtin from a non-streaming function (PR #75487)

2023-12-15 Thread Sander de Smalen via cfe-commits



@@ -1702,6 +1705,62 @@ void SVEEmitter::createSMERangeChecks(raw_ostream &OS) {
   OS << "#endif\n\n";
 }
 
+void SVEEmitter::createStreamingAttrs(raw_ostream &OS, ACLEKind Kind) {
+  std::vector RV = Records.getAllDerivedDefinitions("Inst");
+  SmallVector, 128> Defs;
+  for (auto *R : RV)
+createIntrinsic(R, Defs);
+
+  // The mappings must be sorted based on BuiltinID.
+  llvm::sort(Defs, [](const std::unique_ptr &A,
+  const std::unique_ptr &B) {
+return A->getMangledName() < B->getMangledName();
+  });
+
+  StringRef ExtensionKind;
+  switch (Kind) {
+  case ACLEKind::SME:
+ExtensionKind = "SME";
+break;
+  case ACLEKind::SVE:
+ExtensionKind = "SVE";
+break;
+  }
+
+  OS << "#ifdef GET_" << ExtensionKind << "_STREAMING_ATTRS\n";
+
+  // Ensure these are only emitted once.
+  std::set Emitted;
+  llvm::StringMap> StreamingMap;

sdesmalen-arm wrote:

If you're using a `std::set` here, there is no need for sorting the Defs and 
also no need for `std::set<..> Emitted`

https://github.com/llvm/llvm-project/pull/75487
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AArch64][SME] Warn when using a streaming builtin from a non-streaming function (PR #75487)

2023-12-15 Thread Momchil Velikov via cfe-commits



@@ -1702,6 +1705,62 @@ void SVEEmitter::createSMERangeChecks(raw_ostream &OS) {
   OS << "#endif\n\n";
 }
 
+void SVEEmitter::createStreamingAttrs(raw_ostream &OS, ACLEKind Kind) {
+  std::vector RV = Records.getAllDerivedDefinitions("Inst");
+  SmallVector, 128> Defs;
+  for (auto *R : RV)
+createIntrinsic(R, Defs);
+
+  // The mappings must be sorted based on BuiltinID.
+  llvm::sort(Defs, [](const std::unique_ptr &A,
+  const std::unique_ptr &B) {
+return A->getMangledName() < B->getMangledName();
+  });
+
+  StringRef ExtensionKind;
+  switch (Kind) {
+  case ACLEKind::SME:
+ExtensionKind = "SME";
+break;
+  case ACLEKind::SVE:
+ExtensionKind = "SVE";
+break;
+  }
+
+  OS << "#ifdef GET_" << ExtensionKind << "_STREAMING_ATTRS\n";
+
+  // Ensure these are only emitted once.
+  std::set Emitted;
+  llvm::StringMap> StreamingMap;

momchil-velikov wrote:

I'd suggest not using `std::set` at all, sort it like it's done now and use 
`DenseSet`

https://github.com/llvm/llvm-project/pull/75487
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-repl] fix top-level statement declaration context (PR #75547)

2023-12-15 Thread Pavel Kalugin via cfe-commits


p4vook wrote:

Apparently, we should clean up only parts of the PTU that have changed. Dear 
reviewers, do you have any idea how that could be implemented?

https://github.com/llvm/llvm-project/pull/75547
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang-tools-extra] [clangd] Track IWYU pragmas for non-preamble includes (PR #75612)

2023-12-15 Thread kadir çetinkaya via cfe-commits


https://github.com/kadircet created 
https://github.com/llvm/llvm-project/pull/75612

This makes PragmaIncldues copyable, and copies it from preamble when building a
new AST.

Fixes https://github.com/clangd/clangd/issues/1843
Fixes https://github.com/clangd/clangd/issues/1571


From 8801af07ad4e469f832570b5027e1522f41a6d06 Mon Sep 17 00:00:00 2001
From: Kadir Cetinkaya 
Date: Fri, 15 Dec 2023 15:14:05 +0100
Subject: [PATCH] [clangd] Track IWYU pragmas for non-preamble includes

---
 clang-tools-extra/clangd/Hover.cpp|  4 ++--
 clang-tools-extra/clangd/IncludeCleaner.cpp   |  4 ++--
 clang-tools-extra/clangd/ParsedAST.cpp| 21 +++
 clang-tools-extra/clangd/ParsedAST.h  |  9 
 clang-tools-extra/clangd/XRefs.cpp|  2 +-
 clang-tools-extra/clangd/index/FileIndex.cpp  |  2 +-
 .../clangd/unittests/FileIndexTests.cpp   | 12 +--
 .../clangd/unittests/IncludeCleanerTests.cpp  |  2 ++
 clang-tools-extra/clangd/unittests/TestTU.cpp |  4 ++--
 .../include/clang-include-cleaner/Record.h|  2 +-
 .../include-cleaner/lib/Record.cpp|  5 +++--
 11 files changed, 36 insertions(+), 31 deletions(-)

diff --git a/clang-tools-extra/clangd/Hover.cpp 
b/clang-tools-extra/clangd/Hover.cpp
index 82323fe16c82b6..06b949bc4a2b55 100644
--- a/clang-tools-extra/clangd/Hover.cpp
+++ b/clang-tools-extra/clangd/Hover.cpp
@@ -1194,7 +1194,7 @@ void maybeAddSymbolProviders(ParsedAST &AST, HoverInfo 
&HI,
 
   const SourceManager &SM = AST.getSourceManager();
   llvm::SmallVector RankedProviders =
-  include_cleaner::headersForSymbol(Sym, SM, 
AST.getPragmaIncludes().get());
+  include_cleaner::headersForSymbol(Sym, SM, &AST.getPragmaIncludes());
   if (RankedProviders.empty())
 return;
 
@@ -1254,7 +1254,7 @@ void maybeAddUsedSymbols(ParsedAST &AST, HoverInfo &HI, 
const Inclusion &Inc) {
   llvm::DenseSet UsedSymbols;
   include_cleaner::walkUsed(
   AST.getLocalTopLevelDecls(), collectMacroReferences(AST),
-  AST.getPragmaIncludes().get(), AST.getPreprocessor(),
+  &AST.getPragmaIncludes(), AST.getPreprocessor(),
   [&](const include_cleaner::SymbolReference &Ref,
   llvm::ArrayRef Providers) {
 if (Ref.RT != include_cleaner::RefType::Explicit ||
diff --git a/clang-tools-extra/clangd/IncludeCleaner.cpp 
b/clang-tools-extra/clangd/IncludeCleaner.cpp
index 2f34c949349200..563a1f5d22f5b5 100644
--- a/clang-tools-extra/clangd/IncludeCleaner.cpp
+++ b/clang-tools-extra/clangd/IncludeCleaner.cpp
@@ -311,7 +311,7 @@ getUnused(ParsedAST &AST,
 auto IncludeID = static_cast(*MFI.HeaderID);
 if (ReferencedFiles.contains(IncludeID))
   continue;
-if (!mayConsiderUnused(MFI, AST, AST.getPragmaIncludes().get())) {
+if (!mayConsiderUnused(MFI, AST, &AST.getPragmaIncludes())) {
   dlog("{0} was not used, but is not eligible to be diagnosed as unused",
MFI.Written);
   continue;
@@ -403,7 +403,7 @@ IncludeCleanerFindings 
computeIncludeCleanerFindings(ParsedAST &AST) {
   .getBuiltinDir();
   include_cleaner::walkUsed(
   AST.getLocalTopLevelDecls(), /*MacroRefs=*/Macros,
-  AST.getPragmaIncludes().get(), AST.getPreprocessor(),
+  &AST.getPragmaIncludes(), AST.getPreprocessor(),
   [&](const include_cleaner::SymbolReference &Ref,
   llvm::ArrayRef Providers) {
 bool Satisfied = false;
diff --git a/clang-tools-extra/clangd/ParsedAST.cpp 
b/clang-tools-extra/clangd/ParsedAST.cpp
index d91ce7283ecee4..14a91797f4d2ea 100644
--- a/clang-tools-extra/clangd/ParsedAST.cpp
+++ b/clang-tools-extra/clangd/ParsedAST.cpp
@@ -653,6 +653,7 @@ ParsedAST::build(llvm::StringRef Filename, const 
ParseInputs &Inputs,
   }
 
   IncludeStructure Includes;
+  include_cleaner::PragmaIncludes PI;
   // If we are using a preamble, copy existing includes.
   if (Preamble) {
 Includes = Preamble->Includes;
@@ -660,11 +661,15 @@ ParsedAST::build(llvm::StringRef Filename, const 
ParseInputs &Inputs,
 // Replay the preamble includes so that clang-tidy checks can see them.
 ReplayPreamble::attach(Patch->preambleIncludes(), *Clang,
Patch->modifiedBounds());
+PI = *Preamble->Pragmas;
   }
   // Important: collectIncludeStructure is registered *after* ReplayPreamble!
   // Otherwise we would collect the replayed includes again...
   // (We can't *just* use the replayed includes, they don't have Resolved 
path).
   Includes.collect(*Clang);
+  // Same for pragma-includes, we're already inheriting preamble includes, so 
we
+  // should only receive callbacks for non-preamble mainfile includes.
+  PI.record(*Clang);
   // Copy over the macros in the preamble region of the main file, and combine
   // with non-preamble macros below.
   MainFileMacros Macros;
@@ -735,7 +740,7 @@ ParsedAST::build(llvm::StringRef Filename, const 
ParseInputs &Inputs,
   ParsedAST Result(Filename, Inputs.Version, std::move(P

[clang-tools-extra] [clangd] Track IWYU pragmas for non-preamble includes (PR #75612)

2023-12-15 Thread via cfe-commits


llvmbot wrote:




@llvm/pr-subscribers-clangd

Author: kadir çetinkaya (kadircet)


Changes

This makes PragmaIncldues copyable, and copies it from preamble when building a
new AST.

Fixes https://github.com/clangd/clangd/issues/1843
Fixes https://github.com/clangd/clangd/issues/1571


---
Full diff: https://github.com/llvm/llvm-project/pull/75612.diff


11 Files Affected:

- (modified) clang-tools-extra/clangd/Hover.cpp (+2-2) 
- (modified) clang-tools-extra/clangd/IncludeCleaner.cpp (+2-2) 
- (modified) clang-tools-extra/clangd/ParsedAST.cpp (+12-9) 
- (modified) clang-tools-extra/clangd/ParsedAST.h (+4-5) 
- (modified) clang-tools-extra/clangd/XRefs.cpp (+1-1) 
- (modified) clang-tools-extra/clangd/index/FileIndex.cpp (+1-1) 
- (modified) clang-tools-extra/clangd/unittests/FileIndexTests.cpp (+6-6) 
- (modified) clang-tools-extra/clangd/unittests/IncludeCleanerTests.cpp (+2) 
- (modified) clang-tools-extra/clangd/unittests/TestTU.cpp (+2-2) 
- (modified) 
clang-tools-extra/include-cleaner/include/clang-include-cleaner/Record.h (+1-1) 
- (modified) clang-tools-extra/include-cleaner/lib/Record.cpp (+3-2) 


``diff
diff --git a/clang-tools-extra/clangd/Hover.cpp 
b/clang-tools-extra/clangd/Hover.cpp
index 82323fe16c82b6..06b949bc4a2b55 100644
--- a/clang-tools-extra/clangd/Hover.cpp
+++ b/clang-tools-extra/clangd/Hover.cpp
@@ -1194,7 +1194,7 @@ void maybeAddSymbolProviders(ParsedAST &AST, HoverInfo 
&HI,
 
   const SourceManager &SM = AST.getSourceManager();
   llvm::SmallVector RankedProviders =
-  include_cleaner::headersForSymbol(Sym, SM, 
AST.getPragmaIncludes().get());
+  include_cleaner::headersForSymbol(Sym, SM, &AST.getPragmaIncludes());
   if (RankedProviders.empty())
 return;
 
@@ -1254,7 +1254,7 @@ void maybeAddUsedSymbols(ParsedAST &AST, HoverInfo &HI, 
const Inclusion &Inc) {
   llvm::DenseSet UsedSymbols;
   include_cleaner::walkUsed(
   AST.getLocalTopLevelDecls(), collectMacroReferences(AST),
-  AST.getPragmaIncludes().get(), AST.getPreprocessor(),
+  &AST.getPragmaIncludes(), AST.getPreprocessor(),
   [&](const include_cleaner::SymbolReference &Ref,
   llvm::ArrayRef Providers) {
 if (Ref.RT != include_cleaner::RefType::Explicit ||
diff --git a/clang-tools-extra/clangd/IncludeCleaner.cpp 
b/clang-tools-extra/clangd/IncludeCleaner.cpp
index 2f34c949349200..563a1f5d22f5b5 100644
--- a/clang-tools-extra/clangd/IncludeCleaner.cpp
+++ b/clang-tools-extra/clangd/IncludeCleaner.cpp
@@ -311,7 +311,7 @@ getUnused(ParsedAST &AST,
 auto IncludeID = static_cast(*MFI.HeaderID);
 if (ReferencedFiles.contains(IncludeID))
   continue;
-if (!mayConsiderUnused(MFI, AST, AST.getPragmaIncludes().get())) {
+if (!mayConsiderUnused(MFI, AST, &AST.getPragmaIncludes())) {
   dlog("{0} was not used, but is not eligible to be diagnosed as unused",
MFI.Written);
   continue;
@@ -403,7 +403,7 @@ IncludeCleanerFindings 
computeIncludeCleanerFindings(ParsedAST &AST) {
   .getBuiltinDir();
   include_cleaner::walkUsed(
   AST.getLocalTopLevelDecls(), /*MacroRefs=*/Macros,
-  AST.getPragmaIncludes().get(), AST.getPreprocessor(),
+  &AST.getPragmaIncludes(), AST.getPreprocessor(),
   [&](const include_cleaner::SymbolReference &Ref,
   llvm::ArrayRef Providers) {
 bool Satisfied = false;
diff --git a/clang-tools-extra/clangd/ParsedAST.cpp 
b/clang-tools-extra/clangd/ParsedAST.cpp
index d91ce7283ecee4..14a91797f4d2ea 100644
--- a/clang-tools-extra/clangd/ParsedAST.cpp
+++ b/clang-tools-extra/clangd/ParsedAST.cpp
@@ -653,6 +653,7 @@ ParsedAST::build(llvm::StringRef Filename, const 
ParseInputs &Inputs,
   }
 
   IncludeStructure Includes;
+  include_cleaner::PragmaIncludes PI;
   // If we are using a preamble, copy existing includes.
   if (Preamble) {
 Includes = Preamble->Includes;
@@ -660,11 +661,15 @@ ParsedAST::build(llvm::StringRef Filename, const 
ParseInputs &Inputs,
 // Replay the preamble includes so that clang-tidy checks can see them.
 ReplayPreamble::attach(Patch->preambleIncludes(), *Clang,
Patch->modifiedBounds());
+PI = *Preamble->Pragmas;
   }
   // Important: collectIncludeStructure is registered *after* ReplayPreamble!
   // Otherwise we would collect the replayed includes again...
   // (We can't *just* use the replayed includes, they don't have Resolved 
path).
   Includes.collect(*Clang);
+  // Same for pragma-includes, we're already inheriting preamble includes, so 
we
+  // should only receive callbacks for non-preamble mainfile includes.
+  PI.record(*Clang);
   // Copy over the macros in the preamble region of the main file, and combine
   // with non-preamble macros below.
   MainFileMacros Macros;
@@ -735,7 +740,7 @@ ParsedAST::build(llvm::StringRef Filename, const 
ParseInputs &Inputs,
   ParsedAST Result(Filename, Inputs.Version, std::move(Preamble),
std::move(Clang)

[clang] [clang] Fix unexpected warnings after a01307a (PR #75591)

2023-12-15 Thread Mariya Podchishchaeva via cfe-commits


Fznamznon wrote:

Ok, adding more reviewers. Please feel free to do post-commit review.

https://github.com/llvm/llvm-project/pull/75591
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 32d5221 - [clang] Fix unexpected warnings after a01307a (#75591)

2023-12-15 Thread via cfe-commits


Author: Mariya Podchishchaeva
Date: 2023-12-15T15:25:01+01:00
New Revision: 32d5221ec4810dd723ccebaabbda1df5d3b4cfcf

URL: 
https://github.com/llvm/llvm-project/commit/32d5221ec4810dd723ccebaabbda1df5d3b4cfcf
DIFF: 
https://github.com/llvm/llvm-project/commit/32d5221ec4810dd723ccebaabbda1df5d3b4cfcf.diff

LOG: [clang] Fix unexpected warnings after a01307a (#75591)

a01307a broke silencing of -Wmissing-field-initializers warnings in C
for nested designators. This fixes the issue.

Added: 


Modified: 
clang/lib/Sema/SemaInit.cpp
clang/test/Sema/missing-field-initializers.c

Removed: 




diff  --git a/clang/lib/Sema/SemaInit.cpp b/clang/lib/Sema/SemaInit.cpp
index de0d92edb550dd..035eaae58965a4 100644
--- a/clang/lib/Sema/SemaInit.cpp
+++ b/clang/lib/Sema/SemaInit.cpp
@@ -864,6 +864,17 @@ InitListChecker::FillInEmptyInitializations(const 
InitializedEntity &Entity,
   WarnIfMissingField &=
   SemaRef.getLangOpts().CPlusPlus || !hasAnyDesignatedInits(SForm);
 
+  if (OuterILE) {
+// When nested designators are present, there might be two nested init
+// lists created and only outer will contain designated initializer
+// expression, so check outer list as well.
+InitListExpr *OuterSForm = OuterILE->isSyntacticForm()
+   ? OuterILE
+   : OuterILE->getSyntacticForm();
+WarnIfMissingField &= SemaRef.getLangOpts().CPlusPlus ||
+  !hasAnyDesignatedInits(OuterSForm);
+  }
+
   unsigned NumElems = numStructUnionElements(ILE->getType());
   if (!RDecl->isUnion() && RDecl->hasFlexibleArrayMember())
 ++NumElems;

diff  --git a/clang/test/Sema/missing-field-initializers.c 
b/clang/test/Sema/missing-field-initializers.c
index 8653591ff1187a..8dc8288ad92e6c 100644
--- a/clang/test/Sema/missing-field-initializers.c
+++ b/clang/test/Sema/missing-field-initializers.c
@@ -61,3 +61,26 @@ struct S {
 // f1, now we no longer issue that warning (note, this code is still unsafe
 // because of the buffer overrun).
 struct S s = {1, {1, 2}};
+
+struct S1 {
+  long int l;
+  struct  { int a, b; } d1;
+};
+
+struct S1 s01 = { 1, {1} }; // expected-warning {{missing field 'b' 
initializer}}
+struct S1 s02 = { .d1.a = 1 }; // designator avoids MFI warning
+
+union U1 {
+  long int l;
+  struct  { int a, b; } d1;
+};
+
+union U1 u01 = { 1 };
+union U1 u02 = { .d1.a = 1 }; // designator avoids MFI warning
+
+struct S2 {
+  long int l;
+  struct { int a, b; struct {int c; } d2; } d1;
+};
+
+struct S2 s22 = { .d1.d2.c = 1 }; // designator avoids MFI warning



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Fix unexpected warnings after a01307a (PR #75591)

2023-12-15 Thread Mariya Podchishchaeva via cfe-commits


https://github.com/Fznamznon closed 
https://github.com/llvm/llvm-project/pull/75591
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

1 2 3 4 >

1 - 100 of 305 matches

Mail list logo