Houston stash
It did happen, but I had to leave before they got to the 2nd shed, and I was not able to upload anything onsite. Please see https://deskthority.net/viewtopic.php?f=62&t=20593&e=1&view=unread#unread and https://drive.google.com/drive/folders/1Kw9caNwgBhlP-FMfQo9jsuTMeE2n0vd8?usp=sharing
Re: Houston stash
Nice System/36 & 5250. On 2019-01-20 01:50, Cindy Croxton via cctalk wrote: It did happen, but I had to leave before they got to the 2nd shed, and I was not able to upload anything onsite. Please see https://deskthority.net/viewtopic.php?f=62&t=20593&e=1&view=unread#unread and https://drive.google.com/drive/folders/1Kw9caNwgBhlP-FMfQo9jsuTMeE2n0vd8?usp=sharing
Re: PDP-11/45 RSTS/E boot problem
> From: Fritz Mueller > it flagged a bunch of memory locations that weren't reported by my much > simpler diagnostic (which only does all-ones/all-zeros passes looking for > stuck bits at this point.) What is is complaining about? > The MAINDEC memory diagnostic is bulky and complicated, and it takes > several minutes to re-download it after a power cycle, so it's not > exactly convenient to use while troubleshooting. Would it be possible to put it on a disk and boot it from there? If it's in some documented format (e.g. .LDA), I can easily produce a Unix disk with it on, if that would help (although loading the image onto the physical pack would take forever, I guess - although you could let it run overnight). It's probably not worth trying to devise a way to load individual files onto a Unix disk over the serial line until Unix is working reliably, so the program can run under Unix (otherwise a stand-alone program would have to include file-system code). > I'll probably be beefing up my smaller diagnostic with a few more tests > (including parity). One of the first things to add is to store each location's address in it during a set-up pass, and check to see that it's still there during the checking pass. > Went ahead and tried both RSTS and Unix again after the above repair, > and saw the same fault behaviors from both (sadness). Yeah, sounds like you still have memory issues (per the diagnostic grumping). > I tried enabling trap on parity error in the MS11 CSR before running my > diagnostic, but it didn't trap, even though it did flag parity error(s) > in the CSR. So maybe I *also* have a bug I haven't yet addressed in > parity handling within CPU. Starting the CPU (i.e. 'START' switch) or an INIT instruction will clear the 'trap enable' bit in the MS11-L CSR. I'd modify your program to set it, and check to see if you're getting parity error traps. (Clearly, if that hardware - either in the MS11-L, or the CPU - isn't working you need to look at that first.) > some of the earlier ones support setting a bit to determine whether > parity errors will halt or trap the CPU Huh? I was just looking at parity in the MM11-L and MM11-U (to see if parity needed to be enabled on them, or if it's always on by default), and I didn't see that. Also, there's no way I know of, on the UNIBUS, for anything to halt the CPU (the QBUS has such as line, but not the UNIBUS). Which memory has this feature? > I'm curious how OS init code sniffs out what memory CSRs there are, > determines their specific flavors and, in a heterogeneous system, > determines how much address space is under the auspice of each CSR? Unix V6 does nothing at all with parity (doesn't enable it in memory modules, although the memory that was extant at the time - MM11-S, MM11-U, etc - did support it as an option). If one turned it on, the code _would_ catch the trap and 'panic' (print a message and halt operation). It would be pretty easy to modify the code to send a signal to the process if it happened in User mode. I'm not sure there's much to be done if it happens in Kernel mode. V6 sizes memory by doing a read every 0100 bytes (of the 00 byte), looking for success or a trap. If that succeeds, it clears the 32. sequential words starting at that address, and then tries the next 0100. (So if you modified the code to enable parity traps, you wouldn't hsave to deal with bad parity left over from random contents at power-on) > The 11/45 prints show a jumper (W1, lower left of sheet UBCB) that > looks like it would entirely disable Unibus parity error detection if > removed. Yup, that's what it looks like to me too.. > when I pulled and examined my UBC board (and also looked over my spare) > no such jumper or any associated pads were anywhere to be found! So maybe > this was either added/removed from later etches of the UBC? Well, if you have an M8106, you do have a KB11-A; in the later /45 CPU, the KB11-D, that has been replaced by the M8119 - but that still has W1! (The KB11-D prints are in MP00039, 11/55 Vol 1.) I looked on my M8119, and W1 is indeed there - it's a 0-ohm 'resistor' (single black band) just less than half-way up the 4th column of chips, with a '1' next to it in the etch. The M8106 board layout drawing (a couple of pages back from UBCB) does show W1 - upper left corner of the board, next to E84. Noel
VXT2000+
Bummer time I turned on my VXT2000+ today and after about 5 minutes there was a "pop" and a small puff of smoke from the power supply. No smell like you get from a selenium diode or other semiconductor. Now, the fan tries to run but only twitches and the led blinks slowly. No obvious blown part visible. Does anyone have a service manual for the H7109-B Power Supply? I would really like to fix this but I can't see paying $150-$250 for a replacement. (Actually, if I had that kind of money I would, but I don't!) bill
Re: 3850 media
Original lister has relisted the item https://www.ebay.com/itm/IBM-3850-media-cartridge-1970s-vintage/123603101597 And now one shows up in the UK. Same photos and description. Very strange. https://www.ebay.co.uk/itm/113564749573 I have asked why his listing is identical to the other one. :-)
Re: 3850 media
On 1/20/19 12:30 PM, cctalk via cctalk wrote: > Original lister has relisted the item > > https://www.ebay.com/itm/IBM-3850-media-cartridge-1970s-vintage/123603101597 > > And now one shows up in the UK. Same photos and description. Very strange. > > https://www.ebay.co.uk/itm/113564749573 > > I have asked why his listing is identical to the other one. :-) > Lots of stuff like that. I looked at a VXT1000 today listed in at least a half dozen different countries ebay sites. I assume ebay allows that. bill
Re: DEC Rainbow / Pro video on VGA monitors?
I'm trying to find a way to get my DEC Rainbow's monochrome output onto a newer monitor than my aging VR201 (especially since I zapped something in it and my diagnostic efforts to date haven't fixed it). I can't remember the video output on the Rainbow, but I wanted to do something similar to have one setup for the S-100 machines. After looking on eBay (before I banned them from my use), I found a device that basically had RCA audio/video inputs with a VGA output. It also had the advantage of having an analog TV tuner built in so I could also use things like the old video games that had the Channel 3/4 output. The device is buried somewhere so I can't tell you the brand.
Re: PDP-11/45 RSTS/E boot problem
Thanks, Paul and Noel, for the detailed responses per usual! > On Jan 20, 2019, at 6:55 AM, Noel Chiappa wrote: > > What is [MAINDEC ZQMC] complaining about? Looks like a few more flaky bits in a couple of additional banks. For those reading along who may be unfamiliar with the MS11-L, it is laid out as 8 physical banks, each containing 18 16K x 1 DRAMS (16 data + 2 parity bits per word. So a flaky bit in a physical bank implicates one particular chip. > Would it be possible to put [ZQMC] on a disk and boot it from there? I have thought about that... The most efficient way I think would be to work up a simple LDA loader that would fit in a boot sector, and load a diagnostic from contiguous disk starting at the second sector. It would then be easy to blast down just the boot sector and a single desired diagnostic without imaging an entire pack. > One of the first things to add [to custom diagnostic] is to store each > location's address in it during a set-up pass, and check to see that it's > still there during the checking pass. I did this last night, actually. I also added a "random" bits test that uses the program image itself as a source sequence for words to write/compare. The good news is that my enhanced diagnostics now detect failures in the same physical banks and with the same bits as those flagged by the MAINDEC diagnostic. This was a good lesson learned: all ones / all zeros is definitely not good enough when checking this sort of thing! Another thing I found interesting, though, is that the "random" test *also* found a malfunctioning bit that the address test had missed. So ones/zeros and address isn't really good enough, either. I'm technically curious, now, about the failure modes of these sorts of DRAMS. I guess in addition to stuck bits, there are also potential decode fails (show up on address test, but not ones/zeros) and some errors that have history-dependence, perhaps internal latches (show up on random data test, but not address or ones/zeros.) I'd guess also there might be potential for crosstalk, noise, and "fading bit" type issues as well? Will have to see after I make the next round of repairs if there are still additional problems that the MAINDEC flags that my simplistic diag isn't shaking out. I've also been somewhat surprised by the level of repair needed on this memory board. So far, I've seen 6 failed 4116 out of an array of 144 total, so about a 4% failure rate. Is this typical for vintage 4116, or did somebody leave my poor MS11 out in a lightning storm? :-) > Starting the CPU (i.e. 'START' switch) or an INIT instruction will clear > the 'trap enable' bit in the MS11-L CSR. D'oh! Yes, thanks; I may very well have mucked that up. I'll give it another try with a little more care later today. > Which memory has this [parity halt vs trap] feature? Hmm, I saw this at least once when researching the variety of CSR formats yesterday morning; I'll have to see if I can dig it up again today. Might be just a fastbus thing? It's also hinted in paragraph 7.7.7 of the older KB11-A maintenance manual (NOT the later edition that covers both KB11-A and KB11-D): "The semiconductor memory control EHA and EHB (enable halt) flip-flops may be set under program control to assert SMCB PE HALT L if a parity error is detected. This input also asserts UBCB PARITY ERR SET L, which set the console flag and halts the CPU." This particular text is removed from the later KB11-A,D maintenance manual, and the description there seems to imply all reported parity conditions trap directly to 114. But there aren't any details in this section concerning processor revision/version etc. The logic design around all this is a bit complicated, and the fact that there are apparent discrepancies between the texts, available prints, and the actual M8106 boards I have on hand is not heartening! > The M8106 board layout drawing (a couple of pages back from UBCB) does show > W1 - > upper left corner of the board, next to E84. Yup. And, surprisingly, neither one of my M8106 has either a jumper or the indicated pull-up at that location! I'll try to send a pic later. The fact that W1 exists on the M8119 is interesting; maybe the situation is that the prints are for later revisions, and my actual M8106 are earlier? My /45 is a very early one -- serial 154! cheers, --FritzM.
Re: PDP-11/45 RSTS/E boot problem
> From: Paul Koning > It checks if the bits 007750 are active in the parity CSR, if so it > takes that to be an address/ECC parity CSR. That's odd; those are the 'error address' bits. Maybe there's an assumption that the sweep of memory to size it will have caused a parity error from garbage in DRAM at startup? (If so, I wonder if it would work on a machine with all core? :-) > It figures out the CSR to memory association by going through memory in > 1 kW increments ... This should set bad parity, and it scans all the > CSRs to see which one reports an error ... If no CSR has that set, it > concludes the particular block is no-parity memory. Oooh, pretty clever - good workaround for rhe undefined relationship between CSR's and memory. If I added parity support to V6, I'd be tempted to do it with a hand-configured table - devices are all manually configured anyway in V6, so I'd be continuing a theme... :-) Noel
Re: PDP-11/45 RSTS/E boot problem
> On Jan 20, 2019, at 4:29 PM, Noel Chiappa via cctalk > wrote: > >> From: Paul Koning > >> It checks if the bits 007750 are active in the parity CSR, if so it >> takes that to be an address/ECC parity CSR. > > That's odd; those are the 'error address' bits. Maybe there's an assumption > that the sweep of memory to size it will have caused a parity error from > garbage in DRAM at startup? (If so, I wonder if it would work on a machine > with all core? :-) No, what I meant is that it distinguishes between parity memory that reports the failing address, vs. parity memory that only reports there is something wrong. To do that, it tests whether those bits exist. If yes, then this is "address" type parity memory. paul
Re: PDP-11/45 RSTS/E boot problem
Some further info on the parity halt/trap thing: Digging again this morning for what I saw yesterday, it does look like it's a MS11 fastbus thing. The EHA/EHB bits are described in the Jan 1973 version of the 11/45 MS11 maintenance manual (table 3-12, describing the parity register), but they have been scrubbed out by the time of the Jan 1974 printing of the same manual! Somewhere yesterday I saw an actual register layout drawing that had these bits, but I'm not able to find it again this afternoon so far... --FritzM.
Re: PDP-11/45 RSTS/E boot problem
> On Jan 20, 2019, at 3:56 PM, Fritz Mueller via cctalk > wrote: > > ... > I'm technically curious, now, about the failure modes of these sorts of > DRAMS. I guess in addition to stuck bits, there are also potential decode > fails (show up on address test, but not ones/zeros) and some errors that have > history-dependence, perhaps internal latches (show up on random data test, > but not address or ones/zeros.) I'd guess also there might be potential for > crosstalk, noise, and "fading bit" type issues as well? Will have to see > after I make the next round of repairs if there are still additional problems > that the MAINDEC flags that my simplistic diag isn't shaking out. There are tests for crosstalk and decode problems, they may be marked as core memory tests but they might work anyway. There is the "no duplicate address test" which verifies that each word is accessed by exactly one address value. That would catch decode issues -- for example, a stuck address bit or a stuck decoder would be caught quickly. Not quite crosstalk, but there is the famous "core heating test" which hammers on a specific set of addresses which are near each other in the core mat, to see if the heat generated by those rapid accesses in a small physical area cause trouble. paul
WTB: Looking for several Intel manuals
All, I'm looking for hardcopy of: * Intel MCS-80 System Design Kit User's Guide * Intel MCS-8 Manual (8008) * Intel PROMPT-48 Microcomputer User's Manual I've got PDFs of these, but I like original dead tree format when I can find it. Thanks, Jonathan
Re: PDP-11/45 RSTS/E boot problem
Further archeology has led me to the "PDP-11/45, 11/50 MOS Memory Troublshooting Guide", the cover letter of which is quite amusing: "...COMPANY CONFIDENTIAL, that is take [this guide] on site but do not let the customer read it." "Please do not send these to the Depot for repair!! Instead send them to me with all the necessary paper work." "This cover letter should not be kept with the guide; ..." Oops on that last one :-) Somebody's job was on the line here one would guess. This document is also great for have the most information compiled in on place that I've been able to find so far on 11/45 ECOs! I've had a tough time trying to track those down -- they don't seem to be included among the DEC-O-LOGs archived in the usual places, and I haven't found anybody yet who has fiches or such containing them. --FritzM.
Re: DEC Rainbow / Pro video on VGA monitors?
On Sun, Jan 20, 2019 at 12:57 PM Marvin Johnston via cctalk < cctalk@classiccmp.org> wrote: > > > I'm trying to find a way to get my DEC Rainbow's monochrome output onto a > > newer monitor than my aging VR201 (especially since I zapped something in > > it and my diagnostic efforts to date haven't fixed it). > > I can't remember the video output on the Rainbow, but I wanted to do > something similar to have one setup for the S-100 machines. After > looking on eBay (before I banned them from my use), I found a device > that basically had RCA audio/video inputs with a VGA output. It also had > the advantage of having an analog TV tuner built in so I could also use > things like the old video games that had the Channel 3/4 output. > > The device is buried somewhere so I can't tell you the brand. > Yea. I'm going to order one or two others to see if I can get them to work... The TRB says: 4.4.8.14 Composite Video Signal Characteristics The composite video output provides a compatible EIA RS-170 output generated by combining the video signal with a composite sync signal. NOTE The use of dc coupling is not in strict agreement with the EIA RS-170 standard. To agree with RS170, the video generator output load would require a 10 microfarad capacitor in series with the output. Without the capacitor, the RS-170 2 milliamp dc short circuit requirement is violated. The composite video output has the following nominal characteristics: I. Output impedance = 75 ohms, dc coupled to 0.0 V 2. Sync level = 0.0 V 3. Reference black level = approximately 0.3 V with a 75 ohm load 4. Reference white level = approximately 1.0 V with a 75 ohm load 5. The composite sync waveform conforms to EIA RS-170 standards. The vertical interval is composed of six equalizing pulses, six vertical sync pulses, and six more equalizing pulses. The timing is as follows: Equalizing pulse width = 2.33us +/- 50ns Vertical pulse width = 27.28us +/- 200ns Horizontal pulse width = 4.71us +/- 50ns Horizontal blank width = 11.84us +/- 50ns (80-column mode) = 12.34us +/- 50ns (132-column mode) Front porch 1.54us +/- 50ns This differs a little from what I've found online for RS-170 timings: Reference Black = 0.075V White = 1.00V Sync = -0.40V in some places but seems to correspond to the pics at https://en.wikipedia.org/wiki/Composite_video almost exactly. So I'm confused. But I've seen other numbers as well. And the timings are roughly consistent with the envelops suggested in an old terribly scanned doc from the 80's that talks about video formats... Anyway, video formats always proliferate into a cluster of almost the same standards and it's hard to know what, exactly, to call them... I'm not sure if this helped, or not :( Warner
Re: PDP-11/45 RSTS/E boot problem
> From: Fritz Mueller > The most efficient way I think would be to work up a simple LDA loader > that would fit in a boot sector, and load a diagnostic from contiguous > disk starting at the second sector. It would then be easy to blast down > just the boot sector and a single desired diagnostic Yup, an .LDA loader wouldn't be hard. > The good news is that my enhanced diagnostics now detect failures in > the same physical banks and with the same bits Excellent! I imagine you're busy with a soldering iron at this moment? :-) Once those are fixed, it will be interesting to see if the problems you saw with the OS's go away. It'd be easy to hack V6 to turn on parity error detection, if you'd like to. > Will have to see after I make the next round of repairs if there are > still additional problems that the MAINDEC flags that my simplistic diag > isn't shaking out. It will be interesting to hear those results... > I've also been somewhat surprised by the level of repair needed on this > memory board. So far, I've seen 6 failed 4116 out of an array of 144 > total, so about a 4% failure rate. Is this typical for vintage 4116 I don't know about 4116's, but I've seen a fairly high failure rate on _some_ cards with 256K DRAM's - on one board, a couple of chips totally dead, some others with just _some_ bad bits. Other cards were totally fine. I suspect it depends on the chip manufacturer. > Might be just a fastbus thing? Could be - I'm not too familiar with the Fastbu. > It's also hinted in paragraph 7.7.7 of the older KB11-A maintenance > manual .. This particular text is removed from the later KB11-A,D > maintenance manual, and the description there seems to imply all reported > parity conditions trap directly to 114. Ah... Looking at the "pdp-11/45 processsor handbook", 1972 and 1973 editions, there's an "Appendix E: Memory Parity" (of which I was previously unaware!), referred to in "2.5.6 Memory Parity". (I haven't checked to see if later ones have it.) It claims there are "16 memory status registers ... each one associated with an 8K section of memory". (It doesn't say whether UNIBUS memory, Fastbus, or both!) One bit in each register claims to be 'Halt Enable': "[when] set, the machine will execute a halt if a parity error occurs"; when clear, it traps to 4! Even better, it claims to be able to control whether the memory uses odd or even parity! (How, for UNIBUS memory, I don't know - there's no way to do this over the UNIBUS. And the MM11-L and MM11-U manuals indicate they both use odd parity, although there's a CSR bit to allow wriring 'wrong' - i.e. even - parity.) Very odd. Maybe this was deleted in the hardware (or they decided not to do it), and someone forgot to follow through in the manual? I recently found another reference to a /45 CPU feature I'd never heard of - forget what it was, alas! > surprisingly, neither one of my M8106 has either a jumper or the > indicated pull-up at that location! The fact that W1 exists on the > M8119 is interesting; maybe the situation is that the prints are for > later revisions, and my actual M8106 are earlier? Could be. I wonder if there's any way to get ahold of the ECO list for that card? Noel
Re: DEC Rainbow / Pro video on VGA monitors?
On Sun, Jan 20, 2019, 4:11 PM Warner Losh As a PS, I connected the real vr201 with a keyboard and got the attached > photo. It looks like there is a one line error about missing keyboard in > the first line when there is no keyboard. Counting out the rows on the boot > screen confirms. So this is much closer than I thought. > The attached photo is actually the video on through the converter. Looks like I left out that sentence, which was kinda important. Warner > > > > On Sun, Jan 20, 2019, 3:16 PM Warner Losh >> >> >> On Sun, Jan 20, 2019 at 12:57 PM Marvin Johnston via cctalk < >> cctalk@classiccmp.org> wrote: >> >>> >>> > I'm trying to find a way to get my DEC Rainbow's monochrome output >>> onto a >>> > newer monitor than my aging VR201 (especially since I zapped something >>> in >>> > it and my diagnostic efforts to date haven't fixed it). >>> >>> I can't remember the video output on the Rainbow, but I wanted to do >>> something similar to have one setup for the S-100 machines. After >>> looking on eBay (before I banned them from my use), I found a device >>> that basically had RCA audio/video inputs with a VGA output. It also had >>> the advantage of having an analog TV tuner built in so I could also use >>> things like the old video games that had the Channel 3/4 output. >>> >>> The device is buried somewhere so I can't tell you the brand. >>> >> >> Yea. I'm going to order one or two others to see if I can get them to >> work... The TRB says: >> >> 4.4.8.14 Composite Video Signal Characteristics >> The composite video output provides a compatible EIA RS-170 output >> generated by combining the video signal with a composite sync signal. >> >> NOTE The use of dc coupling is not in strict agreement with the EIA >> RS-170 standard. To agree with RS170, the video generator output load would >> require a 10 microfarad capacitor in series with the output. Without the >> capacitor, the RS-170 2 milliamp dc short circuit requirement is violated. >> >> The composite video output has the following nominal characteristics: >> I. Output impedance = 75 ohms, dc coupled to 0.0 V >> 2. Sync level = 0.0 V >> 3. Reference black level = approximately 0.3 V with a 75 ohm load >> 4. Reference white level = approximately 1.0 V with a 75 ohm load >> 5. The composite sync waveform conforms to EIA RS-170 standards. >> >> The vertical interval is composed of six equalizing pulses, six vertical >> sync pulses, and six more equalizing pulses. >> >> The timing is as follows: >> Equalizing pulse width = 2.33us +/- 50ns >> Vertical pulse width = 27.28us +/- 200ns >> Horizontal pulse width = 4.71us +/- 50ns >> Horizontal blank width = 11.84us +/- 50ns (80-column mode) >> = 12.34us +/- 50ns (132-column mode) >> Front porch 1.54us +/- 50ns >> >> This differs a little from what I've found online for RS-170 timings: >> >> Reference Black = 0.075V >> White = 1.00V >> Sync = -0.40V >> >> in some places but seems to correspond to the pics at >> https://en.wikipedia.org/wiki/Composite_video almost exactly. So I'm >> confused. >> >> But I've seen other numbers as well. And the timings are roughly >> consistent with the envelops suggested in an old terribly scanned doc from >> the 80's that talks about video formats... >> >> Anyway, video formats always proliferate into a cluster of almost the >> same standards and it's hard to know what, exactly, to call them... >> >> I'm not sure if this helped, or not :( >> >> Warner >> >
Re: DEC Rainbow / Pro video on VGA monitors?
I have a few VR201 boards I might let loose. I don't want to sell any monitors until I fell off the DECMATES , Rainbows, and Pros. Paul On Sat, Jan 19, 2019 at 12:57 PM Warner Losh via cctalk < cctalk@classiccmp.org> wrote: > Greetings, > > I'm trying to find a way to get my DEC Rainbow's monochrome output onto a > newer monitor than my aging VR201 (especially since I zapped something in > it and my diagnostic efforts to date haven't fixed it). > > So, I found the bit in the Rainbow docs that said the output was DC Coupled > RS-170 signals and to convert to RS-170 (NTSC black and white) I needed to > put a 10uF cap inline to make it RS-170. So I did this, and fed it into a > generic NTSC composite video to VGA thing, and got only a little joy. The > first few lines seem to be missing, then the next few are OK and then > nothing else. > > I tried to google this, but found nothing. My google foo has failed me. > > Does anybody else have a working setup? > > Warner >
Re: PDP-11/45 RSTS/E boot problem
> On January 20, 2019 at 3:56 PM Fritz Mueller via cctalk > wrote: > > > > I'm technically curious, now, about the failure modes of these sorts of > DRAMS. I guess in addition to stuck bits, there are also potential decode > fails (show up on address test, but not ones/zeros) and some errors that have > history-dependence, perhaps internal latches (show up on random data test, > but not address or ones/zeros.) I'd guess also there might be potential for > crosstalk, noise, and "fading bit" type issues as well? Will have to see > after I make the next round of repairs if there are still additional problems > that the MAINDEC flags that my simplistic diag isn't shaking out. > Jack Ganssle wrote a couple of articles about memory testing and failure modes. They may be useful or at least interesting. http://www.ganssle.com/articles/aramrom.htm http://www.ganssle.com/articles/ramtest.htm Will "He may look dumb but that's just a disguise." -- Charlie Daniels "The names of global variables should start with // " -- https://isocpp.org
UK: TRS-80 Model 100 Assembler/Debugger & Remote Disk cassettes/manuals in bookcase covers
I have these two in unused condition (the paper inside is a little yellowed but apart from that looks new) including cassettes. Cat no: 26-3839 & 26-3823 Ten pound including postage as paypal gift - not asking a lot as I'd rather someone had them and saved them from the tip. Regards, Mark.
Re: 3850 media
2nd seller indicates he is the first seller. Just selling on UK eBay. Don’t think you need different IDs to do that but what the hey. Whatever floats your boat.
Handful of SUN SCSI cables
Anyone in the UK want a handful of Sun SCSI cables. Six cables of various lengths with various combinations of narrow, wide and ultrawide connectors including the tiny SCSI connectors. 5 quid as a paypal friend will cover postage. Regards, Mark.
Re: DEC Rainbow / Pro video on VGA monitors?
As a PS, I connected the real vr201 with a keyboard and got the attached photo. It looks like there is a one line error about missing keyboard in the first line when there is no keyboard. Counting out the rows on the boot screen confirms. So this is much closer than I thought. Warner On Sun, Jan 20, 2019, 3:16 PM Warner Losh > > On Sun, Jan 20, 2019 at 12:57 PM Marvin Johnston via cctalk < > cctalk@classiccmp.org> wrote: > >> >> > I'm trying to find a way to get my DEC Rainbow's monochrome output onto >> a >> > newer monitor than my aging VR201 (especially since I zapped something >> in >> > it and my diagnostic efforts to date haven't fixed it). >> >> I can't remember the video output on the Rainbow, but I wanted to do >> something similar to have one setup for the S-100 machines. After >> looking on eBay (before I banned them from my use), I found a device >> that basically had RCA audio/video inputs with a VGA output. It also had >> the advantage of having an analog TV tuner built in so I could also use >> things like the old video games that had the Channel 3/4 output. >> >> The device is buried somewhere so I can't tell you the brand. >> > > Yea. I'm going to order one or two others to see if I can get them to > work... The TRB says: > > 4.4.8.14 Composite Video Signal Characteristics > The composite video output provides a compatible EIA RS-170 output > generated by combining the video signal with a composite sync signal. > > NOTE The use of dc coupling is not in strict agreement with the EIA RS-170 > standard. To agree with RS170, the video generator output load would > require a 10 microfarad capacitor in series with the output. Without the > capacitor, the RS-170 2 milliamp dc short circuit requirement is violated. > > The composite video output has the following nominal characteristics: > I. Output impedance = 75 ohms, dc coupled to 0.0 V > 2. Sync level = 0.0 V > 3. Reference black level = approximately 0.3 V with a 75 ohm load > 4. Reference white level = approximately 1.0 V with a 75 ohm load > 5. The composite sync waveform conforms to EIA RS-170 standards. > > The vertical interval is composed of six equalizing pulses, six vertical > sync pulses, and six more equalizing pulses. > > The timing is as follows: > Equalizing pulse width = 2.33us +/- 50ns > Vertical pulse width = 27.28us +/- 200ns > Horizontal pulse width = 4.71us +/- 50ns > Horizontal blank width = 11.84us +/- 50ns (80-column mode) > = 12.34us +/- 50ns (132-column mode) > Front porch 1.54us +/- 50ns > > This differs a little from what I've found online for RS-170 timings: > > Reference Black = 0.075V > White = 1.00V > Sync = -0.40V > > in some places but seems to correspond to the pics at > https://en.wikipedia.org/wiki/Composite_video almost exactly. So I'm > confused. > > But I've seen other numbers as well. And the timings are roughly > consistent with the envelops suggested in an old terribly scanned doc from > the 80's that talks about video formats... > > Anyway, video formats always proliferate into a cluster of almost the same > standards and it's hard to know what, exactly, to call them... > > I'm not sure if this helped, or not :( > > Warner >
