On Tue, Mar 18, 2025 at 09:31:35PM -0300, Jason Gunthorpe wrote:
> On Tue, Mar 18, 2025 at 07:31:36PM +0100, Eric Auger wrote:
> > Nevertheless I don't think anything prevents the acceleration granted
> > device from also working with virtio/vhost devices for instance unless
> > you unplug the exis
Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset upon machine
reset. It also makes the SoC implementation not user-creatable which can trigger
the following crash:
$ ./qemu-system-aarch64 -M virt -device fsl-imx8mp
**
ERROR:../../devel/qemu/tcg/tcg.c:1006:tcg_register_thre
The SoC has three SPI controllers, not four. Remove the extra define of an SPI
IRQ.
Fixes: 06908a84f036 "hw/arm/fsl-imx8mp: Add SPI controllers"
Reviewed-by: Peter Maydell
Signed-off-by: Bernhard Beschow
---
include/hw/arm/fsl-imx8mp.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/
Hi,
tests/functional/test_migration.py says "The test works for both
netcat-traditional and netcat-openbsd packages." But when I run it for
qemu-system-aarch64 on an Ubuntu 22.04 container with netcat-traditional
installed, I get the following error:
TAP version 13
Traceback (most recent call las
On 3/18/25 3:13 PM, Nicolin Chen wrote:
On Tue, Mar 18, 2025 at 07:31:36PM +0100, Eric Auger wrote:
On 3/17/25 9:19 PM, Nicolin Chen wrote:
On Mon, Mar 17, 2025 at 04:24:53PM -0300, Jason Gunthorpe wrote:
On Mon, Mar 17, 2025 at 12:10:19PM -0700, Nicolin Chen wrote:
Another question: how d
Currently, the PCI_INTERRUPT_PIN alone is checked before enabling
the INTx. It is also necessary to have the IRQ Lines assigned for
the INTx to work.
The problem was observed on Power10 systems which primarily use
MSI-X, and LSI lines are not connected on all devices under a
PCIe switch. In this c
On 3/18/25 10:50, Peter Maydell wrote:
On Tue, 18 Mar 2025 at 17:42, Philippe Mathieu-Daudé wrote:
On 18/3/25 05:51, Pierrick Bouvier wrote:
Directly condition associated calls in target/arm/helper.c for now.
Signed-off-by: Pierrick Bouvier
---
target/arm/cpu.h| 8
target/
On 3/18/25 11:14, Philippe Mathieu-Daudé wrote:
On 18/3/25 05:51, Pierrick Bouvier wrote:
This does not hurt, even if they are not used.
I'm not convinced by the rationale.
Signed-off-by: Pierrick Bouvier
---
target/arm/cpu.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/target
On 18/3/25 07:14, Thomas Huth wrote:
From: Thomas Huth
We don't use the term "integration tests" for these kind of tests
anymore, it's "functional tests" nowadays.
Suggested-by: Niek Linnenbank
Signed-off-by: Thomas Huth
---
docs/system/arm/bananapi_m2u.rst | 6 +++---
docs/system/arm/ora
On Tue, 18 Mar 2025 at 15:04, Peter Maydell wrote:
> More generally, AIUI glibc expects that it has control over what's
> happening with threads, so it can set up its own data structures
> for the new thread (e.g. for TLS variables). This email from the
> glibc mailing list is admittedly now two d
On 18/3/25 18:15, Thomas Huth wrote:
From: Thomas Huth
They have been forgotten to be removed when converting the
test to the functional framework. Since they are of no use
anymore, let's remove them now.
Signed-off-by: Thomas Huth
---
tests/functional/test_x86_64_kvm_xen.py | 28 --
On Tue, 18 Mar 2025 17:52:53 +
Shivaprasad G Bhat wrote:
> Currently, the PCI_INTERRUPT_PIN alone is checked before enabling
> the INTx. It is also necessary to have the IRQ Lines assigned for
> the INTx to work.
>
> The problem was observed on Power10 systems which primarily use
> MSI-X, an
Convert the existing includes with sed.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
hw/display/vga_int.h | 2 +-
include/hw/char/parallel-isa.h| 2 +-
include/hw/dma/i8257.h| 2 +-
include/hw/ide/ide-bus.h | 2 +-
include/hw/isa/isa.h
Signed-off-by: Richard Henderson
---
include/exec/icount.h | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/include/exec/icount.h b/include/exec/icount.h
index 4964987ae4..7a26b40084 100644
--- a/include/exec/icount.h
+++ b/include/exec/icount.h
@@ -22,13 +22,21 @@ ty
From: Philippe Mathieu-Daudé
At some point cputlb.c stopped depending on the
"exec/memory-internal.h" header. Clean that now.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
Message-ID: <20250317161329.40300-
The implementation of cpu_mmu_index was split between cpu-common.h
and cpu-all.h, depending on CONFIG_USER_ONLY. We already have the
plumbing common to user and system mode. Using MMU_USER_IDX
requires the cpu.h for a specific target, and so is restricted to
when we're compiling per-target.
Incl
Poison CONFIG_USER_ONLY and CONFIG_SOFTMMU unless
the compilation unit is in specific_ss, libuser_ss,
or libsystem_ss. This is intended to prevent files
being incorrectly added to common_ss.
Remove #ifndef CONFIG_USER_ONLY / #error / #endif blocks.
All they do is trigger the poison error.
Signed
While RISCVCPUConfig.satp_mode is unused for user-only,
this header is used from disas/riscv.h, whose users are
only built once. The savings of 4 bytes isn't worth it.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
target/riscv/cpu_cfg.h | 2 --
1 file changed, 2 deletions(
These need to be per-target for 'abi_ptr' and endianness.
These expand inline to the *_mmu api with a lookup of the
target's cpu_mmu_index() and ra == 0.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
include/exec/cpu_ldst.h | 31 +++
accel/tcg/cp
This is include/system, so CONFIG_USER_ONLY will never be true.
Signed-off-by: Richard Henderson
---
include/system/qtest.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/system/qtest.h b/include/system/qtest.h
index 6c501b..84b1f8c6ee 100644
--- a/include/system/qtest.h
+++ b/
From: Philippe Mathieu-Daudé
Only file units within the system/ directory need access to
"memory-internal.h". Restrict its scope by moving it there.
The comment from commit 9d70618c684 ("memory-internal.h:
Remove obsolete claim that header is obsolete") is now obsolete,
remove it.
Signed-off-by
While some of these files are built exactly once, due
to being in only libuser_ss or libsystem_ss, some of
the includes that they depend on require CONFIG_USER_ONLY.
So make use of the common infrastructure to allow that.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
accel/
The mmap_lock is user-only, whereas watchpoint.c
is only compiled for system mode.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
accel/tcg/watchpoint.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/accel/tcg/watchpoint.c b/accel/
Convert the existing includes with
sed -i ,exec/memory.h,system/memory.h,g
Move the include within cpu-all.h into a !CONFIG_USER_ONLY block.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
hw/arm/strongarm.h| 2
These need to be per-target for 'abi_ptr'. Expand inline to
the *_mmu api with trivial massaging of the arguments.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
include/exec/cpu_ldst.h | 163
accel/tcg/ldst_common.c.inc | 118 --
We were hiding a number of declarations from user-only,
although it hurts nothing to allow them. The inlines
for user-only are unused.
Signed-off-by: Richard Henderson
---
include/hw/intc/armv7m_nvic.h | 14 --
1 file changed, 14 deletions(-)
diff --git a/include/hw/intc/armv7m_nvi
We do not set CONFIG_SEMIHOSTING in
configs/targets/mips*-linux-user.mak.
Signed-off-by: Richard Henderson
---
target/mips/cpu.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index b207106dd7..47df563e12 100644
--- a/target/mips/
These routines are buggy in multiple ways:
- Use of target-endian loads, then a bswap that
depends on the host endiannness.
- A non-unwinding code load must set_helper_retaddr 1,
which is magic within adjust_signal_pc.
- cpu_ldq_code_mmu used MMU_DATA_LOAD
The bugs are hidden because
We were hiding a number of declarations from user-only,
although it hurts nothing to allow them.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
include/exec/cpu-common.h | 6 --
1 file changed, 6 deletions(-)
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-com
On 3/17/25 3:24 PM, Jason Gunthorpe wrote:
On Mon, Mar 17, 2025 at 12:10:19PM -0700, Nicolin Chen wrote:
Another question: how does an emulated device work with a vSMMUv3?
I could imagine that all the accel steps would be bypassed since
!sdev->idev. Yet, the emulated iotlb should cache its tr
Hi,
On 03/18, Lei Yang wrote:
> On Tue, Mar 18, 2025 at 10:15 AM Jason Wang wrote:
> >
> > On Tue, Mar 18, 2025 at 9:55 AM Lei Yang wrote:
> > >
> > > Hi Jonah
> > >
> > > I tested this series with the vhost_vdpa device based on mellanox
> > > ConnectX-6 DX nic and hit the host kernel crash. Thi
On Tue, Mar 18, 2025 at 01:34:57PM +0100, Andreas Schwab wrote:
> On Mär 18 2025, Daniel P. Berrangé wrote:
>
> > Whereever practical, it is preferrable to check a discrete feature
> > or behaviour in a functional way, rather than matching on "is it QEMU"
>
> Do you know a way to detect support f
Use vaddr only for the newest api, because it has the least
number of uses and therefore is the easiest to audit.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
accel/tcg/atomic_template.h | 16 ++---
include/exec/cpu_ldst.h | 48 ++---
Shameer,
Hi!
On 3/11/25 10:10 AM, Shameer Kolothum wrote:
User must associate a pxb-pcie root bus to smmuv3-accel
and that is set as the primary-bus for the smmu dev.
Signed-off-by: Shameer Kolothum
---
hw/arm/smmuv3-accel.c | 19 +++
1 file changed, 19 insertions(+)
diff
Convert the existing includes with sed.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
include/system/ram_addr.h | 2 +-
include/{exec => system}/ramblock.h | 9 -
hw/display/virtio-gpu-udmabuf.c | 2 +-
hw/hyperv/hv-balloon.c | 2 +-
hw/vi
On 3/18/25 15:11, Richard Henderson wrote:
On 3/17/25 21:51, Pierrick Bouvier wrote:
Including "cpu.h" from code that is not compiled per target is ambiguous
by definition. Thus we introduce a conditional include, to allow every
architecture to set this, to point to the correct definition.
hw/X
On Tue, 18 Mar 2025 14:13:03 -0700 Matheus Tavares Bernardino
wrote:
>
> [...]
>
> Thanks,
> Matheus
Sorry for the original title, I had some placeholder thrash in my buffer and
that
ended up going as the subject :facepalm:
On 3/17/25 21:51, Pierrick Bouvier wrote:
We prevent common code to use this define by mistake.
Signed-off-by: Pierrick Bouvier
---
include/exec/poison.h | 2 ++
1 file changed, 2 insertions(+)
Reviewed-by: Richard Henderson
r~
On 3/18/25 15:16, Pierrick Bouvier wrote:
This doesn't make any sense to me. CPU_INCLUDE is defined within the very file
that
you're trying to include by avoiding "cpu.h".
Every target/X/cpu.h includes cpu-all.h, which includes "cpu.h" itself, relying on per
target include path set by build
On 3/17/25 21:51, Pierrick Bouvier wrote:
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index f89568bfa39..28de3990699 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -13,6 +13,10 @@
*
*/
+#ifdef TARGET_AARCH64
+#define KVM_HAVE_MCE_INJECTION 1
+#endif
+
#includ
On 3/18/25 15:21, Richard Henderson wrote:
On 3/18/25 15:16, Pierrick Bouvier wrote:
This doesn't make any sense to me. CPU_INCLUDE is defined within the very file
that
you're trying to include by avoiding "cpu.h".
Every target/X/cpu.h includes cpu-all.h, which includes "cpu.h" itself, rely
Copy to libuser_ss and libsystem_ss.
This file uses semihosting/semihost.h, which has separate
implementations with and without CONFIG_USER_ONLY.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
gdbstub/meson.build | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
dif
Headers used by these files require CONFIG_USER_ONLY.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
plugins/meson.build | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/plugins/meson.build b/plugins/meson.build
index 3be8245a69..5383c7b88b 100644
---
Many of the headers used by these require CONFIG_USER_ONLY.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
hw/core/meson.build | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/core/meson.build b/hw/core/meson.build
index b5a545a0ed..547de6527c 10064
在 2025/3/19 上午12:23, Peter Maydell 写道:
On Fri, 7 Mar 2025 at 02:42, Song Gao wrote:
For LoongArch th min tlb_ps is 12(4KB), for TLB code,
the tlb_ps may be 0,this may case UndefinedBehavior
Add a check-tlb_ps fuction to check tlb_ps,
to make sure the tlb_ps is avalablie. we check tlb_ps
when ge
On 3/18/25 21:21, Markus Armbruster wrote:
zhenwei pi writes:
Hi Markus,
Current code style seems buggy, I think the main reason is that the Error *errp
is not generated at right place. keyctl_pkey_XXX fails without new error,
qcrypto_akcipher_XXX fails with new error, but they are in th
Jason,
Hey!
On 3/18/25 8:23 PM, Jason Gunthorpe wrote:
On Tue, Mar 18, 2025 at 05:22:51PM -0400, Donald Dutile wrote:
I agree with Eric that 'accel' isn't needed -- this should be
ascertained from the pSMMU that a physical device is attached to.
I seem to remember the point was made that we
On 3/18/25 09:32, Zhao Liu wrote:
In C version, VMSTATE_VALIDATE accepts the function pointer, which is
used to check if some conditions of structure could meet, although the
C version macro doesn't accept any structure as the opaque type.
But it's hard to integrate VMSTATE_VALIDAE into vmstate_
You can reproduce this issue by running ./qemu-img info segv.
The segv file used for reproduction can be found here:
https://github.com/Gerben100/reproduce_qemu-img_error
From: Thomas Huth
We should tell the users where to find the log file.
While we're at it, also rename the "Overview" heading to a
more accurate "Introduction to writing tests" instead.
Reported-by: Aditya Gupta
Signed-off-by: Thomas Huth
---
docs/devel/testing/functional.rst | 22
From: Corvin Köhne
Beckhoff has build a board, called CX7200, based on the Xilinx Zynq A9
platform. This commit series adds the Beckhoff CX7200 as new board variant to
QEMU.
The emulation is able to successfully boot an CX7200 image. The image includes
some self tests executed on every boot. Onl
From: Corvin Köhne
Beckhoff has build a board, called CX7200, based on the Xilinx Zynq A9
platform. This commit series adds the Beckhoff CX7200 as new board variant to
QEMU.
The emulation is able to successfully boot an CX7200 image. The image includes
some self tests executed on every boot. Onl
From: YannickV
The a9 global timer and arm mp timers rely on the PERIPHCLK as
their clock source. The current implementation does not take
that into account. That causes problems for applications assuming
other frequencies than 1 GHz.
We can now configure frequencies for the a9 global timer and
From: YannickV
The a9 global timer and arm mp timer rely on the PERIPHCLK
as their clock source. The period of PERIPHCLK (denoted as N)
must be a multiple of the core CLK period, with N being equal
to or greater than two. However, the current implementation
does not take the PERIPHCLK period into
From: YannickV
Setting PCFG_PROG_B should reset the PL. After a reset PCFG_INIT
should indicate that the reset is finished successfully.
In order to add a MMIO-Device as part of the PL in the Zynq, the
reset logic must succeed. The PCFG_INIT flag is now set when the
PL reset is triggered by PCFG
From: YannickV
A DMA transfer to destination address `0x` should trigger a
bitstream load via the PCAP interface. Currently, this case is not
intercepted, causing loaders to enter an infinite loop when polling
the status register.
This commit adds a check for `0x` as the destinat
From: YannickV
When the FPGA_RST_CTRL register in the SLCR (System Level Control
Register) is written to, the devcfg (Device Configuration) should
indicate the finished reset.
Problems occure when Loaders trigger a reset via SLCR and poll for
the done flag in devcfg. Since the flag will never be
RISC-V Privileged Spec states:
"In harts with S-mode, the medeleg and mideleg registers must exist, and
setting a bit in medeleg or mideleg will delegate the corresponding trap
, when occurring in S-mode or U-mode, to the S-mode trap handler. In
harts without S-mode, the medeleg and mideleg registe
From: YannickV
It is assumed, that the programmable logic (PL) is always powered
during emulation. Therefor the PCFG_POR_B bit in the MCTRL register
is set.
This commit is necessary for the Beckhoff CX7200 board emulation
that has a FPGA implemented in the PL.
Signed-off-by: Yannick Voßen
---
From: YannickV
The CX7200 has one QSPI flash connected to the QSPI bus. The
defines are adjusted accordingly. The QSPI flash is a is25lp016d.
There is no parallel flash.
Signed-off-by: Yannick Voßen
---
hw/arm/beckhoff_CX7200.c | 20
1 file changed, 4 insertions(+), 16 del
From: Prasad Pandit
Enable Multifd and Postcopy migration together.
The migration_ioc_process_incoming() routine
checks magic value sent on each channel and
helps to properly setup multifd and postcopy
channels.
The Precopy and Multifd threads work during the
initial guest RAM transfer. When mig
In C version, VMSTATE_VALIDATE accepts the function pointer, which is
used to check if some conditions of structure could meet, although the
C version macro doesn't accept any structure as the opaque type.
But it's hard to integrate VMSTATE_VALIDAE into vmstate_struct, a new
macro has to be introd
On Fri, 7 Mar 2025 at 02:42, Song Gao wrote:
>
> For LoongArch th min tlb_ps is 12(4KB), for TLB code,
> the tlb_ps may be 0,this may case UndefinedBehavior
> Add a check-tlb_ps fuction to check tlb_ps,
> to make sure the tlb_ps is avalablie. we check tlb_ps
> when get the tlb_ps from tlb->misc or
Hi,
Could you please let us know if you have any comments
on the latest version of this patch?
Kind regards,
Aleksandar Rakic
This routine is related to VFIO migration. It belongs to "migration.c".
While at it, rename it to better reflect the namespace it belongs to.
Signed-off-by: Cédric Le Goater
---
hw/vfio/migration.h | 1 +
hw/vfio/dirty-tracking.c | 19 +--
hw/vfio/migration.c | 7
Rename these routines :
vfio_disable_irqindex -> vfio_device_irq_disable
vfio_unmask_single_irqindex -> vfio_device_irq_unmask
vfio_mask_single_irqindex -> vfio_device_irq_mask
vfio_set_irq_signaling -> vfio_device_irq_set_signaling
vfio_attach_device -> vfio_device
From: Prasad Pandit
Hello,
* This series (v8) splits earlier patch-2 which enabled multifd and
postcopy options together into two separate patches. One modifies
the channel discovery in migration_ioc_process_incoming() function,
and second one enables the multifd and postcopy migration tog
QE tested this series's patches. cpu load will be captured by the new api
'guest-get-load'.
Tested-by: Dehan Meng
On Fri, Mar 14, 2025 at 7:39 PM Konstantin Kostiuk
wrote:
> Konstantin Kostiuk (2):
> qga-win: implement a 'guest-get-load' command
> qga: Add tests for guest-get-load command
On Tue, Mar 18, 2025 at 10:15 AM Jason Wang wrote:
>
> On Tue, Mar 18, 2025 at 9:55 AM Lei Yang wrote:
> >
> > Hi Jonah
> >
> > I tested this series with the vhost_vdpa device based on mellanox
> > ConnectX-6 DX nic and hit the host kernel crash. This problem can be
> > easier to reproduce under
On Tue, Mar 18, 2025 at 10:20:21AM +0100, Thomas Huth wrote:
> From: Thomas Huth
>
> We should tell the users where to find the log file.
> While we're at it, also rename the "Overview" heading to a
> more accurate "Introduction to writing tests" instead.
>
> Reported-by: Aditya Gupta
> Signed-
Hi,
> Maybe not from the user's point of view, but surely for the vmfwupdate
> interface design and for the launch measurement calculations.
>
> When using igvm parameters for the kernel hashes we need to pass on (at
> least) two items via vmfwupdate API: The igvm image itself and the
> kernel
These definitions don't have any use outside of their respective
submodules. There is no need to expose them externally. Keep them
private.
Signed-off-by: Cédric Le Goater
---
include/hw/vfio/vfio-common.h | 5 -
hw/vfio/container.c | 2 ++
hw/vfio/iommufd.c | 3 +++
3
Hi there,
Would you have any feedback on this patch? Any suggestions would be
greatly appreciated.”
--
Guoyi
On 2025/1/20 22:58, t...@chinatelecom.cn wrote:
From: Guoyi Tu
Currently, disk I/O encryption and decryption operations are performed
sequentially
in the main thread or IOthread. W
On Tue, 18 Mar 2025 at 11:31, Aleksandar Rakic
wrote:
>
> Hi,
>
> If ieee754 equals EMULATED, then the variables mips_use_nan_2008 and
> mips_use_nan_legacy are set to true
> (
> https://elixir.bootlin.com/linux/v6.13.6/source/arch/mips/kernel/fpu-probe.c#L208
> )
> and any binaries are accepted
> -Original Message-
> From: ltaylorsimp...@gmail.com
> Sent: Monday, March 17, 2025 11:08 AM
> To: 'Brian Cain' ; qemu-devel@nongnu.org
> Cc: richard.hender...@linaro.org; phi...@linaro.org; Matheus Bernardino
> (QUIC) ; a...@rev.ng; a...@rev.ng; Marco
> Liebel (QUIC) ; alex.ben...@lina
Saanjh Sengupta writes:
> Hi,
>
> Unable to view this. Any GitHub repository diff page I could view for
> the same?
It was part of this series:
https://patchew.org/QEMU/20241022105614.839199-1-alex.ben...@linaro.org/
Specifically this patch:
https://patchew.org/QEMU/20241022105614.839199
> -Original Message-
> From: Eric Auger
> Sent: Monday, March 17, 2025 4:52 PM
> To: Shameerali Kolothum Thodi
> ; qemu-...@nongnu.org;
> qemu-devel@nongnu.org
> Cc: peter.mayd...@linaro.org; j...@nvidia.com; nicol...@nvidia.com;
> ddut...@redhat.com; berra...@redhat.com; nath...@nvidia.
> For now I would leave out a generic field-exists check, and keep the
> implementation of vmstate_validate as you did it in v1.
>
> Once we look more in the builder concept we can think of adding also a
> VMStateField (with a PhantomData bool> inside) and add
> with_field_exists().
This makes se
Am 18.03.2025 um 11:19 hat ger...@altlinux.org geschrieben:
> From: Denis Rastyogin
>
> This error was discovered by fuzzing qemu-img.
>
> This commit fixes a division by zero error in the bench_cb() function
> that occurs when using the bench command with a zero-sized image.
>
> The issue aris
> /// This macro can be used (by just passing it a type) to forward the
> `VMState`
> @@ -572,9 +548,9 @@ const fn phantom__(_: &T) ->
> ::core::marker::PhantomData {
> }
> Some(test_cb_builder__::<$struct_name,
> _>(phantom__(&$test_fn)))
> },
I
On Mon, Mar 17, 2025 at 05:32:39PM +, Peter Maydell wrote:
> Currently the comments in the Rust pl011 register.rs file include
> large amounts of text from the PL011 TRM. This is much more
> commentary than we typically quote from a device reference manual,
> and much of it is not relevant to
On Tue, Mar 18, 2025 at 10:53:27AM +, Peter Maydell wrote:
> On Tue, 18 Mar 2025 at 10:36, Helge Deller wrote:
> >
> > On 3/18/25 11:18, Andreas Schwab wrote:
> > > Is there a generic way for a program to detect that is it being run
> > > inside the linux-user emulation?
> >
> > Yes, having a
Gather all VFIOIOMMUFD related declarations into "iommufd.h" to
reduce exposure of VFIO internals in "hw/vfio/vfio-common.h".
Signed-off-by: Cédric Le Goater
---
hw/vfio/iommufd.h | 29 +
include/hw/vfio/vfio-common.h | 21 +++--
hw/vfio/io
On Tue, Mar 18, 2025 at 12:01:44PM +0100, Paolo Bonzini wrote:
> On 2/20/25 07:53, Ani Sinha wrote:
> > commit 0788a56bd1ae3 ("i386: Make unversioned CPU models be aliases")
> > introduced 'default_cpu_version' for PCMachineClass. This created three
> > categories of CPU models:
> > - Most unvers
The migration core subsytem makes uses of the VFIO migration API to
collect statistics on the number of bytes transferred. These services
are declared in "hw/vfio/vfio-common.h" which also contains VFIO
internal declarations. Move the migration declarations into a new
header file "hw/vfio/vfio-migr
On Fri, 7 Mar 2025 at 12:46, Daniel Henrique Barboza
wrote:
>
> Coverity found the following issue:
>
> >>> CID 1593156: Integer handling issues (OVERFLOW_BEFORE_WIDEN)
> >>> Potentially overflowing expression "0x10 << depth" with type
> "int" (32 bits, signed) is evaluated using 3
On Mon, 9 Sept 2024 at 15:21, Daniel P. Berrangé wrote:
>
> From: Dorjoy Chowdhury
>
> An utility function for getting fingerprint from X.509 certificate
> has been introduced. Implementation only provided using gnutls.
Hi; recent changes in the codebase mean that one of Coverity's
"maybe this n
From: Peter Krempa
Trying to run 'render_block_graph' produces following warnings on
machine with python 3.12:
$ ./scripts/render_block_graph.py cd-throttle ble.png
./scripts/render_block_graph.py:57: SyntaxWarning: invalid escape sequence '\l'
' w - Write\l'
./scripts/render_block_graph.
New python doesn't like '\l' escapes from the 'dot' language.
While at it improve usability of the script by employing proper argument
parsing.
Peter Krempa (3):
scripts: render_block_graph: Fix invalid escape sequence warning with
python 3.12
scripts: render_block_graph: Implement proper
在 2025/3/12 下午2:26, Bibo Mao 写道:
Add index entry for LoongArch system and do some small modification
with LoongArch document with rst syntax.
Signed-off-by: Bibo Mao
---
docs/system/loongarch/virt.rst | 31 ++-
docs/system/target-loongarch.rst | 19
Is there a generic way for a program to detect that is it being run
inside the linux-user emulation?
The purpose for that would be to work around limitations of the
emulation, like CLONE_VFORK being unsupported. For example, python >=
3.13 needs to avoid using posix_spawn in that case, because th
From: Denis Rastyogin
This error was discovered by fuzzing qemu-img.
This commit fixes a division by zero error in the bench_cb() function
that occurs when using the bench command with a zero-sized image.
The issue arises because b->image_size can be zero, leading to a
division by zero in the m
On 3/18/25 11:36, Helge Deller wrote:
On 3/18/25 11:18, Andreas Schwab wrote:
Is there a generic way for a program to detect that is it being run
inside the linux-user emulation?
Yes, having a reliable way to detect it would be good.
In qemu-user emulation we could change the return values o
On 3/17/25 07:59, Troy Lee wrote:
Commit 6de4aa8dc544 ("hw/arm/aspeed_ast27x0: Add SoC Support for AST2700
A1") extends ast2700a1 spis_num to 3, but ASPEED_SPIS_NUM defines the
maximum number of spi controller to 2, result in ehci[0] is being
overwritten in runtime.
Signed-off-by: Troy Lee
Fi
vfio_mig_active() is part of the VFIO migration API. Move the
definitions where VFIO migration is implemented.
Signed-off-by: Cédric Le Goater
---
hw/vfio/common.c| 16
hw/vfio/migration.c | 16
2 files changed, 16 insertions(+), 16 deletions(-)
diff --git
Gather all VFIO migration related declarations into "migration.h" to
reduce exposure of VFIO internals in "hw/vfio/vfio-common.h".
Signed-off-by: Cédric Le Goater
---
hw/vfio/migration.h | 72 +++
include/hw/vfio/vfio-common.h | 54 +-
Gather all CPR related declarations into "cpr.h" to reduce exposure
of VFIO internals in "hw/vfio/vfio-common.h".
Order file list in meson.build while at it.
Signed-off-by: Cédric Le Goater
---
hw/vfio/cpr.h | 15 +++
include/hw/vfio/vfio-common.h | 3 ---
hw/vfio/c
This routine is only used in file "migration.c". Move it there.
Signed-off-by: Cédric Le Goater
---
include/hw/vfio/vfio-common.h | 1 -
hw/vfio/common.c | 6 --
hw/vfio/migration.c | 5 +
3 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/include/hw/vf
On Mon, 17 Mar 2025 16:31:29 +
anisa.su...@gmail.com wrote:
> From: Anisa Su
>
> FM DCD Management command 0x5600 implemented per CXL 3.2 Spec Section
> 7.6.7.6.1
>
> Signed-off-by: Anisa Su
> ---
> hw/cxl/cxl-mailbox-utils.c | 67 ++
> hw/cxl/i2c_mctp
On Tue, 18 Mar 2025 at 12:43, Daniel P. Berrangé wrote:
>
> On Tue, Mar 18, 2025 at 01:34:57PM +0100, Andreas Schwab wrote:
> > On Mär 18 2025, Daniel P. Berrangé wrote:
> >
> > > Whereever practical, it is preferrable to check a discrete feature
> > > or behaviour in a functional way, rather than
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