[PATCH] Cleanup: Replace UNSPEC_COPYSIGN with copysign RTL

PowerPC server systems, and there were no regressions. Can I check this into the master branch? Since it is just a clean-up, I don't see the need to back port it, but it is simple to do the back port if desired. 2023-09-29 Michael Meissner gcc/ * config/rs6000/rs6000.md (UNSPEC_COP

[PATCH] PR target/111778 - Fix undefined shifts in PowerPC compiler

r and on a native PowerPC system. Can I check this into the master branch to fix the problem? 2023-10-12 Michael Meissner gcc/ PR target/111778 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): Protect code from shifts that are undefined. (can_be

[PATCH] Power10: Add options to disable load and store vector pair.

an power10 systems and big endian power9 systems doing the normal bootstrap and test. There were no regressions in any of the tests, and the new tests passed. Can I check this patch into the master branch? 2023-10-13 Michael Meissner gcc/ * config/rs6000/mma.md (movoo): Add support

[PATCH 0/6] PowerPC Future patches

2022: https://gcc.gnu.org/pipermail/gcc-patches/2022-November/605581.html -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meiss...@linux.ibm.com

Re: [PATCH 1/6] PowerPC: Add -mcpu=future option

ill be set for power10. The patches have been tested on both little and big endian systems. Can I check it into the master branch? 2023-10-18 Michael Meissner gcc/ * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define __ARCH_PWR_FUTURE__ if -mcpu=future.

[PATCH 2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.

and store vector pair instructions for memory options by default. This patch re-enables generating these instructions if -mcpu=future is used. The patches have been tested on both little and big endian systems. Can I check it into the master branch? 2023-10-18 Michael Meissner gcc

[PATCH 3/6] PowerPC: Add support for accumulators in DMR registers.

correspondence. It is possible that the mangling for DMRs and the GDB register numbers may change in the future. The patches have been tested on both little and big endian systems. Can I check it into the master branch? 2023-10-18 Michael Meissner gcc/ * config/rs6000/con

[PATCH 4/6] PowerPC: Make MMA insns support DMR registers.

endian systems. Can I check it into the master branch? 2023-10-18 Michael Meissner gcc/ * config/rs6000/mma.md (mma_): New define_expand to handle mma_ for dense math and non dense math. (mma_ insn): Restrict to non dense math. (mma_xxsetaccz): Convert to

[PATCH 5/6] PowerPC: Switch to dense math names for all MMA operations.

both little and big endian systems. Can I check it into the master branch? 2023-10-18 Michael Meissner gcc/ * config/rs6000/mma.md (vvi4i4i8_dm): New int attribute. (avvi4i4i8_dm): Likewise. (vvi4i4i2_dm): Likewise. (avvi4i4i2_dm): Likewise. (vvi4i4_dm

[PATCH 6/6] PowerPC: Add support for 1,024 bit DMR registers.

endian systems. Can I check it into the master branch? 2023-10-18 Michael Meissner gcc/ * config/rs6000/mma.md (UNSPEC_DM_INSERT512_UPPER): New unspec. (UNSPEC_DM_INSERT512_LOWER): Likewise. (UNSPEC_DM_EXTRACT512): Likewise. (

[PATCH], Add configuration checks to PowerPC --with-long-double-format=ieee

ck this in the trunk at on the GCC 8 branch? 2018-07-05 Michael Meissner * configure.ac (powerpc64*-*-linux*): Combine big and little endian checks for the long double format. Add checks to make sure the GLIBC can handle configuration of long double to be IEEE

Re: [PATCH], Add configuration checks to PowerPC --with-long-double-format=ieee

On Fri, Jul 06, 2018 at 06:38:55AM -0500, Segher Boessenkool wrote: > On Fri, Jul 06, 2018 at 01:51:37AM -0400, Michael Meissner wrote: > > case "$target:$with_long_double_format" in > > > - xpowerpc64*-*-linux*:*) > > So this case could never happen. The

Re: [PATCH], Add configuration checks to PowerPC --with-long-double-format=ieee

the GLIBC version tests that were already part of the GCC configuration. If there is a simple method that works for cross compilers or where a specified sysroot is used, it would be simpler than having version checks. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-62

[PATCH], Remove undocumented -mtoc-fusion from PowerPC

? I don't anticipate that we will need a backport to the FSF GCC 8 branch. 2018-07-13 Michael Meissner * config/rs6000/constraints.md (wG constraint): Delete, no longer used. * config/rs6000/predicates.md (p9_fusion_reg_operand): Rename predicate to reflect

Re: [PATCH], Remove undocumented -mtoc-fusion from PowerPC

On Wed, Jul 18, 2018 at 05:59:50PM -0500, Segher Boessenkool wrote: > Hi Mike, > > On Fri, Jul 13, 2018 at 04:56:13PM -0400, Michael Meissner wrote: > > This means rather than keeping the toc fusion around (that nobody used), I > > would prefer to delete the current code

[PATCH], Improve PowerPC switch behavior on medium code model system

actively checking my mail in that time period. If I get the approval early enough, I can check it in. Otherwise, somebody else can check it in if they monitor for failure, or we can wait until I get around August 14th to check it in. 2018-07-31 Michael Meissner * config/rs6000/pre

Ping: [PATCH] Power10: Add options to disable load and store vector pair.

Ping patch: | Date: Fri, 13 Oct 2023 19:41:13 -0400 | From: Michael Meissner | Subject: [PATCH] Power10: Add options to disable load and store vector pair. | Message-ID: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/632987.html -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts

Ping: [PATCH 1/6] PowerPC: Add -mcpu=future option

Ping patch. | Date: Wed, 18 Oct 2023 19:58:56 -0400 | From: Michael Meissner | Subject: Re: [PATCH 1/6] PowerPC: Add -mcpu=future option | Message-ID: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/633511.html -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email

Ping: [PATCH 2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.

Ping patch. | Date: Wed, 18 Oct 2023 20:00:18 -0400 | From: Michael Meissner | Subject: [PATCH 2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair. | Message-ID: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/633512.html -- Michael Meissner, IBM PO Box 98, Ayer

Ping: [PATCH 3/6] PowerPC: Add support for accumulators in DMR registers.

Ping patch: | ate: Wed, 18 Oct 2023 20:01:54 -0400 | From: Michael Meissner | Subject: [PATCH 3/6] PowerPC: Add support for accumulators in DMR registers. | Message-ID: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/633513.html -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts

Ping: [PATCH 4/6] PowerPC: Make MMA insns support DMR registers.

Ping patch. | Date: Wed, 18 Oct 2023 20:03:02 -0400 | From: Michael Meissner | Subject: [PATCH 4/6] PowerPC: Make MMA insns support DMR registers. | Message-ID: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/633514.html -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA

Ping: [PATCH 5/6] PowerPC: Switch to dense math names for all MMA operations.

Ping patch. | Date: Wed, 18 Oct 2023 20:04:44 -0400 | From: Michael Meissner | Subject: [PATCH 5/6] PowerPC: Switch to dense math names for all MMA operations. | Message-ID: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/633515.html -- Michael Meissner, IBM PO Box 98, Ayer

Ping: [PATCH 6/6] PowerPC: Add support for 1,024 bit DMR registers.

Ping patch. | Date: Wed, 18 Oct 2023 20:06:20 -0400 | From: Michael Meissner | Subject: [PATCH 6/6] PowerPC: Add support for 1,024 bit DMR registers. | Message-ID: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/633516.html -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA

Ping #2: [PATCH] Power10: Add options to disable load and store vector pair.

Ping #2 | Date: Fri, 13 Oct 2023 19:41:13 -0400 | From: Michael Meissner | Subject: [PATCH] Power10: Add options to disable load and store vector pair. | Message-ID: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/632987.html -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts

Ping #2: [PATCH 1/6] PowerPC: Add -mcpu=future option

Ping #2 | Date: Wed, 18 Oct 2023 19:58:56 -0400 | From: Michael Meissner | Subject: Re: [PATCH 1/6] PowerPC: Add -mcpu=future option | Message-ID: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/633511.html -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email

Ping #2: [PATCH 2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.

Ping #2 | Date: Wed, 18 Oct 2023 20:00:18 -0400 | From: Michael Meissner | Subject: [PATCH 2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair. | Message-ID: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/633512.html -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts

Ping #2: [PATCH 3/6] PowerPC: Add support for accumulators in DMR registers.

Ping #2 | Date: Wed, 18 Oct 2023 20:01:54 -0400 | From: Michael Meissner | Subject: [PATCH 3/6] PowerPC: Add support for accumulators in DMR registers. | Message-ID: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/633514.html -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts

Ping #2: [PATCH 5/6] PowerPC: Switch to dense math names for all MMA operations.

Ping #2 | Date: Wed, 18 Oct 2023 20:04:44 -0400 | From: Michael Meissner | Subject: [PATCH 5/6] PowerPC: Switch to dense math names for all MMA operations. | Message-ID: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/633515.html -- Michael Meissner, IBM PO Box 98, Ayer

Ping #2: [PATCH 6/6] PowerPC: Add support for 1,024 bit DMR registers.

Ping #2 | Date: Wed, 18 Oct 2023 20:06:20 -0400 | From: Michael Meissner | Subject: [PATCH 6/6] PowerPC: Add support for 1,024 bit DMR registers. | Message-ID: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/633516.html -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA

Re: [PATCH] V6, #1 of 17: Use ADJUST_INSN_LENGTH for prefixed instructions

On Tue, Oct 22, 2019 at 05:27:19PM -0500, Segher Boessenkool wrote: > Hi! > > On Wed, Oct 16, 2019 at 09:35:33AM -0400, Michael Meissner wrote: > > This patch uses the target hook ADJUST_INSN_LENGTH to change the length of > > instructions that contain prefixed memory/add in

Re: [PATCH] V6, #4 of 17: Add prefixed instruction support to stack protect insns

On Fri, Nov 01, 2019 at 10:22:03PM -0500, Segher Boessenkool wrote: > Hi! > > On Wed, Oct 16, 2019 at 09:47:41AM -0400, Michael Meissner wrote: > > This patch fixes the stack protection insns to support stacks larger than > > 16-bits on the 'future' system

Re: [PATCH] V6, #4 of 17: Add prefixed instruction support to stack protect insns

On Fri, Nov 01, 2019 at 10:22:03PM -0500, Segher Boessenkool wrote: > Hi! > > On Wed, Oct 16, 2019 at 09:47:41AM -0400, Michael Meissner wrote: > > This patch fixes the stack protection insns to support stacks larger than > > 16-bits on the 'future' system

PowerPC -mcpu=future Version 12 patches

were in V11 as patches #8-15. I have built these patches on a little endian power8 system and there were no regressions in the test suite. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797

[PATCH] V12 patch #1 of 14, add gcc_asserts for rs6000_adjust_vec_address

no regressions in the test. In addition, I compiled both Spec 2006 and Spec 2017 benchmarks with this compiler and I saw new build failures. Can I check this into the trunk? 2020-01-09 Michael Meissner * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some gcc_asserts

[PATCH] V12 patch #2 of 14, Refactor rs6000_adjust_vec_address & rs6000_split_vec_extract_var

with this patch installed on a little endian power8 system and there were no regressions in the test suite. In addition, I built -mcpu=future versions of Spec 2006 and Spec 2017, and there were no additional failures. Can I check this patch into the trunk? 2020-01-09 Michael Meissner

[PATCH] V12 patch #3 of 14, Improve address validation in rs6000_adjust_vec_address

in the tests. Can I check this patch into the trunk? 2020-01-09 Michael Meissner * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward reference. (hard_reg_and_mode_to_addr_mask): Delete, no longer used. (rs6000_adjust_vec_address): If the original vector add

[PATCH] V12 patch #4 of 14, Optimize adjusting PC-relative vector addresses

t element, to include the element offset in the address directly. */ else if (GET_CODE (addr) == PLUS) -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797

[PATCH] V12 patch #5 of 14, Make -mpcrel default for -mcpu=future on little endian Linux 64-bit systems

check this patch into the trunk? 2020-01-09 Michael Meissner * config/rs6000/linux64.h (PREFIXED_ADDR_SUPPORTED_BY_OS): Set to 1 to enable prefixed addressing if -mcpu=future. (PCREL_SUPPORTED_BY_OS): Set to 1 to enable PC-relative addressing if -mcpu=future

[PATCH] V12 patch #6 of 14, Add -mcpu=future target-supports options

? 2020-01-09 Michael Meissner * lib/target-supports.exp (check_effective_target_powerpc_pcrel): New target for PowerPC -mcpu=future support. (check_effective_target_powerpc_prefixed_addr): New target for PowerPC -mcpu=future support. Index: gcc/testsuite/lib

[PATCH] V12 patch #7 of 14, Add PADDI/PLI tests

01-09 Michael Meissner * gcc.target/powerpc/prefix-add.c: New test for -mcpu=future generating PADDI for large constant adds. * gcc.target/powerpc/prefix-di-constant.c: New test for -mcpu=future generating PLI to load up large DImode constants. * gcc.t

[PATCH] V12 patch #8 of 14, Add test to verify prefixed instruction is generated for -mcpu=future for DS/DS illegal offsets

-09 Michael Meissner * gcc.target/powerpc/prefix-ds-dq.c: New test to verify that we generate the prefix load/store instructions for traditional instructions with an offset that doesn't match DS/DQ requirements. Index: gcc/testsuite/gcc.target/powerpc/pref

[PATCH] V12 patch #9 of 14, Add test to validate we don't generate an illegal prefixed instruction

prefixed version of those instructions. Can I check this into the trunk? 2020-01-09 Michael Meissner * gcc.target/powerpc/prefix-no-premodify.c: Make sure we do not generate the non-existent PLWZU instruction if -mcpu=future. Index: gcc/testsuite/gcc.target/powerpc/prefix-no

[PATCH] V12 patch #10 of 14, Add tests for generating prefixed load/store instructions with large numeric offsets

This patch is the same as: https://gcc.gnu.org/ml/gcc-patches/2019-12/msg01500.html This patch adds one test per type validating that we generate the appropriate prefixed instructions to load/store the type when the offset if large. Can I check this into the trunk? 2020-01-09 Michael Meissner

[PATCH] V12 patch #11 of 14, Add tests for using PC-relative instructions with -mcpu=future

This patch is the same as: https://gcc.gnu.org/ml/gcc-patches/2019-12/msg01501.html This patch adds a set of tests for each type to verify that the appropriate PC-relative instructions are generated when -mcpu=future is used. Can I check this patch into the trunk? 2020-01-09 Michael Meissner

[PATCH] V12 patch #12 of 14, Add test for -fstack-protect-strong with large stack sizes and -mcpu=future

bug that we discovered when we attempted to build glibc using the -mcpu=future option. 2020-01-09 Michael Meissner * gcc.target/powerpc/prefix-stack-protect.c: New test to make sure -fstack-protect-strong works with prefixed addressing. Index: gcc/testsuite/gcc.target/powerpc

[PATCH] V12 patch #13 of 14, Add tests for vec_extract with PC-relative addresses

trunk? 2020-01-09 Michael Meissner * gcc.target/powerpc/vec-extract-pcrel-si.c: New test for vec_extract from a PC-relative address. * gcc.target/powerpc/vec-extract-pcrel-di.c: New test for vec_extract from a PC-relative address. * gcc.target/powerpc/vec

[PATCH] V12 patch #14 of 14, Add tests for generating prefixed instructions when using vec_extract with large offsets with -mcpu=future

While this patch is similar in spirit to V11 #15, I lost that patch, and I re-implemented the check. Can I check this test into the trunk? 2020-01-09 Michael Meissner * gcc.target/powerpc/vec-extract-large-si.c: New test for vec_extract from a vector unsigned int in memory

Re: [PATCH] V12 patch #5 of 14, Make -mpcrel default for -mcpu=future on little endian Linux 64-bit systems

On Fri, Jan 31, 2020 at 07:12:53PM -0600, Segher Boessenkool wrote: > Hi! > > On Thu, Jan 09, 2020 at 07:40:08PM -0500, Michael Meissner wrote: > > * config/rs6000/linux64.h (PREFIXED_ADDR_SUPPORTED_BY_OS): Set to > > 1 to enable prefixed addre

Re: [PATCH] V12 patch #2 of 14, Refactor rs6000_adjust_vec_address & rs6000_split_vec_extract_var

the vector to determine the element position. So if we were to remove the ANDing, we would have to change the ABI. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797

Re: [PATCH] V12 patch #3 of 14, Improve address validation in rs6000_adjust_vec_address

On Fri, Jan 31, 2020 at 05:43:20PM -0600, Segher Boessenkool wrote: > Hi! > > On Thu, Jan 09, 2020 at 07:27:58PM -0500, Michael Meissner wrote: > > * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward > > reference. > > FWIW, it is better to just reor

[PATCH] Fix PR 93568 on PowerPC (vector extract failures)

gcc.target/powerpc/vsx-builtin-19b.c 2020-02-05 Michael Meissner PR target/93568 * config/rs6000/rs6000.c (get_vector_offset): Fix --- /tmp/a8cqkr_rs6000.c2020-02-05 14:55:36.255021903 -0600 +++ gcc/config/rs6000/rs6000.c 2020-02-05 13:27:00.393877012 -0600 @@ -6744,8

[PATCH], PR target/93569, Fix PowerPC vsx-builtin-15d.c test case

endian Power8 system and a big endian Power8 system. There were no regressions. On the big endian system, just vsx-builtin-15d.c now passes. On the little endian system, vsx-builtin-15d.c now passes along with some Fortran tests. 2020-02-05 Michael Meissner PR target/93569

Re: [PATCH], PR target/93569, Fix PowerPC vsx-builtin-15d.c test case

On Thu, Feb 06, 2020 at 09:49:18AM -0600, Segher Boessenkool wrote: > Hi! > > On Thu, Feb 06, 2020 at 08:29:41AM -0500, Michael Meissner wrote: > > --- /tmp/eAu61F_rs6000.c2020-02-05 18:08:48.698992017 -0500 > > +++ gcc/config/rs6000/rs6000.c 2020-02-05 17:

[PATCH] PR target/93569 [version 2], Fix PowerPC vsx-builtin-15d.c test case

.html 2020-02-06 Michael Meissner PR target/93569 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0 we only had X-FORM (reg+reg) addressing for vectors. Also before ISA 3.0, we only had X-FORM addressing for scalars in the traditional

[PATCH], Rename and document PowerPC -mprefixed-addr to -mprefixed

an I check these patches into the master GCC branch for GCC 10? 2020-02-10 Michael Meissner * config/rs6000/predicates.md (cint34_operand): Rename the -mprefixed-addr option to be -mprefixed. * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename the

Re: [PATCH], Rename and document PowerPC -mprefixed-addr to -mprefixed

On Mon, Feb 10, 2020 at 09:24:07PM -0600, Segher Boessenkool wrote: > Hi! > > On Mon, Feb 10, 2020 at 01:45:42PM -0500, Michael Meissner wrote: > > This patch renames the PowerPC internal switch -mprefixed-addr to be > > -mprefixed. > > > If you use -mpcrel, you m

Re: [committed] testsuite: Fix up gcc.target/powerpc/pr93122.c test

On Wed, Feb 12, 2020 at 11:27:01PM +0100, Jakub Jelinek wrote: > On Mon, Feb 10, 2020 at 01:45:42PM -0500, Michael Meissner wrote: > > This patch renames the PowerPC internal switch -mprefixed-addr to be > > -mprefixed. > > --- gcc/config/rs6000/rs6000.opt > +++ gcc/

PowerPC V10 Patches for -mcpu=future

ed. Patch V8 #5 are the tests for using PC-relative load/store instructions for each of the types to reference static values. Patch V8 #6 is the test to make sure the -fstack-protector support works when the stack frame is large and -mcpu=future is used. -- Michael Meissner, IBM IBM, M/S 25

[PATCH] V10 patch #1, Use PLI to load up large DImode constants if -mcpu=future

check this patch in? Patch V7 #1: https://gcc.gnu.org/ml/gcc-patches/2019-11/msg01301.html 2019-12-09 Michael Meissner * config/rs6000/rs6000.c (num_insns_constant_gpr): Return 1 if the constant can be loaded with PLI if -mcpu=future. * config/rs6000/rs6000.md

[PATCH] V10 patch #2, use PLI to load up large SImode constants if -mcpu=future

check this patch in once patch V10 #1 is checked in? Patch V7 #2: https://gcc.gnu.org/ml/gcc-patches/2019-11/msg01302.html 2019-12-09 Michael Meissner * config/rs6000/rs6000.md (movsi_internal1): Add alternative to use PLI to load up 34-bit constants if -mcpu=future. Index: gcc

[PATCH] V10 patch #3, Use PADDI to add large constants if -mcpu=future is used

Michael Meissner * config/rs6000/predicates.md (add_operand): Allow eI constants. * config/rs6000/rs6000.md (add3): Add alternative to generate PADDI for 34-bit constants if -mcpu=future. Index: gcc/config/rs6000/predicates.md

[PATCH] V10 patch #4, Add new prefixed/non-prefixed memory constraints

I have bootstrapped the compiler on a little endian power8 system and ran make check and there were no regressions. Can I check this patch in? 2019-12-10 Michael Meissner * config/rs6000/constraints.md (em constraint): New constraint for non-prefixed memory operands

[PATCH] V10 patch #5, Fix codegen bug with vector extracts using a variable offset & PC-relative address

EXTRACT_I 1 "input_operand" "v,v,m") - (match_operand:DI 2 "gpc_reg_operand" "r,r,r")] + [(match_operand:VSX_EXTRACT_I 1 "input_operand" "v,v,em,ep") + (match_operand:DI 2 "gpc_reg_operand" "r,r,r,r")] UNSPEC_VSX_EXTRACT))) - (clobber (match_scratch:DI 3 "=r,r,&b")) - (clobber (match_scratch:V2DI 4 "=X,&v,X"))] + (clobber (match_scratch:DI 3 "=r,r,&b,&b")) + (clobber (match_scratch:V2DI 4 "=X,&v,X,X")) + (clobber (match_scratch:DI 5 "=X,X,X,&b"))] "VECTOR_MEM_VSX_P (mode) && TARGET_DIRECT_MOVE_64BIT" "#" "&& reload_completed" @@ -3714,10 +3721,11 @@ (define_insn_and_split "*vsx_extract_mode; rs6000_split_vec_extract_var (gen_rtx_REG (smode, REGNO (operands[0])), operands[1], operands[2], - operands[3], operands[4]); + operands[3], operands[4], + operands[5]); DONE; } - [(set_attr "isa" "p9v,*,*")]) + [(set_attr "isa" "p9v,*,*,fut")]) ;; VSX_EXTRACT optimizations ;; Optimize double d = (double) vec_extract (vi, ) -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797

[PATCH] V10 patch #6, Use prefixed load/stores for vector extract with large offsets

); } I have bootstraped this patch on a little endian power8 system and ran make check with no regressions. Can I check this patch in? 2019-12-10 Michael Meissner * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support for the offset being 34-bits when -mcpu=future is

[PATCH] V10 patch #7, Improve vector_extract code of a PC-relative address with a constant offset for -mcpu=future

turn vector_extract (vd[4], 1); } I have bootstrapped this code on a little endian power8 and ran make check and there were no regressions. Can I check this into the trunk? 2019-12-10 Michael Meissner * config/rs6000/rs6000.c (rs6000_reg_to_addr_mask): New helper func

[PATCH] V10 patch #8, Enable -mpcrel and -mprefixed-addr for -mcpu=future on 64-bit little endian Linux systems

t you do _not_ get pcrel? | And this all quietly? You do not get this quietly. You will get an error if you use -mpcrel and -mcmodel=large options together. 2019-12-10 Michael Meissner * config/rs6000/linux64.h (PREFIXED_ADDR_SUPPORTED_BY_OS): Set to 1 to enable prefixed addre

[PATCH] V10 patch #9, Add new effective targets for the testsuite

ck with no regressions. In addition with this patch installed, the new tests now run as expected with these changes. Can I check this in (this needs patch V10 #8 to be installed to enable the tests). 2019-12-11 Michael Meissner * lib/target-supports.exp (check_effective_target_pow

[PATCH] V10 patch #10, Add PADDI/PLI tests for -mcpu=future

Patch V10 #10 is a modification of patch V8 #1. I renamed the files from paddi-?.c to prefixed-*.c so that there isn't a false match due to the .ident directive. This test passes when I do a make check. One patch V10 #9 is checked in can I commit this patch? 2019-12-11 Michael Mei

[PATCH] V10 patch #11, Add test for generating prefixed load/store when the offset is not valid for DS/DQ instructions

Patch V10 #11 is a slight reworking of patch V8 #2 (testing whether we generate a prefixed instruction when the offset would be invalid for DS and DQ instruction formats). This test passes when I run make check. Can I check this in when patch V10 #9 is checked in? 2019-12-11 Michael Meissner

[PATCH] V10 patch #12, Test to make sure we don't generate prefixed pre-modify load/stores for -mcpu=future

Patch V10 #12 is a slight reworking of patch V8 #3 (making sure we don't try to generate the non-existant PLWZU and PSTWU pre-modify instructions). This test passes when I run make check. Can I check this in when patch V10 #9 is installed? 2019-12-11 Michael Meissner * gcc.t

Re: [PATCH] V10 patch #4, Add new prefixed/non-prefixed memory constraints

On Tue, Dec 17, 2019 at 11:15:29AM -0600, Segher Boessenkool wrote: > Hi! > > On Wed, Dec 11, 2019 at 07:29:05PM -0500, Michael Meissner wrote: > > +(define_memory_constraint "em" > > + "A memory operand that does not contain a prefixed ad

Re: [PATCH] V10 patch #4, Add new prefixed/non-prefixed memory constraints

On Tue, Dec 17, 2019 at 05:35:24PM -0600, Segher Boessenkool wrote: > On Tue, Dec 17, 2019 at 05:29:44PM -0500, Michael Meissner wrote: > > On Tue, Dec 17, 2019 at 11:15:29AM -0600, Segher Boessenkool wrote: > > > > +;; Return true if the operand is a valid memory

Re: [PATCH] V10 patch #5, Fix codegen bug with vector extracts using a variable offset & PC-relative address

atch_scratch:DI 5 "=X,X,X,&b,&b"))] > >"VECTOR_MEM_VSX_P (mode) && TARGET_DIRECT_MOVE_64BIT" > >"#" > >"&& reload_completed" > >[(const_int 0)] > > { > >rs6000_split_vec_extract_var (operands[0], ope

[PATCH] PowerPC, Rename SIGNED_BIT_OFFSET_P to SIGNED_INTEGER_BIT_P

suite. Can I check this into the trunk? Some of the remaining patches in the V10 series will need to be modified as well. I will submit those patches (after I rework the vector extract stuff) in a new series. 2019-12-17 Michael Meissner * config/rs6000/predicates.

PowerPC -mcpu=future patches, V11

added some new tests for the vector extract code. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797

[PATCH] V11 patch #1 of 15, Fix bug in vec_extract

2019-12-20 Michael Meissner * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add assertion to make sure that we don't load an address into a temporary that is already used. (rs6000_split_vec_extract_var): Do not overwrite the element when maskin

[PATCH] V11 patch #2 of 15, Use prefixed load for vector extract with large offset

trunk? 2019-12-20 Michael Meissner * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support for the offset being 34-bits when -mcpu=future is used. Index: gcc/config/rs6000/rs6000.c === --- gcc/config

[PATCH] V11 patch #3 of 15, Use 'Q' constraint for variable vector extract from memory

e new tests for this). I have also bootstrapped the compiler on a little endian power8 machine and there were no regressions in the test suite. Can I check this patch into the trunk? 2019-12-20 Michael Meissner * config/rs6000/vsx.md (vsx_extract__var, VSX_D iterator): Use

[PATCH] V11 patch #4 of 15, Update 'Q' constraint documentation.

In doing V11 patch #3, I noticed that the documentation for the 'Q' was misleading. This patch updates the documentation. Can I check this patch into the trunk? 2019-12-20 Michael Meissner * config/rs6000/constraints.md (Q constraint): Update documentation.

[PATCH] V11 patch #5 of 15, Optimize vec_extract of a vector in memory with a PC-relative address

, and then doing an indirect load. I have bootstrapped a compiler on a little endian power8 machine and ran the testsuite with no regressions. Can I check this into the trunk? 2019-12-20 Michael Meissner * config/rs6000/rs6000.c (rs6000_reg_to_addr_mask): New helper functi

[PATCH] V11 patch #6 of 15, Make -mpcrel the default for -mcpu=future on Linux 64-bit

endian power8 system and ran the testsuite with no regressions. Once the preceeding V11 patches have been checked in, can I check these patches into the trunk? 2019-12-20 Michael Meissner * config/rs6000/linux64.h (PREFIXED_ADDR_SUPPORTED_BY_OS): Set to 1 to enable prefixed

[PATCH] V11 patch #7 of 15, Add new target_supports cases for -mcpu=future tests.

This is V10 patch #9. It adds new target_supports tests for the new patches: https://gcc.gnu.org/ml/gcc-patches/2019-12/msg00842.html All of the new tests work with these target supports. Can I check it into the trunk? 2019-12-20 Michael Meissner * lib/target-supports.exp

[PATCH] V11 patch #8 of 15, Add new tests for using PADDI and PLI with -mcpu=future

This is V10 patch #10. It adds 3 new tests to verify that we generate PADDI/PLI for large constants when -mcpu=future is used. https://gcc.gnu.org/ml/gcc-patches/2019-12/msg00843.html This test passes when the preceeding patches are applied. Can I check this in? 2019-12-20 Michael Meissner

[PATCH] V11 patch #9 of 15, Add test to validate generating prefixed memory when the offset is invalid for DS/DQ insns

I check it in? 2019-12-20 Michael Meissner * gcc.target/powerpc/prefix-ds-dq.c: New test to verify that we generate the prefix load/store instructions for traditional instructions with an offset that doesn't match DS/DQ requirements. Index: gcc/test

[PATCH] V11 patch #10 of 15, Make sure we don't generate pre-modify prefixed insns with -mcpu=future

This is V10 patch #12. It adds a test to make sure we don't generate a prefixed instruction with PRE_INC, PRE_DEC, or PRE_MODIFY. https://gcc.gnu.org/ml/gcc-patches/2019-12/msg00846.html This test passes when I run it. Can I check this into the trunk? 2019-12-20 Michael Mei

[PATCH] V11 patch #11 of 15, Add new tests for generating prefixed loads/stores on -mcpu=future with large offsets

I run the testsuite. Can I check it in? 2019-12-20 Michael Meissner * gcc.target/powerpc/prefix-large.h: New set of tests to test prefixed addressing on 'future' system with large numeric offsets for various types. * gcc.target/powerpc/prefix-large

[PATCH] V11 patch #12 of 15, Add new PC-relative tests for -mcpu=future

This is a reworking of patch V8 #5. It adds a bunch of PC-relative tests for the -mcpu=future target. https://gcc.gnu.org/ml/gcc-patches/2019-12/msg00085.html This test passes when I run it. Can I check it in? 2019-12-20 Michael Meissner * gcc.target/powerpc/prefix-pcrel.h: New set

[PATCH] V11 patch #13 of 15, Add test for -mcpu=future -fstack-protect-strong with large stacks

run it as part of the test suite, can I check it in to the trunk? 2019-12-20 Michael Meissner * gcc.target/powerpc/prefix-stack-protect.c: New test to make sure -fstack-protect-strong works with prefixed addressing. Index: gcc/testsuite/gcc.target/powerpc/prefix-stack-protect.c

[PATCH] V11 patch #14 of 15, Add tests for vec_extract from memory with PC-relative addrss

These tests are new. These tests check that the vector extract from a vector in memory works correctly for both constant and variable element numbers. These tests pass with all of the previoius pataches applied. Can I check these patches into the trunk? 2019-12-20 Michael Meissner

[PATCH] V11 patch #15 of 15, Add tests for -mcpu=future vec_extract from memory with a large offset

check this patch into the trunk? 2019-12-20 Michael Meissner * gcc.target/powerpc/vec-extract-large-si.c: New test for vec_extract from a vector unsigned int in memory with a large offset. * gcc.target/powerpc/vec-extract-large-di.c: New test for vec_extract

Re: [PATCH] V11 patch #5 of 15, Optimize vec_extract of a vector in memory with a PC-relative address

On Tue, Dec 24, 2019 at 10:24:55AM -0600, Segher Boessenkool wrote: > Hi! > > On Fri, Dec 20, 2019 at 06:55:53PM -0500, Michael Meissner wrote: > > * config/rs6000/rs6000.c (rs6000_reg_to_addr_mask): New helper > > function to identify the address mask of a hard regi

Re: [PATCH] V11 patch #5 of 15, Optimize vec_extract of a vector in memory with a PC-relative address

On Tue, Dec 24, 2019 at 10:24:55AM -0600, Segher Boessenkool wrote: > Hi! > > On Fri, Dec 20, 2019 at 06:55:53PM -0500, Michael Meissner wrote: > > * config/rs6000/rs6000.c (rs6000_reg_to_addr_mask): New helper > > function to identify the address mask of a hard regi

Re: [PATCH, committed] V11 patch #2 of 15, Use prefixed load for vector extract with large offset

On Sun, Dec 22, 2019 at 11:10:09AM -0600, Segher Boessenkool wrote: > The patch is okay for trunk (with the comment moved, and the rtx_equal_p > fixed). Thanks! Here is the patch I committed (subversion id 279937): 2020-01-06 Michael Meissner * config/rs6000/rs

Re: [PATCH, committed] V11 patch #3 of 15, Use 'Q' constraint for variable vector extract from memory

On Sun, Dec 22, 2019 at 11:24:51AM -0600, Segher Boessenkool wrote: > Hi! > > On Fri, Dec 20, 2019 at 06:47:28PM -0500, Michael Meissner wrote: > > Then I realized that eventaully we will want to generate an X-FORM > > (register + > > register) address, and it was

Re: [PATCH, committed] V11 patch #4 of 15, Update 'Q' constraint documentation.

On Sun, Dec 22, 2019 at 11:49:19AM -0600, Segher Boessenkool wrote: > On Fri, Dec 20, 2019 at 06:49:30PM -0500, Michael Meissner wrote: > > In doing V11 patch #3, I noticed that the documentation for the 'Q' was > > misleading. > > It originally was used just for

Re: [PATCH, committed] V11 patch #5 of 15, Optimize vec_extract of a vector in memory with a PC-relative address

On Tue, Dec 24, 2019 at 10:24:55AM -0600, Segher Boessenkool wrote: > Hi! > > On Fri, Dec 20, 2019 at 06:55:53PM -0500, Michael Meissner wrote: > > * config/rs6000/rs6000.c (rs6000_reg_to_addr_mask): New helper > > function to identify the address mask of a hard regi

[PATCH 0/3] Add support for -mcpu=power11

power9 system. When the GCC 15 tree opens up for general patches, can I apply this patch? -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meiss...@linux.ibm.com

[PATCH 2/3] Add tuning support for -mcpu=power11

This patch makes -mtune=power11 use the same tuning decisions as -mtune=power10. I have tested this patch on a little endian power10 system and a big endian power9 system. There were no regressions. Can I check this into GCC 15 when it is open for general patches? 2024-03-18 Michael Meissner

[PATCH 1/3] Add basic support for -mcpu=power11

I have tested this patch with a bootstrap build on a little endian power10 system and a bootstrap build on a big endian power9 system. There were no regressions. Can I apply this patch when GCC 15 opens up for general patches? 2024-03-18 Michael Meissner gcc/ * config.gcc (rs6000*-*-*

[PATCH 3/3] Add -mcpu=power11 tests

big endian power9 system using the latest binutils which includes support for power11. There were no regressions, and the 3 power11 tests added ran on both systems. Can I check this patch into GCC 15 when it opens up for general patches? 2024-03-18 Michael Meissner gcc/testsuite

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