Hi,
Currently I'm looking at making a sparse hardware re-implementation of
an mcs51-like core. It does not have to be 100% binary compatible as
long as it can run compiled C code.
Two opcodes are a nuisance to implement in hardware:
0xd6/0xd7: XCHD A,(Rx)
these opcodes take the place of what *logically* should have been the
following instructions:
0xd6/0xd7: DJNZ (Rx),offset
Though I guess the XCHD opcodes had some use "back in the day", the DJNZ
opcodes make more sense to me, and are much less effort to implement.
Actually, they come for free while implementing XCHD is a special case
in an otherwise mostly regular part of the opcode array. (There are some
other instructions that are in odd positions imho)
I've grepped my way through the sources, and found few references to
xchd, and my impression is that these instructions will never be
emitted, but I'd appreciate some expert input:
Does the mcs51 backend ever emit XCHD instructions?
with kind regards,
Theo
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