Hi Tamas,

thanks for the report.

Linear ram is supported by gputils, although not profoundly tested. 
Gputils 0.14.0 has serious bugs in this area, but in svn HEAD and in 
0.14.1 ALPHA1 build the bugs should be fixed.

Linear ram is not supported by sdcc. I agree with you that it would be 
nice to have it implemented in one of the next sdcc releases.

So what you found is not a bug but a feature request. Feel free to 
submit it to the feature request tracker at 
http://sourceforge.net/tracker/?atid=350599&group_id=599&func=browse 
<http://sourceforge.net/tracker/?atid=350599&group_id=599&func=browse>.

Borut


On 11/17/2011 06:55 PM, Butuza Tamas wrote:
> Dear sdcc developers,
>
> I tested the latest binary build (sdcc: 7037, gputils: 0.14.1.-alpha 1.) with 
> pic16F1838.
> The results are good, the compilation is correct, the code runs in the pic.
>
> The "_sdcc_gsinit_startup" workaround recommended by Raphael is working well.
> but I did not found libsdcc for the 14 bit enhanced devices in the 7037 
> version also.
>
> However, I found a bug (or it is a feature request):
>
> It is not possible to define large arrays in ram.
> In my example:
> #define LARGE_ARRAY_LEN               50
> static char largeArray[LARGE_ARRAY_LEN];
> // there are some variables before the array in the source.
>
> When I try to create an arry with 60 or more byte size, the gplink gives an 
> error:
> error: no target memory available for section "UDL_test_0"
>
> The PIC16F1938 has 1024 byte ram in several banks. Each has 80 bytes usable 
> general purpose area.
>
> My example has quite few variables, so it would be possible to allocate even 
> a full bank for the array. In this way the 80 byte array should be possible.
>
> However, the enhanced 14 bit pic processors have additional addressing modes.
> One of them is a linear addressing mode for the whole ram without bank 
> switching.
> I think it is one of the key features of these devices. It would be nice to 
> use it with sdcc and gputils.
>
> For more information, see the 16F1938 datasheet:
> chapter 3.2.3.1:
> "Linear access to GPR
> The general purpose RAM can be accessed in a
> non-banked method via the FSRs. This can simplify
> access to large memory structures. See Section 3.5.2
> â01CLinear Data Memoryâ01D for more information."
>
> I recommend to use this feature for arrays.
>
> I think it also needs supported by gpasm and gplink. (One ram cell can be 
> accessed in two different addresses.)
>
> What do you think?
> How difficult to implement this?
>
> Best regards,
> Tamas Butuza

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