Hi Gerard,
Right, something like this (I left out packihx):
libs = file1 file2 file3
all: target1.hex target2.hex target3.hex
$(libs:%=%_target1.rel) : %_target1.rel : %.c
$(CC) $(CFLAGS) -c -DTARGET1 $< -o $@
$(libs:%=%_target2.rel) : %_target2.rel : %.c
$(CC) $(CFLAGS) -c -DTARGET2 $< -o $@
$(libs:%=%_target3.rel) : %_target3.rel : %.c
$(CC) $(CFLAGS) -c -DTARGET3 $< -o $@
target1.hex: application.c $(libs:%=%_target1.rel)
$(CC) $(CFLAGS) $(LFLAGS) application.c $(libs:%=%_target1.rel)
-DTARGET1 -o $@
target2.hex: application.c $(libs:%=%_target2.rel)
$(CC) $(CFLAGS) $(LFLAGS) application.c $(libs:%=%_target2.rel)
-DTARGET2 -o $@
target3.hex: application.c $(libs:%=%_target3.rel)
$(CC) $(CFLAGS) $(LFLAGS) application.c $(libs:%=%_target3.rel)
-DTARGET3 -o $@
With $(foreach ...) and $(eval ...) you could automate a lot more, but
you'll need GNU Make in version 3.81 at least. ;-) Try to find a
tutorial for make. And oh, there is a cool command line option "-n" for
make, just to test-run your Makefile.
Good luck!
Bodo
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