Hi, In this second version we stripped patches 1 and 2 from v1. They're now being treated in separate in
"[PATCH 0/2] riscv: add extension properties for all cpus" Note that we'll need these applied beforehand to see vendor CPU properties with this new API. This series implements query-cpu-model-expansion for RISC-V. The implementation was based on the ARM version of the same API in target/arm/arm-qmp-cmds.c. This series can be tested directly using this branch: https://gitlab.com/danielhb/qemu/-/tree/qmp-cpu-expansion_v2 Here's an usage example. Launch QEMU with "-S" to be able to issue QMP query commands before the machine starts: $ ./build/qemu-system-riscv64 -S -M virt -display none -qmp tcp:localhost:1234,server,wait=off Then use QMP to access the API: $ ./scripts/qmp/qmp-shell localhost:1234 Welcome to the QMP low-level shell! Connected to QEMU 8.1.50 (QEMU) query-cpu-model-expansion type=full model={"name":"rv64"} {"return": {"model": {"name": "rv64", "props": {"zicond": false, "x-zvfh": false, "mmu": true, "x-zvfbfwma": false, "x-zvfbfmin": false, "xtheadbs": false, "xtheadbb": false, "xtheadba": false, "xtheadmemidx": false, "smstateen": false, "zfinx": false, "Zve64f": false, "Zve32f": false, "x-zvfhmin": false, "xventanacondops": false, "xtheadcondmov": false, "svpbmt": false, "zbs": true, "zbc": true, "zbb": true, "zba": true, "zicboz": true, "xtheadmac": false, "Zfh": false, "Zfa": true, "zbkx": false, "zbkc": false, "zbkb": false, "Zve64d": false, "x-zfbfmin": false, "zk": false, "x-epmp": false, "xtheadmempair": false, "zkt": false, "zks": false, "zkr": false, "zkn": false, "Zfhmin": false, "zksh": false, "zknh": false, "zkne": false, "zknd": false, "zhinx": false, "Zicsr": true, "sscofpmf": false, "Zihintntl": true, "sstc": true, "xtheadcmo": false, "x-zvbb": false, "zksed": false, "x-zvkned": false, "xtheadsync": false, "x-zvkg": false, "zhinxmin": false, "svadu": true, "xtheadfmv": false, "x-zvksed": false, "svnapot": false, "pmp": true, "x-zvknhb": false, "x-zvknha": false, "xtheadfmemidx": false, "x-zvksh": false, "zdinx": false, "zicbom": true, "Zihintpause": true, "svinval": false, "zcf": false, "zce": false, "zcd": false, "zcb": false, "zca": false, "x-ssaia": false, "x-smaia": false, "zmmul": false, "x-zvbc": false, "Zifencei": true, "zcmt": false, "zcmp": false, "Zawrs": true}}}} Changes from v1: - patches 1 and 2 from v1 were removed and sent in separate - v1 link: https://lore.kernel.org/qemu-riscv/20230920213743.716265-1-dbarb...@ventanamicro.com/ Daniel Henrique Barboza (6): target/riscv/kvm/kvm-cpu.c: add missing property getters() qapi,risc-v: add query-cpu-model-expansion target/riscv/tcg: add tcg_cpu_finalize_features() target/riscv: handle custom props in qmp_query_cpu_model_expansion target/riscv: add riscv_cpu_accelerator_compatible() target/riscv/riscv-qmp-cmds.c: check CPU accel in query-cpu-model-expansion qapi/machine-target.json | 6 +- target/riscv/cpu.c | 27 +++++- target/riscv/cpu.h | 2 + target/riscv/kvm/kvm-cpu.c | 40 ++++++++- target/riscv/riscv-qmp-cmds.c | 160 ++++++++++++++++++++++++++++++++++ target/riscv/tcg/tcg-cpu.c | 68 +++++++++------ target/riscv/tcg/tcg-cpu.h | 2 + 7 files changed, 269 insertions(+), 36 deletions(-) -- 2.41.0
