From: Nikita Shubin <n.shu...@yadro.com>
Currently it is not possible to overload instance of RISCVCPU,
i.e. something like this:
static const TypeInfo riscv_cpu_type_infos[] = {
{
.name = TYPE_ANOTHER_RISCV_CPU,
.parent = TYPE_RISCV_CPU,
.instance_size = sizeof(MyCPUState),
.instance_init = riscv_my_cpu_init,
}
};
Because we have RISCVHartArrayState.harts with exactly
the size of RISCVCPU.
Using own instances can be used to store some internal hart state.
Cc: Daniel Henrique Barboza <dbarb...@ventanamicro.com>
Link:
https://patchwork.kernel.org/project/qemu-devel/patch/20230727080545.7908-1-nikita.shu...@maquefel.me/
Nikita Shubin (2):
hw/riscv: hart: replace array access with qemu_get_cpu()
hw/riscv: hart: allow other cpu instance
hw/riscv/boot.c | 6 ++++--
hw/riscv/riscv_hart.c | 20 ++++++++++++--------
hw/riscv/sifive_u.c | 7 +++++--
hw/riscv/spike.c | 17 ++++++++++-------
hw/riscv/virt-acpi-build.c | 2 +-
hw/riscv/virt.c | 17 +++++++++--------
include/hw/riscv/riscv_hart.h | 2 +-
7 files changed, 42 insertions(+), 29 deletions(-)
--
2.39.2
