Hi Igor Mammedov:
On 7/28/23 9:23 PM, Igor Mammedov wrote:
On Thu, 20 Jul 2023 15:15:11 +0800
xianglai li <lixiang...@loongson.cn> wrote:
1.Add the Unrealize function to the Loongarch CPU for cpu hot-(un)plug
2.Add CPU topology-related properties to the Loongarch CPU for cpu hot-(un)plug
Cc: Xiaojuan Yang <yangxiaoj...@loongson.cn>
Cc: Song Gao <gaos...@loongson.cn>
Cc: "Michael S. Tsirkin" <m...@redhat.com>
Cc: Igor Mammedov <imamm...@redhat.com>
Cc: Ani Sinha <anisi...@redhat.com>
Cc: Paolo Bonzini <pbonz...@redhat.com>
Cc: Richard Henderson <richard.hender...@linaro.org>
Cc: Eduardo Habkost <edua...@habkost.net>
Cc: Marcel Apfelbaum <marcel.apfelb...@gmail.com>
Cc: "Philippe Mathieu-Daudé" <phi...@linaro.org>
Cc: Yanan Wang <wangyana...@huawei.com>
Cc: "Daniel P. Berrangé" <berra...@redhat.com>
Cc: Peter Xu <pet...@redhat.com>
Cc: David Hildenbrand <da...@redhat.com>
Signed-off-by: xianglai li <lixiang...@loongson.cn>
---
target/loongarch/cpu.c | 33 +++++++++++++++++++++++++++++++++
target/loongarch/cpu.h | 1 +
2 files changed, 34 insertions(+)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index ad93ecac92..97c577820f 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -18,6 +18,7 @@
#include "cpu-csr.h"
#include "sysemu/reset.h"
#include "tcg/tcg.h"
+#include "hw/qdev-properties.h"
const char * const regnames[32] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
@@ -540,6 +541,24 @@ static void loongarch_cpu_realizefn(DeviceState *dev,
Error **errp)
lacc->parent_realize(dev, errp);
}
+static void loongarch_cpu_unrealizefn(DeviceState *dev)
+{
+ LoongArchCPUClass *mcc = LOONGARCH_CPU_GET_CLASS(dev);
+
+#ifndef CONFIG_USER_ONLY
+ CPUState *cs = CPU(dev);
+ LoongArchCPU *cpu = LOONGARCH_CPU(dev);
+ CPULoongArchState *env = &cpu->env;
+
+ cpu_remove_sync(CPU(dev));
+ cpu_address_space_destroy(cs, 0);
+ address_space_destroy(&env->address_space_iocsr);
+ memory_region_del_subregion(&env->system_iocsr, &env->iocsr_mem);
+#endif
+
+ mcc->parent_unrealize(dev);
+}
+
#ifndef CONFIG_USER_ONLY
static void loongarch_qemu_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
@@ -697,6 +716,15 @@ static gchar *loongarch_gdb_arch_name(CPUState *cs)
return g_strdup("loongarch64");
}
+static Property loongarch_cpu_properties[] = {
+ DEFINE_PROP_INT32("socket-id", LoongArchCPU, socket_id, 0),
+ DEFINE_PROP_INT32("core-id", LoongArchCPU, core_id, 0),
+ DEFINE_PROP_INT32("thread-id", LoongArchCPU, thread_id, 0),
+ DEFINE_PROP_INT32("node-id", LoongArchCPU, node_id,
CPU_UNSET_NUMA_NODE_ID),
+
+ DEFINE_PROP_END_OF_LIST()
+};
this should be a part of topo patches
Ok, I'll move it to the topo patch.
Thanks,
xianglai
+
static void loongarch_cpu_class_init(ObjectClass *c, void *data)
{
LoongArchCPUClass *lacc = LOONGARCH_CPU_CLASS(c);
@@ -704,8 +732,12 @@ static void loongarch_cpu_class_init(ObjectClass *c, void
*data)
DeviceClass *dc = DEVICE_CLASS(c);
ResettableClass *rc = RESETTABLE_CLASS(c);
+ device_class_set_props(dc, loongarch_cpu_properties);
device_class_set_parent_realize(dc, loongarch_cpu_realizefn,
&lacc->parent_realize);
+ device_class_set_parent_unrealize(dc, loongarch_cpu_unrealizefn,
+ &lacc->parent_unrealize);
+
resettable_class_set_parent_phases(rc, NULL, loongarch_cpu_reset_hold,
NULL,
&lacc->parent_phases);
@@ -730,6 +762,7 @@ static void loongarch_cpu_class_init(ObjectClass *c, void *data)
#ifdef CONFIG_TCG
cc->tcg_ops = &loongarch_tcg_ops;
#endif
+ dc->user_creatable = true;
}
#define DEFINE_LOONGARCH_CPU_TYPE(model, initfn) \
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index f4439c245f..32feee4fe6 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -397,6 +397,7 @@ struct LoongArchCPUClass {
/*< public >*/
DeviceRealize parent_realize;
+ DeviceUnrealize parent_unrealize;
ResettablePhases parent_phases;
};
