Re: [PATCH] target/mips: enable GINVx support for I6400 and I6500

[Philippe Mathieu-Daudé]

On 30/6/23 09:28, Marcin Nowakowski wrote:

GINVI and GINVT operations are supported on MIPS I6400 and I6500 cores,
so indicate that properly in CP0.Config5 register bits [16:15].

Signed-off-by: Marcin Nowakowski <marcin.nowakow...@fungible.com>
---
  target/mips/cpu-defs.c.inc | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>