From: Lei Wang <lei4.w...@intel.com> SapphireRapids has bit 13, 14 and 15 of MSR_IA32_ARCH_CAPABILITIES enabled, which are related to some security fixes.
Add version 2 of SapphireRapids CPU model with those bits enabled also. Signed-off-by: Lei Wang <lei4.w...@intel.com> Signed-off-by: Tao Su <tao1...@linux.intel.com> --- target/i386/cpu.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 852c45b965..ec229072e7 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3944,8 +3944,17 @@ static const X86CPUDefinition builtin_x86_defs[] = { .model_id = "Intel Xeon Processor (SapphireRapids)", .versions = (X86CPUVersionDefinition[]) { { .version = 1 }, - { /* end of list */ }, - }, + { + .version = 2, + .props = (PropValue[]) { + { "sbdr-ssdp-no", "on" }, + { "fbsdp-no", "on" }, + { "psdp-no", "on" }, + { /* end of list */ } + } + }, + { /* end of list */ } + } }, { .name = "Denverton", -- 2.34.1