CPUNegativeOffsetState is a struct placed immediately before
CPUArchState in the ArchCPU struct. Its purpose is to ensure that
certain fields (CPUTLBDescFast, IcountDecr) lay within a small negative
offset of CPUArchState in memory. This is desired for better
code-generation on arm[32|64] and riscv hosts which has addressing
modes with 12- and 11 bits of displacement respectively.
This patchset removes CPUNegativeOffsetState, moves its fields to
CPUState, and statically asserts that the offset to the fields above
is expressable in 11 bits of displacement ( >= -(1 << 11) ). In order
to achieve this the TARGET_PAGE_ENTRY_EXTRA macro in CPUTLBEntryFull
had to be replaced with a union to make CPUTLB target independent.
The motivation for this patchset is twofold:
1. Parts of the codebase that previously depended on CPUArchState
to access either CPUTLB or IcountDecr now only depend on the
target-agnostic CPUState. This is a step towards building
accel/ once for system- and once for user-mode.
2. Targets no longer have to define a CPUNegativeOffsetState
member of ArchCPU, and QEMU will fail to compile if CPUTLB
and IcountDecr drift too far from CPUArchState.
Patches will follow that convert accel/tcg/cputlb.c and
accel/tcg/user-exec.c away from CPUArchState.
Anton Johansson (9):
target/arm: Replace TARGET_PAGE_ENTRY_EXTRA
include: Move MMUAccessType to tlb-common.h
include/exec: Move CPUTLB and friends to tlb-common.h
include/hw: introduce CPU_MAX_NEGATIVE_ENV_OFFSET
accel: Move CPUTLB to CPUState and assert offset
Move IcountDecr to CPUState and assert offset
include/exec: Remove [cpu|env]_neg() functions
target: Remove CPUNegativeOffsetState field from ArchCPU
include/exec: Remove CPUNegativeOffsetState
include/exec/cpu-all.h | 28 +-----
include/exec/cpu-defs.h | 141 ----------------------------
include/exec/exec-all.h | 2 +-
include/exec/tlb-common.h | 153 +++++++++++++++++++++++++++++++
include/hw/core/cpu.h | 27 ++++--
target/alpha/cpu.h | 1 -
target/arm/cpu-param.h | 12 ---
target/arm/cpu.h | 1 -
target/avr/cpu.h | 1 -
target/cris/cpu.h | 1 -
target/hexagon/cpu.h | 1 -
target/hppa/cpu.h | 1 -
target/i386/cpu.h | 1 -
target/loongarch/cpu.h | 1 -
target/m68k/cpu.h | 1 -
target/microblaze/cpu.h | 1 -
target/mips/cpu.h | 3 +-
target/nios2/cpu.h | 1 -
target/openrisc/cpu.h | 1 -
target/ppc/cpu.h | 1 -
target/riscv/cpu.h | 1 -
target/rx/cpu.h | 1 -
target/s390x/cpu.h | 1 -
target/sh4/cpu.h | 1 -
target/sparc/cpu.h | 1 -
target/tricore/cpu.h | 1 -
target/xtensa/cpu.h | 3 +-
accel/tcg/cpu-exec.c | 14 +--
accel/tcg/tcg-accel-ops-icount.c | 6 +-
accel/tcg/tcg-accel-ops.c | 2 +-
accel/tcg/translate-all.c | 19 +++-
accel/tcg/translator.c | 15 ++-
softmmu/icount.c | 2 +-
target/arm/ptw.c | 4 +-
target/arm/tcg/mte_helper.c | 2 +-
target/arm/tcg/sve_helper.c | 2 +-
target/arm/tcg/tlb_helper.c | 4 +-
target/arm/tcg/translate-a64.c | 2 +-
38 files changed, 222 insertions(+), 238 deletions(-)
--
2.41.0
