Changes for v5:
* Enabled only by cpu property x-rme=on, not -cpu max.
* Rebase vs SecEL2 fixes, now in master.
This doesn't have the magic RMM memory, which previous patch sets
included for booting Huawei's forked TF-A. Upstream TF-A does not
have sufficient code to build either PLAT={qemu,qemu_sbsa} with
the RMM enabled, so that can't be tested either at the moment.
All I can say is that this doesn't appear to break anything else
with x-rme=on. Which is less than satisfying.
r~
Richard Henderson (20):
target/arm: Add isar_feature_aa64_rme
target/arm: Update SCR and HCR for RME
target/arm: SCR_EL3.NS may be RES1
target/arm: Add RME cpregs
target/arm: Introduce ARMSecuritySpace
include/exec/memattrs: Add two bits of space to MemTxAttrs
target/arm: Adjust the order of Phys and Stage2 ARMMMUIdx
target/arm: Introduce ARMMMUIdx_Phys_{Realm,Root}
target/arm: Remove __attribute__((nonnull)) from ptw.c
target/arm: Pipe ARMSecuritySpace through ptw.c
target/arm: NSTable is RES0 for the RME EL3 regime
target/arm: Handle Block and Page bits for security space
target/arm: Handle no-execute for Realm and Root regimes
target/arm: Use get_phys_addr_with_struct in S1_ptw_translate
target/arm: Move s1_is_el0 into S1Translate
target/arm: Use get_phys_addr_with_struct for stage2
target/arm: Add GPC syndrome
target/arm: Implement GPC exceptions
target/arm: Implement the granule protection check
target/arm: Add cpu properties for enabling FEAT_RME
include/exec/memattrs.h | 9 +-
target/arm/cpu.h | 151 ++++++++--
target/arm/internals.h | 27 ++
target/arm/syndrome.h | 10 +
target/arm/cpu.c | 4 +
target/arm/helper.c | 162 +++++++++-
target/arm/ptw.c | 570 +++++++++++++++++++++++++++++-------
target/arm/tcg/cpu64.c | 53 ++++
target/arm/tcg/tlb_helper.c | 96 +++++-
9 files changed, 935 insertions(+), 147 deletions(-)
--
2.34.1
