Re: [PATCH v4 2/3] hw/riscv: sifive_e: Support the watchdog timer of HiFive 1 rev b.

[Philippe Mathieu-Daudé]

On 23/5/23 10:49, Tommy Wu wrote:

Create the AON device when we realize the sifive_e machine.
This patch only implemented the functionality of the watchdog timer,
not all the functionality of the AON device.

Signed-off-by: Tommy Wu <tommy...@sifive.com>
Reviewed-by: Frank Chang <frank.ch...@sifive.com>
---
  hw/riscv/Kconfig            |  1 +
  hw/riscv/sifive_e.c         | 13 +++++++++++--
  include/hw/riscv/sifive_e.h |  8 +++++---
  3 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
index b824a79e2d..a094b47e0b 100644
--- a/include/hw/riscv/sifive_e.h
+++ b/include/hw/riscv/sifive_e.h
@@ -35,6 +35,7 @@ typedef struct SiFiveESoCState {
      /*< public >*/
      RISCVHartArrayState cpus;
      DeviceState *plic;
+    DeviceState *aon;

Preferably allocate the device state in the SoC, similar to gpio:

        SiFiveEAONState aon;

      SIFIVEGPIOState gpio;
      MemoryRegion xip_mem;
      MemoryRegion mask_rom;
@@ -76,9 +77,10 @@ enum {
  };