> -----Original Message----- > From: Richard Henderson <richard.hender...@linaro.org> > Sent: Monday, April 10, 2023 8:30 PM > To: Taylor Simpson <tsimp...@quicinc.com>; qemu-devel@nongnu.org > Cc: phi...@linaro.org; a...@rev.ng; a...@rev.ng; Brian Cain > <bc...@quicinc.com>; Matheus Bernardino (QUIC) > <quic_mathb...@quicinc.com> > Subject: Re: [PATCH] Hexagon (target/hexagon) Add overrides for > cache/sync/barrier instructions > > On 4/10/23 13:24, Taylor Simpson wrote: > > Most of these are not modelled in QEMU, so save the overhead of > > calling a helper. > > > > The only exception is dczeroa. It assigns to hex_dczero_addr, which > > is handled during packet commit. > > > > Signed-off-by: Taylor Simpson<tsimp...@quicinc.com> > > --- > > target/hexagon/gen_tcg.h | 24 ++++++++++++++++++++++++ > > target/hexagon/macros.h | 18 ++++-------------- > > 2 files changed, 28 insertions(+), 14 deletions(-) > > Reviewed-by: Richard Henderson <richard.hender...@linaro.org> > > Something to look at in the future: I believe quite a lot of these variables > like > dczero_addr are not "real" architectural state, in that they do not persist > beyond the lifetime of the packet. There are others, e.g. pkt_has_store_s1.
That's correct. > These variables could be moved to DisasContext and allocated on demand. > Even recently this was tedious, because of TCG temporary lifetime issues, > but no longer. I'll work on this. The obvious advantage is to allow the TCG optimizer more opportunity to fold copies and propagate constants. Any other advantage? Thanks, Taylor
