On Mon, 6 Mar 2023 at 15:12, Chen Baozi <chenba...@phytium.com.cn> wrote: > > Add implementation defined registers for neoverse-n1 which > would be accessed by TF-A. Since there is no DSU in Qemu, > CPUCFR_EL1.SCU bit is set to 1 to avoid DSU registers definition. > > Signed-off-by: Chen Baozi <chenba...@phytium.com.cn> > Tested-by: Marcin Juszkiewicz <marcin.juszkiew...@linaro.org>
Did Marcin test this version of the patch ? thanks -- PMM
