On 1/30/23 00:07, Sergey Matyukevich wrote:
From: Sergey Matyukevich<sergey.matyukev...@syntacore.com>
According to priviledged spec, if [sm]tval is written with a nonzero
value when a breakpoint exception occurs, then [sm]tval will contain
the faulting virtual address. Set tval to hit address when breakpoint
exception is triggered by hardware watchpoint.
Signed-off-by: Sergey Matyukevich<sergey.matyukev...@syntacore.com>
---
target/riscv/cpu_helper.c | 3 +++
target/riscv/debug.c | 1 +
2 files changed, 4 insertions(+)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
r~
