Hi All,

I'm adding a new target to qemu, now, I'm writing mmu simulation, but
it make me confused.

When TLB miss occurred, I can't seperate DTLB miss from ITLB miss.

I implemented it like this from target-xtensa:

if (rw & 2)
   HANDLE DTLB MISS
else
   HANDLE ITLB MISS

But it didn't work. May I have some suggestions?

Regards,
Zhizhou Zhang

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