Hi, This version has changes in patch 3 where we're now using extract64() instead of a plain bit mask to return the 32 bit address in translate_fn().
Changes from v7: - patch 2: - added Alistair's r-b - patch 3: - use extract64() to return the 32 bit address v7 link: https://lists.gnu.org/archive/html/qemu-devel/2023-01/msg02916.html Daniel Henrique Barboza (3): hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel() hw/riscv/boot.c: make riscv_load_initrd() static hw/riscv: clear kernel_entry higher bits in load_elf_ram_sym() hw/riscv/boot.c | 108 ++++++++++++++++++++++++------------- hw/riscv/microchip_pfsoc.c | 12 +---- hw/riscv/opentitan.c | 3 +- hw/riscv/sifive_e.c | 4 +- hw/riscv/sifive_u.c | 12 +---- hw/riscv/spike.c | 13 +---- hw/riscv/virt.c | 12 +---- include/hw/riscv/boot.h | 3 +- target/riscv/cpu_bits.h | 1 + 9 files changed, 87 insertions(+), 81 deletions(-) -- 2.39.0
