On 12/24/22 00:15, Song Gao wrote:
+#define LSX_LEN (128)
+typedef union vec_t vec_t;
+union vec_t {
+ int8_t B[LSX_LEN / 8];
+ int16_t H[LSX_LEN / 16];
+ int32_t W[LSX_LEN / 32];
+ int64_t D[LSX_LEN / 64];
+ __int128 Q[LSX_LEN / 128];
+};
+
+typedef union fpr_t fpr_t;
+union fpr_t {
+ uint64_t d;
+ vec_t vec;
+};
You need to think about host endianness with this overlap and indexing.
There are two different models which can be emulated:
(1) target/{arm,s390x}/ has each uint64_t in host-endian order, but the words are indexed
little-endian. See, for instance, target/s390x/tcg/vec.h.
(2) target/{ppc,i386}/ has the entire vector in host-endian order. See, for instance,
ZMM_* in target/i386/cpu.h.
If you do nothing, I assume this will fail on a big-endian host.
r~
